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authorJohannes Berg <johannes.berg@intel.com>2010-01-21 09:25:54 -0500
committerReinette Chatre <reinette.chatre@intel.com>2010-03-09 19:03:37 -0500
commita4c8b2a692601de0a7bcb032b69f806050944dff (patch)
tree29771c9383e5c91c22de5b45b21562e97710ce0d /drivers/net/wireless/iwlwifi/iwl-agn-ict.c
parentee525d13f501baeaa33209620398adaf0a820629 (diff)
iwlwifi: move ICT data to agn part of union
Since the ICT data is all AGN specific, it can be the first data to create the _agn part of the device-specific union in the priv struct. Signed-off-by: Johannes Berg <johannes.berg@intel.com> Signed-off-by: Reinette Chatre <reinette.chatre@intel.com>
Diffstat (limited to 'drivers/net/wireless/iwlwifi/iwl-agn-ict.c')
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-agn-ict.c78
1 files changed, 40 insertions, 38 deletions
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-ict.c b/drivers/net/wireless/iwlwifi/iwl-agn-ict.c
index d6b028b1b6ef..4c5395eae956 100644
--- a/drivers/net/wireless/iwlwifi/iwl-agn-ict.c
+++ b/drivers/net/wireless/iwlwifi/iwl-agn-ict.c
@@ -42,11 +42,12 @@
42/* Free dram table */ 42/* Free dram table */
43void iwl_free_isr_ict(struct iwl_priv *priv) 43void iwl_free_isr_ict(struct iwl_priv *priv)
44{ 44{
45 if (priv->ict_tbl_vir) { 45 if (priv->_agn.ict_tbl_vir) {
46 dma_free_coherent(&priv->pci_dev->dev, 46 dma_free_coherent(&priv->pci_dev->dev,
47 (sizeof(u32) * ICT_COUNT) + PAGE_SIZE, 47 (sizeof(u32) * ICT_COUNT) + PAGE_SIZE,
48 priv->ict_tbl_vir, priv->ict_tbl_dma); 48 priv->_agn.ict_tbl_vir,
49 priv->ict_tbl_vir = NULL; 49 priv->_agn.ict_tbl_dma);
50 priv->_agn.ict_tbl_vir = NULL;
50 } 51 }
51} 52}
52 53
@@ -60,30 +61,31 @@ int iwl_alloc_isr_ict(struct iwl_priv *priv)
60 if (priv->cfg->use_isr_legacy) 61 if (priv->cfg->use_isr_legacy)
61 return 0; 62 return 0;
62 /* allocate shrared data table */ 63 /* allocate shrared data table */
63 priv->ict_tbl_vir = dma_alloc_coherent(&priv->pci_dev->dev, 64 priv->_agn.ict_tbl_vir =
64 (sizeof(u32) * ICT_COUNT) + PAGE_SIZE, 65 dma_alloc_coherent(&priv->pci_dev->dev,
65 &priv->ict_tbl_dma, GFP_KERNEL); 66 (sizeof(u32) * ICT_COUNT) + PAGE_SIZE,
66 if (!priv->ict_tbl_vir) 67 &priv->_agn.ict_tbl_dma, GFP_KERNEL);
68 if (!priv->_agn.ict_tbl_vir)
67 return -ENOMEM; 69 return -ENOMEM;
68 70
69 /* align table to PAGE_SIZE boundry */ 71 /* align table to PAGE_SIZE boundry */
70 priv->aligned_ict_tbl_dma = ALIGN(priv->ict_tbl_dma, PAGE_SIZE); 72 priv->_agn.aligned_ict_tbl_dma = ALIGN(priv->_agn.ict_tbl_dma, PAGE_SIZE);
71 73
72 IWL_DEBUG_ISR(priv, "ict dma addr %Lx dma aligned %Lx diff %d\n", 74 IWL_DEBUG_ISR(priv, "ict dma addr %Lx dma aligned %Lx diff %d\n",
73 (unsigned long long)priv->ict_tbl_dma, 75 (unsigned long long)priv->_agn.ict_tbl_dma,
74 (unsigned long long)priv->aligned_ict_tbl_dma, 76 (unsigned long long)priv->_agn.aligned_ict_tbl_dma,
75 (int)(priv->aligned_ict_tbl_dma - priv->ict_tbl_dma)); 77 (int)(priv->_agn.aligned_ict_tbl_dma - priv->_agn.ict_tbl_dma));
76 78
77 priv->ict_tbl = priv->ict_tbl_vir + 79 priv->_agn.ict_tbl = priv->_agn.ict_tbl_vir +
78 (priv->aligned_ict_tbl_dma - priv->ict_tbl_dma); 80 (priv->_agn.aligned_ict_tbl_dma - priv->_agn.ict_tbl_dma);
79 81
80 IWL_DEBUG_ISR(priv, "ict vir addr %p vir aligned %p diff %d\n", 82 IWL_DEBUG_ISR(priv, "ict vir addr %p vir aligned %p diff %d\n",
81 priv->ict_tbl, priv->ict_tbl_vir, 83 priv->_agn.ict_tbl, priv->_agn.ict_tbl_vir,
82 (int)(priv->aligned_ict_tbl_dma - priv->ict_tbl_dma)); 84 (int)(priv->_agn.aligned_ict_tbl_dma - priv->_agn.ict_tbl_dma));
83 85
84 /* reset table and index to all 0 */ 86 /* reset table and index to all 0 */
85 memset(priv->ict_tbl_vir,0, (sizeof(u32) * ICT_COUNT) + PAGE_SIZE); 87 memset(priv->_agn.ict_tbl_vir,0, (sizeof(u32) * ICT_COUNT) + PAGE_SIZE);
86 priv->ict_index = 0; 88 priv->_agn.ict_index = 0;
87 89
88 /* add periodic RX interrupt */ 90 /* add periodic RX interrupt */
89 priv->inta_mask |= CSR_INT_BIT_RX_PERIODIC; 91 priv->inta_mask |= CSR_INT_BIT_RX_PERIODIC;
@@ -98,26 +100,26 @@ int iwl_reset_ict(struct iwl_priv *priv)
98 u32 val; 100 u32 val;
99 unsigned long flags; 101 unsigned long flags;
100 102
101 if (!priv->ict_tbl_vir) 103 if (!priv->_agn.ict_tbl_vir)
102 return 0; 104 return 0;
103 105
104 spin_lock_irqsave(&priv->lock, flags); 106 spin_lock_irqsave(&priv->lock, flags);
105 iwl_disable_interrupts(priv); 107 iwl_disable_interrupts(priv);
106 108
107 memset(&priv->ict_tbl[0], 0, sizeof(u32) * ICT_COUNT); 109 memset(&priv->_agn.ict_tbl[0], 0, sizeof(u32) * ICT_COUNT);
108 110
109 val = priv->aligned_ict_tbl_dma >> PAGE_SHIFT; 111 val = priv->_agn.aligned_ict_tbl_dma >> PAGE_SHIFT;
110 112
111 val |= CSR_DRAM_INT_TBL_ENABLE; 113 val |= CSR_DRAM_INT_TBL_ENABLE;
112 val |= CSR_DRAM_INIT_TBL_WRAP_CHECK; 114 val |= CSR_DRAM_INIT_TBL_WRAP_CHECK;
113 115
114 IWL_DEBUG_ISR(priv, "CSR_DRAM_INT_TBL_REG =0x%X " 116 IWL_DEBUG_ISR(priv, "CSR_DRAM_INT_TBL_REG =0x%X "
115 "aligned dma address %Lx\n", 117 "aligned dma address %Lx\n",
116 val, (unsigned long long)priv->aligned_ict_tbl_dma); 118 val, (unsigned long long)priv->_agn.aligned_ict_tbl_dma);
117 119
118 iwl_write32(priv, CSR_DRAM_INT_TBL_REG, val); 120 iwl_write32(priv, CSR_DRAM_INT_TBL_REG, val);
119 priv->use_ict = true; 121 priv->_agn.use_ict = true;
120 priv->ict_index = 0; 122 priv->_agn.ict_index = 0;
121 iwl_write32(priv, CSR_INT, priv->inta_mask); 123 iwl_write32(priv, CSR_INT, priv->inta_mask);
122 iwl_enable_interrupts(priv); 124 iwl_enable_interrupts(priv);
123 spin_unlock_irqrestore(&priv->lock, flags); 125 spin_unlock_irqrestore(&priv->lock, flags);
@@ -131,7 +133,7 @@ void iwl_disable_ict(struct iwl_priv *priv)
131 unsigned long flags; 133 unsigned long flags;
132 134
133 spin_lock_irqsave(&priv->lock, flags); 135 spin_lock_irqsave(&priv->lock, flags);
134 priv->use_ict = false; 136 priv->_agn.use_ict = false;
135 spin_unlock_irqrestore(&priv->lock, flags); 137 spin_unlock_irqrestore(&priv->lock, flags);
136} 138}
137 139
@@ -180,11 +182,11 @@ static irqreturn_t iwl_isr(int irq, void *data)
180 } 182 }
181#endif 183#endif
182 184
183 priv->inta |= inta; 185 priv->_agn.inta |= inta;
184 /* iwl_irq_tasklet() will service interrupts and re-enable them */ 186 /* iwl_irq_tasklet() will service interrupts and re-enable them */
185 if (likely(inta)) 187 if (likely(inta))
186 tasklet_schedule(&priv->irq_tasklet); 188 tasklet_schedule(&priv->irq_tasklet);
187 else if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta) 189 else if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->_agn.inta)
188 iwl_enable_interrupts(priv); 190 iwl_enable_interrupts(priv);
189 191
190 unplugged: 192 unplugged:
@@ -194,7 +196,7 @@ static irqreturn_t iwl_isr(int irq, void *data)
194 none: 196 none:
195 /* re-enable interrupts here since we don't have anything to service. */ 197 /* re-enable interrupts here since we don't have anything to service. */
196 /* only Re-enable if diabled by irq and no schedules tasklet. */ 198 /* only Re-enable if diabled by irq and no schedules tasklet. */
197 if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta) 199 if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->_agn.inta)
198 iwl_enable_interrupts(priv); 200 iwl_enable_interrupts(priv);
199 201
200 spin_unlock(&priv->lock); 202 spin_unlock(&priv->lock);
@@ -221,7 +223,7 @@ irqreturn_t iwl_isr_ict(int irq, void *data)
221 /* dram interrupt table not set yet, 223 /* dram interrupt table not set yet,
222 * use legacy interrupt. 224 * use legacy interrupt.
223 */ 225 */
224 if (!priv->use_ict) 226 if (!priv->_agn.use_ict)
225 return iwl_isr(irq, data); 227 return iwl_isr(irq, data);
226 228
227 spin_lock(&priv->lock); 229 spin_lock(&priv->lock);
@@ -238,20 +240,20 @@ irqreturn_t iwl_isr_ict(int irq, void *data)
238 /* Ignore interrupt if there's nothing in NIC to service. 240 /* Ignore interrupt if there's nothing in NIC to service.
239 * This may be due to IRQ shared with another device, 241 * This may be due to IRQ shared with another device,
240 * or due to sporadic interrupts thrown from our NIC. */ 242 * or due to sporadic interrupts thrown from our NIC. */
241 if (!priv->ict_tbl[priv->ict_index]) { 243 if (!priv->_agn.ict_tbl[priv->_agn.ict_index]) {
242 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0\n"); 244 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0\n");
243 goto none; 245 goto none;
244 } 246 }
245 247
246 /* read all entries that not 0 start with ict_index */ 248 /* read all entries that not 0 start with ict_index */
247 while (priv->ict_tbl[priv->ict_index]) { 249 while (priv->_agn.ict_tbl[priv->_agn.ict_index]) {
248 250
249 val |= le32_to_cpu(priv->ict_tbl[priv->ict_index]); 251 val |= le32_to_cpu(priv->_agn.ict_tbl[priv->_agn.ict_index]);
250 IWL_DEBUG_ISR(priv, "ICT index %d value 0x%08X\n", 252 IWL_DEBUG_ISR(priv, "ICT index %d value 0x%08X\n",
251 priv->ict_index, 253 priv->_agn.ict_index,
252 le32_to_cpu(priv->ict_tbl[priv->ict_index])); 254 le32_to_cpu(priv->_agn.ict_tbl[priv->_agn.ict_index]));
253 priv->ict_tbl[priv->ict_index] = 0; 255 priv->_agn.ict_tbl[priv->_agn.ict_index] = 0;
254 priv->ict_index = iwl_queue_inc_wrap(priv->ict_index, 256 priv->_agn.ict_index = iwl_queue_inc_wrap(priv->_agn.ict_index,
255 ICT_COUNT); 257 ICT_COUNT);
256 258
257 } 259 }
@@ -275,12 +277,12 @@ irqreturn_t iwl_isr_ict(int irq, void *data)
275 inta, inta_mask, val); 277 inta, inta_mask, val);
276 278
277 inta &= priv->inta_mask; 279 inta &= priv->inta_mask;
278 priv->inta |= inta; 280 priv->_agn.inta |= inta;
279 281
280 /* iwl_irq_tasklet() will service interrupts and re-enable them */ 282 /* iwl_irq_tasklet() will service interrupts and re-enable them */
281 if (likely(inta)) 283 if (likely(inta))
282 tasklet_schedule(&priv->irq_tasklet); 284 tasklet_schedule(&priv->irq_tasklet);
283 else if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta) { 285 else if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->_agn.inta) {
284 /* Allow interrupt if was disabled by this handler and 286 /* Allow interrupt if was disabled by this handler and
285 * no tasklet was schedules, We should not enable interrupt, 287 * no tasklet was schedules, We should not enable interrupt,
286 * tasklet will enable it. 288 * tasklet will enable it.
@@ -295,7 +297,7 @@ irqreturn_t iwl_isr_ict(int irq, void *data)
295 /* re-enable interrupts here since we don't have anything to service. 297 /* re-enable interrupts here since we don't have anything to service.
296 * only Re-enable if disabled by irq. 298 * only Re-enable if disabled by irq.
297 */ 299 */
298 if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta) 300 if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->_agn.inta)
299 iwl_enable_interrupts(priv); 301 iwl_enable_interrupts(priv);
300 302
301 spin_unlock(&priv->lock); 303 spin_unlock(&priv->lock);