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authorChristoph Hellwig <hch@lst.de>2008-01-27 19:41:47 -0500
committerDavid S. Miller <davem@davemloft.net>2008-01-28 18:04:35 -0500
commitbb8c093bdea62f2ae371b98ebff81b0407852faf (patch)
tree7937a70c333356a85b344f883608eeaf93dd3d2b /drivers/net/wireless/iwlwifi/iwl-4965.c
parent403ab56b1c2786b0e1d58c27f5ce667b529c7faa (diff)
iwlwifi: cleanup namespace
Prefix all symbols with iwl3945_ or iwl4965_ and thus allow building the driver into the kernel. Also remove all the useless default statements in Kconfig while we're at it. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Zhu Yi <yi.zhu@intel.com> Signed-off-by: Reinette Chatre <reinette.chatre@intel.com> Signed-off-by: John W. Linville <linville@tuxdriver.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/wireless/iwlwifi/iwl-4965.c')
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-4965.c752
1 files changed, 376 insertions, 376 deletions
diff --git a/drivers/net/wireless/iwlwifi/iwl-4965.c b/drivers/net/wireless/iwlwifi/iwl-4965.c
index 620f125ae304..f7c5ac3072c7 100644
--- a/drivers/net/wireless/iwlwifi/iwl-4965.c
+++ b/drivers/net/wireless/iwlwifi/iwl-4965.c
@@ -40,7 +40,7 @@
40#include "iwl-4965.h" 40#include "iwl-4965.h"
41#include "iwl-helpers.h" 41#include "iwl-helpers.h"
42 42
43static void iwl_hw_card_show_info(struct iwl_priv *priv); 43static void iwl4965_hw_card_show_info(struct iwl4965_priv *priv);
44 44
45#define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \ 45#define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \
46 [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \ 46 [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
@@ -62,7 +62,7 @@ static void iwl_hw_card_show_info(struct iwl_priv *priv);
62 * maps to IWL_RATE_INVALID 62 * maps to IWL_RATE_INVALID
63 * 63 *
64 */ 64 */
65const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT] = { 65const struct iwl4965_rate_info iwl4965_rates[IWL_RATE_COUNT] = {
66 IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2), /* 1mbps */ 66 IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2), /* 1mbps */
67 IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5), /* 2mbps */ 67 IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5), /* 2mbps */
68 IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11), /*5.5mbps */ 68 IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11), /*5.5mbps */
@@ -84,7 +84,7 @@ static int is_fat_channel(__le32 rxon_flags)
84 (rxon_flags & RXON_FLG_CHANNEL_MODE_MIXED_MSK); 84 (rxon_flags & RXON_FLG_CHANNEL_MODE_MIXED_MSK);
85} 85}
86 86
87static u8 is_single_stream(struct iwl_priv *priv) 87static u8 is_single_stream(struct iwl4965_priv *priv)
88{ 88{
89#ifdef CONFIG_IWL4965_HT 89#ifdef CONFIG_IWL4965_HT
90 if (!priv->is_ht_enabled || !priv->current_assoc_ht.is_ht || 90 if (!priv->is_ht_enabled || !priv->current_assoc_ht.is_ht ||
@@ -103,7 +103,7 @@ static u8 is_single_stream(struct iwl_priv *priv)
103 * MIMO (dual stream) requires at least 2, but works better with 3. 103 * MIMO (dual stream) requires at least 2, but works better with 3.
104 * This does not determine *which* chains to use, just how many. 104 * This does not determine *which* chains to use, just how many.
105 */ 105 */
106static int iwl4965_get_rx_chain_counter(struct iwl_priv *priv, 106static int iwl4965_get_rx_chain_counter(struct iwl4965_priv *priv,
107 u8 *idle_state, u8 *rx_state) 107 u8 *idle_state, u8 *rx_state)
108{ 108{
109 u8 is_single = is_single_stream(priv); 109 u8 is_single = is_single_stream(priv);
@@ -132,32 +132,32 @@ static int iwl4965_get_rx_chain_counter(struct iwl_priv *priv,
132 return 0; 132 return 0;
133} 133}
134 134
135int iwl_hw_rxq_stop(struct iwl_priv *priv) 135int iwl4965_hw_rxq_stop(struct iwl4965_priv *priv)
136{ 136{
137 int rc; 137 int rc;
138 unsigned long flags; 138 unsigned long flags;
139 139
140 spin_lock_irqsave(&priv->lock, flags); 140 spin_lock_irqsave(&priv->lock, flags);
141 rc = iwl_grab_nic_access(priv); 141 rc = iwl4965_grab_nic_access(priv);
142 if (rc) { 142 if (rc) {
143 spin_unlock_irqrestore(&priv->lock, flags); 143 spin_unlock_irqrestore(&priv->lock, flags);
144 return rc; 144 return rc;
145 } 145 }
146 146
147 /* stop HW */ 147 /* stop HW */
148 iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0); 148 iwl4965_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
149 rc = iwl_poll_direct_bit(priv, FH_MEM_RSSR_RX_STATUS_REG, 149 rc = iwl4965_poll_direct_bit(priv, FH_MEM_RSSR_RX_STATUS_REG,
150 (1 << 24), 1000); 150 (1 << 24), 1000);
151 if (rc < 0) 151 if (rc < 0)
152 IWL_ERROR("Can't stop Rx DMA.\n"); 152 IWL_ERROR("Can't stop Rx DMA.\n");
153 153
154 iwl_release_nic_access(priv); 154 iwl4965_release_nic_access(priv);
155 spin_unlock_irqrestore(&priv->lock, flags); 155 spin_unlock_irqrestore(&priv->lock, flags);
156 156
157 return 0; 157 return 0;
158} 158}
159 159
160u8 iwl_hw_find_station(struct iwl_priv *priv, const u8 *addr) 160u8 iwl4965_hw_find_station(struct iwl4965_priv *priv, const u8 *addr)
161{ 161{
162 int i; 162 int i;
163 int start = 0; 163 int start = 0;
@@ -189,13 +189,13 @@ u8 iwl_hw_find_station(struct iwl_priv *priv, const u8 *addr)
189 return ret; 189 return ret;
190} 190}
191 191
192static int iwl4965_nic_set_pwr_src(struct iwl_priv *priv, int pwr_max) 192static int iwl4965_nic_set_pwr_src(struct iwl4965_priv *priv, int pwr_max)
193{ 193{
194 int ret; 194 int ret;
195 unsigned long flags; 195 unsigned long flags;
196 196
197 spin_lock_irqsave(&priv->lock, flags); 197 spin_lock_irqsave(&priv->lock, flags);
198 ret = iwl_grab_nic_access(priv); 198 ret = iwl4965_grab_nic_access(priv);
199 if (ret) { 199 if (ret) {
200 spin_unlock_irqrestore(&priv->lock, flags); 200 spin_unlock_irqrestore(&priv->lock, flags);
201 return ret; 201 return ret;
@@ -208,44 +208,44 @@ static int iwl4965_nic_set_pwr_src(struct iwl_priv *priv, int pwr_max)
208 &val); 208 &val);
209 209
210 if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT) 210 if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT)
211 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG, 211 iwl4965_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
212 APMG_PS_CTRL_VAL_PWR_SRC_VAUX, 212 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
213 ~APMG_PS_CTRL_MSK_PWR_SRC); 213 ~APMG_PS_CTRL_MSK_PWR_SRC);
214 } else 214 } else
215 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG, 215 iwl4965_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
216 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN, 216 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
217 ~APMG_PS_CTRL_MSK_PWR_SRC); 217 ~APMG_PS_CTRL_MSK_PWR_SRC);
218 218
219 iwl_release_nic_access(priv); 219 iwl4965_release_nic_access(priv);
220 spin_unlock_irqrestore(&priv->lock, flags); 220 spin_unlock_irqrestore(&priv->lock, flags);
221 221
222 return ret; 222 return ret;
223} 223}
224 224
225static int iwl4965_rx_init(struct iwl_priv *priv, struct iwl_rx_queue *rxq) 225static int iwl4965_rx_init(struct iwl4965_priv *priv, struct iwl4965_rx_queue *rxq)
226{ 226{
227 int rc; 227 int rc;
228 unsigned long flags; 228 unsigned long flags;
229 229
230 spin_lock_irqsave(&priv->lock, flags); 230 spin_lock_irqsave(&priv->lock, flags);
231 rc = iwl_grab_nic_access(priv); 231 rc = iwl4965_grab_nic_access(priv);
232 if (rc) { 232 if (rc) {
233 spin_unlock_irqrestore(&priv->lock, flags); 233 spin_unlock_irqrestore(&priv->lock, flags);
234 return rc; 234 return rc;
235 } 235 }
236 236
237 /* stop HW */ 237 /* stop HW */
238 iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0); 238 iwl4965_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
239 239
240 iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, 0); 240 iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, 0);
241 iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_BASE_REG, 241 iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_BASE_REG,
242 rxq->dma_addr >> 8); 242 rxq->dma_addr >> 8);
243 243
244 iwl_write_direct32(priv, FH_RSCSR_CHNL0_STTS_WPTR_REG, 244 iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_STTS_WPTR_REG,
245 (priv->hw_setting.shared_phys + 245 (priv->hw_setting.shared_phys +
246 offsetof(struct iwl_shared, val0)) >> 4); 246 offsetof(struct iwl4965_shared, val0)) >> 4);
247 247
248 iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 248 iwl4965_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG,
249 FH_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL | 249 FH_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL |
250 FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL | 250 FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL |
251 IWL_FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_4K | 251 IWL_FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_4K |
@@ -254,37 +254,37 @@ static int iwl4965_rx_init(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
254 FH_RCSR_RX_CONFIG_RBDCB_SIZE_BITSHIFT)); 254 FH_RCSR_RX_CONFIG_RBDCB_SIZE_BITSHIFT));
255 255
256 /* 256 /*
257 * iwl_write32(priv,CSR_INT_COAL_REG,0); 257 * iwl4965_write32(priv,CSR_INT_COAL_REG,0);
258 */ 258 */
259 259
260 iwl_release_nic_access(priv); 260 iwl4965_release_nic_access(priv);
261 spin_unlock_irqrestore(&priv->lock, flags); 261 spin_unlock_irqrestore(&priv->lock, flags);
262 262
263 return 0; 263 return 0;
264} 264}
265 265
266static int iwl4965_kw_init(struct iwl_priv *priv) 266static int iwl4965_kw_init(struct iwl4965_priv *priv)
267{ 267{
268 unsigned long flags; 268 unsigned long flags;
269 int rc; 269 int rc;
270 270
271 spin_lock_irqsave(&priv->lock, flags); 271 spin_lock_irqsave(&priv->lock, flags);
272 rc = iwl_grab_nic_access(priv); 272 rc = iwl4965_grab_nic_access(priv);
273 if (rc) 273 if (rc)
274 goto out; 274 goto out;
275 275
276 iwl_write_direct32(priv, IWL_FH_KW_MEM_ADDR_REG, 276 iwl4965_write_direct32(priv, IWL_FH_KW_MEM_ADDR_REG,
277 priv->kw.dma_addr >> 4); 277 priv->kw.dma_addr >> 4);
278 iwl_release_nic_access(priv); 278 iwl4965_release_nic_access(priv);
279out: 279out:
280 spin_unlock_irqrestore(&priv->lock, flags); 280 spin_unlock_irqrestore(&priv->lock, flags);
281 return rc; 281 return rc;
282} 282}
283 283
284static int iwl4965_kw_alloc(struct iwl_priv *priv) 284static int iwl4965_kw_alloc(struct iwl4965_priv *priv)
285{ 285{
286 struct pci_dev *dev = priv->pci_dev; 286 struct pci_dev *dev = priv->pci_dev;
287 struct iwl_kw *kw = &priv->kw; 287 struct iwl4965_kw *kw = &priv->kw;
288 288
289 kw->size = IWL4965_KW_SIZE; /* TBW need set somewhere else */ 289 kw->size = IWL4965_KW_SIZE; /* TBW need set somewhere else */
290 kw->v_addr = pci_alloc_consistent(dev, kw->size, &kw->dma_addr); 290 kw->v_addr = pci_alloc_consistent(dev, kw->size, &kw->dma_addr);
@@ -297,14 +297,14 @@ static int iwl4965_kw_alloc(struct iwl_priv *priv)
297#define CHECK_AND_PRINT(x) ((eeprom_ch->flags & EEPROM_CHANNEL_##x) \ 297#define CHECK_AND_PRINT(x) ((eeprom_ch->flags & EEPROM_CHANNEL_##x) \
298 ? # x " " : "") 298 ? # x " " : "")
299 299
300int iwl4965_set_fat_chan_info(struct iwl_priv *priv, int phymode, u16 channel, 300int iwl4965_set_fat_chan_info(struct iwl4965_priv *priv, int phymode, u16 channel,
301 const struct iwl_eeprom_channel *eeprom_ch, 301 const struct iwl4965_eeprom_channel *eeprom_ch,
302 u8 fat_extension_channel) 302 u8 fat_extension_channel)
303{ 303{
304 struct iwl_channel_info *ch_info; 304 struct iwl4965_channel_info *ch_info;
305 305
306 ch_info = (struct iwl_channel_info *) 306 ch_info = (struct iwl4965_channel_info *)
307 iwl_get_channel_info(priv, phymode, channel); 307 iwl4965_get_channel_info(priv, phymode, channel);
308 308
309 if (!is_channel_valid(ch_info)) 309 if (!is_channel_valid(ch_info))
310 return -1; 310 return -1;
@@ -337,10 +337,10 @@ int iwl4965_set_fat_chan_info(struct iwl_priv *priv, int phymode, u16 channel,
337 return 0; 337 return 0;
338} 338}
339 339
340static void iwl4965_kw_free(struct iwl_priv *priv) 340static void iwl4965_kw_free(struct iwl4965_priv *priv)
341{ 341{
342 struct pci_dev *dev = priv->pci_dev; 342 struct pci_dev *dev = priv->pci_dev;
343 struct iwl_kw *kw = &priv->kw; 343 struct iwl4965_kw *kw = &priv->kw;
344 344
345 if (kw->v_addr) { 345 if (kw->v_addr) {
346 pci_free_consistent(dev, kw->size, kw->v_addr, kw->dma_addr); 346 pci_free_consistent(dev, kw->size, kw->v_addr, kw->dma_addr);
@@ -355,7 +355,7 @@ static void iwl4965_kw_free(struct iwl_priv *priv)
355 * @param priv 355 * @param priv
356 * @return error code 356 * @return error code
357 */ 357 */
358static int iwl4965_txq_ctx_reset(struct iwl_priv *priv) 358static int iwl4965_txq_ctx_reset(struct iwl4965_priv *priv)
359{ 359{
360 int rc = 0; 360 int rc = 0;
361 int txq_id, slots_num; 361 int txq_id, slots_num;
@@ -363,7 +363,7 @@ static int iwl4965_txq_ctx_reset(struct iwl_priv *priv)
363 363
364 iwl4965_kw_free(priv); 364 iwl4965_kw_free(priv);
365 365
366 iwl_hw_txq_ctx_free(priv); 366 iwl4965_hw_txq_ctx_free(priv);
367 367
368 /* Tx CMD queue */ 368 /* Tx CMD queue */
369 rc = iwl4965_kw_alloc(priv); 369 rc = iwl4965_kw_alloc(priv);
@@ -374,15 +374,15 @@ static int iwl4965_txq_ctx_reset(struct iwl_priv *priv)
374 374
375 spin_lock_irqsave(&priv->lock, flags); 375 spin_lock_irqsave(&priv->lock, flags);
376 376
377 rc = iwl_grab_nic_access(priv); 377 rc = iwl4965_grab_nic_access(priv);
378 if (unlikely(rc)) { 378 if (unlikely(rc)) {
379 IWL_ERROR("TX reset failed"); 379 IWL_ERROR("TX reset failed");
380 spin_unlock_irqrestore(&priv->lock, flags); 380 spin_unlock_irqrestore(&priv->lock, flags);
381 goto error_reset; 381 goto error_reset;
382 } 382 }
383 383
384 iwl_write_prph(priv, KDR_SCD_TXFACT, 0); 384 iwl4965_write_prph(priv, KDR_SCD_TXFACT, 0);
385 iwl_release_nic_access(priv); 385 iwl4965_release_nic_access(priv);
386 spin_unlock_irqrestore(&priv->lock, flags); 386 spin_unlock_irqrestore(&priv->lock, flags);
387 387
388 rc = iwl4965_kw_init(priv); 388 rc = iwl4965_kw_init(priv);
@@ -395,7 +395,7 @@ static int iwl4965_txq_ctx_reset(struct iwl_priv *priv)
395 for (txq_id = 0; txq_id < priv->hw_setting.max_txq_num; txq_id++) { 395 for (txq_id = 0; txq_id < priv->hw_setting.max_txq_num; txq_id++) {
396 slots_num = (txq_id == IWL_CMD_QUEUE_NUM) ? 396 slots_num = (txq_id == IWL_CMD_QUEUE_NUM) ?
397 TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS; 397 TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS;
398 rc = iwl_tx_queue_init(priv, &priv->txq[txq_id], slots_num, 398 rc = iwl4965_tx_queue_init(priv, &priv->txq[txq_id], slots_num,
399 txq_id); 399 txq_id);
400 if (rc) { 400 if (rc) {
401 IWL_ERROR("Tx %d queue init failed\n", txq_id); 401 IWL_ERROR("Tx %d queue init failed\n", txq_id);
@@ -406,32 +406,32 @@ static int iwl4965_txq_ctx_reset(struct iwl_priv *priv)
406 return rc; 406 return rc;
407 407
408 error: 408 error:
409 iwl_hw_txq_ctx_free(priv); 409 iwl4965_hw_txq_ctx_free(priv);
410 error_reset: 410 error_reset:
411 iwl4965_kw_free(priv); 411 iwl4965_kw_free(priv);
412 error_kw: 412 error_kw:
413 return rc; 413 return rc;
414} 414}
415 415
416int iwl_hw_nic_init(struct iwl_priv *priv) 416int iwl4965_hw_nic_init(struct iwl4965_priv *priv)
417{ 417{
418 int rc; 418 int rc;
419 unsigned long flags; 419 unsigned long flags;
420 struct iwl_rx_queue *rxq = &priv->rxq; 420 struct iwl4965_rx_queue *rxq = &priv->rxq;
421 u8 rev_id; 421 u8 rev_id;
422 u32 val; 422 u32 val;
423 u8 val_link; 423 u8 val_link;
424 424
425 iwl_power_init_handle(priv); 425 iwl4965_power_init_handle(priv);
426 426
427 /* nic_init */ 427 /* nic_init */
428 spin_lock_irqsave(&priv->lock, flags); 428 spin_lock_irqsave(&priv->lock, flags);
429 429
430 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS, 430 iwl4965_set_bit(priv, CSR_GIO_CHICKEN_BITS,
431 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER); 431 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
432 432
433 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE); 433 iwl4965_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
434 rc = iwl_poll_bit(priv, CSR_GP_CNTRL, 434 rc = iwl4965_poll_bit(priv, CSR_GP_CNTRL,
435 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 435 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
436 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000); 436 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
437 if (rc < 0) { 437 if (rc < 0) {
@@ -440,26 +440,26 @@ int iwl_hw_nic_init(struct iwl_priv *priv)
440 return rc; 440 return rc;
441 } 441 }
442 442
443 rc = iwl_grab_nic_access(priv); 443 rc = iwl4965_grab_nic_access(priv);
444 if (rc) { 444 if (rc) {
445 spin_unlock_irqrestore(&priv->lock, flags); 445 spin_unlock_irqrestore(&priv->lock, flags);
446 return rc; 446 return rc;
447 } 447 }
448 448
449 iwl_read_prph(priv, APMG_CLK_CTRL_REG); 449 iwl4965_read_prph(priv, APMG_CLK_CTRL_REG);
450 450
451 iwl_write_prph(priv, APMG_CLK_CTRL_REG, 451 iwl4965_write_prph(priv, APMG_CLK_CTRL_REG,
452 APMG_CLK_VAL_DMA_CLK_RQT | 452 APMG_CLK_VAL_DMA_CLK_RQT |
453 APMG_CLK_VAL_BSM_CLK_RQT); 453 APMG_CLK_VAL_BSM_CLK_RQT);
454 iwl_read_prph(priv, APMG_CLK_CTRL_REG); 454 iwl4965_read_prph(priv, APMG_CLK_CTRL_REG);
455 455
456 udelay(20); 456 udelay(20);
457 457
458 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG, 458 iwl4965_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
459 APMG_PCIDEV_STT_VAL_L1_ACT_DIS); 459 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
460 460
461 iwl_release_nic_access(priv); 461 iwl4965_release_nic_access(priv);
462 iwl_write32(priv, CSR_INT_COALESCING, 512 / 32); 462 iwl4965_write32(priv, CSR_INT_COALESCING, 512 / 32);
463 spin_unlock_irqrestore(&priv->lock, flags); 463 spin_unlock_irqrestore(&priv->lock, flags);
464 464
465 /* Determine HW type */ 465 /* Determine HW type */
@@ -482,7 +482,7 @@ int iwl_hw_nic_init(struct iwl_priv *priv)
482 spin_unlock_irqrestore(&priv->lock, flags); 482 spin_unlock_irqrestore(&priv->lock, flags);
483 483
484 /* Read the EEPROM */ 484 /* Read the EEPROM */
485 rc = iwl_eeprom_init(priv); 485 rc = iwl4965_eeprom_init(priv);
486 if (rc) 486 if (rc)
487 return rc; 487 return rc;
488 488
@@ -500,49 +500,49 @@ int iwl_hw_nic_init(struct iwl_priv *priv)
500 500
501 /* set CSR_HW_CONFIG_REG for uCode use */ 501 /* set CSR_HW_CONFIG_REG for uCode use */
502 502
503 iwl_set_bit(priv, CSR_SW_VER, CSR_HW_IF_CONFIG_REG_BIT_KEDRON_R | 503 iwl4965_set_bit(priv, CSR_SW_VER, CSR_HW_IF_CONFIG_REG_BIT_KEDRON_R |
504 CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI | 504 CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
505 CSR_HW_IF_CONFIG_REG_BIT_MAC_SI); 505 CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
506 506
507 rc = iwl_grab_nic_access(priv); 507 rc = iwl4965_grab_nic_access(priv);
508 if (rc < 0) { 508 if (rc < 0) {
509 spin_unlock_irqrestore(&priv->lock, flags); 509 spin_unlock_irqrestore(&priv->lock, flags);
510 IWL_DEBUG_INFO("Failed to init the card\n"); 510 IWL_DEBUG_INFO("Failed to init the card\n");
511 return rc; 511 return rc;
512 } 512 }
513 513
514 iwl_read_prph(priv, APMG_PS_CTRL_REG); 514 iwl4965_read_prph(priv, APMG_PS_CTRL_REG);
515 iwl_set_bits_prph(priv, APMG_PS_CTRL_REG, 515 iwl4965_set_bits_prph(priv, APMG_PS_CTRL_REG,
516 APMG_PS_CTRL_VAL_RESET_REQ); 516 APMG_PS_CTRL_VAL_RESET_REQ);
517 udelay(5); 517 udelay(5);
518 iwl_clear_bits_prph(priv, APMG_PS_CTRL_REG, 518 iwl4965_clear_bits_prph(priv, APMG_PS_CTRL_REG,
519 APMG_PS_CTRL_VAL_RESET_REQ); 519 APMG_PS_CTRL_VAL_RESET_REQ);
520 520
521 iwl_release_nic_access(priv); 521 iwl4965_release_nic_access(priv);
522 spin_unlock_irqrestore(&priv->lock, flags); 522 spin_unlock_irqrestore(&priv->lock, flags);
523 523
524 iwl_hw_card_show_info(priv); 524 iwl4965_hw_card_show_info(priv);
525 525
526 /* end nic_init */ 526 /* end nic_init */
527 527
528 /* Allocate the RX queue, or reset if it is already allocated */ 528 /* Allocate the RX queue, or reset if it is already allocated */
529 if (!rxq->bd) { 529 if (!rxq->bd) {
530 rc = iwl_rx_queue_alloc(priv); 530 rc = iwl4965_rx_queue_alloc(priv);
531 if (rc) { 531 if (rc) {
532 IWL_ERROR("Unable to initialize Rx queue\n"); 532 IWL_ERROR("Unable to initialize Rx queue\n");
533 return -ENOMEM; 533 return -ENOMEM;
534 } 534 }
535 } else 535 } else
536 iwl_rx_queue_reset(priv, rxq); 536 iwl4965_rx_queue_reset(priv, rxq);
537 537
538 iwl_rx_replenish(priv); 538 iwl4965_rx_replenish(priv);
539 539
540 iwl4965_rx_init(priv, rxq); 540 iwl4965_rx_init(priv, rxq);
541 541
542 spin_lock_irqsave(&priv->lock, flags); 542 spin_lock_irqsave(&priv->lock, flags);
543 543
544 rxq->need_update = 1; 544 rxq->need_update = 1;
545 iwl_rx_queue_update_write_ptr(priv, rxq); 545 iwl4965_rx_queue_update_write_ptr(priv, rxq);
546 546
547 spin_unlock_irqrestore(&priv->lock, flags); 547 spin_unlock_irqrestore(&priv->lock, flags);
548 rc = iwl4965_txq_ctx_reset(priv); 548 rc = iwl4965_txq_ctx_reset(priv);
@@ -560,7 +560,7 @@ int iwl_hw_nic_init(struct iwl_priv *priv)
560 return 0; 560 return 0;
561} 561}
562 562
563int iwl_hw_nic_stop_master(struct iwl_priv *priv) 563int iwl4965_hw_nic_stop_master(struct iwl4965_priv *priv)
564{ 564{
565 int rc = 0; 565 int rc = 0;
566 u32 reg_val; 566 u32 reg_val;
@@ -569,16 +569,16 @@ int iwl_hw_nic_stop_master(struct iwl_priv *priv)
569 spin_lock_irqsave(&priv->lock, flags); 569 spin_lock_irqsave(&priv->lock, flags);
570 570
571 /* set stop master bit */ 571 /* set stop master bit */
572 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER); 572 iwl4965_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
573 573
574 reg_val = iwl_read32(priv, CSR_GP_CNTRL); 574 reg_val = iwl4965_read32(priv, CSR_GP_CNTRL);
575 575
576 if (CSR_GP_CNTRL_REG_FLAG_MAC_POWER_SAVE == 576 if (CSR_GP_CNTRL_REG_FLAG_MAC_POWER_SAVE ==
577 (reg_val & CSR_GP_CNTRL_REG_MSK_POWER_SAVE_TYPE)) 577 (reg_val & CSR_GP_CNTRL_REG_MSK_POWER_SAVE_TYPE))
578 IWL_DEBUG_INFO("Card in power save, master is already " 578 IWL_DEBUG_INFO("Card in power save, master is already "
579 "stopped\n"); 579 "stopped\n");
580 else { 580 else {
581 rc = iwl_poll_bit(priv, CSR_RESET, 581 rc = iwl4965_poll_bit(priv, CSR_RESET,
582 CSR_RESET_REG_FLAG_MASTER_DISABLED, 582 CSR_RESET_REG_FLAG_MASTER_DISABLED,
583 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100); 583 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
584 if (rc < 0) { 584 if (rc < 0) {
@@ -593,7 +593,7 @@ int iwl_hw_nic_stop_master(struct iwl_priv *priv)
593 return rc; 593 return rc;
594} 594}
595 595
596void iwl_hw_txq_ctx_stop(struct iwl_priv *priv) 596void iwl4965_hw_txq_ctx_stop(struct iwl4965_priv *priv)
597{ 597{
598 598
599 int txq_id; 599 int txq_id;
@@ -602,56 +602,56 @@ void iwl_hw_txq_ctx_stop(struct iwl_priv *priv)
602 /* reset TFD queues */ 602 /* reset TFD queues */
603 for (txq_id = 0; txq_id < priv->hw_setting.max_txq_num; txq_id++) { 603 for (txq_id = 0; txq_id < priv->hw_setting.max_txq_num; txq_id++) {
604 spin_lock_irqsave(&priv->lock, flags); 604 spin_lock_irqsave(&priv->lock, flags);
605 if (iwl_grab_nic_access(priv)) { 605 if (iwl4965_grab_nic_access(priv)) {
606 spin_unlock_irqrestore(&priv->lock, flags); 606 spin_unlock_irqrestore(&priv->lock, flags);
607 continue; 607 continue;
608 } 608 }
609 609
610 iwl_write_direct32(priv, 610 iwl4965_write_direct32(priv,
611 IWL_FH_TCSR_CHNL_TX_CONFIG_REG(txq_id), 611 IWL_FH_TCSR_CHNL_TX_CONFIG_REG(txq_id),
612 0x0); 612 0x0);
613 iwl_poll_direct_bit(priv, IWL_FH_TSSR_TX_STATUS_REG, 613 iwl4965_poll_direct_bit(priv, IWL_FH_TSSR_TX_STATUS_REG,
614 IWL_FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE 614 IWL_FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE
615 (txq_id), 200); 615 (txq_id), 200);
616 iwl_release_nic_access(priv); 616 iwl4965_release_nic_access(priv);
617 spin_unlock_irqrestore(&priv->lock, flags); 617 spin_unlock_irqrestore(&priv->lock, flags);
618 } 618 }
619 619
620 iwl_hw_txq_ctx_free(priv); 620 iwl4965_hw_txq_ctx_free(priv);
621} 621}
622 622
623int iwl_hw_nic_reset(struct iwl_priv *priv) 623int iwl4965_hw_nic_reset(struct iwl4965_priv *priv)
624{ 624{
625 int rc = 0; 625 int rc = 0;
626 unsigned long flags; 626 unsigned long flags;
627 627
628 iwl_hw_nic_stop_master(priv); 628 iwl4965_hw_nic_stop_master(priv);
629 629
630 spin_lock_irqsave(&priv->lock, flags); 630 spin_lock_irqsave(&priv->lock, flags);
631 631
632 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET); 632 iwl4965_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
633 633
634 udelay(10); 634 udelay(10);
635 635
636 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE); 636 iwl4965_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
637 rc = iwl_poll_bit(priv, CSR_RESET, 637 rc = iwl4965_poll_bit(priv, CSR_RESET,
638 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 638 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
639 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25); 639 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25);
640 640
641 udelay(10); 641 udelay(10);
642 642
643 rc = iwl_grab_nic_access(priv); 643 rc = iwl4965_grab_nic_access(priv);
644 if (!rc) { 644 if (!rc) {
645 iwl_write_prph(priv, APMG_CLK_EN_REG, 645 iwl4965_write_prph(priv, APMG_CLK_EN_REG,
646 APMG_CLK_VAL_DMA_CLK_RQT | 646 APMG_CLK_VAL_DMA_CLK_RQT |
647 APMG_CLK_VAL_BSM_CLK_RQT); 647 APMG_CLK_VAL_BSM_CLK_RQT);
648 648
649 udelay(10); 649 udelay(10);
650 650
651 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG, 651 iwl4965_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
652 APMG_PCIDEV_STT_VAL_L1_ACT_DIS); 652 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
653 653
654 iwl_release_nic_access(priv); 654 iwl4965_release_nic_access(priv);
655 } 655 }
656 656
657 clear_bit(STATUS_HCMD_ACTIVE, &priv->status); 657 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
@@ -681,7 +681,7 @@ int iwl_hw_nic_reset(struct iwl_priv *priv)
681 */ 681 */
682static void iwl4965_bg_statistics_periodic(unsigned long data) 682static void iwl4965_bg_statistics_periodic(unsigned long data)
683{ 683{
684 struct iwl_priv *priv = (struct iwl_priv *)data; 684 struct iwl4965_priv *priv = (struct iwl4965_priv *)data;
685 685
686 queue_work(priv->workqueue, &priv->statistics_work); 686 queue_work(priv->workqueue, &priv->statistics_work);
687} 687}
@@ -689,27 +689,27 @@ static void iwl4965_bg_statistics_periodic(unsigned long data)
689/** 689/**
690 * iwl4965_bg_statistics_work - Send the statistics request to the hardware. 690 * iwl4965_bg_statistics_work - Send the statistics request to the hardware.
691 * 691 *
692 * This is queued by iwl_bg_statistics_periodic. 692 * This is queued by iwl4965_bg_statistics_periodic.
693 */ 693 */
694static void iwl4965_bg_statistics_work(struct work_struct *work) 694static void iwl4965_bg_statistics_work(struct work_struct *work)
695{ 695{
696 struct iwl_priv *priv = container_of(work, struct iwl_priv, 696 struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv,
697 statistics_work); 697 statistics_work);
698 698
699 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) 699 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
700 return; 700 return;
701 701
702 mutex_lock(&priv->mutex); 702 mutex_lock(&priv->mutex);
703 iwl_send_statistics_request(priv); 703 iwl4965_send_statistics_request(priv);
704 mutex_unlock(&priv->mutex); 704 mutex_unlock(&priv->mutex);
705} 705}
706 706
707#define CT_LIMIT_CONST 259 707#define CT_LIMIT_CONST 259
708#define TM_CT_KILL_THRESHOLD 110 708#define TM_CT_KILL_THRESHOLD 110
709 709
710void iwl4965_rf_kill_ct_config(struct iwl_priv *priv) 710void iwl4965_rf_kill_ct_config(struct iwl4965_priv *priv)
711{ 711{
712 struct iwl_ct_kill_config cmd; 712 struct iwl4965_ct_kill_config cmd;
713 u32 R1, R2, R3; 713 u32 R1, R2, R3;
714 u32 temp_th; 714 u32 temp_th;
715 u32 crit_temperature; 715 u32 crit_temperature;
@@ -717,7 +717,7 @@ void iwl4965_rf_kill_ct_config(struct iwl_priv *priv)
717 int rc = 0; 717 int rc = 0;
718 718
719 spin_lock_irqsave(&priv->lock, flags); 719 spin_lock_irqsave(&priv->lock, flags);
720 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, 720 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
721 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT); 721 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
722 spin_unlock_irqrestore(&priv->lock, flags); 722 spin_unlock_irqrestore(&priv->lock, flags);
723 723
@@ -735,7 +735,7 @@ void iwl4965_rf_kill_ct_config(struct iwl_priv *priv)
735 735
736 crit_temperature = ((temp_th * (R3-R1))/CT_LIMIT_CONST) + R2; 736 crit_temperature = ((temp_th * (R3-R1))/CT_LIMIT_CONST) + R2;
737 cmd.critical_temperature_R = cpu_to_le32(crit_temperature); 737 cmd.critical_temperature_R = cpu_to_le32(crit_temperature);
738 rc = iwl_send_cmd_pdu(priv, 738 rc = iwl4965_send_cmd_pdu(priv,
739 REPLY_CT_KILL_CONFIG_CMD, sizeof(cmd), &cmd); 739 REPLY_CT_KILL_CONFIG_CMD, sizeof(cmd), &cmd);
740 if (rc) 740 if (rc)
741 IWL_ERROR("REPLY_CT_KILL_CONFIG_CMD failed\n"); 741 IWL_ERROR("REPLY_CT_KILL_CONFIG_CMD failed\n");
@@ -753,7 +753,7 @@ void iwl4965_rf_kill_ct_config(struct iwl_priv *priv)
753 * enough to receive all of our own network traffic, but not so 753 * enough to receive all of our own network traffic, but not so
754 * high that our DSP gets too busy trying to lock onto non-network 754 * high that our DSP gets too busy trying to lock onto non-network
755 * activity/noise. */ 755 * activity/noise. */
756static int iwl4965_sens_energy_cck(struct iwl_priv *priv, 756static int iwl4965_sens_energy_cck(struct iwl4965_priv *priv,
757 u32 norm_fa, 757 u32 norm_fa,
758 u32 rx_enable_time, 758 u32 rx_enable_time,
759 struct statistics_general_data *rx_info) 759 struct statistics_general_data *rx_info)
@@ -779,7 +779,7 @@ static int iwl4965_sens_energy_cck(struct iwl_priv *priv,
779 u32 false_alarms = norm_fa * 200 * 1024; 779 u32 false_alarms = norm_fa * 200 * 1024;
780 u32 max_false_alarms = MAX_FA_CCK * rx_enable_time; 780 u32 max_false_alarms = MAX_FA_CCK * rx_enable_time;
781 u32 min_false_alarms = MIN_FA_CCK * rx_enable_time; 781 u32 min_false_alarms = MIN_FA_CCK * rx_enable_time;
782 struct iwl_sensitivity_data *data = NULL; 782 struct iwl4965_sensitivity_data *data = NULL;
783 783
784 data = &(priv->sensitivity_data); 784 data = &(priv->sensitivity_data);
785 785
@@ -944,7 +944,7 @@ static int iwl4965_sens_energy_cck(struct iwl_priv *priv,
944} 944}
945 945
946 946
947static int iwl4965_sens_auto_corr_ofdm(struct iwl_priv *priv, 947static int iwl4965_sens_auto_corr_ofdm(struct iwl4965_priv *priv,
948 u32 norm_fa, 948 u32 norm_fa,
949 u32 rx_enable_time) 949 u32 rx_enable_time)
950{ 950{
@@ -952,7 +952,7 @@ static int iwl4965_sens_auto_corr_ofdm(struct iwl_priv *priv,
952 u32 false_alarms = norm_fa * 200 * 1024; 952 u32 false_alarms = norm_fa * 200 * 1024;
953 u32 max_false_alarms = MAX_FA_OFDM * rx_enable_time; 953 u32 max_false_alarms = MAX_FA_OFDM * rx_enable_time;
954 u32 min_false_alarms = MIN_FA_OFDM * rx_enable_time; 954 u32 min_false_alarms = MIN_FA_OFDM * rx_enable_time;
955 struct iwl_sensitivity_data *data = NULL; 955 struct iwl4965_sensitivity_data *data = NULL;
956 956
957 data = &(priv->sensitivity_data); 957 data = &(priv->sensitivity_data);
958 958
@@ -1009,22 +1009,22 @@ static int iwl4965_sens_auto_corr_ofdm(struct iwl_priv *priv,
1009 return 0; 1009 return 0;
1010} 1010}
1011 1011
1012static int iwl_sensitivity_callback(struct iwl_priv *priv, 1012static int iwl4965_sensitivity_callback(struct iwl4965_priv *priv,
1013 struct iwl_cmd *cmd, struct sk_buff *skb) 1013 struct iwl4965_cmd *cmd, struct sk_buff *skb)
1014{ 1014{
1015 /* We didn't cache the SKB; let the caller free it */ 1015 /* We didn't cache the SKB; let the caller free it */
1016 return 1; 1016 return 1;
1017} 1017}
1018 1018
1019/* Prepare a SENSITIVITY_CMD, send to uCode if values have changed */ 1019/* Prepare a SENSITIVITY_CMD, send to uCode if values have changed */
1020static int iwl4965_sensitivity_write(struct iwl_priv *priv, u8 flags) 1020static int iwl4965_sensitivity_write(struct iwl4965_priv *priv, u8 flags)
1021{ 1021{
1022 int rc = 0; 1022 int rc = 0;
1023 struct iwl_sensitivity_cmd cmd ; 1023 struct iwl4965_sensitivity_cmd cmd ;
1024 struct iwl_sensitivity_data *data = NULL; 1024 struct iwl4965_sensitivity_data *data = NULL;
1025 struct iwl_host_cmd cmd_out = { 1025 struct iwl4965_host_cmd cmd_out = {
1026 .id = SENSITIVITY_CMD, 1026 .id = SENSITIVITY_CMD,
1027 .len = sizeof(struct iwl_sensitivity_cmd), 1027 .len = sizeof(struct iwl4965_sensitivity_cmd),
1028 .meta.flags = flags, 1028 .meta.flags = flags,
1029 .data = &cmd, 1029 .data = &cmd,
1030 }; 1030 };
@@ -1071,7 +1071,7 @@ static int iwl4965_sensitivity_write(struct iwl_priv *priv, u8 flags)
1071 cmd.control = SENSITIVITY_CMD_CONTROL_WORK_TABLE; 1071 cmd.control = SENSITIVITY_CMD_CONTROL_WORK_TABLE;
1072 1072
1073 if (flags & CMD_ASYNC) 1073 if (flags & CMD_ASYNC)
1074 cmd_out.meta.u.callback = iwl_sensitivity_callback; 1074 cmd_out.meta.u.callback = iwl4965_sensitivity_callback;
1075 1075
1076 /* Don't send command to uCode if nothing has changed */ 1076 /* Don't send command to uCode if nothing has changed */
1077 if (!memcmp(&cmd.table[0], &(priv->sensitivity_tbl[0]), 1077 if (!memcmp(&cmd.table[0], &(priv->sensitivity_tbl[0]),
@@ -1084,7 +1084,7 @@ static int iwl4965_sensitivity_write(struct iwl_priv *priv, u8 flags)
1084 memcpy(&(priv->sensitivity_tbl[0]), &(cmd.table[0]), 1084 memcpy(&(priv->sensitivity_tbl[0]), &(cmd.table[0]),
1085 sizeof(u16)*HD_TABLE_SIZE); 1085 sizeof(u16)*HD_TABLE_SIZE);
1086 1086
1087 rc = iwl_send_cmd(priv, &cmd_out); 1087 rc = iwl4965_send_cmd(priv, &cmd_out);
1088 if (!rc) { 1088 if (!rc) {
1089 IWL_DEBUG_CALIB("SENSITIVITY_CMD succeeded\n"); 1089 IWL_DEBUG_CALIB("SENSITIVITY_CMD succeeded\n");
1090 return rc; 1090 return rc;
@@ -1093,11 +1093,11 @@ static int iwl4965_sensitivity_write(struct iwl_priv *priv, u8 flags)
1093 return 0; 1093 return 0;
1094} 1094}
1095 1095
1096void iwl4965_init_sensitivity(struct iwl_priv *priv, u8 flags, u8 force) 1096void iwl4965_init_sensitivity(struct iwl4965_priv *priv, u8 flags, u8 force)
1097{ 1097{
1098 int rc = 0; 1098 int rc = 0;
1099 int i; 1099 int i;
1100 struct iwl_sensitivity_data *data = NULL; 1100 struct iwl4965_sensitivity_data *data = NULL;
1101 1101
1102 IWL_DEBUG_CALIB("Start iwl4965_init_sensitivity\n"); 1102 IWL_DEBUG_CALIB("Start iwl4965_init_sensitivity\n");
1103 1103
@@ -1107,7 +1107,7 @@ void iwl4965_init_sensitivity(struct iwl_priv *priv, u8 flags, u8 force)
1107 1107
1108 /* Clear driver's sensitivity algo data */ 1108 /* Clear driver's sensitivity algo data */
1109 data = &(priv->sensitivity_data); 1109 data = &(priv->sensitivity_data);
1110 memset(data, 0, sizeof(struct iwl_sensitivity_data)); 1110 memset(data, 0, sizeof(struct iwl4965_sensitivity_data));
1111 1111
1112 data->num_in_cck_no_fa = 0; 1112 data->num_in_cck_no_fa = 0;
1113 data->nrg_curr_state = IWL_FA_TOO_MANY; 1113 data->nrg_curr_state = IWL_FA_TOO_MANY;
@@ -1151,21 +1151,21 @@ void iwl4965_init_sensitivity(struct iwl_priv *priv, u8 flags, u8 force)
1151/* Reset differential Rx gains in NIC to prepare for chain noise calibration. 1151/* Reset differential Rx gains in NIC to prepare for chain noise calibration.
1152 * Called after every association, but this runs only once! 1152 * Called after every association, but this runs only once!
1153 * ... once chain noise is calibrated the first time, it's good forever. */ 1153 * ... once chain noise is calibrated the first time, it's good forever. */
1154void iwl4965_chain_noise_reset(struct iwl_priv *priv) 1154void iwl4965_chain_noise_reset(struct iwl4965_priv *priv)
1155{ 1155{
1156 struct iwl_chain_noise_data *data = NULL; 1156 struct iwl4965_chain_noise_data *data = NULL;
1157 int rc = 0; 1157 int rc = 0;
1158 1158
1159 data = &(priv->chain_noise_data); 1159 data = &(priv->chain_noise_data);
1160 if ((data->state == IWL_CHAIN_NOISE_ALIVE) && iwl_is_associated(priv)) { 1160 if ((data->state == IWL_CHAIN_NOISE_ALIVE) && iwl4965_is_associated(priv)) {
1161 struct iwl_calibration_cmd cmd; 1161 struct iwl4965_calibration_cmd cmd;
1162 1162
1163 memset(&cmd, 0, sizeof(cmd)); 1163 memset(&cmd, 0, sizeof(cmd));
1164 cmd.opCode = PHY_CALIBRATE_DIFF_GAIN_CMD; 1164 cmd.opCode = PHY_CALIBRATE_DIFF_GAIN_CMD;
1165 cmd.diff_gain_a = 0; 1165 cmd.diff_gain_a = 0;
1166 cmd.diff_gain_b = 0; 1166 cmd.diff_gain_b = 0;
1167 cmd.diff_gain_c = 0; 1167 cmd.diff_gain_c = 0;
1168 rc = iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD, 1168 rc = iwl4965_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
1169 sizeof(cmd), &cmd); 1169 sizeof(cmd), &cmd);
1170 msleep(4); 1170 msleep(4);
1171 data->state = IWL_CHAIN_NOISE_ACCUMULATE; 1171 data->state = IWL_CHAIN_NOISE_ACCUMULATE;
@@ -1180,10 +1180,10 @@ void iwl4965_chain_noise_reset(struct iwl_priv *priv)
1180 * 1) Which antennas are connected. 1180 * 1) Which antennas are connected.
1181 * 2) Differential rx gain settings to balance the 3 receivers. 1181 * 2) Differential rx gain settings to balance the 3 receivers.
1182 */ 1182 */
1183static void iwl4965_noise_calibration(struct iwl_priv *priv, 1183static void iwl4965_noise_calibration(struct iwl4965_priv *priv,
1184 struct iwl_notif_statistics *stat_resp) 1184 struct iwl4965_notif_statistics *stat_resp)
1185{ 1185{
1186 struct iwl_chain_noise_data *data = NULL; 1186 struct iwl4965_chain_noise_data *data = NULL;
1187 int rc = 0; 1187 int rc = 0;
1188 1188
1189 u32 chain_noise_a; 1189 u32 chain_noise_a;
@@ -1382,7 +1382,7 @@ static void iwl4965_noise_calibration(struct iwl_priv *priv,
1382 1382
1383 /* Differential gain gets sent to uCode only once */ 1383 /* Differential gain gets sent to uCode only once */
1384 if (!data->radio_write) { 1384 if (!data->radio_write) {
1385 struct iwl_calibration_cmd cmd; 1385 struct iwl4965_calibration_cmd cmd;
1386 data->radio_write = 1; 1386 data->radio_write = 1;
1387 1387
1388 memset(&cmd, 0, sizeof(cmd)); 1388 memset(&cmd, 0, sizeof(cmd));
@@ -1390,7 +1390,7 @@ static void iwl4965_noise_calibration(struct iwl_priv *priv,
1390 cmd.diff_gain_a = data->delta_gain_code[0]; 1390 cmd.diff_gain_a = data->delta_gain_code[0];
1391 cmd.diff_gain_b = data->delta_gain_code[1]; 1391 cmd.diff_gain_b = data->delta_gain_code[1];
1392 cmd.diff_gain_c = data->delta_gain_code[2]; 1392 cmd.diff_gain_c = data->delta_gain_code[2];
1393 rc = iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD, 1393 rc = iwl4965_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
1394 sizeof(cmd), &cmd); 1394 sizeof(cmd), &cmd);
1395 if (rc) 1395 if (rc)
1396 IWL_DEBUG_CALIB("fail sending cmd " 1396 IWL_DEBUG_CALIB("fail sending cmd "
@@ -1413,8 +1413,8 @@ static void iwl4965_noise_calibration(struct iwl_priv *priv,
1413 return; 1413 return;
1414} 1414}
1415 1415
1416static void iwl4965_sensitivity_calibration(struct iwl_priv *priv, 1416static void iwl4965_sensitivity_calibration(struct iwl4965_priv *priv,
1417 struct iwl_notif_statistics *resp) 1417 struct iwl4965_notif_statistics *resp)
1418{ 1418{
1419 int rc = 0; 1419 int rc = 0;
1420 u32 rx_enable_time; 1420 u32 rx_enable_time;
@@ -1424,7 +1424,7 @@ static void iwl4965_sensitivity_calibration(struct iwl_priv *priv,
1424 u32 bad_plcp_ofdm; 1424 u32 bad_plcp_ofdm;
1425 u32 norm_fa_ofdm; 1425 u32 norm_fa_ofdm;
1426 u32 norm_fa_cck; 1426 u32 norm_fa_cck;
1427 struct iwl_sensitivity_data *data = NULL; 1427 struct iwl4965_sensitivity_data *data = NULL;
1428 struct statistics_rx_non_phy *rx_info = &(resp->rx.general); 1428 struct statistics_rx_non_phy *rx_info = &(resp->rx.general);
1429 struct statistics_rx *statistics = &(resp->rx); 1429 struct statistics_rx *statistics = &(resp->rx);
1430 unsigned long flags; 1430 unsigned long flags;
@@ -1432,7 +1432,7 @@ static void iwl4965_sensitivity_calibration(struct iwl_priv *priv,
1432 1432
1433 data = &(priv->sensitivity_data); 1433 data = &(priv->sensitivity_data);
1434 1434
1435 if (!iwl_is_associated(priv)) { 1435 if (!iwl4965_is_associated(priv)) {
1436 IWL_DEBUG_CALIB("<< - not associated\n"); 1436 IWL_DEBUG_CALIB("<< - not associated\n");
1437 return; 1437 return;
1438 } 1438 }
@@ -1520,7 +1520,7 @@ static void iwl4965_sensitivity_calibration(struct iwl_priv *priv,
1520 1520
1521static void iwl4965_bg_sensitivity_work(struct work_struct *work) 1521static void iwl4965_bg_sensitivity_work(struct work_struct *work)
1522{ 1522{
1523 struct iwl_priv *priv = container_of(work, struct iwl_priv, 1523 struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv,
1524 sensitivity_work); 1524 sensitivity_work);
1525 1525
1526 mutex_lock(&priv->mutex); 1526 mutex_lock(&priv->mutex);
@@ -1550,7 +1550,7 @@ static void iwl4965_bg_sensitivity_work(struct work_struct *work)
1550 1550
1551static void iwl4965_bg_txpower_work(struct work_struct *work) 1551static void iwl4965_bg_txpower_work(struct work_struct *work)
1552{ 1552{
1553 struct iwl_priv *priv = container_of(work, struct iwl_priv, 1553 struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv,
1554 txpower_work); 1554 txpower_work);
1555 1555
1556 /* If a scan happened to start before we got here 1556 /* If a scan happened to start before we got here
@@ -1566,7 +1566,7 @@ static void iwl4965_bg_txpower_work(struct work_struct *work)
1566 /* Regardless of if we are assocaited, we must reconfigure the 1566 /* Regardless of if we are assocaited, we must reconfigure the
1567 * TX power since frames can be sent on non-radar channels while 1567 * TX power since frames can be sent on non-radar channels while
1568 * not associated */ 1568 * not associated */
1569 iwl_hw_reg_send_txpower(priv); 1569 iwl4965_hw_reg_send_txpower(priv);
1570 1570
1571 /* Update last_temperature to keep is_calib_needed from running 1571 /* Update last_temperature to keep is_calib_needed from running
1572 * when it isn't needed... */ 1572 * when it isn't needed... */
@@ -1578,24 +1578,24 @@ static void iwl4965_bg_txpower_work(struct work_struct *work)
1578/* 1578/*
1579 * Acquire priv->lock before calling this function ! 1579 * Acquire priv->lock before calling this function !
1580 */ 1580 */
1581static void iwl4965_set_wr_ptrs(struct iwl_priv *priv, int txq_id, u32 index) 1581static void iwl4965_set_wr_ptrs(struct iwl4965_priv *priv, int txq_id, u32 index)
1582{ 1582{
1583 iwl_write_direct32(priv, HBUS_TARG_WRPTR, 1583 iwl4965_write_direct32(priv, HBUS_TARG_WRPTR,
1584 (index & 0xff) | (txq_id << 8)); 1584 (index & 0xff) | (txq_id << 8));
1585 iwl_write_prph(priv, KDR_SCD_QUEUE_RDPTR(txq_id), index); 1585 iwl4965_write_prph(priv, KDR_SCD_QUEUE_RDPTR(txq_id), index);
1586} 1586}
1587 1587
1588/* 1588/*
1589 * Acquire priv->lock before calling this function ! 1589 * Acquire priv->lock before calling this function !
1590 */ 1590 */
1591static void iwl4965_tx_queue_set_status(struct iwl_priv *priv, 1591static void iwl4965_tx_queue_set_status(struct iwl4965_priv *priv,
1592 struct iwl_tx_queue *txq, 1592 struct iwl4965_tx_queue *txq,
1593 int tx_fifo_id, int scd_retry) 1593 int tx_fifo_id, int scd_retry)
1594{ 1594{
1595 int txq_id = txq->q.id; 1595 int txq_id = txq->q.id;
1596 int active = test_bit(txq_id, &priv->txq_ctx_active_msk)?1:0; 1596 int active = test_bit(txq_id, &priv->txq_ctx_active_msk)?1:0;
1597 1597
1598 iwl_write_prph(priv, KDR_SCD_QUEUE_STATUS_BITS(txq_id), 1598 iwl4965_write_prph(priv, KDR_SCD_QUEUE_STATUS_BITS(txq_id),
1599 (active << SCD_QUEUE_STTS_REG_POS_ACTIVE) | 1599 (active << SCD_QUEUE_STTS_REG_POS_ACTIVE) |
1600 (tx_fifo_id << SCD_QUEUE_STTS_REG_POS_TXF) | 1600 (tx_fifo_id << SCD_QUEUE_STTS_REG_POS_TXF) |
1601 (scd_retry << SCD_QUEUE_STTS_REG_POS_WSL) | 1601 (scd_retry << SCD_QUEUE_STTS_REG_POS_WSL) |
@@ -1619,17 +1619,17 @@ static const u16 default_queue_to_tx_fifo[] = {
1619 IWL_TX_FIFO_HCCA_2 1619 IWL_TX_FIFO_HCCA_2
1620}; 1620};
1621 1621
1622static inline void iwl4965_txq_ctx_activate(struct iwl_priv *priv, int txq_id) 1622static inline void iwl4965_txq_ctx_activate(struct iwl4965_priv *priv, int txq_id)
1623{ 1623{
1624 set_bit(txq_id, &priv->txq_ctx_active_msk); 1624 set_bit(txq_id, &priv->txq_ctx_active_msk);
1625} 1625}
1626 1626
1627static inline void iwl4965_txq_ctx_deactivate(struct iwl_priv *priv, int txq_id) 1627static inline void iwl4965_txq_ctx_deactivate(struct iwl4965_priv *priv, int txq_id)
1628{ 1628{
1629 clear_bit(txq_id, &priv->txq_ctx_active_msk); 1629 clear_bit(txq_id, &priv->txq_ctx_active_msk);
1630} 1630}
1631 1631
1632int iwl4965_alive_notify(struct iwl_priv *priv) 1632int iwl4965_alive_notify(struct iwl4965_priv *priv)
1633{ 1633{
1634 u32 a; 1634 u32 a;
1635 int i = 0; 1635 int i = 0;
@@ -1640,43 +1640,43 @@ int iwl4965_alive_notify(struct iwl_priv *priv)
1640 1640
1641#ifdef CONFIG_IWL4965_SENSITIVITY 1641#ifdef CONFIG_IWL4965_SENSITIVITY
1642 memset(&(priv->sensitivity_data), 0, 1642 memset(&(priv->sensitivity_data), 0,
1643 sizeof(struct iwl_sensitivity_data)); 1643 sizeof(struct iwl4965_sensitivity_data));
1644 memset(&(priv->chain_noise_data), 0, 1644 memset(&(priv->chain_noise_data), 0,
1645 sizeof(struct iwl_chain_noise_data)); 1645 sizeof(struct iwl4965_chain_noise_data));
1646 for (i = 0; i < NUM_RX_CHAINS; i++) 1646 for (i = 0; i < NUM_RX_CHAINS; i++)
1647 priv->chain_noise_data.delta_gain_code[i] = 1647 priv->chain_noise_data.delta_gain_code[i] =
1648 CHAIN_NOISE_DELTA_GAIN_INIT_VAL; 1648 CHAIN_NOISE_DELTA_GAIN_INIT_VAL;
1649#endif /* CONFIG_IWL4965_SENSITIVITY*/ 1649#endif /* CONFIG_IWL4965_SENSITIVITY*/
1650 rc = iwl_grab_nic_access(priv); 1650 rc = iwl4965_grab_nic_access(priv);
1651 if (rc) { 1651 if (rc) {
1652 spin_unlock_irqrestore(&priv->lock, flags); 1652 spin_unlock_irqrestore(&priv->lock, flags);
1653 return rc; 1653 return rc;
1654 } 1654 }
1655 1655
1656 priv->scd_base_addr = iwl_read_prph(priv, KDR_SCD_SRAM_BASE_ADDR); 1656 priv->scd_base_addr = iwl4965_read_prph(priv, KDR_SCD_SRAM_BASE_ADDR);
1657 a = priv->scd_base_addr + SCD_CONTEXT_DATA_OFFSET; 1657 a = priv->scd_base_addr + SCD_CONTEXT_DATA_OFFSET;
1658 for (; a < priv->scd_base_addr + SCD_TX_STTS_BITMAP_OFFSET; a += 4) 1658 for (; a < priv->scd_base_addr + SCD_TX_STTS_BITMAP_OFFSET; a += 4)
1659 iwl_write_targ_mem(priv, a, 0); 1659 iwl4965_write_targ_mem(priv, a, 0);
1660 for (; a < priv->scd_base_addr + SCD_TRANSLATE_TBL_OFFSET; a += 4) 1660 for (; a < priv->scd_base_addr + SCD_TRANSLATE_TBL_OFFSET; a += 4)
1661 iwl_write_targ_mem(priv, a, 0); 1661 iwl4965_write_targ_mem(priv, a, 0);
1662 for (; a < sizeof(u16) * priv->hw_setting.max_txq_num; a += 4) 1662 for (; a < sizeof(u16) * priv->hw_setting.max_txq_num; a += 4)
1663 iwl_write_targ_mem(priv, a, 0); 1663 iwl4965_write_targ_mem(priv, a, 0);
1664 1664
1665 iwl_write_prph(priv, KDR_SCD_DRAM_BASE_ADDR, 1665 iwl4965_write_prph(priv, KDR_SCD_DRAM_BASE_ADDR,
1666 (priv->hw_setting.shared_phys + 1666 (priv->hw_setting.shared_phys +
1667 offsetof(struct iwl_shared, queues_byte_cnt_tbls)) >> 10); 1667 offsetof(struct iwl4965_shared, queues_byte_cnt_tbls)) >> 10);
1668 iwl_write_prph(priv, KDR_SCD_QUEUECHAIN_SEL, 0); 1668 iwl4965_write_prph(priv, KDR_SCD_QUEUECHAIN_SEL, 0);
1669 1669
1670 /* initiate the queues */ 1670 /* initiate the queues */
1671 for (i = 0; i < priv->hw_setting.max_txq_num; i++) { 1671 for (i = 0; i < priv->hw_setting.max_txq_num; i++) {
1672 iwl_write_prph(priv, KDR_SCD_QUEUE_RDPTR(i), 0); 1672 iwl4965_write_prph(priv, KDR_SCD_QUEUE_RDPTR(i), 0);
1673 iwl_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8)); 1673 iwl4965_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
1674 iwl_write_targ_mem(priv, priv->scd_base_addr + 1674 iwl4965_write_targ_mem(priv, priv->scd_base_addr +
1675 SCD_CONTEXT_QUEUE_OFFSET(i), 1675 SCD_CONTEXT_QUEUE_OFFSET(i),
1676 (SCD_WIN_SIZE << 1676 (SCD_WIN_SIZE <<
1677 SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) & 1677 SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
1678 SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK); 1678 SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
1679 iwl_write_targ_mem(priv, priv->scd_base_addr + 1679 iwl4965_write_targ_mem(priv, priv->scd_base_addr +
1680 SCD_CONTEXT_QUEUE_OFFSET(i) + 1680 SCD_CONTEXT_QUEUE_OFFSET(i) +
1681 sizeof(u32), 1681 sizeof(u32),
1682 (SCD_FRAME_LIMIT << 1682 (SCD_FRAME_LIMIT <<
@@ -1684,10 +1684,10 @@ int iwl4965_alive_notify(struct iwl_priv *priv)
1684 SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK); 1684 SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
1685 1685
1686 } 1686 }
1687 iwl_write_prph(priv, KDR_SCD_INTERRUPT_MASK, 1687 iwl4965_write_prph(priv, KDR_SCD_INTERRUPT_MASK,
1688 (1 << priv->hw_setting.max_txq_num) - 1); 1688 (1 << priv->hw_setting.max_txq_num) - 1);
1689 1689
1690 iwl_write_prph(priv, KDR_SCD_TXFACT, 1690 iwl4965_write_prph(priv, KDR_SCD_TXFACT,
1691 SCD_TXFACT_REG_TXFIFO_MASK(0, 7)); 1691 SCD_TXFACT_REG_TXFIFO_MASK(0, 7));
1692 1692
1693 iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0); 1693 iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0);
@@ -1698,27 +1698,27 @@ int iwl4965_alive_notify(struct iwl_priv *priv)
1698 iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0); 1698 iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0);
1699 } 1699 }
1700 1700
1701 iwl_release_nic_access(priv); 1701 iwl4965_release_nic_access(priv);
1702 spin_unlock_irqrestore(&priv->lock, flags); 1702 spin_unlock_irqrestore(&priv->lock, flags);
1703 1703
1704 return 0; 1704 return 0;
1705} 1705}
1706 1706
1707int iwl_hw_set_hw_setting(struct iwl_priv *priv) 1707int iwl4965_hw_set_hw_setting(struct iwl4965_priv *priv)
1708{ 1708{
1709 priv->hw_setting.shared_virt = 1709 priv->hw_setting.shared_virt =
1710 pci_alloc_consistent(priv->pci_dev, 1710 pci_alloc_consistent(priv->pci_dev,
1711 sizeof(struct iwl_shared), 1711 sizeof(struct iwl4965_shared),
1712 &priv->hw_setting.shared_phys); 1712 &priv->hw_setting.shared_phys);
1713 1713
1714 if (!priv->hw_setting.shared_virt) 1714 if (!priv->hw_setting.shared_virt)
1715 return -1; 1715 return -1;
1716 1716
1717 memset(priv->hw_setting.shared_virt, 0, sizeof(struct iwl_shared)); 1717 memset(priv->hw_setting.shared_virt, 0, sizeof(struct iwl4965_shared));
1718 1718
1719 priv->hw_setting.max_txq_num = iwl_param_queues_num; 1719 priv->hw_setting.max_txq_num = iwl4965_param_queues_num;
1720 priv->hw_setting.ac_queue_count = AC_NUM; 1720 priv->hw_setting.ac_queue_count = AC_NUM;
1721 priv->hw_setting.tx_cmd_len = sizeof(struct iwl_tx_cmd); 1721 priv->hw_setting.tx_cmd_len = sizeof(struct iwl4965_tx_cmd);
1722 priv->hw_setting.max_rxq_size = RX_QUEUE_SIZE; 1722 priv->hw_setting.max_rxq_size = RX_QUEUE_SIZE;
1723 priv->hw_setting.max_rxq_log = RX_QUEUE_SIZE_LOG; 1723 priv->hw_setting.max_rxq_log = RX_QUEUE_SIZE_LOG;
1724 1724
@@ -1728,30 +1728,30 @@ int iwl_hw_set_hw_setting(struct iwl_priv *priv)
1728} 1728}
1729 1729
1730/** 1730/**
1731 * iwl_hw_txq_ctx_free - Free TXQ Context 1731 * iwl4965_hw_txq_ctx_free - Free TXQ Context
1732 * 1732 *
1733 * Destroy all TX DMA queues and structures 1733 * Destroy all TX DMA queues and structures
1734 */ 1734 */
1735void iwl_hw_txq_ctx_free(struct iwl_priv *priv) 1735void iwl4965_hw_txq_ctx_free(struct iwl4965_priv *priv)
1736{ 1736{
1737 int txq_id; 1737 int txq_id;
1738 1738
1739 /* Tx queues */ 1739 /* Tx queues */
1740 for (txq_id = 0; txq_id < priv->hw_setting.max_txq_num; txq_id++) 1740 for (txq_id = 0; txq_id < priv->hw_setting.max_txq_num; txq_id++)
1741 iwl_tx_queue_free(priv, &priv->txq[txq_id]); 1741 iwl4965_tx_queue_free(priv, &priv->txq[txq_id]);
1742 1742
1743 iwl4965_kw_free(priv); 1743 iwl4965_kw_free(priv);
1744} 1744}
1745 1745
1746/** 1746/**
1747 * iwl_hw_txq_free_tfd - Free one TFD, those at index [txq->q.read_ptr] 1747 * iwl4965_hw_txq_free_tfd - Free one TFD, those at index [txq->q.read_ptr]
1748 * 1748 *
1749 * Does NOT advance any indexes 1749 * Does NOT advance any indexes
1750 */ 1750 */
1751int iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq) 1751int iwl4965_hw_txq_free_tfd(struct iwl4965_priv *priv, struct iwl4965_tx_queue *txq)
1752{ 1752{
1753 struct iwl_tfd_frame *bd_tmp = (struct iwl_tfd_frame *)&txq->bd[0]; 1753 struct iwl4965_tfd_frame *bd_tmp = (struct iwl4965_tfd_frame *)&txq->bd[0];
1754 struct iwl_tfd_frame *bd = &bd_tmp[txq->q.read_ptr]; 1754 struct iwl4965_tfd_frame *bd = &bd_tmp[txq->q.read_ptr];
1755 struct pci_dev *dev = priv->pci_dev; 1755 struct pci_dev *dev = priv->pci_dev;
1756 int i; 1756 int i;
1757 int counter = 0; 1757 int counter = 0;
@@ -1801,9 +1801,9 @@ int iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
1801 return 0; 1801 return 0;
1802} 1802}
1803 1803
1804int iwl_hw_reg_set_txpower(struct iwl_priv *priv, s8 power) 1804int iwl4965_hw_reg_set_txpower(struct iwl4965_priv *priv, s8 power)
1805{ 1805{
1806 IWL_ERROR("TODO: Implement iwl_hw_reg_set_txpower!\n"); 1806 IWL_ERROR("TODO: Implement iwl4965_hw_reg_set_txpower!\n");
1807 return -EINVAL; 1807 return -EINVAL;
1808} 1808}
1809 1809
@@ -1845,12 +1845,12 @@ static s32 iwl4965_get_voltage_compensation(s32 eeprom_voltage,
1845 return comp; 1845 return comp;
1846} 1846}
1847 1847
1848static const struct iwl_channel_info * 1848static const struct iwl4965_channel_info *
1849iwl4965_get_channel_txpower_info(struct iwl_priv *priv, u8 phymode, u16 channel) 1849iwl4965_get_channel_txpower_info(struct iwl4965_priv *priv, u8 phymode, u16 channel)
1850{ 1850{
1851 const struct iwl_channel_info *ch_info; 1851 const struct iwl4965_channel_info *ch_info;
1852 1852
1853 ch_info = iwl_get_channel_info(priv, phymode, channel); 1853 ch_info = iwl4965_get_channel_info(priv, phymode, channel);
1854 1854
1855 if (!is_channel_valid(ch_info)) 1855 if (!is_channel_valid(ch_info))
1856 return NULL; 1856 return NULL;
@@ -1884,7 +1884,7 @@ static s32 iwl4965_get_tx_atten_grp(u16 channel)
1884 return -1; 1884 return -1;
1885} 1885}
1886 1886
1887static u32 iwl4965_get_sub_band(const struct iwl_priv *priv, u32 channel) 1887static u32 iwl4965_get_sub_band(const struct iwl4965_priv *priv, u32 channel)
1888{ 1888{
1889 s32 b = -1; 1889 s32 b = -1;
1890 1890
@@ -1912,15 +1912,15 @@ static s32 iwl4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2)
1912 } 1912 }
1913} 1913}
1914 1914
1915static int iwl4965_interpolate_chan(struct iwl_priv *priv, u32 channel, 1915static int iwl4965_interpolate_chan(struct iwl4965_priv *priv, u32 channel,
1916 struct iwl_eeprom_calib_ch_info *chan_info) 1916 struct iwl4965_eeprom_calib_ch_info *chan_info)
1917{ 1917{
1918 s32 s = -1; 1918 s32 s = -1;
1919 u32 c; 1919 u32 c;
1920 u32 m; 1920 u32 m;
1921 const struct iwl_eeprom_calib_measure *m1; 1921 const struct iwl4965_eeprom_calib_measure *m1;
1922 const struct iwl_eeprom_calib_measure *m2; 1922 const struct iwl4965_eeprom_calib_measure *m2;
1923 struct iwl_eeprom_calib_measure *omeas; 1923 struct iwl4965_eeprom_calib_measure *omeas;
1924 u32 ch_i1; 1924 u32 ch_i1;
1925 u32 ch_i2; 1925 u32 ch_i2;
1926 1926
@@ -1995,7 +1995,7 @@ static s32 back_off_table[] = {
1995 1995
1996/* Thermal compensation values for txpower for various frequency ranges ... 1996/* Thermal compensation values for txpower for various frequency ranges ...
1997 * ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */ 1997 * ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
1998static struct iwl_txpower_comp_entry { 1998static struct iwl4965_txpower_comp_entry {
1999 s32 degrees_per_05db_a; 1999 s32 degrees_per_05db_a;
2000 s32 degrees_per_05db_a_denom; 2000 s32 degrees_per_05db_a_denom;
2001} tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = { 2001} tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = {
@@ -2245,9 +2245,9 @@ static const struct gain_entry gain_table[2][108] = {
2245 } 2245 }
2246}; 2246};
2247 2247
2248static int iwl4965_fill_txpower_tbl(struct iwl_priv *priv, u8 band, u16 channel, 2248static int iwl4965_fill_txpower_tbl(struct iwl4965_priv *priv, u8 band, u16 channel,
2249 u8 is_fat, u8 ctrl_chan_high, 2249 u8 is_fat, u8 ctrl_chan_high,
2250 struct iwl_tx_power_db *tx_power_tbl) 2250 struct iwl4965_tx_power_db *tx_power_tbl)
2251{ 2251{
2252 u8 saturation_power; 2252 u8 saturation_power;
2253 s32 target_power; 2253 s32 target_power;
@@ -2259,9 +2259,9 @@ static int iwl4965_fill_txpower_tbl(struct iwl_priv *priv, u8 band, u16 channel,
2259 s32 txatten_grp = CALIB_CH_GROUP_MAX; 2259 s32 txatten_grp = CALIB_CH_GROUP_MAX;
2260 int i; 2260 int i;
2261 int c; 2261 int c;
2262 const struct iwl_channel_info *ch_info = NULL; 2262 const struct iwl4965_channel_info *ch_info = NULL;
2263 struct iwl_eeprom_calib_ch_info ch_eeprom_info; 2263 struct iwl4965_eeprom_calib_ch_info ch_eeprom_info;
2264 const struct iwl_eeprom_calib_measure *measurement; 2264 const struct iwl4965_eeprom_calib_measure *measurement;
2265 s16 voltage; 2265 s16 voltage;
2266 s32 init_voltage; 2266 s32 init_voltage;
2267 s32 voltage_compensation; 2267 s32 voltage_compensation;
@@ -2400,7 +2400,7 @@ static int iwl4965_fill_txpower_tbl(struct iwl_priv *priv, u8 band, u16 channel,
2400 /* for each of 33 bit-rates (including 1 for CCK) */ 2400 /* for each of 33 bit-rates (including 1 for CCK) */
2401 for (i = 0; i < POWER_TABLE_NUM_ENTRIES; i++) { 2401 for (i = 0; i < POWER_TABLE_NUM_ENTRIES; i++) {
2402 u8 is_mimo_rate; 2402 u8 is_mimo_rate;
2403 union iwl_tx_power_dual_stream tx_power; 2403 union iwl4965_tx_power_dual_stream tx_power;
2404 2404
2405 /* for mimo, reduce each chain's txpower by half 2405 /* for mimo, reduce each chain's txpower by half
2406 * (3dB, 6 steps), so total output power is regulatory 2406 * (3dB, 6 steps), so total output power is regulatory
@@ -2497,14 +2497,14 @@ static int iwl4965_fill_txpower_tbl(struct iwl_priv *priv, u8 band, u16 channel,
2497} 2497}
2498 2498
2499/** 2499/**
2500 * iwl_hw_reg_send_txpower - Configure the TXPOWER level user limit 2500 * iwl4965_hw_reg_send_txpower - Configure the TXPOWER level user limit
2501 * 2501 *
2502 * Uses the active RXON for channel, band, and characteristics (fat, high) 2502 * Uses the active RXON for channel, band, and characteristics (fat, high)
2503 * The power limit is taken from priv->user_txpower_limit. 2503 * The power limit is taken from priv->user_txpower_limit.
2504 */ 2504 */
2505int iwl_hw_reg_send_txpower(struct iwl_priv *priv) 2505int iwl4965_hw_reg_send_txpower(struct iwl4965_priv *priv)
2506{ 2506{
2507 struct iwl_txpowertable_cmd cmd = { 0 }; 2507 struct iwl4965_txpowertable_cmd cmd = { 0 };
2508 int rc = 0; 2508 int rc = 0;
2509 u8 band = 0; 2509 u8 band = 0;
2510 u8 is_fat = 0; 2510 u8 is_fat = 0;
@@ -2536,23 +2536,23 @@ int iwl_hw_reg_send_txpower(struct iwl_priv *priv)
2536 if (rc) 2536 if (rc)
2537 return rc; 2537 return rc;
2538 2538
2539 rc = iwl_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD, sizeof(cmd), &cmd); 2539 rc = iwl4965_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD, sizeof(cmd), &cmd);
2540 return rc; 2540 return rc;
2541} 2541}
2542 2542
2543int iwl_hw_channel_switch(struct iwl_priv *priv, u16 channel) 2543int iwl4965_hw_channel_switch(struct iwl4965_priv *priv, u16 channel)
2544{ 2544{
2545 int rc; 2545 int rc;
2546 u8 band = 0; 2546 u8 band = 0;
2547 u8 is_fat = 0; 2547 u8 is_fat = 0;
2548 u8 ctrl_chan_high = 0; 2548 u8 ctrl_chan_high = 0;
2549 struct iwl_channel_switch_cmd cmd = { 0 }; 2549 struct iwl4965_channel_switch_cmd cmd = { 0 };
2550 const struct iwl_channel_info *ch_info; 2550 const struct iwl4965_channel_info *ch_info;
2551 2551
2552 band = ((priv->phymode == MODE_IEEE80211B) || 2552 band = ((priv->phymode == MODE_IEEE80211B) ||
2553 (priv->phymode == MODE_IEEE80211G)); 2553 (priv->phymode == MODE_IEEE80211G));
2554 2554
2555 ch_info = iwl_get_channel_info(priv, priv->phymode, channel); 2555 ch_info = iwl4965_get_channel_info(priv, priv->phymode, channel);
2556 2556
2557 is_fat = is_fat_channel(priv->staging_rxon.flags); 2557 is_fat = is_fat_channel(priv->staging_rxon.flags);
2558 2558
@@ -2578,15 +2578,15 @@ int iwl_hw_channel_switch(struct iwl_priv *priv, u16 channel)
2578 return rc; 2578 return rc;
2579 } 2579 }
2580 2580
2581 rc = iwl_send_cmd_pdu(priv, REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd); 2581 rc = iwl4965_send_cmd_pdu(priv, REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd);
2582 return rc; 2582 return rc;
2583} 2583}
2584 2584
2585#define RTS_HCCA_RETRY_LIMIT 3 2585#define RTS_HCCA_RETRY_LIMIT 3
2586#define RTS_DFAULT_RETRY_LIMIT 60 2586#define RTS_DFAULT_RETRY_LIMIT 60
2587 2587
2588void iwl_hw_build_tx_cmd_rate(struct iwl_priv *priv, 2588void iwl4965_hw_build_tx_cmd_rate(struct iwl4965_priv *priv,
2589 struct iwl_cmd *cmd, 2589 struct iwl4965_cmd *cmd,
2590 struct ieee80211_tx_control *ctrl, 2590 struct ieee80211_tx_control *ctrl,
2591 struct ieee80211_hdr *hdr, int sta_id, 2591 struct ieee80211_hdr *hdr, int sta_id,
2592 int is_hcca) 2592 int is_hcca)
@@ -2599,7 +2599,7 @@ void iwl_hw_build_tx_cmd_rate(struct iwl_priv *priv,
2599 2599
2600 tx_flags = cmd->cmd.tx.tx_flags; 2600 tx_flags = cmd->cmd.tx.tx_flags;
2601 2601
2602 rate = iwl_rates[ctrl->tx_rate].plcp; 2602 rate = iwl4965_rates[ctrl->tx_rate].plcp;
2603 2603
2604 rts_retry_limit = (is_hcca) ? 2604 rts_retry_limit = (is_hcca) ?
2605 RTS_HCCA_RETRY_LIMIT : RTS_DFAULT_RETRY_LIMIT; 2605 RTS_HCCA_RETRY_LIMIT : RTS_DFAULT_RETRY_LIMIT;
@@ -2632,26 +2632,26 @@ void iwl_hw_build_tx_cmd_rate(struct iwl_priv *priv,
2632 2632
2633 cmd->cmd.tx.rts_retry_limit = rts_retry_limit; 2633 cmd->cmd.tx.rts_retry_limit = rts_retry_limit;
2634 cmd->cmd.tx.data_retry_limit = data_retry_limit; 2634 cmd->cmd.tx.data_retry_limit = data_retry_limit;
2635 cmd->cmd.tx.rate_n_flags = iwl_hw_set_rate_n_flags(rate, 0); 2635 cmd->cmd.tx.rate_n_flags = iwl4965_hw_set_rate_n_flags(rate, 0);
2636 cmd->cmd.tx.tx_flags = tx_flags; 2636 cmd->cmd.tx.tx_flags = tx_flags;
2637} 2637}
2638 2638
2639int iwl_hw_get_rx_read(struct iwl_priv *priv) 2639int iwl4965_hw_get_rx_read(struct iwl4965_priv *priv)
2640{ 2640{
2641 struct iwl_shared *shared_data = priv->hw_setting.shared_virt; 2641 struct iwl4965_shared *shared_data = priv->hw_setting.shared_virt;
2642 2642
2643 return IWL_GET_BITS(*shared_data, rb_closed_stts_rb_num); 2643 return IWL_GET_BITS(*shared_data, rb_closed_stts_rb_num);
2644} 2644}
2645 2645
2646int iwl_hw_get_temperature(struct iwl_priv *priv) 2646int iwl4965_hw_get_temperature(struct iwl4965_priv *priv)
2647{ 2647{
2648 return priv->temperature; 2648 return priv->temperature;
2649} 2649}
2650 2650
2651unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv, 2651unsigned int iwl4965_hw_get_beacon_cmd(struct iwl4965_priv *priv,
2652 struct iwl_frame *frame, u8 rate) 2652 struct iwl4965_frame *frame, u8 rate)
2653{ 2653{
2654 struct iwl_tx_beacon_cmd *tx_beacon_cmd; 2654 struct iwl4965_tx_beacon_cmd *tx_beacon_cmd;
2655 unsigned int frame_size; 2655 unsigned int frame_size;
2656 2656
2657 tx_beacon_cmd = &frame->u.beacon; 2657 tx_beacon_cmd = &frame->u.beacon;
@@ -2660,9 +2660,9 @@ unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
2660 tx_beacon_cmd->tx.sta_id = IWL4965_BROADCAST_ID; 2660 tx_beacon_cmd->tx.sta_id = IWL4965_BROADCAST_ID;
2661 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE; 2661 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2662 2662
2663 frame_size = iwl_fill_beacon_frame(priv, 2663 frame_size = iwl4965_fill_beacon_frame(priv,
2664 tx_beacon_cmd->frame, 2664 tx_beacon_cmd->frame,
2665 BROADCAST_ADDR, 2665 iwl4965_broadcast_addr,
2666 sizeof(frame->u) - sizeof(*tx_beacon_cmd)); 2666 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
2667 2667
2668 BUG_ON(frame_size > MAX_MPDU_SIZE); 2668 BUG_ON(frame_size > MAX_MPDU_SIZE);
@@ -2670,36 +2670,36 @@ unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
2670 2670
2671 if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP)) 2671 if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP))
2672 tx_beacon_cmd->tx.rate_n_flags = 2672 tx_beacon_cmd->tx.rate_n_flags =
2673 iwl_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK); 2673 iwl4965_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK);
2674 else 2674 else
2675 tx_beacon_cmd->tx.rate_n_flags = 2675 tx_beacon_cmd->tx.rate_n_flags =
2676 iwl_hw_set_rate_n_flags(rate, 0); 2676 iwl4965_hw_set_rate_n_flags(rate, 0);
2677 2677
2678 tx_beacon_cmd->tx.tx_flags = (TX_CMD_FLG_SEQ_CTL_MSK | 2678 tx_beacon_cmd->tx.tx_flags = (TX_CMD_FLG_SEQ_CTL_MSK |
2679 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK); 2679 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK);
2680 return (sizeof(*tx_beacon_cmd) + frame_size); 2680 return (sizeof(*tx_beacon_cmd) + frame_size);
2681} 2681}
2682 2682
2683int iwl_hw_tx_queue_init(struct iwl_priv *priv, struct iwl_tx_queue *txq) 2683int iwl4965_hw_tx_queue_init(struct iwl4965_priv *priv, struct iwl4965_tx_queue *txq)
2684{ 2684{
2685 int rc; 2685 int rc;
2686 unsigned long flags; 2686 unsigned long flags;
2687 int txq_id = txq->q.id; 2687 int txq_id = txq->q.id;
2688 2688
2689 spin_lock_irqsave(&priv->lock, flags); 2689 spin_lock_irqsave(&priv->lock, flags);
2690 rc = iwl_grab_nic_access(priv); 2690 rc = iwl4965_grab_nic_access(priv);
2691 if (rc) { 2691 if (rc) {
2692 spin_unlock_irqrestore(&priv->lock, flags); 2692 spin_unlock_irqrestore(&priv->lock, flags);
2693 return rc; 2693 return rc;
2694 } 2694 }
2695 2695
2696 iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id), 2696 iwl4965_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
2697 txq->q.dma_addr >> 8); 2697 txq->q.dma_addr >> 8);
2698 iwl_write_direct32( 2698 iwl4965_write_direct32(
2699 priv, IWL_FH_TCSR_CHNL_TX_CONFIG_REG(txq_id), 2699 priv, IWL_FH_TCSR_CHNL_TX_CONFIG_REG(txq_id),
2700 IWL_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE | 2700 IWL_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE |
2701 IWL_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL); 2701 IWL_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL);
2702 iwl_release_nic_access(priv); 2702 iwl4965_release_nic_access(priv);
2703 spin_unlock_irqrestore(&priv->lock, flags); 2703 spin_unlock_irqrestore(&priv->lock, flags);
2704 2704
2705 return 0; 2705 return 0;
@@ -2710,11 +2710,11 @@ static inline u8 iwl4965_get_dma_hi_address(dma_addr_t addr)
2710 return sizeof(addr) > sizeof(u32) ? (addr >> 16) >> 16 : 0; 2710 return sizeof(addr) > sizeof(u32) ? (addr >> 16) >> 16 : 0;
2711} 2711}
2712 2712
2713int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv, void *ptr, 2713int iwl4965_hw_txq_attach_buf_to_tfd(struct iwl4965_priv *priv, void *ptr,
2714 dma_addr_t addr, u16 len) 2714 dma_addr_t addr, u16 len)
2715{ 2715{
2716 int index, is_odd; 2716 int index, is_odd;
2717 struct iwl_tfd_frame *tfd = ptr; 2717 struct iwl4965_tfd_frame *tfd = ptr;
2718 u32 num_tbs = IWL_GET_BITS(*tfd, num_tbs); 2718 u32 num_tbs = IWL_GET_BITS(*tfd, num_tbs);
2719 2719
2720 if ((num_tbs >= MAX_NUM_OF_TBS) || (num_tbs < 0)) { 2720 if ((num_tbs >= MAX_NUM_OF_TBS) || (num_tbs < 0)) {
@@ -2743,7 +2743,7 @@ int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv, void *ptr,
2743 return 0; 2743 return 0;
2744} 2744}
2745 2745
2746static void iwl_hw_card_show_info(struct iwl_priv *priv) 2746static void iwl4965_hw_card_show_info(struct iwl4965_priv *priv)
2747{ 2747{
2748 u16 hw_version = priv->eeprom.board_revision_4965; 2748 u16 hw_version = priv->eeprom.board_revision_4965;
2749 2749
@@ -2758,12 +2758,12 @@ static void iwl_hw_card_show_info(struct iwl_priv *priv)
2758#define IWL_TX_CRC_SIZE 4 2758#define IWL_TX_CRC_SIZE 4
2759#define IWL_TX_DELIMITER_SIZE 4 2759#define IWL_TX_DELIMITER_SIZE 4
2760 2760
2761int iwl4965_tx_queue_update_wr_ptr(struct iwl_priv *priv, 2761int iwl4965_tx_queue_update_wr_ptr(struct iwl4965_priv *priv,
2762 struct iwl_tx_queue *txq, u16 byte_cnt) 2762 struct iwl4965_tx_queue *txq, u16 byte_cnt)
2763{ 2763{
2764 int len; 2764 int len;
2765 int txq_id = txq->q.id; 2765 int txq_id = txq->q.id;
2766 struct iwl_shared *shared_data = priv->hw_setting.shared_virt; 2766 struct iwl4965_shared *shared_data = priv->hw_setting.shared_virt;
2767 2767
2768 if (txq->need_update == 0) 2768 if (txq->need_update == 0)
2769 return 0; 2769 return 0;
@@ -2783,7 +2783,7 @@ int iwl4965_tx_queue_update_wr_ptr(struct iwl_priv *priv,
2783 2783
2784/* Set up Rx receiver/antenna/chain usage in "staging" RXON image. 2784/* Set up Rx receiver/antenna/chain usage in "staging" RXON image.
2785 * This should not be used for scan command ... it puts data in wrong place. */ 2785 * This should not be used for scan command ... it puts data in wrong place. */
2786void iwl4965_set_rxon_chain(struct iwl_priv *priv) 2786void iwl4965_set_rxon_chain(struct iwl4965_priv *priv)
2787{ 2787{
2788 u8 is_single = is_single_stream(priv); 2788 u8 is_single = is_single_stream(priv);
2789 u8 idle_state, rx_state; 2789 u8 idle_state, rx_state;
@@ -2819,14 +2819,14 @@ void iwl4965_set_rxon_chain(struct iwl_priv *priv)
2819/* 2819/*
2820 get the traffic load value for tid 2820 get the traffic load value for tid
2821*/ 2821*/
2822static u32 iwl4965_tl_get_load(struct iwl_priv *priv, u8 tid) 2822static u32 iwl4965_tl_get_load(struct iwl4965_priv *priv, u8 tid)
2823{ 2823{
2824 u32 load = 0; 2824 u32 load = 0;
2825 u32 current_time = jiffies_to_msecs(jiffies); 2825 u32 current_time = jiffies_to_msecs(jiffies);
2826 u32 time_diff; 2826 u32 time_diff;
2827 s32 index; 2827 s32 index;
2828 unsigned long flags; 2828 unsigned long flags;
2829 struct iwl_traffic_load *tid_ptr = NULL; 2829 struct iwl4965_traffic_load *tid_ptr = NULL;
2830 2830
2831 if (tid >= TID_MAX_LOAD_COUNT) 2831 if (tid >= TID_MAX_LOAD_COUNT)
2832 return 0; 2832 return 0;
@@ -2867,13 +2867,13 @@ static u32 iwl4965_tl_get_load(struct iwl_priv *priv, u8 tid)
2867 increment traffic load value for tid and also remove 2867 increment traffic load value for tid and also remove
2868 any old values if passed the certian time period 2868 any old values if passed the certian time period
2869*/ 2869*/
2870static void iwl4965_tl_add_packet(struct iwl_priv *priv, u8 tid) 2870static void iwl4965_tl_add_packet(struct iwl4965_priv *priv, u8 tid)
2871{ 2871{
2872 u32 current_time = jiffies_to_msecs(jiffies); 2872 u32 current_time = jiffies_to_msecs(jiffies);
2873 u32 time_diff; 2873 u32 time_diff;
2874 s32 index; 2874 s32 index;
2875 unsigned long flags; 2875 unsigned long flags;
2876 struct iwl_traffic_load *tid_ptr = NULL; 2876 struct iwl4965_traffic_load *tid_ptr = NULL;
2877 2877
2878 if (tid >= TID_MAX_LOAD_COUNT) 2878 if (tid >= TID_MAX_LOAD_COUNT)
2879 return; 2879 return;
@@ -2930,14 +2930,14 @@ enum HT_STATUS {
2930 BA_STATUS_ACTIVE, 2930 BA_STATUS_ACTIVE,
2931}; 2931};
2932 2932
2933static u8 iwl4964_tl_ba_avail(struct iwl_priv *priv) 2933static u8 iwl4964_tl_ba_avail(struct iwl4965_priv *priv)
2934{ 2934{
2935 int i; 2935 int i;
2936 struct iwl_lq_mngr *lq; 2936 struct iwl4965_lq_mngr *lq;
2937 u8 count = 0; 2937 u8 count = 0;
2938 u16 msk; 2938 u16 msk;
2939 2939
2940 lq = (struct iwl_lq_mngr *)&(priv->lq_mngr); 2940 lq = (struct iwl4965_lq_mngr *)&(priv->lq_mngr);
2941 for (i = 0; i < TID_MAX_LOAD_COUNT ; i++) { 2941 for (i = 0; i < TID_MAX_LOAD_COUNT ; i++) {
2942 msk = 1 << i; 2942 msk = 1 << i;
2943 if ((lq->agg_ctrl.granted_ba & msk) || 2943 if ((lq->agg_ctrl.granted_ba & msk) ||
@@ -2951,10 +2951,10 @@ static u8 iwl4964_tl_ba_avail(struct iwl_priv *priv)
2951 return 0; 2951 return 0;
2952} 2952}
2953 2953
2954static void iwl4965_ba_status(struct iwl_priv *priv, 2954static void iwl4965_ba_status(struct iwl4965_priv *priv,
2955 u8 tid, enum HT_STATUS status); 2955 u8 tid, enum HT_STATUS status);
2956 2956
2957static int iwl4965_perform_addba(struct iwl_priv *priv, u8 tid, u32 length, 2957static int iwl4965_perform_addba(struct iwl4965_priv *priv, u8 tid, u32 length,
2958 u32 ba_timeout) 2958 u32 ba_timeout)
2959{ 2959{
2960 int rc; 2960 int rc;
@@ -2966,7 +2966,7 @@ static int iwl4965_perform_addba(struct iwl_priv *priv, u8 tid, u32 length,
2966 return rc; 2966 return rc;
2967} 2967}
2968 2968
2969static int iwl4965_perform_delba(struct iwl_priv *priv, u8 tid) 2969static int iwl4965_perform_delba(struct iwl4965_priv *priv, u8 tid)
2970{ 2970{
2971 int rc; 2971 int rc;
2972 2972
@@ -2977,8 +2977,8 @@ static int iwl4965_perform_delba(struct iwl_priv *priv, u8 tid)
2977 return rc; 2977 return rc;
2978} 2978}
2979 2979
2980static void iwl4965_turn_on_agg_for_tid(struct iwl_priv *priv, 2980static void iwl4965_turn_on_agg_for_tid(struct iwl4965_priv *priv,
2981 struct iwl_lq_mngr *lq, 2981 struct iwl4965_lq_mngr *lq,
2982 u8 auto_agg, u8 tid) 2982 u8 auto_agg, u8 tid)
2983{ 2983{
2984 u32 tid_msk = (1 << tid); 2984 u32 tid_msk = (1 << tid);
@@ -3025,12 +3025,12 @@ static void iwl4965_turn_on_agg_for_tid(struct iwl_priv *priv,
3025 spin_unlock_irqrestore(&priv->lq_mngr.lock, flags); 3025 spin_unlock_irqrestore(&priv->lq_mngr.lock, flags);
3026} 3026}
3027 3027
3028static void iwl4965_turn_on_agg(struct iwl_priv *priv, u8 tid) 3028static void iwl4965_turn_on_agg(struct iwl4965_priv *priv, u8 tid)
3029{ 3029{
3030 struct iwl_lq_mngr *lq; 3030 struct iwl4965_lq_mngr *lq;
3031 unsigned long flags; 3031 unsigned long flags;
3032 3032
3033 lq = (struct iwl_lq_mngr *)&(priv->lq_mngr); 3033 lq = (struct iwl4965_lq_mngr *)&(priv->lq_mngr);
3034 3034
3035 if ((tid < TID_MAX_LOAD_COUNT)) 3035 if ((tid < TID_MAX_LOAD_COUNT))
3036 iwl4965_turn_on_agg_for_tid(priv, lq, lq->agg_ctrl.auto_agg, 3036 iwl4965_turn_on_agg_for_tid(priv, lq, lq->agg_ctrl.auto_agg,
@@ -3050,13 +3050,13 @@ static void iwl4965_turn_on_agg(struct iwl_priv *priv, u8 tid)
3050 3050
3051} 3051}
3052 3052
3053void iwl4965_turn_off_agg(struct iwl_priv *priv, u8 tid) 3053void iwl4965_turn_off_agg(struct iwl4965_priv *priv, u8 tid)
3054{ 3054{
3055 u32 tid_msk; 3055 u32 tid_msk;
3056 struct iwl_lq_mngr *lq; 3056 struct iwl4965_lq_mngr *lq;
3057 unsigned long flags; 3057 unsigned long flags;
3058 3058
3059 lq = (struct iwl_lq_mngr *)&(priv->lq_mngr); 3059 lq = (struct iwl4965_lq_mngr *)&(priv->lq_mngr);
3060 3060
3061 if ((tid < TID_MAX_LOAD_COUNT)) { 3061 if ((tid < TID_MAX_LOAD_COUNT)) {
3062 tid_msk = 1 << tid; 3062 tid_msk = 1 << tid;
@@ -3079,14 +3079,14 @@ void iwl4965_turn_off_agg(struct iwl_priv *priv, u8 tid)
3079 } 3079 }
3080} 3080}
3081 3081
3082static void iwl4965_ba_status(struct iwl_priv *priv, 3082static void iwl4965_ba_status(struct iwl4965_priv *priv,
3083 u8 tid, enum HT_STATUS status) 3083 u8 tid, enum HT_STATUS status)
3084{ 3084{
3085 struct iwl_lq_mngr *lq; 3085 struct iwl4965_lq_mngr *lq;
3086 u32 tid_msk = (1 << tid); 3086 u32 tid_msk = (1 << tid);
3087 unsigned long flags; 3087 unsigned long flags;
3088 3088
3089 lq = (struct iwl_lq_mngr *)&(priv->lq_mngr); 3089 lq = (struct iwl4965_lq_mngr *)&(priv->lq_mngr);
3090 3090
3091 if ((tid >= TID_MAX_LOAD_COUNT)) 3091 if ((tid >= TID_MAX_LOAD_COUNT))
3092 goto out; 3092 goto out;
@@ -3119,14 +3119,14 @@ static void iwl4965_ba_status(struct iwl_priv *priv,
3119 3119
3120static void iwl4965_bg_agg_work(struct work_struct *work) 3120static void iwl4965_bg_agg_work(struct work_struct *work)
3121{ 3121{
3122 struct iwl_priv *priv = container_of(work, struct iwl_priv, 3122 struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv,
3123 agg_work); 3123 agg_work);
3124 3124
3125 u32 tid; 3125 u32 tid;
3126 u32 retry_tid; 3126 u32 retry_tid;
3127 u32 tid_msk; 3127 u32 tid_msk;
3128 unsigned long flags; 3128 unsigned long flags;
3129 struct iwl_lq_mngr *lq = (struct iwl_lq_mngr *)&(priv->lq_mngr); 3129 struct iwl4965_lq_mngr *lq = (struct iwl4965_lq_mngr *)&(priv->lq_mngr);
3130 3130
3131 spin_lock_irqsave(&priv->lq_mngr.lock, flags); 3131 spin_lock_irqsave(&priv->lq_mngr.lock, flags);
3132 retry_tid = lq->agg_ctrl.tid_retry; 3132 retry_tid = lq->agg_ctrl.tid_retry;
@@ -3152,13 +3152,13 @@ static void iwl4965_bg_agg_work(struct work_struct *work)
3152#endif /*CONFIG_IWL4965_HT_AGG */ 3152#endif /*CONFIG_IWL4965_HT_AGG */
3153#endif /* CONFIG_IWL4965_HT */ 3153#endif /* CONFIG_IWL4965_HT */
3154 3154
3155int iwl4965_tx_cmd(struct iwl_priv *priv, struct iwl_cmd *out_cmd, 3155int iwl4965_tx_cmd(struct iwl4965_priv *priv, struct iwl4965_cmd *out_cmd,
3156 u8 sta_id, dma_addr_t txcmd_phys, 3156 u8 sta_id, dma_addr_t txcmd_phys,
3157 struct ieee80211_hdr *hdr, u8 hdr_len, 3157 struct ieee80211_hdr *hdr, u8 hdr_len,
3158 struct ieee80211_tx_control *ctrl, void *sta_in) 3158 struct ieee80211_tx_control *ctrl, void *sta_in)
3159{ 3159{
3160 struct iwl_tx_cmd cmd; 3160 struct iwl4965_tx_cmd cmd;
3161 struct iwl_tx_cmd *tx = (struct iwl_tx_cmd *)&out_cmd->cmd.payload[0]; 3161 struct iwl4965_tx_cmd *tx = (struct iwl4965_tx_cmd *)&out_cmd->cmd.payload[0];
3162 dma_addr_t scratch_phys; 3162 dma_addr_t scratch_phys;
3163 u8 unicast = 0; 3163 u8 unicast = 0;
3164 u8 is_data = 1; 3164 u8 is_data = 1;
@@ -3177,8 +3177,8 @@ int iwl4965_tx_cmd(struct iwl_priv *priv, struct iwl_cmd *out_cmd,
3177 if ((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) 3177 if ((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA)
3178 is_data = 0; 3178 is_data = 0;
3179 3179
3180 memcpy(&cmd, &(out_cmd->cmd.tx), sizeof(struct iwl_tx_cmd)); 3180 memcpy(&cmd, &(out_cmd->cmd.tx), sizeof(struct iwl4965_tx_cmd));
3181 memset(tx, 0, sizeof(struct iwl_tx_cmd)); 3181 memset(tx, 0, sizeof(struct iwl4965_tx_cmd));
3182 memcpy(tx->hdr, hdr, hdr_len); 3182 memcpy(tx->hdr, hdr, hdr_len);
3183 3183
3184 tx->len = cmd.len; 3184 tx->len = cmd.len;
@@ -3197,8 +3197,8 @@ int iwl4965_tx_cmd(struct iwl_priv *priv, struct iwl_cmd *out_cmd,
3197 tx->rts_retry_limit = cmd.rts_retry_limit; 3197 tx->rts_retry_limit = cmd.rts_retry_limit;
3198 tx->data_retry_limit = cmd.data_retry_limit; 3198 tx->data_retry_limit = cmd.data_retry_limit;
3199 3199
3200 scratch_phys = txcmd_phys + sizeof(struct iwl_cmd_header) + 3200 scratch_phys = txcmd_phys + sizeof(struct iwl4965_cmd_header) +
3201 offsetof(struct iwl_tx_cmd, scratch); 3201 offsetof(struct iwl4965_tx_cmd, scratch);
3202 tx->dram_lsb_ptr = cpu_to_le32(scratch_phys); 3202 tx->dram_lsb_ptr = cpu_to_le32(scratch_phys);
3203 tx->dram_msb_ptr = iwl4965_get_dma_hi_address(scratch_phys); 3203 tx->dram_msb_ptr = iwl4965_get_dma_hi_address(scratch_phys);
3204 3204
@@ -3224,7 +3224,7 @@ int iwl4965_tx_cmd(struct iwl_priv *priv, struct iwl_cmd *out_cmd,
3224 tx->tx_flags |= TX_CMD_FLG_STA_RATE_MSK; 3224 tx->tx_flags |= TX_CMD_FLG_STA_RATE_MSK;
3225 } 3225 }
3226 3226
3227 tx->rate_n_flags = iwl_hw_set_rate_n_flags(iwl_rates[rate_index].plcp, 3227 tx->rate_n_flags = iwl4965_hw_set_rate_n_flags(iwl4965_rates[rate_index].plcp,
3228 rate_flags); 3228 rate_flags);
3229 3229
3230 if (ieee80211_is_back_request(fc)) 3230 if (ieee80211_is_back_request(fc))
@@ -3277,7 +3277,7 @@ static s32 sign_extend(u32 oper, int index)
3277 * 3277 *
3278 * A return of <0 indicates bogus data in the statistics 3278 * A return of <0 indicates bogus data in the statistics
3279 */ 3279 */
3280int iwl4965_get_temperature(const struct iwl_priv *priv) 3280int iwl4965_get_temperature(const struct iwl4965_priv *priv)
3281{ 3281{
3282 s32 temperature; 3282 s32 temperature;
3283 s32 vt; 3283 s32 vt;
@@ -3344,7 +3344,7 @@ int iwl4965_get_temperature(const struct iwl_priv *priv)
3344 * Assumes caller will replace priv->last_temperature once calibration 3344 * Assumes caller will replace priv->last_temperature once calibration
3345 * executed. 3345 * executed.
3346 */ 3346 */
3347static int iwl4965_is_temp_calib_needed(struct iwl_priv *priv) 3347static int iwl4965_is_temp_calib_needed(struct iwl4965_priv *priv)
3348{ 3348{
3349 int temp_diff; 3349 int temp_diff;
3350 3350
@@ -3377,7 +3377,7 @@ static int iwl4965_is_temp_calib_needed(struct iwl_priv *priv)
3377/* Calculate noise level, based on measurements during network silence just 3377/* Calculate noise level, based on measurements during network silence just
3378 * before arriving beacon. This measurement can be done only if we know 3378 * before arriving beacon. This measurement can be done only if we know
3379 * exactly when to expect beacons, therefore only when we're associated. */ 3379 * exactly when to expect beacons, therefore only when we're associated. */
3380static void iwl4965_rx_calc_noise(struct iwl_priv *priv) 3380static void iwl4965_rx_calc_noise(struct iwl4965_priv *priv)
3381{ 3381{
3382 struct statistics_rx_non_phy *rx_info 3382 struct statistics_rx_non_phy *rx_info
3383 = &(priv->statistics.rx.general); 3383 = &(priv->statistics.rx.general);
@@ -3414,9 +3414,9 @@ static void iwl4965_rx_calc_noise(struct iwl_priv *priv)
3414 priv->last_rx_noise); 3414 priv->last_rx_noise);
3415} 3415}
3416 3416
3417void iwl_hw_rx_statistics(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb) 3417void iwl4965_hw_rx_statistics(struct iwl4965_priv *priv, struct iwl4965_rx_mem_buffer *rxb)
3418{ 3418{
3419 struct iwl_rx_packet *pkt = (void *)rxb->skb->data; 3419 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3420 int change; 3420 int change;
3421 s32 temp; 3421 s32 temp;
3422 3422
@@ -3478,12 +3478,12 @@ void iwl_hw_rx_statistics(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
3478 queue_work(priv->workqueue, &priv->txpower_work); 3478 queue_work(priv->workqueue, &priv->txpower_work);
3479} 3479}
3480 3480
3481static void iwl4965_handle_data_packet(struct iwl_priv *priv, int is_data, 3481static void iwl4965_handle_data_packet(struct iwl4965_priv *priv, int is_data,
3482 int include_phy, 3482 int include_phy,
3483 struct iwl_rx_mem_buffer *rxb, 3483 struct iwl4965_rx_mem_buffer *rxb,
3484 struct ieee80211_rx_status *stats) 3484 struct ieee80211_rx_status *stats)
3485{ 3485{
3486 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; 3486 struct iwl4965_rx_packet *pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
3487 struct iwl4965_rx_phy_res *rx_start = (include_phy) ? 3487 struct iwl4965_rx_phy_res *rx_start = (include_phy) ?
3488 (struct iwl4965_rx_phy_res *)&(pkt->u.raw[0]) : NULL; 3488 (struct iwl4965_rx_phy_res *)&(pkt->u.raw[0]) : NULL;
3489 struct ieee80211_hdr *hdr; 3489 struct ieee80211_hdr *hdr;
@@ -3540,25 +3540,25 @@ static void iwl4965_handle_data_packet(struct iwl_priv *priv, int is_data,
3540 } 3540 }
3541 3541
3542 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) { 3542 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
3543 if (iwl_param_hwcrypto) 3543 if (iwl4965_param_hwcrypto)
3544 iwl_set_decrypted_flag(priv, rxb->skb, 3544 iwl4965_set_decrypted_flag(priv, rxb->skb,
3545 ampdu_status, stats); 3545 ampdu_status, stats);
3546 iwl_handle_data_packet_monitor(priv, rxb, hdr, len, stats, 0); 3546 iwl4965_handle_data_packet_monitor(priv, rxb, hdr, len, stats, 0);
3547 return; 3547 return;
3548 } 3548 }
3549 3549
3550 stats->flag = 0; 3550 stats->flag = 0;
3551 hdr = (struct ieee80211_hdr *)rxb->skb->data; 3551 hdr = (struct ieee80211_hdr *)rxb->skb->data;
3552 3552
3553 if (iwl_param_hwcrypto) 3553 if (iwl4965_param_hwcrypto)
3554 iwl_set_decrypted_flag(priv, rxb->skb, ampdu_status, stats); 3554 iwl4965_set_decrypted_flag(priv, rxb->skb, ampdu_status, stats);
3555 3555
3556 ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats); 3556 ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
3557 priv->alloc_rxb_skb--; 3557 priv->alloc_rxb_skb--;
3558 rxb->skb = NULL; 3558 rxb->skb = NULL;
3559#ifdef LED 3559#ifdef LED
3560 priv->led_packets += len; 3560 priv->led_packets += len;
3561 iwl_setup_activity_timer(priv); 3561 iwl4965_setup_activity_timer(priv);
3562#endif 3562#endif
3563} 3563}
3564 3564
@@ -3670,7 +3670,7 @@ static int parse_elems(u8 *start, size_t len, struct ieee802_11_elems *elems)
3670} 3670}
3671#endif /* CONFIG_IWL4965_HT */ 3671#endif /* CONFIG_IWL4965_HT */
3672 3672
3673static void iwl4965_sta_modify_ps_wake(struct iwl_priv *priv, int sta_id) 3673static void iwl4965_sta_modify_ps_wake(struct iwl4965_priv *priv, int sta_id)
3674{ 3674{
3675 unsigned long flags; 3675 unsigned long flags;
3676 3676
@@ -3681,13 +3681,13 @@ static void iwl4965_sta_modify_ps_wake(struct iwl_priv *priv, int sta_id)
3681 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; 3681 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3682 spin_unlock_irqrestore(&priv->sta_lock, flags); 3682 spin_unlock_irqrestore(&priv->sta_lock, flags);
3683 3683
3684 iwl_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC); 3684 iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
3685} 3685}
3686 3686
3687static void iwl4965_update_ps_mode(struct iwl_priv *priv, u16 ps_bit, u8 *addr) 3687static void iwl4965_update_ps_mode(struct iwl4965_priv *priv, u16 ps_bit, u8 *addr)
3688{ 3688{
3689 /* FIXME: need locking over ps_status ??? */ 3689 /* FIXME: need locking over ps_status ??? */
3690 u8 sta_id = iwl_hw_find_station(priv, addr); 3690 u8 sta_id = iwl4965_hw_find_station(priv, addr);
3691 3691
3692 if (sta_id != IWL_INVALID_STATION) { 3692 if (sta_id != IWL_INVALID_STATION) {
3693 u8 sta_awake = priv->stations[sta_id]. 3693 u8 sta_awake = priv->stations[sta_id].
@@ -3704,10 +3704,10 @@ static void iwl4965_update_ps_mode(struct iwl_priv *priv, u16 ps_bit, u8 *addr)
3704 3704
3705/* Called for REPLY_4965_RX (legacy ABG frames), or 3705/* Called for REPLY_4965_RX (legacy ABG frames), or
3706 * REPLY_RX_MPDU_CMD (HT high-throughput N frames). */ 3706 * REPLY_RX_MPDU_CMD (HT high-throughput N frames). */
3707static void iwl4965_rx_reply_rx(struct iwl_priv *priv, 3707static void iwl4965_rx_reply_rx(struct iwl4965_priv *priv,
3708 struct iwl_rx_mem_buffer *rxb) 3708 struct iwl4965_rx_mem_buffer *rxb)
3709{ 3709{
3710 struct iwl_rx_packet *pkt = (void *)rxb->skb->data; 3710 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3711 /* Use phy data (Rx signal strength, etc.) contained within 3711 /* Use phy data (Rx signal strength, etc.) contained within
3712 * this rx packet for legacy frames, 3712 * this rx packet for legacy frames,
3713 * or phy data cached from REPLY_RX_PHY_CMD for HT frames. */ 3713 * or phy data cached from REPLY_RX_PHY_CMD for HT frames. */
@@ -3726,7 +3726,7 @@ static void iwl4965_rx_reply_rx(struct iwl_priv *priv,
3726 (rx_start->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ? 3726 (rx_start->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
3727 MODE_IEEE80211G : MODE_IEEE80211A, 3727 MODE_IEEE80211G : MODE_IEEE80211A,
3728 .antenna = 0, 3728 .antenna = 0,
3729 .rate = iwl_hw_get_rate(rx_start->rate_n_flags), 3729 .rate = iwl4965_hw_get_rate(rx_start->rate_n_flags),
3730 .flag = 0, 3730 .flag = 0,
3731#ifdef CONFIG_IWL4965_HT_AGG 3731#ifdef CONFIG_IWL4965_HT_AGG
3732 .ordered = 0 3732 .ordered = 0
@@ -3789,32 +3789,32 @@ static void iwl4965_rx_reply_rx(struct iwl_priv *priv,
3789 * which are gathered only when associated, and indicate noise 3789 * which are gathered only when associated, and indicate noise
3790 * only for the associated network channel ... 3790 * only for the associated network channel ...
3791 * Ignore these noise values while scanning (other channels) */ 3791 * Ignore these noise values while scanning (other channels) */
3792 if (iwl_is_associated(priv) && 3792 if (iwl4965_is_associated(priv) &&
3793 !test_bit(STATUS_SCANNING, &priv->status)) { 3793 !test_bit(STATUS_SCANNING, &priv->status)) {
3794 stats.noise = priv->last_rx_noise; 3794 stats.noise = priv->last_rx_noise;
3795 stats.signal = iwl_calc_sig_qual(stats.ssi, stats.noise); 3795 stats.signal = iwl4965_calc_sig_qual(stats.ssi, stats.noise);
3796 } else { 3796 } else {
3797 stats.noise = IWL_NOISE_MEAS_NOT_AVAILABLE; 3797 stats.noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
3798 stats.signal = iwl_calc_sig_qual(stats.ssi, 0); 3798 stats.signal = iwl4965_calc_sig_qual(stats.ssi, 0);
3799 } 3799 }
3800 3800
3801 /* Reset beacon noise level if not associated. */ 3801 /* Reset beacon noise level if not associated. */
3802 if (!iwl_is_associated(priv)) 3802 if (!iwl4965_is_associated(priv))
3803 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE; 3803 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
3804 3804
3805#ifdef CONFIG_IWL4965_DEBUG 3805#ifdef CONFIG_IWL4965_DEBUG
3806 /* TODO: Parts of iwl_report_frame are broken for 4965 */ 3806 /* TODO: Parts of iwl4965_report_frame are broken for 4965 */
3807 if (iwl_debug_level & (IWL_DL_RX)) 3807 if (iwl4965_debug_level & (IWL_DL_RX))
3808 /* Set "1" to report good data frames in groups of 100 */ 3808 /* Set "1" to report good data frames in groups of 100 */
3809 iwl_report_frame(priv, pkt, header, 1); 3809 iwl4965_report_frame(priv, pkt, header, 1);
3810 3810
3811 if (iwl_debug_level & (IWL_DL_RX | IWL_DL_STATS)) 3811 if (iwl4965_debug_level & (IWL_DL_RX | IWL_DL_STATS))
3812 IWL_DEBUG_RX("Rssi %d, noise %d, qual %d, TSF %lu\n", 3812 IWL_DEBUG_RX("Rssi %d, noise %d, qual %d, TSF %lu\n",
3813 stats.ssi, stats.noise, stats.signal, 3813 stats.ssi, stats.noise, stats.signal,
3814 (long unsigned int)le64_to_cpu(rx_start->timestamp)); 3814 (long unsigned int)le64_to_cpu(rx_start->timestamp));
3815#endif 3815#endif
3816 3816
3817 network_packet = iwl_is_network_packet(priv, header); 3817 network_packet = iwl4965_is_network_packet(priv, header);
3818 if (network_packet) { 3818 if (network_packet) {
3819 priv->last_rx_rssi = stats.ssi; 3819 priv->last_rx_rssi = stats.ssi;
3820 priv->last_beacon_time = priv->ucode_beacon_time; 3820 priv->last_beacon_time = priv->ucode_beacon_time;
@@ -3902,7 +3902,7 @@ static void iwl4965_rx_reply_rx(struct iwl_priv *priv,
3902 3902
3903 case IEEE80211_STYPE_PROBE_REQ: 3903 case IEEE80211_STYPE_PROBE_REQ:
3904 if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) && 3904 if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
3905 !iwl_is_associated(priv)) { 3905 !iwl4965_is_associated(priv)) {
3906 DECLARE_MAC_BUF(mac1); 3906 DECLARE_MAC_BUF(mac1);
3907 DECLARE_MAC_BUF(mac2); 3907 DECLARE_MAC_BUF(mac2);
3908 DECLARE_MAC_BUF(mac3); 3908 DECLARE_MAC_BUF(mac3);
@@ -3948,7 +3948,7 @@ static void iwl4965_rx_reply_rx(struct iwl_priv *priv,
3948 print_mac(mac1, header->addr1), 3948 print_mac(mac1, header->addr1),
3949 print_mac(mac2, header->addr2), 3949 print_mac(mac2, header->addr2),
3950 print_mac(mac3, header->addr3)); 3950 print_mac(mac3, header->addr3));
3951 else if (unlikely(is_duplicate_packet(priv, header))) 3951 else if (unlikely(iwl4965_is_duplicate_packet(priv, header)))
3952 IWL_DEBUG_DROP("Dropping (dup): %s, %s, %s\n", 3952 IWL_DEBUG_DROP("Dropping (dup): %s, %s, %s\n",
3953 print_mac(mac1, header->addr1), 3953 print_mac(mac1, header->addr1),
3954 print_mac(mac2, header->addr2), 3954 print_mac(mac2, header->addr2),
@@ -3966,22 +3966,22 @@ static void iwl4965_rx_reply_rx(struct iwl_priv *priv,
3966 3966
3967/* Cache phy data (Rx signal strength, etc) for HT frame (REPLY_RX_PHY_CMD). 3967/* Cache phy data (Rx signal strength, etc) for HT frame (REPLY_RX_PHY_CMD).
3968 * This will be used later in iwl4965_rx_reply_rx() for REPLY_RX_MPDU_CMD. */ 3968 * This will be used later in iwl4965_rx_reply_rx() for REPLY_RX_MPDU_CMD. */
3969static void iwl4965_rx_reply_rx_phy(struct iwl_priv *priv, 3969static void iwl4965_rx_reply_rx_phy(struct iwl4965_priv *priv,
3970 struct iwl_rx_mem_buffer *rxb) 3970 struct iwl4965_rx_mem_buffer *rxb)
3971{ 3971{
3972 struct iwl_rx_packet *pkt = (void *)rxb->skb->data; 3972 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3973 priv->last_phy_res[0] = 1; 3973 priv->last_phy_res[0] = 1;
3974 memcpy(&priv->last_phy_res[1], &(pkt->u.raw[0]), 3974 memcpy(&priv->last_phy_res[1], &(pkt->u.raw[0]),
3975 sizeof(struct iwl4965_rx_phy_res)); 3975 sizeof(struct iwl4965_rx_phy_res));
3976} 3976}
3977 3977
3978static void iwl4965_rx_missed_beacon_notif(struct iwl_priv *priv, 3978static void iwl4965_rx_missed_beacon_notif(struct iwl4965_priv *priv,
3979 struct iwl_rx_mem_buffer *rxb) 3979 struct iwl4965_rx_mem_buffer *rxb)
3980 3980
3981{ 3981{
3982#ifdef CONFIG_IWL4965_SENSITIVITY 3982#ifdef CONFIG_IWL4965_SENSITIVITY
3983 struct iwl_rx_packet *pkt = (void *)rxb->skb->data; 3983 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3984 struct iwl_missed_beacon_notif *missed_beacon; 3984 struct iwl4965_missed_beacon_notif *missed_beacon;
3985 3985
3986 missed_beacon = &pkt->u.missed_beacon; 3986 missed_beacon = &pkt->u.missed_beacon;
3987 if (le32_to_cpu(missed_beacon->consequtive_missed_beacons) > 5) { 3987 if (le32_to_cpu(missed_beacon->consequtive_missed_beacons) > 5) {
@@ -4000,7 +4000,7 @@ static void iwl4965_rx_missed_beacon_notif(struct iwl_priv *priv,
4000#ifdef CONFIG_IWL4965_HT 4000#ifdef CONFIG_IWL4965_HT
4001#ifdef CONFIG_IWL4965_HT_AGG 4001#ifdef CONFIG_IWL4965_HT_AGG
4002 4002
4003static void iwl4965_set_tx_status(struct iwl_priv *priv, int txq_id, int idx, 4003static void iwl4965_set_tx_status(struct iwl4965_priv *priv, int txq_id, int idx,
4004 u32 status, u32 retry_count, u32 rate) 4004 u32 status, u32 retry_count, u32 rate)
4005{ 4005{
4006 struct ieee80211_tx_status *tx_status = 4006 struct ieee80211_tx_status *tx_status =
@@ -4012,7 +4012,7 @@ static void iwl4965_set_tx_status(struct iwl_priv *priv, int txq_id, int idx,
4012} 4012}
4013 4013
4014 4014
4015static void iwl_sta_modify_enable_tid_tx(struct iwl_priv *priv, 4015static void iwl4965_sta_modify_enable_tid_tx(struct iwl4965_priv *priv,
4016 int sta_id, int tid) 4016 int sta_id, int tid)
4017{ 4017{
4018 unsigned long flags; 4018 unsigned long flags;
@@ -4023,13 +4023,13 @@ static void iwl_sta_modify_enable_tid_tx(struct iwl_priv *priv,
4023 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; 4023 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
4024 spin_unlock_irqrestore(&priv->sta_lock, flags); 4024 spin_unlock_irqrestore(&priv->sta_lock, flags);
4025 4025
4026 iwl_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC); 4026 iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
4027} 4027}
4028 4028
4029 4029
4030static int iwl4965_tx_status_reply_compressed_ba(struct iwl_priv *priv, 4030static int iwl4965_tx_status_reply_compressed_ba(struct iwl4965_priv *priv,
4031 struct iwl_ht_agg *agg, 4031 struct iwl4965_ht_agg *agg,
4032 struct iwl_compressed_ba_resp* 4032 struct iwl4965_compressed_ba_resp*
4033 ba_resp) 4033 ba_resp)
4034 4034
4035{ 4035{
@@ -4079,19 +4079,19 @@ static int iwl4965_tx_status_reply_compressed_ba(struct iwl_priv *priv,
4079 return 0; 4079 return 0;
4080} 4080}
4081 4081
4082static inline int iwl_queue_dec_wrap(int index, int n_bd) 4082static inline int iwl4965_queue_dec_wrap(int index, int n_bd)
4083{ 4083{
4084 return (index == 0) ? n_bd - 1 : index - 1; 4084 return (index == 0) ? n_bd - 1 : index - 1;
4085} 4085}
4086 4086
4087static void iwl4965_rx_reply_compressed_ba(struct iwl_priv *priv, 4087static void iwl4965_rx_reply_compressed_ba(struct iwl4965_priv *priv,
4088 struct iwl_rx_mem_buffer *rxb) 4088 struct iwl4965_rx_mem_buffer *rxb)
4089{ 4089{
4090 struct iwl_rx_packet *pkt = (void *)rxb->skb->data; 4090 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
4091 struct iwl_compressed_ba_resp *ba_resp = &pkt->u.compressed_ba; 4091 struct iwl4965_compressed_ba_resp *ba_resp = &pkt->u.compressed_ba;
4092 int index; 4092 int index;
4093 struct iwl_tx_queue *txq = NULL; 4093 struct iwl4965_tx_queue *txq = NULL;
4094 struct iwl_ht_agg *agg; 4094 struct iwl4965_ht_agg *agg;
4095 u16 ba_resp_scd_flow = le16_to_cpu(ba_resp->scd_flow); 4095 u16 ba_resp_scd_flow = le16_to_cpu(ba_resp->scd_flow);
4096 u16 ba_resp_scd_ssn = le16_to_cpu(ba_resp->scd_ssn); 4096 u16 ba_resp_scd_ssn = le16_to_cpu(ba_resp->scd_ssn);
4097 4097
@@ -4102,7 +4102,7 @@ static void iwl4965_rx_reply_compressed_ba(struct iwl_priv *priv,
4102 4102
4103 txq = &priv->txq[ba_resp_scd_flow]; 4103 txq = &priv->txq[ba_resp_scd_flow];
4104 agg = &priv->stations[ba_resp->sta_id].tid[ba_resp->tid].agg; 4104 agg = &priv->stations[ba_resp->sta_id].tid[ba_resp->tid].agg;
4105 index = iwl_queue_dec_wrap(ba_resp_scd_ssn & 0xff, txq->q.n_bd); 4105 index = iwl4965_queue_dec_wrap(ba_resp_scd_ssn & 0xff, txq->q.n_bd);
4106 4106
4107 /* TODO: Need to get this copy more safely - now good for debug */ 4107 /* TODO: Need to get this copy more safely - now good for debug */
4108/* 4108/*
@@ -4130,20 +4130,20 @@ static void iwl4965_rx_reply_compressed_ba(struct iwl_priv *priv,
4130 iwl4965_tx_status_reply_compressed_ba(priv, agg, ba_resp); 4130 iwl4965_tx_status_reply_compressed_ba(priv, agg, ba_resp);
4131 /* releases all the TFDs until the SSN */ 4131 /* releases all the TFDs until the SSN */
4132 if (txq->q.read_ptr != (ba_resp_scd_ssn & 0xff)) 4132 if (txq->q.read_ptr != (ba_resp_scd_ssn & 0xff))
4133 iwl_tx_queue_reclaim(priv, ba_resp_scd_flow, index); 4133 iwl4965_tx_queue_reclaim(priv, ba_resp_scd_flow, index);
4134 4134
4135} 4135}
4136 4136
4137 4137
4138static void iwl4965_tx_queue_stop_scheduler(struct iwl_priv *priv, u16 txq_id) 4138static void iwl4965_tx_queue_stop_scheduler(struct iwl4965_priv *priv, u16 txq_id)
4139{ 4139{
4140 iwl_write_prph(priv, 4140 iwl4965_write_prph(priv,
4141 KDR_SCD_QUEUE_STATUS_BITS(txq_id), 4141 KDR_SCD_QUEUE_STATUS_BITS(txq_id),
4142 (0 << SCD_QUEUE_STTS_REG_POS_ACTIVE)| 4142 (0 << SCD_QUEUE_STTS_REG_POS_ACTIVE)|
4143 (1 << SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN)); 4143 (1 << SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
4144} 4144}
4145 4145
4146static int iwl4965_tx_queue_set_q2ratid(struct iwl_priv *priv, u16 ra_tid, 4146static int iwl4965_tx_queue_set_q2ratid(struct iwl4965_priv *priv, u16 ra_tid,
4147 u16 txq_id) 4147 u16 txq_id)
4148{ 4148{
4149 u32 tbl_dw_addr; 4149 u32 tbl_dw_addr;
@@ -4155,14 +4155,14 @@ static int iwl4965_tx_queue_set_q2ratid(struct iwl_priv *priv, u16 ra_tid,
4155 tbl_dw_addr = priv->scd_base_addr + 4155 tbl_dw_addr = priv->scd_base_addr +
4156 SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id); 4156 SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
4157 4157
4158 tbl_dw = iwl_read_targ_mem(priv, tbl_dw_addr); 4158 tbl_dw = iwl4965_read_targ_mem(priv, tbl_dw_addr);
4159 4159
4160 if (txq_id & 0x1) 4160 if (txq_id & 0x1)
4161 tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF); 4161 tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
4162 else 4162 else
4163 tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000); 4163 tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
4164 4164
4165 iwl_write_targ_mem(priv, tbl_dw_addr, tbl_dw); 4165 iwl4965_write_targ_mem(priv, tbl_dw_addr, tbl_dw);
4166 4166
4167 return 0; 4167 return 0;
4168} 4168}
@@ -4170,7 +4170,7 @@ static int iwl4965_tx_queue_set_q2ratid(struct iwl_priv *priv, u16 ra_tid,
4170/** 4170/**
4171 * txq_id must be greater than IWL_BACK_QUEUE_FIRST_ID 4171 * txq_id must be greater than IWL_BACK_QUEUE_FIRST_ID
4172 */ 4172 */
4173static int iwl4965_tx_queue_agg_enable(struct iwl_priv *priv, int txq_id, 4173static int iwl4965_tx_queue_agg_enable(struct iwl4965_priv *priv, int txq_id,
4174 int tx_fifo, int sta_id, int tid, 4174 int tx_fifo, int sta_id, int tid,
4175 u16 ssn_idx) 4175 u16 ssn_idx)
4176{ 4176{
@@ -4184,10 +4184,10 @@ static int iwl4965_tx_queue_agg_enable(struct iwl_priv *priv, int txq_id,
4184 4184
4185 ra_tid = BUILD_RAxTID(sta_id, tid); 4185 ra_tid = BUILD_RAxTID(sta_id, tid);
4186 4186
4187 iwl_sta_modify_enable_tid_tx(priv, sta_id, tid); 4187 iwl4965_sta_modify_enable_tid_tx(priv, sta_id, tid);
4188 4188
4189 spin_lock_irqsave(&priv->lock, flags); 4189 spin_lock_irqsave(&priv->lock, flags);
4190 rc = iwl_grab_nic_access(priv); 4190 rc = iwl4965_grab_nic_access(priv);
4191 if (rc) { 4191 if (rc) {
4192 spin_unlock_irqrestore(&priv->lock, flags); 4192 spin_unlock_irqrestore(&priv->lock, flags);
4193 return rc; 4193 return rc;
@@ -4198,7 +4198,7 @@ static int iwl4965_tx_queue_agg_enable(struct iwl_priv *priv, int txq_id,
4198 iwl4965_tx_queue_set_q2ratid(priv, ra_tid, txq_id); 4198 iwl4965_tx_queue_set_q2ratid(priv, ra_tid, txq_id);
4199 4199
4200 4200
4201 iwl_set_bits_prph(priv, KDR_SCD_QUEUECHAIN_SEL, (1<<txq_id)); 4201 iwl4965_set_bits_prph(priv, KDR_SCD_QUEUECHAIN_SEL, (1<<txq_id));
4202 4202
4203 priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff); 4203 priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
4204 priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff); 4204 priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
@@ -4206,21 +4206,21 @@ static int iwl4965_tx_queue_agg_enable(struct iwl_priv *priv, int txq_id,
4206 /* supposes that ssn_idx is valid (!= 0xFFF) */ 4206 /* supposes that ssn_idx is valid (!= 0xFFF) */
4207 iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx); 4207 iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
4208 4208
4209 iwl_write_targ_mem(priv, 4209 iwl4965_write_targ_mem(priv,
4210 priv->scd_base_addr + SCD_CONTEXT_QUEUE_OFFSET(txq_id), 4210 priv->scd_base_addr + SCD_CONTEXT_QUEUE_OFFSET(txq_id),
4211 (SCD_WIN_SIZE << SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) & 4211 (SCD_WIN_SIZE << SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
4212 SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK); 4212 SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
4213 4213
4214 iwl_write_targ_mem(priv, priv->scd_base_addr + 4214 iwl4965_write_targ_mem(priv, priv->scd_base_addr +
4215 SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32), 4215 SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32),
4216 (SCD_FRAME_LIMIT << SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) 4216 (SCD_FRAME_LIMIT << SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS)
4217 & SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK); 4217 & SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
4218 4218
4219 iwl_set_bits_prph(priv, KDR_SCD_INTERRUPT_MASK, (1 << txq_id)); 4219 iwl4965_set_bits_prph(priv, KDR_SCD_INTERRUPT_MASK, (1 << txq_id));
4220 4220
4221 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1); 4221 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1);
4222 4222
4223 iwl_release_nic_access(priv); 4223 iwl4965_release_nic_access(priv);
4224 spin_unlock_irqrestore(&priv->lock, flags); 4224 spin_unlock_irqrestore(&priv->lock, flags);
4225 4225
4226 return 0; 4226 return 0;
@@ -4229,7 +4229,7 @@ static int iwl4965_tx_queue_agg_enable(struct iwl_priv *priv, int txq_id,
4229/** 4229/**
4230 * txq_id must be greater than IWL_BACK_QUEUE_FIRST_ID 4230 * txq_id must be greater than IWL_BACK_QUEUE_FIRST_ID
4231 */ 4231 */
4232static int iwl4965_tx_queue_agg_disable(struct iwl_priv *priv, u16 txq_id, 4232static int iwl4965_tx_queue_agg_disable(struct iwl4965_priv *priv, u16 txq_id,
4233 u16 ssn_idx, u8 tx_fifo) 4233 u16 ssn_idx, u8 tx_fifo)
4234{ 4234{
4235 unsigned long flags; 4235 unsigned long flags;
@@ -4242,7 +4242,7 @@ static int iwl4965_tx_queue_agg_disable(struct iwl_priv *priv, u16 txq_id,
4242 } 4242 }
4243 4243
4244 spin_lock_irqsave(&priv->lock, flags); 4244 spin_lock_irqsave(&priv->lock, flags);
4245 rc = iwl_grab_nic_access(priv); 4245 rc = iwl4965_grab_nic_access(priv);
4246 if (rc) { 4246 if (rc) {
4247 spin_unlock_irqrestore(&priv->lock, flags); 4247 spin_unlock_irqrestore(&priv->lock, flags);
4248 return rc; 4248 return rc;
@@ -4250,18 +4250,18 @@ static int iwl4965_tx_queue_agg_disable(struct iwl_priv *priv, u16 txq_id,
4250 4250
4251 iwl4965_tx_queue_stop_scheduler(priv, txq_id); 4251 iwl4965_tx_queue_stop_scheduler(priv, txq_id);
4252 4252
4253 iwl_clear_bits_prph(priv, KDR_SCD_QUEUECHAIN_SEL, (1 << txq_id)); 4253 iwl4965_clear_bits_prph(priv, KDR_SCD_QUEUECHAIN_SEL, (1 << txq_id));
4254 4254
4255 priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff); 4255 priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
4256 priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff); 4256 priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
4257 /* supposes that ssn_idx is valid (!= 0xFFF) */ 4257 /* supposes that ssn_idx is valid (!= 0xFFF) */
4258 iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx); 4258 iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
4259 4259
4260 iwl_clear_bits_prph(priv, KDR_SCD_INTERRUPT_MASK, (1 << txq_id)); 4260 iwl4965_clear_bits_prph(priv, KDR_SCD_INTERRUPT_MASK, (1 << txq_id));
4261 iwl4965_txq_ctx_deactivate(priv, txq_id); 4261 iwl4965_txq_ctx_deactivate(priv, txq_id);
4262 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0); 4262 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0);
4263 4263
4264 iwl_release_nic_access(priv); 4264 iwl4965_release_nic_access(priv);
4265 spin_unlock_irqrestore(&priv->lock, flags); 4265 spin_unlock_irqrestore(&priv->lock, flags);
4266 4266
4267 return 0; 4267 return 0;
@@ -4272,7 +4272,7 @@ static int iwl4965_tx_queue_agg_disable(struct iwl_priv *priv, u16 txq_id,
4272/* 4272/*
4273 * RATE SCALE CODE 4273 * RATE SCALE CODE
4274 */ 4274 */
4275int iwl4965_init_hw_rates(struct iwl_priv *priv, struct ieee80211_rate *rates) 4275int iwl4965_init_hw_rates(struct iwl4965_priv *priv, struct ieee80211_rate *rates)
4276{ 4276{
4277 return 0; 4277 return 0;
4278} 4278}
@@ -4290,10 +4290,10 @@ int iwl4965_init_hw_rates(struct iwl_priv *priv, struct ieee80211_rate *rates)
4290 * rc80211_simple which is what this driver is currently using. 4290 * rc80211_simple which is what this driver is currently using.
4291 * 4291 *
4292 */ 4292 */
4293void iwl4965_add_station(struct iwl_priv *priv, const u8 *addr, int is_ap) 4293void iwl4965_add_station(struct iwl4965_priv *priv, const u8 *addr, int is_ap)
4294{ 4294{
4295 int i, r; 4295 int i, r;
4296 struct iwl_link_quality_cmd link_cmd = { 4296 struct iwl4965_link_quality_cmd link_cmd = {
4297 .reserved1 = 0, 4297 .reserved1 = 0,
4298 }; 4298 };
4299 u16 rate_flags; 4299 u16 rate_flags;
@@ -4315,8 +4315,8 @@ void iwl4965_add_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
4315 rate_flags |= RATE_MCS_ANT_B_MSK; 4315 rate_flags |= RATE_MCS_ANT_B_MSK;
4316 rate_flags &= ~RATE_MCS_ANT_A_MSK; 4316 rate_flags &= ~RATE_MCS_ANT_A_MSK;
4317 link_cmd.rs_table[i].rate_n_flags = 4317 link_cmd.rs_table[i].rate_n_flags =
4318 iwl_hw_set_rate_n_flags(iwl_rates[r].plcp, rate_flags); 4318 iwl4965_hw_set_rate_n_flags(iwl4965_rates[r].plcp, rate_flags);
4319 r = iwl_get_prev_ieee_rate(r); 4319 r = iwl4965_get_prev_ieee_rate(r);
4320 } 4320 }
4321 4321
4322 link_cmd.general_params.single_stream_ant_msk = 2; 4322 link_cmd.general_params.single_stream_ant_msk = 2;
@@ -4327,18 +4327,18 @@ void iwl4965_add_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
4327 /* Update the rate scaling for control frame Tx to AP */ 4327 /* Update the rate scaling for control frame Tx to AP */
4328 link_cmd.sta_id = is_ap ? IWL_AP_ID : IWL4965_BROADCAST_ID; 4328 link_cmd.sta_id = is_ap ? IWL_AP_ID : IWL4965_BROADCAST_ID;
4329 4329
4330 iwl_send_cmd_pdu(priv, REPLY_TX_LINK_QUALITY_CMD, sizeof(link_cmd), 4330 iwl4965_send_cmd_pdu(priv, REPLY_TX_LINK_QUALITY_CMD, sizeof(link_cmd),
4331 &link_cmd); 4331 &link_cmd);
4332} 4332}
4333 4333
4334#ifdef CONFIG_IWL4965_HT 4334#ifdef CONFIG_IWL4965_HT
4335 4335
4336static u8 iwl_is_channel_extension(struct iwl_priv *priv, int phymode, 4336static u8 iwl4965_is_channel_extension(struct iwl4965_priv *priv, int phymode,
4337 u16 channel, u8 extension_chan_offset) 4337 u16 channel, u8 extension_chan_offset)
4338{ 4338{
4339 const struct iwl_channel_info *ch_info; 4339 const struct iwl4965_channel_info *ch_info;
4340 4340
4341 ch_info = iwl_get_channel_info(priv, phymode, channel); 4341 ch_info = iwl4965_get_channel_info(priv, phymode, channel);
4342 if (!is_channel_valid(ch_info)) 4342 if (!is_channel_valid(ch_info))
4343 return 0; 4343 return 0;
4344 4344
@@ -4352,7 +4352,7 @@ static u8 iwl_is_channel_extension(struct iwl_priv *priv, int phymode,
4352 return 0; 4352 return 0;
4353} 4353}
4354 4354
4355static u8 iwl_is_fat_tx_allowed(struct iwl_priv *priv, 4355static u8 iwl4965_is_fat_tx_allowed(struct iwl4965_priv *priv,
4356 const struct sta_ht_info *ht_info) 4356 const struct sta_ht_info *ht_info)
4357{ 4357{
4358 4358
@@ -4368,20 +4368,20 @@ static u8 iwl_is_fat_tx_allowed(struct iwl_priv *priv,
4368 /* no fat tx allowed on 2.4GHZ */ 4368 /* no fat tx allowed on 2.4GHZ */
4369 if (priv->phymode != MODE_IEEE80211A) 4369 if (priv->phymode != MODE_IEEE80211A)
4370 return 0; 4370 return 0;
4371 return (iwl_is_channel_extension(priv, priv->phymode, 4371 return (iwl4965_is_channel_extension(priv, priv->phymode,
4372 ht_info->control_channel, 4372 ht_info->control_channel,
4373 ht_info->extension_chan_offset)); 4373 ht_info->extension_chan_offset));
4374} 4374}
4375 4375
4376void iwl4965_set_rxon_ht(struct iwl_priv *priv, struct sta_ht_info *ht_info) 4376void iwl4965_set_rxon_ht(struct iwl4965_priv *priv, struct sta_ht_info *ht_info)
4377{ 4377{
4378 struct iwl_rxon_cmd *rxon = &priv->staging_rxon; 4378 struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon;
4379 u32 val; 4379 u32 val;
4380 4380
4381 if (!ht_info->is_ht) 4381 if (!ht_info->is_ht)
4382 return; 4382 return;
4383 4383
4384 if (iwl_is_fat_tx_allowed(priv, ht_info)) 4384 if (iwl4965_is_fat_tx_allowed(priv, ht_info))
4385 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED_MSK; 4385 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED_MSK;
4386 else 4386 else
4387 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK | 4387 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
@@ -4430,7 +4430,7 @@ void iwl4965_set_rxon_ht(struct iwl_priv *priv, struct sta_ht_info *ht_info)
4430 return; 4430 return;
4431} 4431}
4432 4432
4433void iwl4965_set_ht_add_station(struct iwl_priv *priv, u8 index) 4433void iwl4965_set_ht_add_station(struct iwl4965_priv *priv, u8 index)
4434{ 4434{
4435 __le32 sta_flags; 4435 __le32 sta_flags;
4436 struct sta_ht_info *ht_info = &priv->current_assoc_ht; 4436 struct sta_ht_info *ht_info = &priv->current_assoc_ht;
@@ -4456,7 +4456,7 @@ void iwl4965_set_ht_add_station(struct iwl_priv *priv, u8 index)
4456 ht_info->tx_chan_width = IWL_CHANNEL_WIDTH_20MHZ; 4456 ht_info->tx_chan_width = IWL_CHANNEL_WIDTH_20MHZ;
4457 ht_info->chan_width_cap = IWL_CHANNEL_WIDTH_20MHZ; 4457 ht_info->chan_width_cap = IWL_CHANNEL_WIDTH_20MHZ;
4458 4458
4459 if (iwl_is_fat_tx_allowed(priv, ht_info)) { 4459 if (iwl4965_is_fat_tx_allowed(priv, ht_info)) {
4460 sta_flags |= STA_FLG_FAT_EN_MSK; 4460 sta_flags |= STA_FLG_FAT_EN_MSK;
4461 ht_info->chan_width_cap = IWL_CHANNEL_WIDTH_40MHZ; 4461 ht_info->chan_width_cap = IWL_CHANNEL_WIDTH_40MHZ;
4462 if (ht_info->supported_chan_width == IWL_CHANNEL_WIDTH_40MHZ) 4462 if (ht_info->supported_chan_width == IWL_CHANNEL_WIDTH_40MHZ)
@@ -4470,7 +4470,7 @@ void iwl4965_set_ht_add_station(struct iwl_priv *priv, u8 index)
4470 4470
4471#ifdef CONFIG_IWL4965_HT_AGG 4471#ifdef CONFIG_IWL4965_HT_AGG
4472 4472
4473static void iwl4965_sta_modify_add_ba_tid(struct iwl_priv *priv, 4473static void iwl4965_sta_modify_add_ba_tid(struct iwl4965_priv *priv,
4474 int sta_id, int tid, u16 ssn) 4474 int sta_id, int tid, u16 ssn)
4475{ 4475{
4476 unsigned long flags; 4476 unsigned long flags;
@@ -4483,10 +4483,10 @@ static void iwl4965_sta_modify_add_ba_tid(struct iwl_priv *priv,
4483 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; 4483 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
4484 spin_unlock_irqrestore(&priv->sta_lock, flags); 4484 spin_unlock_irqrestore(&priv->sta_lock, flags);
4485 4485
4486 iwl_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC); 4486 iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
4487} 4487}
4488 4488
4489static void iwl4965_sta_modify_del_ba_tid(struct iwl_priv *priv, 4489static void iwl4965_sta_modify_del_ba_tid(struct iwl4965_priv *priv,
4490 int sta_id, int tid) 4490 int sta_id, int tid)
4491{ 4491{
4492 unsigned long flags; 4492 unsigned long flags;
@@ -4498,7 +4498,7 @@ static void iwl4965_sta_modify_del_ba_tid(struct iwl_priv *priv,
4498 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; 4498 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
4499 spin_unlock_irqrestore(&priv->sta_lock, flags); 4499 spin_unlock_irqrestore(&priv->sta_lock, flags);
4500 4500
4501 iwl_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC); 4501 iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
4502} 4502}
4503 4503
4504static const u16 default_tid_to_tx_fifo[] = { 4504static const u16 default_tid_to_tx_fifo[] = {
@@ -4521,7 +4521,7 @@ static const u16 default_tid_to_tx_fifo[] = {
4521 IWL_TX_FIFO_AC3 4521 IWL_TX_FIFO_AC3
4522}; 4522};
4523 4523
4524static int iwl_txq_ctx_activate_free(struct iwl_priv *priv) 4524static int iwl4965_txq_ctx_activate_free(struct iwl4965_priv *priv)
4525{ 4525{
4526 int txq_id; 4526 int txq_id;
4527 4527
@@ -4531,17 +4531,17 @@ static int iwl_txq_ctx_activate_free(struct iwl_priv *priv)
4531 return -1; 4531 return -1;
4532} 4532}
4533 4533
4534int iwl_mac_ht_tx_agg_start(struct ieee80211_hw *hw, u8 *da, u16 tid, 4534int iwl4965_mac_ht_tx_agg_start(struct ieee80211_hw *hw, u8 *da, u16 tid,
4535 u16 *start_seq_num) 4535 u16 *start_seq_num)
4536{ 4536{
4537 4537
4538 struct iwl_priv *priv = hw->priv; 4538 struct iwl4965_priv *priv = hw->priv;
4539 int sta_id; 4539 int sta_id;
4540 int tx_fifo; 4540 int tx_fifo;
4541 int txq_id; 4541 int txq_id;
4542 int ssn = -1; 4542 int ssn = -1;
4543 unsigned long flags; 4543 unsigned long flags;
4544 struct iwl_tid_data *tid_data; 4544 struct iwl4965_tid_data *tid_data;
4545 DECLARE_MAC_BUF(mac); 4545 DECLARE_MAC_BUF(mac);
4546 4546
4547 if (likely(tid < ARRAY_SIZE(default_tid_to_tx_fifo))) 4547 if (likely(tid < ARRAY_SIZE(default_tid_to_tx_fifo)))
@@ -4549,14 +4549,14 @@ int iwl_mac_ht_tx_agg_start(struct ieee80211_hw *hw, u8 *da, u16 tid,
4549 else 4549 else
4550 return -EINVAL; 4550 return -EINVAL;
4551 4551
4552 IWL_WARNING("iwl-AGG iwl_mac_ht_tx_agg_start on da=%s" 4552 IWL_WARNING("iwl-AGG iwl4965_mac_ht_tx_agg_start on da=%s"
4553 " tid=%d\n", print_mac(mac, da), tid); 4553 " tid=%d\n", print_mac(mac, da), tid);
4554 4554
4555 sta_id = iwl_hw_find_station(priv, da); 4555 sta_id = iwl4965_hw_find_station(priv, da);
4556 if (sta_id == IWL_INVALID_STATION) 4556 if (sta_id == IWL_INVALID_STATION)
4557 return -ENXIO; 4557 return -ENXIO;
4558 4558
4559 txq_id = iwl_txq_ctx_activate_free(priv); 4559 txq_id = iwl4965_txq_ctx_activate_free(priv);
4560 if (txq_id == -1) 4560 if (txq_id == -1)
4561 return -ENXIO; 4561 return -ENXIO;
4562 4562
@@ -4573,13 +4573,13 @@ int iwl_mac_ht_tx_agg_start(struct ieee80211_hw *hw, u8 *da, u16 tid,
4573} 4573}
4574 4574
4575 4575
4576int iwl_mac_ht_tx_agg_stop(struct ieee80211_hw *hw, u8 *da, u16 tid, 4576int iwl4965_mac_ht_tx_agg_stop(struct ieee80211_hw *hw, u8 *da, u16 tid,
4577 int generator) 4577 int generator)
4578{ 4578{
4579 4579
4580 struct iwl_priv *priv = hw->priv; 4580 struct iwl4965_priv *priv = hw->priv;
4581 int tx_fifo_id, txq_id, sta_id, ssn = -1; 4581 int tx_fifo_id, txq_id, sta_id, ssn = -1;
4582 struct iwl_tid_data *tid_data; 4582 struct iwl4965_tid_data *tid_data;
4583 int rc; 4583 int rc;
4584 DECLARE_MAC_BUF(mac); 4584 DECLARE_MAC_BUF(mac);
4585 4585
@@ -4593,7 +4593,7 @@ int iwl_mac_ht_tx_agg_stop(struct ieee80211_hw *hw, u8 *da, u16 tid,
4593 else 4593 else
4594 return -EINVAL; 4594 return -EINVAL;
4595 4595
4596 sta_id = iwl_hw_find_station(priv, da); 4596 sta_id = iwl4965_hw_find_station(priv, da);
4597 4597
4598 if (sta_id == IWL_INVALID_STATION) 4598 if (sta_id == IWL_INVALID_STATION)
4599 return -ENXIO; 4599 return -ENXIO;
@@ -4608,36 +4608,36 @@ int iwl_mac_ht_tx_agg_stop(struct ieee80211_hw *hw, u8 *da, u16 tid,
4608 return rc; 4608 return rc;
4609 4609
4610 iwl4965_ba_status(priv, tid, BA_STATUS_INITIATOR_DELBA); 4610 iwl4965_ba_status(priv, tid, BA_STATUS_INITIATOR_DELBA);
4611 IWL_DEBUG_INFO("iwl_mac_ht_tx_agg_stop on da=%s tid=%d\n", 4611 IWL_DEBUG_INFO("iwl4965_mac_ht_tx_agg_stop on da=%s tid=%d\n",
4612 print_mac(mac, da), tid); 4612 print_mac(mac, da), tid);
4613 4613
4614 return 0; 4614 return 0;
4615} 4615}
4616 4616
4617int iwl_mac_ht_rx_agg_start(struct ieee80211_hw *hw, u8 *da, 4617int iwl4965_mac_ht_rx_agg_start(struct ieee80211_hw *hw, u8 *da,
4618 u16 tid, u16 start_seq_num) 4618 u16 tid, u16 start_seq_num)
4619{ 4619{
4620 struct iwl_priv *priv = hw->priv; 4620 struct iwl4965_priv *priv = hw->priv;
4621 int sta_id; 4621 int sta_id;
4622 DECLARE_MAC_BUF(mac); 4622 DECLARE_MAC_BUF(mac);
4623 4623
4624 IWL_WARNING("iwl-AGG iwl_mac_ht_rx_agg_start on da=%s" 4624 IWL_WARNING("iwl-AGG iwl4965_mac_ht_rx_agg_start on da=%s"
4625 " tid=%d\n", print_mac(mac, da), tid); 4625 " tid=%d\n", print_mac(mac, da), tid);
4626 sta_id = iwl_hw_find_station(priv, da); 4626 sta_id = iwl4965_hw_find_station(priv, da);
4627 iwl4965_sta_modify_add_ba_tid(priv, sta_id, tid, start_seq_num); 4627 iwl4965_sta_modify_add_ba_tid(priv, sta_id, tid, start_seq_num);
4628 return 0; 4628 return 0;
4629} 4629}
4630 4630
4631int iwl_mac_ht_rx_agg_stop(struct ieee80211_hw *hw, u8 *da, 4631int iwl4965_mac_ht_rx_agg_stop(struct ieee80211_hw *hw, u8 *da,
4632 u16 tid, int generator) 4632 u16 tid, int generator)
4633{ 4633{
4634 struct iwl_priv *priv = hw->priv; 4634 struct iwl4965_priv *priv = hw->priv;
4635 int sta_id; 4635 int sta_id;
4636 DECLARE_MAC_BUF(mac); 4636 DECLARE_MAC_BUF(mac);
4637 4637
4638 IWL_WARNING("iwl-AGG iwl_mac_ht_rx_agg_stop on da=%s tid=%d\n", 4638 IWL_WARNING("iwl-AGG iwl4965_mac_ht_rx_agg_stop on da=%s tid=%d\n",
4639 print_mac(mac, da), tid); 4639 print_mac(mac, da), tid);
4640 sta_id = iwl_hw_find_station(priv, da); 4640 sta_id = iwl4965_hw_find_station(priv, da);
4641 iwl4965_sta_modify_del_ba_tid(priv, sta_id, tid); 4641 iwl4965_sta_modify_del_ba_tid(priv, sta_id, tid);
4642 return 0; 4642 return 0;
4643} 4643}
@@ -4646,7 +4646,7 @@ int iwl_mac_ht_rx_agg_stop(struct ieee80211_hw *hw, u8 *da,
4646#endif /* CONFIG_IWL4965_HT */ 4646#endif /* CONFIG_IWL4965_HT */
4647 4647
4648/* Set up 4965-specific Rx frame reply handlers */ 4648/* Set up 4965-specific Rx frame reply handlers */
4649void iwl_hw_rx_handler_setup(struct iwl_priv *priv) 4649void iwl4965_hw_rx_handler_setup(struct iwl4965_priv *priv)
4650{ 4650{
4651 /* Legacy Rx frames */ 4651 /* Legacy Rx frames */
4652 priv->rx_handlers[REPLY_4965_RX] = iwl4965_rx_reply_rx; 4652 priv->rx_handlers[REPLY_4965_RX] = iwl4965_rx_reply_rx;
@@ -4665,7 +4665,7 @@ void iwl_hw_rx_handler_setup(struct iwl_priv *priv)
4665#endif /* CONFIG_IWL4965_HT */ 4665#endif /* CONFIG_IWL4965_HT */
4666} 4666}
4667 4667
4668void iwl_hw_setup_deferred_work(struct iwl_priv *priv) 4668void iwl4965_hw_setup_deferred_work(struct iwl4965_priv *priv)
4669{ 4669{
4670 INIT_WORK(&priv->txpower_work, iwl4965_bg_txpower_work); 4670 INIT_WORK(&priv->txpower_work, iwl4965_bg_txpower_work);
4671 INIT_WORK(&priv->statistics_work, iwl4965_bg_statistics_work); 4671 INIT_WORK(&priv->statistics_work, iwl4965_bg_statistics_work);
@@ -4682,28 +4682,28 @@ void iwl_hw_setup_deferred_work(struct iwl_priv *priv)
4682 priv->statistics_periodic.function = iwl4965_bg_statistics_periodic; 4682 priv->statistics_periodic.function = iwl4965_bg_statistics_periodic;
4683} 4683}
4684 4684
4685void iwl_hw_cancel_deferred_work(struct iwl_priv *priv) 4685void iwl4965_hw_cancel_deferred_work(struct iwl4965_priv *priv)
4686{ 4686{
4687 del_timer_sync(&priv->statistics_periodic); 4687 del_timer_sync(&priv->statistics_periodic);
4688 4688
4689 cancel_delayed_work(&priv->init_alive_start); 4689 cancel_delayed_work(&priv->init_alive_start);
4690} 4690}
4691 4691
4692struct pci_device_id iwl_hw_card_ids[] = { 4692struct pci_device_id iwl4965_hw_card_ids[] = {
4693 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x4229)}, 4693 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x4229)},
4694 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x4230)}, 4694 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x4230)},
4695 {0} 4695 {0}
4696}; 4696};
4697 4697
4698int iwl_eeprom_acquire_semaphore(struct iwl_priv *priv) 4698int iwl4965_eeprom_acquire_semaphore(struct iwl4965_priv *priv)
4699{ 4699{
4700 u16 count; 4700 u16 count;
4701 int rc; 4701 int rc;
4702 4702
4703 for (count = 0; count < EEPROM_SEM_RETRY_LIMIT; count++) { 4703 for (count = 0; count < EEPROM_SEM_RETRY_LIMIT; count++) {
4704 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG, 4704 iwl4965_set_bit(priv, CSR_HW_IF_CONFIG_REG,
4705 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM); 4705 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
4706 rc = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG, 4706 rc = iwl4965_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
4707 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM, 4707 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
4708 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM, 4708 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
4709 EEPROM_SEM_TIMEOUT); 4709 EEPROM_SEM_TIMEOUT);
@@ -4717,11 +4717,11 @@ int iwl_eeprom_acquire_semaphore(struct iwl_priv *priv)
4717 return rc; 4717 return rc;
4718} 4718}
4719 4719
4720inline void iwl_eeprom_release_semaphore(struct iwl_priv *priv) 4720inline void iwl4965_eeprom_release_semaphore(struct iwl4965_priv *priv)
4721{ 4721{
4722 iwl_clear_bit(priv, CSR_HW_IF_CONFIG_REG, 4722 iwl4965_clear_bit(priv, CSR_HW_IF_CONFIG_REG,
4723 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM); 4723 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
4724} 4724}
4725 4725
4726 4726
4727MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids); 4727MODULE_DEVICE_TABLE(pci, iwl4965_hw_card_ids);
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-11 07:52:28 -0500