diff options
author | Stanislaw Gruszka <sgruszka@redhat.com> | 2011-11-15 08:45:59 -0500 |
---|---|---|
committer | Stanislaw Gruszka <sgruszka@redhat.com> | 2011-11-15 08:45:59 -0500 |
commit | e7392364fcd1004a5e495f15cf21b1e0ef874215 (patch) | |
tree | 5275a1aed29aedc11e09c6bcfff331b90f95686e /drivers/net/wireless/iwlegacy | |
parent | f02579e3a81954c8f0944c7d2a95159ee48f052d (diff) |
iwlegacy: indentions and whitespaces
Process iwlegacy source files using:
indent -npro -l500 -nhnl
indent -npro -kr -i8 -ts8 -sob -l80 -nbbo -ss -ncs -cp1 -il0 -psl
Plus manual compilation fixes.
Signed-off-by: Stanislaw Gruszka <sgruszka@redhat.com>
Diffstat (limited to 'drivers/net/wireless/iwlegacy')
-rw-r--r-- | drivers/net/wireless/iwlegacy/3945-debug.c | 698 | ||||
-rw-r--r-- | drivers/net/wireless/iwlegacy/3945-mac.c | 1143 | ||||
-rw-r--r-- | drivers/net/wireless/iwlegacy/3945-rs.c | 252 | ||||
-rw-r--r-- | drivers/net/wireless/iwlegacy/3945.c | 920 | ||||
-rw-r--r-- | drivers/net/wireless/iwlegacy/3945.h | 115 | ||||
-rw-r--r-- | drivers/net/wireless/iwlegacy/4965-calib.c | 354 | ||||
-rw-r--r-- | drivers/net/wireless/iwlegacy/4965-debug.c | 1178 | ||||
-rw-r--r-- | drivers/net/wireless/iwlegacy/4965-mac.c | 2173 | ||||
-rw-r--r-- | drivers/net/wireless/iwlegacy/4965-rs.c | 1094 | ||||
-rw-r--r-- | drivers/net/wireless/iwlegacy/4965.c | 741 | ||||
-rw-r--r-- | drivers/net/wireless/iwlegacy/4965.h | 184 | ||||
-rw-r--r-- | drivers/net/wireless/iwlegacy/commands.h | 123 | ||||
-rw-r--r-- | drivers/net/wireless/iwlegacy/common.c | 1927 | ||||
-rw-r--r-- | drivers/net/wireless/iwlegacy/common.h | 934 | ||||
-rw-r--r-- | drivers/net/wireless/iwlegacy/csr.h | 69 | ||||
-rw-r--r-- | drivers/net/wireless/iwlegacy/debug.c | 965 | ||||
-rw-r--r-- | drivers/net/wireless/iwlegacy/prph.h | 25 |
17 files changed, 6439 insertions, 6456 deletions
diff --git a/drivers/net/wireless/iwlegacy/3945-debug.c b/drivers/net/wireless/iwlegacy/3945-debug.c index 1a690a046b50..382af2e958eb 100644 --- a/drivers/net/wireless/iwlegacy/3945-debug.c +++ b/drivers/net/wireless/iwlegacy/3945-debug.c | |||
@@ -29,39 +29,37 @@ | |||
29 | #include "common.h" | 29 | #include "common.h" |
30 | #include "3945.h" | 30 | #include "3945.h" |
31 | 31 | ||
32 | static int il3945_stats_flag(struct il_priv *il, char *buf, int bufsz) | 32 | static int |
33 | il3945_stats_flag(struct il_priv *il, char *buf, int bufsz) | ||
33 | { | 34 | { |
34 | int p = 0; | 35 | int p = 0; |
35 | 36 | ||
36 | p += scnprintf(buf + p, bufsz - p, "Statistics Flag(0x%X):\n", | 37 | p += scnprintf(buf + p, bufsz - p, "Statistics Flag(0x%X):\n", |
37 | le32_to_cpu(il->_3945.stats.flag)); | 38 | le32_to_cpu(il->_3945.stats.flag)); |
38 | if (le32_to_cpu(il->_3945.stats.flag) & | 39 | if (le32_to_cpu(il->_3945.stats.flag) & UCODE_STATS_CLEAR_MSK) |
39 | UCODE_STATS_CLEAR_MSK) | ||
40 | p += scnprintf(buf + p, bufsz - p, | 40 | p += scnprintf(buf + p, bufsz - p, |
41 | "\tStatistics have been cleared\n"); | 41 | "\tStatistics have been cleared\n"); |
42 | p += scnprintf(buf + p, bufsz - p, "\tOperational Frequency: %s\n", | 42 | p += scnprintf(buf + p, bufsz - p, "\tOperational Frequency: %s\n", |
43 | (le32_to_cpu(il->_3945.stats.flag) & | 43 | (le32_to_cpu(il->_3945.stats.flag) & |
44 | UCODE_STATS_FREQUENCY_MSK) | 44 | UCODE_STATS_FREQUENCY_MSK) ? "2.4 GHz" : "5.2 GHz"); |
45 | ? "2.4 GHz" : "5.2 GHz"); | ||
46 | p += scnprintf(buf + p, bufsz - p, "\tTGj Narrow Band: %s\n", | 45 | p += scnprintf(buf + p, bufsz - p, "\tTGj Narrow Band: %s\n", |
47 | (le32_to_cpu(il->_3945.stats.flag) & | 46 | (le32_to_cpu(il->_3945.stats.flag) & |
48 | UCODE_STATS_NARROW_BAND_MSK) | 47 | UCODE_STATS_NARROW_BAND_MSK) ? "enabled" : "disabled"); |
49 | ? "enabled" : "disabled"); | ||
50 | return p; | 48 | return p; |
51 | } | 49 | } |
52 | 50 | ||
53 | ssize_t il3945_ucode_rx_stats_read(struct file *file, | 51 | ssize_t |
54 | char __user *user_buf, | 52 | il3945_ucode_rx_stats_read(struct file * file, char __user * user_buf, |
55 | size_t count, loff_t *ppos) | 53 | size_t count, loff_t * ppos) |
56 | { | 54 | { |
57 | struct il_priv *il = file->private_data; | 55 | struct il_priv *il = file->private_data; |
58 | int pos = 0; | 56 | int pos = 0; |
59 | char *buf; | 57 | char *buf; |
60 | int bufsz = sizeof(struct iwl39_stats_rx_phy) * 40 + | 58 | int bufsz = |
61 | sizeof(struct iwl39_stats_rx_non_phy) * 40 + 400; | 59 | sizeof(struct iwl39_stats_rx_phy) * 40 + |
60 | sizeof(struct iwl39_stats_rx_non_phy) * 40 + 400; | ||
62 | ssize_t ret; | 61 | ssize_t ret; |
63 | struct iwl39_stats_rx_phy *ofdm, *accum_ofdm, *delta_ofdm, | 62 | struct iwl39_stats_rx_phy *ofdm, *accum_ofdm, *delta_ofdm, *max_ofdm; |
64 | *max_ofdm; | ||
65 | struct iwl39_stats_rx_phy *cck, *accum_cck, *delta_cck, *max_cck; | 63 | struct iwl39_stats_rx_phy *cck, *accum_cck, *delta_cck, *max_cck; |
66 | struct iwl39_stats_rx_non_phy *general, *accum_general; | 64 | struct iwl39_stats_rx_non_phy *general, *accum_general; |
67 | struct iwl39_stats_rx_non_phy *delta_general, *max_general; | 65 | struct iwl39_stats_rx_non_phy *delta_general, *max_general; |
@@ -94,240 +92,230 @@ ssize_t il3945_ucode_rx_stats_read(struct file *file, | |||
94 | max_general = &il->_3945.max_delta.rx.general; | 92 | max_general = &il->_3945.max_delta.rx.general; |
95 | 93 | ||
96 | pos += il3945_stats_flag(il, buf, bufsz); | 94 | pos += il3945_stats_flag(il, buf, bufsz); |
97 | pos += scnprintf(buf + pos, bufsz - pos, "%-32s current" | 95 | pos += |
98 | "acumulative delta max\n", | 96 | scnprintf(buf + pos, bufsz - pos, |
99 | "Statistics_Rx - OFDM:"); | 97 | "%-32s current" |
100 | pos += scnprintf(buf + pos, bufsz - pos, | 98 | "acumulative delta max\n", |
101 | " %-30s %10u %10u %10u %10u\n", | 99 | "Statistics_Rx - OFDM:"); |
102 | "ina_cnt:", le32_to_cpu(ofdm->ina_cnt), | 100 | pos += |
103 | accum_ofdm->ina_cnt, | 101 | scnprintf(buf + pos, bufsz - pos, |
104 | delta_ofdm->ina_cnt, max_ofdm->ina_cnt); | 102 | " %-30s %10u %10u %10u %10u\n", "ina_cnt:", |
105 | pos += scnprintf(buf + pos, bufsz - pos, | 103 | le32_to_cpu(ofdm->ina_cnt), accum_ofdm->ina_cnt, |
106 | " %-30s %10u %10u %10u %10u\n", | 104 | delta_ofdm->ina_cnt, max_ofdm->ina_cnt); |
107 | "fina_cnt:", | 105 | pos += |
108 | le32_to_cpu(ofdm->fina_cnt), accum_ofdm->fina_cnt, | 106 | scnprintf(buf + pos, bufsz - pos, |
109 | delta_ofdm->fina_cnt, max_ofdm->fina_cnt); | 107 | " %-30s %10u %10u %10u %10u\n", "fina_cnt:", |
110 | pos += scnprintf(buf + pos, bufsz - pos, | 108 | le32_to_cpu(ofdm->fina_cnt), accum_ofdm->fina_cnt, |
111 | " %-30s %10u %10u %10u %10u\n", "plcp_err:", | 109 | delta_ofdm->fina_cnt, max_ofdm->fina_cnt); |
112 | le32_to_cpu(ofdm->plcp_err), accum_ofdm->plcp_err, | 110 | pos += |
113 | delta_ofdm->plcp_err, max_ofdm->plcp_err); | 111 | scnprintf(buf + pos, bufsz - pos, |
114 | pos += scnprintf(buf + pos, bufsz - pos, | 112 | " %-30s %10u %10u %10u %10u\n", "plcp_err:", |
115 | " %-30s %10u %10u %10u %10u\n", "crc32_err:", | 113 | le32_to_cpu(ofdm->plcp_err), accum_ofdm->plcp_err, |
116 | le32_to_cpu(ofdm->crc32_err), accum_ofdm->crc32_err, | 114 | delta_ofdm->plcp_err, max_ofdm->plcp_err); |
117 | delta_ofdm->crc32_err, max_ofdm->crc32_err); | 115 | pos += |
118 | pos += scnprintf(buf + pos, bufsz - pos, | 116 | scnprintf(buf + pos, bufsz - pos, |
119 | " %-30s %10u %10u %10u %10u\n", "overrun_err:", | 117 | " %-30s %10u %10u %10u %10u\n", "crc32_err:", |
120 | le32_to_cpu(ofdm->overrun_err), | 118 | le32_to_cpu(ofdm->crc32_err), accum_ofdm->crc32_err, |
121 | accum_ofdm->overrun_err, delta_ofdm->overrun_err, | 119 | delta_ofdm->crc32_err, max_ofdm->crc32_err); |
122 | max_ofdm->overrun_err); | 120 | pos += |
123 | pos += scnprintf(buf + pos, bufsz - pos, | 121 | scnprintf(buf + pos, bufsz - pos, |
124 | " %-30s %10u %10u %10u %10u\n", | 122 | " %-30s %10u %10u %10u %10u\n", "overrun_err:", |
125 | "early_overrun_err:", | 123 | le32_to_cpu(ofdm->overrun_err), accum_ofdm->overrun_err, |
126 | le32_to_cpu(ofdm->early_overrun_err), | 124 | delta_ofdm->overrun_err, max_ofdm->overrun_err); |
127 | accum_ofdm->early_overrun_err, | 125 | pos += |
128 | delta_ofdm->early_overrun_err, | 126 | scnprintf(buf + pos, bufsz - pos, |
129 | max_ofdm->early_overrun_err); | 127 | " %-30s %10u %10u %10u %10u\n", "early_overrun_err:", |
130 | pos += scnprintf(buf + pos, bufsz - pos, | 128 | le32_to_cpu(ofdm->early_overrun_err), |
131 | " %-30s %10u %10u %10u %10u\n", | 129 | accum_ofdm->early_overrun_err, |
132 | "crc32_good:", le32_to_cpu(ofdm->crc32_good), | 130 | delta_ofdm->early_overrun_err, |
133 | accum_ofdm->crc32_good, delta_ofdm->crc32_good, | 131 | max_ofdm->early_overrun_err); |
134 | max_ofdm->crc32_good); | 132 | pos += |
135 | pos += scnprintf(buf + pos, bufsz - pos, | 133 | scnprintf(buf + pos, bufsz - pos, |
136 | " %-30s %10u %10u %10u %10u\n", "false_alarm_cnt:", | 134 | " %-30s %10u %10u %10u %10u\n", "crc32_good:", |
137 | le32_to_cpu(ofdm->false_alarm_cnt), | 135 | le32_to_cpu(ofdm->crc32_good), accum_ofdm->crc32_good, |
138 | accum_ofdm->false_alarm_cnt, | 136 | delta_ofdm->crc32_good, max_ofdm->crc32_good); |
139 | delta_ofdm->false_alarm_cnt, | 137 | pos += |
140 | max_ofdm->false_alarm_cnt); | 138 | scnprintf(buf + pos, bufsz - pos, |
141 | pos += scnprintf(buf + pos, bufsz - pos, | 139 | " %-30s %10u %10u %10u %10u\n", "false_alarm_cnt:", |
142 | " %-30s %10u %10u %10u %10u\n", | 140 | le32_to_cpu(ofdm->false_alarm_cnt), |
143 | "fina_sync_err_cnt:", | 141 | accum_ofdm->false_alarm_cnt, delta_ofdm->false_alarm_cnt, |
144 | le32_to_cpu(ofdm->fina_sync_err_cnt), | 142 | max_ofdm->false_alarm_cnt); |
145 | accum_ofdm->fina_sync_err_cnt, | 143 | pos += |
146 | delta_ofdm->fina_sync_err_cnt, | 144 | scnprintf(buf + pos, bufsz - pos, |
147 | max_ofdm->fina_sync_err_cnt); | 145 | " %-30s %10u %10u %10u %10u\n", "fina_sync_err_cnt:", |
148 | pos += scnprintf(buf + pos, bufsz - pos, | 146 | le32_to_cpu(ofdm->fina_sync_err_cnt), |
149 | " %-30s %10u %10u %10u %10u\n", | 147 | accum_ofdm->fina_sync_err_cnt, |
150 | "sfd_timeout:", | 148 | delta_ofdm->fina_sync_err_cnt, |
151 | le32_to_cpu(ofdm->sfd_timeout), | 149 | max_ofdm->fina_sync_err_cnt); |
152 | accum_ofdm->sfd_timeout, | 150 | pos += |
153 | delta_ofdm->sfd_timeout, | 151 | scnprintf(buf + pos, bufsz - pos, |
154 | max_ofdm->sfd_timeout); | 152 | " %-30s %10u %10u %10u %10u\n", "sfd_timeout:", |
155 | pos += scnprintf(buf + pos, bufsz - pos, | 153 | le32_to_cpu(ofdm->sfd_timeout), accum_ofdm->sfd_timeout, |
156 | " %-30s %10u %10u %10u %10u\n", | 154 | delta_ofdm->sfd_timeout, max_ofdm->sfd_timeout); |
157 | "fina_timeout:", | 155 | pos += |
158 | le32_to_cpu(ofdm->fina_timeout), | 156 | scnprintf(buf + pos, bufsz - pos, |
159 | accum_ofdm->fina_timeout, | 157 | " %-30s %10u %10u %10u %10u\n", "fina_timeout:", |
160 | delta_ofdm->fina_timeout, | 158 | le32_to_cpu(ofdm->fina_timeout), accum_ofdm->fina_timeout, |
161 | max_ofdm->fina_timeout); | 159 | delta_ofdm->fina_timeout, max_ofdm->fina_timeout); |
162 | pos += scnprintf(buf + pos, bufsz - pos, | 160 | pos += |
163 | " %-30s %10u %10u %10u %10u\n", | 161 | scnprintf(buf + pos, bufsz - pos, |
164 | "unresponded_rts:", | 162 | " %-30s %10u %10u %10u %10u\n", "unresponded_rts:", |
165 | le32_to_cpu(ofdm->unresponded_rts), | 163 | le32_to_cpu(ofdm->unresponded_rts), |
166 | accum_ofdm->unresponded_rts, | 164 | accum_ofdm->unresponded_rts, delta_ofdm->unresponded_rts, |
167 | delta_ofdm->unresponded_rts, | 165 | max_ofdm->unresponded_rts); |
168 | max_ofdm->unresponded_rts); | 166 | pos += |
169 | pos += scnprintf(buf + pos, bufsz - pos, | 167 | scnprintf(buf + pos, bufsz - pos, |
170 | " %-30s %10u %10u %10u %10u\n", | 168 | " %-30s %10u %10u %10u %10u\n", |
171 | "rxe_frame_lmt_ovrun:", | 169 | "rxe_frame_lmt_ovrun:", |
172 | le32_to_cpu(ofdm->rxe_frame_limit_overrun), | 170 | le32_to_cpu(ofdm->rxe_frame_limit_overrun), |
173 | accum_ofdm->rxe_frame_limit_overrun, | 171 | accum_ofdm->rxe_frame_limit_overrun, |
174 | delta_ofdm->rxe_frame_limit_overrun, | 172 | delta_ofdm->rxe_frame_limit_overrun, |
175 | max_ofdm->rxe_frame_limit_overrun); | 173 | max_ofdm->rxe_frame_limit_overrun); |
176 | pos += scnprintf(buf + pos, bufsz - pos, | 174 | pos += |
177 | " %-30s %10u %10u %10u %10u\n", | 175 | scnprintf(buf + pos, bufsz - pos, |
178 | "sent_ack_cnt:", | 176 | " %-30s %10u %10u %10u %10u\n", "sent_ack_cnt:", |
179 | le32_to_cpu(ofdm->sent_ack_cnt), | 177 | le32_to_cpu(ofdm->sent_ack_cnt), accum_ofdm->sent_ack_cnt, |
180 | accum_ofdm->sent_ack_cnt, | 178 | delta_ofdm->sent_ack_cnt, max_ofdm->sent_ack_cnt); |
181 | delta_ofdm->sent_ack_cnt, | 179 | pos += |
182 | max_ofdm->sent_ack_cnt); | 180 | scnprintf(buf + pos, bufsz - pos, |
183 | pos += scnprintf(buf + pos, bufsz - pos, | 181 | " %-30s %10u %10u %10u %10u\n", "sent_cts_cnt:", |
184 | " %-30s %10u %10u %10u %10u\n", | 182 | le32_to_cpu(ofdm->sent_cts_cnt), accum_ofdm->sent_cts_cnt, |
185 | "sent_cts_cnt:", | 183 | delta_ofdm->sent_cts_cnt, max_ofdm->sent_cts_cnt); |
186 | le32_to_cpu(ofdm->sent_cts_cnt), | ||
187 | accum_ofdm->sent_cts_cnt, | ||
188 | delta_ofdm->sent_cts_cnt, max_ofdm->sent_cts_cnt); | ||
189 | 184 | ||
190 | pos += scnprintf(buf + pos, bufsz - pos, "%-32s current" | 185 | pos += |
191 | "acumulative delta max\n", | 186 | scnprintf(buf + pos, bufsz - pos, |
192 | "Statistics_Rx - CCK:"); | 187 | "%-32s current" |
193 | pos += scnprintf(buf + pos, bufsz - pos, | 188 | "acumulative delta max\n", |
194 | " %-30s %10u %10u %10u %10u\n", | 189 | "Statistics_Rx - CCK:"); |
195 | "ina_cnt:", | 190 | pos += |
196 | le32_to_cpu(cck->ina_cnt), accum_cck->ina_cnt, | 191 | scnprintf(buf + pos, bufsz - pos, |
197 | delta_cck->ina_cnt, max_cck->ina_cnt); | 192 | " %-30s %10u %10u %10u %10u\n", "ina_cnt:", |
198 | pos += scnprintf(buf + pos, bufsz - pos, | 193 | le32_to_cpu(cck->ina_cnt), accum_cck->ina_cnt, |
199 | " %-30s %10u %10u %10u %10u\n", | 194 | delta_cck->ina_cnt, max_cck->ina_cnt); |
200 | "fina_cnt:", | 195 | pos += |
201 | le32_to_cpu(cck->fina_cnt), accum_cck->fina_cnt, | 196 | scnprintf(buf + pos, bufsz - pos, |
202 | delta_cck->fina_cnt, max_cck->fina_cnt); | 197 | " %-30s %10u %10u %10u %10u\n", "fina_cnt:", |
203 | pos += scnprintf(buf + pos, bufsz - pos, | 198 | le32_to_cpu(cck->fina_cnt), accum_cck->fina_cnt, |
204 | " %-30s %10u %10u %10u %10u\n", | 199 | delta_cck->fina_cnt, max_cck->fina_cnt); |
205 | "plcp_err:", | 200 | pos += |
206 | le32_to_cpu(cck->plcp_err), accum_cck->plcp_err, | 201 | scnprintf(buf + pos, bufsz - pos, |
207 | delta_cck->plcp_err, max_cck->plcp_err); | 202 | " %-30s %10u %10u %10u %10u\n", "plcp_err:", |
208 | pos += scnprintf(buf + pos, bufsz - pos, | 203 | le32_to_cpu(cck->plcp_err), accum_cck->plcp_err, |
209 | " %-30s %10u %10u %10u %10u\n", | 204 | delta_cck->plcp_err, max_cck->plcp_err); |
210 | "crc32_err:", | 205 | pos += |
211 | le32_to_cpu(cck->crc32_err), accum_cck->crc32_err, | 206 | scnprintf(buf + pos, bufsz - pos, |
212 | delta_cck->crc32_err, max_cck->crc32_err); | 207 | " %-30s %10u %10u %10u %10u\n", "crc32_err:", |
213 | pos += scnprintf(buf + pos, bufsz - pos, | 208 | le32_to_cpu(cck->crc32_err), accum_cck->crc32_err, |
214 | " %-30s %10u %10u %10u %10u\n", | 209 | delta_cck->crc32_err, max_cck->crc32_err); |
215 | "overrun_err:", | 210 | pos += |
216 | le32_to_cpu(cck->overrun_err), | 211 | scnprintf(buf + pos, bufsz - pos, |
217 | accum_cck->overrun_err, | 212 | " %-30s %10u %10u %10u %10u\n", "overrun_err:", |
218 | delta_cck->overrun_err, max_cck->overrun_err); | 213 | le32_to_cpu(cck->overrun_err), accum_cck->overrun_err, |
219 | pos += scnprintf(buf + pos, bufsz - pos, | 214 | delta_cck->overrun_err, max_cck->overrun_err); |
220 | " %-30s %10u %10u %10u %10u\n", | 215 | pos += |
221 | "early_overrun_err:", | 216 | scnprintf(buf + pos, bufsz - pos, |
222 | le32_to_cpu(cck->early_overrun_err), | 217 | " %-30s %10u %10u %10u %10u\n", "early_overrun_err:", |
223 | accum_cck->early_overrun_err, | 218 | le32_to_cpu(cck->early_overrun_err), |
224 | delta_cck->early_overrun_err, | 219 | accum_cck->early_overrun_err, |
225 | max_cck->early_overrun_err); | 220 | delta_cck->early_overrun_err, max_cck->early_overrun_err); |
226 | pos += scnprintf(buf + pos, bufsz - pos, | 221 | pos += |
227 | " %-30s %10u %10u %10u %10u\n", | 222 | scnprintf(buf + pos, bufsz - pos, |
228 | "crc32_good:", | 223 | " %-30s %10u %10u %10u %10u\n", "crc32_good:", |
229 | le32_to_cpu(cck->crc32_good), accum_cck->crc32_good, | 224 | le32_to_cpu(cck->crc32_good), accum_cck->crc32_good, |
230 | delta_cck->crc32_good, | 225 | delta_cck->crc32_good, max_cck->crc32_good); |
231 | max_cck->crc32_good); | 226 | pos += |
232 | pos += scnprintf(buf + pos, bufsz - pos, | 227 | scnprintf(buf + pos, bufsz - pos, |
233 | " %-30s %10u %10u %10u %10u\n", | 228 | " %-30s %10u %10u %10u %10u\n", "false_alarm_cnt:", |
234 | "false_alarm_cnt:", | 229 | le32_to_cpu(cck->false_alarm_cnt), |
235 | le32_to_cpu(cck->false_alarm_cnt), | 230 | accum_cck->false_alarm_cnt, delta_cck->false_alarm_cnt, |
236 | accum_cck->false_alarm_cnt, | 231 | max_cck->false_alarm_cnt); |
237 | delta_cck->false_alarm_cnt, max_cck->false_alarm_cnt); | 232 | pos += |
238 | pos += scnprintf(buf + pos, bufsz - pos, | 233 | scnprintf(buf + pos, bufsz - pos, |
239 | " %-30s %10u %10u %10u %10u\n", | 234 | " %-30s %10u %10u %10u %10u\n", "fina_sync_err_cnt:", |
240 | "fina_sync_err_cnt:", | 235 | le32_to_cpu(cck->fina_sync_err_cnt), |
241 | le32_to_cpu(cck->fina_sync_err_cnt), | 236 | accum_cck->fina_sync_err_cnt, |
242 | accum_cck->fina_sync_err_cnt, | 237 | delta_cck->fina_sync_err_cnt, max_cck->fina_sync_err_cnt); |
243 | delta_cck->fina_sync_err_cnt, | 238 | pos += |
244 | max_cck->fina_sync_err_cnt); | 239 | scnprintf(buf + pos, bufsz - pos, |
245 | pos += scnprintf(buf + pos, bufsz - pos, | 240 | " %-30s %10u %10u %10u %10u\n", "sfd_timeout:", |
246 | " %-30s %10u %10u %10u %10u\n", | 241 | le32_to_cpu(cck->sfd_timeout), accum_cck->sfd_timeout, |
247 | "sfd_timeout:", | 242 | delta_cck->sfd_timeout, max_cck->sfd_timeout); |
248 | le32_to_cpu(cck->sfd_timeout), | 243 | pos += |
249 | accum_cck->sfd_timeout, | 244 | scnprintf(buf + pos, bufsz - pos, |
250 | delta_cck->sfd_timeout, max_cck->sfd_timeout); | 245 | " %-30s %10u %10u %10u %10u\n", "fina_timeout:", |
251 | pos += scnprintf(buf + pos, bufsz - pos, | 246 | le32_to_cpu(cck->fina_timeout), accum_cck->fina_timeout, |
252 | " %-30s %10u %10u %10u %10u\n", | 247 | delta_cck->fina_timeout, max_cck->fina_timeout); |
253 | "fina_timeout:", | 248 | pos += |
254 | le32_to_cpu(cck->fina_timeout), | 249 | scnprintf(buf + pos, bufsz - pos, |
255 | accum_cck->fina_timeout, | 250 | " %-30s %10u %10u %10u %10u\n", "unresponded_rts:", |
256 | delta_cck->fina_timeout, max_cck->fina_timeout); | 251 | le32_to_cpu(cck->unresponded_rts), |
257 | pos += scnprintf(buf + pos, bufsz - pos, | 252 | accum_cck->unresponded_rts, delta_cck->unresponded_rts, |
258 | " %-30s %10u %10u %10u %10u\n", | 253 | max_cck->unresponded_rts); |
259 | "unresponded_rts:", | 254 | pos += |
260 | le32_to_cpu(cck->unresponded_rts), | 255 | scnprintf(buf + pos, bufsz - pos, |
261 | accum_cck->unresponded_rts, | 256 | " %-30s %10u %10u %10u %10u\n", |
262 | delta_cck->unresponded_rts, | 257 | "rxe_frame_lmt_ovrun:", |
263 | max_cck->unresponded_rts); | 258 | le32_to_cpu(cck->rxe_frame_limit_overrun), |
264 | pos += scnprintf(buf + pos, bufsz - pos, | 259 | accum_cck->rxe_frame_limit_overrun, |
265 | " %-30s %10u %10u %10u %10u\n", | 260 | delta_cck->rxe_frame_limit_overrun, |
266 | "rxe_frame_lmt_ovrun:", | 261 | max_cck->rxe_frame_limit_overrun); |
267 | le32_to_cpu(cck->rxe_frame_limit_overrun), | 262 | pos += |
268 | accum_cck->rxe_frame_limit_overrun, | 263 | scnprintf(buf + pos, bufsz - pos, |
269 | delta_cck->rxe_frame_limit_overrun, | 264 | " %-30s %10u %10u %10u %10u\n", "sent_ack_cnt:", |
270 | max_cck->rxe_frame_limit_overrun); | 265 | le32_to_cpu(cck->sent_ack_cnt), accum_cck->sent_ack_cnt, |
271 | pos += scnprintf(buf + pos, bufsz - pos, | 266 | delta_cck->sent_ack_cnt, max_cck->sent_ack_cnt); |
272 | " %-30s %10u %10u %10u %10u\n", | 267 | pos += |
273 | "sent_ack_cnt:", | 268 | scnprintf(buf + pos, bufsz - pos, |
274 | le32_to_cpu(cck->sent_ack_cnt), | 269 | " %-30s %10u %10u %10u %10u\n", "sent_cts_cnt:", |
275 | accum_cck->sent_ack_cnt, | 270 | le32_to_cpu(cck->sent_cts_cnt), accum_cck->sent_cts_cnt, |
276 | delta_cck->sent_ack_cnt, | 271 | delta_cck->sent_cts_cnt, max_cck->sent_cts_cnt); |
277 | max_cck->sent_ack_cnt); | ||
278 | pos += scnprintf(buf + pos, bufsz - pos, | ||
279 | " %-30s %10u %10u %10u %10u\n", | ||
280 | "sent_cts_cnt:", | ||
281 | le32_to_cpu(cck->sent_cts_cnt), | ||
282 | accum_cck->sent_cts_cnt, | ||
283 | delta_cck->sent_cts_cnt, | ||
284 | max_cck->sent_cts_cnt); | ||
285 | 272 | ||
286 | pos += scnprintf(buf + pos, bufsz - pos, "%-32s current" | 273 | pos += |
287 | "acumulative delta max\n", | 274 | scnprintf(buf + pos, bufsz - pos, |
288 | "Statistics_Rx - GENERAL:"); | 275 | "%-32s current" |
289 | pos += scnprintf(buf + pos, bufsz - pos, | 276 | "acumulative delta max\n", |
290 | " %-30s %10u %10u %10u %10u\n", | 277 | "Statistics_Rx - GENERAL:"); |
291 | "bogus_cts:", | 278 | pos += |
292 | le32_to_cpu(general->bogus_cts), | 279 | scnprintf(buf + pos, bufsz - pos, |
293 | accum_general->bogus_cts, | 280 | " %-30s %10u %10u %10u %10u\n", "bogus_cts:", |
294 | delta_general->bogus_cts, max_general->bogus_cts); | 281 | le32_to_cpu(general->bogus_cts), accum_general->bogus_cts, |
295 | pos += scnprintf(buf + pos, bufsz - pos, | 282 | delta_general->bogus_cts, max_general->bogus_cts); |
296 | " %-30s %10u %10u %10u %10u\n", | 283 | pos += |
297 | "bogus_ack:", | 284 | scnprintf(buf + pos, bufsz - pos, |
298 | le32_to_cpu(general->bogus_ack), | 285 | " %-30s %10u %10u %10u %10u\n", "bogus_ack:", |
299 | accum_general->bogus_ack, | 286 | le32_to_cpu(general->bogus_ack), accum_general->bogus_ack, |
300 | delta_general->bogus_ack, max_general->bogus_ack); | 287 | delta_general->bogus_ack, max_general->bogus_ack); |
301 | pos += scnprintf(buf + pos, bufsz - pos, | 288 | pos += |
302 | " %-30s %10u %10u %10u %10u\n", | 289 | scnprintf(buf + pos, bufsz - pos, |
303 | "non_bssid_frames:", | 290 | " %-30s %10u %10u %10u %10u\n", "non_bssid_frames:", |
304 | le32_to_cpu(general->non_bssid_frames), | 291 | le32_to_cpu(general->non_bssid_frames), |
305 | accum_general->non_bssid_frames, | 292 | accum_general->non_bssid_frames, |
306 | delta_general->non_bssid_frames, | 293 | delta_general->non_bssid_frames, |
307 | max_general->non_bssid_frames); | 294 | max_general->non_bssid_frames); |
308 | pos += scnprintf(buf + pos, bufsz - pos, | 295 | pos += |
309 | " %-30s %10u %10u %10u %10u\n", | 296 | scnprintf(buf + pos, bufsz - pos, |
310 | "filtered_frames:", | 297 | " %-30s %10u %10u %10u %10u\n", "filtered_frames:", |
311 | le32_to_cpu(general->filtered_frames), | 298 | le32_to_cpu(general->filtered_frames), |
312 | accum_general->filtered_frames, | 299 | accum_general->filtered_frames, |
313 | delta_general->filtered_frames, | 300 | delta_general->filtered_frames, |
314 | max_general->filtered_frames); | 301 | max_general->filtered_frames); |
315 | pos += scnprintf(buf + pos, bufsz - pos, | 302 | pos += |
316 | " %-30s %10u %10u %10u %10u\n", | 303 | scnprintf(buf + pos, bufsz - pos, |
317 | "non_channel_beacons:", | 304 | " %-30s %10u %10u %10u %10u\n", |
318 | le32_to_cpu(general->non_channel_beacons), | 305 | "non_channel_beacons:", |
319 | accum_general->non_channel_beacons, | 306 | le32_to_cpu(general->non_channel_beacons), |
320 | delta_general->non_channel_beacons, | 307 | accum_general->non_channel_beacons, |
321 | max_general->non_channel_beacons); | 308 | delta_general->non_channel_beacons, |
309 | max_general->non_channel_beacons); | ||
322 | 310 | ||
323 | ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos); | 311 | ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos); |
324 | kfree(buf); | 312 | kfree(buf); |
325 | return ret; | 313 | return ret; |
326 | } | 314 | } |
327 | 315 | ||
328 | ssize_t il3945_ucode_tx_stats_read(struct file *file, | 316 | ssize_t |
329 | char __user *user_buf, | 317 | il3945_ucode_tx_stats_read(struct file * file, char __user * user_buf, |
330 | size_t count, loff_t *ppos) | 318 | size_t count, loff_t * ppos) |
331 | { | 319 | { |
332 | struct il_priv *il = file->private_data; | 320 | struct il_priv *il = file->private_data; |
333 | int pos = 0; | 321 | int pos = 0; |
@@ -355,75 +343,69 @@ ssize_t il3945_ucode_tx_stats_read(struct file *file, | |||
355 | delta_tx = &il->_3945.delta_stats.tx; | 343 | delta_tx = &il->_3945.delta_stats.tx; |
356 | max_tx = &il->_3945.max_delta.tx; | 344 | max_tx = &il->_3945.max_delta.tx; |
357 | pos += il3945_stats_flag(il, buf, bufsz); | 345 | pos += il3945_stats_flag(il, buf, bufsz); |
358 | pos += scnprintf(buf + pos, bufsz - pos, "%-32s current" | 346 | pos += |
359 | "acumulative delta max\n", | 347 | scnprintf(buf + pos, bufsz - pos, |
360 | "Statistics_Tx:"); | 348 | "%-32s current" |
361 | pos += scnprintf(buf + pos, bufsz - pos, | 349 | "acumulative delta max\n", |
362 | " %-30s %10u %10u %10u %10u\n", | 350 | "Statistics_Tx:"); |
363 | "preamble:", | 351 | pos += |
364 | le32_to_cpu(tx->preamble_cnt), | 352 | scnprintf(buf + pos, bufsz - pos, |
365 | accum_tx->preamble_cnt, | 353 | " %-30s %10u %10u %10u %10u\n", "preamble:", |
366 | delta_tx->preamble_cnt, max_tx->preamble_cnt); | 354 | le32_to_cpu(tx->preamble_cnt), accum_tx->preamble_cnt, |
367 | pos += scnprintf(buf + pos, bufsz - pos, | 355 | delta_tx->preamble_cnt, max_tx->preamble_cnt); |
368 | " %-30s %10u %10u %10u %10u\n", | 356 | pos += |
369 | "rx_detected_cnt:", | 357 | scnprintf(buf + pos, bufsz - pos, |
370 | le32_to_cpu(tx->rx_detected_cnt), | 358 | " %-30s %10u %10u %10u %10u\n", "rx_detected_cnt:", |
371 | accum_tx->rx_detected_cnt, | 359 | le32_to_cpu(tx->rx_detected_cnt), |
372 | delta_tx->rx_detected_cnt, max_tx->rx_detected_cnt); | 360 | accum_tx->rx_detected_cnt, delta_tx->rx_detected_cnt, |
373 | pos += scnprintf(buf + pos, bufsz - pos, | 361 | max_tx->rx_detected_cnt); |
374 | " %-30s %10u %10u %10u %10u\n", | 362 | pos += |
375 | "bt_prio_defer_cnt:", | 363 | scnprintf(buf + pos, bufsz - pos, |
376 | le32_to_cpu(tx->bt_prio_defer_cnt), | 364 | " %-30s %10u %10u %10u %10u\n", "bt_prio_defer_cnt:", |
377 | accum_tx->bt_prio_defer_cnt, | 365 | le32_to_cpu(tx->bt_prio_defer_cnt), |
378 | delta_tx->bt_prio_defer_cnt, | 366 | accum_tx->bt_prio_defer_cnt, delta_tx->bt_prio_defer_cnt, |
379 | max_tx->bt_prio_defer_cnt); | 367 | max_tx->bt_prio_defer_cnt); |
380 | pos += scnprintf(buf + pos, bufsz - pos, | 368 | pos += |
381 | " %-30s %10u %10u %10u %10u\n", | 369 | scnprintf(buf + pos, bufsz - pos, |
382 | "bt_prio_kill_cnt:", | 370 | " %-30s %10u %10u %10u %10u\n", "bt_prio_kill_cnt:", |
383 | le32_to_cpu(tx->bt_prio_kill_cnt), | 371 | le32_to_cpu(tx->bt_prio_kill_cnt), |
384 | accum_tx->bt_prio_kill_cnt, | 372 | accum_tx->bt_prio_kill_cnt, delta_tx->bt_prio_kill_cnt, |
385 | delta_tx->bt_prio_kill_cnt, | 373 | max_tx->bt_prio_kill_cnt); |
386 | max_tx->bt_prio_kill_cnt); | 374 | pos += |
387 | pos += scnprintf(buf + pos, bufsz - pos, | 375 | scnprintf(buf + pos, bufsz - pos, |
388 | " %-30s %10u %10u %10u %10u\n", | 376 | " %-30s %10u %10u %10u %10u\n", "few_bytes_cnt:", |
389 | "few_bytes_cnt:", | 377 | le32_to_cpu(tx->few_bytes_cnt), accum_tx->few_bytes_cnt, |
390 | le32_to_cpu(tx->few_bytes_cnt), | 378 | delta_tx->few_bytes_cnt, max_tx->few_bytes_cnt); |
391 | accum_tx->few_bytes_cnt, | 379 | pos += |
392 | delta_tx->few_bytes_cnt, max_tx->few_bytes_cnt); | 380 | scnprintf(buf + pos, bufsz - pos, |
393 | pos += scnprintf(buf + pos, bufsz - pos, | 381 | " %-30s %10u %10u %10u %10u\n", "cts_timeout:", |
394 | " %-30s %10u %10u %10u %10u\n", | 382 | le32_to_cpu(tx->cts_timeout), accum_tx->cts_timeout, |
395 | "cts_timeout:", | 383 | delta_tx->cts_timeout, max_tx->cts_timeout); |
396 | le32_to_cpu(tx->cts_timeout), accum_tx->cts_timeout, | 384 | pos += |
397 | delta_tx->cts_timeout, max_tx->cts_timeout); | 385 | scnprintf(buf + pos, bufsz - pos, |
398 | pos += scnprintf(buf + pos, bufsz - pos, | 386 | " %-30s %10u %10u %10u %10u\n", "ack_timeout:", |
399 | " %-30s %10u %10u %10u %10u\n", | 387 | le32_to_cpu(tx->ack_timeout), accum_tx->ack_timeout, |
400 | "ack_timeout:", | 388 | delta_tx->ack_timeout, max_tx->ack_timeout); |
401 | le32_to_cpu(tx->ack_timeout), | 389 | pos += |
402 | accum_tx->ack_timeout, | 390 | scnprintf(buf + pos, bufsz - pos, |
403 | delta_tx->ack_timeout, max_tx->ack_timeout); | 391 | " %-30s %10u %10u %10u %10u\n", "expected_ack_cnt:", |
404 | pos += scnprintf(buf + pos, bufsz - pos, | 392 | le32_to_cpu(tx->expected_ack_cnt), |
405 | " %-30s %10u %10u %10u %10u\n", | 393 | accum_tx->expected_ack_cnt, delta_tx->expected_ack_cnt, |
406 | "expected_ack_cnt:", | 394 | max_tx->expected_ack_cnt); |
407 | le32_to_cpu(tx->expected_ack_cnt), | 395 | pos += |
408 | accum_tx->expected_ack_cnt, | 396 | scnprintf(buf + pos, bufsz - pos, |
409 | delta_tx->expected_ack_cnt, | 397 | " %-30s %10u %10u %10u %10u\n", "actual_ack_cnt:", |
410 | max_tx->expected_ack_cnt); | 398 | le32_to_cpu(tx->actual_ack_cnt), accum_tx->actual_ack_cnt, |
411 | pos += scnprintf(buf + pos, bufsz - pos, | 399 | delta_tx->actual_ack_cnt, max_tx->actual_ack_cnt); |
412 | " %-30s %10u %10u %10u %10u\n", | ||
413 | "actual_ack_cnt:", | ||
414 | le32_to_cpu(tx->actual_ack_cnt), | ||
415 | accum_tx->actual_ack_cnt, | ||
416 | delta_tx->actual_ack_cnt, | ||
417 | max_tx->actual_ack_cnt); | ||
418 | 400 | ||
419 | ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos); | 401 | ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos); |
420 | kfree(buf); | 402 | kfree(buf); |
421 | return ret; | 403 | return ret; |
422 | } | 404 | } |
423 | 405 | ||
424 | ssize_t il3945_ucode_general_stats_read(struct file *file, | 406 | ssize_t |
425 | char __user *user_buf, | 407 | il3945_ucode_general_stats_read(struct file * file, char __user * user_buf, |
426 | size_t count, loff_t *ppos) | 408 | size_t count, loff_t * ppos) |
427 | { | 409 | { |
428 | struct il_priv *il = file->private_data; | 410 | struct il_priv *il = file->private_data; |
429 | int pos = 0; | 411 | int pos = 0; |
@@ -462,61 +444,61 @@ ssize_t il3945_ucode_general_stats_read(struct file *file, | |||
462 | delta_div = &il->_3945.delta_stats.general.div; | 444 | delta_div = &il->_3945.delta_stats.general.div; |
463 | max_div = &il->_3945.max_delta.general.div; | 445 | max_div = &il->_3945.max_delta.general.div; |
464 | pos += il3945_stats_flag(il, buf, bufsz); | 446 | pos += il3945_stats_flag(il, buf, bufsz); |
465 | pos += scnprintf(buf + pos, bufsz - pos, "%-32s current" | 447 | pos += |
466 | "acumulative delta max\n", | 448 | scnprintf(buf + pos, bufsz - pos, |
467 | "Statistics_General:"); | 449 | "%-32s current" |
468 | pos += scnprintf(buf + pos, bufsz - pos, | 450 | "acumulative delta max\n", |
469 | " %-30s %10u %10u %10u %10u\n", | 451 | "Statistics_General:"); |
470 | "burst_check:", | 452 | pos += |
471 | le32_to_cpu(dbg->burst_check), | 453 | scnprintf(buf + pos, bufsz - pos, |
472 | accum_dbg->burst_check, | 454 | " %-30s %10u %10u %10u %10u\n", "burst_check:", |
473 | delta_dbg->burst_check, max_dbg->burst_check); | 455 | le32_to_cpu(dbg->burst_check), accum_dbg->burst_check, |
474 | pos += scnprintf(buf + pos, bufsz - pos, | 456 | delta_dbg->burst_check, max_dbg->burst_check); |
475 | " %-30s %10u %10u %10u %10u\n", | 457 | pos += |
476 | "burst_count:", | 458 | scnprintf(buf + pos, bufsz - pos, |
477 | le32_to_cpu(dbg->burst_count), | 459 | " %-30s %10u %10u %10u %10u\n", "burst_count:", |
478 | accum_dbg->burst_count, | 460 | le32_to_cpu(dbg->burst_count), accum_dbg->burst_count, |
479 | delta_dbg->burst_count, max_dbg->burst_count); | 461 | delta_dbg->burst_count, max_dbg->burst_count); |
480 | pos += scnprintf(buf + pos, bufsz - pos, | 462 | pos += |
481 | " %-30s %10u %10u %10u %10u\n", | 463 | scnprintf(buf + pos, bufsz - pos, |
482 | "sleep_time:", | 464 | " %-30s %10u %10u %10u %10u\n", "sleep_time:", |
483 | le32_to_cpu(general->sleep_time), | 465 | le32_to_cpu(general->sleep_time), |
484 | accum_general->sleep_time, | 466 | accum_general->sleep_time, delta_general->sleep_time, |
485 | delta_general->sleep_time, max_general->sleep_time); | 467 | max_general->sleep_time); |
486 | pos += scnprintf(buf + pos, bufsz - pos, | 468 | pos += |
487 | " %-30s %10u %10u %10u %10u\n", | 469 | scnprintf(buf + pos, bufsz - pos, |
488 | "slots_out:", | 470 | " %-30s %10u %10u %10u %10u\n", "slots_out:", |
489 | le32_to_cpu(general->slots_out), | 471 | le32_to_cpu(general->slots_out), accum_general->slots_out, |
490 | accum_general->slots_out, | 472 | delta_general->slots_out, max_general->slots_out); |
491 | delta_general->slots_out, max_general->slots_out); | 473 | pos += |
492 | pos += scnprintf(buf + pos, bufsz - pos, | 474 | scnprintf(buf + pos, bufsz - pos, |
493 | " %-30s %10u %10u %10u %10u\n", | 475 | " %-30s %10u %10u %10u %10u\n", "slots_idle:", |
494 | "slots_idle:", | 476 | le32_to_cpu(general->slots_idle), |
495 | le32_to_cpu(general->slots_idle), | 477 | accum_general->slots_idle, delta_general->slots_idle, |
496 | accum_general->slots_idle, | 478 | max_general->slots_idle); |
497 | delta_general->slots_idle, max_general->slots_idle); | 479 | pos += |
498 | pos += scnprintf(buf + pos, bufsz - pos, "ttl_timestamp:\t\t\t%u\n", | 480 | scnprintf(buf + pos, bufsz - pos, "ttl_timestamp:\t\t\t%u\n", |
499 | le32_to_cpu(general->ttl_timestamp)); | 481 | le32_to_cpu(general->ttl_timestamp)); |
500 | pos += scnprintf(buf + pos, bufsz - pos, | 482 | pos += |
501 | " %-30s %10u %10u %10u %10u\n", | 483 | scnprintf(buf + pos, bufsz - pos, |
502 | "tx_on_a:", | 484 | " %-30s %10u %10u %10u %10u\n", "tx_on_a:", |
503 | le32_to_cpu(div->tx_on_a), accum_div->tx_on_a, | 485 | le32_to_cpu(div->tx_on_a), accum_div->tx_on_a, |
504 | delta_div->tx_on_a, max_div->tx_on_a); | 486 | delta_div->tx_on_a, max_div->tx_on_a); |
505 | pos += scnprintf(buf + pos, bufsz - pos, | 487 | pos += |
506 | " %-30s %10u %10u %10u %10u\n", | 488 | scnprintf(buf + pos, bufsz - pos, |
507 | "tx_on_b:", | 489 | " %-30s %10u %10u %10u %10u\n", "tx_on_b:", |
508 | le32_to_cpu(div->tx_on_b), accum_div->tx_on_b, | 490 | le32_to_cpu(div->tx_on_b), accum_div->tx_on_b, |
509 | delta_div->tx_on_b, max_div->tx_on_b); | 491 | delta_div->tx_on_b, max_div->tx_on_b); |
510 | pos += scnprintf(buf + pos, bufsz - pos, | 492 | pos += |
511 | " %-30s %10u %10u %10u %10u\n", | 493 | scnprintf(buf + pos, bufsz - pos, |
512 | "exec_time:", | 494 | " %-30s %10u %10u %10u %10u\n", "exec_time:", |
513 | le32_to_cpu(div->exec_time), accum_div->exec_time, | 495 | le32_to_cpu(div->exec_time), accum_div->exec_time, |
514 | delta_div->exec_time, max_div->exec_time); | 496 | delta_div->exec_time, max_div->exec_time); |
515 | pos += scnprintf(buf + pos, bufsz - pos, | 497 | pos += |
516 | " %-30s %10u %10u %10u %10u\n", | 498 | scnprintf(buf + pos, bufsz - pos, |
517 | "probe_time:", | 499 | " %-30s %10u %10u %10u %10u\n", "probe_time:", |
518 | le32_to_cpu(div->probe_time), accum_div->probe_time, | 500 | le32_to_cpu(div->probe_time), accum_div->probe_time, |
519 | delta_div->probe_time, max_div->probe_time); | 501 | delta_div->probe_time, max_div->probe_time); |
520 | ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos); | 502 | ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos); |
521 | kfree(buf); | 503 | kfree(buf); |
522 | return ret; | 504 | return ret; |
diff --git a/drivers/net/wireless/iwlegacy/3945-mac.c b/drivers/net/wireless/iwlegacy/3945-mac.c index ffd6ddf89ec1..2249fe44e669 100644 --- a/drivers/net/wireless/iwlegacy/3945-mac.c +++ b/drivers/net/wireless/iwlegacy/3945-mac.c | |||
@@ -102,7 +102,8 @@ struct il_mod_params il3945_mod_params = { | |||
102 | * IL_ANTENNA_MAIN - Force MAIN antenna | 102 | * IL_ANTENNA_MAIN - Force MAIN antenna |
103 | * IL_ANTENNA_AUX - Force AUX antenna | 103 | * IL_ANTENNA_AUX - Force AUX antenna |
104 | */ | 104 | */ |
105 | __le32 il3945_get_antenna_flags(const struct il_priv *il) | 105 | __le32 |
106 | il3945_get_antenna_flags(const struct il_priv *il) | ||
106 | { | 107 | { |
107 | struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom; | 108 | struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom; |
108 | 109 | ||
@@ -123,14 +124,14 @@ __le32 il3945_get_antenna_flags(const struct il_priv *il) | |||
123 | 124 | ||
124 | /* bad antenna selector value */ | 125 | /* bad antenna selector value */ |
125 | IL_ERR("Bad antenna selector value (0x%x)\n", | 126 | IL_ERR("Bad antenna selector value (0x%x)\n", |
126 | il3945_mod_params.antenna); | 127 | il3945_mod_params.antenna); |
127 | 128 | ||
128 | return 0; /* "diversity" is default if error */ | 129 | return 0; /* "diversity" is default if error */ |
129 | } | 130 | } |
130 | 131 | ||
131 | static int il3945_set_ccmp_dynamic_key_info(struct il_priv *il, | 132 | static int |
132 | struct ieee80211_key_conf *keyconf, | 133 | il3945_set_ccmp_dynamic_key_info(struct il_priv *il, |
133 | u8 sta_id) | 134 | struct ieee80211_key_conf *keyconf, u8 sta_id) |
134 | { | 135 | { |
135 | unsigned long flags; | 136 | unsigned long flags; |
136 | __le16 key_flags = 0; | 137 | __le16 key_flags = 0; |
@@ -149,21 +150,19 @@ static int il3945_set_ccmp_dynamic_key_info(struct il_priv *il, | |||
149 | spin_lock_irqsave(&il->sta_lock, flags); | 150 | spin_lock_irqsave(&il->sta_lock, flags); |
150 | il->stations[sta_id].keyinfo.cipher = keyconf->cipher; | 151 | il->stations[sta_id].keyinfo.cipher = keyconf->cipher; |
151 | il->stations[sta_id].keyinfo.keylen = keyconf->keylen; | 152 | il->stations[sta_id].keyinfo.keylen = keyconf->keylen; |
152 | memcpy(il->stations[sta_id].keyinfo.key, keyconf->key, | 153 | memcpy(il->stations[sta_id].keyinfo.key, keyconf->key, keyconf->keylen); |
153 | keyconf->keylen); | ||
154 | 154 | ||
155 | memcpy(il->stations[sta_id].sta.key.key, keyconf->key, | 155 | memcpy(il->stations[sta_id].sta.key.key, keyconf->key, keyconf->keylen); |
156 | keyconf->keylen); | ||
157 | 156 | ||
158 | if ((il->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK) | 157 | if ((il->stations[sta_id].sta.key. |
159 | == STA_KEY_FLG_NO_ENC) | 158 | key_flags & STA_KEY_FLG_ENCRYPT_MSK) == STA_KEY_FLG_NO_ENC) |
160 | il->stations[sta_id].sta.key.key_offset = | 159 | il->stations[sta_id].sta.key.key_offset = |
161 | il_get_free_ucode_key_idx(il); | 160 | il_get_free_ucode_key_idx(il); |
162 | /* else, we are overriding an existing key => no need to allocated room | 161 | /* else, we are overriding an existing key => no need to allocated room |
163 | * in uCode. */ | 162 | * in uCode. */ |
164 | 163 | ||
165 | WARN(il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET, | 164 | WARN(il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET, |
166 | "no space for a new key"); | 165 | "no space for a new key"); |
167 | 166 | ||
168 | il->stations[sta_id].sta.key.key_flags = key_flags; | 167 | il->stations[sta_id].sta.key.key_flags = key_flags; |
169 | il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; | 168 | il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; |
@@ -171,49 +170,50 @@ static int il3945_set_ccmp_dynamic_key_info(struct il_priv *il, | |||
171 | 170 | ||
172 | D_INFO("hwcrypto: modify ucode station key info\n"); | 171 | D_INFO("hwcrypto: modify ucode station key info\n"); |
173 | 172 | ||
174 | ret = il_send_add_sta(il, | 173 | ret = il_send_add_sta(il, &il->stations[sta_id].sta, CMD_ASYNC); |
175 | &il->stations[sta_id].sta, CMD_ASYNC); | ||
176 | 174 | ||
177 | spin_unlock_irqrestore(&il->sta_lock, flags); | 175 | spin_unlock_irqrestore(&il->sta_lock, flags); |
178 | 176 | ||
179 | return ret; | 177 | return ret; |
180 | } | 178 | } |
181 | 179 | ||
182 | static int il3945_set_tkip_dynamic_key_info(struct il_priv *il, | 180 | static int |
183 | struct ieee80211_key_conf *keyconf, | 181 | il3945_set_tkip_dynamic_key_info(struct il_priv *il, |
184 | u8 sta_id) | 182 | struct ieee80211_key_conf *keyconf, u8 sta_id) |
185 | { | 183 | { |
186 | return -EOPNOTSUPP; | 184 | return -EOPNOTSUPP; |
187 | } | 185 | } |
188 | 186 | ||
189 | static int il3945_set_wep_dynamic_key_info(struct il_priv *il, | 187 | static int |
190 | struct ieee80211_key_conf *keyconf, | 188 | il3945_set_wep_dynamic_key_info(struct il_priv *il, |
191 | u8 sta_id) | 189 | struct ieee80211_key_conf *keyconf, u8 sta_id) |
192 | { | 190 | { |
193 | return -EOPNOTSUPP; | 191 | return -EOPNOTSUPP; |
194 | } | 192 | } |
195 | 193 | ||
196 | static int il3945_clear_sta_key_info(struct il_priv *il, u8 sta_id) | 194 | static int |
195 | il3945_clear_sta_key_info(struct il_priv *il, u8 sta_id) | ||
197 | { | 196 | { |
198 | unsigned long flags; | 197 | unsigned long flags; |
199 | struct il_addsta_cmd sta_cmd; | 198 | struct il_addsta_cmd sta_cmd; |
200 | 199 | ||
201 | spin_lock_irqsave(&il->sta_lock, flags); | 200 | spin_lock_irqsave(&il->sta_lock, flags); |
202 | memset(&il->stations[sta_id].keyinfo, 0, sizeof(struct il_hw_key)); | 201 | memset(&il->stations[sta_id].keyinfo, 0, sizeof(struct il_hw_key)); |
203 | memset(&il->stations[sta_id].sta.key, 0, | 202 | memset(&il->stations[sta_id].sta.key, 0, sizeof(struct il4965_keyinfo)); |
204 | sizeof(struct il4965_keyinfo)); | ||
205 | il->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC; | 203 | il->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC; |
206 | il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; | 204 | il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; |
207 | il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; | 205 | il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; |
208 | memcpy(&sta_cmd, &il->stations[sta_id].sta, sizeof(struct il_addsta_cmd)); | 206 | memcpy(&sta_cmd, &il->stations[sta_id].sta, |
207 | sizeof(struct il_addsta_cmd)); | ||
209 | spin_unlock_irqrestore(&il->sta_lock, flags); | 208 | spin_unlock_irqrestore(&il->sta_lock, flags); |
210 | 209 | ||
211 | D_INFO("hwcrypto: clear ucode station key info\n"); | 210 | D_INFO("hwcrypto: clear ucode station key info\n"); |
212 | return il_send_add_sta(il, &sta_cmd, CMD_SYNC); | 211 | return il_send_add_sta(il, &sta_cmd, CMD_SYNC); |
213 | } | 212 | } |
214 | 213 | ||
215 | static int il3945_set_dynamic_key(struct il_priv *il, | 214 | static int |
216 | struct ieee80211_key_conf *keyconf, u8 sta_id) | 215 | il3945_set_dynamic_key(struct il_priv *il, struct ieee80211_key_conf *keyconf, |
216 | u8 sta_id) | ||
217 | { | 217 | { |
218 | int ret = 0; | 218 | int ret = 0; |
219 | 219 | ||
@@ -231,27 +231,26 @@ static int il3945_set_dynamic_key(struct il_priv *il, | |||
231 | ret = il3945_set_wep_dynamic_key_info(il, keyconf, sta_id); | 231 | ret = il3945_set_wep_dynamic_key_info(il, keyconf, sta_id); |
232 | break; | 232 | break; |
233 | default: | 233 | default: |
234 | IL_ERR("Unknown alg: %s alg=%x\n", __func__, | 234 | IL_ERR("Unknown alg: %s alg=%x\n", __func__, keyconf->cipher); |
235 | keyconf->cipher); | ||
236 | ret = -EINVAL; | 235 | ret = -EINVAL; |
237 | } | 236 | } |
238 | 237 | ||
239 | D_WEP("Set dynamic key: alg=%x len=%d idx=%d sta=%d ret=%d\n", | 238 | D_WEP("Set dynamic key: alg=%x len=%d idx=%d sta=%d ret=%d\n", |
240 | keyconf->cipher, keyconf->keylen, keyconf->keyidx, | 239 | keyconf->cipher, keyconf->keylen, keyconf->keyidx, sta_id, ret); |
241 | sta_id, ret); | ||
242 | 240 | ||
243 | return ret; | 241 | return ret; |
244 | } | 242 | } |
245 | 243 | ||
246 | static int il3945_remove_static_key(struct il_priv *il) | 244 | static int |
245 | il3945_remove_static_key(struct il_priv *il) | ||
247 | { | 246 | { |
248 | int ret = -EOPNOTSUPP; | 247 | int ret = -EOPNOTSUPP; |
249 | 248 | ||
250 | return ret; | 249 | return ret; |
251 | } | 250 | } |
252 | 251 | ||
253 | static int il3945_set_static_key(struct il_priv *il, | 252 | static int |
254 | struct ieee80211_key_conf *key) | 253 | il3945_set_static_key(struct il_priv *il, struct ieee80211_key_conf *key) |
255 | { | 254 | { |
256 | if (key->cipher == WLAN_CIPHER_SUITE_WEP40 || | 255 | if (key->cipher == WLAN_CIPHER_SUITE_WEP40 || |
257 | key->cipher == WLAN_CIPHER_SUITE_WEP104) | 256 | key->cipher == WLAN_CIPHER_SUITE_WEP104) |
@@ -261,12 +260,12 @@ static int il3945_set_static_key(struct il_priv *il, | |||
261 | return -EINVAL; | 260 | return -EINVAL; |
262 | } | 261 | } |
263 | 262 | ||
264 | static void il3945_clear_free_frames(struct il_priv *il) | 263 | static void |
264 | il3945_clear_free_frames(struct il_priv *il) | ||
265 | { | 265 | { |
266 | struct list_head *element; | 266 | struct list_head *element; |
267 | 267 | ||
268 | D_INFO("%d frames on pre-allocated heap on clear.\n", | 268 | D_INFO("%d frames on pre-allocated heap on clear.\n", il->frames_count); |
269 | il->frames_count); | ||
270 | 269 | ||
271 | while (!list_empty(&il->free_frames)) { | 270 | while (!list_empty(&il->free_frames)) { |
272 | element = il->free_frames.next; | 271 | element = il->free_frames.next; |
@@ -277,12 +276,13 @@ static void il3945_clear_free_frames(struct il_priv *il) | |||
277 | 276 | ||
278 | if (il->frames_count) { | 277 | if (il->frames_count) { |
279 | IL_WARN("%d frames still in use. Did we lose one?\n", | 278 | IL_WARN("%d frames still in use. Did we lose one?\n", |
280 | il->frames_count); | 279 | il->frames_count); |
281 | il->frames_count = 0; | 280 | il->frames_count = 0; |
282 | } | 281 | } |
283 | } | 282 | } |
284 | 283 | ||
285 | static struct il3945_frame *il3945_get_free_frame(struct il_priv *il) | 284 | static struct il3945_frame * |
285 | il3945_get_free_frame(struct il_priv *il) | ||
286 | { | 286 | { |
287 | struct il3945_frame *frame; | 287 | struct il3945_frame *frame; |
288 | struct list_head *element; | 288 | struct list_head *element; |
@@ -302,15 +302,16 @@ static struct il3945_frame *il3945_get_free_frame(struct il_priv *il) | |||
302 | return list_entry(element, struct il3945_frame, list); | 302 | return list_entry(element, struct il3945_frame, list); |
303 | } | 303 | } |
304 | 304 | ||
305 | static void il3945_free_frame(struct il_priv *il, struct il3945_frame *frame) | 305 | static void |
306 | il3945_free_frame(struct il_priv *il, struct il3945_frame *frame) | ||
306 | { | 307 | { |
307 | memset(frame, 0, sizeof(*frame)); | 308 | memset(frame, 0, sizeof(*frame)); |
308 | list_add(&frame->list, &il->free_frames); | 309 | list_add(&frame->list, &il->free_frames); |
309 | } | 310 | } |
310 | 311 | ||
311 | unsigned int il3945_fill_beacon_frame(struct il_priv *il, | 312 | unsigned int |
312 | struct ieee80211_hdr *hdr, | 313 | il3945_fill_beacon_frame(struct il_priv *il, struct ieee80211_hdr *hdr, |
313 | int left) | 314 | int left) |
314 | { | 315 | { |
315 | 316 | ||
316 | if (!il_is_associated(il) || !il->beacon_skb) | 317 | if (!il_is_associated(il) || !il->beacon_skb) |
@@ -324,7 +325,8 @@ unsigned int il3945_fill_beacon_frame(struct il_priv *il, | |||
324 | return il->beacon_skb->len; | 325 | return il->beacon_skb->len; |
325 | } | 326 | } |
326 | 327 | ||
327 | static int il3945_send_beacon_cmd(struct il_priv *il) | 328 | static int |
329 | il3945_send_beacon_cmd(struct il_priv *il) | ||
328 | { | 330 | { |
329 | struct il3945_frame *frame; | 331 | struct il3945_frame *frame; |
330 | unsigned int frame_size; | 332 | unsigned int frame_size; |
@@ -335,37 +337,34 @@ static int il3945_send_beacon_cmd(struct il_priv *il) | |||
335 | 337 | ||
336 | if (!frame) { | 338 | if (!frame) { |
337 | IL_ERR("Could not obtain free frame buffer for beacon " | 339 | IL_ERR("Could not obtain free frame buffer for beacon " |
338 | "command.\n"); | 340 | "command.\n"); |
339 | return -ENOMEM; | 341 | return -ENOMEM; |
340 | } | 342 | } |
341 | 343 | ||
342 | rate = il_get_lowest_plcp(il, | 344 | rate = il_get_lowest_plcp(il, &il->ctx); |
343 | &il->ctx); | ||
344 | 345 | ||
345 | frame_size = il3945_hw_get_beacon_cmd(il, frame, rate); | 346 | frame_size = il3945_hw_get_beacon_cmd(il, frame, rate); |
346 | 347 | ||
347 | rc = il_send_cmd_pdu(il, C_TX_BEACON, frame_size, | 348 | rc = il_send_cmd_pdu(il, C_TX_BEACON, frame_size, &frame->u.cmd[0]); |
348 | &frame->u.cmd[0]); | ||
349 | 349 | ||
350 | il3945_free_frame(il, frame); | 350 | il3945_free_frame(il, frame); |
351 | 351 | ||
352 | return rc; | 352 | return rc; |
353 | } | 353 | } |
354 | 354 | ||
355 | static void il3945_unset_hw_params(struct il_priv *il) | 355 | static void |
356 | il3945_unset_hw_params(struct il_priv *il) | ||
356 | { | 357 | { |
357 | if (il->_3945.shared_virt) | 358 | if (il->_3945.shared_virt) |
358 | dma_free_coherent(&il->pci_dev->dev, | 359 | dma_free_coherent(&il->pci_dev->dev, |
359 | sizeof(struct il3945_shared), | 360 | sizeof(struct il3945_shared), |
360 | il->_3945.shared_virt, | 361 | il->_3945.shared_virt, il->_3945.shared_phys); |
361 | il->_3945.shared_phys); | ||
362 | } | 362 | } |
363 | 363 | ||
364 | static void il3945_build_tx_cmd_hwcrypto(struct il_priv *il, | 364 | static void |
365 | struct ieee80211_tx_info *info, | 365 | il3945_build_tx_cmd_hwcrypto(struct il_priv *il, struct ieee80211_tx_info *info, |
366 | struct il_device_cmd *cmd, | 366 | struct il_device_cmd *cmd, |
367 | struct sk_buff *skb_frag, | 367 | struct sk_buff *skb_frag, int sta_id) |
368 | int sta_id) | ||
369 | { | 368 | { |
370 | struct il3945_tx_cmd *tx_cmd = (struct il3945_tx_cmd *)cmd->cmd.payload; | 369 | struct il3945_tx_cmd *tx_cmd = (struct il3945_tx_cmd *)cmd->cmd.payload; |
371 | struct il_hw_key *keyinfo = &il->stations[sta_id].keyinfo; | 370 | struct il_hw_key *keyinfo = &il->stations[sta_id].keyinfo; |
@@ -386,13 +385,15 @@ static void il3945_build_tx_cmd_hwcrypto(struct il_priv *il, | |||
386 | tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128; | 385 | tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128; |
387 | /* fall through */ | 386 | /* fall through */ |
388 | case WLAN_CIPHER_SUITE_WEP40: | 387 | case WLAN_CIPHER_SUITE_WEP40: |
389 | tx_cmd->sec_ctl |= TX_CMD_SEC_WEP | | 388 | tx_cmd->sec_ctl |= |
390 | (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT; | 389 | TX_CMD_SEC_WEP | (info->control.hw_key-> |
390 | hw_key_idx & TX_CMD_SEC_MSK) << | ||
391 | TX_CMD_SEC_SHIFT; | ||
391 | 392 | ||
392 | memcpy(&tx_cmd->key[3], keyinfo->key, keyinfo->keylen); | 393 | memcpy(&tx_cmd->key[3], keyinfo->key, keyinfo->keylen); |
393 | 394 | ||
394 | D_TX("Configuring packet for WEP encryption " | 395 | D_TX("Configuring packet for WEP encryption " "with key %d\n", |
395 | "with key %d\n", info->control.hw_key->hw_key_idx); | 396 | info->control.hw_key->hw_key_idx); |
396 | break; | 397 | break; |
397 | 398 | ||
398 | default: | 399 | default: |
@@ -404,10 +405,10 @@ static void il3945_build_tx_cmd_hwcrypto(struct il_priv *il, | |||
404 | /* | 405 | /* |
405 | * handle build C_TX command notification. | 406 | * handle build C_TX command notification. |
406 | */ | 407 | */ |
407 | static void il3945_build_tx_cmd_basic(struct il_priv *il, | 408 | static void |
408 | struct il_device_cmd *cmd, | 409 | il3945_build_tx_cmd_basic(struct il_priv *il, struct il_device_cmd *cmd, |
409 | struct ieee80211_tx_info *info, | 410 | struct ieee80211_tx_info *info, |
410 | struct ieee80211_hdr *hdr, u8 std_id) | 411 | struct ieee80211_hdr *hdr, u8 std_id) |
411 | { | 412 | { |
412 | struct il3945_tx_cmd *tx_cmd = (struct il3945_tx_cmd *)cmd->cmd.payload; | 413 | struct il3945_tx_cmd *tx_cmd = (struct il3945_tx_cmd *)cmd->cmd.payload; |
413 | __le32 tx_flags = tx_cmd->tx_flags; | 414 | __le32 tx_flags = tx_cmd->tx_flags; |
@@ -458,7 +459,8 @@ static void il3945_build_tx_cmd_basic(struct il_priv *il, | |||
458 | /* | 459 | /* |
459 | * start C_TX command process | 460 | * start C_TX command process |
460 | */ | 461 | */ |
461 | static int il3945_tx_skb(struct il_priv *il, struct sk_buff *skb) | 462 | static int |
463 | il3945_tx_skb(struct il_priv *il, struct sk_buff *skb) | ||
462 | { | 464 | { |
463 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; | 465 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; |
464 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); | 466 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); |
@@ -485,7 +487,8 @@ static int il3945_tx_skb(struct il_priv *il, struct sk_buff *skb) | |||
485 | goto drop_unlock; | 487 | goto drop_unlock; |
486 | } | 488 | } |
487 | 489 | ||
488 | if ((ieee80211_get_tx_rate(il->hw, info)->hw_value & 0xFF) == IL_INVALID_RATE) { | 490 | if ((ieee80211_get_tx_rate(il->hw, info)->hw_value & 0xFF) == |
491 | IL_INVALID_RATE) { | ||
489 | IL_ERR("ERROR: No TX rate available.\n"); | 492 | IL_ERR("ERROR: No TX rate available.\n"); |
490 | goto drop_unlock; | 493 | goto drop_unlock; |
491 | } | 494 | } |
@@ -509,12 +512,9 @@ static int il3945_tx_skb(struct il_priv *il, struct sk_buff *skb) | |||
509 | hdr_len = ieee80211_hdrlen(fc); | 512 | hdr_len = ieee80211_hdrlen(fc); |
510 | 513 | ||
511 | /* Find idx into station table for destination station */ | 514 | /* Find idx into station table for destination station */ |
512 | sta_id = il_sta_id_or_broadcast( | 515 | sta_id = il_sta_id_or_broadcast(il, &il->ctx, info->control.sta); |
513 | il, &il->ctx, | ||
514 | info->control.sta); | ||
515 | if (sta_id == IL_INVALID_STATION) { | 516 | if (sta_id == IL_INVALID_STATION) { |
516 | D_DROP("Dropping - INVALID STATION: %pM\n", | 517 | D_DROP("Dropping - INVALID STATION: %pM\n", hdr->addr1); |
517 | hdr->addr1); | ||
518 | goto drop; | 518 | goto drop; |
519 | } | 519 | } |
520 | 520 | ||
@@ -557,13 +557,13 @@ static int il3945_tx_skb(struct il_priv *il, struct sk_buff *skb) | |||
557 | * locate the frame within the tx queue and do post-tx processing. | 557 | * locate the frame within the tx queue and do post-tx processing. |
558 | */ | 558 | */ |
559 | out_cmd->hdr.cmd = C_TX; | 559 | out_cmd->hdr.cmd = C_TX; |
560 | out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) | | 560 | out_cmd->hdr.sequence = |
561 | IDX_TO_SEQ(q->write_ptr))); | 561 | cpu_to_le16((u16) |
562 | (QUEUE_TO_SEQ(txq_id) | IDX_TO_SEQ(q->write_ptr))); | ||
562 | 563 | ||
563 | /* Copy MAC header from skb into command buffer */ | 564 | /* Copy MAC header from skb into command buffer */ |
564 | memcpy(tx_cmd->hdr, hdr, hdr_len); | 565 | memcpy(tx_cmd->hdr, hdr, hdr_len); |
565 | 566 | ||
566 | |||
567 | if (info->control.hw_key) | 567 | if (info->control.hw_key) |
568 | il3945_build_tx_cmd_hwcrypto(il, info, out_cmd, skb, sta_id); | 568 | il3945_build_tx_cmd_hwcrypto(il, info, out_cmd, skb, sta_id); |
569 | 569 | ||
@@ -574,7 +574,7 @@ static int il3945_tx_skb(struct il_priv *il, struct sk_buff *skb) | |||
574 | il3945_hw_build_tx_cmd_rate(il, out_cmd, info, hdr, sta_id, 0); | 574 | il3945_hw_build_tx_cmd_rate(il, out_cmd, info, hdr, sta_id, 0); |
575 | 575 | ||
576 | /* Total # bytes to be transmitted */ | 576 | /* Total # bytes to be transmitted */ |
577 | len = (u16)skb->len; | 577 | len = (u16) skb->len; |
578 | tx_cmd->len = cpu_to_le16(len); | 578 | tx_cmd->len = cpu_to_le16(len); |
579 | 579 | ||
580 | il_dbg_log_tx_data_frame(il, len, hdr); | 580 | il_dbg_log_tx_data_frame(il, len, hdr); |
@@ -589,12 +589,11 @@ static int il3945_tx_skb(struct il_priv *il, struct sk_buff *skb) | |||
589 | txq->need_update = 0; | 589 | txq->need_update = 0; |
590 | } | 590 | } |
591 | 591 | ||
592 | D_TX("sequence nr = 0X%x\n", | 592 | D_TX("sequence nr = 0X%x\n", le16_to_cpu(out_cmd->hdr.sequence)); |
593 | le16_to_cpu(out_cmd->hdr.sequence)); | ||
594 | D_TX("tx_flags = 0X%x\n", le32_to_cpu(tx_cmd->tx_flags)); | 593 | D_TX("tx_flags = 0X%x\n", le32_to_cpu(tx_cmd->tx_flags)); |
595 | il_print_hex_dump(il, IL_DL_TX, tx_cmd, sizeof(*tx_cmd)); | 594 | il_print_hex_dump(il, IL_DL_TX, tx_cmd, sizeof(*tx_cmd)); |
596 | il_print_hex_dump(il, IL_DL_TX, (u8 *)tx_cmd->hdr, | 595 | il_print_hex_dump(il, IL_DL_TX, (u8 *) tx_cmd->hdr, |
597 | ieee80211_hdrlen(fc)); | 596 | ieee80211_hdrlen(fc)); |
598 | 597 | ||
599 | /* | 598 | /* |
600 | * Use the first empty entry in this queue's command buffer array | 599 | * Use the first empty entry in this queue's command buffer array |
@@ -605,14 +604,15 @@ static int il3945_tx_skb(struct il_priv *il, struct sk_buff *skb) | |||
605 | * of the MAC header (device reads on dword boundaries). | 604 | * of the MAC header (device reads on dword boundaries). |
606 | * We'll tell device about this padding later. | 605 | * We'll tell device about this padding later. |
607 | */ | 606 | */ |
608 | len = sizeof(struct il3945_tx_cmd) + | 607 | len = |
609 | sizeof(struct il_cmd_header) + hdr_len; | 608 | sizeof(struct il3945_tx_cmd) + sizeof(struct il_cmd_header) + |
609 | hdr_len; | ||
610 | len = (len + 3) & ~3; | 610 | len = (len + 3) & ~3; |
611 | 611 | ||
612 | /* Physical address of this Tx command's header (not MAC header!), | 612 | /* Physical address of this Tx command's header (not MAC header!), |
613 | * within command buffer array. */ | 613 | * within command buffer array. */ |
614 | txcmd_phys = pci_map_single(il->pci_dev, &out_cmd->hdr, | 614 | txcmd_phys = |
615 | len, PCI_DMA_TODEVICE); | 615 | pci_map_single(il->pci_dev, &out_cmd->hdr, len, PCI_DMA_TODEVICE); |
616 | /* we do not map meta data ... so we can safely access address to | 616 | /* we do not map meta data ... so we can safely access address to |
617 | * provide to unmap command*/ | 617 | * provide to unmap command*/ |
618 | dma_unmap_addr_set(out_meta, mapping, txcmd_phys); | 618 | dma_unmap_addr_set(out_meta, mapping, txcmd_phys); |
@@ -620,29 +620,26 @@ static int il3945_tx_skb(struct il_priv *il, struct sk_buff *skb) | |||
620 | 620 | ||
621 | /* Add buffer containing Tx command and MAC(!) header to TFD's | 621 | /* Add buffer containing Tx command and MAC(!) header to TFD's |
622 | * first entry */ | 622 | * first entry */ |
623 | il->cfg->ops->lib->txq_attach_buf_to_tfd(il, txq, | 623 | il->cfg->ops->lib->txq_attach_buf_to_tfd(il, txq, txcmd_phys, len, 1, |
624 | txcmd_phys, len, 1, 0); | 624 | 0); |
625 | |||
626 | 625 | ||
627 | /* Set up TFD's 2nd entry to point directly to remainder of skb, | 626 | /* Set up TFD's 2nd entry to point directly to remainder of skb, |
628 | * if any (802.11 null frames have no payload). */ | 627 | * if any (802.11 null frames have no payload). */ |
629 | len = skb->len - hdr_len; | 628 | len = skb->len - hdr_len; |
630 | if (len) { | 629 | if (len) { |
631 | phys_addr = pci_map_single(il->pci_dev, skb->data + hdr_len, | 630 | phys_addr = |
632 | len, PCI_DMA_TODEVICE); | 631 | pci_map_single(il->pci_dev, skb->data + hdr_len, len, |
633 | il->cfg->ops->lib->txq_attach_buf_to_tfd(il, txq, | 632 | PCI_DMA_TODEVICE); |
634 | phys_addr, len, | 633 | il->cfg->ops->lib->txq_attach_buf_to_tfd(il, txq, phys_addr, |
635 | 0, U32_PAD(len)); | 634 | len, 0, U32_PAD(len)); |
636 | } | 635 | } |
637 | 636 | ||
638 | |||
639 | /* Tell device the write idx *just past* this latest filled TFD */ | 637 | /* Tell device the write idx *just past* this latest filled TFD */ |
640 | q->write_ptr = il_queue_inc_wrap(q->write_ptr, q->n_bd); | 638 | q->write_ptr = il_queue_inc_wrap(q->write_ptr, q->n_bd); |
641 | il_txq_update_write_ptr(il, txq); | 639 | il_txq_update_write_ptr(il, txq); |
642 | spin_unlock_irqrestore(&il->lock, flags); | 640 | spin_unlock_irqrestore(&il->lock, flags); |
643 | 641 | ||
644 | if (il_queue_space(q) < q->high_mark | 642 | if (il_queue_space(q) < q->high_mark && il->mac80211_registered) { |
645 | && il->mac80211_registered) { | ||
646 | if (wait_write_ptr) { | 643 | if (wait_write_ptr) { |
647 | spin_lock_irqsave(&il->lock, flags); | 644 | spin_lock_irqsave(&il->lock, flags); |
648 | txq->need_update = 1; | 645 | txq->need_update = 1; |
@@ -661,9 +658,9 @@ drop: | |||
661 | return -1; | 658 | return -1; |
662 | } | 659 | } |
663 | 660 | ||
664 | static int il3945_get_measurement(struct il_priv *il, | 661 | static int |
665 | struct ieee80211_measurement_params *params, | 662 | il3945_get_measurement(struct il_priv *il, |
666 | u8 type) | 663 | struct ieee80211_measurement_params *params, u8 type) |
667 | { | 664 | { |
668 | struct il_spectrum_cmd spectrum; | 665 | struct il_spectrum_cmd spectrum; |
669 | struct il_rx_pkt *pkt; | 666 | struct il_rx_pkt *pkt; |
@@ -679,9 +676,12 @@ static int il3945_get_measurement(struct il_priv *il, | |||
679 | struct il_rxon_context *ctx = &il->ctx; | 676 | struct il_rxon_context *ctx = &il->ctx; |
680 | 677 | ||
681 | if (il_is_associated(il)) | 678 | if (il_is_associated(il)) |
682 | add_time = il_usecs_to_beacons(il, | 679 | add_time = |
683 | le64_to_cpu(params->start_time) - il->_3945.last_tsf, | 680 | il_usecs_to_beacons(il, |
684 | le16_to_cpu(ctx->timing.beacon_interval)); | 681 | le64_to_cpu(params->start_time) - |
682 | il->_3945.last_tsf, | ||
683 | le16_to_cpu(ctx->timing. | ||
684 | beacon_interval)); | ||
685 | 685 | ||
686 | memset(&spectrum, 0, sizeof(spectrum)); | 686 | memset(&spectrum, 0, sizeof(spectrum)); |
687 | 687 | ||
@@ -694,9 +694,9 @@ static int il3945_get_measurement(struct il_priv *il, | |||
694 | 694 | ||
695 | if (il_is_associated(il)) | 695 | if (il_is_associated(il)) |
696 | spectrum.start_time = | 696 | spectrum.start_time = |
697 | il_add_beacon_time(il, | 697 | il_add_beacon_time(il, il->_3945.last_beacon_time, add_time, |
698 | il->_3945.last_beacon_time, add_time, | 698 | le16_to_cpu(ctx->timing. |
699 | le16_to_cpu(ctx->timing.beacon_interval)); | 699 | beacon_interval)); |
700 | else | 700 | else |
701 | spectrum.start_time = 0; | 701 | spectrum.start_time = 0; |
702 | 702 | ||
@@ -704,8 +704,9 @@ static int il3945_get_measurement(struct il_priv *il, | |||
704 | spectrum.channels[0].channel = params->channel; | 704 | spectrum.channels[0].channel = params->channel; |
705 | spectrum.channels[0].type = type; | 705 | spectrum.channels[0].type = type; |
706 | if (ctx->active.flags & RXON_FLG_BAND_24G_MSK) | 706 | if (ctx->active.flags & RXON_FLG_BAND_24G_MSK) |
707 | spectrum.flags |= RXON_FLG_BAND_24G_MSK | | 707 | spectrum.flags |= |
708 | RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK; | 708 | RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK | |
709 | RXON_FLG_TGG_PROTECT_MSK; | ||
709 | 710 | ||
710 | rc = il_send_cmd_sync(il, &cmd); | 711 | rc = il_send_cmd_sync(il, &cmd); |
711 | if (rc) | 712 | if (rc) |
@@ -722,7 +723,7 @@ static int il3945_get_measurement(struct il_priv *il, | |||
722 | case 0: /* Command will be handled */ | 723 | case 0: /* Command will be handled */ |
723 | if (pkt->u.spectrum.id != 0xff) { | 724 | if (pkt->u.spectrum.id != 0xff) { |
724 | D_INFO("Replaced existing measurement: %d\n", | 725 | D_INFO("Replaced existing measurement: %d\n", |
725 | pkt->u.spectrum.id); | 726 | pkt->u.spectrum.id); |
726 | il->measurement_status &= ~MEASUREMENT_READY; | 727 | il->measurement_status &= ~MEASUREMENT_READY; |
727 | } | 728 | } |
728 | il->measurement_status |= MEASUREMENT_ACTIVE; | 729 | il->measurement_status |= MEASUREMENT_ACTIVE; |
@@ -739,8 +740,8 @@ static int il3945_get_measurement(struct il_priv *il, | |||
739 | return rc; | 740 | return rc; |
740 | } | 741 | } |
741 | 742 | ||
742 | static void il3945_hdl_alive(struct il_priv *il, | 743 | static void |
743 | struct il_rx_buf *rxb) | 744 | il3945_hdl_alive(struct il_priv *il, struct il_rx_buf *rxb) |
744 | { | 745 | { |
745 | struct il_rx_pkt *pkt = rxb_addr(rxb); | 746 | struct il_rx_pkt *pkt = rxb_addr(rxb); |
746 | struct il_alive_resp *palive; | 747 | struct il_alive_resp *palive; |
@@ -748,10 +749,8 @@ static void il3945_hdl_alive(struct il_priv *il, | |||
748 | 749 | ||
749 | palive = &pkt->u.alive_frame; | 750 | palive = &pkt->u.alive_frame; |
750 | 751 | ||
751 | D_INFO("Alive ucode status 0x%08X revision " | 752 | D_INFO("Alive ucode status 0x%08X revision " "0x%01X 0x%01X\n", |
752 | "0x%01X 0x%01X\n", | 753 | palive->is_valid, palive->ver_type, palive->ver_subtype); |
753 | palive->is_valid, palive->ver_type, | ||
754 | palive->ver_subtype); | ||
755 | 754 | ||
756 | if (palive->ver_subtype == INITIALIZE_SUBTYPE) { | 755 | if (palive->ver_subtype == INITIALIZE_SUBTYPE) { |
757 | D_INFO("Initialization Alive received.\n"); | 756 | D_INFO("Initialization Alive received.\n"); |
@@ -769,14 +768,13 @@ static void il3945_hdl_alive(struct il_priv *il, | |||
769 | /* We delay the ALIVE response by 5ms to | 768 | /* We delay the ALIVE response by 5ms to |
770 | * give the HW RF Kill time to activate... */ | 769 | * give the HW RF Kill time to activate... */ |
771 | if (palive->is_valid == UCODE_VALID_OK) | 770 | if (palive->is_valid == UCODE_VALID_OK) |
772 | queue_delayed_work(il->workqueue, pwork, | 771 | queue_delayed_work(il->workqueue, pwork, msecs_to_jiffies(5)); |
773 | msecs_to_jiffies(5)); | ||
774 | else | 772 | else |
775 | IL_WARN("uCode did not respond OK.\n"); | 773 | IL_WARN("uCode did not respond OK.\n"); |
776 | } | 774 | } |
777 | 775 | ||
778 | static void il3945_hdl_add_sta(struct il_priv *il, | 776 | static void |
779 | struct il_rx_buf *rxb) | 777 | il3945_hdl_add_sta(struct il_priv *il, struct il_rx_buf *rxb) |
780 | { | 778 | { |
781 | #ifdef CONFIG_IWLEGACY_DEBUG | 779 | #ifdef CONFIG_IWLEGACY_DEBUG |
782 | struct il_rx_pkt *pkt = rxb_addr(rxb); | 780 | struct il_rx_pkt *pkt = rxb_addr(rxb); |
@@ -785,21 +783,19 @@ static void il3945_hdl_add_sta(struct il_priv *il, | |||
785 | D_RX("Received C_ADD_STA: 0x%02X\n", pkt->u.status); | 783 | D_RX("Received C_ADD_STA: 0x%02X\n", pkt->u.status); |
786 | } | 784 | } |
787 | 785 | ||
788 | static void il3945_hdl_beacon(struct il_priv *il, | 786 | static void |
789 | struct il_rx_buf *rxb) | 787 | il3945_hdl_beacon(struct il_priv *il, struct il_rx_buf *rxb) |
790 | { | 788 | { |
791 | struct il_rx_pkt *pkt = rxb_addr(rxb); | 789 | struct il_rx_pkt *pkt = rxb_addr(rxb); |
792 | struct il3945_beacon_notif *beacon = &(pkt->u.beacon_status); | 790 | struct il3945_beacon_notif *beacon = &(pkt->u.beacon_status); |
793 | #ifdef CONFIG_IWLEGACY_DEBUG | 791 | #ifdef CONFIG_IWLEGACY_DEBUG |
794 | u8 rate = beacon->beacon_notify_hdr.rate; | 792 | u8 rate = beacon->beacon_notify_hdr.rate; |
795 | 793 | ||
796 | D_RX("beacon status %x retries %d iss %d " | 794 | D_RX("beacon status %x retries %d iss %d " "tsf %d %d rate %d\n", |
797 | "tsf %d %d rate %d\n", | 795 | le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK, |
798 | le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK, | 796 | beacon->beacon_notify_hdr.failure_frame, |
799 | beacon->beacon_notify_hdr.failure_frame, | 797 | le32_to_cpu(beacon->ibss_mgr_status), |
800 | le32_to_cpu(beacon->ibss_mgr_status), | 798 | le32_to_cpu(beacon->high_tsf), le32_to_cpu(beacon->low_tsf), rate); |
801 | le32_to_cpu(beacon->high_tsf), | ||
802 | le32_to_cpu(beacon->low_tsf), rate); | ||
803 | #endif | 799 | #endif |
804 | 800 | ||
805 | il->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status); | 801 | il->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status); |
@@ -808,32 +804,30 @@ static void il3945_hdl_beacon(struct il_priv *il, | |||
808 | 804 | ||
809 | /* Handle notification from uCode that card's power state is changing | 805 | /* Handle notification from uCode that card's power state is changing |
810 | * due to software, hardware, or critical temperature RFKILL */ | 806 | * due to software, hardware, or critical temperature RFKILL */ |
811 | static void il3945_hdl_card_state(struct il_priv *il, | 807 | static void |
812 | struct il_rx_buf *rxb) | 808 | il3945_hdl_card_state(struct il_priv *il, struct il_rx_buf *rxb) |
813 | { | 809 | { |
814 | struct il_rx_pkt *pkt = rxb_addr(rxb); | 810 | struct il_rx_pkt *pkt = rxb_addr(rxb); |
815 | u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags); | 811 | u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags); |
816 | unsigned long status = il->status; | 812 | unsigned long status = il->status; |
817 | 813 | ||
818 | IL_WARN("Card state received: HW:%s SW:%s\n", | 814 | IL_WARN("Card state received: HW:%s SW:%s\n", |
819 | (flags & HW_CARD_DISABLED) ? "Kill" : "On", | 815 | (flags & HW_CARD_DISABLED) ? "Kill" : "On", |
820 | (flags & SW_CARD_DISABLED) ? "Kill" : "On"); | 816 | (flags & SW_CARD_DISABLED) ? "Kill" : "On"); |
821 | 817 | ||
822 | _il_wr(il, CSR_UCODE_DRV_GP1_SET, | 818 | _il_wr(il, CSR_UCODE_DRV_GP1_SET, CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); |
823 | CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); | ||
824 | 819 | ||
825 | if (flags & HW_CARD_DISABLED) | 820 | if (flags & HW_CARD_DISABLED) |
826 | set_bit(S_RF_KILL_HW, &il->status); | 821 | set_bit(S_RF_KILL_HW, &il->status); |
827 | else | 822 | else |
828 | clear_bit(S_RF_KILL_HW, &il->status); | 823 | clear_bit(S_RF_KILL_HW, &il->status); |
829 | 824 | ||
830 | |||
831 | il_scan_cancel(il); | 825 | il_scan_cancel(il); |
832 | 826 | ||
833 | if ((test_bit(S_RF_KILL_HW, &status) != | 827 | if ((test_bit(S_RF_KILL_HW, &status) != |
834 | test_bit(S_RF_KILL_HW, &il->status))) | 828 | test_bit(S_RF_KILL_HW, &il->status))) |
835 | wiphy_rfkill_set_hw_state(il->hw->wiphy, | 829 | wiphy_rfkill_set_hw_state(il->hw->wiphy, |
836 | test_bit(S_RF_KILL_HW, &il->status)); | 830 | test_bit(S_RF_KILL_HW, &il->status)); |
837 | else | 831 | else |
838 | wake_up(&il->wait_command_queue); | 832 | wake_up(&il->wait_command_queue); |
839 | } | 833 | } |
@@ -847,17 +841,16 @@ static void il3945_hdl_card_state(struct il_priv *il, | |||
847 | * This function chains into the hardware specific files for them to setup | 841 | * This function chains into the hardware specific files for them to setup |
848 | * any hardware specific handlers as well. | 842 | * any hardware specific handlers as well. |
849 | */ | 843 | */ |
850 | static void il3945_setup_handlers(struct il_priv *il) | 844 | static void |
845 | il3945_setup_handlers(struct il_priv *il) | ||
851 | { | 846 | { |
852 | il->handlers[N_ALIVE] = il3945_hdl_alive; | 847 | il->handlers[N_ALIVE] = il3945_hdl_alive; |
853 | il->handlers[C_ADD_STA] = il3945_hdl_add_sta; | 848 | il->handlers[C_ADD_STA] = il3945_hdl_add_sta; |
854 | il->handlers[N_ERROR] = il_hdl_error; | 849 | il->handlers[N_ERROR] = il_hdl_error; |
855 | il->handlers[N_CHANNEL_SWITCH] = il_hdl_csa; | 850 | il->handlers[N_CHANNEL_SWITCH] = il_hdl_csa; |
856 | il->handlers[N_SPECTRUM_MEASUREMENT] = | 851 | il->handlers[N_SPECTRUM_MEASUREMENT] = il_hdl_spectrum_measurement; |
857 | il_hdl_spectrum_measurement; | ||
858 | il->handlers[N_PM_SLEEP] = il_hdl_pm_sleep; | 852 | il->handlers[N_PM_SLEEP] = il_hdl_pm_sleep; |
859 | il->handlers[N_PM_DEBUG_STATS] = | 853 | il->handlers[N_PM_DEBUG_STATS] = il_hdl_pm_debug_stats; |
860 | il_hdl_pm_debug_stats; | ||
861 | il->handlers[N_BEACON] = il3945_hdl_beacon; | 854 | il->handlers[N_BEACON] = il3945_hdl_beacon; |
862 | 855 | ||
863 | /* | 856 | /* |
@@ -942,10 +935,10 @@ static void il3945_setup_handlers(struct il_priv *il) | |||
942 | /** | 935 | /** |
943 | * il3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr | 936 | * il3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr |
944 | */ | 937 | */ |
945 | static inline __le32 il3945_dma_addr2rbd_ptr(struct il_priv *il, | 938 | static inline __le32 |
946 | dma_addr_t dma_addr) | 939 | il3945_dma_addr2rbd_ptr(struct il_priv *il, dma_addr_t dma_addr) |
947 | { | 940 | { |
948 | return cpu_to_le32((u32)dma_addr); | 941 | return cpu_to_le32((u32) dma_addr); |
949 | } | 942 | } |
950 | 943 | ||
951 | /** | 944 | /** |
@@ -959,7 +952,8 @@ static inline __le32 il3945_dma_addr2rbd_ptr(struct il_priv *il, | |||
959 | * also updates the memory address in the firmware to reference the new | 952 | * also updates the memory address in the firmware to reference the new |
960 | * target buffer. | 953 | * target buffer. |
961 | */ | 954 | */ |
962 | static void il3945_rx_queue_restock(struct il_priv *il) | 955 | static void |
956 | il3945_rx_queue_restock(struct il_priv *il) | ||
963 | { | 957 | { |
964 | struct il_rx_queue *rxq = &il->rxq; | 958 | struct il_rx_queue *rxq = &il->rxq; |
965 | struct list_head *element; | 959 | struct list_head *element; |
@@ -976,7 +970,8 @@ static void il3945_rx_queue_restock(struct il_priv *il) | |||
976 | list_del(element); | 970 | list_del(element); |
977 | 971 | ||
978 | /* Point to Rx buffer via next RBD in circular buffer */ | 972 | /* Point to Rx buffer via next RBD in circular buffer */ |
979 | rxq->bd[rxq->write] = il3945_dma_addr2rbd_ptr(il, rxb->page_dma); | 973 | rxq->bd[rxq->write] = |
974 | il3945_dma_addr2rbd_ptr(il, rxb->page_dma); | ||
980 | rxq->queue[rxq->write] = rxb; | 975 | rxq->queue[rxq->write] = rxb; |
981 | rxq->write = (rxq->write + 1) & RX_QUEUE_MASK; | 976 | rxq->write = (rxq->write + 1) & RX_QUEUE_MASK; |
982 | rxq->free_count--; | 977 | rxq->free_count--; |
@@ -987,7 +982,6 @@ static void il3945_rx_queue_restock(struct il_priv *il) | |||
987 | if (rxq->free_count <= RX_LOW_WATERMARK) | 982 | if (rxq->free_count <= RX_LOW_WATERMARK) |
988 | queue_work(il->workqueue, &il->rx_replenish); | 983 | queue_work(il->workqueue, &il->rx_replenish); |
989 | 984 | ||
990 | |||
991 | /* If we've added more space for the firmware to place data, tell it. | 985 | /* If we've added more space for the firmware to place data, tell it. |
992 | * Increment device's write pointer in multiples of 8. */ | 986 | * Increment device's write pointer in multiples of 8. */ |
993 | if (rxq->write_actual != (rxq->write & ~0x7) || | 987 | if (rxq->write_actual != (rxq->write & ~0x7) || |
@@ -1007,7 +1001,8 @@ static void il3945_rx_queue_restock(struct il_priv *il) | |||
1007 | * Also restock the Rx queue via il3945_rx_queue_restock. | 1001 | * Also restock the Rx queue via il3945_rx_queue_restock. |
1008 | * This is called as a scheduled work item (except for during initialization) | 1002 | * This is called as a scheduled work item (except for during initialization) |
1009 | */ | 1003 | */ |
1010 | static void il3945_rx_allocate(struct il_priv *il, gfp_t priority) | 1004 | static void |
1005 | il3945_rx_allocate(struct il_priv *il, gfp_t priority) | ||
1011 | { | 1006 | { |
1012 | struct il_rx_queue *rxq = &il->rxq; | 1007 | struct il_rx_queue *rxq = &il->rxq; |
1013 | struct list_head *element; | 1008 | struct list_head *element; |
@@ -1038,9 +1033,11 @@ static void il3945_rx_allocate(struct il_priv *il, gfp_t priority) | |||
1038 | D_INFO("Failed to allocate SKB buffer.\n"); | 1033 | D_INFO("Failed to allocate SKB buffer.\n"); |
1039 | if (rxq->free_count <= RX_LOW_WATERMARK && | 1034 | if (rxq->free_count <= RX_LOW_WATERMARK && |
1040 | net_ratelimit()) | 1035 | net_ratelimit()) |
1041 | IL_ERR("Failed to allocate SKB buffer with %s. Only %u free buffers remaining.\n", | 1036 | IL_ERR |
1042 | priority == GFP_ATOMIC ? "GFP_ATOMIC" : "GFP_KERNEL", | 1037 | ("Failed to allocate SKB buffer with %s. Only %u free buffers remaining.\n", |
1043 | rxq->free_count); | 1038 | priority == |
1039 | GFP_ATOMIC ? "GFP_ATOMIC" : "GFP_KERNEL", | ||
1040 | rxq->free_count); | ||
1044 | /* We don't reschedule replenish work here -- we will | 1041 | /* We don't reschedule replenish work here -- we will |
1045 | * call the restock method and if it still needs | 1042 | * call the restock method and if it still needs |
1046 | * more buffers it will schedule replenish */ | 1043 | * more buffers it will schedule replenish */ |
@@ -1060,9 +1057,10 @@ static void il3945_rx_allocate(struct il_priv *il, gfp_t priority) | |||
1060 | 1057 | ||
1061 | rxb->page = page; | 1058 | rxb->page = page; |
1062 | /* Get physical address of RB/SKB */ | 1059 | /* Get physical address of RB/SKB */ |
1063 | rxb->page_dma = pci_map_page(il->pci_dev, page, 0, | 1060 | rxb->page_dma = |
1064 | PAGE_SIZE << il->hw_params.rx_page_order, | 1061 | pci_map_page(il->pci_dev, page, 0, |
1065 | PCI_DMA_FROMDEVICE); | 1062 | PAGE_SIZE << il->hw_params.rx_page_order, |
1063 | PCI_DMA_FROMDEVICE); | ||
1066 | 1064 | ||
1067 | spin_lock_irqsave(&rxq->lock, flags); | 1065 | spin_lock_irqsave(&rxq->lock, flags); |
1068 | 1066 | ||
@@ -1074,7 +1072,8 @@ static void il3945_rx_allocate(struct il_priv *il, gfp_t priority) | |||
1074 | } | 1072 | } |
1075 | } | 1073 | } |
1076 | 1074 | ||
1077 | void il3945_rx_queue_reset(struct il_priv *il, struct il_rx_queue *rxq) | 1075 | void |
1076 | il3945_rx_queue_reset(struct il_priv *il, struct il_rx_queue *rxq) | ||
1078 | { | 1077 | { |
1079 | unsigned long flags; | 1078 | unsigned long flags; |
1080 | int i; | 1079 | int i; |
@@ -1087,8 +1086,8 @@ void il3945_rx_queue_reset(struct il_priv *il, struct il_rx_queue *rxq) | |||
1087 | * to an SKB, so we need to unmap and free potential storage */ | 1086 | * to an SKB, so we need to unmap and free potential storage */ |
1088 | if (rxq->pool[i].page != NULL) { | 1087 | if (rxq->pool[i].page != NULL) { |
1089 | pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma, | 1088 | pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma, |
1090 | PAGE_SIZE << il->hw_params.rx_page_order, | 1089 | PAGE_SIZE << il->hw_params.rx_page_order, |
1091 | PCI_DMA_FROMDEVICE); | 1090 | PCI_DMA_FROMDEVICE); |
1092 | __il_free_pages(il, rxq->pool[i].page); | 1091 | __il_free_pages(il, rxq->pool[i].page); |
1093 | rxq->pool[i].page = NULL; | 1092 | rxq->pool[i].page = NULL; |
1094 | } | 1093 | } |
@@ -1103,7 +1102,8 @@ void il3945_rx_queue_reset(struct il_priv *il, struct il_rx_queue *rxq) | |||
1103 | spin_unlock_irqrestore(&rxq->lock, flags); | 1102 | spin_unlock_irqrestore(&rxq->lock, flags); |
1104 | } | 1103 | } |
1105 | 1104 | ||
1106 | void il3945_rx_replenish(void *data) | 1105 | void |
1106 | il3945_rx_replenish(void *data) | ||
1107 | { | 1107 | { |
1108 | struct il_priv *il = data; | 1108 | struct il_priv *il = data; |
1109 | unsigned long flags; | 1109 | unsigned long flags; |
@@ -1115,27 +1115,28 @@ void il3945_rx_replenish(void *data) | |||
1115 | spin_unlock_irqrestore(&il->lock, flags); | 1115 | spin_unlock_irqrestore(&il->lock, flags); |
1116 | } | 1116 | } |
1117 | 1117 | ||
1118 | static void il3945_rx_replenish_now(struct il_priv *il) | 1118 | static void |
1119 | il3945_rx_replenish_now(struct il_priv *il) | ||
1119 | { | 1120 | { |
1120 | il3945_rx_allocate(il, GFP_ATOMIC); | 1121 | il3945_rx_allocate(il, GFP_ATOMIC); |
1121 | 1122 | ||
1122 | il3945_rx_queue_restock(il); | 1123 | il3945_rx_queue_restock(il); |
1123 | } | 1124 | } |
1124 | 1125 | ||
1125 | |||
1126 | /* Assumes that the skb field of the buffers in 'pool' is kept accurate. | 1126 | /* Assumes that the skb field of the buffers in 'pool' is kept accurate. |
1127 | * If an SKB has been detached, the POOL needs to have its SKB set to NULL | 1127 | * If an SKB has been detached, the POOL needs to have its SKB set to NULL |
1128 | * This free routine walks the list of POOL entries and if SKB is set to | 1128 | * This free routine walks the list of POOL entries and if SKB is set to |
1129 | * non NULL it is unmapped and freed | 1129 | * non NULL it is unmapped and freed |
1130 | */ | 1130 | */ |
1131 | static void il3945_rx_queue_free(struct il_priv *il, struct il_rx_queue *rxq) | 1131 | static void |
1132 | il3945_rx_queue_free(struct il_priv *il, struct il_rx_queue *rxq) | ||
1132 | { | 1133 | { |
1133 | int i; | 1134 | int i; |
1134 | for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) { | 1135 | for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) { |
1135 | if (rxq->pool[i].page != NULL) { | 1136 | if (rxq->pool[i].page != NULL) { |
1136 | pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma, | 1137 | pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma, |
1137 | PAGE_SIZE << il->hw_params.rx_page_order, | 1138 | PAGE_SIZE << il->hw_params.rx_page_order, |
1138 | PCI_DMA_FROMDEVICE); | 1139 | PCI_DMA_FROMDEVICE); |
1139 | __il_free_pages(il, rxq->pool[i].page); | 1140 | __il_free_pages(il, rxq->pool[i].page); |
1140 | rxq->pool[i].page = NULL; | 1141 | rxq->pool[i].page = NULL; |
1141 | } | 1142 | } |
@@ -1146,29 +1147,29 @@ static void il3945_rx_queue_free(struct il_priv *il, struct il_rx_queue *rxq) | |||
1146 | dma_free_coherent(&il->pci_dev->dev, sizeof(struct il_rb_status), | 1147 | dma_free_coherent(&il->pci_dev->dev, sizeof(struct il_rb_status), |
1147 | rxq->rb_stts, rxq->rb_stts_dma); | 1148 | rxq->rb_stts, rxq->rb_stts_dma); |
1148 | rxq->bd = NULL; | 1149 | rxq->bd = NULL; |
1149 | rxq->rb_stts = NULL; | 1150 | rxq->rb_stts = NULL; |
1150 | } | 1151 | } |
1151 | 1152 | ||
1152 | |||
1153 | /* Convert linear signal-to-noise ratio into dB */ | 1153 | /* Convert linear signal-to-noise ratio into dB */ |
1154 | static u8 ratio2dB[100] = { | 1154 | static u8 ratio2dB[100] = { |
1155 | /* 0 1 2 3 4 5 6 7 8 9 */ | 1155 | /* 0 1 2 3 4 5 6 7 8 9 */ |
1156 | 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */ | 1156 | 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */ |
1157 | 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */ | 1157 | 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */ |
1158 | 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */ | 1158 | 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */ |
1159 | 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */ | 1159 | 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */ |
1160 | 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */ | 1160 | 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */ |
1161 | 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */ | 1161 | 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */ |
1162 | 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */ | 1162 | 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */ |
1163 | 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */ | 1163 | 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */ |
1164 | 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */ | 1164 | 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */ |
1165 | 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */ | 1165 | 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */ |
1166 | }; | 1166 | }; |
1167 | 1167 | ||
1168 | /* Calculates a relative dB value from a ratio of linear | 1168 | /* Calculates a relative dB value from a ratio of linear |
1169 | * (i.e. not dB) signal levels. | 1169 | * (i.e. not dB) signal levels. |
1170 | * Conversion assumes that levels are voltages (20*log), not powers (10*log). */ | 1170 | * Conversion assumes that levels are voltages (20*log), not powers (10*log). */ |
1171 | int il3945_calc_db_from_ratio(int sig_ratio) | 1171 | int |
1172 | il3945_calc_db_from_ratio(int sig_ratio) | ||
1172 | { | 1173 | { |
1173 | /* 1000:1 or higher just report as 60 dB */ | 1174 | /* 1000:1 or higher just report as 60 dB */ |
1174 | if (sig_ratio >= 1000) | 1175 | if (sig_ratio >= 1000) |
@@ -1177,7 +1178,7 @@ int il3945_calc_db_from_ratio(int sig_ratio) | |||
1177 | /* 100:1 or higher, divide by 10 and use table, | 1178 | /* 100:1 or higher, divide by 10 and use table, |
1178 | * add 20 dB to make up for divide by 10 */ | 1179 | * add 20 dB to make up for divide by 10 */ |
1179 | if (sig_ratio >= 100) | 1180 | if (sig_ratio >= 100) |
1180 | return 20 + (int)ratio2dB[sig_ratio/10]; | 1181 | return 20 + (int)ratio2dB[sig_ratio / 10]; |
1181 | 1182 | ||
1182 | /* We shouldn't see this */ | 1183 | /* We shouldn't see this */ |
1183 | if (sig_ratio < 1) | 1184 | if (sig_ratio < 1) |
@@ -1194,7 +1195,8 @@ int il3945_calc_db_from_ratio(int sig_ratio) | |||
1194 | * the appropriate handlers, including command responses, | 1195 | * the appropriate handlers, including command responses, |
1195 | * frame-received notifications, and other notifications. | 1196 | * frame-received notifications, and other notifications. |
1196 | */ | 1197 | */ |
1197 | static void il3945_rx_handle(struct il_priv *il) | 1198 | static void |
1199 | il3945_rx_handle(struct il_priv *il) | ||
1198 | { | 1200 | { |
1199 | struct il_rx_buf *rxb; | 1201 | struct il_rx_buf *rxb; |
1200 | struct il_rx_pkt *pkt; | 1202 | struct il_rx_pkt *pkt; |
@@ -1208,7 +1210,7 @@ static void il3945_rx_handle(struct il_priv *il) | |||
1208 | 1210 | ||
1209 | /* uCode's read idx (stored in shared DRAM) indicates the last Rx | 1211 | /* uCode's read idx (stored in shared DRAM) indicates the last Rx |
1210 | * buffer that the driver may process (last buffer filled by ucode). */ | 1212 | * buffer that the driver may process (last buffer filled by ucode). */ |
1211 | r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF; | 1213 | r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF; |
1212 | i = rxq->read; | 1214 | i = rxq->read; |
1213 | 1215 | ||
1214 | /* calculate total frames need to be restock after handling RX */ | 1216 | /* calculate total frames need to be restock after handling RX */ |
@@ -1240,7 +1242,7 @@ static void il3945_rx_handle(struct il_priv *il) | |||
1240 | pkt = rxb_addr(rxb); | 1242 | pkt = rxb_addr(rxb); |
1241 | 1243 | ||
1242 | len = le32_to_cpu(pkt->len_n_flags) & IL_RX_FRAME_SIZE_MSK; | 1244 | len = le32_to_cpu(pkt->len_n_flags) & IL_RX_FRAME_SIZE_MSK; |
1243 | len += sizeof(u32); /* account for status word */ | 1245 | len += sizeof(u32); /* account for status word */ |
1244 | 1246 | ||
1245 | /* Reclaim a command buffer only if this packet is a response | 1247 | /* Reclaim a command buffer only if this packet is a response |
1246 | * to a (driver-originated) command. | 1248 | * to a (driver-originated) command. |
@@ -1249,23 +1251,20 @@ static void il3945_rx_handle(struct il_priv *il) | |||
1249 | * Ucode should set SEQ_RX_FRAME bit if ucode-originated, | 1251 | * Ucode should set SEQ_RX_FRAME bit if ucode-originated, |
1250 | * but apparently a few don't get set; catch them here. */ | 1252 | * but apparently a few don't get set; catch them here. */ |
1251 | reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) && | 1253 | reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) && |
1252 | pkt->hdr.cmd != N_STATS && | 1254 | pkt->hdr.cmd != N_STATS && pkt->hdr.cmd != C_TX; |
1253 | pkt->hdr.cmd != C_TX; | ||
1254 | 1255 | ||
1255 | /* Based on type of command response or notification, | 1256 | /* Based on type of command response or notification, |
1256 | * handle those that need handling via function in | 1257 | * handle those that need handling via function in |
1257 | * handlers table. See il3945_setup_handlers() */ | 1258 | * handlers table. See il3945_setup_handlers() */ |
1258 | if (il->handlers[pkt->hdr.cmd]) { | 1259 | if (il->handlers[pkt->hdr.cmd]) { |
1259 | D_RX("r = %d, i = %d, %s, 0x%02x\n", r, i, | 1260 | D_RX("r = %d, i = %d, %s, 0x%02x\n", r, i, |
1260 | il_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd); | 1261 | il_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd); |
1261 | il->isr_stats.handlers[pkt->hdr.cmd]++; | 1262 | il->isr_stats.handlers[pkt->hdr.cmd]++; |
1262 | il->handlers[pkt->hdr.cmd] (il, rxb); | 1263 | il->handlers[pkt->hdr.cmd] (il, rxb); |
1263 | } else { | 1264 | } else { |
1264 | /* No handling needed */ | 1265 | /* No handling needed */ |
1265 | D_RX( | 1266 | D_RX("r %d i %d No handler needed for %s, 0x%02x\n", r, |
1266 | "r %d i %d No handler needed for %s, 0x%02x\n", | 1267 | i, il_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd); |
1267 | r, i, il_get_cmd_string(pkt->hdr.cmd), | ||
1268 | pkt->hdr.cmd); | ||
1269 | } | 1268 | } |
1270 | 1269 | ||
1271 | /* | 1270 | /* |
@@ -1290,9 +1289,10 @@ static void il3945_rx_handle(struct il_priv *il) | |||
1290 | * rx_free list for reuse later. */ | 1289 | * rx_free list for reuse later. */ |
1291 | spin_lock_irqsave(&rxq->lock, flags); | 1290 | spin_lock_irqsave(&rxq->lock, flags); |
1292 | if (rxb->page != NULL) { | 1291 | if (rxb->page != NULL) { |
1293 | rxb->page_dma = pci_map_page(il->pci_dev, rxb->page, | 1292 | rxb->page_dma = |
1294 | 0, PAGE_SIZE << il->hw_params.rx_page_order, | 1293 | pci_map_page(il->pci_dev, rxb->page, 0, |
1295 | PCI_DMA_FROMDEVICE); | 1294 | PAGE_SIZE << il->hw_params. |
1295 | rx_page_order, PCI_DMA_FROMDEVICE); | ||
1296 | list_add_tail(&rxb->list, &rxq->rx_free); | 1296 | list_add_tail(&rxb->list, &rxq->rx_free); |
1297 | rxq->free_count++; | 1297 | rxq->free_count++; |
1298 | } else | 1298 | } else |
@@ -1322,14 +1322,16 @@ static void il3945_rx_handle(struct il_priv *il) | |||
1322 | } | 1322 | } |
1323 | 1323 | ||
1324 | /* call this function to flush any scheduled tasklet */ | 1324 | /* call this function to flush any scheduled tasklet */ |
1325 | static inline void il3945_synchronize_irq(struct il_priv *il) | 1325 | static inline void |
1326 | il3945_synchronize_irq(struct il_priv *il) | ||
1326 | { | 1327 | { |
1327 | /* wait to make sure we flush pending tasklet*/ | 1328 | /* wait to make sure we flush pending tasklet */ |
1328 | synchronize_irq(il->pci_dev->irq); | 1329 | synchronize_irq(il->pci_dev->irq); |
1329 | tasklet_kill(&il->irq_tasklet); | 1330 | tasklet_kill(&il->irq_tasklet); |
1330 | } | 1331 | } |
1331 | 1332 | ||
1332 | static const char *il3945_desc_lookup(int i) | 1333 | static const char * |
1334 | il3945_desc_lookup(int i) | ||
1333 | { | 1335 | { |
1334 | switch (i) { | 1336 | switch (i) { |
1335 | case 1: | 1337 | case 1: |
@@ -1352,7 +1354,8 @@ static const char *il3945_desc_lookup(int i) | |||
1352 | #define ERROR_START_OFFSET (1 * sizeof(u32)) | 1354 | #define ERROR_START_OFFSET (1 * sizeof(u32)) |
1353 | #define ERROR_ELEM_SIZE (7 * sizeof(u32)) | 1355 | #define ERROR_ELEM_SIZE (7 * sizeof(u32)) |
1354 | 1356 | ||
1355 | void il3945_dump_nic_error_log(struct il_priv *il) | 1357 | void |
1358 | il3945_dump_nic_error_log(struct il_priv *il) | ||
1356 | { | 1359 | { |
1357 | u32 i; | 1360 | u32 i; |
1358 | u32 desc, time, count, base, data1; | 1361 | u32 desc, time, count, base, data1; |
@@ -1365,42 +1368,34 @@ void il3945_dump_nic_error_log(struct il_priv *il) | |||
1365 | return; | 1368 | return; |
1366 | } | 1369 | } |
1367 | 1370 | ||
1368 | |||
1369 | count = il_read_targ_mem(il, base); | 1371 | count = il_read_targ_mem(il, base); |
1370 | 1372 | ||
1371 | if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) { | 1373 | if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) { |
1372 | IL_ERR("Start IWL Error Log Dump:\n"); | 1374 | IL_ERR("Start IWL Error Log Dump:\n"); |
1373 | IL_ERR("Status: 0x%08lX, count: %d\n", | 1375 | IL_ERR("Status: 0x%08lX, count: %d\n", il->status, count); |
1374 | il->status, count); | ||
1375 | } | 1376 | } |
1376 | 1377 | ||
1377 | IL_ERR("Desc Time asrtPC blink2 " | 1378 | IL_ERR("Desc Time asrtPC blink2 " |
1378 | "ilink1 nmiPC Line\n"); | 1379 | "ilink1 nmiPC Line\n"); |
1379 | for (i = ERROR_START_OFFSET; | 1380 | for (i = ERROR_START_OFFSET; |
1380 | i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET; | 1381 | i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET; |
1381 | i += ERROR_ELEM_SIZE) { | 1382 | i += ERROR_ELEM_SIZE) { |
1382 | desc = il_read_targ_mem(il, base + i); | 1383 | desc = il_read_targ_mem(il, base + i); |
1383 | time = | 1384 | time = il_read_targ_mem(il, base + i + 1 * sizeof(u32)); |
1384 | il_read_targ_mem(il, base + i + 1 * sizeof(u32)); | 1385 | blink1 = il_read_targ_mem(il, base + i + 2 * sizeof(u32)); |
1385 | blink1 = | 1386 | blink2 = il_read_targ_mem(il, base + i + 3 * sizeof(u32)); |
1386 | il_read_targ_mem(il, base + i + 2 * sizeof(u32)); | 1387 | ilink1 = il_read_targ_mem(il, base + i + 4 * sizeof(u32)); |
1387 | blink2 = | 1388 | ilink2 = il_read_targ_mem(il, base + i + 5 * sizeof(u32)); |
1388 | il_read_targ_mem(il, base + i + 3 * sizeof(u32)); | 1389 | data1 = il_read_targ_mem(il, base + i + 6 * sizeof(u32)); |
1389 | ilink1 = | ||
1390 | il_read_targ_mem(il, base + i + 4 * sizeof(u32)); | ||
1391 | ilink2 = | ||
1392 | il_read_targ_mem(il, base + i + 5 * sizeof(u32)); | ||
1393 | data1 = | ||
1394 | il_read_targ_mem(il, base + i + 6 * sizeof(u32)); | ||
1395 | 1390 | ||
1396 | IL_ERR( | 1391 | IL_ERR("%-13s (0x%X) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n", |
1397 | "%-13s (0x%X) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n", | 1392 | il3945_desc_lookup(desc), desc, time, blink1, blink2, |
1398 | il3945_desc_lookup(desc), desc, time, blink1, blink2, | 1393 | ilink1, ilink2, data1); |
1399 | ilink1, ilink2, data1); | ||
1400 | } | 1394 | } |
1401 | } | 1395 | } |
1402 | 1396 | ||
1403 | static void il3945_irq_tasklet(struct il_priv *il) | 1397 | static void |
1398 | il3945_irq_tasklet(struct il_priv *il) | ||
1404 | { | 1399 | { |
1405 | u32 inta, handled = 0; | 1400 | u32 inta, handled = 0; |
1406 | u32 inta_fh; | 1401 | u32 inta_fh; |
@@ -1427,8 +1422,8 @@ static void il3945_irq_tasklet(struct il_priv *il) | |||
1427 | if (il_get_debug_level(il) & IL_DL_ISR) { | 1422 | if (il_get_debug_level(il) & IL_DL_ISR) { |
1428 | /* just for debug */ | 1423 | /* just for debug */ |
1429 | inta_mask = _il_rd(il, CSR_INT_MASK); | 1424 | inta_mask = _il_rd(il, CSR_INT_MASK); |
1430 | D_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", | 1425 | D_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", inta, |
1431 | inta, inta_mask, inta_fh); | 1426 | inta_mask, inta_fh); |
1432 | } | 1427 | } |
1433 | #endif | 1428 | #endif |
1434 | 1429 | ||
@@ -1457,13 +1452,12 @@ static void il3945_irq_tasklet(struct il_priv *il) | |||
1457 | 1452 | ||
1458 | return; | 1453 | return; |
1459 | } | 1454 | } |
1460 | |||
1461 | #ifdef CONFIG_IWLEGACY_DEBUG | 1455 | #ifdef CONFIG_IWLEGACY_DEBUG |
1462 | if (il_get_debug_level(il) & (IL_DL_ISR)) { | 1456 | if (il_get_debug_level(il) & (IL_DL_ISR)) { |
1463 | /* NIC fires this, but we don't use it, redundant with WAKEUP */ | 1457 | /* NIC fires this, but we don't use it, redundant with WAKEUP */ |
1464 | if (inta & CSR_INT_BIT_SCD) { | 1458 | if (inta & CSR_INT_BIT_SCD) { |
1465 | D_ISR("Scheduler finished to transmit " | 1459 | D_ISR("Scheduler finished to transmit " |
1466 | "the frame/frames.\n"); | 1460 | "the frame/frames.\n"); |
1467 | il->isr_stats.sch++; | 1461 | il->isr_stats.sch++; |
1468 | } | 1462 | } |
1469 | 1463 | ||
@@ -1479,8 +1473,8 @@ static void il3945_irq_tasklet(struct il_priv *il) | |||
1479 | 1473 | ||
1480 | /* Error detected by uCode */ | 1474 | /* Error detected by uCode */ |
1481 | if (inta & CSR_INT_BIT_SW_ERR) { | 1475 | if (inta & CSR_INT_BIT_SW_ERR) { |
1482 | IL_ERR("Microcode SW error detected. " | 1476 | IL_ERR("Microcode SW error detected. " "Restarting 0x%X.\n", |
1483 | "Restarting 0x%X.\n", inta); | 1477 | inta); |
1484 | il->isr_stats.sw++; | 1478 | il->isr_stats.sw++; |
1485 | il_irq_handle_error(il); | 1479 | il_irq_handle_error(il); |
1486 | handled |= CSR_INT_BIT_SW_ERR; | 1480 | handled |= CSR_INT_BIT_SW_ERR; |
@@ -1515,8 +1509,7 @@ static void il3945_irq_tasklet(struct il_priv *il) | |||
1515 | il->isr_stats.tx++; | 1509 | il->isr_stats.tx++; |
1516 | 1510 | ||
1517 | _il_wr(il, CSR_FH_INT_STATUS, (1 << 6)); | 1511 | _il_wr(il, CSR_FH_INT_STATUS, (1 << 6)); |
1518 | il_wr(il, FH39_TCSR_CREDIT | 1512 | il_wr(il, FH39_TCSR_CREDIT(FH39_SRVC_CHNL), 0x0); |
1519 | (FH39_SRVC_CHNL), 0x0); | ||
1520 | handled |= CSR_INT_BIT_FH_TX; | 1513 | handled |= CSR_INT_BIT_FH_TX; |
1521 | } | 1514 | } |
1522 | 1515 | ||
@@ -1527,7 +1520,7 @@ static void il3945_irq_tasklet(struct il_priv *il) | |||
1527 | 1520 | ||
1528 | if (inta & ~il->inta_mask) { | 1521 | if (inta & ~il->inta_mask) { |
1529 | IL_WARN("Disabled INTA bits 0x%08x were pending\n", | 1522 | IL_WARN("Disabled INTA bits 0x%08x were pending\n", |
1530 | inta & ~il->inta_mask); | 1523 | inta & ~il->inta_mask); |
1531 | IL_WARN(" with inta_fh = 0x%08x\n", inta_fh); | 1524 | IL_WARN(" with inta_fh = 0x%08x\n", inta_fh); |
1532 | } | 1525 | } |
1533 | 1526 | ||
@@ -1542,16 +1535,16 @@ static void il3945_irq_tasklet(struct il_priv *il) | |||
1542 | inta_mask = _il_rd(il, CSR_INT_MASK); | 1535 | inta_mask = _il_rd(il, CSR_INT_MASK); |
1543 | inta_fh = _il_rd(il, CSR_FH_INT_STATUS); | 1536 | inta_fh = _il_rd(il, CSR_FH_INT_STATUS); |
1544 | D_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, " | 1537 | D_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, " |
1545 | "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags); | 1538 | "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags); |
1546 | } | 1539 | } |
1547 | #endif | 1540 | #endif |
1548 | } | 1541 | } |
1549 | 1542 | ||
1550 | static int il3945_get_channels_for_scan(struct il_priv *il, | 1543 | static int |
1551 | enum ieee80211_band band, | 1544 | il3945_get_channels_for_scan(struct il_priv *il, enum ieee80211_band band, |
1552 | u8 is_active, u8 n_probes, | 1545 | u8 is_active, u8 n_probes, |
1553 | struct il3945_scan_channel *scan_ch, | 1546 | struct il3945_scan_channel *scan_ch, |
1554 | struct ieee80211_vif *vif) | 1547 | struct ieee80211_vif *vif) |
1555 | { | 1548 | { |
1556 | struct ieee80211_channel *chan; | 1549 | struct ieee80211_channel *chan; |
1557 | const struct ieee80211_supported_band *sband; | 1550 | const struct ieee80211_supported_band *sband; |
@@ -1578,11 +1571,9 @@ static int il3945_get_channels_for_scan(struct il_priv *il, | |||
1578 | 1571 | ||
1579 | scan_ch->channel = chan->hw_value; | 1572 | scan_ch->channel = chan->hw_value; |
1580 | 1573 | ||
1581 | ch_info = il_get_channel_info(il, band, | 1574 | ch_info = il_get_channel_info(il, band, scan_ch->channel); |
1582 | scan_ch->channel); | ||
1583 | if (!il_is_channel_valid(ch_info)) { | 1575 | if (!il_is_channel_valid(ch_info)) { |
1584 | D_SCAN( | 1576 | D_SCAN("Channel %d is INVALID for this band.\n", |
1585 | "Channel %d is INVALID for this band.\n", | ||
1586 | scan_ch->channel); | 1577 | scan_ch->channel); |
1587 | continue; | 1578 | continue; |
1588 | } | 1579 | } |
@@ -1596,7 +1587,8 @@ static int il3945_get_channels_for_scan(struct il_priv *il, | |||
1596 | (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN)) { | 1587 | (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN)) { |
1597 | scan_ch->type = 0; /* passive */ | 1588 | scan_ch->type = 0; /* passive */ |
1598 | if (IL_UCODE_API(il->ucode_ver) == 1) | 1589 | if (IL_UCODE_API(il->ucode_ver) == 1) |
1599 | scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1); | 1590 | scan_ch->active_dwell = |
1591 | cpu_to_le16(passive_dwell - 1); | ||
1600 | } else { | 1592 | } else { |
1601 | scan_ch->type = 1; /* active */ | 1593 | scan_ch->type = 1; /* active */ |
1602 | } | 1594 | } |
@@ -1630,11 +1622,9 @@ static int il3945_get_channels_for_scan(struct il_priv *il, | |||
1630 | */ | 1622 | */ |
1631 | } | 1623 | } |
1632 | 1624 | ||
1633 | D_SCAN("Scanning %d [%s %d]\n", | 1625 | D_SCAN("Scanning %d [%s %d]\n", scan_ch->channel, |
1634 | scan_ch->channel, | 1626 | (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE", |
1635 | (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE", | 1627 | (scan_ch->type & 1) ? active_dwell : passive_dwell); |
1636 | (scan_ch->type & 1) ? | ||
1637 | active_dwell : passive_dwell); | ||
1638 | 1628 | ||
1639 | scan_ch++; | 1629 | scan_ch++; |
1640 | added++; | 1630 | added++; |
@@ -1644,22 +1634,23 @@ static int il3945_get_channels_for_scan(struct il_priv *il, | |||
1644 | return added; | 1634 | return added; |
1645 | } | 1635 | } |
1646 | 1636 | ||
1647 | static void il3945_init_hw_rates(struct il_priv *il, | 1637 | static void |
1648 | struct ieee80211_rate *rates) | 1638 | il3945_init_hw_rates(struct il_priv *il, struct ieee80211_rate *rates) |
1649 | { | 1639 | { |
1650 | int i; | 1640 | int i; |
1651 | 1641 | ||
1652 | for (i = 0; i < RATE_COUNT_LEGACY; i++) { | 1642 | for (i = 0; i < RATE_COUNT_LEGACY; i++) { |
1653 | rates[i].bitrate = il3945_rates[i].ieee * 5; | 1643 | rates[i].bitrate = il3945_rates[i].ieee * 5; |
1654 | rates[i].hw_value = i; /* Rate scaling will work on idxes */ | 1644 | rates[i].hw_value = i; /* Rate scaling will work on idxes */ |
1655 | rates[i].hw_value_short = i; | 1645 | rates[i].hw_value_short = i; |
1656 | rates[i].flags = 0; | 1646 | rates[i].flags = 0; |
1657 | if (i > IL39_LAST_OFDM_RATE || i < IL_FIRST_OFDM_RATE) { | 1647 | if (i > IL39_LAST_OFDM_RATE || i < IL_FIRST_OFDM_RATE) { |
1658 | /* | 1648 | /* |
1659 | * If CCK != 1M then set short preamble rate flag. | 1649 | * If CCK != 1M then set short preamble rate flag. |
1660 | */ | 1650 | */ |
1661 | rates[i].flags |= (il3945_rates[i].plcp == 10) ? | 1651 | rates[i].flags |= |
1662 | 0 : IEEE80211_RATE_SHORT_PREAMBLE; | 1652 | (il3945_rates[i].plcp == |
1653 | 10) ? 0 : IEEE80211_RATE_SHORT_PREAMBLE; | ||
1663 | } | 1654 | } |
1664 | } | 1655 | } |
1665 | } | 1656 | } |
@@ -1670,7 +1661,8 @@ static void il3945_init_hw_rates(struct il_priv *il, | |||
1670 | * | 1661 | * |
1671 | ******************************************************************************/ | 1662 | ******************************************************************************/ |
1672 | 1663 | ||
1673 | static void il3945_dealloc_ucode_pci(struct il_priv *il) | 1664 | static void |
1665 | il3945_dealloc_ucode_pci(struct il_priv *il) | ||
1674 | { | 1666 | { |
1675 | il_free_fw_desc(il->pci_dev, &il->ucode_code); | 1667 | il_free_fw_desc(il->pci_dev, &il->ucode_code); |
1676 | il_free_fw_desc(il->pci_dev, &il->ucode_data); | 1668 | il_free_fw_desc(il->pci_dev, &il->ucode_data); |
@@ -1684,7 +1676,8 @@ static void il3945_dealloc_ucode_pci(struct il_priv *il) | |||
1684 | * il3945_verify_inst_full - verify runtime uCode image in card vs. host, | 1676 | * il3945_verify_inst_full - verify runtime uCode image in card vs. host, |
1685 | * looking at all data. | 1677 | * looking at all data. |
1686 | */ | 1678 | */ |
1687 | static int il3945_verify_inst_full(struct il_priv *il, __le32 *image, u32 len) | 1679 | static int |
1680 | il3945_verify_inst_full(struct il_priv *il, __le32 * image, u32 len) | ||
1688 | { | 1681 | { |
1689 | u32 val; | 1682 | u32 val; |
1690 | u32 save_len = len; | 1683 | u32 save_len = len; |
@@ -1693,8 +1686,7 @@ static int il3945_verify_inst_full(struct il_priv *il, __le32 *image, u32 len) | |||
1693 | 1686 | ||
1694 | D_INFO("ucode inst image size is %u\n", len); | 1687 | D_INFO("ucode inst image size is %u\n", len); |
1695 | 1688 | ||
1696 | il_wr(il, HBUS_TARG_MEM_RADDR, | 1689 | il_wr(il, HBUS_TARG_MEM_RADDR, IL39_RTC_INST_LOWER_BOUND); |
1697 | IL39_RTC_INST_LOWER_BOUND); | ||
1698 | 1690 | ||
1699 | errcnt = 0; | 1691 | errcnt = 0; |
1700 | for (; len > 0; len -= sizeof(u32), image++) { | 1692 | for (; len > 0; len -= sizeof(u32), image++) { |
@@ -1704,8 +1696,8 @@ static int il3945_verify_inst_full(struct il_priv *il, __le32 *image, u32 len) | |||
1704 | val = _il_rd(il, HBUS_TARG_MEM_RDAT); | 1696 | val = _il_rd(il, HBUS_TARG_MEM_RDAT); |
1705 | if (val != le32_to_cpu(*image)) { | 1697 | if (val != le32_to_cpu(*image)) { |
1706 | IL_ERR("uCode INST section is invalid at " | 1698 | IL_ERR("uCode INST section is invalid at " |
1707 | "offset 0x%x, is 0x%x, s/b 0x%x\n", | 1699 | "offset 0x%x, is 0x%x, s/b 0x%x\n", |
1708 | save_len - len, val, le32_to_cpu(*image)); | 1700 | save_len - len, val, le32_to_cpu(*image)); |
1709 | rc = -EIO; | 1701 | rc = -EIO; |
1710 | errcnt++; | 1702 | errcnt++; |
1711 | if (errcnt >= 20) | 1703 | if (errcnt >= 20) |
@@ -1713,21 +1705,19 @@ static int il3945_verify_inst_full(struct il_priv *il, __le32 *image, u32 len) | |||
1713 | } | 1705 | } |
1714 | } | 1706 | } |
1715 | 1707 | ||
1716 | |||
1717 | if (!errcnt) | 1708 | if (!errcnt) |
1718 | D_INFO( | 1709 | D_INFO("ucode image in INSTRUCTION memory is good\n"); |
1719 | "ucode image in INSTRUCTION memory is good\n"); | ||
1720 | 1710 | ||
1721 | return rc; | 1711 | return rc; |
1722 | } | 1712 | } |
1723 | 1713 | ||
1724 | |||
1725 | /** | 1714 | /** |
1726 | * il3945_verify_inst_sparse - verify runtime uCode image in card vs. host, | 1715 | * il3945_verify_inst_sparse - verify runtime uCode image in card vs. host, |
1727 | * using sample data 100 bytes apart. If these sample points are good, | 1716 | * using sample data 100 bytes apart. If these sample points are good, |
1728 | * it's a pretty good bet that everything between them is good, too. | 1717 | * it's a pretty good bet that everything between them is good, too. |
1729 | */ | 1718 | */ |
1730 | static int il3945_verify_inst_sparse(struct il_priv *il, __le32 *image, u32 len) | 1719 | static int |
1720 | il3945_verify_inst_sparse(struct il_priv *il, __le32 * image, u32 len) | ||
1731 | { | 1721 | { |
1732 | u32 val; | 1722 | u32 val; |
1733 | int rc = 0; | 1723 | int rc = 0; |
@@ -1736,18 +1726,17 @@ static int il3945_verify_inst_sparse(struct il_priv *il, __le32 *image, u32 len) | |||
1736 | 1726 | ||
1737 | D_INFO("ucode inst image size is %u\n", len); | 1727 | D_INFO("ucode inst image size is %u\n", len); |
1738 | 1728 | ||
1739 | for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) { | 1729 | for (i = 0; i < len; i += 100, image += 100 / sizeof(u32)) { |
1740 | /* read data comes through single port, auto-incr addr */ | 1730 | /* read data comes through single port, auto-incr addr */ |
1741 | /* NOTE: Use the debugless read so we don't flood kernel log | 1731 | /* NOTE: Use the debugless read so we don't flood kernel log |
1742 | * if IL_DL_IO is set */ | 1732 | * if IL_DL_IO is set */ |
1743 | il_wr(il, HBUS_TARG_MEM_RADDR, | 1733 | il_wr(il, HBUS_TARG_MEM_RADDR, i + IL39_RTC_INST_LOWER_BOUND); |
1744 | i + IL39_RTC_INST_LOWER_BOUND); | ||
1745 | val = _il_rd(il, HBUS_TARG_MEM_RDAT); | 1734 | val = _il_rd(il, HBUS_TARG_MEM_RDAT); |
1746 | if (val != le32_to_cpu(*image)) { | 1735 | if (val != le32_to_cpu(*image)) { |
1747 | #if 0 /* Enable this if you want to see details */ | 1736 | #if 0 /* Enable this if you want to see details */ |
1748 | IL_ERR("uCode INST section is invalid at " | 1737 | IL_ERR("uCode INST section is invalid at " |
1749 | "offset 0x%x, is 0x%x, s/b 0x%x\n", | 1738 | "offset 0x%x, is 0x%x, s/b 0x%x\n", i, val, |
1750 | i, val, *image); | 1739 | *image); |
1751 | #endif | 1740 | #endif |
1752 | rc = -EIO; | 1741 | rc = -EIO; |
1753 | errcnt++; | 1742 | errcnt++; |
@@ -1759,19 +1748,19 @@ static int il3945_verify_inst_sparse(struct il_priv *il, __le32 *image, u32 len) | |||
1759 | return rc; | 1748 | return rc; |
1760 | } | 1749 | } |
1761 | 1750 | ||
1762 | |||
1763 | /** | 1751 | /** |
1764 | * il3945_verify_ucode - determine which instruction image is in SRAM, | 1752 | * il3945_verify_ucode - determine which instruction image is in SRAM, |
1765 | * and verify its contents | 1753 | * and verify its contents |
1766 | */ | 1754 | */ |
1767 | static int il3945_verify_ucode(struct il_priv *il) | 1755 | static int |
1756 | il3945_verify_ucode(struct il_priv *il) | ||
1768 | { | 1757 | { |
1769 | __le32 *image; | 1758 | __le32 *image; |
1770 | u32 len; | 1759 | u32 len; |
1771 | int rc = 0; | 1760 | int rc = 0; |
1772 | 1761 | ||
1773 | /* Try bootstrap */ | 1762 | /* Try bootstrap */ |
1774 | image = (__le32 *)il->ucode_boot.v_addr; | 1763 | image = (__le32 *) il->ucode_boot.v_addr; |
1775 | len = il->ucode_boot.len; | 1764 | len = il->ucode_boot.len; |
1776 | rc = il3945_verify_inst_sparse(il, image, len); | 1765 | rc = il3945_verify_inst_sparse(il, image, len); |
1777 | if (rc == 0) { | 1766 | if (rc == 0) { |
@@ -1780,7 +1769,7 @@ static int il3945_verify_ucode(struct il_priv *il) | |||
1780 | } | 1769 | } |
1781 | 1770 | ||
1782 | /* Try initialize */ | 1771 | /* Try initialize */ |
1783 | image = (__le32 *)il->ucode_init.v_addr; | 1772 | image = (__le32 *) il->ucode_init.v_addr; |
1784 | len = il->ucode_init.len; | 1773 | len = il->ucode_init.len; |
1785 | rc = il3945_verify_inst_sparse(il, image, len); | 1774 | rc = il3945_verify_inst_sparse(il, image, len); |
1786 | if (rc == 0) { | 1775 | if (rc == 0) { |
@@ -1789,7 +1778,7 @@ static int il3945_verify_ucode(struct il_priv *il) | |||
1789 | } | 1778 | } |
1790 | 1779 | ||
1791 | /* Try runtime/protocol */ | 1780 | /* Try runtime/protocol */ |
1792 | image = (__le32 *)il->ucode_code.v_addr; | 1781 | image = (__le32 *) il->ucode_code.v_addr; |
1793 | len = il->ucode_code.len; | 1782 | len = il->ucode_code.len; |
1794 | rc = il3945_verify_inst_sparse(il, image, len); | 1783 | rc = il3945_verify_inst_sparse(il, image, len); |
1795 | if (rc == 0) { | 1784 | if (rc == 0) { |
@@ -1802,14 +1791,15 @@ static int il3945_verify_ucode(struct il_priv *il) | |||
1802 | /* Since nothing seems to match, show first several data entries in | 1791 | /* Since nothing seems to match, show first several data entries in |
1803 | * instruction SRAM, so maybe visual inspection will give a clue. | 1792 | * instruction SRAM, so maybe visual inspection will give a clue. |
1804 | * Selection of bootstrap image (vs. other images) is arbitrary. */ | 1793 | * Selection of bootstrap image (vs. other images) is arbitrary. */ |
1805 | image = (__le32 *)il->ucode_boot.v_addr; | 1794 | image = (__le32 *) il->ucode_boot.v_addr; |
1806 | len = il->ucode_boot.len; | 1795 | len = il->ucode_boot.len; |
1807 | rc = il3945_verify_inst_full(il, image, len); | 1796 | rc = il3945_verify_inst_full(il, image, len); |
1808 | 1797 | ||
1809 | return rc; | 1798 | return rc; |
1810 | } | 1799 | } |
1811 | 1800 | ||
1812 | static void il3945_nic_start(struct il_priv *il) | 1801 | static void |
1802 | il3945_nic_start(struct il_priv *il) | ||
1813 | { | 1803 | { |
1814 | /* Remove all resets to allow NIC to operate */ | 1804 | /* Remove all resets to allow NIC to operate */ |
1815 | _il_wr(il, CSR_RESET, 0); | 1805 | _il_wr(il, CSR_RESET, 0); |
@@ -1821,12 +1811,14 @@ static u32 il3945_ucode_get_##item(const struct il_ucode_header *ucode)\ | |||
1821 | return le32_to_cpu(ucode->v1.item); \ | 1811 | return le32_to_cpu(ucode->v1.item); \ |
1822 | } | 1812 | } |
1823 | 1813 | ||
1824 | static u32 il3945_ucode_get_header_size(u32 api_ver) | 1814 | static u32 |
1815 | il3945_ucode_get_header_size(u32 api_ver) | ||
1825 | { | 1816 | { |
1826 | return 24; | 1817 | return 24; |
1827 | } | 1818 | } |
1828 | 1819 | ||
1829 | static u8 *il3945_ucode_get_data(const struct il_ucode_header *ucode) | 1820 | static u8 * |
1821 | il3945_ucode_get_data(const struct il_ucode_header *ucode) | ||
1830 | { | 1822 | { |
1831 | return (u8 *) ucode->v1.data; | 1823 | return (u8 *) ucode->v1.data; |
1832 | } | 1824 | } |
@@ -1842,7 +1834,8 @@ IL3945_UCODE_GET(boot_size); | |||
1842 | * | 1834 | * |
1843 | * Copy into buffers for card to fetch via bus-mastering | 1835 | * Copy into buffers for card to fetch via bus-mastering |
1844 | */ | 1836 | */ |
1845 | static int il3945_read_ucode(struct il_priv *il) | 1837 | static int |
1838 | il3945_read_ucode(struct il_priv *il) | ||
1846 | { | 1839 | { |
1847 | const struct il_ucode_header *ucode; | 1840 | const struct il_ucode_header *ucode; |
1848 | int ret = -EINVAL, idx; | 1841 | int ret = -EINVAL, idx; |
@@ -1862,8 +1855,7 @@ static int il3945_read_ucode(struct il_priv *il) | |||
1862 | sprintf(buf, "%s%u%s", name_pre, idx, ".ucode"); | 1855 | sprintf(buf, "%s%u%s", name_pre, idx, ".ucode"); |
1863 | ret = request_firmware(&ucode_raw, buf, &il->pci_dev->dev); | 1856 | ret = request_firmware(&ucode_raw, buf, &il->pci_dev->dev); |
1864 | if (ret < 0) { | 1857 | if (ret < 0) { |
1865 | IL_ERR("%s firmware file req failed: %d\n", | 1858 | IL_ERR("%s firmware file req failed: %d\n", buf, ret); |
1866 | buf, ret); | ||
1867 | if (ret == -ENOENT) | 1859 | if (ret == -ENOENT) |
1868 | continue; | 1860 | continue; |
1869 | else | 1861 | else |
@@ -1871,12 +1863,11 @@ static int il3945_read_ucode(struct il_priv *il) | |||
1871 | } else { | 1863 | } else { |
1872 | if (idx < api_max) | 1864 | if (idx < api_max) |
1873 | IL_ERR("Loaded firmware %s, " | 1865 | IL_ERR("Loaded firmware %s, " |
1874 | "which is deprecated. " | 1866 | "which is deprecated. " |
1875 | " Please use API v%u instead.\n", | 1867 | " Please use API v%u instead.\n", buf, |
1876 | buf, api_max); | 1868 | api_max); |
1877 | D_INFO("Got firmware '%s' file " | 1869 | D_INFO("Got firmware '%s' file " |
1878 | "(%zd bytes) from disk\n", | 1870 | "(%zd bytes) from disk\n", buf, ucode_raw->size); |
1879 | buf, ucode_raw->size); | ||
1880 | break; | 1871 | break; |
1881 | } | 1872 | } |
1882 | } | 1873 | } |
@@ -1885,7 +1876,7 @@ static int il3945_read_ucode(struct il_priv *il) | |||
1885 | goto error; | 1876 | goto error; |
1886 | 1877 | ||
1887 | /* Make sure that we got at least our header! */ | 1878 | /* Make sure that we got at least our header! */ |
1888 | if (ucode_raw->size < il3945_ucode_get_header_size(1)) { | 1879 | if (ucode_raw->size < il3945_ucode_get_header_size(1)) { |
1889 | IL_ERR("File size way too small!\n"); | 1880 | IL_ERR("File size way too small!\n"); |
1890 | ret = -EINVAL; | 1881 | ret = -EINVAL; |
1891 | goto err_release; | 1882 | goto err_release; |
@@ -1909,90 +1900,72 @@ static int il3945_read_ucode(struct il_priv *il) | |||
1909 | 1900 | ||
1910 | if (api_ver < api_min || api_ver > api_max) { | 1901 | if (api_ver < api_min || api_ver > api_max) { |
1911 | IL_ERR("Driver unable to support your firmware API. " | 1902 | IL_ERR("Driver unable to support your firmware API. " |
1912 | "Driver supports v%u, firmware is v%u.\n", | 1903 | "Driver supports v%u, firmware is v%u.\n", api_max, |
1913 | api_max, api_ver); | 1904 | api_ver); |
1914 | il->ucode_ver = 0; | 1905 | il->ucode_ver = 0; |
1915 | ret = -EINVAL; | 1906 | ret = -EINVAL; |
1916 | goto err_release; | 1907 | goto err_release; |
1917 | } | 1908 | } |
1918 | if (api_ver != api_max) | 1909 | if (api_ver != api_max) |
1919 | IL_ERR("Firmware has old API version. Expected %u, " | 1910 | IL_ERR("Firmware has old API version. Expected %u, " |
1920 | "got %u. New firmware can be obtained " | 1911 | "got %u. New firmware can be obtained " |
1921 | "from http://www.intellinuxwireless.org.\n", | 1912 | "from http://www.intellinuxwireless.org.\n", api_max, |
1922 | api_max, api_ver); | 1913 | api_ver); |
1923 | 1914 | ||
1924 | IL_INFO("loaded firmware version %u.%u.%u.%u\n", | 1915 | IL_INFO("loaded firmware version %u.%u.%u.%u\n", |
1925 | IL_UCODE_MAJOR(il->ucode_ver), | 1916 | IL_UCODE_MAJOR(il->ucode_ver), IL_UCODE_MINOR(il->ucode_ver), |
1926 | IL_UCODE_MINOR(il->ucode_ver), | 1917 | IL_UCODE_API(il->ucode_ver), IL_UCODE_SERIAL(il->ucode_ver)); |
1927 | IL_UCODE_API(il->ucode_ver), | ||
1928 | IL_UCODE_SERIAL(il->ucode_ver)); | ||
1929 | |||
1930 | snprintf(il->hw->wiphy->fw_version, | ||
1931 | sizeof(il->hw->wiphy->fw_version), | ||
1932 | "%u.%u.%u.%u", | ||
1933 | IL_UCODE_MAJOR(il->ucode_ver), | ||
1934 | IL_UCODE_MINOR(il->ucode_ver), | ||
1935 | IL_UCODE_API(il->ucode_ver), | ||
1936 | IL_UCODE_SERIAL(il->ucode_ver)); | ||
1937 | 1918 | ||
1938 | D_INFO("f/w package hdr ucode version raw = 0x%x\n", | 1919 | snprintf(il->hw->wiphy->fw_version, sizeof(il->hw->wiphy->fw_version), |
1939 | il->ucode_ver); | 1920 | "%u.%u.%u.%u", IL_UCODE_MAJOR(il->ucode_ver), |
1940 | D_INFO("f/w package hdr runtime inst size = %u\n", | 1921 | IL_UCODE_MINOR(il->ucode_ver), IL_UCODE_API(il->ucode_ver), |
1941 | inst_size); | 1922 | IL_UCODE_SERIAL(il->ucode_ver)); |
1942 | D_INFO("f/w package hdr runtime data size = %u\n", | ||
1943 | data_size); | ||
1944 | D_INFO("f/w package hdr init inst size = %u\n", | ||
1945 | init_size); | ||
1946 | D_INFO("f/w package hdr init data size = %u\n", | ||
1947 | init_data_size); | ||
1948 | D_INFO("f/w package hdr boot inst size = %u\n", | ||
1949 | boot_size); | ||
1950 | 1923 | ||
1924 | D_INFO("f/w package hdr ucode version raw = 0x%x\n", il->ucode_ver); | ||
1925 | D_INFO("f/w package hdr runtime inst size = %u\n", inst_size); | ||
1926 | D_INFO("f/w package hdr runtime data size = %u\n", data_size); | ||
1927 | D_INFO("f/w package hdr init inst size = %u\n", init_size); | ||
1928 | D_INFO("f/w package hdr init data size = %u\n", init_data_size); | ||
1929 | D_INFO("f/w package hdr boot inst size = %u\n", boot_size); | ||
1951 | 1930 | ||
1952 | /* Verify size of file vs. image size info in file's header */ | 1931 | /* Verify size of file vs. image size info in file's header */ |
1953 | if (ucode_raw->size != il3945_ucode_get_header_size(api_ver) + | 1932 | if (ucode_raw->size != |
1954 | inst_size + data_size + init_size + | 1933 | il3945_ucode_get_header_size(api_ver) + inst_size + data_size + |
1955 | init_data_size + boot_size) { | 1934 | init_size + init_data_size + boot_size) { |
1956 | 1935 | ||
1957 | D_INFO( | 1936 | D_INFO("uCode file size %zd does not match expected size\n", |
1958 | "uCode file size %zd does not match expected size\n", | 1937 | ucode_raw->size); |
1959 | ucode_raw->size); | ||
1960 | ret = -EINVAL; | 1938 | ret = -EINVAL; |
1961 | goto err_release; | 1939 | goto err_release; |
1962 | } | 1940 | } |
1963 | 1941 | ||
1964 | /* Verify that uCode images will fit in card's SRAM */ | 1942 | /* Verify that uCode images will fit in card's SRAM */ |
1965 | if (inst_size > IL39_MAX_INST_SIZE) { | 1943 | if (inst_size > IL39_MAX_INST_SIZE) { |
1966 | D_INFO("uCode instr len %d too large to fit in\n", | 1944 | D_INFO("uCode instr len %d too large to fit in\n", inst_size); |
1967 | inst_size); | ||
1968 | ret = -EINVAL; | 1945 | ret = -EINVAL; |
1969 | goto err_release; | 1946 | goto err_release; |
1970 | } | 1947 | } |
1971 | 1948 | ||
1972 | if (data_size > IL39_MAX_DATA_SIZE) { | 1949 | if (data_size > IL39_MAX_DATA_SIZE) { |
1973 | D_INFO("uCode data len %d too large to fit in\n", | 1950 | D_INFO("uCode data len %d too large to fit in\n", data_size); |
1974 | data_size); | ||
1975 | ret = -EINVAL; | 1951 | ret = -EINVAL; |
1976 | goto err_release; | 1952 | goto err_release; |
1977 | } | 1953 | } |
1978 | if (init_size > IL39_MAX_INST_SIZE) { | 1954 | if (init_size > IL39_MAX_INST_SIZE) { |
1979 | D_INFO( | 1955 | D_INFO("uCode init instr len %d too large to fit in\n", |
1980 | "uCode init instr len %d too large to fit in\n", | 1956 | init_size); |
1981 | init_size); | ||
1982 | ret = -EINVAL; | 1957 | ret = -EINVAL; |
1983 | goto err_release; | 1958 | goto err_release; |
1984 | } | 1959 | } |
1985 | if (init_data_size > IL39_MAX_DATA_SIZE) { | 1960 | if (init_data_size > IL39_MAX_DATA_SIZE) { |
1986 | D_INFO( | 1961 | D_INFO("uCode init data len %d too large to fit in\n", |
1987 | "uCode init data len %d too large to fit in\n", | 1962 | init_data_size); |
1988 | init_data_size); | ||
1989 | ret = -EINVAL; | 1963 | ret = -EINVAL; |
1990 | goto err_release; | 1964 | goto err_release; |
1991 | } | 1965 | } |
1992 | if (boot_size > IL39_MAX_BSM_SIZE) { | 1966 | if (boot_size > IL39_MAX_BSM_SIZE) { |
1993 | D_INFO( | 1967 | D_INFO("uCode boot instr len %d too large to fit in\n", |
1994 | "uCode boot instr len %d too large to fit in\n", | 1968 | boot_size); |
1995 | boot_size); | ||
1996 | ret = -EINVAL; | 1969 | ret = -EINVAL; |
1997 | goto err_release; | 1970 | goto err_release; |
1998 | } | 1971 | } |
@@ -2040,19 +2013,17 @@ static int il3945_read_ucode(struct il_priv *il) | |||
2040 | 2013 | ||
2041 | /* Runtime instructions (first block of data in file) */ | 2014 | /* Runtime instructions (first block of data in file) */ |
2042 | len = inst_size; | 2015 | len = inst_size; |
2043 | D_INFO( | 2016 | D_INFO("Copying (but not loading) uCode instr len %zd\n", len); |
2044 | "Copying (but not loading) uCode instr len %zd\n", len); | ||
2045 | memcpy(il->ucode_code.v_addr, src, len); | 2017 | memcpy(il->ucode_code.v_addr, src, len); |
2046 | src += len; | 2018 | src += len; |
2047 | 2019 | ||
2048 | D_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n", | 2020 | D_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n", |
2049 | il->ucode_code.v_addr, (u32)il->ucode_code.p_addr); | 2021 | il->ucode_code.v_addr, (u32) il->ucode_code.p_addr); |
2050 | 2022 | ||
2051 | /* Runtime data (2nd block) | 2023 | /* Runtime data (2nd block) |
2052 | * NOTE: Copy into backup buffer will be done in il3945_up() */ | 2024 | * NOTE: Copy into backup buffer will be done in il3945_up() */ |
2053 | len = data_size; | 2025 | len = data_size; |
2054 | D_INFO( | 2026 | D_INFO("Copying (but not loading) uCode data len %zd\n", len); |
2055 | "Copying (but not loading) uCode data len %zd\n", len); | ||
2056 | memcpy(il->ucode_data.v_addr, src, len); | 2027 | memcpy(il->ucode_data.v_addr, src, len); |
2057 | memcpy(il->ucode_data_backup.v_addr, src, len); | 2028 | memcpy(il->ucode_data_backup.v_addr, src, len); |
2058 | src += len; | 2029 | src += len; |
@@ -2060,8 +2031,7 @@ static int il3945_read_ucode(struct il_priv *il) | |||
2060 | /* Initialization instructions (3rd block) */ | 2031 | /* Initialization instructions (3rd block) */ |
2061 | if (init_size) { | 2032 | if (init_size) { |
2062 | len = init_size; | 2033 | len = init_size; |
2063 | D_INFO( | 2034 | D_INFO("Copying (but not loading) init instr len %zd\n", len); |
2064 | "Copying (but not loading) init instr len %zd\n", len); | ||
2065 | memcpy(il->ucode_init.v_addr, src, len); | 2035 | memcpy(il->ucode_init.v_addr, src, len); |
2066 | src += len; | 2036 | src += len; |
2067 | } | 2037 | } |
@@ -2069,35 +2039,32 @@ static int il3945_read_ucode(struct il_priv *il) | |||
2069 | /* Initialization data (4th block) */ | 2039 | /* Initialization data (4th block) */ |
2070 | if (init_data_size) { | 2040 | if (init_data_size) { |
2071 | len = init_data_size; | 2041 | len = init_data_size; |
2072 | D_INFO( | 2042 | D_INFO("Copying (but not loading) init data len %zd\n", len); |
2073 | "Copying (but not loading) init data len %zd\n", len); | ||
2074 | memcpy(il->ucode_init_data.v_addr, src, len); | 2043 | memcpy(il->ucode_init_data.v_addr, src, len); |
2075 | src += len; | 2044 | src += len; |
2076 | } | 2045 | } |
2077 | 2046 | ||
2078 | /* Bootstrap instructions (5th block) */ | 2047 | /* Bootstrap instructions (5th block) */ |
2079 | len = boot_size; | 2048 | len = boot_size; |
2080 | D_INFO( | 2049 | D_INFO("Copying (but not loading) boot instr len %zd\n", len); |
2081 | "Copying (but not loading) boot instr len %zd\n", len); | ||
2082 | memcpy(il->ucode_boot.v_addr, src, len); | 2050 | memcpy(il->ucode_boot.v_addr, src, len); |
2083 | 2051 | ||
2084 | /* We have our copies now, allow OS release its copies */ | 2052 | /* We have our copies now, allow OS release its copies */ |
2085 | release_firmware(ucode_raw); | 2053 | release_firmware(ucode_raw); |
2086 | return 0; | 2054 | return 0; |
2087 | 2055 | ||
2088 | err_pci_alloc: | 2056 | err_pci_alloc: |
2089 | IL_ERR("failed to allocate pci memory\n"); | 2057 | IL_ERR("failed to allocate pci memory\n"); |
2090 | ret = -ENOMEM; | 2058 | ret = -ENOMEM; |
2091 | il3945_dealloc_ucode_pci(il); | 2059 | il3945_dealloc_ucode_pci(il); |
2092 | 2060 | ||
2093 | err_release: | 2061 | err_release: |
2094 | release_firmware(ucode_raw); | 2062 | release_firmware(ucode_raw); |
2095 | 2063 | ||
2096 | error: | 2064 | error: |
2097 | return ret; | 2065 | return ret; |
2098 | } | 2066 | } |
2099 | 2067 | ||
2100 | |||
2101 | /** | 2068 | /** |
2102 | * il3945_set_ucode_ptrs - Set uCode address location | 2069 | * il3945_set_ucode_ptrs - Set uCode address location |
2103 | * | 2070 | * |
@@ -2107,7 +2074,8 @@ static int il3945_read_ucode(struct il_priv *il) | |||
2107 | * We need to replace them to load runtime uCode inst and data, | 2074 | * We need to replace them to load runtime uCode inst and data, |
2108 | * and to save runtime data when powering down. | 2075 | * and to save runtime data when powering down. |
2109 | */ | 2076 | */ |
2110 | static int il3945_set_ucode_ptrs(struct il_priv *il) | 2077 | static int |
2078 | il3945_set_ucode_ptrs(struct il_priv *il) | ||
2111 | { | 2079 | { |
2112 | dma_addr_t pinst; | 2080 | dma_addr_t pinst; |
2113 | dma_addr_t pdata; | 2081 | dma_addr_t pdata; |
@@ -2119,13 +2087,12 @@ static int il3945_set_ucode_ptrs(struct il_priv *il) | |||
2119 | /* Tell bootstrap uCode where to find image to load */ | 2087 | /* Tell bootstrap uCode where to find image to load */ |
2120 | il_wr_prph(il, BSM_DRAM_INST_PTR_REG, pinst); | 2088 | il_wr_prph(il, BSM_DRAM_INST_PTR_REG, pinst); |
2121 | il_wr_prph(il, BSM_DRAM_DATA_PTR_REG, pdata); | 2089 | il_wr_prph(il, BSM_DRAM_DATA_PTR_REG, pdata); |
2122 | il_wr_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG, | 2090 | il_wr_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG, il->ucode_data.len); |
2123 | il->ucode_data.len); | ||
2124 | 2091 | ||
2125 | /* Inst byte count must be last to set up, bit 31 signals uCode | 2092 | /* Inst byte count must be last to set up, bit 31 signals uCode |
2126 | * that all new ptr/size info is in place */ | 2093 | * that all new ptr/size info is in place */ |
2127 | il_wr_prph(il, BSM_DRAM_INST_BYTECOUNT_REG, | 2094 | il_wr_prph(il, BSM_DRAM_INST_BYTECOUNT_REG, |
2128 | il->ucode_code.len | BSM_DRAM_INST_LOAD); | 2095 | il->ucode_code.len | BSM_DRAM_INST_LOAD); |
2129 | 2096 | ||
2130 | D_INFO("Runtime uCode pointers are set.\n"); | 2097 | D_INFO("Runtime uCode pointers are set.\n"); |
2131 | 2098 | ||
@@ -2139,7 +2106,8 @@ static int il3945_set_ucode_ptrs(struct il_priv *il) | |||
2139 | * | 2106 | * |
2140 | * Tell "initialize" uCode to go ahead and load the runtime uCode. | 2107 | * Tell "initialize" uCode to go ahead and load the runtime uCode. |
2141 | */ | 2108 | */ |
2142 | static void il3945_init_alive_start(struct il_priv *il) | 2109 | static void |
2110 | il3945_init_alive_start(struct il_priv *il) | ||
2143 | { | 2111 | { |
2144 | /* Check alive response for "valid" sign from uCode */ | 2112 | /* Check alive response for "valid" sign from uCode */ |
2145 | if (il->card_alive_init.is_valid != UCODE_VALID_OK) { | 2113 | if (il->card_alive_init.is_valid != UCODE_VALID_OK) { |
@@ -2171,7 +2139,7 @@ static void il3945_init_alive_start(struct il_priv *il) | |||
2171 | } | 2139 | } |
2172 | return; | 2140 | return; |
2173 | 2141 | ||
2174 | restart: | 2142 | restart: |
2175 | queue_work(il->workqueue, &il->restart); | 2143 | queue_work(il->workqueue, &il->restart); |
2176 | } | 2144 | } |
2177 | 2145 | ||
@@ -2180,7 +2148,8 @@ static void il3945_init_alive_start(struct il_priv *il) | |||
2180 | * from protocol/runtime uCode (initialization uCode's | 2148 | * from protocol/runtime uCode (initialization uCode's |
2181 | * Alive gets handled by il3945_init_alive_start()). | 2149 | * Alive gets handled by il3945_init_alive_start()). |
2182 | */ | 2150 | */ |
2183 | static void il3945_alive_start(struct il_priv *il) | 2151 | static void |
2152 | il3945_alive_start(struct il_priv *il) | ||
2184 | { | 2153 | { |
2185 | int thermal_spin = 0; | 2154 | int thermal_spin = 0; |
2186 | u32 rfkill; | 2155 | u32 rfkill; |
@@ -2219,7 +2188,7 @@ static void il3945_alive_start(struct il_priv *il) | |||
2219 | 2188 | ||
2220 | if (thermal_spin) | 2189 | if (thermal_spin) |
2221 | D_INFO("Thermal calibration took %dus\n", | 2190 | D_INFO("Thermal calibration took %dus\n", |
2222 | thermal_spin * 10); | 2191 | thermal_spin * 10); |
2223 | } else | 2192 | } else |
2224 | set_bit(S_RF_KILL_HW, &il->status); | 2193 | set_bit(S_RF_KILL_HW, &il->status); |
2225 | 2194 | ||
@@ -2240,7 +2209,7 @@ static void il3945_alive_start(struct il_priv *il) | |||
2240 | 2209 | ||
2241 | if (il_is_associated(il)) { | 2210 | if (il_is_associated(il)) { |
2242 | struct il3945_rxon_cmd *active_rxon = | 2211 | struct il3945_rxon_cmd *active_rxon = |
2243 | (struct il3945_rxon_cmd *)(&ctx->active); | 2212 | (struct il3945_rxon_cmd *)(&ctx->active); |
2244 | 2213 | ||
2245 | ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK; | 2214 | ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK; |
2246 | active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK; | 2215 | active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK; |
@@ -2264,13 +2233,14 @@ static void il3945_alive_start(struct il_priv *il) | |||
2264 | 2233 | ||
2265 | return; | 2234 | return; |
2266 | 2235 | ||
2267 | restart: | 2236 | restart: |
2268 | queue_work(il->workqueue, &il->restart); | 2237 | queue_work(il->workqueue, &il->restart); |
2269 | } | 2238 | } |
2270 | 2239 | ||
2271 | static void il3945_cancel_deferred_work(struct il_priv *il); | 2240 | static void il3945_cancel_deferred_work(struct il_priv *il); |
2272 | 2241 | ||
2273 | static void __il3945_down(struct il_priv *il) | 2242 | static void |
2243 | __il3945_down(struct il_priv *il) | ||
2274 | { | 2244 | { |
2275 | unsigned long flags; | 2245 | unsigned long flags; |
2276 | int exit_pending; | 2246 | int exit_pending; |
@@ -2313,25 +2283,28 @@ static void __il3945_down(struct il_priv *il) | |||
2313 | /* If we have not previously called il3945_init() then | 2283 | /* If we have not previously called il3945_init() then |
2314 | * clear all bits but the RF Kill bits and return */ | 2284 | * clear all bits but the RF Kill bits and return */ |
2315 | if (!il_is_init(il)) { | 2285 | if (!il_is_init(il)) { |
2316 | il->status = test_bit(S_RF_KILL_HW, &il->status) << | 2286 | il->status = |
2317 | S_RF_KILL_HW | | 2287 | test_bit(S_RF_KILL_HW, |
2318 | test_bit(S_GEO_CONFIGURED, &il->status) << | 2288 | &il-> |
2319 | S_GEO_CONFIGURED | | 2289 | status) << S_RF_KILL_HW | |
2320 | test_bit(S_EXIT_PENDING, &il->status) << | 2290 | test_bit(S_GEO_CONFIGURED, |
2321 | S_EXIT_PENDING; | 2291 | &il-> |
2292 | status) << S_GEO_CONFIGURED | | ||
2293 | test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING; | ||
2322 | goto exit; | 2294 | goto exit; |
2323 | } | 2295 | } |
2324 | 2296 | ||
2325 | /* ...otherwise clear out all the status bits but the RF Kill | 2297 | /* ...otherwise clear out all the status bits but the RF Kill |
2326 | * bit and continue taking the NIC down. */ | 2298 | * bit and continue taking the NIC down. */ |
2327 | il->status &= test_bit(S_RF_KILL_HW, &il->status) << | 2299 | il->status &= |
2328 | S_RF_KILL_HW | | 2300 | test_bit(S_RF_KILL_HW, |
2329 | test_bit(S_GEO_CONFIGURED, &il->status) << | 2301 | &il->status) << S_RF_KILL_HW | test_bit(S_GEO_CONFIGURED, |
2330 | S_GEO_CONFIGURED | | 2302 | &il-> |
2331 | test_bit(S_FW_ERROR, &il->status) << | 2303 | status) << |
2332 | S_FW_ERROR | | 2304 | S_GEO_CONFIGURED | test_bit(S_FW_ERROR, |
2333 | test_bit(S_EXIT_PENDING, &il->status) << | 2305 | &il-> |
2334 | S_EXIT_PENDING; | 2306 | status) << S_FW_ERROR | |
2307 | test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING; | ||
2335 | 2308 | ||
2336 | il3945_hw_txq_ctx_stop(il); | 2309 | il3945_hw_txq_ctx_stop(il); |
2337 | il3945_hw_rxq_stop(il); | 2310 | il3945_hw_rxq_stop(il); |
@@ -2343,7 +2316,7 @@ static void __il3945_down(struct il_priv *il) | |||
2343 | /* Stop the device, and put it in low power state */ | 2316 | /* Stop the device, and put it in low power state */ |
2344 | il_apm_stop(il); | 2317 | il_apm_stop(il); |
2345 | 2318 | ||
2346 | exit: | 2319 | exit: |
2347 | memset(&il->card_alive, 0, sizeof(struct il_alive_resp)); | 2320 | memset(&il->card_alive, 0, sizeof(struct il_alive_resp)); |
2348 | 2321 | ||
2349 | if (il->beacon_skb) | 2322 | if (il->beacon_skb) |
@@ -2354,7 +2327,8 @@ static void __il3945_down(struct il_priv *il) | |||
2354 | il3945_clear_free_frames(il); | 2327 | il3945_clear_free_frames(il); |
2355 | } | 2328 | } |
2356 | 2329 | ||
2357 | static void il3945_down(struct il_priv *il) | 2330 | static void |
2331 | il3945_down(struct il_priv *il) | ||
2358 | { | 2332 | { |
2359 | mutex_lock(&il->mutex); | 2333 | mutex_lock(&il->mutex); |
2360 | __il3945_down(il); | 2334 | __il3945_down(il); |
@@ -2365,15 +2339,15 @@ static void il3945_down(struct il_priv *il) | |||
2365 | 2339 | ||
2366 | #define MAX_HW_RESTARTS 5 | 2340 | #define MAX_HW_RESTARTS 5 |
2367 | 2341 | ||
2368 | static int il3945_alloc_bcast_station(struct il_priv *il) | 2342 | static int |
2343 | il3945_alloc_bcast_station(struct il_priv *il) | ||
2369 | { | 2344 | { |
2370 | struct il_rxon_context *ctx = &il->ctx; | 2345 | struct il_rxon_context *ctx = &il->ctx; |
2371 | unsigned long flags; | 2346 | unsigned long flags; |
2372 | u8 sta_id; | 2347 | u8 sta_id; |
2373 | 2348 | ||
2374 | spin_lock_irqsave(&il->sta_lock, flags); | 2349 | spin_lock_irqsave(&il->sta_lock, flags); |
2375 | sta_id = il_prep_station(il, ctx, | 2350 | sta_id = il_prep_station(il, ctx, il_bcast_addr, false, NULL); |
2376 | il_bcast_addr, false, NULL); | ||
2377 | if (sta_id == IL_INVALID_STATION) { | 2351 | if (sta_id == IL_INVALID_STATION) { |
2378 | IL_ERR("Unable to prepare broadcast station\n"); | 2352 | IL_ERR("Unable to prepare broadcast station\n"); |
2379 | spin_unlock_irqrestore(&il->sta_lock, flags); | 2353 | spin_unlock_irqrestore(&il->sta_lock, flags); |
@@ -2388,7 +2362,8 @@ static int il3945_alloc_bcast_station(struct il_priv *il) | |||
2388 | return 0; | 2362 | return 0; |
2389 | } | 2363 | } |
2390 | 2364 | ||
2391 | static int __il3945_up(struct il_priv *il) | 2365 | static int |
2366 | __il3945_up(struct il_priv *il) | ||
2392 | { | 2367 | { |
2393 | int rc, i; | 2368 | int rc, i; |
2394 | 2369 | ||
@@ -2407,8 +2382,7 @@ static int __il3945_up(struct il_priv *il) | |||
2407 | } | 2382 | } |
2408 | 2383 | ||
2409 | /* If platform's RF_KILL switch is NOT set to KILL */ | 2384 | /* If platform's RF_KILL switch is NOT set to KILL */ |
2410 | if (_il_rd(il, CSR_GP_CNTRL) & | 2385 | if (_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW) |
2411 | CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW) | ||
2412 | clear_bit(S_RF_KILL_HW, &il->status); | 2386 | clear_bit(S_RF_KILL_HW, &il->status); |
2413 | else { | 2387 | else { |
2414 | set_bit(S_RF_KILL_HW, &il->status); | 2388 | set_bit(S_RF_KILL_HW, &il->status); |
@@ -2426,8 +2400,7 @@ static int __il3945_up(struct il_priv *il) | |||
2426 | 2400 | ||
2427 | /* make sure rfkill handshake bits are cleared */ | 2401 | /* make sure rfkill handshake bits are cleared */ |
2428 | _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); | 2402 | _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); |
2429 | _il_wr(il, CSR_UCODE_DRV_GP1_CLR, | 2403 | _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); |
2430 | CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); | ||
2431 | 2404 | ||
2432 | /* clear (again), then enable host interrupts */ | 2405 | /* clear (again), then enable host interrupts */ |
2433 | _il_wr(il, CSR_INT, 0xFFFFFFFF); | 2406 | _il_wr(il, CSR_INT, 0xFFFFFFFF); |
@@ -2455,8 +2428,7 @@ static int __il3945_up(struct il_priv *il) | |||
2455 | rc = il->cfg->ops->lib->load_ucode(il); | 2428 | rc = il->cfg->ops->lib->load_ucode(il); |
2456 | 2429 | ||
2457 | if (rc) { | 2430 | if (rc) { |
2458 | IL_ERR( | 2431 | IL_ERR("Unable to set up bootstrap uCode: %d\n", rc); |
2459 | "Unable to set up bootstrap uCode: %d\n", rc); | ||
2460 | continue; | 2432 | continue; |
2461 | } | 2433 | } |
2462 | 2434 | ||
@@ -2478,14 +2450,14 @@ static int __il3945_up(struct il_priv *il) | |||
2478 | return -EIO; | 2450 | return -EIO; |
2479 | } | 2451 | } |
2480 | 2452 | ||
2481 | |||
2482 | /***************************************************************************** | 2453 | /***************************************************************************** |
2483 | * | 2454 | * |
2484 | * Workqueue callbacks | 2455 | * Workqueue callbacks |
2485 | * | 2456 | * |
2486 | *****************************************************************************/ | 2457 | *****************************************************************************/ |
2487 | 2458 | ||
2488 | static void il3945_bg_init_alive_start(struct work_struct *data) | 2459 | static void |
2460 | il3945_bg_init_alive_start(struct work_struct *data) | ||
2489 | { | 2461 | { |
2490 | struct il_priv *il = | 2462 | struct il_priv *il = |
2491 | container_of(data, struct il_priv, init_alive_start.work); | 2463 | container_of(data, struct il_priv, init_alive_start.work); |
@@ -2499,7 +2471,8 @@ out: | |||
2499 | mutex_unlock(&il->mutex); | 2471 | mutex_unlock(&il->mutex); |
2500 | } | 2472 | } |
2501 | 2473 | ||
2502 | static void il3945_bg_alive_start(struct work_struct *data) | 2474 | static void |
2475 | il3945_bg_alive_start(struct work_struct *data) | ||
2503 | { | 2476 | { |
2504 | struct il_priv *il = | 2477 | struct il_priv *il = |
2505 | container_of(data, struct il_priv, alive_start.work); | 2478 | container_of(data, struct il_priv, alive_start.work); |
@@ -2519,13 +2492,14 @@ out: | |||
2519 | * *is* readable even when device has been SW_RESET into low power mode | 2492 | * *is* readable even when device has been SW_RESET into low power mode |
2520 | * (e.g. during RF KILL). | 2493 | * (e.g. during RF KILL). |
2521 | */ | 2494 | */ |
2522 | static void il3945_rfkill_poll(struct work_struct *data) | 2495 | static void |
2496 | il3945_rfkill_poll(struct work_struct *data) | ||
2523 | { | 2497 | { |
2524 | struct il_priv *il = | 2498 | struct il_priv *il = |
2525 | container_of(data, struct il_priv, _3945.rfkill_poll.work); | 2499 | container_of(data, struct il_priv, _3945.rfkill_poll.work); |
2526 | bool old_rfkill = test_bit(S_RF_KILL_HW, &il->status); | 2500 | bool old_rfkill = test_bit(S_RF_KILL_HW, &il->status); |
2527 | bool new_rfkill = !(_il_rd(il, CSR_GP_CNTRL) | 2501 | bool new_rfkill = |
2528 | & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW); | 2502 | !(_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW); |
2529 | 2503 | ||
2530 | if (new_rfkill != old_rfkill) { | 2504 | if (new_rfkill != old_rfkill) { |
2531 | if (new_rfkill) | 2505 | if (new_rfkill) |
@@ -2536,7 +2510,7 @@ static void il3945_rfkill_poll(struct work_struct *data) | |||
2536 | wiphy_rfkill_set_hw_state(il->hw->wiphy, new_rfkill); | 2510 | wiphy_rfkill_set_hw_state(il->hw->wiphy, new_rfkill); |
2537 | 2511 | ||
2538 | D_RF_KILL("RF_KILL bit toggled to %s.\n", | 2512 | D_RF_KILL("RF_KILL bit toggled to %s.\n", |
2539 | new_rfkill ? "disable radio" : "enable radio"); | 2513 | new_rfkill ? "disable radio" : "enable radio"); |
2540 | } | 2514 | } |
2541 | 2515 | ||
2542 | /* Keep this running, even if radio now enabled. This will be | 2516 | /* Keep this running, even if radio now enabled. This will be |
@@ -2546,7 +2520,8 @@ static void il3945_rfkill_poll(struct work_struct *data) | |||
2546 | 2520 | ||
2547 | } | 2521 | } |
2548 | 2522 | ||
2549 | int il3945_request_scan(struct il_priv *il, struct ieee80211_vif *vif) | 2523 | int |
2524 | il3945_request_scan(struct il_priv *il, struct ieee80211_vif *vif) | ||
2550 | { | 2525 | { |
2551 | struct il_host_cmd cmd = { | 2526 | struct il_host_cmd cmd = { |
2552 | .id = C_SCAN, | 2527 | .id = C_SCAN, |
@@ -2563,8 +2538,9 @@ int il3945_request_scan(struct il_priv *il, struct ieee80211_vif *vif) | |||
2563 | lockdep_assert_held(&il->mutex); | 2538 | lockdep_assert_held(&il->mutex); |
2564 | 2539 | ||
2565 | if (!il->scan_cmd) { | 2540 | if (!il->scan_cmd) { |
2566 | il->scan_cmd = kmalloc(sizeof(struct il3945_scan_cmd) + | 2541 | il->scan_cmd = |
2567 | IL_MAX_SCAN_SIZE, GFP_KERNEL); | 2542 | kmalloc(sizeof(struct il3945_scan_cmd) + IL_MAX_SCAN_SIZE, |
2543 | GFP_KERNEL); | ||
2568 | if (!il->scan_cmd) { | 2544 | if (!il->scan_cmd) { |
2569 | D_SCAN("Fail to allocate scan memory\n"); | 2545 | D_SCAN("Fail to allocate scan memory\n"); |
2570 | return -ENOMEM; | 2546 | return -ENOMEM; |
@@ -2598,12 +2574,12 @@ int il3945_request_scan(struct il_priv *il, struct ieee80211_vif *vif) | |||
2598 | */ | 2574 | */ |
2599 | 2575 | ||
2600 | extra = (suspend_time / interval) << 24; | 2576 | extra = (suspend_time / interval) << 24; |
2601 | scan_suspend_time = 0xFF0FFFFF & | 2577 | scan_suspend_time = |
2602 | (extra | ((suspend_time % interval) * 1024)); | 2578 | 0xFF0FFFFF & (extra | ((suspend_time % interval) * 1024)); |
2603 | 2579 | ||
2604 | scan->suspend_time = cpu_to_le32(scan_suspend_time); | 2580 | scan->suspend_time = cpu_to_le32(scan_suspend_time); |
2605 | D_SCAN("suspend_time 0x%X beacon interval %d\n", | 2581 | D_SCAN("suspend_time 0x%X beacon interval %d\n", |
2606 | scan_suspend_time, interval); | 2582 | scan_suspend_time, interval); |
2607 | } | 2583 | } |
2608 | 2584 | ||
2609 | if (il->scan_request->n_ssids) { | 2585 | if (il->scan_request->n_ssids) { |
@@ -2615,7 +2591,7 @@ int il3945_request_scan(struct il_priv *il, struct ieee80211_vif *vif) | |||
2615 | continue; | 2591 | continue; |
2616 | scan->direct_scan[p].id = WLAN_EID_SSID; | 2592 | scan->direct_scan[p].id = WLAN_EID_SSID; |
2617 | scan->direct_scan[p].len = | 2593 | scan->direct_scan[p].len = |
2618 | il->scan_request->ssids[i].ssid_len; | 2594 | il->scan_request->ssids[i].ssid_len; |
2619 | memcpy(scan->direct_scan[p].ssid, | 2595 | memcpy(scan->direct_scan[p].ssid, |
2620 | il->scan_request->ssids[i].ssid, | 2596 | il->scan_request->ssids[i].ssid, |
2621 | il->scan_request->ssids[i].ssid_len); | 2597 | il->scan_request->ssids[i].ssid_len); |
@@ -2654,26 +2630,29 @@ int il3945_request_scan(struct il_priv *il, struct ieee80211_vif *vif) | |||
2654 | * is marked passive, we can do active scanning if we | 2630 | * is marked passive, we can do active scanning if we |
2655 | * detect transmissions. | 2631 | * detect transmissions. |
2656 | */ | 2632 | */ |
2657 | scan->good_CRC_th = is_active ? IL_GOOD_CRC_TH_DEFAULT : | 2633 | scan->good_CRC_th = |
2658 | IL_GOOD_CRC_TH_DISABLED; | 2634 | is_active ? IL_GOOD_CRC_TH_DEFAULT : IL_GOOD_CRC_TH_DISABLED; |
2659 | 2635 | ||
2660 | len = il_fill_probe_req(il, (struct ieee80211_mgmt *)scan->data, | 2636 | len = |
2661 | vif->addr, il->scan_request->ie, | 2637 | il_fill_probe_req(il, (struct ieee80211_mgmt *)scan->data, |
2662 | il->scan_request->ie_len, | 2638 | vif->addr, il->scan_request->ie, |
2663 | IL_MAX_SCAN_SIZE - sizeof(*scan)); | 2639 | il->scan_request->ie_len, |
2640 | IL_MAX_SCAN_SIZE - sizeof(*scan)); | ||
2664 | scan->tx_cmd.len = cpu_to_le16(len); | 2641 | scan->tx_cmd.len = cpu_to_le16(len); |
2665 | 2642 | ||
2666 | /* select Rx antennas */ | 2643 | /* select Rx antennas */ |
2667 | scan->flags |= il3945_get_antenna_flags(il); | 2644 | scan->flags |= il3945_get_antenna_flags(il); |
2668 | 2645 | ||
2669 | scan->channel_count = il3945_get_channels_for_scan(il, band, is_active, n_probes, | 2646 | scan->channel_count = |
2670 | (void *)&scan->data[len], vif); | 2647 | il3945_get_channels_for_scan(il, band, is_active, n_probes, |
2648 | (void *)&scan->data[len], vif); | ||
2671 | if (scan->channel_count == 0) { | 2649 | if (scan->channel_count == 0) { |
2672 | D_SCAN("channel count %d\n", scan->channel_count); | 2650 | D_SCAN("channel count %d\n", scan->channel_count); |
2673 | return -EIO; | 2651 | return -EIO; |
2674 | } | 2652 | } |
2675 | 2653 | ||
2676 | cmd.len += le16_to_cpu(scan->tx_cmd.len) + | 2654 | cmd.len += |
2655 | le16_to_cpu(scan->tx_cmd.len) + | ||
2677 | scan->channel_count * sizeof(struct il3945_scan_channel); | 2656 | scan->channel_count * sizeof(struct il3945_scan_channel); |
2678 | cmd.data = scan; | 2657 | cmd.data = scan; |
2679 | scan->len = cpu_to_le16(cmd.len); | 2658 | scan->len = cpu_to_le16(cmd.len); |
@@ -2685,7 +2664,8 @@ int il3945_request_scan(struct il_priv *il, struct ieee80211_vif *vif) | |||
2685 | return ret; | 2664 | return ret; |
2686 | } | 2665 | } |
2687 | 2666 | ||
2688 | void il3945_post_scan(struct il_priv *il) | 2667 | void |
2668 | il3945_post_scan(struct il_priv *il) | ||
2689 | { | 2669 | { |
2690 | struct il_rxon_context *ctx = &il->ctx; | 2670 | struct il_rxon_context *ctx = &il->ctx; |
2691 | 2671 | ||
@@ -2697,7 +2677,8 @@ void il3945_post_scan(struct il_priv *il) | |||
2697 | il3945_commit_rxon(il, ctx); | 2677 | il3945_commit_rxon(il, ctx); |
2698 | } | 2678 | } |
2699 | 2679 | ||
2700 | static void il3945_bg_restart(struct work_struct *data) | 2680 | static void |
2681 | il3945_bg_restart(struct work_struct *data) | ||
2701 | { | 2682 | { |
2702 | struct il_priv *il = container_of(data, struct il_priv, restart); | 2683 | struct il_priv *il = container_of(data, struct il_priv, restart); |
2703 | 2684 | ||
@@ -2725,10 +2706,10 @@ static void il3945_bg_restart(struct work_struct *data) | |||
2725 | } | 2706 | } |
2726 | } | 2707 | } |
2727 | 2708 | ||
2728 | static void il3945_bg_rx_replenish(struct work_struct *data) | 2709 | static void |
2710 | il3945_bg_rx_replenish(struct work_struct *data) | ||
2729 | { | 2711 | { |
2730 | struct il_priv *il = | 2712 | struct il_priv *il = container_of(data, struct il_priv, rx_replenish); |
2731 | container_of(data, struct il_priv, rx_replenish); | ||
2732 | 2713 | ||
2733 | mutex_lock(&il->mutex); | 2714 | mutex_lock(&il->mutex); |
2734 | if (test_bit(S_EXIT_PENDING, &il->status)) | 2715 | if (test_bit(S_EXIT_PENDING, &il->status)) |
@@ -2739,7 +2720,8 @@ out: | |||
2739 | mutex_unlock(&il->mutex); | 2720 | mutex_unlock(&il->mutex); |
2740 | } | 2721 | } |
2741 | 2722 | ||
2742 | void il3945_post_associate(struct il_priv *il) | 2723 | void |
2724 | il3945_post_associate(struct il_priv *il) | ||
2743 | { | 2725 | { |
2744 | int rc = 0; | 2726 | int rc = 0; |
2745 | struct ieee80211_conf *conf = NULL; | 2727 | struct ieee80211_conf *conf = NULL; |
@@ -2748,8 +2730,8 @@ void il3945_post_associate(struct il_priv *il) | |||
2748 | if (!ctx->vif || !il->is_open) | 2730 | if (!ctx->vif || !il->is_open) |
2749 | return; | 2731 | return; |
2750 | 2732 | ||
2751 | D_ASSOC("Associated as %d to: %pM\n", | 2733 | D_ASSOC("Associated as %d to: %pM\n", ctx->vif->bss_conf.aid, |
2752 | ctx->vif->bss_conf.aid, ctx->active.bssid_addr); | 2734 | ctx->active.bssid_addr); |
2753 | 2735 | ||
2754 | if (test_bit(S_EXIT_PENDING, &il->status)) | 2736 | if (test_bit(S_EXIT_PENDING, &il->status)) |
2755 | return; | 2737 | return; |
@@ -2763,15 +2745,14 @@ void il3945_post_associate(struct il_priv *il) | |||
2763 | 2745 | ||
2764 | rc = il_send_rxon_timing(il, ctx); | 2746 | rc = il_send_rxon_timing(il, ctx); |
2765 | if (rc) | 2747 | if (rc) |
2766 | IL_WARN("C_RXON_TIMING failed - " | 2748 | IL_WARN("C_RXON_TIMING failed - " "Attempting to continue.\n"); |
2767 | "Attempting to continue.\n"); | ||
2768 | 2749 | ||
2769 | ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK; | 2750 | ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK; |
2770 | 2751 | ||
2771 | ctx->staging.assoc_id = cpu_to_le16(ctx->vif->bss_conf.aid); | 2752 | ctx->staging.assoc_id = cpu_to_le16(ctx->vif->bss_conf.aid); |
2772 | 2753 | ||
2773 | D_ASSOC("assoc id %d beacon interval %d\n", | 2754 | D_ASSOC("assoc id %d beacon interval %d\n", ctx->vif->bss_conf.aid, |
2774 | ctx->vif->bss_conf.aid, ctx->vif->bss_conf.beacon_int); | 2755 | ctx->vif->bss_conf.beacon_int); |
2775 | 2756 | ||
2776 | if (ctx->vif->bss_conf.use_short_preamble) | 2757 | if (ctx->vif->bss_conf.use_short_preamble) |
2777 | ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; | 2758 | ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; |
@@ -2795,8 +2776,8 @@ void il3945_post_associate(struct il_priv *il) | |||
2795 | il3945_send_beacon_cmd(il); | 2776 | il3945_send_beacon_cmd(il); |
2796 | break; | 2777 | break; |
2797 | default: | 2778 | default: |
2798 | IL_ERR("%s Should not be called in %d mode\n", | 2779 | IL_ERR("%s Should not be called in %d mode\n", __func__, |
2799 | __func__, ctx->vif->type); | 2780 | ctx->vif->type); |
2800 | break; | 2781 | break; |
2801 | } | 2782 | } |
2802 | } | 2783 | } |
@@ -2809,7 +2790,8 @@ void il3945_post_associate(struct il_priv *il) | |||
2809 | 2790 | ||
2810 | #define UCODE_READY_TIMEOUT (2 * HZ) | 2791 | #define UCODE_READY_TIMEOUT (2 * HZ) |
2811 | 2792 | ||
2812 | static int il3945_mac_start(struct ieee80211_hw *hw) | 2793 | static int |
2794 | il3945_mac_start(struct ieee80211_hw *hw) | ||
2813 | { | 2795 | { |
2814 | struct il_priv *il = hw->priv; | 2796 | struct il_priv *il = hw->priv; |
2815 | int ret; | 2797 | int ret; |
@@ -2843,13 +2825,12 @@ static int il3945_mac_start(struct ieee80211_hw *hw) | |||
2843 | /* Wait for START_ALIVE from ucode. Otherwise callbacks from | 2825 | /* Wait for START_ALIVE from ucode. Otherwise callbacks from |
2844 | * mac80211 will not be run successfully. */ | 2826 | * mac80211 will not be run successfully. */ |
2845 | ret = wait_event_timeout(il->wait_command_queue, | 2827 | ret = wait_event_timeout(il->wait_command_queue, |
2846 | test_bit(S_READY, &il->status), | 2828 | test_bit(S_READY, &il->status), |
2847 | UCODE_READY_TIMEOUT); | 2829 | UCODE_READY_TIMEOUT); |
2848 | if (!ret) { | 2830 | if (!ret) { |
2849 | if (!test_bit(S_READY, &il->status)) { | 2831 | if (!test_bit(S_READY, &il->status)) { |
2850 | IL_ERR( | 2832 | IL_ERR("Wait for START_ALIVE timeout after %dms.\n", |
2851 | "Wait for START_ALIVE timeout after %dms.\n", | 2833 | jiffies_to_msecs(UCODE_READY_TIMEOUT)); |
2852 | jiffies_to_msecs(UCODE_READY_TIMEOUT)); | ||
2853 | ret = -ETIMEDOUT; | 2834 | ret = -ETIMEDOUT; |
2854 | goto out_release_irq; | 2835 | goto out_release_irq; |
2855 | } | 2836 | } |
@@ -2869,7 +2850,8 @@ out_release_irq: | |||
2869 | return ret; | 2850 | return ret; |
2870 | } | 2851 | } |
2871 | 2852 | ||
2872 | static void il3945_mac_stop(struct ieee80211_hw *hw) | 2853 | static void |
2854 | il3945_mac_stop(struct ieee80211_hw *hw) | ||
2873 | { | 2855 | { |
2874 | struct il_priv *il = hw->priv; | 2856 | struct il_priv *il = hw->priv; |
2875 | 2857 | ||
@@ -2893,14 +2875,15 @@ static void il3945_mac_stop(struct ieee80211_hw *hw) | |||
2893 | D_MAC80211("leave\n"); | 2875 | D_MAC80211("leave\n"); |
2894 | } | 2876 | } |
2895 | 2877 | ||
2896 | static void il3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb) | 2878 | static void |
2879 | il3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb) | ||
2897 | { | 2880 | { |
2898 | struct il_priv *il = hw->priv; | 2881 | struct il_priv *il = hw->priv; |
2899 | 2882 | ||
2900 | D_MAC80211("enter\n"); | 2883 | D_MAC80211("enter\n"); |
2901 | 2884 | ||
2902 | D_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len, | 2885 | D_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len, |
2903 | ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate); | 2886 | ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate); |
2904 | 2887 | ||
2905 | if (il3945_tx_skb(il, skb)) | 2888 | if (il3945_tx_skb(il, skb)) |
2906 | dev_kfree_skb_any(skb); | 2889 | dev_kfree_skb_any(skb); |
@@ -2908,7 +2891,8 @@ static void il3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb) | |||
2908 | D_MAC80211("leave\n"); | 2891 | D_MAC80211("leave\n"); |
2909 | } | 2892 | } |
2910 | 2893 | ||
2911 | void il3945_config_ap(struct il_priv *il) | 2894 | void |
2895 | il3945_config_ap(struct il_priv *il) | ||
2912 | { | 2896 | { |
2913 | struct il_rxon_context *ctx = &il->ctx; | 2897 | struct il_rxon_context *ctx = &il->ctx; |
2914 | struct ieee80211_vif *vif = ctx->vif; | 2898 | struct ieee80211_vif *vif = ctx->vif; |
@@ -2928,24 +2912,20 @@ void il3945_config_ap(struct il_priv *il) | |||
2928 | rc = il_send_rxon_timing(il, ctx); | 2912 | rc = il_send_rxon_timing(il, ctx); |
2929 | if (rc) | 2913 | if (rc) |
2930 | IL_WARN("C_RXON_TIMING failed - " | 2914 | IL_WARN("C_RXON_TIMING failed - " |
2931 | "Attempting to continue.\n"); | 2915 | "Attempting to continue.\n"); |
2932 | 2916 | ||
2933 | ctx->staging.assoc_id = 0; | 2917 | ctx->staging.assoc_id = 0; |
2934 | 2918 | ||
2935 | if (vif->bss_conf.use_short_preamble) | 2919 | if (vif->bss_conf.use_short_preamble) |
2936 | ctx->staging.flags |= | 2920 | ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; |
2937 | RXON_FLG_SHORT_PREAMBLE_MSK; | ||
2938 | else | 2921 | else |
2939 | ctx->staging.flags &= | 2922 | ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; |
2940 | ~RXON_FLG_SHORT_PREAMBLE_MSK; | ||
2941 | 2923 | ||
2942 | if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK) { | 2924 | if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK) { |
2943 | if (vif->bss_conf.use_short_slot) | 2925 | if (vif->bss_conf.use_short_slot) |
2944 | ctx->staging.flags |= | 2926 | ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK; |
2945 | RXON_FLG_SHORT_SLOT_MSK; | ||
2946 | else | 2927 | else |
2947 | ctx->staging.flags &= | 2928 | ctx->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK; |
2948 | ~RXON_FLG_SHORT_SLOT_MSK; | ||
2949 | } | 2929 | } |
2950 | /* restore RXON assoc */ | 2930 | /* restore RXON assoc */ |
2951 | ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK; | 2931 | ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK; |
@@ -2954,10 +2934,10 @@ void il3945_config_ap(struct il_priv *il) | |||
2954 | il3945_send_beacon_cmd(il); | 2934 | il3945_send_beacon_cmd(il); |
2955 | } | 2935 | } |
2956 | 2936 | ||
2957 | static int il3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, | 2937 | static int |
2958 | struct ieee80211_vif *vif, | 2938 | il3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, |
2959 | struct ieee80211_sta *sta, | 2939 | struct ieee80211_vif *vif, struct ieee80211_sta *sta, |
2960 | struct ieee80211_key_conf *key) | 2940 | struct ieee80211_key_conf *key) |
2961 | { | 2941 | { |
2962 | struct il_priv *il = hw->priv; | 2942 | struct il_priv *il = hw->priv; |
2963 | int ret = 0; | 2943 | int ret = 0; |
@@ -2982,8 +2962,7 @@ static int il3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, | |||
2982 | static_key = !il_is_associated(il); | 2962 | static_key = !il_is_associated(il); |
2983 | 2963 | ||
2984 | if (!static_key) { | 2964 | if (!static_key) { |
2985 | sta_id = il_sta_id_or_broadcast( | 2965 | sta_id = il_sta_id_or_broadcast(il, &il->ctx, sta); |
2986 | il, &il->ctx, sta); | ||
2987 | if (sta_id == IL_INVALID_STATION) | 2966 | if (sta_id == IL_INVALID_STATION) |
2988 | return -EINVAL; | 2967 | return -EINVAL; |
2989 | } | 2968 | } |
@@ -3016,9 +2995,9 @@ static int il3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, | |||
3016 | return ret; | 2995 | return ret; |
3017 | } | 2996 | } |
3018 | 2997 | ||
3019 | static int il3945_mac_sta_add(struct ieee80211_hw *hw, | 2998 | static int |
3020 | struct ieee80211_vif *vif, | 2999 | il3945_mac_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
3021 | struct ieee80211_sta *sta) | 3000 | struct ieee80211_sta *sta) |
3022 | { | 3001 | { |
3023 | struct il_priv *il = hw->priv; | 3002 | struct il_priv *il = hw->priv; |
3024 | struct il3945_sta_priv *sta_priv = (void *)sta->drv_priv; | 3003 | struct il3945_sta_priv *sta_priv = (void *)sta->drv_priv; |
@@ -3026,20 +3005,15 @@ static int il3945_mac_sta_add(struct ieee80211_hw *hw, | |||
3026 | bool is_ap = vif->type == NL80211_IFTYPE_STATION; | 3005 | bool is_ap = vif->type == NL80211_IFTYPE_STATION; |
3027 | u8 sta_id; | 3006 | u8 sta_id; |
3028 | 3007 | ||
3029 | D_INFO("received request to add station %pM\n", | 3008 | D_INFO("received request to add station %pM\n", sta->addr); |
3030 | sta->addr); | ||
3031 | mutex_lock(&il->mutex); | 3009 | mutex_lock(&il->mutex); |
3032 | D_INFO("proceeding to add station %pM\n", | 3010 | D_INFO("proceeding to add station %pM\n", sta->addr); |
3033 | sta->addr); | ||
3034 | sta_priv->common.sta_id = IL_INVALID_STATION; | 3011 | sta_priv->common.sta_id = IL_INVALID_STATION; |
3035 | 3012 | ||
3036 | 3013 | ret = | |
3037 | ret = il_add_station_common(il, | 3014 | il_add_station_common(il, &il->ctx, sta->addr, is_ap, sta, &sta_id); |
3038 | &il->ctx, | ||
3039 | sta->addr, is_ap, sta, &sta_id); | ||
3040 | if (ret) { | 3015 | if (ret) { |
3041 | IL_ERR("Unable to add station %pM (%d)\n", | 3016 | IL_ERR("Unable to add station %pM (%d)\n", sta->addr, ret); |
3042 | sta->addr, ret); | ||
3043 | /* Should we return success if return code is EEXIST ? */ | 3017 | /* Should we return success if return code is EEXIST ? */ |
3044 | mutex_unlock(&il->mutex); | 3018 | mutex_unlock(&il->mutex); |
3045 | return ret; | 3019 | return ret; |
@@ -3048,18 +3022,16 @@ static int il3945_mac_sta_add(struct ieee80211_hw *hw, | |||
3048 | sta_priv->common.sta_id = sta_id; | 3022 | sta_priv->common.sta_id = sta_id; |
3049 | 3023 | ||
3050 | /* Initialize rate scaling */ | 3024 | /* Initialize rate scaling */ |
3051 | D_INFO("Initializing rate scaling for station %pM\n", | 3025 | D_INFO("Initializing rate scaling for station %pM\n", sta->addr); |
3052 | sta->addr); | ||
3053 | il3945_rs_rate_init(il, sta, sta_id); | 3026 | il3945_rs_rate_init(il, sta, sta_id); |
3054 | mutex_unlock(&il->mutex); | 3027 | mutex_unlock(&il->mutex); |
3055 | 3028 | ||
3056 | return 0; | 3029 | return 0; |
3057 | } | 3030 | } |
3058 | 3031 | ||
3059 | static void il3945_configure_filter(struct ieee80211_hw *hw, | 3032 | static void |
3060 | unsigned int changed_flags, | 3033 | il3945_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags, |
3061 | unsigned int *total_flags, | 3034 | unsigned int *total_flags, u64 multicast) |
3062 | u64 multicast) | ||
3063 | { | 3035 | { |
3064 | struct il_priv *il = hw->priv; | 3036 | struct il_priv *il = hw->priv; |
3065 | __le32 filter_or = 0, filter_nand = 0; | 3037 | __le32 filter_or = 0, filter_nand = 0; |
@@ -3072,8 +3044,8 @@ static void il3945_configure_filter(struct ieee80211_hw *hw, | |||
3072 | filter_nand |= (flag); \ | 3044 | filter_nand |= (flag); \ |
3073 | } while (0) | 3045 | } while (0) |
3074 | 3046 | ||
3075 | D_MAC80211("Enter: changed: 0x%x, total: 0x%x\n", | 3047 | D_MAC80211("Enter: changed: 0x%x, total: 0x%x\n", changed_flags, |
3076 | changed_flags, *total_flags); | 3048 | *total_flags); |
3077 | 3049 | ||
3078 | CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK); | 3050 | CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK); |
3079 | CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK); | 3051 | CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK); |
@@ -3100,11 +3072,11 @@ static void il3945_configure_filter(struct ieee80211_hw *hw, | |||
3100 | * since we currently do not support programming multicast | 3072 | * since we currently do not support programming multicast |
3101 | * filters into the device. | 3073 | * filters into the device. |
3102 | */ | 3074 | */ |
3103 | *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS | | 3075 | *total_flags &= |
3104 | FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL; | 3076 | FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS | |
3077 | FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL; | ||
3105 | } | 3078 | } |
3106 | 3079 | ||
3107 | |||
3108 | /***************************************************************************** | 3080 | /***************************************************************************** |
3109 | * | 3081 | * |
3110 | * sysfs attributes | 3082 | * sysfs attributes |
@@ -3124,15 +3096,17 @@ static void il3945_configure_filter(struct ieee80211_hw *hw, | |||
3124 | * level that is used instead of the global debug level if it (the per | 3096 | * level that is used instead of the global debug level if it (the per |
3125 | * device debug level) is set. | 3097 | * device debug level) is set. |
3126 | */ | 3098 | */ |
3127 | static ssize_t il3945_show_debug_level(struct device *d, | 3099 | static ssize_t |
3128 | struct device_attribute *attr, char *buf) | 3100 | il3945_show_debug_level(struct device *d, struct device_attribute *attr, |
3101 | char *buf) | ||
3129 | { | 3102 | { |
3130 | struct il_priv *il = dev_get_drvdata(d); | 3103 | struct il_priv *il = dev_get_drvdata(d); |
3131 | return sprintf(buf, "0x%08X\n", il_get_debug_level(il)); | 3104 | return sprintf(buf, "0x%08X\n", il_get_debug_level(il)); |
3132 | } | 3105 | } |
3133 | static ssize_t il3945_store_debug_level(struct device *d, | 3106 | |
3134 | struct device_attribute *attr, | 3107 | static ssize_t |
3135 | const char *buf, size_t count) | 3108 | il3945_store_debug_level(struct device *d, struct device_attribute *attr, |
3109 | const char *buf, size_t count) | ||
3136 | { | 3110 | { |
3137 | struct il_priv *il = dev_get_drvdata(d); | 3111 | struct il_priv *il = dev_get_drvdata(d); |
3138 | unsigned long val; | 3112 | unsigned long val; |
@@ -3144,19 +3118,19 @@ static ssize_t il3945_store_debug_level(struct device *d, | |||
3144 | else { | 3118 | else { |
3145 | il->debug_level = val; | 3119 | il->debug_level = val; |
3146 | if (il_alloc_traffic_mem(il)) | 3120 | if (il_alloc_traffic_mem(il)) |
3147 | IL_ERR( | 3121 | IL_ERR("Not enough memory to generate traffic log\n"); |
3148 | "Not enough memory to generate traffic log\n"); | ||
3149 | } | 3122 | } |
3150 | return strnlen(buf, count); | 3123 | return strnlen(buf, count); |
3151 | } | 3124 | } |
3152 | 3125 | ||
3153 | static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO, | 3126 | static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO, il3945_show_debug_level, |
3154 | il3945_show_debug_level, il3945_store_debug_level); | 3127 | il3945_store_debug_level); |
3155 | 3128 | ||
3156 | #endif /* CONFIG_IWLEGACY_DEBUG */ | 3129 | #endif /* CONFIG_IWLEGACY_DEBUG */ |
3157 | 3130 | ||
3158 | static ssize_t il3945_show_temperature(struct device *d, | 3131 | static ssize_t |
3159 | struct device_attribute *attr, char *buf) | 3132 | il3945_show_temperature(struct device *d, struct device_attribute *attr, |
3133 | char *buf) | ||
3160 | { | 3134 | { |
3161 | struct il_priv *il = dev_get_drvdata(d); | 3135 | struct il_priv *il = dev_get_drvdata(d); |
3162 | 3136 | ||
@@ -3168,16 +3142,16 @@ static ssize_t il3945_show_temperature(struct device *d, | |||
3168 | 3142 | ||
3169 | static DEVICE_ATTR(temperature, S_IRUGO, il3945_show_temperature, NULL); | 3143 | static DEVICE_ATTR(temperature, S_IRUGO, il3945_show_temperature, NULL); |
3170 | 3144 | ||
3171 | static ssize_t il3945_show_tx_power(struct device *d, | 3145 | static ssize_t |
3172 | struct device_attribute *attr, char *buf) | 3146 | il3945_show_tx_power(struct device *d, struct device_attribute *attr, char *buf) |
3173 | { | 3147 | { |
3174 | struct il_priv *il = dev_get_drvdata(d); | 3148 | struct il_priv *il = dev_get_drvdata(d); |
3175 | return sprintf(buf, "%d\n", il->tx_power_user_lmt); | 3149 | return sprintf(buf, "%d\n", il->tx_power_user_lmt); |
3176 | } | 3150 | } |
3177 | 3151 | ||
3178 | static ssize_t il3945_store_tx_power(struct device *d, | 3152 | static ssize_t |
3179 | struct device_attribute *attr, | 3153 | il3945_store_tx_power(struct device *d, struct device_attribute *attr, |
3180 | const char *buf, size_t count) | 3154 | const char *buf, size_t count) |
3181 | { | 3155 | { |
3182 | struct il_priv *il = dev_get_drvdata(d); | 3156 | struct il_priv *il = dev_get_drvdata(d); |
3183 | char *p = (char *)buf; | 3157 | char *p = (char *)buf; |
@@ -3192,10 +3166,11 @@ static ssize_t il3945_store_tx_power(struct device *d, | |||
3192 | return count; | 3166 | return count; |
3193 | } | 3167 | } |
3194 | 3168 | ||
3195 | static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, il3945_show_tx_power, il3945_store_tx_power); | 3169 | static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, il3945_show_tx_power, |
3170 | il3945_store_tx_power); | ||
3196 | 3171 | ||
3197 | static ssize_t il3945_show_flags(struct device *d, | 3172 | static ssize_t |
3198 | struct device_attribute *attr, char *buf) | 3173 | il3945_show_flags(struct device *d, struct device_attribute *attr, char *buf) |
3199 | { | 3174 | { |
3200 | struct il_priv *il = dev_get_drvdata(d); | 3175 | struct il_priv *il = dev_get_drvdata(d); |
3201 | struct il_rxon_context *ctx = &il->ctx; | 3176 | struct il_rxon_context *ctx = &il->ctx; |
@@ -3203,9 +3178,9 @@ static ssize_t il3945_show_flags(struct device *d, | |||
3203 | return sprintf(buf, "0x%04X\n", ctx->active.flags); | 3178 | return sprintf(buf, "0x%04X\n", ctx->active.flags); |
3204 | } | 3179 | } |
3205 | 3180 | ||
3206 | static ssize_t il3945_store_flags(struct device *d, | 3181 | static ssize_t |
3207 | struct device_attribute *attr, | 3182 | il3945_store_flags(struct device *d, struct device_attribute *attr, |
3208 | const char *buf, size_t count) | 3183 | const char *buf, size_t count) |
3209 | { | 3184 | { |
3210 | struct il_priv *il = dev_get_drvdata(d); | 3185 | struct il_priv *il = dev_get_drvdata(d); |
3211 | u32 flags = simple_strtoul(buf, NULL, 0); | 3186 | u32 flags = simple_strtoul(buf, NULL, 0); |
@@ -3217,8 +3192,7 @@ static ssize_t il3945_store_flags(struct device *d, | |||
3217 | if (il_scan_cancel_timeout(il, 100)) | 3192 | if (il_scan_cancel_timeout(il, 100)) |
3218 | IL_WARN("Could not cancel scan.\n"); | 3193 | IL_WARN("Could not cancel scan.\n"); |
3219 | else { | 3194 | else { |
3220 | D_INFO("Committing rxon.flags = 0x%04X\n", | 3195 | D_INFO("Committing rxon.flags = 0x%04X\n", flags); |
3221 | flags); | ||
3222 | ctx->staging.flags = cpu_to_le32(flags); | 3196 | ctx->staging.flags = cpu_to_le32(flags); |
3223 | il3945_commit_rxon(il, ctx); | 3197 | il3945_commit_rxon(il, ctx); |
3224 | } | 3198 | } |
@@ -3228,21 +3202,22 @@ static ssize_t il3945_store_flags(struct device *d, | |||
3228 | return count; | 3202 | return count; |
3229 | } | 3203 | } |
3230 | 3204 | ||
3231 | static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, il3945_show_flags, il3945_store_flags); | 3205 | static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, il3945_show_flags, |
3206 | il3945_store_flags); | ||
3232 | 3207 | ||
3233 | static ssize_t il3945_show_filter_flags(struct device *d, | 3208 | static ssize_t |
3234 | struct device_attribute *attr, char *buf) | 3209 | il3945_show_filter_flags(struct device *d, struct device_attribute *attr, |
3210 | char *buf) | ||
3235 | { | 3211 | { |
3236 | struct il_priv *il = dev_get_drvdata(d); | 3212 | struct il_priv *il = dev_get_drvdata(d); |
3237 | struct il_rxon_context *ctx = &il->ctx; | 3213 | struct il_rxon_context *ctx = &il->ctx; |
3238 | 3214 | ||
3239 | return sprintf(buf, "0x%04X\n", | 3215 | return sprintf(buf, "0x%04X\n", le32_to_cpu(ctx->active.filter_flags)); |
3240 | le32_to_cpu(ctx->active.filter_flags)); | ||
3241 | } | 3216 | } |
3242 | 3217 | ||
3243 | static ssize_t il3945_store_filter_flags(struct device *d, | 3218 | static ssize_t |
3244 | struct device_attribute *attr, | 3219 | il3945_store_filter_flags(struct device *d, struct device_attribute *attr, |
3245 | const char *buf, size_t count) | 3220 | const char *buf, size_t count) |
3246 | { | 3221 | { |
3247 | struct il_priv *il = dev_get_drvdata(d); | 3222 | struct il_priv *il = dev_get_drvdata(d); |
3248 | struct il_rxon_context *ctx = &il->ctx; | 3223 | struct il_rxon_context *ctx = &il->ctx; |
@@ -3254,10 +3229,9 @@ static ssize_t il3945_store_filter_flags(struct device *d, | |||
3254 | if (il_scan_cancel_timeout(il, 100)) | 3229 | if (il_scan_cancel_timeout(il, 100)) |
3255 | IL_WARN("Could not cancel scan.\n"); | 3230 | IL_WARN("Could not cancel scan.\n"); |
3256 | else { | 3231 | else { |
3257 | D_INFO("Committing rxon.filter_flags = " | 3232 | D_INFO("Committing rxon.filter_flags = " "0x%04X\n", |
3258 | "0x%04X\n", filter_flags); | 3233 | filter_flags); |
3259 | ctx->staging.filter_flags = | 3234 | ctx->staging.filter_flags = cpu_to_le32(filter_flags); |
3260 | cpu_to_le32(filter_flags); | ||
3261 | il3945_commit_rxon(il, ctx); | 3235 | il3945_commit_rxon(il, ctx); |
3262 | } | 3236 | } |
3263 | } | 3237 | } |
@@ -3269,13 +3243,14 @@ static ssize_t il3945_store_filter_flags(struct device *d, | |||
3269 | static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, il3945_show_filter_flags, | 3243 | static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, il3945_show_filter_flags, |
3270 | il3945_store_filter_flags); | 3244 | il3945_store_filter_flags); |
3271 | 3245 | ||
3272 | static ssize_t il3945_show_measurement(struct device *d, | 3246 | static ssize_t |
3273 | struct device_attribute *attr, char *buf) | 3247 | il3945_show_measurement(struct device *d, struct device_attribute *attr, |
3248 | char *buf) | ||
3274 | { | 3249 | { |
3275 | struct il_priv *il = dev_get_drvdata(d); | 3250 | struct il_priv *il = dev_get_drvdata(d); |
3276 | struct il_spectrum_notification measure_report; | 3251 | struct il_spectrum_notification measure_report; |
3277 | u32 size = sizeof(measure_report), len = 0, ofs = 0; | 3252 | u32 size = sizeof(measure_report), len = 0, ofs = 0; |
3278 | u8 *data = (u8 *)&measure_report; | 3253 | u8 *data = (u8 *) & measure_report; |
3279 | unsigned long flags; | 3254 | unsigned long flags; |
3280 | 3255 | ||
3281 | spin_lock_irqsave(&il->lock, flags); | 3256 | spin_lock_irqsave(&il->lock, flags); |
@@ -3301,9 +3276,9 @@ static ssize_t il3945_show_measurement(struct device *d, | |||
3301 | return len; | 3276 | return len; |
3302 | } | 3277 | } |
3303 | 3278 | ||
3304 | static ssize_t il3945_store_measurement(struct device *d, | 3279 | static ssize_t |
3305 | struct device_attribute *attr, | 3280 | il3945_store_measurement(struct device *d, struct device_attribute *attr, |
3306 | const char *buf, size_t count) | 3281 | const char *buf, size_t count) |
3307 | { | 3282 | { |
3308 | struct il_priv *il = dev_get_drvdata(d); | 3283 | struct il_priv *il = dev_get_drvdata(d); |
3309 | struct il_rxon_context *ctx = &il->ctx; | 3284 | struct il_rxon_context *ctx = &il->ctx; |
@@ -3330,19 +3305,19 @@ static ssize_t il3945_store_measurement(struct device *d, | |||
3330 | type = simple_strtoul(p + 1, NULL, 0); | 3305 | type = simple_strtoul(p + 1, NULL, 0); |
3331 | } | 3306 | } |
3332 | 3307 | ||
3333 | D_INFO("Invoking measurement of type %d on " | 3308 | D_INFO("Invoking measurement of type %d on " "channel %d (for '%s')\n", |
3334 | "channel %d (for '%s')\n", type, params.channel, buf); | 3309 | type, params.channel, buf); |
3335 | il3945_get_measurement(il, ¶ms, type); | 3310 | il3945_get_measurement(il, ¶ms, type); |
3336 | 3311 | ||
3337 | return count; | 3312 | return count; |
3338 | } | 3313 | } |
3339 | 3314 | ||
3340 | static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR, | 3315 | static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR, il3945_show_measurement, |
3341 | il3945_show_measurement, il3945_store_measurement); | 3316 | il3945_store_measurement); |
3342 | 3317 | ||
3343 | static ssize_t il3945_store_retry_rate(struct device *d, | 3318 | static ssize_t |
3344 | struct device_attribute *attr, | 3319 | il3945_store_retry_rate(struct device *d, struct device_attribute *attr, |
3345 | const char *buf, size_t count) | 3320 | const char *buf, size_t count) |
3346 | { | 3321 | { |
3347 | struct il_priv *il = dev_get_drvdata(d); | 3322 | struct il_priv *il = dev_get_drvdata(d); |
3348 | 3323 | ||
@@ -3353,8 +3328,9 @@ static ssize_t il3945_store_retry_rate(struct device *d, | |||
3353 | return count; | 3328 | return count; |
3354 | } | 3329 | } |
3355 | 3330 | ||
3356 | static ssize_t il3945_show_retry_rate(struct device *d, | 3331 | static ssize_t |
3357 | struct device_attribute *attr, char *buf) | 3332 | il3945_show_retry_rate(struct device *d, struct device_attribute *attr, |
3333 | char *buf) | ||
3358 | { | 3334 | { |
3359 | struct il_priv *il = dev_get_drvdata(d); | 3335 | struct il_priv *il = dev_get_drvdata(d); |
3360 | return sprintf(buf, "%d", il->retry_rate); | 3336 | return sprintf(buf, "%d", il->retry_rate); |
@@ -3363,9 +3339,8 @@ static ssize_t il3945_show_retry_rate(struct device *d, | |||
3363 | static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, il3945_show_retry_rate, | 3339 | static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, il3945_show_retry_rate, |
3364 | il3945_store_retry_rate); | 3340 | il3945_store_retry_rate); |
3365 | 3341 | ||
3366 | 3342 | static ssize_t | |
3367 | static ssize_t il3945_show_channels(struct device *d, | 3343 | il3945_show_channels(struct device *d, struct device_attribute *attr, char *buf) |
3368 | struct device_attribute *attr, char *buf) | ||
3369 | { | 3344 | { |
3370 | /* all this shit doesn't belong into sysfs anyway */ | 3345 | /* all this shit doesn't belong into sysfs anyway */ |
3371 | return 0; | 3346 | return 0; |
@@ -3373,8 +3348,8 @@ static ssize_t il3945_show_channels(struct device *d, | |||
3373 | 3348 | ||
3374 | static DEVICE_ATTR(channels, S_IRUSR, il3945_show_channels, NULL); | 3349 | static DEVICE_ATTR(channels, S_IRUSR, il3945_show_channels, NULL); |
3375 | 3350 | ||
3376 | static ssize_t il3945_show_antenna(struct device *d, | 3351 | static ssize_t |
3377 | struct device_attribute *attr, char *buf) | 3352 | il3945_show_antenna(struct device *d, struct device_attribute *attr, char *buf) |
3378 | { | 3353 | { |
3379 | struct il_priv *il = dev_get_drvdata(d); | 3354 | struct il_priv *il = dev_get_drvdata(d); |
3380 | 3355 | ||
@@ -3384,9 +3359,9 @@ static ssize_t il3945_show_antenna(struct device *d, | |||
3384 | return sprintf(buf, "%d\n", il3945_mod_params.antenna); | 3359 | return sprintf(buf, "%d\n", il3945_mod_params.antenna); |
3385 | } | 3360 | } |
3386 | 3361 | ||
3387 | static ssize_t il3945_store_antenna(struct device *d, | 3362 | static ssize_t |
3388 | struct device_attribute *attr, | 3363 | il3945_store_antenna(struct device *d, struct device_attribute *attr, |
3389 | const char *buf, size_t count) | 3364 | const char *buf, size_t count) |
3390 | { | 3365 | { |
3391 | struct il_priv *il __maybe_unused = dev_get_drvdata(d); | 3366 | struct il_priv *il __maybe_unused = dev_get_drvdata(d); |
3392 | int ant; | 3367 | int ant; |
@@ -3405,14 +3380,14 @@ static ssize_t il3945_store_antenna(struct device *d, | |||
3405 | } else | 3380 | } else |
3406 | D_INFO("Bad antenna select value %d.\n", ant); | 3381 | D_INFO("Bad antenna select value %d.\n", ant); |
3407 | 3382 | ||
3408 | |||
3409 | return count; | 3383 | return count; |
3410 | } | 3384 | } |
3411 | 3385 | ||
3412 | static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, il3945_show_antenna, il3945_store_antenna); | 3386 | static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, il3945_show_antenna, |
3387 | il3945_store_antenna); | ||
3413 | 3388 | ||
3414 | static ssize_t il3945_show_status(struct device *d, | 3389 | static ssize_t |
3415 | struct device_attribute *attr, char *buf) | 3390 | il3945_show_status(struct device *d, struct device_attribute *attr, char *buf) |
3416 | { | 3391 | { |
3417 | struct il_priv *il = dev_get_drvdata(d); | 3392 | struct il_priv *il = dev_get_drvdata(d); |
3418 | if (!il_is_alive(il)) | 3393 | if (!il_is_alive(il)) |
@@ -3422,9 +3397,9 @@ static ssize_t il3945_show_status(struct device *d, | |||
3422 | 3397 | ||
3423 | static DEVICE_ATTR(status, S_IRUGO, il3945_show_status, NULL); | 3398 | static DEVICE_ATTR(status, S_IRUGO, il3945_show_status, NULL); |
3424 | 3399 | ||
3425 | static ssize_t il3945_dump_error_log(struct device *d, | 3400 | static ssize_t |
3426 | struct device_attribute *attr, | 3401 | il3945_dump_error_log(struct device *d, struct device_attribute *attr, |
3427 | const char *buf, size_t count) | 3402 | const char *buf, size_t count) |
3428 | { | 3403 | { |
3429 | struct il_priv *il = dev_get_drvdata(d); | 3404 | struct il_priv *il = dev_get_drvdata(d); |
3430 | char *p = (char *)buf; | 3405 | char *p = (char *)buf; |
@@ -3443,7 +3418,8 @@ static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, il3945_dump_error_log); | |||
3443 | * | 3418 | * |
3444 | *****************************************************************************/ | 3419 | *****************************************************************************/ |
3445 | 3420 | ||
3446 | static void il3945_setup_deferred_work(struct il_priv *il) | 3421 | static void |
3422 | il3945_setup_deferred_work(struct il_priv *il) | ||
3447 | { | 3423 | { |
3448 | il->workqueue = create_singlethread_workqueue(DRV_NAME); | 3424 | il->workqueue = create_singlethread_workqueue(DRV_NAME); |
3449 | 3425 | ||
@@ -3463,11 +3439,13 @@ static void il3945_setup_deferred_work(struct il_priv *il) | |||
3463 | il->watchdog.data = (unsigned long)il; | 3439 | il->watchdog.data = (unsigned long)il; |
3464 | il->watchdog.function = il_bg_watchdog; | 3440 | il->watchdog.function = il_bg_watchdog; |
3465 | 3441 | ||
3466 | tasklet_init(&il->irq_tasklet, (void (*)(unsigned long)) | 3442 | tasklet_init(&il->irq_tasklet, |
3467 | il3945_irq_tasklet, (unsigned long)il); | 3443 | (void (*)(unsigned long))il3945_irq_tasklet, |
3444 | (unsigned long)il); | ||
3468 | } | 3445 | } |
3469 | 3446 | ||
3470 | static void il3945_cancel_deferred_work(struct il_priv *il) | 3447 | static void |
3448 | il3945_cancel_deferred_work(struct il_priv *il) | ||
3471 | { | 3449 | { |
3472 | il3945_hw_cancel_deferred_work(il); | 3450 | il3945_hw_cancel_deferred_work(il); |
3473 | 3451 | ||
@@ -3518,7 +3496,8 @@ struct ieee80211_ops il3945_hw_ops = { | |||
3518 | .tx_last_beacon = il_mac_tx_last_beacon, | 3496 | .tx_last_beacon = il_mac_tx_last_beacon, |
3519 | }; | 3497 | }; |
3520 | 3498 | ||
3521 | static int il3945_init_drv(struct il_priv *il) | 3499 | static int |
3500 | il3945_init_drv(struct il_priv *il) | ||
3522 | { | 3501 | { |
3523 | int ret; | 3502 | int ret; |
3524 | struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom; | 3503 | struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom; |
@@ -3545,7 +3524,7 @@ static int il3945_init_drv(struct il_priv *il) | |||
3545 | 3524 | ||
3546 | if (eeprom->version < EEPROM_3945_EEPROM_VERSION) { | 3525 | if (eeprom->version < EEPROM_3945_EEPROM_VERSION) { |
3547 | IL_WARN("Unsupported EEPROM version: 0x%04X\n", | 3526 | IL_WARN("Unsupported EEPROM version: 0x%04X\n", |
3548 | eeprom->version); | 3527 | eeprom->version); |
3549 | ret = -EINVAL; | 3528 | ret = -EINVAL; |
3550 | goto err; | 3529 | goto err; |
3551 | } | 3530 | } |
@@ -3578,7 +3557,8 @@ err: | |||
3578 | 3557 | ||
3579 | #define IL3945_MAX_PROBE_REQUEST 200 | 3558 | #define IL3945_MAX_PROBE_REQUEST 200 |
3580 | 3559 | ||
3581 | static int il3945_setup_mac(struct il_priv *il) | 3560 | static int |
3561 | il3945_setup_mac(struct il_priv *il) | ||
3582 | { | 3562 | { |
3583 | int ret; | 3563 | int ret; |
3584 | struct ieee80211_hw *hw = il->hw; | 3564 | struct ieee80211_hw *hw = il->hw; |
@@ -3588,15 +3568,13 @@ static int il3945_setup_mac(struct il_priv *il) | |||
3588 | hw->vif_data_size = sizeof(struct il_vif_priv); | 3568 | hw->vif_data_size = sizeof(struct il_vif_priv); |
3589 | 3569 | ||
3590 | /* Tell mac80211 our characteristics */ | 3570 | /* Tell mac80211 our characteristics */ |
3591 | hw->flags = IEEE80211_HW_SIGNAL_DBM | | 3571 | hw->flags = IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_SPECTRUM_MGMT; |
3592 | IEEE80211_HW_SPECTRUM_MGMT; | ||
3593 | 3572 | ||
3594 | hw->wiphy->interface_modes = | 3573 | hw->wiphy->interface_modes = il->ctx.interface_modes; |
3595 | il->ctx.interface_modes; | ||
3596 | 3574 | ||
3597 | hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY | | 3575 | hw->wiphy->flags |= |
3598 | WIPHY_FLAG_DISABLE_BEACON_HINTS | | 3576 | WIPHY_FLAG_CUSTOM_REGULATORY | WIPHY_FLAG_DISABLE_BEACON_HINTS | |
3599 | WIPHY_FLAG_IBSS_RSN; | 3577 | WIPHY_FLAG_IBSS_RSN; |
3600 | 3578 | ||
3601 | hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945; | 3579 | hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945; |
3602 | /* we create the 802.11 header and a zero-length SSID element */ | 3580 | /* we create the 802.11 header and a zero-length SSID element */ |
@@ -3607,11 +3585,11 @@ static int il3945_setup_mac(struct il_priv *il) | |||
3607 | 3585 | ||
3608 | if (il->bands[IEEE80211_BAND_2GHZ].n_channels) | 3586 | if (il->bands[IEEE80211_BAND_2GHZ].n_channels) |
3609 | il->hw->wiphy->bands[IEEE80211_BAND_2GHZ] = | 3587 | il->hw->wiphy->bands[IEEE80211_BAND_2GHZ] = |
3610 | &il->bands[IEEE80211_BAND_2GHZ]; | 3588 | &il->bands[IEEE80211_BAND_2GHZ]; |
3611 | 3589 | ||
3612 | if (il->bands[IEEE80211_BAND_5GHZ].n_channels) | 3590 | if (il->bands[IEEE80211_BAND_5GHZ].n_channels) |
3613 | il->hw->wiphy->bands[IEEE80211_BAND_5GHZ] = | 3591 | il->hw->wiphy->bands[IEEE80211_BAND_5GHZ] = |
3614 | &il->bands[IEEE80211_BAND_5GHZ]; | 3592 | &il->bands[IEEE80211_BAND_5GHZ]; |
3615 | 3593 | ||
3616 | il_leds_init(il); | 3594 | il_leds_init(il); |
3617 | 3595 | ||
@@ -3625,7 +3603,8 @@ static int il3945_setup_mac(struct il_priv *il) | |||
3625 | return 0; | 3603 | return 0; |
3626 | } | 3604 | } |
3627 | 3605 | ||
3628 | static int il3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | 3606 | static int |
3607 | il3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | ||
3629 | { | 3608 | { |
3630 | int err = 0; | 3609 | int err = 0; |
3631 | struct il_priv *il; | 3610 | struct il_priv *il; |
@@ -3660,8 +3639,7 @@ static int il3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *en | |||
3660 | il->ctx.ap_sta_id = IL_AP_ID; | 3639 | il->ctx.ap_sta_id = IL_AP_ID; |
3661 | il->ctx.wep_key_cmd = C_WEPKEY; | 3640 | il->ctx.wep_key_cmd = C_WEPKEY; |
3662 | il->ctx.interface_modes = | 3641 | il->ctx.interface_modes = |
3663 | BIT(NL80211_IFTYPE_STATION) | | 3642 | BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_ADHOC); |
3664 | BIT(NL80211_IFTYPE_ADHOC); | ||
3665 | il->ctx.ibss_devtype = RXON_DEV_TYPE_IBSS; | 3643 | il->ctx.ibss_devtype = RXON_DEV_TYPE_IBSS; |
3666 | il->ctx.station_devtype = RXON_DEV_TYPE_ESS; | 3644 | il->ctx.station_devtype = RXON_DEV_TYPE_ESS; |
3667 | il->ctx.unused_devtype = RXON_DEV_TYPE_ESS; | 3645 | il->ctx.unused_devtype = RXON_DEV_TYPE_ESS; |
@@ -3686,8 +3664,9 @@ static int il3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *en | |||
3686 | /*************************** | 3664 | /*************************** |
3687 | * 2. Initializing PCI bus | 3665 | * 2. Initializing PCI bus |
3688 | * *************************/ | 3666 | * *************************/ |
3689 | pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 | | 3667 | pci_disable_link_state(pdev, |
3690 | PCIE_LINK_STATE_CLKPM); | 3668 | PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 | |
3669 | PCIE_LINK_STATE_CLKPM); | ||
3691 | 3670 | ||
3692 | if (pci_enable_device(pdev)) { | 3671 | if (pci_enable_device(pdev)) { |
3693 | err = -ENODEV; | 3672 | err = -ENODEV; |
@@ -3719,7 +3698,7 @@ static int il3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *en | |||
3719 | } | 3698 | } |
3720 | 3699 | ||
3721 | D_INFO("pci_resource_len = 0x%08llx\n", | 3700 | D_INFO("pci_resource_len = 0x%08llx\n", |
3722 | (unsigned long long) pci_resource_len(pdev, 0)); | 3701 | (unsigned long long)pci_resource_len(pdev, 0)); |
3723 | D_INFO("pci_resource_base = %p\n", il->hw_base); | 3702 | D_INFO("pci_resource_base = %p\n", il->hw_base); |
3724 | 3703 | ||
3725 | /* We disable the RETRY_TIMEOUT register (0x41) to keep | 3704 | /* We disable the RETRY_TIMEOUT register (0x41) to keep |
@@ -3773,8 +3752,7 @@ static int il3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *en | |||
3773 | goto out_unset_hw_params; | 3752 | goto out_unset_hw_params; |
3774 | } | 3753 | } |
3775 | 3754 | ||
3776 | IL_INFO("Detected Intel Wireless WiFi Link %s\n", | 3755 | IL_INFO("Detected Intel Wireless WiFi Link %s\n", il->cfg->name); |
3777 | il->cfg->name); | ||
3778 | 3756 | ||
3779 | /*********************** | 3757 | /*********************** |
3780 | * 7. Setup Services | 3758 | * 7. Setup Services |
@@ -3786,8 +3764,7 @@ static int il3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *en | |||
3786 | 3764 | ||
3787 | pci_enable_msi(il->pci_dev); | 3765 | pci_enable_msi(il->pci_dev); |
3788 | 3766 | ||
3789 | err = request_irq(il->pci_dev->irq, il_isr, | 3767 | err = request_irq(il->pci_dev->irq, il_isr, IRQF_SHARED, DRV_NAME, il); |
3790 | IRQF_SHARED, DRV_NAME, il); | ||
3791 | if (err) { | 3768 | if (err) { |
3792 | IL_ERR("Error allocating IRQ %d\n", il->pci_dev->irq); | 3769 | IL_ERR("Error allocating IRQ %d\n", il->pci_dev->irq); |
3793 | goto out_disable_msi; | 3770 | goto out_disable_msi; |
@@ -3799,9 +3776,8 @@ static int il3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *en | |||
3799 | goto out_release_irq; | 3776 | goto out_release_irq; |
3800 | } | 3777 | } |
3801 | 3778 | ||
3802 | il_set_rxon_channel(il, | 3779 | il_set_rxon_channel(il, &il->bands[IEEE80211_BAND_2GHZ].channels[5], |
3803 | &il->bands[IEEE80211_BAND_2GHZ].channels[5], | 3780 | &il->ctx); |
3804 | &il->ctx); | ||
3805 | il3945_setup_deferred_work(il); | 3781 | il3945_setup_deferred_work(il); |
3806 | il3945_setup_handlers(il); | 3782 | il3945_setup_handlers(il); |
3807 | il_power_initialize(il); | 3783 | il_power_initialize(il); |
@@ -3814,47 +3790,48 @@ static int il3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *en | |||
3814 | 3790 | ||
3815 | err = il3945_setup_mac(il); | 3791 | err = il3945_setup_mac(il); |
3816 | if (err) | 3792 | if (err) |
3817 | goto out_remove_sysfs; | 3793 | goto out_remove_sysfs; |
3818 | 3794 | ||
3819 | err = il_dbgfs_register(il, DRV_NAME); | 3795 | err = il_dbgfs_register(il, DRV_NAME); |
3820 | if (err) | 3796 | if (err) |
3821 | IL_ERR("failed to create debugfs files. Ignoring error: %d\n", err); | 3797 | IL_ERR("failed to create debugfs files. Ignoring error: %d\n", |
3798 | err); | ||
3822 | 3799 | ||
3823 | /* Start monitoring the killswitch */ | 3800 | /* Start monitoring the killswitch */ |
3824 | queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll, | 3801 | queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll, 2 * HZ); |
3825 | 2 * HZ); | ||
3826 | 3802 | ||
3827 | return 0; | 3803 | return 0; |
3828 | 3804 | ||
3829 | out_remove_sysfs: | 3805 | out_remove_sysfs: |
3830 | destroy_workqueue(il->workqueue); | 3806 | destroy_workqueue(il->workqueue); |
3831 | il->workqueue = NULL; | 3807 | il->workqueue = NULL; |
3832 | sysfs_remove_group(&pdev->dev.kobj, &il3945_attribute_group); | 3808 | sysfs_remove_group(&pdev->dev.kobj, &il3945_attribute_group); |
3833 | out_release_irq: | 3809 | out_release_irq: |
3834 | free_irq(il->pci_dev->irq, il); | 3810 | free_irq(il->pci_dev->irq, il); |
3835 | out_disable_msi: | 3811 | out_disable_msi: |
3836 | pci_disable_msi(il->pci_dev); | 3812 | pci_disable_msi(il->pci_dev); |
3837 | il_free_geos(il); | 3813 | il_free_geos(il); |
3838 | il_free_channel_map(il); | 3814 | il_free_channel_map(il); |
3839 | out_unset_hw_params: | 3815 | out_unset_hw_params: |
3840 | il3945_unset_hw_params(il); | 3816 | il3945_unset_hw_params(il); |
3841 | out_eeprom_free: | 3817 | out_eeprom_free: |
3842 | il_eeprom_free(il); | 3818 | il_eeprom_free(il); |
3843 | out_iounmap: | 3819 | out_iounmap: |
3844 | pci_iounmap(pdev, il->hw_base); | 3820 | pci_iounmap(pdev, il->hw_base); |
3845 | out_pci_release_regions: | 3821 | out_pci_release_regions: |
3846 | pci_release_regions(pdev); | 3822 | pci_release_regions(pdev); |
3847 | out_pci_disable_device: | 3823 | out_pci_disable_device: |
3848 | pci_set_drvdata(pdev, NULL); | 3824 | pci_set_drvdata(pdev, NULL); |
3849 | pci_disable_device(pdev); | 3825 | pci_disable_device(pdev); |
3850 | out_ieee80211_free_hw: | 3826 | out_ieee80211_free_hw: |
3851 | il_free_traffic_mem(il); | 3827 | il_free_traffic_mem(il); |
3852 | ieee80211_free_hw(il->hw); | 3828 | ieee80211_free_hw(il->hw); |
3853 | out: | 3829 | out: |
3854 | return err; | 3830 | return err; |
3855 | } | 3831 | } |
3856 | 3832 | ||
3857 | static void __devexit il3945_pci_remove(struct pci_dev *pdev) | 3833 | static void __devexit |
3834 | il3945_pci_remove(struct pci_dev *pdev) | ||
3858 | { | 3835 | { |
3859 | struct il_priv *il = pci_get_drvdata(pdev); | 3836 | struct il_priv *il = pci_get_drvdata(pdev); |
3860 | unsigned long flags; | 3837 | unsigned long flags; |
@@ -3934,7 +3911,6 @@ static void __devexit il3945_pci_remove(struct pci_dev *pdev) | |||
3934 | ieee80211_free_hw(il->hw); | 3911 | ieee80211_free_hw(il->hw); |
3935 | } | 3912 | } |
3936 | 3913 | ||
3937 | |||
3938 | /***************************************************************************** | 3914 | /***************************************************************************** |
3939 | * | 3915 | * |
3940 | * driver and module entry point | 3916 | * driver and module entry point |
@@ -3949,7 +3925,8 @@ static struct pci_driver il3945_driver = { | |||
3949 | .driver.pm = IL_LEGACY_PM_OPS, | 3925 | .driver.pm = IL_LEGACY_PM_OPS, |
3950 | }; | 3926 | }; |
3951 | 3927 | ||
3952 | static int __init il3945_init(void) | 3928 | static int __init |
3929 | il3945_init(void) | ||
3953 | { | 3930 | { |
3954 | 3931 | ||
3955 | int ret; | 3932 | int ret; |
@@ -3975,7 +3952,8 @@ error_register: | |||
3975 | return ret; | 3952 | return ret; |
3976 | } | 3953 | } |
3977 | 3954 | ||
3978 | static void __exit il3945_exit(void) | 3955 | static void __exit |
3956 | il3945_exit(void) | ||
3979 | { | 3957 | { |
3980 | pci_unregister_driver(&il3945_driver); | 3958 | pci_unregister_driver(&il3945_driver); |
3981 | il3945_rate_control_unregister(); | 3959 | il3945_rate_control_unregister(); |
@@ -3986,10 +3964,9 @@ MODULE_FIRMWARE(IL3945_MODULE_FIRMWARE(IL3945_UCODE_API_MAX)); | |||
3986 | module_param_named(antenna, il3945_mod_params.antenna, int, S_IRUGO); | 3964 | module_param_named(antenna, il3945_mod_params.antenna, int, S_IRUGO); |
3987 | MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])"); | 3965 | MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])"); |
3988 | module_param_named(swcrypto, il3945_mod_params.sw_crypto, int, S_IRUGO); | 3966 | module_param_named(swcrypto, il3945_mod_params.sw_crypto, int, S_IRUGO); |
3989 | MODULE_PARM_DESC(swcrypto, | 3967 | MODULE_PARM_DESC(swcrypto, "using software crypto (default 1 [software])"); |
3990 | "using software crypto (default 1 [software])"); | 3968 | module_param_named(disable_hw_scan, il3945_mod_params.disable_hw_scan, int, |
3991 | module_param_named(disable_hw_scan, il3945_mod_params.disable_hw_scan, | 3969 | S_IRUGO); |
3992 | int, S_IRUGO); | ||
3993 | MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 1)"); | 3970 | MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 1)"); |
3994 | #ifdef CONFIG_IWLEGACY_DEBUG | 3971 | #ifdef CONFIG_IWLEGACY_DEBUG |
3995 | module_param_named(debug, il_debug_level, uint, S_IRUGO | S_IWUSR); | 3972 | module_param_named(debug, il_debug_level, uint, S_IRUGO | S_IWUSR); |
diff --git a/drivers/net/wireless/iwlegacy/3945-rs.c b/drivers/net/wireless/iwlegacy/3945-rs.c index dc0dfdd520ab..3420b1c0ee0c 100644 --- a/drivers/net/wireless/iwlegacy/3945-rs.c +++ b/drivers/net/wireless/iwlegacy/3945-rs.c | |||
@@ -97,7 +97,8 @@ static struct il3945_tpt_entry il3945_tpt_table_g[] = { | |||
97 | #define RATE_DECREASE_TH 1920 | 97 | #define RATE_DECREASE_TH 1920 |
98 | #define RATE_RETRY_TH 15 | 98 | #define RATE_RETRY_TH 15 |
99 | 99 | ||
100 | static u8 il3945_get_rate_idx_by_rssi(s32 rssi, enum ieee80211_band band) | 100 | static u8 |
101 | il3945_get_rate_idx_by_rssi(s32 rssi, enum ieee80211_band band) | ||
101 | { | 102 | { |
102 | u32 idx = 0; | 103 | u32 idx = 0; |
103 | u32 table_size = 0; | 104 | u32 table_size = 0; |
@@ -130,7 +131,8 @@ static u8 il3945_get_rate_idx_by_rssi(s32 rssi, enum ieee80211_band band) | |||
130 | return tpt_table[idx].idx; | 131 | return tpt_table[idx].idx; |
131 | } | 132 | } |
132 | 133 | ||
133 | static void il3945_clear_win(struct il3945_rate_scale_data *win) | 134 | static void |
135 | il3945_clear_win(struct il3945_rate_scale_data *win) | ||
134 | { | 136 | { |
135 | win->data = 0; | 137 | win->data = 0; |
136 | win->success_counter = 0; | 138 | win->success_counter = 0; |
@@ -147,7 +149,8 @@ static void il3945_clear_win(struct il3945_rate_scale_data *win) | |||
147 | * not flushed. If there were any that were not flushed, then | 149 | * not flushed. If there were any that were not flushed, then |
148 | * reschedule the rate flushing routine. | 150 | * reschedule the rate flushing routine. |
149 | */ | 151 | */ |
150 | static int il3945_rate_scale_flush_wins(struct il3945_rs_sta *rs_sta) | 152 | static int |
153 | il3945_rate_scale_flush_wins(struct il3945_rs_sta *rs_sta) | ||
151 | { | 154 | { |
152 | int unflushed = 0; | 155 | int unflushed = 0; |
153 | int i; | 156 | int i; |
@@ -164,11 +167,9 @@ static int il3945_rate_scale_flush_wins(struct il3945_rs_sta *rs_sta) | |||
164 | continue; | 167 | continue; |
165 | 168 | ||
166 | spin_lock_irqsave(&rs_sta->lock, flags); | 169 | spin_lock_irqsave(&rs_sta->lock, flags); |
167 | if (time_after(jiffies, rs_sta->win[i].stamp + | 170 | if (time_after(jiffies, rs_sta->win[i].stamp + RATE_WIN_FLUSH)) { |
168 | RATE_WIN_FLUSH)) { | 171 | D_RATE("flushing %d samples of rate " "idx %d\n", |
169 | D_RATE("flushing %d samples of rate " | 172 | rs_sta->win[i].counter, i); |
170 | "idx %d\n", | ||
171 | rs_sta->win[i].counter, i); | ||
172 | il3945_clear_win(&rs_sta->win[i]); | 173 | il3945_clear_win(&rs_sta->win[i]); |
173 | } else | 174 | } else |
174 | unflushed++; | 175 | unflushed++; |
@@ -182,7 +183,8 @@ static int il3945_rate_scale_flush_wins(struct il3945_rs_sta *rs_sta) | |||
182 | #define RATE_FLUSH_MIN 50 /* msec */ | 183 | #define RATE_FLUSH_MIN 50 /* msec */ |
183 | #define IL_AVERAGE_PACKETS 1500 | 184 | #define IL_AVERAGE_PACKETS 1500 |
184 | 185 | ||
185 | static void il3945_bg_rate_scale_flush(unsigned long data) | 186 | static void |
187 | il3945_bg_rate_scale_flush(unsigned long data) | ||
186 | { | 188 | { |
187 | struct il3945_rs_sta *rs_sta = (void *)data; | 189 | struct il3945_rs_sta *rs_sta = (void *)data; |
188 | struct il_priv *il __maybe_unused = rs_sta->il; | 190 | struct il_priv *il __maybe_unused = rs_sta->il; |
@@ -205,8 +207,7 @@ static void il3945_bg_rate_scale_flush(unsigned long data) | |||
205 | duration = | 207 | duration = |
206 | jiffies_to_msecs(jiffies - rs_sta->last_partial_flush); | 208 | jiffies_to_msecs(jiffies - rs_sta->last_partial_flush); |
207 | 209 | ||
208 | D_RATE("Tx'd %d packets in %dms\n", | 210 | D_RATE("Tx'd %d packets in %dms\n", packet_count, duration); |
209 | packet_count, duration); | ||
210 | 211 | ||
211 | /* Determine packets per second */ | 212 | /* Determine packets per second */ |
212 | if (duration) | 213 | if (duration) |
@@ -225,11 +226,11 @@ static void il3945_bg_rate_scale_flush(unsigned long data) | |||
225 | 226 | ||
226 | rs_sta->flush_time = msecs_to_jiffies(duration); | 227 | rs_sta->flush_time = msecs_to_jiffies(duration); |
227 | 228 | ||
228 | D_RATE("new flush period: %d msec ave %d\n", | 229 | D_RATE("new flush period: %d msec ave %d\n", duration, |
229 | duration, packet_count); | 230 | packet_count); |
230 | 231 | ||
231 | mod_timer(&rs_sta->rate_scale_flush, jiffies + | 232 | mod_timer(&rs_sta->rate_scale_flush, |
232 | rs_sta->flush_time); | 233 | jiffies + rs_sta->flush_time); |
233 | 234 | ||
234 | rs_sta->last_partial_flush = jiffies; | 235 | rs_sta->last_partial_flush = jiffies; |
235 | } else { | 236 | } else { |
@@ -253,9 +254,10 @@ static void il3945_bg_rate_scale_flush(unsigned long data) | |||
253 | * at this rate. win->data contains the bitmask of successful | 254 | * at this rate. win->data contains the bitmask of successful |
254 | * packets. | 255 | * packets. |
255 | */ | 256 | */ |
256 | static void il3945_collect_tx_data(struct il3945_rs_sta *rs_sta, | 257 | static void |
257 | struct il3945_rate_scale_data *win, | 258 | il3945_collect_tx_data(struct il3945_rs_sta *rs_sta, |
258 | int success, int retries, int idx) | 259 | struct il3945_rate_scale_data *win, int success, |
260 | int retries, int idx) | ||
259 | { | 261 | { |
260 | unsigned long flags; | 262 | unsigned long flags; |
261 | s32 fail_count; | 263 | s32 fail_count; |
@@ -306,8 +308,8 @@ static void il3945_collect_tx_data(struct il3945_rs_sta *rs_sta, | |||
306 | 308 | ||
307 | /* Calculate current success ratio, avoid divide-by-0! */ | 309 | /* Calculate current success ratio, avoid divide-by-0! */ |
308 | if (win->counter > 0) | 310 | if (win->counter > 0) |
309 | win->success_ratio = 128 * (100 * win->success_counter) | 311 | win->success_ratio = |
310 | / win->counter; | 312 | 128 * (100 * win->success_counter) / win->counter; |
311 | else | 313 | else |
312 | win->success_ratio = IL_INVALID_VALUE; | 314 | win->success_ratio = IL_INVALID_VALUE; |
313 | 315 | ||
@@ -316,8 +318,9 @@ static void il3945_collect_tx_data(struct il3945_rs_sta *rs_sta, | |||
316 | /* Calculate average throughput, if we have enough history. */ | 318 | /* Calculate average throughput, if we have enough history. */ |
317 | if (fail_count >= RATE_MIN_FAILURE_TH || | 319 | if (fail_count >= RATE_MIN_FAILURE_TH || |
318 | win->success_counter >= RATE_MIN_SUCCESS_TH) | 320 | win->success_counter >= RATE_MIN_SUCCESS_TH) |
319 | win->average_tpt = ((win->success_ratio * | 321 | win->average_tpt = |
320 | rs_sta->expected_tpt[idx] + 64) / 128); | 322 | ((win->success_ratio * rs_sta->expected_tpt[idx] + |
323 | 64) / 128); | ||
321 | else | 324 | else |
322 | win->average_tpt = IL_INVALID_VALUE; | 325 | win->average_tpt = IL_INVALID_VALUE; |
323 | 326 | ||
@@ -331,7 +334,8 @@ static void il3945_collect_tx_data(struct il3945_rs_sta *rs_sta, | |||
331 | /* | 334 | /* |
332 | * Called after adding a new station to initialize rate scaling | 335 | * Called after adding a new station to initialize rate scaling |
333 | */ | 336 | */ |
334 | void il3945_rs_rate_init(struct il_priv *il, struct ieee80211_sta *sta, u8 sta_id) | 337 | void |
338 | il3945_rs_rate_init(struct il_priv *il, struct ieee80211_sta *sta, u8 sta_id) | ||
335 | { | 339 | { |
336 | struct ieee80211_hw *hw = il->hw; | 340 | struct ieee80211_hw *hw = il->hw; |
337 | struct ieee80211_conf *conf = &il->hw->conf; | 341 | struct ieee80211_conf *conf = &il->hw->conf; |
@@ -344,7 +348,7 @@ void il3945_rs_rate_init(struct il_priv *il, struct ieee80211_sta *sta, u8 sta_i | |||
344 | if (sta_id == il->ctx.bcast_sta_id) | 348 | if (sta_id == il->ctx.bcast_sta_id) |
345 | goto out; | 349 | goto out; |
346 | 350 | ||
347 | psta = (struct il3945_sta_priv *) sta->drv_priv; | 351 | psta = (struct il3945_sta_priv *)sta->drv_priv; |
348 | rs_sta = &psta->rs_sta; | 352 | rs_sta = &psta->rs_sta; |
349 | sband = hw->wiphy->bands[conf->channel->band]; | 353 | sband = hw->wiphy->bands[conf->channel->band]; |
350 | 354 | ||
@@ -382,8 +386,8 @@ void il3945_rs_rate_init(struct il_priv *il, struct ieee80211_sta *sta, u8 sta_i | |||
382 | /* For 5 GHz band it start at IL_FIRST_OFDM_RATE */ | 386 | /* For 5 GHz band it start at IL_FIRST_OFDM_RATE */ |
383 | if (sband->band == IEEE80211_BAND_5GHZ) { | 387 | if (sband->band == IEEE80211_BAND_5GHZ) { |
384 | rs_sta->last_txrate_idx += IL_FIRST_OFDM_RATE; | 388 | rs_sta->last_txrate_idx += IL_FIRST_OFDM_RATE; |
385 | il->_3945.sta_supp_rates = il->_3945.sta_supp_rates << | 389 | il->_3945.sta_supp_rates = |
386 | IL_FIRST_OFDM_RATE; | 390 | il->_3945.sta_supp_rates << IL_FIRST_OFDM_RATE; |
387 | } | 391 | } |
388 | 392 | ||
389 | out: | 393 | out: |
@@ -392,21 +396,24 @@ out: | |||
392 | D_INFO("leave\n"); | 396 | D_INFO("leave\n"); |
393 | } | 397 | } |
394 | 398 | ||
395 | static void *il3945_rs_alloc(struct ieee80211_hw *hw, struct dentry *debugfsdir) | 399 | static void * |
400 | il3945_rs_alloc(struct ieee80211_hw *hw, struct dentry *debugfsdir) | ||
396 | { | 401 | { |
397 | return hw->priv; | 402 | return hw->priv; |
398 | } | 403 | } |
399 | 404 | ||
400 | /* rate scale requires free function to be implemented */ | 405 | /* rate scale requires free function to be implemented */ |
401 | static void il3945_rs_free(void *il) | 406 | static void |
407 | il3945_rs_free(void *il) | ||
402 | { | 408 | { |
403 | return; | 409 | return; |
404 | } | 410 | } |
405 | 411 | ||
406 | static void *il3945_rs_alloc_sta(void *il_priv, struct ieee80211_sta *sta, gfp_t gfp) | 412 | static void * |
413 | il3945_rs_alloc_sta(void *il_priv, struct ieee80211_sta *sta, gfp_t gfp) | ||
407 | { | 414 | { |
408 | struct il3945_rs_sta *rs_sta; | 415 | struct il3945_rs_sta *rs_sta; |
409 | struct il3945_sta_priv *psta = (void *) sta->drv_priv; | 416 | struct il3945_sta_priv *psta = (void *)sta->drv_priv; |
410 | struct il_priv *il __maybe_unused = il_priv; | 417 | struct il_priv *il __maybe_unused = il_priv; |
411 | 418 | ||
412 | D_RATE("enter\n"); | 419 | D_RATE("enter\n"); |
@@ -421,8 +428,8 @@ static void *il3945_rs_alloc_sta(void *il_priv, struct ieee80211_sta *sta, gfp_t | |||
421 | return rs_sta; | 428 | return rs_sta; |
422 | } | 429 | } |
423 | 430 | ||
424 | static void il3945_rs_free_sta(void *il_priv, struct ieee80211_sta *sta, | 431 | static void |
425 | void *il_sta) | 432 | il3945_rs_free_sta(void *il_priv, struct ieee80211_sta *sta, void *il_sta) |
426 | { | 433 | { |
427 | struct il3945_rs_sta *rs_sta = il_sta; | 434 | struct il3945_rs_sta *rs_sta = il_sta; |
428 | 435 | ||
@@ -434,16 +441,16 @@ static void il3945_rs_free_sta(void *il_priv, struct ieee80211_sta *sta, | |||
434 | del_timer_sync(&rs_sta->rate_scale_flush); | 441 | del_timer_sync(&rs_sta->rate_scale_flush); |
435 | } | 442 | } |
436 | 443 | ||
437 | |||
438 | /** | 444 | /** |
439 | * il3945_rs_tx_status - Update rate control values based on Tx results | 445 | * il3945_rs_tx_status - Update rate control values based on Tx results |
440 | * | 446 | * |
441 | * NOTE: Uses il_priv->retry_rate for the # of retries attempted by | 447 | * NOTE: Uses il_priv->retry_rate for the # of retries attempted by |
442 | * the hardware for each rate. | 448 | * the hardware for each rate. |
443 | */ | 449 | */ |
444 | static void il3945_rs_tx_status(void *il_rate, struct ieee80211_supported_band *sband, | 450 | static void |
445 | struct ieee80211_sta *sta, void *il_sta, | 451 | il3945_rs_tx_status(void *il_rate, struct ieee80211_supported_band *sband, |
446 | struct sk_buff *skb) | 452 | struct ieee80211_sta *sta, void *il_sta, |
453 | struct sk_buff *skb) | ||
447 | { | 454 | { |
448 | s8 retries = 0, current_count; | 455 | s8 retries = 0, current_count; |
449 | int scale_rate_idx, first_idx, last_idx; | 456 | int scale_rate_idx, first_idx, last_idx; |
@@ -476,7 +483,6 @@ static void il3945_rs_tx_status(void *il_rate, struct ieee80211_supported_band * | |||
476 | return; | 483 | return; |
477 | } | 484 | } |
478 | 485 | ||
479 | |||
480 | rs_sta->tx_packets++; | 486 | rs_sta->tx_packets++; |
481 | 487 | ||
482 | scale_rate_idx = first_idx; | 488 | scale_rate_idx = first_idx; |
@@ -498,32 +504,27 @@ static void il3945_rs_tx_status(void *il_rate, struct ieee80211_supported_band * | |||
498 | last_idx = scale_rate_idx; | 504 | last_idx = scale_rate_idx; |
499 | } else { | 505 | } else { |
500 | current_count = il->retry_rate; | 506 | current_count = il->retry_rate; |
501 | last_idx = il3945_rs_next_rate(il, | 507 | last_idx = il3945_rs_next_rate(il, scale_rate_idx); |
502 | scale_rate_idx); | ||
503 | } | 508 | } |
504 | 509 | ||
505 | /* Update this rate accounting for as many retries | 510 | /* Update this rate accounting for as many retries |
506 | * as was used for it (per current_count) */ | 511 | * as was used for it (per current_count) */ |
507 | il3945_collect_tx_data(rs_sta, | 512 | il3945_collect_tx_data(rs_sta, &rs_sta->win[scale_rate_idx], 0, |
508 | &rs_sta->win[scale_rate_idx], | 513 | current_count, scale_rate_idx); |
509 | 0, current_count, scale_rate_idx); | 514 | D_RATE("Update rate %d for %d retries.\n", scale_rate_idx, |
510 | D_RATE("Update rate %d for %d retries.\n", | 515 | current_count); |
511 | scale_rate_idx, current_count); | ||
512 | 516 | ||
513 | retries -= current_count; | 517 | retries -= current_count; |
514 | 518 | ||
515 | scale_rate_idx = last_idx; | 519 | scale_rate_idx = last_idx; |
516 | } | 520 | } |
517 | 521 | ||
518 | |||
519 | /* Update the last idx win with success/failure based on ACK */ | 522 | /* Update the last idx win with success/failure based on ACK */ |
520 | D_RATE("Update rate %d with %s.\n", | 523 | D_RATE("Update rate %d with %s.\n", last_idx, |
521 | last_idx, | 524 | (info->flags & IEEE80211_TX_STAT_ACK) ? "success" : "failure"); |
522 | (info->flags & IEEE80211_TX_STAT_ACK) ? | 525 | il3945_collect_tx_data(rs_sta, &rs_sta->win[last_idx], |
523 | "success" : "failure"); | 526 | info->flags & IEEE80211_TX_STAT_ACK, 1, |
524 | il3945_collect_tx_data(rs_sta, | 527 | last_idx); |
525 | &rs_sta->win[last_idx], | ||
526 | info->flags & IEEE80211_TX_STAT_ACK, 1, last_idx); | ||
527 | 528 | ||
528 | /* We updated the rate scale win -- if its been more than | 529 | /* We updated the rate scale win -- if its been more than |
529 | * flush_time since the last run, schedule the flush | 530 | * flush_time since the last run, schedule the flush |
@@ -531,8 +532,7 @@ static void il3945_rs_tx_status(void *il_rate, struct ieee80211_supported_band * | |||
531 | spin_lock_irqsave(&rs_sta->lock, flags); | 532 | spin_lock_irqsave(&rs_sta->lock, flags); |
532 | 533 | ||
533 | if (!rs_sta->flush_pending && | 534 | if (!rs_sta->flush_pending && |
534 | time_after(jiffies, rs_sta->last_flush + | 535 | time_after(jiffies, rs_sta->last_flush + rs_sta->flush_time)) { |
535 | rs_sta->flush_time)) { | ||
536 | 536 | ||
537 | rs_sta->last_partial_flush = jiffies; | 537 | rs_sta->last_partial_flush = jiffies; |
538 | rs_sta->flush_pending = 1; | 538 | rs_sta->flush_pending = 1; |
@@ -545,8 +545,9 @@ static void il3945_rs_tx_status(void *il_rate, struct ieee80211_supported_band * | |||
545 | D_RATE("leave\n"); | 545 | D_RATE("leave\n"); |
546 | } | 546 | } |
547 | 547 | ||
548 | static u16 il3945_get_adjacent_rate(struct il3945_rs_sta *rs_sta, | 548 | static u16 |
549 | u8 idx, u16 rate_mask, enum ieee80211_band band) | 549 | il3945_get_adjacent_rate(struct il3945_rs_sta *rs_sta, u8 idx, u16 rate_mask, |
550 | enum ieee80211_band band) | ||
550 | { | 551 | { |
551 | u8 high = RATE_INVALID; | 552 | u8 high = RATE_INVALID; |
552 | u8 low = RATE_INVALID; | 553 | u8 low = RATE_INVALID; |
@@ -569,8 +570,7 @@ static u16 il3945_get_adjacent_rate(struct il3945_rs_sta *rs_sta, | |||
569 | 570 | ||
570 | /* Find the next rate that is in the rate mask */ | 571 | /* Find the next rate that is in the rate mask */ |
571 | i = idx + 1; | 572 | i = idx + 1; |
572 | for (mask = (1 << i); i < RATE_COUNT_3945; | 573 | for (mask = (1 << i); i < RATE_COUNT_3945; i++, mask <<= 1) { |
573 | i++, mask <<= 1) { | ||
574 | if (rate_mask & mask) { | 574 | if (rate_mask & mask) { |
575 | high = i; | 575 | high = i; |
576 | break; | 576 | break; |
@@ -625,8 +625,9 @@ static u16 il3945_get_adjacent_rate(struct il3945_rs_sta *rs_sta, | |||
625 | * rate table and must reference the driver allocated rate table | 625 | * rate table and must reference the driver allocated rate table |
626 | * | 626 | * |
627 | */ | 627 | */ |
628 | static void il3945_rs_get_rate(void *il_r, struct ieee80211_sta *sta, | 628 | static void |
629 | void *il_sta, struct ieee80211_tx_rate_control *txrc) | 629 | il3945_rs_get_rate(void *il_r, struct ieee80211_sta *sta, void *il_sta, |
630 | struct ieee80211_tx_rate_control *txrc) | ||
630 | { | 631 | { |
631 | struct ieee80211_supported_band *sband = txrc->sband; | 632 | struct ieee80211_supported_band *sband = txrc->sband; |
632 | struct sk_buff *skb = txrc->skb; | 633 | struct sk_buff *skb = txrc->skb; |
@@ -679,7 +680,7 @@ static void il3945_rs_get_rate(void *il_r, struct ieee80211_sta *sta, | |||
679 | */ | 680 | */ |
680 | if (rs_sta->start_rate != RATE_INVALID) { | 681 | if (rs_sta->start_rate != RATE_INVALID) { |
681 | if (rs_sta->start_rate < idx && | 682 | if (rs_sta->start_rate < idx && |
682 | (rate_mask & (1 << rs_sta->start_rate))) | 683 | (rate_mask & (1 << rs_sta->start_rate))) |
683 | idx = rs_sta->start_rate; | 684 | idx = rs_sta->start_rate; |
684 | rs_sta->start_rate = RATE_INVALID; | 685 | rs_sta->start_rate = RATE_INVALID; |
685 | } | 686 | } |
@@ -699,14 +700,12 @@ static void il3945_rs_get_rate(void *il_r, struct ieee80211_sta *sta, | |||
699 | spin_unlock_irqrestore(&rs_sta->lock, flags); | 700 | spin_unlock_irqrestore(&rs_sta->lock, flags); |
700 | 701 | ||
701 | D_RATE("Invalid average_tpt on rate %d: " | 702 | D_RATE("Invalid average_tpt on rate %d: " |
702 | "counter: %d, success_counter: %d, " | 703 | "counter: %d, success_counter: %d, " |
703 | "expected_tpt is %sNULL\n", | 704 | "expected_tpt is %sNULL\n", idx, win->counter, |
704 | idx, | 705 | win->success_counter, |
705 | win->counter, | 706 | rs_sta->expected_tpt ? "not " : ""); |
706 | win->success_counter, | 707 | |
707 | rs_sta->expected_tpt ? "not " : ""); | 708 | /* Can't calculate this yet; not enough history */ |
708 | |||
709 | /* Can't calculate this yet; not enough history */ | ||
710 | win->average_tpt = IL_INVALID_VALUE; | 709 | win->average_tpt = IL_INVALID_VALUE; |
711 | goto out; | 710 | goto out; |
712 | 711 | ||
@@ -714,8 +713,8 @@ static void il3945_rs_get_rate(void *il_r, struct ieee80211_sta *sta, | |||
714 | 713 | ||
715 | current_tpt = win->average_tpt; | 714 | current_tpt = win->average_tpt; |
716 | 715 | ||
717 | high_low = il3945_get_adjacent_rate(rs_sta, idx, rate_mask, | 716 | high_low = |
718 | sband->band); | 717 | il3945_get_adjacent_rate(rs_sta, idx, rate_mask, sband->band); |
719 | low = high_low & 0xff; | 718 | low = high_low & 0xff; |
720 | high = (high_low >> 8) & 0xff; | 719 | high = (high_low >> 8) & 0xff; |
721 | 720 | ||
@@ -738,46 +737,42 @@ static void il3945_rs_get_rate(void *il_r, struct ieee80211_sta *sta, | |||
738 | if (win->success_ratio < RATE_DECREASE_TH || !current_tpt) { | 737 | if (win->success_ratio < RATE_DECREASE_TH || !current_tpt) { |
739 | D_RATE("decrease rate because of low success_ratio\n"); | 738 | D_RATE("decrease rate because of low success_ratio\n"); |
740 | scale_action = -1; | 739 | scale_action = -1; |
741 | /* No throughput measured yet for adjacent rates, | 740 | /* No throughput measured yet for adjacent rates, |
742 | * try increase */ | 741 | * try increase */ |
743 | } else if (low_tpt == IL_INVALID_VALUE && | 742 | } else if (low_tpt == IL_INVALID_VALUE && high_tpt == IL_INVALID_VALUE) { |
744 | high_tpt == IL_INVALID_VALUE) { | ||
745 | 743 | ||
746 | if (high != RATE_INVALID && win->success_ratio >= RATE_INCREASE_TH) | 744 | if (high != RATE_INVALID && |
745 | win->success_ratio >= RATE_INCREASE_TH) | ||
747 | scale_action = 1; | 746 | scale_action = 1; |
748 | else if (low != RATE_INVALID) | 747 | else if (low != RATE_INVALID) |
749 | scale_action = 0; | 748 | scale_action = 0; |
750 | 749 | ||
751 | /* Both adjacent throughputs are measured, but neither one has | 750 | /* Both adjacent throughputs are measured, but neither one has |
752 | * better throughput; we're using the best rate, don't change | 751 | * better throughput; we're using the best rate, don't change |
753 | * it! */ | 752 | * it! */ |
754 | } else if (low_tpt != IL_INVALID_VALUE && | 753 | } else if (low_tpt != IL_INVALID_VALUE && high_tpt != IL_INVALID_VALUE |
755 | high_tpt != IL_INVALID_VALUE && | 754 | && low_tpt < current_tpt && high_tpt < current_tpt) { |
756 | low_tpt < current_tpt && high_tpt < current_tpt) { | ||
757 | 755 | ||
758 | D_RATE("No action -- low [%d] & high [%d] < " | 756 | D_RATE("No action -- low [%d] & high [%d] < " |
759 | "current_tpt [%d]\n", | 757 | "current_tpt [%d]\n", low_tpt, high_tpt, current_tpt); |
760 | low_tpt, high_tpt, current_tpt); | ||
761 | scale_action = 0; | 758 | scale_action = 0; |
762 | 759 | ||
763 | /* At least one of the rates has better throughput */ | 760 | /* At least one of the rates has better throughput */ |
764 | } else { | 761 | } else { |
765 | if (high_tpt != IL_INVALID_VALUE) { | 762 | if (high_tpt != IL_INVALID_VALUE) { |
766 | 763 | ||
767 | /* High rate has better throughput, Increase | 764 | /* High rate has better throughput, Increase |
768 | * rate */ | 765 | * rate */ |
769 | if (high_tpt > current_tpt && | 766 | if (high_tpt > current_tpt && |
770 | win->success_ratio >= RATE_INCREASE_TH) | 767 | win->success_ratio >= RATE_INCREASE_TH) |
771 | scale_action = 1; | 768 | scale_action = 1; |
772 | else { | 769 | else { |
773 | D_RATE( | 770 | D_RATE("decrease rate because of high tpt\n"); |
774 | "decrease rate because of high tpt\n"); | ||
775 | scale_action = 0; | 771 | scale_action = 0; |
776 | } | 772 | } |
777 | } else if (low_tpt != IL_INVALID_VALUE) { | 773 | } else if (low_tpt != IL_INVALID_VALUE) { |
778 | if (low_tpt > current_tpt) { | 774 | if (low_tpt > current_tpt) { |
779 | D_RATE( | 775 | D_RATE("decrease rate because of low tpt\n"); |
780 | "decrease rate because of low tpt\n"); | ||
781 | scale_action = -1; | 776 | scale_action = -1; |
782 | } else if (win->success_ratio >= RATE_INCREASE_TH) { | 777 | } else if (win->success_ratio >= RATE_INCREASE_TH) { |
783 | /* Lower rate has better | 778 | /* Lower rate has better |
@@ -815,10 +810,10 @@ static void il3945_rs_get_rate(void *il_r, struct ieee80211_sta *sta, | |||
815 | break; | 810 | break; |
816 | } | 811 | } |
817 | 812 | ||
818 | D_RATE("Selected %d (action %d) - low %d high %d\n", | 813 | D_RATE("Selected %d (action %d) - low %d high %d\n", idx, scale_action, |
819 | idx, scale_action, low, high); | 814 | low, high); |
820 | 815 | ||
821 | out: | 816 | out: |
822 | 817 | ||
823 | if (sband->band == IEEE80211_BAND_5GHZ) { | 818 | if (sband->band == IEEE80211_BAND_5GHZ) { |
824 | if (WARN_ON_ONCE(idx < IL_FIRST_OFDM_RATE)) | 819 | if (WARN_ON_ONCE(idx < IL_FIRST_OFDM_RATE)) |
@@ -834,15 +829,16 @@ static void il3945_rs_get_rate(void *il_r, struct ieee80211_sta *sta, | |||
834 | } | 829 | } |
835 | 830 | ||
836 | #ifdef CONFIG_MAC80211_DEBUGFS | 831 | #ifdef CONFIG_MAC80211_DEBUGFS |
837 | static int il3945_open_file_generic(struct inode *inode, struct file *file) | 832 | static int |
833 | il3945_open_file_generic(struct inode *inode, struct file *file) | ||
838 | { | 834 | { |
839 | file->private_data = inode->i_private; | 835 | file->private_data = inode->i_private; |
840 | return 0; | 836 | return 0; |
841 | } | 837 | } |
842 | 838 | ||
843 | static ssize_t il3945_sta_dbgfs_stats_table_read(struct file *file, | 839 | static ssize_t |
844 | char __user *user_buf, | 840 | il3945_sta_dbgfs_stats_table_read(struct file *file, char __user * user_buf, |
845 | size_t count, loff_t *ppos) | 841 | size_t count, loff_t * ppos) |
846 | { | 842 | { |
847 | char *buff; | 843 | char *buff; |
848 | int desc = 0; | 844 | int desc = 0; |
@@ -854,17 +850,18 @@ static ssize_t il3945_sta_dbgfs_stats_table_read(struct file *file, | |||
854 | if (!buff) | 850 | if (!buff) |
855 | return -ENOMEM; | 851 | return -ENOMEM; |
856 | 852 | ||
857 | desc += sprintf(buff + desc, "tx packets=%d last rate idx=%d\n" | 853 | desc += |
858 | "rate=0x%X flush time %d\n", | 854 | sprintf(buff + desc, |
859 | lq_sta->tx_packets, | 855 | "tx packets=%d last rate idx=%d\n" |
860 | lq_sta->last_txrate_idx, | 856 | "rate=0x%X flush time %d\n", lq_sta->tx_packets, |
861 | lq_sta->start_rate, jiffies_to_msecs(lq_sta->flush_time)); | 857 | lq_sta->last_txrate_idx, lq_sta->start_rate, |
858 | jiffies_to_msecs(lq_sta->flush_time)); | ||
862 | for (j = 0; j < RATE_COUNT_3945; j++) { | 859 | for (j = 0; j < RATE_COUNT_3945; j++) { |
863 | desc += sprintf(buff+desc, | 860 | desc += |
864 | "counter=%d success=%d %%=%d\n", | 861 | sprintf(buff + desc, "counter=%d success=%d %%=%d\n", |
865 | lq_sta->win[j].counter, | 862 | lq_sta->win[j].counter, |
866 | lq_sta->win[j].success_counter, | 863 | lq_sta->win[j].success_counter, |
867 | lq_sta->win[j].success_ratio); | 864 | lq_sta->win[j].success_ratio); |
868 | } | 865 | } |
869 | ret = simple_read_from_buffer(user_buf, count, ppos, buff, desc); | 866 | ret = simple_read_from_buffer(user_buf, count, ppos, buff, desc); |
870 | kfree(buff); | 867 | kfree(buff); |
@@ -877,18 +874,19 @@ static const struct file_operations rs_sta_dbgfs_stats_table_ops = { | |||
877 | .llseek = default_llseek, | 874 | .llseek = default_llseek, |
878 | }; | 875 | }; |
879 | 876 | ||
880 | static void il3945_add_debugfs(void *il, void *il_sta, | 877 | static void |
881 | struct dentry *dir) | 878 | il3945_add_debugfs(void *il, void *il_sta, struct dentry *dir) |
882 | { | 879 | { |
883 | struct il3945_rs_sta *lq_sta = il_sta; | 880 | struct il3945_rs_sta *lq_sta = il_sta; |
884 | 881 | ||
885 | lq_sta->rs_sta_dbgfs_stats_table_file = | 882 | lq_sta->rs_sta_dbgfs_stats_table_file = |
886 | debugfs_create_file("rate_stats_table", 0600, dir, | 883 | debugfs_create_file("rate_stats_table", 0600, dir, lq_sta, |
887 | lq_sta, &rs_sta_dbgfs_stats_table_ops); | 884 | &rs_sta_dbgfs_stats_table_ops); |
888 | 885 | ||
889 | } | 886 | } |
890 | 887 | ||
891 | static void il3945_remove_debugfs(void *il, void *il_sta) | 888 | static void |
889 | il3945_remove_debugfs(void *il, void *il_sta) | ||
892 | { | 890 | { |
893 | struct il3945_rs_sta *lq_sta = il_sta; | 891 | struct il3945_rs_sta *lq_sta = il_sta; |
894 | debugfs_remove(lq_sta->rs_sta_dbgfs_stats_table_file); | 892 | debugfs_remove(lq_sta->rs_sta_dbgfs_stats_table_file); |
@@ -900,9 +898,9 @@ static void il3945_remove_debugfs(void *il, void *il_sta) | |||
900 | * the station is added. Since mac80211 calls this function before a | 898 | * the station is added. Since mac80211 calls this function before a |
901 | * station is added we ignore it. | 899 | * station is added we ignore it. |
902 | */ | 900 | */ |
903 | static void il3945_rs_rate_init_stub(void *il_r, | 901 | static void |
904 | struct ieee80211_supported_band *sband, | 902 | il3945_rs_rate_init_stub(void *il_r, struct ieee80211_supported_band *sband, |
905 | struct ieee80211_sta *sta, void *il_sta) | 903 | struct ieee80211_sta *sta, void *il_sta) |
906 | { | 904 | { |
907 | } | 905 | } |
908 | 906 | ||
@@ -922,7 +920,9 @@ static struct rate_control_ops rs_ops = { | |||
922 | #endif | 920 | #endif |
923 | 921 | ||
924 | }; | 922 | }; |
925 | void il3945_rate_scale_init(struct ieee80211_hw *hw, s32 sta_id) | 923 | |
924 | void | ||
925 | il3945_rate_scale_init(struct ieee80211_hw *hw, s32 sta_id) | ||
926 | { | 926 | { |
927 | struct il_priv *il = hw->priv; | 927 | struct il_priv *il = hw->priv; |
928 | s32 rssi = 0; | 928 | s32 rssi = 0; |
@@ -935,15 +935,15 @@ void il3945_rate_scale_init(struct ieee80211_hw *hw, s32 sta_id) | |||
935 | 935 | ||
936 | rcu_read_lock(); | 936 | rcu_read_lock(); |
937 | 937 | ||
938 | sta = ieee80211_find_sta(il->ctx.vif, | 938 | sta = |
939 | il->stations[sta_id].sta.sta.addr); | 939 | ieee80211_find_sta(il->ctx.vif, il->stations[sta_id].sta.sta.addr); |
940 | if (!sta) { | 940 | if (!sta) { |
941 | D_RATE("Unable to find station to initialize rate scaling.\n"); | 941 | D_RATE("Unable to find station to initialize rate scaling.\n"); |
942 | rcu_read_unlock(); | 942 | rcu_read_unlock(); |
943 | return; | 943 | return; |
944 | } | 944 | } |
945 | 945 | ||
946 | psta = (void *) sta->drv_priv; | 946 | psta = (void *)sta->drv_priv; |
947 | rs_sta = &psta->rs_sta; | 947 | rs_sta = &psta->rs_sta; |
948 | 948 | ||
949 | spin_lock_irqsave(&rs_sta->lock, flags); | 949 | spin_lock_irqsave(&rs_sta->lock, flags); |
@@ -952,8 +952,7 @@ void il3945_rate_scale_init(struct ieee80211_hw *hw, s32 sta_id) | |||
952 | switch (il->band) { | 952 | switch (il->band) { |
953 | case IEEE80211_BAND_2GHZ: | 953 | case IEEE80211_BAND_2GHZ: |
954 | /* TODO: this always does G, not a regression */ | 954 | /* TODO: this always does G, not a regression */ |
955 | if (il->ctx.active.flags & | 955 | if (il->ctx.active.flags & RXON_FLG_TGG_PROTECT_MSK) { |
956 | RXON_FLG_TGG_PROTECT_MSK) { | ||
957 | rs_sta->tgg = 1; | 956 | rs_sta->tgg = 1; |
958 | rs_sta->expected_tpt = il3945_expected_tpt_g_prot; | 957 | rs_sta->expected_tpt = il3945_expected_tpt_g_prot; |
959 | } else | 958 | } else |
@@ -978,18 +977,19 @@ void il3945_rate_scale_init(struct ieee80211_hw *hw, s32 sta_id) | |||
978 | 977 | ||
979 | rs_sta->start_rate = il3945_get_rate_idx_by_rssi(rssi, il->band); | 978 | rs_sta->start_rate = il3945_get_rate_idx_by_rssi(rssi, il->band); |
980 | 979 | ||
981 | D_RATE("leave: rssi %d assign rate idx: " | 980 | D_RATE("leave: rssi %d assign rate idx: " "%d (plcp 0x%x)\n", rssi, |
982 | "%d (plcp 0x%x)\n", rssi, rs_sta->start_rate, | 981 | rs_sta->start_rate, il3945_rates[rs_sta->start_rate].plcp); |
983 | il3945_rates[rs_sta->start_rate].plcp); | ||
984 | rcu_read_unlock(); | 982 | rcu_read_unlock(); |
985 | } | 983 | } |
986 | 984 | ||
987 | int il3945_rate_control_register(void) | 985 | int |
986 | il3945_rate_control_register(void) | ||
988 | { | 987 | { |
989 | return ieee80211_rate_control_register(&rs_ops); | 988 | return ieee80211_rate_control_register(&rs_ops); |
990 | } | 989 | } |
991 | 990 | ||
992 | void il3945_rate_control_unregister(void) | 991 | void |
992 | il3945_rate_control_unregister(void) | ||
993 | { | 993 | { |
994 | ieee80211_rate_control_unregister(&rs_ops); | 994 | ieee80211_rate_control_unregister(&rs_ops); |
995 | } | 995 | } |
diff --git a/drivers/net/wireless/iwlegacy/3945.c b/drivers/net/wireless/iwlegacy/3945.c index b1ced05ab3d3..7f0b9f56f4be 100644 --- a/drivers/net/wireless/iwlegacy/3945.c +++ b/drivers/net/wireless/iwlegacy/3945.c | |||
@@ -43,8 +43,8 @@ | |||
43 | #include "3945.h" | 43 | #include "3945.h" |
44 | 44 | ||
45 | /* Send led command */ | 45 | /* Send led command */ |
46 | static int il3945_send_led_cmd(struct il_priv *il, | 46 | static int |
47 | struct il_led_cmd *led_cmd) | 47 | il3945_send_led_cmd(struct il_priv *il, struct il_led_cmd *led_cmd) |
48 | { | 48 | { |
49 | struct il_host_cmd cmd = { | 49 | struct il_host_cmd cmd = { |
50 | .id = C_LEDS, | 50 | .id = C_LEDS, |
@@ -82,21 +82,22 @@ const struct il_led_ops il3945_led_ops = { | |||
82 | * | 82 | * |
83 | */ | 83 | */ |
84 | const struct il3945_rate_info il3945_rates[RATE_COUNT_3945] = { | 84 | const struct il3945_rate_info il3945_rates[RATE_COUNT_3945] = { |
85 | IL_DECLARE_RATE_INFO(1, INV, 2, INV, 2, INV, 2), /* 1mbps */ | 85 | IL_DECLARE_RATE_INFO(1, INV, 2, INV, 2, INV, 2), /* 1mbps */ |
86 | IL_DECLARE_RATE_INFO(2, 1, 5, 1, 5, 1, 5), /* 2mbps */ | 86 | IL_DECLARE_RATE_INFO(2, 1, 5, 1, 5, 1, 5), /* 2mbps */ |
87 | IL_DECLARE_RATE_INFO(5, 2, 6, 2, 11, 2, 11), /*5.5mbps */ | 87 | IL_DECLARE_RATE_INFO(5, 2, 6, 2, 11, 2, 11), /*5.5mbps */ |
88 | IL_DECLARE_RATE_INFO(11, 9, 12, 5, 12, 5, 18), /* 11mbps */ | 88 | IL_DECLARE_RATE_INFO(11, 9, 12, 5, 12, 5, 18), /* 11mbps */ |
89 | IL_DECLARE_RATE_INFO(6, 5, 9, 5, 11, 5, 11), /* 6mbps */ | 89 | IL_DECLARE_RATE_INFO(6, 5, 9, 5, 11, 5, 11), /* 6mbps */ |
90 | IL_DECLARE_RATE_INFO(9, 6, 11, 5, 11, 5, 11), /* 9mbps */ | 90 | IL_DECLARE_RATE_INFO(9, 6, 11, 5, 11, 5, 11), /* 9mbps */ |
91 | IL_DECLARE_RATE_INFO(12, 11, 18, 11, 18, 11, 18), /* 12mbps */ | 91 | IL_DECLARE_RATE_INFO(12, 11, 18, 11, 18, 11, 18), /* 12mbps */ |
92 | IL_DECLARE_RATE_INFO(18, 12, 24, 12, 24, 11, 24), /* 18mbps */ | 92 | IL_DECLARE_RATE_INFO(18, 12, 24, 12, 24, 11, 24), /* 18mbps */ |
93 | IL_DECLARE_RATE_INFO(24, 18, 36, 18, 36, 18, 36), /* 24mbps */ | 93 | IL_DECLARE_RATE_INFO(24, 18, 36, 18, 36, 18, 36), /* 24mbps */ |
94 | IL_DECLARE_RATE_INFO(36, 24, 48, 24, 48, 24, 48), /* 36mbps */ | 94 | IL_DECLARE_RATE_INFO(36, 24, 48, 24, 48, 24, 48), /* 36mbps */ |
95 | IL_DECLARE_RATE_INFO(48, 36, 54, 36, 54, 36, 54), /* 48mbps */ | 95 | IL_DECLARE_RATE_INFO(48, 36, 54, 36, 54, 36, 54), /* 48mbps */ |
96 | IL_DECLARE_RATE_INFO(54, 48, INV, 48, INV, 48, INV),/* 54mbps */ | 96 | IL_DECLARE_RATE_INFO(54, 48, INV, 48, INV, 48, INV), /* 54mbps */ |
97 | }; | 97 | }; |
98 | 98 | ||
99 | static inline u8 il3945_get_prev_ieee_rate(u8 rate_idx) | 99 | static inline u8 |
100 | il3945_get_prev_ieee_rate(u8 rate_idx) | ||
100 | { | 101 | { |
101 | u8 rate = il3945_rates[rate_idx].prev_ieee; | 102 | u8 rate = il3945_rates[rate_idx].prev_ieee; |
102 | 103 | ||
@@ -118,7 +119,8 @@ static inline u8 il3945_get_prev_ieee_rate(u8 rate_idx) | |||
118 | * Use for only special debugging. This function is just a placeholder as-is, | 119 | * Use for only special debugging. This function is just a placeholder as-is, |
119 | * you'll need to provide the special bits! ... | 120 | * you'll need to provide the special bits! ... |
120 | * ... and set IL_EVT_DISABLE to 1. */ | 121 | * ... and set IL_EVT_DISABLE to 1. */ |
121 | void il3945_disable_events(struct il_priv *il) | 122 | void |
123 | il3945_disable_events(struct il_priv *il) | ||
122 | { | 124 | { |
123 | int i; | 125 | int i; |
124 | u32 base; /* SRAM address of event log header */ | 126 | u32 base; /* SRAM address of event log header */ |
@@ -185,22 +187,22 @@ void il3945_disable_events(struct il_priv *il) | |||
185 | 187 | ||
186 | if (IL_EVT_DISABLE && array_size == IL_EVT_DISABLE_SIZE) { | 188 | if (IL_EVT_DISABLE && array_size == IL_EVT_DISABLE_SIZE) { |
187 | D_INFO("Disabling selected uCode log events at 0x%x\n", | 189 | D_INFO("Disabling selected uCode log events at 0x%x\n", |
188 | disable_ptr); | 190 | disable_ptr); |
189 | for (i = 0; i < IL_EVT_DISABLE_SIZE; i++) | 191 | for (i = 0; i < IL_EVT_DISABLE_SIZE; i++) |
190 | il_write_targ_mem(il, | 192 | il_write_targ_mem(il, disable_ptr + (i * sizeof(u32)), |
191 | disable_ptr + (i * sizeof(u32)), | 193 | evt_disable[i]); |
192 | evt_disable[i]); | ||
193 | 194 | ||
194 | } else { | 195 | } else { |
195 | D_INFO("Selected uCode log events may be disabled\n"); | 196 | D_INFO("Selected uCode log events may be disabled\n"); |
196 | D_INFO(" by writing \"1\"s into disable bitmap\n"); | 197 | D_INFO(" by writing \"1\"s into disable bitmap\n"); |
197 | D_INFO(" in SRAM at 0x%x, size %d u32s\n", | 198 | D_INFO(" in SRAM at 0x%x, size %d u32s\n", disable_ptr, |
198 | disable_ptr, array_size); | 199 | array_size); |
199 | } | 200 | } |
200 | 201 | ||
201 | } | 202 | } |
202 | 203 | ||
203 | static int il3945_hwrate_to_plcp_idx(u8 plcp) | 204 | static int |
205 | il3945_hwrate_to_plcp_idx(u8 plcp) | ||
204 | { | 206 | { |
205 | int idx; | 207 | int idx; |
206 | 208 | ||
@@ -213,7 +215,8 @@ static int il3945_hwrate_to_plcp_idx(u8 plcp) | |||
213 | #ifdef CONFIG_IWLEGACY_DEBUG | 215 | #ifdef CONFIG_IWLEGACY_DEBUG |
214 | #define TX_STATUS_ENTRY(x) case TX_3945_STATUS_FAIL_ ## x: return #x | 216 | #define TX_STATUS_ENTRY(x) case TX_3945_STATUS_FAIL_ ## x: return #x |
215 | 217 | ||
216 | static const char *il3945_get_tx_fail_reason(u32 status) | 218 | static const char * |
219 | il3945_get_tx_fail_reason(u32 status) | ||
217 | { | 220 | { |
218 | switch (status & TX_STATUS_MSK) { | 221 | switch (status & TX_STATUS_MSK) { |
219 | case TX_3945_STATUS_SUCCESS: | 222 | case TX_3945_STATUS_SUCCESS: |
@@ -239,7 +242,8 @@ static const char *il3945_get_tx_fail_reason(u32 status) | |||
239 | return "UNKNOWN"; | 242 | return "UNKNOWN"; |
240 | } | 243 | } |
241 | #else | 244 | #else |
242 | static inline const char *il3945_get_tx_fail_reason(u32 status) | 245 | static inline const char * |
246 | il3945_get_tx_fail_reason(u32 status) | ||
243 | { | 247 | { |
244 | return ""; | 248 | return ""; |
245 | } | 249 | } |
@@ -250,7 +254,8 @@ static inline const char *il3945_get_tx_fail_reason(u32 status) | |||
250 | * for A and B mode we need to overright prev | 254 | * for A and B mode we need to overright prev |
251 | * value | 255 | * value |
252 | */ | 256 | */ |
253 | int il3945_rs_next_rate(struct il_priv *il, int rate) | 257 | int |
258 | il3945_rs_next_rate(struct il_priv *il, int rate) | ||
254 | { | 259 | { |
255 | int next_rate = il3945_get_prev_ieee_rate(rate); | 260 | int next_rate = il3945_get_prev_ieee_rate(rate); |
256 | 261 | ||
@@ -276,7 +281,6 @@ int il3945_rs_next_rate(struct il_priv *il, int rate) | |||
276 | return next_rate; | 281 | return next_rate; |
277 | } | 282 | } |
278 | 283 | ||
279 | |||
280 | /** | 284 | /** |
281 | * il3945_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd | 285 | * il3945_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd |
282 | * | 286 | * |
@@ -284,8 +288,8 @@ int il3945_rs_next_rate(struct il_priv *il, int rate) | |||
284 | * need to be reclaimed. As result, some free space forms. If there is | 288 | * need to be reclaimed. As result, some free space forms. If there is |
285 | * enough free space (> low mark), wake the stack that feeds us. | 289 | * enough free space (> low mark), wake the stack that feeds us. |
286 | */ | 290 | */ |
287 | static void il3945_tx_queue_reclaim(struct il_priv *il, | 291 | static void |
288 | int txq_id, int idx) | 292 | il3945_tx_queue_reclaim(struct il_priv *il, int txq_id, int idx) |
289 | { | 293 | { |
290 | struct il_tx_queue *txq = &il->txq[txq_id]; | 294 | struct il_tx_queue *txq = &il->txq[txq_id]; |
291 | struct il_queue *q = &txq->q; | 295 | struct il_queue *q = &txq->q; |
@@ -293,9 +297,8 @@ static void il3945_tx_queue_reclaim(struct il_priv *il, | |||
293 | 297 | ||
294 | BUG_ON(txq_id == IL39_CMD_QUEUE_NUM); | 298 | BUG_ON(txq_id == IL39_CMD_QUEUE_NUM); |
295 | 299 | ||
296 | for (idx = il_queue_inc_wrap(idx, q->n_bd); | 300 | for (idx = il_queue_inc_wrap(idx, q->n_bd); q->read_ptr != idx; |
297 | q->read_ptr != idx; | 301 | q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd)) { |
298 | q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd)) { | ||
299 | 302 | ||
300 | tx_info = &txq->txb[txq->q.read_ptr]; | 303 | tx_info = &txq->txb[txq->q.read_ptr]; |
301 | ieee80211_tx_status_irqsafe(il->hw, tx_info->skb); | 304 | ieee80211_tx_status_irqsafe(il->hw, tx_info->skb); |
@@ -311,8 +314,8 @@ static void il3945_tx_queue_reclaim(struct il_priv *il, | |||
311 | /** | 314 | /** |
312 | * il3945_hdl_tx - Handle Tx response | 315 | * il3945_hdl_tx - Handle Tx response |
313 | */ | 316 | */ |
314 | static void il3945_hdl_tx(struct il_priv *il, | 317 | static void |
315 | struct il_rx_buf *rxb) | 318 | il3945_hdl_tx(struct il_priv *il, struct il_rx_buf *rxb) |
316 | { | 319 | { |
317 | struct il_rx_pkt *pkt = rxb_addr(rxb); | 320 | struct il_rx_pkt *pkt = rxb_addr(rxb); |
318 | u16 sequence = le16_to_cpu(pkt->hdr.sequence); | 321 | u16 sequence = le16_to_cpu(pkt->hdr.sequence); |
@@ -321,15 +324,14 @@ static void il3945_hdl_tx(struct il_priv *il, | |||
321 | struct il_tx_queue *txq = &il->txq[txq_id]; | 324 | struct il_tx_queue *txq = &il->txq[txq_id]; |
322 | struct ieee80211_tx_info *info; | 325 | struct ieee80211_tx_info *info; |
323 | struct il3945_tx_resp *tx_resp = (void *)&pkt->u.raw[0]; | 326 | struct il3945_tx_resp *tx_resp = (void *)&pkt->u.raw[0]; |
324 | u32 status = le32_to_cpu(tx_resp->status); | 327 | u32 status = le32_to_cpu(tx_resp->status); |
325 | int rate_idx; | 328 | int rate_idx; |
326 | int fail; | 329 | int fail; |
327 | 330 | ||
328 | if (idx >= txq->q.n_bd || il_queue_used(&txq->q, idx) == 0) { | 331 | if (idx >= txq->q.n_bd || il_queue_used(&txq->q, idx) == 0) { |
329 | IL_ERR("Read idx for DMA queue txq_id (%d) idx %d " | 332 | IL_ERR("Read idx for DMA queue txq_id (%d) idx %d " |
330 | "is out of range [0-%d] %d %d\n", txq_id, | 333 | "is out of range [0-%d] %d %d\n", txq_id, idx, |
331 | idx, txq->q.n_bd, txq->q.write_ptr, | 334 | txq->q.n_bd, txq->q.write_ptr, txq->q.read_ptr); |
332 | txq->q.read_ptr); | ||
333 | return; | 335 | return; |
334 | } | 336 | } |
335 | 337 | ||
@@ -345,15 +347,16 @@ static void il3945_hdl_tx(struct il_priv *il, | |||
345 | fail = tx_resp->failure_frame; | 347 | fail = tx_resp->failure_frame; |
346 | 348 | ||
347 | info->status.rates[0].idx = rate_idx; | 349 | info->status.rates[0].idx = rate_idx; |
348 | info->status.rates[0].count = fail + 1; /* add final attempt */ | 350 | info->status.rates[0].count = fail + 1; /* add final attempt */ |
349 | 351 | ||
350 | /* tx_status->rts_retry_count = tx_resp->failure_rts; */ | 352 | /* tx_status->rts_retry_count = tx_resp->failure_rts; */ |
351 | info->flags |= ((status & TX_STATUS_MSK) == TX_STATUS_SUCCESS) ? | 353 | info->flags |= |
352 | IEEE80211_TX_STAT_ACK : 0; | 354 | ((status & TX_STATUS_MSK) == |
355 | TX_STATUS_SUCCESS) ? IEEE80211_TX_STAT_ACK : 0; | ||
353 | 356 | ||
354 | D_TX("Tx queue %d Status %s (0x%08x) plcp rate %d retries %d\n", | 357 | D_TX("Tx queue %d Status %s (0x%08x) plcp rate %d retries %d\n", txq_id, |
355 | txq_id, il3945_get_tx_fail_reason(status), status, | 358 | il3945_get_tx_fail_reason(status), status, tx_resp->rate, |
356 | tx_resp->rate, tx_resp->failure_frame); | 359 | tx_resp->failure_frame); |
357 | 360 | ||
358 | D_TX_REPLY("Tx queue reclaim %d\n", idx); | 361 | D_TX_REPLY("Tx queue reclaim %d\n", idx); |
359 | il3945_tx_queue_reclaim(il, txq_id, idx); | 362 | il3945_tx_queue_reclaim(il, txq_id, idx); |
@@ -362,8 +365,6 @@ static void il3945_hdl_tx(struct il_priv *il, | |||
362 | IL_ERR("TODO: Implement Tx ABORT REQUIRED!!!\n"); | 365 | IL_ERR("TODO: Implement Tx ABORT REQUIRED!!!\n"); |
363 | } | 366 | } |
364 | 367 | ||
365 | |||
366 | |||
367 | /***************************************************************************** | 368 | /***************************************************************************** |
368 | * | 369 | * |
369 | * Intel PRO/Wireless 3945ABG/BG Network Connection | 370 | * Intel PRO/Wireless 3945ABG/BG Network Connection |
@@ -372,25 +373,26 @@ static void il3945_hdl_tx(struct il_priv *il, | |||
372 | * | 373 | * |
373 | *****************************************************************************/ | 374 | *****************************************************************************/ |
374 | #ifdef CONFIG_IWLEGACY_DEBUGFS | 375 | #ifdef CONFIG_IWLEGACY_DEBUGFS |
375 | static void il3945_accumulative_stats(struct il_priv *il, | 376 | static void |
376 | __le32 *stats) | 377 | il3945_accumulative_stats(struct il_priv *il, __le32 * stats) |
377 | { | 378 | { |
378 | int i; | 379 | int i; |
379 | __le32 *prev_stats; | 380 | __le32 *prev_stats; |
380 | u32 *accum_stats; | 381 | u32 *accum_stats; |
381 | u32 *delta, *max_delta; | 382 | u32 *delta, *max_delta; |
382 | 383 | ||
383 | prev_stats = (__le32 *)&il->_3945.stats; | 384 | prev_stats = (__le32 *) & il->_3945.stats; |
384 | accum_stats = (u32 *)&il->_3945.accum_stats; | 385 | accum_stats = (u32 *) & il->_3945.accum_stats; |
385 | delta = (u32 *)&il->_3945.delta_stats; | 386 | delta = (u32 *) & il->_3945.delta_stats; |
386 | max_delta = (u32 *)&il->_3945.max_delta; | 387 | max_delta = (u32 *) & il->_3945.max_delta; |
387 | 388 | ||
388 | for (i = sizeof(__le32); i < sizeof(struct il3945_notif_stats); | 389 | for (i = sizeof(__le32); i < sizeof(struct il3945_notif_stats); |
389 | i += sizeof(__le32), stats++, prev_stats++, delta++, | 390 | i += |
390 | max_delta++, accum_stats++) { | 391 | sizeof(__le32), stats++, prev_stats++, delta++, max_delta++, |
392 | accum_stats++) { | ||
391 | if (le32_to_cpu(*stats) > le32_to_cpu(*prev_stats)) { | 393 | if (le32_to_cpu(*stats) > le32_to_cpu(*prev_stats)) { |
392 | *delta = (le32_to_cpu(*stats) - | 394 | *delta = |
393 | le32_to_cpu(*prev_stats)); | 395 | (le32_to_cpu(*stats) - le32_to_cpu(*prev_stats)); |
394 | *accum_stats += *delta; | 396 | *accum_stats += *delta; |
395 | if (*delta > *max_delta) | 397 | if (*delta > *max_delta) |
396 | *max_delta = *delta; | 398 | *max_delta = *delta; |
@@ -399,48 +401,47 @@ static void il3945_accumulative_stats(struct il_priv *il, | |||
399 | 401 | ||
400 | /* reset accumulative stats for "no-counter" type stats */ | 402 | /* reset accumulative stats for "no-counter" type stats */ |
401 | il->_3945.accum_stats.general.temperature = | 403 | il->_3945.accum_stats.general.temperature = |
402 | il->_3945.stats.general.temperature; | 404 | il->_3945.stats.general.temperature; |
403 | il->_3945.accum_stats.general.ttl_timestamp = | 405 | il->_3945.accum_stats.general.ttl_timestamp = |
404 | il->_3945.stats.general.ttl_timestamp; | 406 | il->_3945.stats.general.ttl_timestamp; |
405 | } | 407 | } |
406 | #endif | 408 | #endif |
407 | 409 | ||
408 | void il3945_hdl_stats(struct il_priv *il, | 410 | void |
409 | struct il_rx_buf *rxb) | 411 | il3945_hdl_stats(struct il_priv *il, struct il_rx_buf *rxb) |
410 | { | 412 | { |
411 | struct il_rx_pkt *pkt = rxb_addr(rxb); | 413 | struct il_rx_pkt *pkt = rxb_addr(rxb); |
412 | 414 | ||
413 | D_RX("Statistics notification received (%d vs %d).\n", | 415 | D_RX("Statistics notification received (%d vs %d).\n", |
414 | (int)sizeof(struct il3945_notif_stats), | 416 | (int)sizeof(struct il3945_notif_stats), |
415 | le32_to_cpu(pkt->len_n_flags) & IL_RX_FRAME_SIZE_MSK); | 417 | le32_to_cpu(pkt->len_n_flags) & IL_RX_FRAME_SIZE_MSK); |
416 | #ifdef CONFIG_IWLEGACY_DEBUGFS | 418 | #ifdef CONFIG_IWLEGACY_DEBUGFS |
417 | il3945_accumulative_stats(il, (__le32 *)&pkt->u.raw); | 419 | il3945_accumulative_stats(il, (__le32 *) & pkt->u.raw); |
418 | #endif | 420 | #endif |
419 | 421 | ||
420 | memcpy(&il->_3945.stats, pkt->u.raw, sizeof(il->_3945.stats)); | 422 | memcpy(&il->_3945.stats, pkt->u.raw, sizeof(il->_3945.stats)); |
421 | } | 423 | } |
422 | 424 | ||
423 | void il3945_hdl_c_stats(struct il_priv *il, | 425 | void |
424 | struct il_rx_buf *rxb) | 426 | il3945_hdl_c_stats(struct il_priv *il, struct il_rx_buf *rxb) |
425 | { | 427 | { |
426 | struct il_rx_pkt *pkt = rxb_addr(rxb); | 428 | struct il_rx_pkt *pkt = rxb_addr(rxb); |
427 | __le32 *flag = (__le32 *)&pkt->u.raw; | 429 | __le32 *flag = (__le32 *) & pkt->u.raw; |
428 | 430 | ||
429 | if (le32_to_cpu(*flag) & UCODE_STATS_CLEAR_MSK) { | 431 | if (le32_to_cpu(*flag) & UCODE_STATS_CLEAR_MSK) { |
430 | #ifdef CONFIG_IWLEGACY_DEBUGFS | 432 | #ifdef CONFIG_IWLEGACY_DEBUGFS |
431 | memset(&il->_3945.accum_stats, 0, | 433 | memset(&il->_3945.accum_stats, 0, |
432 | sizeof(struct il3945_notif_stats)); | 434 | sizeof(struct il3945_notif_stats)); |
433 | memset(&il->_3945.delta_stats, 0, | 435 | memset(&il->_3945.delta_stats, 0, |
434 | sizeof(struct il3945_notif_stats)); | 436 | sizeof(struct il3945_notif_stats)); |
435 | memset(&il->_3945.max_delta, 0, | 437 | memset(&il->_3945.max_delta, 0, |
436 | sizeof(struct il3945_notif_stats)); | 438 | sizeof(struct il3945_notif_stats)); |
437 | #endif | 439 | #endif |
438 | D_RX("Statistics have been cleared\n"); | 440 | D_RX("Statistics have been cleared\n"); |
439 | } | 441 | } |
440 | il3945_hdl_stats(il, rxb); | 442 | il3945_hdl_stats(il, rxb); |
441 | } | 443 | } |
442 | 444 | ||
443 | |||
444 | /****************************************************************************** | 445 | /****************************************************************************** |
445 | * | 446 | * |
446 | * Misc. internal state and helper functions | 447 | * Misc. internal state and helper functions |
@@ -448,16 +449,16 @@ void il3945_hdl_c_stats(struct il_priv *il, | |||
448 | ******************************************************************************/ | 449 | ******************************************************************************/ |
449 | 450 | ||
450 | /* This is necessary only for a number of stats, see the caller. */ | 451 | /* This is necessary only for a number of stats, see the caller. */ |
451 | static int il3945_is_network_packet(struct il_priv *il, | 452 | static int |
452 | struct ieee80211_hdr *header) | 453 | il3945_is_network_packet(struct il_priv *il, struct ieee80211_hdr *header) |
453 | { | 454 | { |
454 | /* Filter incoming packets to determine if they are targeted toward | 455 | /* Filter incoming packets to determine if they are targeted toward |
455 | * this network, discarding packets coming from ourselves */ | 456 | * this network, discarding packets coming from ourselves */ |
456 | switch (il->iw_mode) { | 457 | switch (il->iw_mode) { |
457 | case NL80211_IFTYPE_ADHOC: /* Header: Dest. | Source | BSSID */ | 458 | case NL80211_IFTYPE_ADHOC: /* Header: Dest. | Source | BSSID */ |
458 | /* packets to our IBSS update information */ | 459 | /* packets to our IBSS update information */ |
459 | return !compare_ether_addr(header->addr3, il->bssid); | 460 | return !compare_ether_addr(header->addr3, il->bssid); |
460 | case NL80211_IFTYPE_STATION: /* Header: Dest. | AP{BSSID} | Source */ | 461 | case NL80211_IFTYPE_STATION: /* Header: Dest. | AP{BSSID} | Source */ |
461 | /* packets to our IBSS update information */ | 462 | /* packets to our IBSS update information */ |
462 | return !compare_ether_addr(header->addr2, il->bssid); | 463 | return !compare_ether_addr(header->addr2, il->bssid); |
463 | default: | 464 | default: |
@@ -465,9 +466,9 @@ static int il3945_is_network_packet(struct il_priv *il, | |||
465 | } | 466 | } |
466 | } | 467 | } |
467 | 468 | ||
468 | static void il3945_pass_packet_to_mac80211(struct il_priv *il, | 469 | static void |
469 | struct il_rx_buf *rxb, | 470 | il3945_pass_packet_to_mac80211(struct il_priv *il, struct il_rx_buf *rxb, |
470 | struct ieee80211_rx_status *stats) | 471 | struct ieee80211_rx_status *stats) |
471 | { | 472 | { |
472 | struct il_rx_pkt *pkt = rxb_addr(rxb); | 473 | struct il_rx_pkt *pkt = rxb_addr(rxb); |
473 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)IL_RX_DATA(pkt); | 474 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)IL_RX_DATA(pkt); |
@@ -478,16 +479,16 @@ static void il3945_pass_packet_to_mac80211(struct il_priv *il, | |||
478 | __le16 fc = hdr->frame_control; | 479 | __le16 fc = hdr->frame_control; |
479 | 480 | ||
480 | /* We received data from the HW, so stop the watchdog */ | 481 | /* We received data from the HW, so stop the watchdog */ |
481 | if (unlikely(len + IL39_RX_FRAME_SIZE > | 482 | if (unlikely |
482 | PAGE_SIZE << il->hw_params.rx_page_order)) { | 483 | (len + IL39_RX_FRAME_SIZE > |
484 | PAGE_SIZE << il->hw_params.rx_page_order)) { | ||
483 | D_DROP("Corruption detected!\n"); | 485 | D_DROP("Corruption detected!\n"); |
484 | return; | 486 | return; |
485 | } | 487 | } |
486 | 488 | ||
487 | /* We only process data packets if the interface is open */ | 489 | /* We only process data packets if the interface is open */ |
488 | if (unlikely(!il->is_open)) { | 490 | if (unlikely(!il->is_open)) { |
489 | D_DROP( | 491 | D_DROP("Dropping packet while interface is not open.\n"); |
490 | "Dropping packet while interface is not open.\n"); | ||
491 | return; | 492 | return; |
492 | } | 493 | } |
493 | 494 | ||
@@ -498,9 +499,8 @@ static void il3945_pass_packet_to_mac80211(struct il_priv *il, | |||
498 | } | 499 | } |
499 | 500 | ||
500 | if (!il3945_mod_params.sw_crypto) | 501 | if (!il3945_mod_params.sw_crypto) |
501 | il_set_decrypted_flag(il, | 502 | il_set_decrypted_flag(il, (struct ieee80211_hdr *)rxb_addr(rxb), |
502 | (struct ieee80211_hdr *)rxb_addr(rxb), | 503 | le32_to_cpu(rx_end->status), stats); |
503 | le32_to_cpu(rx_end->status), stats); | ||
504 | 504 | ||
505 | skb_add_rx_frag(skb, 0, rxb->page, | 505 | skb_add_rx_frag(skb, 0, rxb->page, |
506 | (void *)rx_hdr->payload - (void *)pkt, len); | 506 | (void *)rx_hdr->payload - (void *)pkt, len); |
@@ -515,8 +515,8 @@ static void il3945_pass_packet_to_mac80211(struct il_priv *il, | |||
515 | 515 | ||
516 | #define IL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6) | 516 | #define IL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6) |
517 | 517 | ||
518 | static void il3945_hdl_rx(struct il_priv *il, | 518 | static void |
519 | struct il_rx_buf *rxb) | 519 | il3945_hdl_rx(struct il_priv *il, struct il_rx_buf *rxb) |
520 | { | 520 | { |
521 | struct ieee80211_hdr *header; | 521 | struct ieee80211_hdr *header; |
522 | struct ieee80211_rx_status rx_status; | 522 | struct ieee80211_rx_status rx_status; |
@@ -525,23 +525,27 @@ static void il3945_hdl_rx(struct il_priv *il, | |||
525 | struct il3945_rx_frame_hdr *rx_hdr = IL_RX_HDR(pkt); | 525 | struct il3945_rx_frame_hdr *rx_hdr = IL_RX_HDR(pkt); |
526 | struct il3945_rx_frame_end *rx_end = IL_RX_END(pkt); | 526 | struct il3945_rx_frame_end *rx_end = IL_RX_END(pkt); |
527 | u16 rx_stats_sig_avg __maybe_unused = le16_to_cpu(rx_stats->sig_avg); | 527 | u16 rx_stats_sig_avg __maybe_unused = le16_to_cpu(rx_stats->sig_avg); |
528 | u16 rx_stats_noise_diff __maybe_unused = le16_to_cpu(rx_stats->noise_diff); | 528 | u16 rx_stats_noise_diff __maybe_unused = |
529 | le16_to_cpu(rx_stats->noise_diff); | ||
529 | u8 network_packet; | 530 | u8 network_packet; |
530 | 531 | ||
531 | rx_status.flag = 0; | 532 | rx_status.flag = 0; |
532 | rx_status.mactime = le64_to_cpu(rx_end->timestamp); | 533 | rx_status.mactime = le64_to_cpu(rx_end->timestamp); |
533 | rx_status.band = (rx_hdr->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ? | 534 | rx_status.band = |
534 | IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ; | 535 | (rx_hdr-> |
536 | phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ? IEEE80211_BAND_2GHZ : | ||
537 | IEEE80211_BAND_5GHZ; | ||
535 | rx_status.freq = | 538 | rx_status.freq = |
536 | ieee80211_channel_to_frequency(le16_to_cpu(rx_hdr->channel), | 539 | ieee80211_channel_to_frequency(le16_to_cpu(rx_hdr->channel), |
537 | rx_status.band); | 540 | rx_status.band); |
538 | 541 | ||
539 | rx_status.rate_idx = il3945_hwrate_to_plcp_idx(rx_hdr->rate); | 542 | rx_status.rate_idx = il3945_hwrate_to_plcp_idx(rx_hdr->rate); |
540 | if (rx_status.band == IEEE80211_BAND_5GHZ) | 543 | if (rx_status.band == IEEE80211_BAND_5GHZ) |
541 | rx_status.rate_idx -= IL_FIRST_OFDM_RATE; | 544 | rx_status.rate_idx -= IL_FIRST_OFDM_RATE; |
542 | 545 | ||
543 | rx_status.antenna = (le16_to_cpu(rx_hdr->phy_flags) & | 546 | rx_status.antenna = |
544 | RX_RES_PHY_FLAGS_ANTENNA_MSK) >> 4; | 547 | (le16_to_cpu(rx_hdr->phy_flags) & RX_RES_PHY_FLAGS_ANTENNA_MSK) >> |
548 | 4; | ||
545 | 549 | ||
546 | /* set the preamble flag if appropriate */ | 550 | /* set the preamble flag if appropriate */ |
547 | if (rx_hdr->phy_flags & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK) | 551 | if (rx_hdr->phy_flags & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK) |
@@ -549,7 +553,7 @@ static void il3945_hdl_rx(struct il_priv *il, | |||
549 | 553 | ||
550 | if ((unlikely(rx_stats->phy_count > 20))) { | 554 | if ((unlikely(rx_stats->phy_count > 20))) { |
551 | D_DROP("dsp size out of range [0,20]: %d/n", | 555 | D_DROP("dsp size out of range [0,20]: %d/n", |
552 | rx_stats->phy_count); | 556 | rx_stats->phy_count); |
553 | return; | 557 | return; |
554 | } | 558 | } |
555 | 559 | ||
@@ -559,31 +563,25 @@ static void il3945_hdl_rx(struct il_priv *il, | |||
559 | return; | 563 | return; |
560 | } | 564 | } |
561 | 565 | ||
562 | |||
563 | |||
564 | /* Convert 3945's rssi indicator to dBm */ | 566 | /* Convert 3945's rssi indicator to dBm */ |
565 | rx_status.signal = rx_stats->rssi - IL39_RSSI_OFFSET; | 567 | rx_status.signal = rx_stats->rssi - IL39_RSSI_OFFSET; |
566 | 568 | ||
567 | D_STATS("Rssi %d sig_avg %d noise_diff %d\n", | 569 | D_STATS("Rssi %d sig_avg %d noise_diff %d\n", rx_status.signal, |
568 | rx_status.signal, rx_stats_sig_avg, | 570 | rx_stats_sig_avg, rx_stats_noise_diff); |
569 | rx_stats_noise_diff); | ||
570 | 571 | ||
571 | header = (struct ieee80211_hdr *)IL_RX_DATA(pkt); | 572 | header = (struct ieee80211_hdr *)IL_RX_DATA(pkt); |
572 | 573 | ||
573 | network_packet = il3945_is_network_packet(il, header); | 574 | network_packet = il3945_is_network_packet(il, header); |
574 | 575 | ||
575 | D_STATS("[%c] %d RSSI:%d Signal:%u, Rate:%u\n", | 576 | D_STATS("[%c] %d RSSI:%d Signal:%u, Rate:%u\n", |
576 | network_packet ? '*' : ' ', | 577 | network_packet ? '*' : ' ', le16_to_cpu(rx_hdr->channel), |
577 | le16_to_cpu(rx_hdr->channel), | 578 | rx_status.signal, rx_status.signal, rx_status.rate_idx); |
578 | rx_status.signal, rx_status.signal, | ||
579 | rx_status.rate_idx); | ||
580 | 579 | ||
581 | il_dbg_log_rx_data_frame(il, le16_to_cpu(rx_hdr->len), | 580 | il_dbg_log_rx_data_frame(il, le16_to_cpu(rx_hdr->len), header); |
582 | header); | ||
583 | 581 | ||
584 | if (network_packet) { | 582 | if (network_packet) { |
585 | il->_3945.last_beacon_time = | 583 | il->_3945.last_beacon_time = |
586 | le32_to_cpu(rx_end->beacon_timestamp); | 584 | le32_to_cpu(rx_end->beacon_timestamp); |
587 | il->_3945.last_tsf = le64_to_cpu(rx_end->timestamp); | 585 | il->_3945.last_tsf = le64_to_cpu(rx_end->timestamp); |
588 | il->_3945.last_rx_rssi = rx_status.signal; | 586 | il->_3945.last_rx_rssi = rx_status.signal; |
589 | } | 587 | } |
@@ -591,9 +589,9 @@ static void il3945_hdl_rx(struct il_priv *il, | |||
591 | il3945_pass_packet_to_mac80211(il, rxb, &rx_status); | 589 | il3945_pass_packet_to_mac80211(il, rxb, &rx_status); |
592 | } | 590 | } |
593 | 591 | ||
594 | int il3945_hw_txq_attach_buf_to_tfd(struct il_priv *il, | 592 | int |
595 | struct il_tx_queue *txq, | 593 | il3945_hw_txq_attach_buf_to_tfd(struct il_priv *il, struct il_tx_queue *txq, |
596 | dma_addr_t addr, u16 len, u8 reset, u8 pad) | 594 | dma_addr_t addr, u16 len, u8 reset, u8 pad) |
597 | { | 595 | { |
598 | int count; | 596 | int count; |
599 | struct il_queue *q; | 597 | struct il_queue *q; |
@@ -610,7 +608,7 @@ int il3945_hw_txq_attach_buf_to_tfd(struct il_priv *il, | |||
610 | 608 | ||
611 | if (count >= NUM_TFD_CHUNKS || count < 0) { | 609 | if (count >= NUM_TFD_CHUNKS || count < 0) { |
612 | IL_ERR("Error can not send more than %d chunks\n", | 610 | IL_ERR("Error can not send more than %d chunks\n", |
613 | NUM_TFD_CHUNKS); | 611 | NUM_TFD_CHUNKS); |
614 | return -EINVAL; | 612 | return -EINVAL; |
615 | } | 613 | } |
616 | 614 | ||
@@ -619,8 +617,8 @@ int il3945_hw_txq_attach_buf_to_tfd(struct il_priv *il, | |||
619 | 617 | ||
620 | count++; | 618 | count++; |
621 | 619 | ||
622 | tfd->control_flags = cpu_to_le32(TFD_CTL_COUNT_SET(count) | | 620 | tfd->control_flags = |
623 | TFD_CTL_PAD_SET(pad)); | 621 | cpu_to_le32(TFD_CTL_COUNT_SET(count) | TFD_CTL_PAD_SET(pad)); |
624 | 622 | ||
625 | return 0; | 623 | return 0; |
626 | } | 624 | } |
@@ -630,7 +628,8 @@ int il3945_hw_txq_attach_buf_to_tfd(struct il_priv *il, | |||
630 | * | 628 | * |
631 | * Does NOT advance any idxes | 629 | * Does NOT advance any idxes |
632 | */ | 630 | */ |
633 | void il3945_hw_txq_free_tfd(struct il_priv *il, struct il_tx_queue *txq) | 631 | void |
632 | il3945_hw_txq_free_tfd(struct il_priv *il, struct il_tx_queue *txq) | ||
634 | { | 633 | { |
635 | struct il3945_tfd *tfd_tmp = (struct il3945_tfd *)txq->tfds; | 634 | struct il3945_tfd *tfd_tmp = (struct il3945_tfd *)txq->tfds; |
636 | int idx = txq->q.read_ptr; | 635 | int idx = txq->q.read_ptr; |
@@ -649,16 +648,16 @@ void il3945_hw_txq_free_tfd(struct il_priv *il, struct il_tx_queue *txq) | |||
649 | 648 | ||
650 | /* Unmap tx_cmd */ | 649 | /* Unmap tx_cmd */ |
651 | if (counter) | 650 | if (counter) |
652 | pci_unmap_single(dev, | 651 | pci_unmap_single(dev, dma_unmap_addr(&txq->meta[idx], mapping), |
653 | dma_unmap_addr(&txq->meta[idx], mapping), | 652 | dma_unmap_len(&txq->meta[idx], len), |
654 | dma_unmap_len(&txq->meta[idx], len), | 653 | PCI_DMA_TODEVICE); |
655 | PCI_DMA_TODEVICE); | ||
656 | 654 | ||
657 | /* unmap chunks if any */ | 655 | /* unmap chunks if any */ |
658 | 656 | ||
659 | for (i = 1; i < counter; i++) | 657 | for (i = 1; i < counter; i++) |
660 | pci_unmap_single(dev, le32_to_cpu(tfd->tbs[i].addr), | 658 | pci_unmap_single(dev, le32_to_cpu(tfd->tbs[i].addr), |
661 | le32_to_cpu(tfd->tbs[i].len), PCI_DMA_TODEVICE); | 659 | le32_to_cpu(tfd->tbs[i].len), |
660 | PCI_DMA_TODEVICE); | ||
662 | 661 | ||
663 | /* free SKB */ | 662 | /* free SKB */ |
664 | if (txq->txb) { | 663 | if (txq->txb) { |
@@ -678,11 +677,10 @@ void il3945_hw_txq_free_tfd(struct il_priv *il, struct il_tx_queue *txq) | |||
678 | * il3945_hw_build_tx_cmd_rate - Add rate portion to TX_CMD: | 677 | * il3945_hw_build_tx_cmd_rate - Add rate portion to TX_CMD: |
679 | * | 678 | * |
680 | */ | 679 | */ |
681 | void il3945_hw_build_tx_cmd_rate(struct il_priv *il, | 680 | void |
682 | struct il_device_cmd *cmd, | 681 | il3945_hw_build_tx_cmd_rate(struct il_priv *il, struct il_device_cmd *cmd, |
683 | struct ieee80211_tx_info *info, | 682 | struct ieee80211_tx_info *info, |
684 | struct ieee80211_hdr *hdr, | 683 | struct ieee80211_hdr *hdr, int sta_id, int tx_id) |
685 | int sta_id, int tx_id) | ||
686 | { | 684 | { |
687 | u16 hw_value = ieee80211_get_tx_rate(il->hw, info)->hw_value; | 685 | u16 hw_value = ieee80211_get_tx_rate(il->hw, info)->hw_value; |
688 | u16 rate_idx = min(hw_value & 0xffff, RATE_COUNT_3945); | 686 | u16 rate_idx = min(hw_value & 0xffff, RATE_COUNT_3945); |
@@ -701,7 +699,7 @@ void il3945_hw_build_tx_cmd_rate(struct il_priv *il, | |||
701 | * in this running context */ | 699 | * in this running context */ |
702 | rate_mask = RATES_MASK_3945; | 700 | rate_mask = RATES_MASK_3945; |
703 | 701 | ||
704 | /* Set retry limit on DATA packets and Probe Responses*/ | 702 | /* Set retry limit on DATA packets and Probe Responses */ |
705 | if (ieee80211_is_probe_resp(fc)) | 703 | if (ieee80211_is_probe_resp(fc)) |
706 | data_retry_limit = 3; | 704 | data_retry_limit = 3; |
707 | else | 705 | else |
@@ -722,18 +720,19 @@ void il3945_hw_build_tx_cmd_rate(struct il_priv *il, | |||
722 | 720 | ||
723 | /* OFDM */ | 721 | /* OFDM */ |
724 | tx_cmd->supp_rates[0] = | 722 | tx_cmd->supp_rates[0] = |
725 | ((rate_mask & IL_OFDM_RATES_MASK) >> IL_FIRST_OFDM_RATE) & 0xFF; | 723 | ((rate_mask & IL_OFDM_RATES_MASK) >> IL_FIRST_OFDM_RATE) & 0xFF; |
726 | 724 | ||
727 | /* CCK */ | 725 | /* CCK */ |
728 | tx_cmd->supp_rates[1] = (rate_mask & 0xF); | 726 | tx_cmd->supp_rates[1] = (rate_mask & 0xF); |
729 | 727 | ||
730 | D_RATE("Tx sta id: %d, rate: %d (plcp), flags: 0x%4X " | 728 | D_RATE("Tx sta id: %d, rate: %d (plcp), flags: 0x%4X " |
731 | "cck/ofdm mask: 0x%x/0x%x\n", sta_id, | 729 | "cck/ofdm mask: 0x%x/0x%x\n", sta_id, tx_cmd->rate, |
732 | tx_cmd->rate, le32_to_cpu(tx_cmd->tx_flags), | 730 | le32_to_cpu(tx_cmd->tx_flags), tx_cmd->supp_rates[1], |
733 | tx_cmd->supp_rates[1], tx_cmd->supp_rates[0]); | 731 | tx_cmd->supp_rates[0]); |
734 | } | 732 | } |
735 | 733 | ||
736 | static u8 il3945_sync_sta(struct il_priv *il, int sta_id, u16 tx_rate) | 734 | static u8 |
735 | il3945_sync_sta(struct il_priv *il, int sta_id, u16 tx_rate) | ||
737 | { | 736 | { |
738 | unsigned long flags_spin; | 737 | unsigned long flags_spin; |
739 | struct il_station_entry *station; | 738 | struct il_station_entry *station; |
@@ -750,12 +749,12 @@ static u8 il3945_sync_sta(struct il_priv *il, int sta_id, u16 tx_rate) | |||
750 | il_send_add_sta(il, &station->sta, CMD_ASYNC); | 749 | il_send_add_sta(il, &station->sta, CMD_ASYNC); |
751 | spin_unlock_irqrestore(&il->sta_lock, flags_spin); | 750 | spin_unlock_irqrestore(&il->sta_lock, flags_spin); |
752 | 751 | ||
753 | D_RATE("SCALE sync station %d to rate %d\n", | 752 | D_RATE("SCALE sync station %d to rate %d\n", sta_id, tx_rate); |
754 | sta_id, tx_rate); | ||
755 | return sta_id; | 753 | return sta_id; |
756 | } | 754 | } |
757 | 755 | ||
758 | static void il3945_set_pwr_vmain(struct il_priv *il) | 756 | static void |
757 | il3945_set_pwr_vmain(struct il_priv *il) | ||
759 | { | 758 | { |
760 | /* | 759 | /* |
761 | * (for documentation purposes) | 760 | * (for documentation purposes) |
@@ -773,28 +772,28 @@ static void il3945_set_pwr_vmain(struct il_priv *il) | |||
773 | */ | 772 | */ |
774 | 773 | ||
775 | il_set_bits_mask_prph(il, APMG_PS_CTRL_REG, | 774 | il_set_bits_mask_prph(il, APMG_PS_CTRL_REG, |
776 | APMG_PS_CTRL_VAL_PWR_SRC_VMAIN, | 775 | APMG_PS_CTRL_VAL_PWR_SRC_VMAIN, |
777 | ~APMG_PS_CTRL_MSK_PWR_SRC); | 776 | ~APMG_PS_CTRL_MSK_PWR_SRC); |
778 | 777 | ||
779 | _il_poll_bit(il, CSR_GPIO_IN, CSR_GPIO_IN_VAL_VMAIN_PWR_SRC, | 778 | _il_poll_bit(il, CSR_GPIO_IN, CSR_GPIO_IN_VAL_VMAIN_PWR_SRC, CSR_GPIO_IN_BIT_AUX_POWER, 5000); /* uS */ |
780 | CSR_GPIO_IN_BIT_AUX_POWER, 5000); /* uS */ | ||
781 | } | 779 | } |
782 | 780 | ||
783 | static int il3945_rx_init(struct il_priv *il, struct il_rx_queue *rxq) | 781 | static int |
782 | il3945_rx_init(struct il_priv *il, struct il_rx_queue *rxq) | ||
784 | { | 783 | { |
785 | il_wr(il, FH39_RCSR_RBD_BASE(0), rxq->bd_dma); | 784 | il_wr(il, FH39_RCSR_RBD_BASE(0), rxq->bd_dma); |
786 | il_wr(il, FH39_RCSR_RPTR_ADDR(0), | 785 | il_wr(il, FH39_RCSR_RPTR_ADDR(0), rxq->rb_stts_dma); |
787 | rxq->rb_stts_dma); | ||
788 | il_wr(il, FH39_RCSR_WPTR(0), 0); | 786 | il_wr(il, FH39_RCSR_WPTR(0), 0); |
789 | il_wr(il, FH39_RCSR_CONFIG(0), | 787 | il_wr(il, FH39_RCSR_CONFIG(0), |
790 | FH39_RCSR_RX_CONFIG_REG_VAL_DMA_CHNL_EN_ENABLE | | 788 | FH39_RCSR_RX_CONFIG_REG_VAL_DMA_CHNL_EN_ENABLE | |
791 | FH39_RCSR_RX_CONFIG_REG_VAL_RDRBD_EN_ENABLE | | 789 | FH39_RCSR_RX_CONFIG_REG_VAL_RDRBD_EN_ENABLE | |
792 | FH39_RCSR_RX_CONFIG_REG_BIT_WR_STTS_EN | | 790 | FH39_RCSR_RX_CONFIG_REG_BIT_WR_STTS_EN | |
793 | FH39_RCSR_RX_CONFIG_REG_VAL_MAX_FRAG_SIZE_128 | | 791 | FH39_RCSR_RX_CONFIG_REG_VAL_MAX_FRAG_SIZE_128 | (RX_QUEUE_SIZE_LOG |
794 | (RX_QUEUE_SIZE_LOG << FH39_RCSR_RX_CONFIG_REG_POS_RBDC_SIZE) | | 792 | << |
795 | FH39_RCSR_RX_CONFIG_REG_VAL_IRQ_DEST_INT_HOST | | 793 | FH39_RCSR_RX_CONFIG_REG_POS_RBDC_SIZE) |
796 | (1 << FH39_RCSR_RX_CONFIG_REG_POS_IRQ_RBTH) | | 794 | | FH39_RCSR_RX_CONFIG_REG_VAL_IRQ_DEST_INT_HOST | (1 << |
797 | FH39_RCSR_RX_CONFIG_REG_VAL_MSG_MODE_FH); | 795 | FH39_RCSR_RX_CONFIG_REG_POS_IRQ_RBTH) |
796 | | FH39_RCSR_RX_CONFIG_REG_VAL_MSG_MODE_FH); | ||
798 | 797 | ||
799 | /* fake read to flush all prev I/O */ | 798 | /* fake read to flush all prev I/O */ |
800 | il_rd(il, FH39_RSSR_CTRL); | 799 | il_rd(il, FH39_RSSR_CTRL); |
@@ -802,7 +801,8 @@ static int il3945_rx_init(struct il_priv *il, struct il_rx_queue *rxq) | |||
802 | return 0; | 801 | return 0; |
803 | } | 802 | } |
804 | 803 | ||
805 | static int il3945_tx_reset(struct il_priv *il) | 804 | static int |
805 | il3945_tx_reset(struct il_priv *il) | ||
806 | { | 806 | { |
807 | 807 | ||
808 | /* bypass mode */ | 808 | /* bypass mode */ |
@@ -819,18 +819,16 @@ static int il3945_tx_reset(struct il_priv *il) | |||
819 | il_wr_prph(il, ALM_SCD_TXF4MF_REG, 0x000004); | 819 | il_wr_prph(il, ALM_SCD_TXF4MF_REG, 0x000004); |
820 | il_wr_prph(il, ALM_SCD_TXF5MF_REG, 0x000005); | 820 | il_wr_prph(il, ALM_SCD_TXF5MF_REG, 0x000005); |
821 | 821 | ||
822 | il_wr(il, FH39_TSSR_CBB_BASE, | 822 | il_wr(il, FH39_TSSR_CBB_BASE, il->_3945.shared_phys); |
823 | il->_3945.shared_phys); | ||
824 | 823 | ||
825 | il_wr(il, FH39_TSSR_MSG_CONFIG, | 824 | il_wr(il, FH39_TSSR_MSG_CONFIG, |
826 | FH39_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TXPD_ON | | 825 | FH39_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TXPD_ON | |
827 | FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_TXPD_ON | | 826 | FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_TXPD_ON | |
828 | FH39_TSSR_TX_MSG_CONFIG_REG_VAL_MAX_FRAG_SIZE_128B | | 827 | FH39_TSSR_TX_MSG_CONFIG_REG_VAL_MAX_FRAG_SIZE_128B | |
829 | FH39_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TFD_ON | | 828 | FH39_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TFD_ON | |
830 | FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_CBB_ON | | 829 | FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_CBB_ON | |
831 | FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RSP_WAIT_TH | | 830 | FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RSP_WAIT_TH | |
832 | FH39_TSSR_TX_MSG_CONFIG_REG_VAL_RSP_WAIT_TH); | 831 | FH39_TSSR_TX_MSG_CONFIG_REG_VAL_RSP_WAIT_TH); |
833 | |||
834 | 832 | ||
835 | return 0; | 833 | return 0; |
836 | } | 834 | } |
@@ -840,7 +838,8 @@ static int il3945_tx_reset(struct il_priv *il) | |||
840 | * | 838 | * |
841 | * Destroys all DMA structures and initialize them again | 839 | * Destroys all DMA structures and initialize them again |
842 | */ | 840 | */ |
843 | static int il3945_txq_ctx_reset(struct il_priv *il) | 841 | static int |
842 | il3945_txq_ctx_reset(struct il_priv *il) | ||
844 | { | 843 | { |
845 | int rc; | 844 | int rc; |
846 | int txq_id, slots_num; | 845 | int txq_id, slots_num; |
@@ -859,10 +858,10 @@ static int il3945_txq_ctx_reset(struct il_priv *il) | |||
859 | 858 | ||
860 | /* Tx queue(s) */ | 859 | /* Tx queue(s) */ |
861 | for (txq_id = 0; txq_id < il->hw_params.max_txq_num; txq_id++) { | 860 | for (txq_id = 0; txq_id < il->hw_params.max_txq_num; txq_id++) { |
862 | slots_num = (txq_id == IL39_CMD_QUEUE_NUM) ? | 861 | slots_num = |
863 | TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS; | 862 | (txq_id == |
864 | rc = il_tx_queue_init(il, &il->txq[txq_id], | 863 | IL39_CMD_QUEUE_NUM) ? TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS; |
865 | slots_num, txq_id); | 864 | rc = il_tx_queue_init(il, &il->txq[txq_id], slots_num, txq_id); |
866 | if (rc) { | 865 | if (rc) { |
867 | IL_ERR("Tx %d queue init failed\n", txq_id); | 866 | IL_ERR("Tx %d queue init failed\n", txq_id); |
868 | goto error; | 867 | goto error; |
@@ -871,18 +870,18 @@ static int il3945_txq_ctx_reset(struct il_priv *il) | |||
871 | 870 | ||
872 | return rc; | 871 | return rc; |
873 | 872 | ||
874 | error: | 873 | error: |
875 | il3945_hw_txq_ctx_free(il); | 874 | il3945_hw_txq_ctx_free(il); |
876 | return rc; | 875 | return rc; |
877 | } | 876 | } |
878 | 877 | ||
879 | |||
880 | /* | 878 | /* |
881 | * Start up 3945's basic functionality after it has been reset | 879 | * Start up 3945's basic functionality after it has been reset |
882 | * (e.g. after platform boot, or shutdown via il_apm_stop()) | 880 | * (e.g. after platform boot, or shutdown via il_apm_stop()) |
883 | * NOTE: This does not load uCode nor start the embedded processor | 881 | * NOTE: This does not load uCode nor start the embedded processor |
884 | */ | 882 | */ |
885 | static int il3945_apm_init(struct il_priv *il) | 883 | static int |
884 | il3945_apm_init(struct il_priv *il) | ||
886 | { | 885 | { |
887 | int ret = il_apm_init(il); | 886 | int ret = il_apm_init(il); |
888 | 887 | ||
@@ -891,16 +890,15 @@ static int il3945_apm_init(struct il_priv *il) | |||
891 | il_wr_prph(il, APMG_RTC_INT_STT_REG, 0xFFFFFFFF); | 890 | il_wr_prph(il, APMG_RTC_INT_STT_REG, 0xFFFFFFFF); |
892 | 891 | ||
893 | /* Reset radio chip */ | 892 | /* Reset radio chip */ |
894 | il_set_bits_prph(il, APMG_PS_CTRL_REG, | 893 | il_set_bits_prph(il, APMG_PS_CTRL_REG, APMG_PS_CTRL_VAL_RESET_REQ); |
895 | APMG_PS_CTRL_VAL_RESET_REQ); | ||
896 | udelay(5); | 894 | udelay(5); |
897 | il_clear_bits_prph(il, APMG_PS_CTRL_REG, | 895 | il_clear_bits_prph(il, APMG_PS_CTRL_REG, APMG_PS_CTRL_VAL_RESET_REQ); |
898 | APMG_PS_CTRL_VAL_RESET_REQ); | ||
899 | 896 | ||
900 | return ret; | 897 | return ret; |
901 | } | 898 | } |
902 | 899 | ||
903 | static void il3945_nic_config(struct il_priv *il) | 900 | static void |
901 | il3945_nic_config(struct il_priv *il) | ||
904 | { | 902 | { |
905 | struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom; | 903 | struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom; |
906 | unsigned long flags; | 904 | unsigned long flags; |
@@ -916,42 +914,40 @@ static void il3945_nic_config(struct il_priv *il) | |||
916 | else if (rev_id & PCI_CFG_REV_ID_BIT_BASIC_SKU) { | 914 | else if (rev_id & PCI_CFG_REV_ID_BIT_BASIC_SKU) { |
917 | D_INFO("3945 RADIO-MB type\n"); | 915 | D_INFO("3945 RADIO-MB type\n"); |
918 | il_set_bit(il, CSR_HW_IF_CONFIG_REG, | 916 | il_set_bit(il, CSR_HW_IF_CONFIG_REG, |
919 | CSR39_HW_IF_CONFIG_REG_BIT_3945_MB); | 917 | CSR39_HW_IF_CONFIG_REG_BIT_3945_MB); |
920 | } else { | 918 | } else { |
921 | D_INFO("3945 RADIO-MM type\n"); | 919 | D_INFO("3945 RADIO-MM type\n"); |
922 | il_set_bit(il, CSR_HW_IF_CONFIG_REG, | 920 | il_set_bit(il, CSR_HW_IF_CONFIG_REG, |
923 | CSR39_HW_IF_CONFIG_REG_BIT_3945_MM); | 921 | CSR39_HW_IF_CONFIG_REG_BIT_3945_MM); |
924 | } | 922 | } |
925 | 923 | ||
926 | if (EEPROM_SKU_CAP_OP_MODE_MRC == eeprom->sku_cap) { | 924 | if (EEPROM_SKU_CAP_OP_MODE_MRC == eeprom->sku_cap) { |
927 | D_INFO("SKU OP mode is mrc\n"); | 925 | D_INFO("SKU OP mode is mrc\n"); |
928 | il_set_bit(il, CSR_HW_IF_CONFIG_REG, | 926 | il_set_bit(il, CSR_HW_IF_CONFIG_REG, |
929 | CSR39_HW_IF_CONFIG_REG_BIT_SKU_MRC); | 927 | CSR39_HW_IF_CONFIG_REG_BIT_SKU_MRC); |
930 | } else | 928 | } else |
931 | D_INFO("SKU OP mode is basic\n"); | 929 | D_INFO("SKU OP mode is basic\n"); |
932 | 930 | ||
933 | if ((eeprom->board_revision & 0xF0) == 0xD0) { | 931 | if ((eeprom->board_revision & 0xF0) == 0xD0) { |
934 | D_INFO("3945ABG revision is 0x%X\n", | 932 | D_INFO("3945ABG revision is 0x%X\n", eeprom->board_revision); |
935 | eeprom->board_revision); | ||
936 | il_set_bit(il, CSR_HW_IF_CONFIG_REG, | 933 | il_set_bit(il, CSR_HW_IF_CONFIG_REG, |
937 | CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE); | 934 | CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE); |
938 | } else { | 935 | } else { |
939 | D_INFO("3945ABG revision is 0x%X\n", | 936 | D_INFO("3945ABG revision is 0x%X\n", eeprom->board_revision); |
940 | eeprom->board_revision); | ||
941 | il_clear_bit(il, CSR_HW_IF_CONFIG_REG, | 937 | il_clear_bit(il, CSR_HW_IF_CONFIG_REG, |
942 | CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE); | 938 | CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE); |
943 | } | 939 | } |
944 | 940 | ||
945 | if (eeprom->almgor_m_version <= 1) { | 941 | if (eeprom->almgor_m_version <= 1) { |
946 | il_set_bit(il, CSR_HW_IF_CONFIG_REG, | 942 | il_set_bit(il, CSR_HW_IF_CONFIG_REG, |
947 | CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_A); | 943 | CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_A); |
948 | D_INFO("Card M type A version is 0x%X\n", | 944 | D_INFO("Card M type A version is 0x%X\n", |
949 | eeprom->almgor_m_version); | 945 | eeprom->almgor_m_version); |
950 | } else { | 946 | } else { |
951 | D_INFO("Card M type B version is 0x%X\n", | 947 | D_INFO("Card M type B version is 0x%X\n", |
952 | eeprom->almgor_m_version); | 948 | eeprom->almgor_m_version); |
953 | il_set_bit(il, CSR_HW_IF_CONFIG_REG, | 949 | il_set_bit(il, CSR_HW_IF_CONFIG_REG, |
954 | CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_B); | 950 | CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_B); |
955 | } | 951 | } |
956 | spin_unlock_irqrestore(&il->lock, flags); | 952 | spin_unlock_irqrestore(&il->lock, flags); |
957 | 953 | ||
@@ -962,7 +958,8 @@ static void il3945_nic_config(struct il_priv *il) | |||
962 | D_RF_KILL("HW RF KILL supported in EEPROM.\n"); | 958 | D_RF_KILL("HW RF KILL supported in EEPROM.\n"); |
963 | } | 959 | } |
964 | 960 | ||
965 | int il3945_hw_nic_init(struct il_priv *il) | 961 | int |
962 | il3945_hw_nic_init(struct il_priv *il) | ||
966 | { | 963 | { |
967 | int rc; | 964 | int rc; |
968 | unsigned long flags; | 965 | unsigned long flags; |
@@ -990,11 +987,10 @@ int il3945_hw_nic_init(struct il_priv *il) | |||
990 | 987 | ||
991 | il3945_rx_init(il, rxq); | 988 | il3945_rx_init(il, rxq); |
992 | 989 | ||
993 | |||
994 | /* Look at using this instead: | 990 | /* Look at using this instead: |
995 | rxq->need_update = 1; | 991 | rxq->need_update = 1; |
996 | il_rx_queue_update_write_ptr(il, rxq); | 992 | il_rx_queue_update_write_ptr(il, rxq); |
997 | */ | 993 | */ |
998 | 994 | ||
999 | il_wr(il, FH39_RCSR_WPTR(0), rxq->write & ~7); | 995 | il_wr(il, FH39_RCSR_WPTR(0), rxq->write & ~7); |
1000 | 996 | ||
@@ -1012,14 +1008,14 @@ int il3945_hw_nic_init(struct il_priv *il) | |||
1012 | * | 1008 | * |
1013 | * Destroy all TX DMA queues and structures | 1009 | * Destroy all TX DMA queues and structures |
1014 | */ | 1010 | */ |
1015 | void il3945_hw_txq_ctx_free(struct il_priv *il) | 1011 | void |
1012 | il3945_hw_txq_ctx_free(struct il_priv *il) | ||
1016 | { | 1013 | { |
1017 | int txq_id; | 1014 | int txq_id; |
1018 | 1015 | ||
1019 | /* Tx queues */ | 1016 | /* Tx queues */ |
1020 | if (il->txq) | 1017 | if (il->txq) |
1021 | for (txq_id = 0; txq_id < il->hw_params.max_txq_num; | 1018 | for (txq_id = 0; txq_id < il->hw_params.max_txq_num; txq_id++) |
1022 | txq_id++) | ||
1023 | if (txq_id == IL39_CMD_QUEUE_NUM) | 1019 | if (txq_id == IL39_CMD_QUEUE_NUM) |
1024 | il_cmd_queue_free(il); | 1020 | il_cmd_queue_free(il); |
1025 | else | 1021 | else |
@@ -1029,7 +1025,8 @@ void il3945_hw_txq_ctx_free(struct il_priv *il) | |||
1029 | il_txq_mem(il); | 1025 | il_txq_mem(il); |
1030 | } | 1026 | } |
1031 | 1027 | ||
1032 | void il3945_hw_txq_ctx_stop(struct il_priv *il) | 1028 | void |
1029 | il3945_hw_txq_ctx_stop(struct il_priv *il) | ||
1033 | { | 1030 | { |
1034 | int txq_id; | 1031 | int txq_id; |
1035 | 1032 | ||
@@ -1041,8 +1038,8 @@ void il3945_hw_txq_ctx_stop(struct il_priv *il) | |||
1041 | for (txq_id = 0; txq_id < il->hw_params.max_txq_num; txq_id++) { | 1038 | for (txq_id = 0; txq_id < il->hw_params.max_txq_num; txq_id++) { |
1042 | il_wr(il, FH39_TCSR_CONFIG(txq_id), 0x0); | 1039 | il_wr(il, FH39_TCSR_CONFIG(txq_id), 0x0); |
1043 | il_poll_bit(il, FH39_TSSR_TX_STATUS, | 1040 | il_poll_bit(il, FH39_TSSR_TX_STATUS, |
1044 | FH39_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(txq_id), | 1041 | FH39_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(txq_id), |
1045 | 1000); | 1042 | 1000); |
1046 | } | 1043 | } |
1047 | 1044 | ||
1048 | il3945_hw_txq_ctx_free(il); | 1045 | il3945_hw_txq_ctx_free(il); |
@@ -1052,7 +1049,8 @@ void il3945_hw_txq_ctx_stop(struct il_priv *il) | |||
1052 | * il3945_hw_reg_adjust_power_by_temp | 1049 | * il3945_hw_reg_adjust_power_by_temp |
1053 | * return idx delta into power gain settings table | 1050 | * return idx delta into power gain settings table |
1054 | */ | 1051 | */ |
1055 | static int il3945_hw_reg_adjust_power_by_temp(int new_reading, int old_reading) | 1052 | static int |
1053 | il3945_hw_reg_adjust_power_by_temp(int new_reading, int old_reading) | ||
1056 | { | 1054 | { |
1057 | return (new_reading - old_reading) * (-11) / 100; | 1055 | return (new_reading - old_reading) * (-11) / 100; |
1058 | } | 1056 | } |
@@ -1060,12 +1058,14 @@ static int il3945_hw_reg_adjust_power_by_temp(int new_reading, int old_reading) | |||
1060 | /** | 1058 | /** |
1061 | * il3945_hw_reg_temp_out_of_range - Keep temperature in sane range | 1059 | * il3945_hw_reg_temp_out_of_range - Keep temperature in sane range |
1062 | */ | 1060 | */ |
1063 | static inline int il3945_hw_reg_temp_out_of_range(int temperature) | 1061 | static inline int |
1062 | il3945_hw_reg_temp_out_of_range(int temperature) | ||
1064 | { | 1063 | { |
1065 | return (temperature < -260 || temperature > 25) ? 1 : 0; | 1064 | return (temperature < -260 || temperature > 25) ? 1 : 0; |
1066 | } | 1065 | } |
1067 | 1066 | ||
1068 | int il3945_hw_get_temperature(struct il_priv *il) | 1067 | int |
1068 | il3945_hw_get_temperature(struct il_priv *il) | ||
1069 | { | 1069 | { |
1070 | return _il_rd(il, CSR_UCODE_DRV_GP2); | 1070 | return _il_rd(il, CSR_UCODE_DRV_GP2); |
1071 | } | 1071 | } |
@@ -1074,7 +1074,8 @@ int il3945_hw_get_temperature(struct il_priv *il) | |||
1074 | * il3945_hw_reg_txpower_get_temperature | 1074 | * il3945_hw_reg_txpower_get_temperature |
1075 | * get the current temperature by reading from NIC | 1075 | * get the current temperature by reading from NIC |
1076 | */ | 1076 | */ |
1077 | static int il3945_hw_reg_txpower_get_temperature(struct il_priv *il) | 1077 | static int |
1078 | il3945_hw_reg_txpower_get_temperature(struct il_priv *il) | ||
1078 | { | 1079 | { |
1079 | struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom; | 1080 | struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom; |
1080 | int temperature; | 1081 | int temperature; |
@@ -1093,7 +1094,7 @@ static int il3945_hw_reg_txpower_get_temperature(struct il_priv *il) | |||
1093 | * substitute the 3rd band/group's temp measured at factory */ | 1094 | * substitute the 3rd band/group's temp measured at factory */ |
1094 | if (il->last_temperature > 100) | 1095 | if (il->last_temperature > 100) |
1095 | temperature = eeprom->groups[2].temperature; | 1096 | temperature = eeprom->groups[2].temperature; |
1096 | else /* else use most recent "sane" value from driver */ | 1097 | else /* else use most recent "sane" value from driver */ |
1097 | temperature = il->last_temperature; | 1098 | temperature = il->last_temperature; |
1098 | } | 1099 | } |
1099 | 1100 | ||
@@ -1111,7 +1112,8 @@ static int il3945_hw_reg_txpower_get_temperature(struct il_priv *il) | |||
1111 | * records new temperature in tx_mgr->temperature. | 1112 | * records new temperature in tx_mgr->temperature. |
1112 | * replaces tx_mgr->last_temperature *only* if calib needed | 1113 | * replaces tx_mgr->last_temperature *only* if calib needed |
1113 | * (assumes caller will actually do the calibration!). */ | 1114 | * (assumes caller will actually do the calibration!). */ |
1114 | static int il3945_is_temp_calib_needed(struct il_priv *il) | 1115 | static int |
1116 | il3945_is_temp_calib_needed(struct il_priv *il) | ||
1115 | { | 1117 | { |
1116 | int temp_diff; | 1118 | int temp_diff; |
1117 | 1119 | ||
@@ -1226,7 +1228,7 @@ static struct il3945_tx_power power_gain_table[2][IL_MAX_GAIN_ENTRIES] = { | |||
1226 | {3, 113}, | 1228 | {3, 113}, |
1227 | {3, 106}, | 1229 | {3, 106}, |
1228 | {3, 102}, | 1230 | {3, 102}, |
1229 | {3, 95} }, /* 2.4 GHz, lowest power */ | 1231 | {3, 95}}, /* 2.4 GHz, lowest power */ |
1230 | { | 1232 | { |
1231 | {251, 127}, /* 5.x GHz, highest power */ | 1233 | {251, 127}, /* 5.x GHz, highest power */ |
1232 | {251, 120}, | 1234 | {251, 120}, |
@@ -1305,10 +1307,11 @@ static struct il3945_tx_power power_gain_table[2][IL_MAX_GAIN_ENTRIES] = { | |||
1305 | {35, 113}, | 1307 | {35, 113}, |
1306 | {35, 107}, | 1308 | {35, 107}, |
1307 | {35, 99}, | 1309 | {35, 99}, |
1308 | {3, 120} } /* 5.x GHz, lowest power */ | 1310 | {3, 120}} /* 5.x GHz, lowest power */ |
1309 | }; | 1311 | }; |
1310 | 1312 | ||
1311 | static inline u8 il3945_hw_reg_fix_power_idx(int idx) | 1313 | static inline u8 |
1314 | il3945_hw_reg_fix_power_idx(int idx) | ||
1312 | { | 1315 | { |
1313 | if (idx < 0) | 1316 | if (idx < 0) |
1314 | return 0; | 1317 | return 0; |
@@ -1326,10 +1329,10 @@ static inline u8 il3945_hw_reg_fix_power_idx(int idx) | |||
1326 | * Set (in our channel info database) the direct scan Tx power for 1 Mbit (CCK) | 1329 | * Set (in our channel info database) the direct scan Tx power for 1 Mbit (CCK) |
1327 | * or 6 Mbit (OFDM) rates. | 1330 | * or 6 Mbit (OFDM) rates. |
1328 | */ | 1331 | */ |
1329 | static void il3945_hw_reg_set_scan_power(struct il_priv *il, u32 scan_tbl_idx, | 1332 | static void |
1330 | s32 rate_idx, const s8 *clip_pwrs, | 1333 | il3945_hw_reg_set_scan_power(struct il_priv *il, u32 scan_tbl_idx, s32 rate_idx, |
1331 | struct il_channel_info *ch_info, | 1334 | const s8 * clip_pwrs, |
1332 | int band_idx) | 1335 | struct il_channel_info *ch_info, int band_idx) |
1333 | { | 1336 | { |
1334 | struct il3945_scan_power_info *scan_power_info; | 1337 | struct il3945_scan_power_info *scan_power_info; |
1335 | s8 power; | 1338 | s8 power; |
@@ -1350,9 +1353,13 @@ static void il3945_hw_reg_set_scan_power(struct il_priv *il, u32 scan_tbl_idx, | |||
1350 | * current "normal" temperature-compensated Tx power *idx* for | 1353 | * current "normal" temperature-compensated Tx power *idx* for |
1351 | * this rate (1Mb or 6Mb) to yield new temp-compensated scan power | 1354 | * this rate (1Mb or 6Mb) to yield new temp-compensated scan power |
1352 | * *idx*. */ | 1355 | * *idx*. */ |
1353 | power_idx = ch_info->power_info[rate_idx].power_table_idx | 1356 | power_idx = |
1354 | - (power - ch_info->power_info | 1357 | ch_info->power_info[rate_idx].power_table_idx - (power - |
1355 | [RATE_6M_IDX_TBL].requested_power) * 2; | 1358 | ch_info-> |
1359 | power_info | ||
1360 | [RATE_6M_IDX_TBL]. | ||
1361 | requested_power) * | ||
1362 | 2; | ||
1356 | 1363 | ||
1357 | /* store reference idx that we use when adjusting *all* scan | 1364 | /* store reference idx that we use when adjusting *all* scan |
1358 | * powers. So we can accommodate user (all channel) or spectrum | 1365 | * powers. So we can accommodate user (all channel) or spectrum |
@@ -1379,7 +1386,8 @@ static void il3945_hw_reg_set_scan_power(struct il_priv *il, u32 scan_tbl_idx, | |||
1379 | * Configures power settings for all rates for the current channel, | 1386 | * Configures power settings for all rates for the current channel, |
1380 | * using values from channel info struct, and send to NIC | 1387 | * using values from channel info struct, and send to NIC |
1381 | */ | 1388 | */ |
1382 | static int il3945_send_tx_power(struct il_priv *il) | 1389 | static int |
1390 | il3945_send_tx_power(struct il_priv *il) | ||
1383 | { | 1391 | { |
1384 | int rate_idx, i; | 1392 | int rate_idx, i; |
1385 | const struct il_channel_info *ch_info = NULL; | 1393 | const struct il_channel_info *ch_info = NULL; |
@@ -1388,8 +1396,9 @@ static int il3945_send_tx_power(struct il_priv *il) | |||
1388 | }; | 1396 | }; |
1389 | u16 chan; | 1397 | u16 chan; |
1390 | 1398 | ||
1391 | if (WARN_ONCE(test_bit(S_SCAN_HW, &il->status), | 1399 | if (WARN_ONCE |
1392 | "TX Power requested while scanning!\n")) | 1400 | (test_bit(S_SCAN_HW, &il->status), |
1401 | "TX Power requested while scanning!\n")) | ||
1393 | return -EAGAIN; | 1402 | return -EAGAIN; |
1394 | 1403 | ||
1395 | chan = le16_to_cpu(il->ctx.active.channel); | 1404 | chan = le16_to_cpu(il->ctx.active.channel); |
@@ -1397,15 +1406,13 @@ static int il3945_send_tx_power(struct il_priv *il) | |||
1397 | txpower.band = (il->band == IEEE80211_BAND_5GHZ) ? 0 : 1; | 1406 | txpower.band = (il->band == IEEE80211_BAND_5GHZ) ? 0 : 1; |
1398 | ch_info = il_get_channel_info(il, il->band, chan); | 1407 | ch_info = il_get_channel_info(il, il->band, chan); |
1399 | if (!ch_info) { | 1408 | if (!ch_info) { |
1400 | IL_ERR( | 1409 | IL_ERR("Failed to get channel info for channel %d [%d]\n", chan, |
1401 | "Failed to get channel info for channel %d [%d]\n", | 1410 | il->band); |
1402 | chan, il->band); | ||
1403 | return -EINVAL; | 1411 | return -EINVAL; |
1404 | } | 1412 | } |
1405 | 1413 | ||
1406 | if (!il_is_channel_valid(ch_info)) { | 1414 | if (!il_is_channel_valid(ch_info)) { |
1407 | D_POWER("Not calling TX_PWR_TBL_CMD on " | 1415 | D_POWER("Not calling TX_PWR_TBL_CMD on " "non-Tx channel.\n"); |
1408 | "non-Tx channel.\n"); | ||
1409 | return 0; | 1416 | return 0; |
1410 | } | 1417 | } |
1411 | 1418 | ||
@@ -1418,29 +1425,25 @@ static int il3945_send_tx_power(struct il_priv *il) | |||
1418 | txpower.power[i].rate = il3945_rates[rate_idx].plcp; | 1425 | txpower.power[i].rate = il3945_rates[rate_idx].plcp; |
1419 | 1426 | ||
1420 | D_POWER("ch %d:%d rf %d dsp %3d rate code 0x%02x\n", | 1427 | D_POWER("ch %d:%d rf %d dsp %3d rate code 0x%02x\n", |
1421 | le16_to_cpu(txpower.channel), | 1428 | le16_to_cpu(txpower.channel), txpower.band, |
1422 | txpower.band, | 1429 | txpower.power[i].tpc.tx_gain, |
1423 | txpower.power[i].tpc.tx_gain, | 1430 | txpower.power[i].tpc.dsp_atten, txpower.power[i].rate); |
1424 | txpower.power[i].tpc.dsp_atten, | ||
1425 | txpower.power[i].rate); | ||
1426 | } | 1431 | } |
1427 | /* Fill CCK rates */ | 1432 | /* Fill CCK rates */ |
1428 | for (rate_idx = IL_FIRST_CCK_RATE; | 1433 | for (rate_idx = IL_FIRST_CCK_RATE; rate_idx <= IL_LAST_CCK_RATE; |
1429 | rate_idx <= IL_LAST_CCK_RATE; rate_idx++, i++) { | 1434 | rate_idx++, i++) { |
1430 | txpower.power[i].tpc = ch_info->power_info[i].tpc; | 1435 | txpower.power[i].tpc = ch_info->power_info[i].tpc; |
1431 | txpower.power[i].rate = il3945_rates[rate_idx].plcp; | 1436 | txpower.power[i].rate = il3945_rates[rate_idx].plcp; |
1432 | 1437 | ||
1433 | D_POWER("ch %d:%d rf %d dsp %3d rate code 0x%02x\n", | 1438 | D_POWER("ch %d:%d rf %d dsp %3d rate code 0x%02x\n", |
1434 | le16_to_cpu(txpower.channel), | 1439 | le16_to_cpu(txpower.channel), txpower.band, |
1435 | txpower.band, | 1440 | txpower.power[i].tpc.tx_gain, |
1436 | txpower.power[i].tpc.tx_gain, | 1441 | txpower.power[i].tpc.dsp_atten, txpower.power[i].rate); |
1437 | txpower.power[i].tpc.dsp_atten, | ||
1438 | txpower.power[i].rate); | ||
1439 | } | 1442 | } |
1440 | 1443 | ||
1441 | return il_send_cmd_pdu(il, C_TX_PWR_TBL, | 1444 | return il_send_cmd_pdu(il, C_TX_PWR_TBL, |
1442 | sizeof(struct il3945_txpowertable_cmd), | 1445 | sizeof(struct il3945_txpowertable_cmd), |
1443 | &txpower); | 1446 | &txpower); |
1444 | 1447 | ||
1445 | } | 1448 | } |
1446 | 1449 | ||
@@ -1460,8 +1463,8 @@ static int il3945_send_tx_power(struct il_priv *il) | |||
1460 | * properly fill out the scan powers, and actual h/w gain settings, | 1463 | * properly fill out the scan powers, and actual h/w gain settings, |
1461 | * and send changes to NIC | 1464 | * and send changes to NIC |
1462 | */ | 1465 | */ |
1463 | static int il3945_hw_reg_set_new_power(struct il_priv *il, | 1466 | static int |
1464 | struct il_channel_info *ch_info) | 1467 | il3945_hw_reg_set_new_power(struct il_priv *il, struct il_channel_info *ch_info) |
1465 | { | 1468 | { |
1466 | struct il3945_channel_power_info *power_info; | 1469 | struct il3945_channel_power_info *power_info; |
1467 | int power_changed = 0; | 1470 | int power_changed = 0; |
@@ -1476,8 +1479,7 @@ static int il3945_hw_reg_set_new_power(struct il_priv *il, | |||
1476 | power_info = ch_info->power_info; | 1479 | power_info = ch_info->power_info; |
1477 | 1480 | ||
1478 | /* update OFDM Txpower settings */ | 1481 | /* update OFDM Txpower settings */ |
1479 | for (i = RATE_6M_IDX_TBL; i <= RATE_54M_IDX_TBL; | 1482 | for (i = RATE_6M_IDX_TBL; i <= RATE_54M_IDX_TBL; i++, ++power_info) { |
1480 | i++, ++power_info) { | ||
1481 | int delta_idx; | 1483 | int delta_idx; |
1482 | 1484 | ||
1483 | /* limit new power to be no more than h/w capability */ | 1485 | /* limit new power to be no more than h/w capability */ |
@@ -1500,8 +1502,8 @@ static int il3945_hw_reg_set_new_power(struct il_priv *il, | |||
1500 | * ... all CCK power settings for a given channel are the *same*. */ | 1502 | * ... all CCK power settings for a given channel are the *same*. */ |
1501 | if (power_changed) { | 1503 | if (power_changed) { |
1502 | power = | 1504 | power = |
1503 | ch_info->power_info[RATE_12M_IDX_TBL]. | 1505 | ch_info->power_info[RATE_12M_IDX_TBL].requested_power + |
1504 | requested_power + IL_CCK_FROM_OFDM_POWER_DIFF; | 1506 | IL_CCK_FROM_OFDM_POWER_DIFF; |
1505 | 1507 | ||
1506 | /* do all CCK rates' il3945_channel_power_info structures */ | 1508 | /* do all CCK rates' il3945_channel_power_info structures */ |
1507 | for (i = RATE_1M_IDX_TBL; i <= RATE_11M_IDX_TBL; i++) { | 1509 | for (i = RATE_1M_IDX_TBL; i <= RATE_11M_IDX_TBL; i++) { |
@@ -1523,15 +1525,17 @@ static int il3945_hw_reg_set_new_power(struct il_priv *il, | |||
1523 | * based strictly on regulatory (eeprom and spectrum mgt) limitations | 1525 | * based strictly on regulatory (eeprom and spectrum mgt) limitations |
1524 | * (no consideration for h/w clipping limitations). | 1526 | * (no consideration for h/w clipping limitations). |
1525 | */ | 1527 | */ |
1526 | static int il3945_hw_reg_get_ch_txpower_limit(struct il_channel_info *ch_info) | 1528 | static int |
1529 | il3945_hw_reg_get_ch_txpower_limit(struct il_channel_info *ch_info) | ||
1527 | { | 1530 | { |
1528 | s8 max_power; | 1531 | s8 max_power; |
1529 | 1532 | ||
1530 | #if 0 | 1533 | #if 0 |
1531 | /* if we're using TGd limits, use lower of TGd or EEPROM */ | 1534 | /* if we're using TGd limits, use lower of TGd or EEPROM */ |
1532 | if (ch_info->tgd_data.max_power != 0) | 1535 | if (ch_info->tgd_data.max_power != 0) |
1533 | max_power = min(ch_info->tgd_data.max_power, | 1536 | max_power = |
1534 | ch_info->eeprom.max_power_avg); | 1537 | min(ch_info->tgd_data.max_power, |
1538 | ch_info->eeprom.max_power_avg); | ||
1535 | 1539 | ||
1536 | /* else just use EEPROM limits */ | 1540 | /* else just use EEPROM limits */ |
1537 | else | 1541 | else |
@@ -1551,12 +1555,13 @@ static int il3945_hw_reg_get_ch_txpower_limit(struct il_channel_info *ch_info) | |||
1551 | * | 1555 | * |
1552 | * If RxOn is "associated", this sends the new Txpower to NIC! | 1556 | * If RxOn is "associated", this sends the new Txpower to NIC! |
1553 | */ | 1557 | */ |
1554 | static int il3945_hw_reg_comp_txpower_temp(struct il_priv *il) | 1558 | static int |
1559 | il3945_hw_reg_comp_txpower_temp(struct il_priv *il) | ||
1555 | { | 1560 | { |
1556 | struct il_channel_info *ch_info = NULL; | 1561 | struct il_channel_info *ch_info = NULL; |
1557 | struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom; | 1562 | struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom; |
1558 | int delta_idx; | 1563 | int delta_idx; |
1559 | const s8 *clip_pwrs; /* array of h/w max power levels for each rate */ | 1564 | const s8 *clip_pwrs; /* array of h/w max power levels for each rate */ |
1560 | u8 a_band; | 1565 | u8 a_band; |
1561 | u8 rate_idx; | 1566 | u8 rate_idx; |
1562 | u8 scan_tbl_idx; | 1567 | u8 scan_tbl_idx; |
@@ -1564,8 +1569,7 @@ static int il3945_hw_reg_comp_txpower_temp(struct il_priv *il) | |||
1564 | int ref_temp; | 1569 | int ref_temp; |
1565 | int temperature = il->temperature; | 1570 | int temperature = il->temperature; |
1566 | 1571 | ||
1567 | if (il->disable_tx_power_cal || | 1572 | if (il->disable_tx_power_cal || test_bit(S_SCANNING, &il->status)) { |
1568 | test_bit(S_SCANNING, &il->status)) { | ||
1569 | /* do not perform tx power calibration */ | 1573 | /* do not perform tx power calibration */ |
1570 | return 0; | 1574 | return 0; |
1571 | } | 1575 | } |
@@ -1575,17 +1579,15 @@ static int il3945_hw_reg_comp_txpower_temp(struct il_priv *il) | |||
1575 | a_band = il_is_channel_a_band(ch_info); | 1579 | a_band = il_is_channel_a_band(ch_info); |
1576 | 1580 | ||
1577 | /* Get this chnlgrp's factory calibration temperature */ | 1581 | /* Get this chnlgrp's factory calibration temperature */ |
1578 | ref_temp = (s16)eeprom->groups[ch_info->group_idx]. | 1582 | ref_temp = (s16) eeprom->groups[ch_info->group_idx].temperature; |
1579 | temperature; | ||
1580 | 1583 | ||
1581 | /* get power idx adjustment based on current and factory | 1584 | /* get power idx adjustment based on current and factory |
1582 | * temps */ | 1585 | * temps */ |
1583 | delta_idx = il3945_hw_reg_adjust_power_by_temp(temperature, | 1586 | delta_idx = |
1584 | ref_temp); | 1587 | il3945_hw_reg_adjust_power_by_temp(temperature, ref_temp); |
1585 | 1588 | ||
1586 | /* set tx power value for all rates, OFDM and CCK */ | 1589 | /* set tx power value for all rates, OFDM and CCK */ |
1587 | for (rate_idx = 0; rate_idx < RATE_COUNT_3945; | 1590 | for (rate_idx = 0; rate_idx < RATE_COUNT_3945; rate_idx++) { |
1588 | rate_idx++) { | ||
1589 | int power_idx = | 1591 | int power_idx = |
1590 | ch_info->power_info[rate_idx].base_power_idx; | 1592 | ch_info->power_info[rate_idx].base_power_idx; |
1591 | 1593 | ||
@@ -1594,23 +1596,25 @@ static int il3945_hw_reg_comp_txpower_temp(struct il_priv *il) | |||
1594 | 1596 | ||
1595 | /* stay within table range */ | 1597 | /* stay within table range */ |
1596 | power_idx = il3945_hw_reg_fix_power_idx(power_idx); | 1598 | power_idx = il3945_hw_reg_fix_power_idx(power_idx); |
1597 | ch_info->power_info[rate_idx]. | 1599 | ch_info->power_info[rate_idx].power_table_idx = |
1598 | power_table_idx = (u8) power_idx; | 1600 | (u8) power_idx; |
1599 | ch_info->power_info[rate_idx].tpc = | 1601 | ch_info->power_info[rate_idx].tpc = |
1600 | power_gain_table[a_band][power_idx]; | 1602 | power_gain_table[a_band][power_idx]; |
1601 | } | 1603 | } |
1602 | 1604 | ||
1603 | /* Get this chnlgrp's rate-to-max/clip-powers table */ | 1605 | /* Get this chnlgrp's rate-to-max/clip-powers table */ |
1604 | clip_pwrs = il->_3945.clip_groups[ch_info->group_idx].clip_powers; | 1606 | clip_pwrs = |
1607 | il->_3945.clip_groups[ch_info->group_idx].clip_powers; | ||
1605 | 1608 | ||
1606 | /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */ | 1609 | /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */ |
1607 | for (scan_tbl_idx = 0; | 1610 | for (scan_tbl_idx = 0; scan_tbl_idx < IL_NUM_SCAN_RATES; |
1608 | scan_tbl_idx < IL_NUM_SCAN_RATES; scan_tbl_idx++) { | 1611 | scan_tbl_idx++) { |
1609 | s32 actual_idx = (scan_tbl_idx == 0) ? | 1612 | s32 actual_idx = |
1610 | RATE_1M_IDX_TBL : RATE_6M_IDX_TBL; | 1613 | (scan_tbl_idx == |
1614 | 0) ? RATE_1M_IDX_TBL : RATE_6M_IDX_TBL; | ||
1611 | il3945_hw_reg_set_scan_power(il, scan_tbl_idx, | 1615 | il3945_hw_reg_set_scan_power(il, scan_tbl_idx, |
1612 | actual_idx, clip_pwrs, | 1616 | actual_idx, clip_pwrs, |
1613 | ch_info, a_band); | 1617 | ch_info, a_band); |
1614 | } | 1618 | } |
1615 | } | 1619 | } |
1616 | 1620 | ||
@@ -1618,7 +1622,8 @@ static int il3945_hw_reg_comp_txpower_temp(struct il_priv *il) | |||
1618 | return il->cfg->ops->lib->send_tx_power(il); | 1622 | return il->cfg->ops->lib->send_tx_power(il); |
1619 | } | 1623 | } |
1620 | 1624 | ||
1621 | int il3945_hw_reg_set_txpower(struct il_priv *il, s8 power) | 1625 | int |
1626 | il3945_hw_reg_set_txpower(struct il_priv *il, s8 power) | ||
1622 | { | 1627 | { |
1623 | struct il_channel_info *ch_info; | 1628 | struct il_channel_info *ch_info; |
1624 | s8 max_power; | 1629 | s8 max_power; |
@@ -1626,8 +1631,8 @@ int il3945_hw_reg_set_txpower(struct il_priv *il, s8 power) | |||
1626 | u8 i; | 1631 | u8 i; |
1627 | 1632 | ||
1628 | if (il->tx_power_user_lmt == power) { | 1633 | if (il->tx_power_user_lmt == power) { |
1629 | D_POWER("Requested Tx power same as current " | 1634 | D_POWER("Requested Tx power same as current " "limit: %ddBm.\n", |
1630 | "limit: %ddBm.\n", power); | 1635 | power); |
1631 | return 0; | 1636 | return 0; |
1632 | } | 1637 | } |
1633 | 1638 | ||
@@ -1660,8 +1665,8 @@ int il3945_hw_reg_set_txpower(struct il_priv *il, s8 power) | |||
1660 | return 0; | 1665 | return 0; |
1661 | } | 1666 | } |
1662 | 1667 | ||
1663 | static int il3945_send_rxon_assoc(struct il_priv *il, | 1668 | static int |
1664 | struct il_rxon_context *ctx) | 1669 | il3945_send_rxon_assoc(struct il_priv *il, struct il_rxon_context *ctx) |
1665 | { | 1670 | { |
1666 | int rc = 0; | 1671 | int rc = 0; |
1667 | struct il_rx_pkt *pkt; | 1672 | struct il_rx_pkt *pkt; |
@@ -1712,7 +1717,8 @@ static int il3945_send_rxon_assoc(struct il_priv *il, | |||
1712 | * function correctly transitions out of the RXON_ASSOC_MSK state if | 1717 | * function correctly transitions out of the RXON_ASSOC_MSK state if |
1713 | * a HW tune is required based on the RXON structure changes. | 1718 | * a HW tune is required based on the RXON structure changes. |
1714 | */ | 1719 | */ |
1715 | int il3945_commit_rxon(struct il_priv *il, struct il_rxon_context *ctx) | 1720 | int |
1721 | il3945_commit_rxon(struct il_priv *il, struct il_rxon_context *ctx) | ||
1716 | { | 1722 | { |
1717 | /* cast away the const for active_rxon in this function */ | 1723 | /* cast away the const for active_rxon in this function */ |
1718 | struct il3945_rxon_cmd *active_rxon = (void *)&ctx->active; | 1724 | struct il3945_rxon_cmd *active_rxon = (void *)&ctx->active; |
@@ -1730,8 +1736,7 @@ int il3945_commit_rxon(struct il_priv *il, struct il_rxon_context *ctx) | |||
1730 | staging_rxon->flags |= RXON_FLG_TSF2HOST_MSK; | 1736 | staging_rxon->flags |= RXON_FLG_TSF2HOST_MSK; |
1731 | 1737 | ||
1732 | /* select antenna */ | 1738 | /* select antenna */ |
1733 | staging_rxon->flags &= | 1739 | staging_rxon->flags &= ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK); |
1734 | ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK); | ||
1735 | staging_rxon->flags |= il3945_get_antenna_flags(il); | 1740 | staging_rxon->flags |= il3945_get_antenna_flags(il); |
1736 | 1741 | ||
1737 | rc = il_check_rxon_cmd(il, ctx); | 1742 | rc = il_check_rxon_cmd(il, ctx); |
@@ -1743,13 +1748,11 @@ int il3945_commit_rxon(struct il_priv *il, struct il_rxon_context *ctx) | |||
1743 | /* If we don't need to send a full RXON, we can use | 1748 | /* If we don't need to send a full RXON, we can use |
1744 | * il3945_rxon_assoc_cmd which is used to reconfigure filter | 1749 | * il3945_rxon_assoc_cmd which is used to reconfigure filter |
1745 | * and other flags for the current radio configuration. */ | 1750 | * and other flags for the current radio configuration. */ |
1746 | if (!il_full_rxon_required(il, | 1751 | if (!il_full_rxon_required(il, &il->ctx)) { |
1747 | &il->ctx)) { | 1752 | rc = il_send_rxon_assoc(il, &il->ctx); |
1748 | rc = il_send_rxon_assoc(il, | ||
1749 | &il->ctx); | ||
1750 | if (rc) { | 1753 | if (rc) { |
1751 | IL_ERR("Error setting RXON_ASSOC " | 1754 | IL_ERR("Error setting RXON_ASSOC " |
1752 | "configuration (%d).\n", rc); | 1755 | "configuration (%d).\n", rc); |
1753 | return rc; | 1756 | return rc; |
1754 | } | 1757 | } |
1755 | 1758 | ||
@@ -1776,31 +1779,24 @@ int il3945_commit_rxon(struct il_priv *il, struct il_rxon_context *ctx) | |||
1776 | */ | 1779 | */ |
1777 | active_rxon->reserved4 = 0; | 1780 | active_rxon->reserved4 = 0; |
1778 | active_rxon->reserved5 = 0; | 1781 | active_rxon->reserved5 = 0; |
1779 | rc = il_send_cmd_pdu(il, C_RXON, | 1782 | rc = il_send_cmd_pdu(il, C_RXON, sizeof(struct il3945_rxon_cmd), |
1780 | sizeof(struct il3945_rxon_cmd), | 1783 | &il->ctx.active); |
1781 | &il->ctx.active); | ||
1782 | 1784 | ||
1783 | /* If the mask clearing failed then we set | 1785 | /* If the mask clearing failed then we set |
1784 | * active_rxon back to what it was previously */ | 1786 | * active_rxon back to what it was previously */ |
1785 | if (rc) { | 1787 | if (rc) { |
1786 | active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK; | 1788 | active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK; |
1787 | IL_ERR("Error clearing ASSOC_MSK on current " | 1789 | IL_ERR("Error clearing ASSOC_MSK on current " |
1788 | "configuration (%d).\n", rc); | 1790 | "configuration (%d).\n", rc); |
1789 | return rc; | 1791 | return rc; |
1790 | } | 1792 | } |
1791 | il_clear_ucode_stations(il, | 1793 | il_clear_ucode_stations(il, &il->ctx); |
1792 | &il->ctx); | 1794 | il_restore_stations(il, &il->ctx); |
1793 | il_restore_stations(il, | ||
1794 | &il->ctx); | ||
1795 | } | 1795 | } |
1796 | 1796 | ||
1797 | D_INFO("Sending RXON\n" | 1797 | D_INFO("Sending RXON\n" "* with%s RXON_FILTER_ASSOC_MSK\n" |
1798 | "* with%s RXON_FILTER_ASSOC_MSK\n" | 1798 | "* channel = %d\n" "* bssid = %pM\n", (new_assoc ? "" : "out"), |
1799 | "* channel = %d\n" | 1799 | le16_to_cpu(staging_rxon->channel), staging_rxon->bssid_addr); |
1800 | "* bssid = %pM\n", | ||
1801 | (new_assoc ? "" : "out"), | ||
1802 | le16_to_cpu(staging_rxon->channel), | ||
1803 | staging_rxon->bssid_addr); | ||
1804 | 1800 | ||
1805 | /* | 1801 | /* |
1806 | * reserved4 and 5 could have been filled by the iwlcore code. | 1802 | * reserved4 and 5 could have been filled by the iwlcore code. |
@@ -1812,9 +1808,8 @@ int il3945_commit_rxon(struct il_priv *il, struct il_rxon_context *ctx) | |||
1812 | il_set_rxon_hwcrypto(il, ctx, !il3945_mod_params.sw_crypto); | 1808 | il_set_rxon_hwcrypto(il, ctx, !il3945_mod_params.sw_crypto); |
1813 | 1809 | ||
1814 | /* Apply the new configuration */ | 1810 | /* Apply the new configuration */ |
1815 | rc = il_send_cmd_pdu(il, C_RXON, | 1811 | rc = il_send_cmd_pdu(il, C_RXON, sizeof(struct il3945_rxon_cmd), |
1816 | sizeof(struct il3945_rxon_cmd), | 1812 | staging_rxon); |
1817 | staging_rxon); | ||
1818 | if (rc) { | 1813 | if (rc) { |
1819 | IL_ERR("Error setting new configuration (%d).\n", rc); | 1814 | IL_ERR("Error setting new configuration (%d).\n", rc); |
1820 | return rc; | 1815 | return rc; |
@@ -1823,10 +1818,8 @@ int il3945_commit_rxon(struct il_priv *il, struct il_rxon_context *ctx) | |||
1823 | memcpy(active_rxon, staging_rxon, sizeof(*active_rxon)); | 1818 | memcpy(active_rxon, staging_rxon, sizeof(*active_rxon)); |
1824 | 1819 | ||
1825 | if (!new_assoc) { | 1820 | if (!new_assoc) { |
1826 | il_clear_ucode_stations(il, | 1821 | il_clear_ucode_stations(il, &il->ctx); |
1827 | &il->ctx); | 1822 | il_restore_stations(il, &il->ctx); |
1828 | il_restore_stations(il, | ||
1829 | &il->ctx); | ||
1830 | } | 1823 | } |
1831 | 1824 | ||
1832 | /* If we issue a new RXON command which required a tune then we must | 1825 | /* If we issue a new RXON command which required a tune then we must |
@@ -1857,7 +1850,8 @@ int il3945_commit_rxon(struct il_priv *il, struct il_rxon_context *ctx) | |||
1857 | * -- send new set of gain settings to NIC | 1850 | * -- send new set of gain settings to NIC |
1858 | * NOTE: This should continue working, even when we're not associated, | 1851 | * NOTE: This should continue working, even when we're not associated, |
1859 | * so we can keep our internal table of scan powers current. */ | 1852 | * so we can keep our internal table of scan powers current. */ |
1860 | void il3945_reg_txpower_periodic(struct il_priv *il) | 1853 | void |
1854 | il3945_reg_txpower_periodic(struct il_priv *il) | ||
1861 | { | 1855 | { |
1862 | /* This will kick in the "brute force" | 1856 | /* This will kick in the "brute force" |
1863 | * il3945_hw_reg_comp_txpower_temp() below */ | 1857 | * il3945_hw_reg_comp_txpower_temp() below */ |
@@ -1869,15 +1863,16 @@ void il3945_reg_txpower_periodic(struct il_priv *il) | |||
1869 | * ignoring any previous power measurements */ | 1863 | * ignoring any previous power measurements */ |
1870 | il3945_hw_reg_comp_txpower_temp(il); | 1864 | il3945_hw_reg_comp_txpower_temp(il); |
1871 | 1865 | ||
1872 | reschedule: | 1866 | reschedule: |
1873 | queue_delayed_work(il->workqueue, | 1867 | queue_delayed_work(il->workqueue, &il->_3945.thermal_periodic, |
1874 | &il->_3945.thermal_periodic, REG_RECALIB_PERIOD * HZ); | 1868 | REG_RECALIB_PERIOD * HZ); |
1875 | } | 1869 | } |
1876 | 1870 | ||
1877 | static void il3945_bg_reg_txpower_periodic(struct work_struct *work) | 1871 | static void |
1872 | il3945_bg_reg_txpower_periodic(struct work_struct *work) | ||
1878 | { | 1873 | { |
1879 | struct il_priv *il = container_of(work, struct il_priv, | 1874 | struct il_priv *il = container_of(work, struct il_priv, |
1880 | _3945.thermal_periodic.work); | 1875 | _3945.thermal_periodic.work); |
1881 | 1876 | ||
1882 | if (test_bit(S_EXIT_PENDING, &il->status)) | 1877 | if (test_bit(S_EXIT_PENDING, &il->status)) |
1883 | return; | 1878 | return; |
@@ -1898,8 +1893,9 @@ static void il3945_bg_reg_txpower_periodic(struct work_struct *work) | |||
1898 | * on A-band, EEPROM's "group frequency" entries represent the top | 1893 | * on A-band, EEPROM's "group frequency" entries represent the top |
1899 | * channel in each group 1-4. Group 5 All B/G channels are in group 0. | 1894 | * channel in each group 1-4. Group 5 All B/G channels are in group 0. |
1900 | */ | 1895 | */ |
1901 | static u16 il3945_hw_reg_get_ch_grp_idx(struct il_priv *il, | 1896 | static u16 |
1902 | const struct il_channel_info *ch_info) | 1897 | il3945_hw_reg_get_ch_grp_idx(struct il_priv *il, |
1898 | const struct il_channel_info *ch_info) | ||
1903 | { | 1899 | { |
1904 | struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom; | 1900 | struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom; |
1905 | struct il3945_eeprom_txpower_group *ch_grp = &eeprom->groups[0]; | 1901 | struct il3945_eeprom_txpower_group *ch_grp = &eeprom->groups[0]; |
@@ -1922,8 +1918,7 @@ static u16 il3945_hw_reg_get_ch_grp_idx(struct il_priv *il, | |||
1922 | } else | 1918 | } else |
1923 | group_idx = 0; /* 2.4 GHz, group 0 */ | 1919 | group_idx = 0; /* 2.4 GHz, group 0 */ |
1924 | 1920 | ||
1925 | D_POWER("Chnl %d mapped to grp %d\n", ch_info->channel, | 1921 | D_POWER("Chnl %d mapped to grp %d\n", ch_info->channel, group_idx); |
1926 | group_idx); | ||
1927 | return group_idx; | 1922 | return group_idx; |
1928 | } | 1923 | } |
1929 | 1924 | ||
@@ -1933,9 +1928,9 @@ static u16 il3945_hw_reg_get_ch_grp_idx(struct il_priv *il, | |||
1933 | * Interpolate to get nominal (i.e. at factory calibration temperature) idx | 1928 | * Interpolate to get nominal (i.e. at factory calibration temperature) idx |
1934 | * into radio/DSP gain settings table for requested power. | 1929 | * into radio/DSP gain settings table for requested power. |
1935 | */ | 1930 | */ |
1936 | static int il3945_hw_reg_get_matched_power_idx(struct il_priv *il, | 1931 | static int |
1937 | s8 requested_power, | 1932 | il3945_hw_reg_get_matched_power_idx(struct il_priv *il, s8 requested_power, |
1938 | s32 setting_idx, s32 *new_idx) | 1933 | s32 setting_idx, s32 * new_idx) |
1939 | { | 1934 | { |
1940 | const struct il3945_eeprom_txpower_group *chnl_grp = NULL; | 1935 | const struct il3945_eeprom_txpower_group *chnl_grp = NULL; |
1941 | struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom; | 1936 | struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom; |
@@ -1975,14 +1970,16 @@ static int il3945_hw_reg_get_matched_power_idx(struct il_priv *il, | |||
1975 | return -EINVAL; | 1970 | return -EINVAL; |
1976 | gains0 = (s32) samples[idx0].gain_idx * (1 << 19); | 1971 | gains0 = (s32) samples[idx0].gain_idx * (1 << 19); |
1977 | gains1 = (s32) samples[idx1].gain_idx * (1 << 19); | 1972 | gains1 = (s32) samples[idx1].gain_idx * (1 << 19); |
1978 | res = gains0 + (gains1 - gains0) * | 1973 | res = |
1979 | ((s32) power - (s32) samples[idx0].power) / denominator + | 1974 | gains0 + (gains1 - gains0) * ((s32) power - |
1980 | (1 << 18); | 1975 | (s32) samples[idx0].power) / |
1976 | denominator + (1 << 18); | ||
1981 | *new_idx = res >> 19; | 1977 | *new_idx = res >> 19; |
1982 | return 0; | 1978 | return 0; |
1983 | } | 1979 | } |
1984 | 1980 | ||
1985 | static void il3945_hw_reg_init_channel_groups(struct il_priv *il) | 1981 | static void |
1982 | il3945_hw_reg_init_channel_groups(struct il_priv *il) | ||
1986 | { | 1983 | { |
1987 | u32 i; | 1984 | u32 i; |
1988 | s32 rate_idx; | 1985 | s32 rate_idx; |
@@ -1999,8 +1996,8 @@ static void il3945_hw_reg_init_channel_groups(struct il_priv *il) | |||
1999 | /* sanity check on factory saturation power value */ | 1996 | /* sanity check on factory saturation power value */ |
2000 | if (group->saturation_power < 40) { | 1997 | if (group->saturation_power < 40) { |
2001 | IL_WARN("Error: saturation power is %d, " | 1998 | IL_WARN("Error: saturation power is %d, " |
2002 | "less than minimum expected 40\n", | 1999 | "less than minimum expected 40\n", |
2003 | group->saturation_power); | 2000 | group->saturation_power); |
2004 | return; | 2001 | return; |
2005 | } | 2002 | } |
2006 | 2003 | ||
@@ -2019,8 +2016,8 @@ static void il3945_hw_reg_init_channel_groups(struct il_priv *il) | |||
2019 | satur_pwr = (s8) (group->saturation_power >> 1); | 2016 | satur_pwr = (s8) (group->saturation_power >> 1); |
2020 | 2017 | ||
2021 | /* fill in channel group's nominal powers for each rate */ | 2018 | /* fill in channel group's nominal powers for each rate */ |
2022 | for (rate_idx = 0; | 2019 | for (rate_idx = 0; rate_idx < RATE_COUNT_3945; |
2023 | rate_idx < RATE_COUNT_3945; rate_idx++, clip_pwrs++) { | 2020 | rate_idx++, clip_pwrs++) { |
2024 | switch (rate_idx) { | 2021 | switch (rate_idx) { |
2025 | case RATE_36M_IDX_TBL: | 2022 | case RATE_36M_IDX_TBL: |
2026 | if (i == 0) /* B/G */ | 2023 | if (i == 0) /* B/G */ |
@@ -2063,7 +2060,8 @@ static void il3945_hw_reg_init_channel_groups(struct il_priv *il) | |||
2063 | * | 2060 | * |
2064 | * This does *not* write values to NIC, just sets up our internal table. | 2061 | * This does *not* write values to NIC, just sets up our internal table. |
2065 | */ | 2062 | */ |
2066 | int il3945_txpower_set_from_eeprom(struct il_priv *il) | 2063 | int |
2064 | il3945_txpower_set_from_eeprom(struct il_priv *il) | ||
2067 | { | 2065 | { |
2068 | struct il_channel_info *ch_info = NULL; | 2066 | struct il_channel_info *ch_info = NULL; |
2069 | struct il3945_channel_power_info *pwr_info; | 2067 | struct il3945_channel_power_info *pwr_info; |
@@ -2093,25 +2091,25 @@ int il3945_txpower_set_from_eeprom(struct il_priv *il) | |||
2093 | continue; | 2091 | continue; |
2094 | 2092 | ||
2095 | /* find this channel's channel group (*not* "band") idx */ | 2093 | /* find this channel's channel group (*not* "band") idx */ |
2096 | ch_info->group_idx = | 2094 | ch_info->group_idx = il3945_hw_reg_get_ch_grp_idx(il, ch_info); |
2097 | il3945_hw_reg_get_ch_grp_idx(il, ch_info); | ||
2098 | 2095 | ||
2099 | /* Get this chnlgrp's rate->max/clip-powers table */ | 2096 | /* Get this chnlgrp's rate->max/clip-powers table */ |
2100 | clip_pwrs = il->_3945.clip_groups[ch_info->group_idx].clip_powers; | 2097 | clip_pwrs = |
2098 | il->_3945.clip_groups[ch_info->group_idx].clip_powers; | ||
2101 | 2099 | ||
2102 | /* calculate power idx *adjustment* value according to | 2100 | /* calculate power idx *adjustment* value according to |
2103 | * diff between current temperature and factory temperature */ | 2101 | * diff between current temperature and factory temperature */ |
2104 | delta_idx = il3945_hw_reg_adjust_power_by_temp(temperature, | 2102 | delta_idx = |
2105 | eeprom->groups[ch_info->group_idx]. | 2103 | il3945_hw_reg_adjust_power_by_temp(temperature, |
2106 | temperature); | 2104 | eeprom->groups[ch_info-> |
2105 | group_idx]. | ||
2106 | temperature); | ||
2107 | 2107 | ||
2108 | D_POWER("Delta idx for channel %d: %d [%d]\n", | 2108 | D_POWER("Delta idx for channel %d: %d [%d]\n", ch_info->channel, |
2109 | ch_info->channel, delta_idx, temperature + | 2109 | delta_idx, temperature + IL_TEMP_CONVERT); |
2110 | IL_TEMP_CONVERT); | ||
2111 | 2110 | ||
2112 | /* set tx power value for all OFDM rates */ | 2111 | /* set tx power value for all OFDM rates */ |
2113 | for (rate_idx = 0; rate_idx < IL_OFDM_RATES; | 2112 | for (rate_idx = 0; rate_idx < IL_OFDM_RATES; rate_idx++) { |
2114 | rate_idx++) { | ||
2115 | s32 uninitialized_var(power_idx); | 2113 | s32 uninitialized_var(power_idx); |
2116 | int rc; | 2114 | int rc; |
2117 | 2115 | ||
@@ -2125,8 +2123,9 @@ int il3945_txpower_set_from_eeprom(struct il_priv *il) | |||
2125 | /* get base (i.e. at factory-measured temperature) | 2123 | /* get base (i.e. at factory-measured temperature) |
2126 | * power table idx for this rate's power */ | 2124 | * power table idx for this rate's power */ |
2127 | rc = il3945_hw_reg_get_matched_power_idx(il, pwr, | 2125 | rc = il3945_hw_reg_get_matched_power_idx(il, pwr, |
2128 | ch_info->group_idx, | 2126 | ch_info-> |
2129 | &power_idx); | 2127 | group_idx, |
2128 | &power_idx); | ||
2130 | if (rc) { | 2129 | if (rc) { |
2131 | IL_ERR("Invalid power idx\n"); | 2130 | IL_ERR("Invalid power idx\n"); |
2132 | return rc; | 2131 | return rc; |
@@ -2148,14 +2147,12 @@ int il3945_txpower_set_from_eeprom(struct il_priv *il) | |||
2148 | power_gain_table[a_band][power_idx].dsp_atten; | 2147 | power_gain_table[a_band][power_idx].dsp_atten; |
2149 | } | 2148 | } |
2150 | 2149 | ||
2151 | /* set tx power for CCK rates, based on OFDM 12 Mbit settings*/ | 2150 | /* set tx power for CCK rates, based on OFDM 12 Mbit settings */ |
2152 | pwr_info = &ch_info->power_info[RATE_12M_IDX_TBL]; | 2151 | pwr_info = &ch_info->power_info[RATE_12M_IDX_TBL]; |
2153 | power = pwr_info->requested_power + | 2152 | power = pwr_info->requested_power + IL_CCK_FROM_OFDM_POWER_DIFF; |
2154 | IL_CCK_FROM_OFDM_POWER_DIFF; | 2153 | pwr_idx = pwr_info->power_table_idx + IL_CCK_FROM_OFDM_IDX_DIFF; |
2155 | pwr_idx = pwr_info->power_table_idx + | 2154 | base_pwr_idx = |
2156 | IL_CCK_FROM_OFDM_IDX_DIFF; | 2155 | pwr_info->base_power_idx + IL_CCK_FROM_OFDM_IDX_DIFF; |
2157 | base_pwr_idx = pwr_info->base_power_idx + | ||
2158 | IL_CCK_FROM_OFDM_IDX_DIFF; | ||
2159 | 2156 | ||
2160 | /* stay within table range */ | 2157 | /* stay within table range */ |
2161 | pwr_idx = il3945_hw_reg_fix_power_idx(pwr_idx); | 2158 | pwr_idx = il3945_hw_reg_fix_power_idx(pwr_idx); |
@@ -2165,9 +2162,9 @@ int il3945_txpower_set_from_eeprom(struct il_priv *il) | |||
2165 | /* fill each CCK rate's il3945_channel_power_info structure | 2162 | /* fill each CCK rate's il3945_channel_power_info structure |
2166 | * NOTE: All CCK-rate Txpwrs are the same for a given chnl! | 2163 | * NOTE: All CCK-rate Txpwrs are the same for a given chnl! |
2167 | * NOTE: CCK rates start at end of OFDM rates! */ | 2164 | * NOTE: CCK rates start at end of OFDM rates! */ |
2168 | for (rate_idx = 0; | 2165 | for (rate_idx = 0; rate_idx < IL_CCK_RATES; rate_idx++) { |
2169 | rate_idx < IL_CCK_RATES; rate_idx++) { | 2166 | pwr_info = |
2170 | pwr_info = &ch_info->power_info[rate_idx+IL_OFDM_RATES]; | 2167 | &ch_info->power_info[rate_idx + IL_OFDM_RATES]; |
2171 | pwr_info->requested_power = power; | 2168 | pwr_info->requested_power = power; |
2172 | pwr_info->power_table_idx = pwr_idx; | 2169 | pwr_info->power_table_idx = pwr_idx; |
2173 | pwr_info->base_power_idx = base_pwr_idx; | 2170 | pwr_info->base_power_idx = base_pwr_idx; |
@@ -2176,48 +2173,52 @@ int il3945_txpower_set_from_eeprom(struct il_priv *il) | |||
2176 | } | 2173 | } |
2177 | 2174 | ||
2178 | /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */ | 2175 | /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */ |
2179 | for (scan_tbl_idx = 0; | 2176 | for (scan_tbl_idx = 0; scan_tbl_idx < IL_NUM_SCAN_RATES; |
2180 | scan_tbl_idx < IL_NUM_SCAN_RATES; scan_tbl_idx++) { | 2177 | scan_tbl_idx++) { |
2181 | s32 actual_idx = (scan_tbl_idx == 0) ? | 2178 | s32 actual_idx = |
2182 | RATE_1M_IDX_TBL : RATE_6M_IDX_TBL; | 2179 | (scan_tbl_idx == |
2180 | 0) ? RATE_1M_IDX_TBL : RATE_6M_IDX_TBL; | ||
2183 | il3945_hw_reg_set_scan_power(il, scan_tbl_idx, | 2181 | il3945_hw_reg_set_scan_power(il, scan_tbl_idx, |
2184 | actual_idx, clip_pwrs, ch_info, a_band); | 2182 | actual_idx, clip_pwrs, |
2183 | ch_info, a_band); | ||
2185 | } | 2184 | } |
2186 | } | 2185 | } |
2187 | 2186 | ||
2188 | return 0; | 2187 | return 0; |
2189 | } | 2188 | } |
2190 | 2189 | ||
2191 | int il3945_hw_rxq_stop(struct il_priv *il) | 2190 | int |
2191 | il3945_hw_rxq_stop(struct il_priv *il) | ||
2192 | { | 2192 | { |
2193 | int rc; | 2193 | int rc; |
2194 | 2194 | ||
2195 | il_wr(il, FH39_RCSR_CONFIG(0), 0); | 2195 | il_wr(il, FH39_RCSR_CONFIG(0), 0); |
2196 | rc = il_poll_bit(il, FH39_RSSR_STATUS, | 2196 | rc = il_poll_bit(il, FH39_RSSR_STATUS, |
2197 | FH39_RSSR_CHNL0_RX_STATUS_CHNL_IDLE, 1000); | 2197 | FH39_RSSR_CHNL0_RX_STATUS_CHNL_IDLE, 1000); |
2198 | if (rc < 0) | 2198 | if (rc < 0) |
2199 | IL_ERR("Can't stop Rx DMA.\n"); | 2199 | IL_ERR("Can't stop Rx DMA.\n"); |
2200 | 2200 | ||
2201 | return 0; | 2201 | return 0; |
2202 | } | 2202 | } |
2203 | 2203 | ||
2204 | int il3945_hw_tx_queue_init(struct il_priv *il, struct il_tx_queue *txq) | 2204 | int |
2205 | il3945_hw_tx_queue_init(struct il_priv *il, struct il_tx_queue *txq) | ||
2205 | { | 2206 | { |
2206 | int txq_id = txq->q.id; | 2207 | int txq_id = txq->q.id; |
2207 | 2208 | ||
2208 | struct il3945_shared *shared_data = il->_3945.shared_virt; | 2209 | struct il3945_shared *shared_data = il->_3945.shared_virt; |
2209 | 2210 | ||
2210 | shared_data->tx_base_ptr[txq_id] = cpu_to_le32((u32)txq->q.dma_addr); | 2211 | shared_data->tx_base_ptr[txq_id] = cpu_to_le32((u32) txq->q.dma_addr); |
2211 | 2212 | ||
2212 | il_wr(il, FH39_CBCC_CTRL(txq_id), 0); | 2213 | il_wr(il, FH39_CBCC_CTRL(txq_id), 0); |
2213 | il_wr(il, FH39_CBCC_BASE(txq_id), 0); | 2214 | il_wr(il, FH39_CBCC_BASE(txq_id), 0); |
2214 | 2215 | ||
2215 | il_wr(il, FH39_TCSR_CONFIG(txq_id), | 2216 | il_wr(il, FH39_TCSR_CONFIG(txq_id), |
2216 | FH39_TCSR_TX_CONFIG_REG_VAL_CIRQ_RTC_NOINT | | 2217 | FH39_TCSR_TX_CONFIG_REG_VAL_CIRQ_RTC_NOINT | |
2217 | FH39_TCSR_TX_CONFIG_REG_VAL_MSG_MODE_TXF | | 2218 | FH39_TCSR_TX_CONFIG_REG_VAL_MSG_MODE_TXF | |
2218 | FH39_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_IFTFD | | 2219 | FH39_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_IFTFD | |
2219 | FH39_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL | | 2220 | FH39_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL | |
2220 | FH39_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE); | 2221 | FH39_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE); |
2221 | 2222 | ||
2222 | /* fake read to flush all prev. writes */ | 2223 | /* fake read to flush all prev. writes */ |
2223 | _il_rd(il, FH39_TSSR_CBB_BASE); | 2224 | _il_rd(il, FH39_TSSR_CBB_BASE); |
@@ -2228,7 +2229,8 @@ int il3945_hw_tx_queue_init(struct il_priv *il, struct il_tx_queue *txq) | |||
2228 | /* | 2229 | /* |
2229 | * HCMD utils | 2230 | * HCMD utils |
2230 | */ | 2231 | */ |
2231 | static u16 il3945_get_hcmd_size(u8 cmd_id, u16 len) | 2232 | static u16 |
2233 | il3945_get_hcmd_size(u8 cmd_id, u16 len) | ||
2232 | { | 2234 | { |
2233 | switch (cmd_id) { | 2235 | switch (cmd_id) { |
2234 | case C_RXON: | 2236 | case C_RXON: |
@@ -2240,9 +2242,8 @@ static u16 il3945_get_hcmd_size(u8 cmd_id, u16 len) | |||
2240 | } | 2242 | } |
2241 | } | 2243 | } |
2242 | 2244 | ||
2243 | 2245 | static u16 | |
2244 | static u16 il3945_build_addsta_hcmd(const struct il_addsta_cmd *cmd, | 2246 | il3945_build_addsta_hcmd(const struct il_addsta_cmd *cmd, u8 * data) |
2245 | u8 *data) | ||
2246 | { | 2247 | { |
2247 | struct il3945_addsta_cmd *addsta = (struct il3945_addsta_cmd *)data; | 2248 | struct il3945_addsta_cmd *addsta = (struct il3945_addsta_cmd *)data; |
2248 | addsta->mode = cmd->mode; | 2249 | addsta->mode = cmd->mode; |
@@ -2256,11 +2257,11 @@ static u16 il3945_build_addsta_hcmd(const struct il_addsta_cmd *cmd, | |||
2256 | addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid; | 2257 | addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid; |
2257 | addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn; | 2258 | addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn; |
2258 | 2259 | ||
2259 | return (u16)sizeof(struct il3945_addsta_cmd); | 2260 | return (u16) sizeof(struct il3945_addsta_cmd); |
2260 | } | 2261 | } |
2261 | 2262 | ||
2262 | static int il3945_add_bssid_station(struct il_priv *il, | 2263 | static int |
2263 | const u8 *addr, u8 *sta_id_r) | 2264 | il3945_add_bssid_station(struct il_priv *il, const u8 * addr, u8 * sta_id_r) |
2264 | { | 2265 | { |
2265 | struct il_rxon_context *ctx = &il->ctx; | 2266 | struct il_rxon_context *ctx = &il->ctx; |
2266 | int ret; | 2267 | int ret; |
@@ -2285,34 +2286,39 @@ static int il3945_add_bssid_station(struct il_priv *il, | |||
2285 | 2286 | ||
2286 | return 0; | 2287 | return 0; |
2287 | } | 2288 | } |
2288 | static int il3945_manage_ibss_station(struct il_priv *il, | 2289 | |
2289 | struct ieee80211_vif *vif, bool add) | 2290 | static int |
2291 | il3945_manage_ibss_station(struct il_priv *il, struct ieee80211_vif *vif, | ||
2292 | bool add) | ||
2290 | { | 2293 | { |
2291 | struct il_vif_priv *vif_priv = (void *)vif->drv_priv; | 2294 | struct il_vif_priv *vif_priv = (void *)vif->drv_priv; |
2292 | int ret; | 2295 | int ret; |
2293 | 2296 | ||
2294 | if (add) { | 2297 | if (add) { |
2295 | ret = il3945_add_bssid_station(il, vif->bss_conf.bssid, | 2298 | ret = |
2296 | &vif_priv->ibss_bssid_sta_id); | 2299 | il3945_add_bssid_station(il, vif->bss_conf.bssid, |
2300 | &vif_priv->ibss_bssid_sta_id); | ||
2297 | if (ret) | 2301 | if (ret) |
2298 | return ret; | 2302 | return ret; |
2299 | 2303 | ||
2300 | il3945_sync_sta(il, vif_priv->ibss_bssid_sta_id, | 2304 | il3945_sync_sta(il, vif_priv->ibss_bssid_sta_id, |
2301 | (il->band == IEEE80211_BAND_5GHZ) ? | 2305 | (il->band == |
2302 | RATE_6M_PLCP : RATE_1M_PLCP); | 2306 | IEEE80211_BAND_5GHZ) ? RATE_6M_PLCP : |
2307 | RATE_1M_PLCP); | ||
2303 | il3945_rate_scale_init(il->hw, vif_priv->ibss_bssid_sta_id); | 2308 | il3945_rate_scale_init(il->hw, vif_priv->ibss_bssid_sta_id); |
2304 | 2309 | ||
2305 | return 0; | 2310 | return 0; |
2306 | } | 2311 | } |
2307 | 2312 | ||
2308 | return il_remove_station(il, vif_priv->ibss_bssid_sta_id, | 2313 | return il_remove_station(il, vif_priv->ibss_bssid_sta_id, |
2309 | vif->bss_conf.bssid); | 2314 | vif->bss_conf.bssid); |
2310 | } | 2315 | } |
2311 | 2316 | ||
2312 | /** | 2317 | /** |
2313 | * il3945_init_hw_rate_table - Initialize the hardware rate fallback table | 2318 | * il3945_init_hw_rate_table - Initialize the hardware rate fallback table |
2314 | */ | 2319 | */ |
2315 | int il3945_init_hw_rate_table(struct il_priv *il) | 2320 | int |
2321 | il3945_init_hw_rate_table(struct il_priv *il) | ||
2316 | { | 2322 | { |
2317 | int rc, i, idx, prev_idx; | 2323 | int rc, i, idx, prev_idx; |
2318 | struct il3945_rate_scaling_cmd rate_cmd = { | 2324 | struct il3945_rate_scaling_cmd rate_cmd = { |
@@ -2324,11 +2330,10 @@ int il3945_init_hw_rate_table(struct il_priv *il) | |||
2324 | idx = il3945_rates[i].table_rs_idx; | 2330 | idx = il3945_rates[i].table_rs_idx; |
2325 | 2331 | ||
2326 | table[idx].rate_n_flags = | 2332 | table[idx].rate_n_flags = |
2327 | il3945_hw_set_rate_n_flags(il3945_rates[i].plcp, 0); | 2333 | il3945_hw_set_rate_n_flags(il3945_rates[i].plcp, 0); |
2328 | table[idx].try_cnt = il->retry_rate; | 2334 | table[idx].try_cnt = il->retry_rate; |
2329 | prev_idx = il3945_get_prev_ieee_rate(i); | 2335 | prev_idx = il3945_get_prev_ieee_rate(i); |
2330 | table[idx].next_rate_idx = | 2336 | table[idx].next_rate_idx = il3945_rates[prev_idx].table_rs_idx; |
2331 | il3945_rates[prev_idx].table_rs_idx; | ||
2332 | } | 2337 | } |
2333 | 2338 | ||
2334 | switch (il->band) { | 2339 | switch (il->band) { |
@@ -2336,14 +2341,12 @@ int il3945_init_hw_rate_table(struct il_priv *il) | |||
2336 | D_RATE("Select A mode rate scale\n"); | 2341 | D_RATE("Select A mode rate scale\n"); |
2337 | /* If one of the following CCK rates is used, | 2342 | /* If one of the following CCK rates is used, |
2338 | * have it fall back to the 6M OFDM rate */ | 2343 | * have it fall back to the 6M OFDM rate */ |
2339 | for (i = RATE_1M_IDX_TBL; | 2344 | for (i = RATE_1M_IDX_TBL; i <= RATE_11M_IDX_TBL; i++) |
2340 | i <= RATE_11M_IDX_TBL; i++) | ||
2341 | table[i].next_rate_idx = | 2345 | table[i].next_rate_idx = |
2342 | il3945_rates[IL_FIRST_OFDM_RATE].table_rs_idx; | 2346 | il3945_rates[IL_FIRST_OFDM_RATE].table_rs_idx; |
2343 | 2347 | ||
2344 | /* Don't fall back to CCK rates */ | 2348 | /* Don't fall back to CCK rates */ |
2345 | table[RATE_12M_IDX_TBL].next_rate_idx = | 2349 | table[RATE_12M_IDX_TBL].next_rate_idx = RATE_9M_IDX_TBL; |
2346 | RATE_9M_IDX_TBL; | ||
2347 | 2350 | ||
2348 | /* Don't drop out of OFDM rates */ | 2351 | /* Don't drop out of OFDM rates */ |
2349 | table[RATE_6M_IDX_TBL].next_rate_idx = | 2352 | table[RATE_6M_IDX_TBL].next_rate_idx = |
@@ -2359,10 +2362,9 @@ int il3945_init_hw_rate_table(struct il_priv *il) | |||
2359 | il_is_associated(il)) { | 2362 | il_is_associated(il)) { |
2360 | 2363 | ||
2361 | idx = IL_FIRST_CCK_RATE; | 2364 | idx = IL_FIRST_CCK_RATE; |
2362 | for (i = RATE_6M_IDX_TBL; | 2365 | for (i = RATE_6M_IDX_TBL; i <= RATE_54M_IDX_TBL; i++) |
2363 | i <= RATE_54M_IDX_TBL; i++) | ||
2364 | table[i].next_rate_idx = | 2366 | table[i].next_rate_idx = |
2365 | il3945_rates[idx].table_rs_idx; | 2367 | il3945_rates[idx].table_rs_idx; |
2366 | 2368 | ||
2367 | idx = RATE_11M_IDX_TBL; | 2369 | idx = RATE_11M_IDX_TBL; |
2368 | /* CCK shouldn't fall back to OFDM... */ | 2370 | /* CCK shouldn't fall back to OFDM... */ |
@@ -2377,27 +2379,24 @@ int il3945_init_hw_rate_table(struct il_priv *il) | |||
2377 | 2379 | ||
2378 | /* Update the rate scaling for control frame Tx */ | 2380 | /* Update the rate scaling for control frame Tx */ |
2379 | rate_cmd.table_id = 0; | 2381 | rate_cmd.table_id = 0; |
2380 | rc = il_send_cmd_pdu(il, C_RATE_SCALE, sizeof(rate_cmd), | 2382 | rc = il_send_cmd_pdu(il, C_RATE_SCALE, sizeof(rate_cmd), &rate_cmd); |
2381 | &rate_cmd); | ||
2382 | if (rc) | 2383 | if (rc) |
2383 | return rc; | 2384 | return rc; |
2384 | 2385 | ||
2385 | /* Update the rate scaling for data frame Tx */ | 2386 | /* Update the rate scaling for data frame Tx */ |
2386 | rate_cmd.table_id = 1; | 2387 | rate_cmd.table_id = 1; |
2387 | return il_send_cmd_pdu(il, C_RATE_SCALE, sizeof(rate_cmd), | 2388 | return il_send_cmd_pdu(il, C_RATE_SCALE, sizeof(rate_cmd), &rate_cmd); |
2388 | &rate_cmd); | ||
2389 | } | 2389 | } |
2390 | 2390 | ||
2391 | /* Called when initializing driver */ | 2391 | /* Called when initializing driver */ |
2392 | int il3945_hw_set_hw_params(struct il_priv *il) | 2392 | int |
2393 | il3945_hw_set_hw_params(struct il_priv *il) | ||
2393 | { | 2394 | { |
2394 | memset((void *)&il->hw_params, 0, | 2395 | memset((void *)&il->hw_params, 0, sizeof(struct il_hw_params)); |
2395 | sizeof(struct il_hw_params)); | ||
2396 | 2396 | ||
2397 | il->_3945.shared_virt = | 2397 | il->_3945.shared_virt = |
2398 | dma_alloc_coherent(&il->pci_dev->dev, | 2398 | dma_alloc_coherent(&il->pci_dev->dev, sizeof(struct il3945_shared), |
2399 | sizeof(struct il3945_shared), | 2399 | &il->_3945.shared_phys, GFP_KERNEL); |
2400 | &il->_3945.shared_phys, GFP_KERNEL); | ||
2401 | if (!il->_3945.shared_virt) { | 2400 | if (!il->_3945.shared_virt) { |
2402 | IL_ERR("failed to allocate pci memory\n"); | 2401 | IL_ERR("failed to allocate pci memory\n"); |
2403 | return -ENOMEM; | 2402 | return -ENOMEM; |
@@ -2422,8 +2421,9 @@ int il3945_hw_set_hw_params(struct il_priv *il) | |||
2422 | return 0; | 2421 | return 0; |
2423 | } | 2422 | } |
2424 | 2423 | ||
2425 | unsigned int il3945_hw_get_beacon_cmd(struct il_priv *il, | 2424 | unsigned int |
2426 | struct il3945_frame *frame, u8 rate) | 2425 | il3945_hw_get_beacon_cmd(struct il_priv *il, struct il3945_frame *frame, |
2426 | u8 rate) | ||
2427 | { | 2427 | { |
2428 | struct il3945_tx_beacon_cmd *tx_beacon_cmd; | 2428 | struct il3945_tx_beacon_cmd *tx_beacon_cmd; |
2429 | unsigned int frame_size; | 2429 | unsigned int frame_size; |
@@ -2431,51 +2431,53 @@ unsigned int il3945_hw_get_beacon_cmd(struct il_priv *il, | |||
2431 | tx_beacon_cmd = (struct il3945_tx_beacon_cmd *)&frame->u; | 2431 | tx_beacon_cmd = (struct il3945_tx_beacon_cmd *)&frame->u; |
2432 | memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd)); | 2432 | memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd)); |
2433 | 2433 | ||
2434 | tx_beacon_cmd->tx.sta_id = | 2434 | tx_beacon_cmd->tx.sta_id = il->ctx.bcast_sta_id; |
2435 | il->ctx.bcast_sta_id; | ||
2436 | tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE; | 2435 | tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE; |
2437 | 2436 | ||
2438 | frame_size = il3945_fill_beacon_frame(il, | 2437 | frame_size = |
2439 | tx_beacon_cmd->frame, | 2438 | il3945_fill_beacon_frame(il, tx_beacon_cmd->frame, |
2440 | sizeof(frame->u) - sizeof(*tx_beacon_cmd)); | 2439 | sizeof(frame->u) - sizeof(*tx_beacon_cmd)); |
2441 | 2440 | ||
2442 | BUG_ON(frame_size > MAX_MPDU_SIZE); | 2441 | BUG_ON(frame_size > MAX_MPDU_SIZE); |
2443 | tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size); | 2442 | tx_beacon_cmd->tx.len = cpu_to_le16((u16) frame_size); |
2444 | 2443 | ||
2445 | tx_beacon_cmd->tx.rate = rate; | 2444 | tx_beacon_cmd->tx.rate = rate; |
2446 | tx_beacon_cmd->tx.tx_flags = (TX_CMD_FLG_SEQ_CTL_MSK | | 2445 | tx_beacon_cmd->tx.tx_flags = |
2447 | TX_CMD_FLG_TSF_MSK); | 2446 | (TX_CMD_FLG_SEQ_CTL_MSK | TX_CMD_FLG_TSF_MSK); |
2448 | 2447 | ||
2449 | /* supp_rates[0] == OFDM start at IL_FIRST_OFDM_RATE*/ | 2448 | /* supp_rates[0] == OFDM start at IL_FIRST_OFDM_RATE */ |
2450 | tx_beacon_cmd->tx.supp_rates[0] = | 2449 | tx_beacon_cmd->tx.supp_rates[0] = |
2451 | (IL_OFDM_BASIC_RATES_MASK >> IL_FIRST_OFDM_RATE) & 0xFF; | 2450 | (IL_OFDM_BASIC_RATES_MASK >> IL_FIRST_OFDM_RATE) & 0xFF; |
2452 | 2451 | ||
2453 | tx_beacon_cmd->tx.supp_rates[1] = | 2452 | tx_beacon_cmd->tx.supp_rates[1] = (IL_CCK_BASIC_RATES_MASK & 0xF); |
2454 | (IL_CCK_BASIC_RATES_MASK & 0xF); | ||
2455 | 2453 | ||
2456 | return sizeof(struct il3945_tx_beacon_cmd) + frame_size; | 2454 | return sizeof(struct il3945_tx_beacon_cmd) + frame_size; |
2457 | } | 2455 | } |
2458 | 2456 | ||
2459 | void il3945_hw_handler_setup(struct il_priv *il) | 2457 | void |
2458 | il3945_hw_handler_setup(struct il_priv *il) | ||
2460 | { | 2459 | { |
2461 | il->handlers[C_TX] = il3945_hdl_tx; | 2460 | il->handlers[C_TX] = il3945_hdl_tx; |
2462 | il->handlers[N_3945_RX] = il3945_hdl_rx; | 2461 | il->handlers[N_3945_RX] = il3945_hdl_rx; |
2463 | } | 2462 | } |
2464 | 2463 | ||
2465 | void il3945_hw_setup_deferred_work(struct il_priv *il) | 2464 | void |
2465 | il3945_hw_setup_deferred_work(struct il_priv *il) | ||
2466 | { | 2466 | { |
2467 | INIT_DELAYED_WORK(&il->_3945.thermal_periodic, | 2467 | INIT_DELAYED_WORK(&il->_3945.thermal_periodic, |
2468 | il3945_bg_reg_txpower_periodic); | 2468 | il3945_bg_reg_txpower_periodic); |
2469 | } | 2469 | } |
2470 | 2470 | ||
2471 | void il3945_hw_cancel_deferred_work(struct il_priv *il) | 2471 | void |
2472 | il3945_hw_cancel_deferred_work(struct il_priv *il) | ||
2472 | { | 2473 | { |
2473 | cancel_delayed_work(&il->_3945.thermal_periodic); | 2474 | cancel_delayed_work(&il->_3945.thermal_periodic); |
2474 | } | 2475 | } |
2475 | 2476 | ||
2476 | /* check contents of special bootstrap uCode SRAM */ | 2477 | /* check contents of special bootstrap uCode SRAM */ |
2477 | static int il3945_verify_bsm(struct il_priv *il) | 2478 | static int |
2478 | { | 2479 | il3945_verify_bsm(struct il_priv *il) |
2480 | { | ||
2479 | __le32 *image = il->ucode_boot.v_addr; | 2481 | __le32 *image = il->ucode_boot.v_addr; |
2480 | u32 len = il->ucode_boot.len; | 2482 | u32 len = il->ucode_boot.len; |
2481 | u32 reg; | 2483 | u32 reg; |
@@ -2485,16 +2487,14 @@ static int il3945_verify_bsm(struct il_priv *il) | |||
2485 | 2487 | ||
2486 | /* verify BSM SRAM contents */ | 2488 | /* verify BSM SRAM contents */ |
2487 | val = il_rd_prph(il, BSM_WR_DWCOUNT_REG); | 2489 | val = il_rd_prph(il, BSM_WR_DWCOUNT_REG); |
2488 | for (reg = BSM_SRAM_LOWER_BOUND; | 2490 | for (reg = BSM_SRAM_LOWER_BOUND; reg < BSM_SRAM_LOWER_BOUND + len; |
2489 | reg < BSM_SRAM_LOWER_BOUND + len; | ||
2490 | reg += sizeof(u32), image++) { | 2491 | reg += sizeof(u32), image++) { |
2491 | val = il_rd_prph(il, reg); | 2492 | val = il_rd_prph(il, reg); |
2492 | if (val != le32_to_cpu(*image)) { | 2493 | if (val != le32_to_cpu(*image)) { |
2493 | IL_ERR("BSM uCode verification failed at " | 2494 | IL_ERR("BSM uCode verification failed at " |
2494 | "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n", | 2495 | "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n", |
2495 | BSM_SRAM_LOWER_BOUND, | 2496 | BSM_SRAM_LOWER_BOUND, reg - BSM_SRAM_LOWER_BOUND, |
2496 | reg - BSM_SRAM_LOWER_BOUND, len, | 2497 | len, val, le32_to_cpu(*image)); |
2497 | val, le32_to_cpu(*image)); | ||
2498 | return -EIO; | 2498 | return -EIO; |
2499 | } | 2499 | } |
2500 | } | 2500 | } |
@@ -2504,7 +2504,6 @@ static int il3945_verify_bsm(struct il_priv *il) | |||
2504 | return 0; | 2504 | return 0; |
2505 | } | 2505 | } |
2506 | 2506 | ||
2507 | |||
2508 | /****************************************************************************** | 2507 | /****************************************************************************** |
2509 | * | 2508 | * |
2510 | * EEPROM related functions | 2509 | * EEPROM related functions |
@@ -2519,14 +2518,15 @@ static int il3945_verify_bsm(struct il_priv *il) | |||
2519 | * simply claims ownership, which should be safe when this function is called | 2518 | * simply claims ownership, which should be safe when this function is called |
2520 | * (i.e. before loading uCode!). | 2519 | * (i.e. before loading uCode!). |
2521 | */ | 2520 | */ |
2522 | static int il3945_eeprom_acquire_semaphore(struct il_priv *il) | 2521 | static int |
2522 | il3945_eeprom_acquire_semaphore(struct il_priv *il) | ||
2523 | { | 2523 | { |
2524 | _il_clear_bit(il, CSR_EEPROM_GP, CSR_EEPROM_GP_IF_OWNER_MSK); | 2524 | _il_clear_bit(il, CSR_EEPROM_GP, CSR_EEPROM_GP_IF_OWNER_MSK); |
2525 | return 0; | 2525 | return 0; |
2526 | } | 2526 | } |
2527 | 2527 | ||
2528 | 2528 | static void | |
2529 | static void il3945_eeprom_release_semaphore(struct il_priv *il) | 2529 | il3945_eeprom_release_semaphore(struct il_priv *il) |
2530 | { | 2530 | { |
2531 | return; | 2531 | return; |
2532 | } | 2532 | } |
@@ -2563,7 +2563,8 @@ static void il3945_eeprom_release_semaphore(struct il_priv *il) | |||
2563 | * the runtime uCode instructions and the backup data cache into SRAM, | 2563 | * the runtime uCode instructions and the backup data cache into SRAM, |
2564 | * and re-launches the runtime uCode from where it left off. | 2564 | * and re-launches the runtime uCode from where it left off. |
2565 | */ | 2565 | */ |
2566 | static int il3945_load_bsm(struct il_priv *il) | 2566 | static int |
2567 | il3945_load_bsm(struct il_priv *il) | ||
2567 | { | 2568 | { |
2568 | __le32 *image = il->ucode_boot.v_addr; | 2569 | __le32 *image = il->ucode_boot.v_addr; |
2569 | u32 len = il->ucode_boot.len; | 2570 | u32 len = il->ucode_boot.len; |
@@ -2583,10 +2584,10 @@ static int il3945_load_bsm(struct il_priv *il) | |||
2583 | return -EINVAL; | 2584 | return -EINVAL; |
2584 | 2585 | ||
2585 | /* Tell bootstrap uCode where to find the "Initialize" uCode | 2586 | /* Tell bootstrap uCode where to find the "Initialize" uCode |
2586 | * in host DRAM ... host DRAM physical address bits 31:0 for 3945. | 2587 | * in host DRAM ... host DRAM physical address bits 31:0 for 3945. |
2587 | * NOTE: il3945_initialize_alive_start() will replace these values, | 2588 | * NOTE: il3945_initialize_alive_start() will replace these values, |
2588 | * after the "initialize" uCode has run, to point to | 2589 | * after the "initialize" uCode has run, to point to |
2589 | * runtime/protocol instructions and backup data cache. */ | 2590 | * runtime/protocol instructions and backup data cache. */ |
2590 | pinst = il->ucode_init.p_addr; | 2591 | pinst = il->ucode_init.p_addr; |
2591 | pdata = il->ucode_init_data.p_addr; | 2592 | pdata = il->ucode_init_data.p_addr; |
2592 | inst_len = il->ucode_init.len; | 2593 | inst_len = il->ucode_init.len; |
@@ -2601,8 +2602,7 @@ static int il3945_load_bsm(struct il_priv *il) | |||
2601 | for (reg_offset = BSM_SRAM_LOWER_BOUND; | 2602 | for (reg_offset = BSM_SRAM_LOWER_BOUND; |
2602 | reg_offset < BSM_SRAM_LOWER_BOUND + len; | 2603 | reg_offset < BSM_SRAM_LOWER_BOUND + len; |
2603 | reg_offset += sizeof(u32), image++) | 2604 | reg_offset += sizeof(u32), image++) |
2604 | _il_wr_prph(il, reg_offset, | 2605 | _il_wr_prph(il, reg_offset, le32_to_cpu(*image)); |
2605 | le32_to_cpu(*image)); | ||
2606 | 2606 | ||
2607 | rc = il3945_verify_bsm(il); | 2607 | rc = il3945_verify_bsm(il); |
2608 | if (rc) | 2608 | if (rc) |
@@ -2610,14 +2610,12 @@ static int il3945_load_bsm(struct il_priv *il) | |||
2610 | 2610 | ||
2611 | /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */ | 2611 | /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */ |
2612 | il_wr_prph(il, BSM_WR_MEM_SRC_REG, 0x0); | 2612 | il_wr_prph(il, BSM_WR_MEM_SRC_REG, 0x0); |
2613 | il_wr_prph(il, BSM_WR_MEM_DST_REG, | 2613 | il_wr_prph(il, BSM_WR_MEM_DST_REG, IL39_RTC_INST_LOWER_BOUND); |
2614 | IL39_RTC_INST_LOWER_BOUND); | ||
2615 | il_wr_prph(il, BSM_WR_DWCOUNT_REG, len / sizeof(u32)); | 2614 | il_wr_prph(il, BSM_WR_DWCOUNT_REG, len / sizeof(u32)); |
2616 | 2615 | ||
2617 | /* Load bootstrap code into instruction SRAM now, | 2616 | /* Load bootstrap code into instruction SRAM now, |
2618 | * to prepare to load "initialize" uCode */ | 2617 | * to prepare to load "initialize" uCode */ |
2619 | il_wr_prph(il, BSM_WR_CTRL_REG, | 2618 | il_wr_prph(il, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START); |
2620 | BSM_WR_CTRL_REG_BIT_START); | ||
2621 | 2619 | ||
2622 | /* Wait for load of bootstrap uCode to finish */ | 2620 | /* Wait for load of bootstrap uCode to finish */ |
2623 | for (i = 0; i < 100; i++) { | 2621 | for (i = 0; i < 100; i++) { |
@@ -2635,8 +2633,7 @@ static int il3945_load_bsm(struct il_priv *il) | |||
2635 | 2633 | ||
2636 | /* Enable future boot loads whenever power management unit triggers it | 2634 | /* Enable future boot loads whenever power management unit triggers it |
2637 | * (e.g. when powering back up after power-save shutdown) */ | 2635 | * (e.g. when powering back up after power-save shutdown) */ |
2638 | il_wr_prph(il, BSM_WR_CTRL_REG, | 2636 | il_wr_prph(il, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN); |
2639 | BSM_WR_CTRL_REG_BIT_START_EN); | ||
2640 | 2637 | ||
2641 | return 0; | 2638 | return 0; |
2642 | } | 2639 | } |
@@ -2653,30 +2650,30 @@ static struct il_lib_ops il3945_lib = { | |||
2653 | .load_ucode = il3945_load_bsm, | 2650 | .load_ucode = il3945_load_bsm, |
2654 | .dump_nic_error_log = il3945_dump_nic_error_log, | 2651 | .dump_nic_error_log = il3945_dump_nic_error_log, |
2655 | .apm_ops = { | 2652 | .apm_ops = { |
2656 | .init = il3945_apm_init, | 2653 | .init = il3945_apm_init, |
2657 | .config = il3945_nic_config, | 2654 | .config = il3945_nic_config, |
2658 | }, | 2655 | }, |
2659 | .eeprom_ops = { | 2656 | .eeprom_ops = { |
2660 | .regulatory_bands = { | 2657 | .regulatory_bands = { |
2661 | EEPROM_REGULATORY_BAND_1_CHANNELS, | 2658 | EEPROM_REGULATORY_BAND_1_CHANNELS, |
2662 | EEPROM_REGULATORY_BAND_2_CHANNELS, | 2659 | EEPROM_REGULATORY_BAND_2_CHANNELS, |
2663 | EEPROM_REGULATORY_BAND_3_CHANNELS, | 2660 | EEPROM_REGULATORY_BAND_3_CHANNELS, |
2664 | EEPROM_REGULATORY_BAND_4_CHANNELS, | 2661 | EEPROM_REGULATORY_BAND_4_CHANNELS, |
2665 | EEPROM_REGULATORY_BAND_5_CHANNELS, | 2662 | EEPROM_REGULATORY_BAND_5_CHANNELS, |
2666 | EEPROM_REGULATORY_BAND_NO_HT40, | 2663 | EEPROM_REGULATORY_BAND_NO_HT40, |
2667 | EEPROM_REGULATORY_BAND_NO_HT40, | 2664 | EEPROM_REGULATORY_BAND_NO_HT40, |
2668 | }, | 2665 | }, |
2669 | .acquire_semaphore = il3945_eeprom_acquire_semaphore, | 2666 | .acquire_semaphore = il3945_eeprom_acquire_semaphore, |
2670 | .release_semaphore = il3945_eeprom_release_semaphore, | 2667 | .release_semaphore = il3945_eeprom_release_semaphore, |
2671 | }, | 2668 | }, |
2672 | .send_tx_power = il3945_send_tx_power, | 2669 | .send_tx_power = il3945_send_tx_power, |
2673 | .is_valid_rtc_data_addr = il3945_hw_valid_rtc_data_addr, | 2670 | .is_valid_rtc_data_addr = il3945_hw_valid_rtc_data_addr, |
2674 | 2671 | ||
2675 | .debugfs_ops = { | 2672 | .debugfs_ops = { |
2676 | .rx_stats_read = il3945_ucode_rx_stats_read, | 2673 | .rx_stats_read = il3945_ucode_rx_stats_read, |
2677 | .tx_stats_read = il3945_ucode_tx_stats_read, | 2674 | .tx_stats_read = il3945_ucode_tx_stats_read, |
2678 | .general_stats_read = il3945_ucode_general_stats_read, | 2675 | .general_stats_read = il3945_ucode_general_stats_read, |
2679 | }, | 2676 | }, |
2680 | }; | 2677 | }; |
2681 | 2678 | ||
2682 | static const struct il_legacy_ops il3945_legacy_ops = { | 2679 | static const struct il_legacy_ops il3945_legacy_ops = { |
@@ -2729,7 +2726,7 @@ static struct il_cfg il3945_abg_cfg = { | |||
2729 | .fw_name_pre = IL3945_FW_PRE, | 2726 | .fw_name_pre = IL3945_FW_PRE, |
2730 | .ucode_api_max = IL3945_UCODE_API_MAX, | 2727 | .ucode_api_max = IL3945_UCODE_API_MAX, |
2731 | .ucode_api_min = IL3945_UCODE_API_MIN, | 2728 | .ucode_api_min = IL3945_UCODE_API_MIN, |
2732 | .sku = IL_SKU_A|IL_SKU_G, | 2729 | .sku = IL_SKU_A | IL_SKU_G, |
2733 | .eeprom_ver = EEPROM_3945_EEPROM_VERSION, | 2730 | .eeprom_ver = EEPROM_3945_EEPROM_VERSION, |
2734 | .ops = &il3945_ops, | 2731 | .ops = &il3945_ops, |
2735 | .mod_params = &il3945_mod_params, | 2732 | .mod_params = &il3945_mod_params, |
@@ -2738,13 +2735,14 @@ static struct il_cfg il3945_abg_cfg = { | |||
2738 | }; | 2735 | }; |
2739 | 2736 | ||
2740 | DEFINE_PCI_DEVICE_TABLE(il3945_hw_card_ids) = { | 2737 | DEFINE_PCI_DEVICE_TABLE(il3945_hw_card_ids) = { |
2741 | {IL_PCI_DEVICE(0x4222, 0x1005, il3945_bg_cfg)}, | 2738 | { |
2742 | {IL_PCI_DEVICE(0x4222, 0x1034, il3945_bg_cfg)}, | 2739 | IL_PCI_DEVICE(0x4222, 0x1005, il3945_bg_cfg)}, { |
2743 | {IL_PCI_DEVICE(0x4222, 0x1044, il3945_bg_cfg)}, | 2740 | IL_PCI_DEVICE(0x4222, 0x1034, il3945_bg_cfg)}, { |
2744 | {IL_PCI_DEVICE(0x4227, 0x1014, il3945_bg_cfg)}, | 2741 | IL_PCI_DEVICE(0x4222, 0x1044, il3945_bg_cfg)}, { |
2745 | {IL_PCI_DEVICE(0x4222, PCI_ANY_ID, il3945_abg_cfg)}, | 2742 | IL_PCI_DEVICE(0x4227, 0x1014, il3945_bg_cfg)}, { |
2746 | {IL_PCI_DEVICE(0x4227, PCI_ANY_ID, il3945_abg_cfg)}, | 2743 | IL_PCI_DEVICE(0x4222, PCI_ANY_ID, il3945_abg_cfg)}, { |
2747 | {0} | 2744 | IL_PCI_DEVICE(0x4227, PCI_ANY_ID, il3945_abg_cfg)}, { |
2745 | 0} | ||
2748 | }; | 2746 | }; |
2749 | 2747 | ||
2750 | MODULE_DEVICE_TABLE(pci, il3945_hw_card_ids); | 2748 | MODULE_DEVICE_TABLE(pci, il3945_hw_card_ids); |
diff --git a/drivers/net/wireless/iwlegacy/3945.h b/drivers/net/wireless/iwlegacy/3945.h index 1a2430bb1889..8e53751270f0 100644 --- a/drivers/net/wireless/iwlegacy/3945.h +++ b/drivers/net/wireless/iwlegacy/3945.h | |||
@@ -27,7 +27,7 @@ | |||
27 | #ifndef __il_3945_h__ | 27 | #ifndef __il_3945_h__ |
28 | #define __il_3945_h__ | 28 | #define __il_3945_h__ |
29 | 29 | ||
30 | #include <linux/pci.h> /* for struct pci_device_id */ | 30 | #include <linux/pci.h> /* for struct pci_device_id */ |
31 | #include <linux/kernel.h> | 31 | #include <linux/kernel.h> |
32 | #include <net/ieee80211_radiotap.h> | 32 | #include <net/ieee80211_radiotap.h> |
33 | 33 | ||
@@ -93,7 +93,6 @@ struct il3945_rs_sta { | |||
93 | int last_txrate_idx; | 93 | int last_txrate_idx; |
94 | }; | 94 | }; |
95 | 95 | ||
96 | |||
97 | /* | 96 | /* |
98 | * The common struct MUST be first because it is shared between | 97 | * The common struct MUST be first because it is shared between |
99 | * 3945 and 4965! | 98 | * 3945 and 4965! |
@@ -186,7 +185,6 @@ struct il3945_ibss_seq { | |||
186 | #define IL_RX_STATS(x) (&x->u.rx_frame.stats) | 185 | #define IL_RX_STATS(x) (&x->u.rx_frame.stats) |
187 | #define IL_RX_DATA(x) (IL_RX_HDR(x)->payload) | 186 | #define IL_RX_DATA(x) (IL_RX_HDR(x)->payload) |
188 | 187 | ||
189 | |||
190 | /****************************************************************************** | 188 | /****************************************************************************** |
191 | * | 189 | * |
192 | * Functions implemented in iwl3945-base.c which are forward declared here | 190 | * Functions implemented in iwl3945-base.c which are forward declared here |
@@ -197,9 +195,10 @@ extern int il3945_calc_db_from_ratio(int sig_ratio); | |||
197 | extern void il3945_rx_replenish(void *data); | 195 | extern void il3945_rx_replenish(void *data); |
198 | extern void il3945_rx_queue_reset(struct il_priv *il, struct il_rx_queue *rxq); | 196 | extern void il3945_rx_queue_reset(struct il_priv *il, struct il_rx_queue *rxq); |
199 | extern unsigned int il3945_fill_beacon_frame(struct il_priv *il, | 197 | extern unsigned int il3945_fill_beacon_frame(struct il_priv *il, |
200 | struct ieee80211_hdr *hdr, int left); | 198 | struct ieee80211_hdr *hdr, |
199 | int left); | ||
201 | extern int il3945_dump_nic_event_log(struct il_priv *il, bool full_log, | 200 | extern int il3945_dump_nic_event_log(struct il_priv *il, bool full_log, |
202 | char **buf, bool display); | 201 | char **buf, bool display); |
203 | extern void il3945_dump_nic_error_log(struct il_priv *il); | 202 | extern void il3945_dump_nic_error_log(struct il_priv *il); |
204 | 203 | ||
205 | /****************************************************************************** | 204 | /****************************************************************************** |
@@ -229,34 +228,29 @@ extern void il3945_hw_txq_ctx_free(struct il_priv *il); | |||
229 | extern void il3945_hw_txq_ctx_stop(struct il_priv *il); | 228 | extern void il3945_hw_txq_ctx_stop(struct il_priv *il); |
230 | extern int il3945_hw_nic_reset(struct il_priv *il); | 229 | extern int il3945_hw_nic_reset(struct il_priv *il); |
231 | extern int il3945_hw_txq_attach_buf_to_tfd(struct il_priv *il, | 230 | extern int il3945_hw_txq_attach_buf_to_tfd(struct il_priv *il, |
232 | struct il_tx_queue *txq, | 231 | struct il_tx_queue *txq, |
233 | dma_addr_t addr, u16 len, | 232 | dma_addr_t addr, u16 len, u8 reset, |
234 | u8 reset, u8 pad); | 233 | u8 pad); |
235 | extern void il3945_hw_txq_free_tfd(struct il_priv *il, | 234 | extern void il3945_hw_txq_free_tfd(struct il_priv *il, struct il_tx_queue *txq); |
236 | struct il_tx_queue *txq); | ||
237 | extern int il3945_hw_get_temperature(struct il_priv *il); | 235 | extern int il3945_hw_get_temperature(struct il_priv *il); |
238 | extern int il3945_hw_tx_queue_init(struct il_priv *il, | 236 | extern int il3945_hw_tx_queue_init(struct il_priv *il, struct il_tx_queue *txq); |
239 | struct il_tx_queue *txq); | ||
240 | extern unsigned int il3945_hw_get_beacon_cmd(struct il_priv *il, | 237 | extern unsigned int il3945_hw_get_beacon_cmd(struct il_priv *il, |
241 | struct il3945_frame *frame, u8 rate); | 238 | struct il3945_frame *frame, |
242 | void il3945_hw_build_tx_cmd_rate(struct il_priv *il, | 239 | u8 rate); |
243 | struct il_device_cmd *cmd, | 240 | void il3945_hw_build_tx_cmd_rate(struct il_priv *il, struct il_device_cmd *cmd, |
244 | struct ieee80211_tx_info *info, | 241 | struct ieee80211_tx_info *info, |
245 | struct ieee80211_hdr *hdr, | 242 | struct ieee80211_hdr *hdr, int sta_id, |
246 | int sta_id, int tx_id); | 243 | int tx_id); |
247 | extern int il3945_hw_reg_send_txpower(struct il_priv *il); | 244 | extern int il3945_hw_reg_send_txpower(struct il_priv *il); |
248 | extern int il3945_hw_reg_set_txpower(struct il_priv *il, s8 power); | 245 | extern int il3945_hw_reg_set_txpower(struct il_priv *il, s8 power); |
249 | extern void il3945_hdl_stats(struct il_priv *il, | 246 | extern void il3945_hdl_stats(struct il_priv *il, struct il_rx_buf *rxb); |
250 | struct il_rx_buf *rxb); | 247 | void il3945_hdl_c_stats(struct il_priv *il, struct il_rx_buf *rxb); |
251 | void il3945_hdl_c_stats(struct il_priv *il, | ||
252 | struct il_rx_buf *rxb); | ||
253 | extern void il3945_disable_events(struct il_priv *il); | 248 | extern void il3945_disable_events(struct il_priv *il); |
254 | extern int il4965_get_temperature(const struct il_priv *il); | 249 | extern int il4965_get_temperature(const struct il_priv *il); |
255 | extern void il3945_post_associate(struct il_priv *il); | 250 | extern void il3945_post_associate(struct il_priv *il); |
256 | extern void il3945_config_ap(struct il_priv *il); | 251 | extern void il3945_config_ap(struct il_priv *il); |
257 | 252 | ||
258 | extern int il3945_commit_rxon(struct il_priv *il, | 253 | extern int il3945_commit_rxon(struct il_priv *il, struct il_rxon_context *ctx); |
259 | struct il_rxon_context *ctx); | ||
260 | 254 | ||
261 | /** | 255 | /** |
262 | * il3945_hw_find_station - Find station id for a given BSSID | 256 | * il3945_hw_find_station - Find station id for a given BSSID |
@@ -266,7 +260,7 @@ extern int il3945_commit_rxon(struct il_priv *il, | |||
266 | * not yet been merged into a single common layer for managing the | 260 | * not yet been merged into a single common layer for managing the |
267 | * station tables. | 261 | * station tables. |
268 | */ | 262 | */ |
269 | extern u8 il3945_hw_find_station(struct il_priv *il, const u8 *bssid); | 263 | extern u8 il3945_hw_find_station(struct il_priv *il, const u8 * bssid); |
270 | 264 | ||
271 | extern struct ieee80211_ops il3945_hw_ops; | 265 | extern struct ieee80211_ops il3945_hw_ops; |
272 | 266 | ||
@@ -275,8 +269,10 @@ extern int il3945_init_hw_rate_table(struct il_priv *il); | |||
275 | extern void il3945_reg_txpower_periodic(struct il_priv *il); | 269 | extern void il3945_reg_txpower_periodic(struct il_priv *il); |
276 | extern int il3945_txpower_set_from_eeprom(struct il_priv *il); | 270 | extern int il3945_txpower_set_from_eeprom(struct il_priv *il); |
277 | 271 | ||
278 | extern const struct il_channel_info *il3945_get_channel_info( | 272 | extern const struct il_channel_info *il3945_get_channel_info(const struct |
279 | const struct il_priv *il, enum ieee80211_band band, u16 channel); | 273 | il_priv *il, |
274 | enum ieee80211_band | ||
275 | band, u16 channel); | ||
280 | 276 | ||
281 | extern int il3945_rs_next_rate(struct il_priv *il, int rate); | 277 | extern int il3945_rs_next_rate(struct il_priv *il, int rate); |
282 | 278 | ||
@@ -287,8 +283,6 @@ void il3945_post_scan(struct il_priv *il); | |||
287 | /* rates */ | 283 | /* rates */ |
288 | extern const struct il3945_rate_info il3945_rates[RATE_COUNT_3945]; | 284 | extern const struct il3945_rate_info il3945_rates[RATE_COUNT_3945]; |
289 | 285 | ||
290 | |||
291 | |||
292 | /* RSSI to dBm */ | 286 | /* RSSI to dBm */ |
293 | #define IL39_RSSI_OFFSET 95 | 287 | #define IL39_RSSI_OFFSET 95 |
294 | 288 | ||
@@ -323,7 +317,7 @@ struct il3945_eeprom_txpower_sample { | |||
323 | * DO NOT ALTER THIS STRUCTURE!!! | 317 | * DO NOT ALTER THIS STRUCTURE!!! |
324 | */ | 318 | */ |
325 | struct il3945_eeprom_txpower_group { | 319 | struct il3945_eeprom_txpower_group { |
326 | struct il3945_eeprom_txpower_sample samples[5]; /* 5 power levels */ | 320 | struct il3945_eeprom_txpower_sample samples[5]; /* 5 power levels */ |
327 | s32 a, b, c, d, e; /* coefficients for voltage->power | 321 | s32 a, b, c, d, e; /* coefficients for voltage->power |
328 | * formula (signed) */ | 322 | * formula (signed) */ |
329 | s32 Fa, Fb, Fc, Fd, Fe; /* these modify coeffs based on | 323 | s32 Fa, Fb, Fc, Fd, Fe; /* these modify coeffs based on |
@@ -354,7 +348,7 @@ struct il3945_eeprom_temperature_corr { | |||
354 | */ | 348 | */ |
355 | struct il3945_eeprom { | 349 | struct il3945_eeprom { |
356 | u8 reserved0[16]; | 350 | u8 reserved0[16]; |
357 | u16 device_id; /* abs.ofs: 16 */ | 351 | u16 device_id; /* abs.ofs: 16 */ |
358 | u8 reserved1[2]; | 352 | u8 reserved1[2]; |
359 | u16 pmc; /* abs.ofs: 20 */ | 353 | u16 pmc; /* abs.ofs: 20 */ |
360 | u8 reserved2[20]; | 354 | u8 reserved2[20]; |
@@ -389,7 +383,7 @@ struct il3945_eeprom { | |||
389 | * 2.4 GHz channels 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14 | 383 | * 2.4 GHz channels 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14 |
390 | */ | 384 | */ |
391 | u16 band_1_count; /* abs.ofs: 196 */ | 385 | u16 band_1_count; /* abs.ofs: 196 */ |
392 | struct il_eeprom_channel band_1_channels[14]; /* abs.ofs: 198 */ | 386 | struct il_eeprom_channel band_1_channels[14]; /* abs.ofs: 198 */ |
393 | 387 | ||
394 | /* | 388 | /* |
395 | * 4.9 GHz channels 183, 184, 185, 187, 188, 189, 192, 196, | 389 | * 4.9 GHz channels 183, 184, 185, 187, 188, 189, 192, 196, |
@@ -397,28 +391,28 @@ struct il3945_eeprom { | |||
397 | * (4915-5080MHz) (none of these is ever supported) | 391 | * (4915-5080MHz) (none of these is ever supported) |
398 | */ | 392 | */ |
399 | u16 band_2_count; /* abs.ofs: 226 */ | 393 | u16 band_2_count; /* abs.ofs: 226 */ |
400 | struct il_eeprom_channel band_2_channels[13]; /* abs.ofs: 228 */ | 394 | struct il_eeprom_channel band_2_channels[13]; /* abs.ofs: 228 */ |
401 | 395 | ||
402 | /* | 396 | /* |
403 | * 5.2 GHz channels 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64 | 397 | * 5.2 GHz channels 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64 |
404 | * (5170-5320MHz) | 398 | * (5170-5320MHz) |
405 | */ | 399 | */ |
406 | u16 band_3_count; /* abs.ofs: 254 */ | 400 | u16 band_3_count; /* abs.ofs: 254 */ |
407 | struct il_eeprom_channel band_3_channels[12]; /* abs.ofs: 256 */ | 401 | struct il_eeprom_channel band_3_channels[12]; /* abs.ofs: 256 */ |
408 | 402 | ||
409 | /* | 403 | /* |
410 | * 5.5 GHz channels 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140 | 404 | * 5.5 GHz channels 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140 |
411 | * (5500-5700MHz) | 405 | * (5500-5700MHz) |
412 | */ | 406 | */ |
413 | u16 band_4_count; /* abs.ofs: 280 */ | 407 | u16 band_4_count; /* abs.ofs: 280 */ |
414 | struct il_eeprom_channel band_4_channels[11]; /* abs.ofs: 282 */ | 408 | struct il_eeprom_channel band_4_channels[11]; /* abs.ofs: 282 */ |
415 | 409 | ||
416 | /* | 410 | /* |
417 | * 5.7 GHz channels 145, 149, 153, 157, 161, 165 | 411 | * 5.7 GHz channels 145, 149, 153, 157, 161, 165 |
418 | * (5725-5825MHz) | 412 | * (5725-5825MHz) |
419 | */ | 413 | */ |
420 | u16 band_5_count; /* abs.ofs: 304 */ | 414 | u16 band_5_count; /* abs.ofs: 304 */ |
421 | struct il_eeprom_channel band_5_channels[6]; /* abs.ofs: 306 */ | 415 | struct il_eeprom_channel band_5_channels[6]; /* abs.ofs: 306 */ |
422 | 416 | ||
423 | u8 reserved9[194]; | 417 | u8 reserved9[194]; |
424 | 418 | ||
@@ -428,7 +422,7 @@ struct il3945_eeprom { | |||
428 | #define IL_NUM_TX_CALIB_GROUPS 5 | 422 | #define IL_NUM_TX_CALIB_GROUPS 5 |
429 | struct il3945_eeprom_txpower_group groups[IL_NUM_TX_CALIB_GROUPS]; | 423 | struct il3945_eeprom_txpower_group groups[IL_NUM_TX_CALIB_GROUPS]; |
430 | /* abs.ofs: 512 */ | 424 | /* abs.ofs: 512 */ |
431 | struct il3945_eeprom_temperature_corr corrections; /* abs.ofs: 832 */ | 425 | struct il3945_eeprom_temperature_corr corrections; /* abs.ofs: 832 */ |
432 | u8 reserved16[172]; /* fill out to full 1024 byte block */ | 426 | u8 reserved16[172]; /* fill out to full 1024 byte block */ |
433 | } __packed; | 427 | } __packed; |
434 | 428 | ||
@@ -474,7 +468,8 @@ struct il3945_eeprom { | |||
474 | /* Size of uCode instruction memory in bootstrap state machine */ | 468 | /* Size of uCode instruction memory in bootstrap state machine */ |
475 | #define IL39_MAX_BSM_SIZE IL39_RTC_INST_SIZE | 469 | #define IL39_MAX_BSM_SIZE IL39_RTC_INST_SIZE |
476 | 470 | ||
477 | static inline int il3945_hw_valid_rtc_data_addr(u32 addr) | 471 | static inline int |
472 | il3945_hw_valid_rtc_data_addr(u32 addr) | ||
478 | { | 473 | { |
479 | return (addr >= IL39_RTC_DATA_LOWER_BOUND && | 474 | return (addr >= IL39_RTC_DATA_LOWER_BOUND && |
480 | addr < IL39_RTC_DATA_UPPER_BOUND); | 475 | addr < IL39_RTC_DATA_UPPER_BOUND); |
@@ -486,19 +481,22 @@ struct il3945_shared { | |||
486 | __le32 tx_base_ptr[8]; | 481 | __le32 tx_base_ptr[8]; |
487 | } __packed; | 482 | } __packed; |
488 | 483 | ||
489 | static inline u8 il3945_hw_get_rate(__le16 rate_n_flags) | 484 | static inline u8 |
485 | il3945_hw_get_rate(__le16 rate_n_flags) | ||
490 | { | 486 | { |
491 | return le16_to_cpu(rate_n_flags) & 0xFF; | 487 | return le16_to_cpu(rate_n_flags) & 0xFF; |
492 | } | 488 | } |
493 | 489 | ||
494 | static inline u16 il3945_hw_get_rate_n_flags(__le16 rate_n_flags) | 490 | static inline u16 |
491 | il3945_hw_get_rate_n_flags(__le16 rate_n_flags) | ||
495 | { | 492 | { |
496 | return le16_to_cpu(rate_n_flags); | 493 | return le16_to_cpu(rate_n_flags); |
497 | } | 494 | } |
498 | 495 | ||
499 | static inline __le16 il3945_hw_set_rate_n_flags(u8 rate, u16 flags) | 496 | static inline __le16 |
497 | il3945_hw_set_rate_n_flags(u8 rate, u16 flags) | ||
500 | { | 498 | { |
501 | return cpu_to_le16((u16)rate|flags); | 499 | return cpu_to_le16((u16) rate | flags); |
502 | } | 500 | } |
503 | 501 | ||
504 | /************************************/ | 502 | /************************************/ |
@@ -553,7 +551,6 @@ static inline __le16 il3945_hw_set_rate_n_flags(u8 rate, u16 flags) | |||
553 | #define FH39_TSSR_MSG_CONFIG (FH39_TSSR_TBL + 0x008) | 551 | #define FH39_TSSR_MSG_CONFIG (FH39_TSSR_TBL + 0x008) |
554 | #define FH39_TSSR_TX_STATUS (FH39_TSSR_TBL + 0x010) | 552 | #define FH39_TSSR_TX_STATUS (FH39_TSSR_TBL + 0x010) |
555 | 553 | ||
556 | |||
557 | /* DBM */ | 554 | /* DBM */ |
558 | 555 | ||
559 | #define FH39_SRVC_CHNL (6) | 556 | #define FH39_SRVC_CHNL (6) |
@@ -622,29 +619,31 @@ struct il3945_tfd { | |||
622 | } __packed; | 619 | } __packed; |
623 | 620 | ||
624 | #ifdef CONFIG_IWLEGACY_DEBUGFS | 621 | #ifdef CONFIG_IWLEGACY_DEBUGFS |
625 | ssize_t il3945_ucode_rx_stats_read(struct file *file, char __user *user_buf, | 622 | ssize_t il3945_ucode_rx_stats_read(struct file *file, char __user * user_buf, |
626 | size_t count, loff_t *ppos); | 623 | size_t count, loff_t * ppos); |
627 | ssize_t il3945_ucode_tx_stats_read(struct file *file, char __user *user_buf, | 624 | ssize_t il3945_ucode_tx_stats_read(struct file *file, char __user * user_buf, |
628 | size_t count, loff_t *ppos); | 625 | size_t count, loff_t * ppos); |
629 | ssize_t il3945_ucode_general_stats_read(struct file *file, | 626 | ssize_t il3945_ucode_general_stats_read(struct file *file, |
630 | char __user *user_buf, size_t count, | 627 | char __user * user_buf, size_t count, |
631 | loff_t *ppos); | 628 | loff_t * ppos); |
632 | #else | 629 | #else |
633 | static ssize_t il3945_ucode_rx_stats_read(struct file *file, | 630 | static ssize_t |
634 | char __user *user_buf, size_t count, | 631 | il3945_ucode_rx_stats_read(struct file *file, char __user * user_buf, |
635 | loff_t *ppos) | 632 | size_t count, loff_t * ppos) |
636 | { | 633 | { |
637 | return 0; | 634 | return 0; |
638 | } | 635 | } |
639 | static ssize_t il3945_ucode_tx_stats_read(struct file *file, | 636 | |
640 | char __user *user_buf, size_t count, | 637 | static ssize_t |
641 | loff_t *ppos) | 638 | il3945_ucode_tx_stats_read(struct file *file, char __user * user_buf, |
639 | size_t count, loff_t * ppos) | ||
642 | { | 640 | { |
643 | return 0; | 641 | return 0; |
644 | } | 642 | } |
645 | static ssize_t il3945_ucode_general_stats_read(struct file *file, | 643 | |
646 | char __user *user_buf, | 644 | static ssize_t |
647 | size_t count, loff_t *ppos) | 645 | il3945_ucode_general_stats_read(struct file *file, char __user * user_buf, |
646 | size_t count, loff_t * ppos) | ||
648 | { | 647 | { |
649 | return 0; | 648 | return 0; |
650 | } | 649 | } |
diff --git a/drivers/net/wireless/iwlegacy/4965-calib.c b/drivers/net/wireless/iwlegacy/4965-calib.c index 405032a9b36e..efb32331ec88 100644 --- a/drivers/net/wireless/iwlegacy/4965-calib.c +++ b/drivers/net/wireless/iwlegacy/4965-calib.c | |||
@@ -79,7 +79,8 @@ struct stats_general_data { | |||
79 | u32 beacon_energy_c; | 79 | u32 beacon_energy_c; |
80 | }; | 80 | }; |
81 | 81 | ||
82 | void il4965_calib_free_results(struct il_priv *il) | 82 | void |
83 | il4965_calib_free_results(struct il_priv *il) | ||
83 | { | 84 | { |
84 | int i; | 85 | int i; |
85 | 86 | ||
@@ -102,10 +103,9 @@ void il4965_calib_free_results(struct il_priv *il) | |||
102 | * enough to receive all of our own network traffic, but not so | 103 | * enough to receive all of our own network traffic, but not so |
103 | * high that our DSP gets too busy trying to lock onto non-network | 104 | * high that our DSP gets too busy trying to lock onto non-network |
104 | * activity/noise. */ | 105 | * activity/noise. */ |
105 | static int il4965_sens_energy_cck(struct il_priv *il, | 106 | static int |
106 | u32 norm_fa, | 107 | il4965_sens_energy_cck(struct il_priv *il, u32 norm_fa, u32 rx_enable_time, |
107 | u32 rx_enable_time, | 108 | struct stats_general_data *rx_info) |
108 | struct stats_general_data *rx_info) | ||
109 | { | 109 | { |
110 | u32 max_nrg_cck = 0; | 110 | u32 max_nrg_cck = 0; |
111 | int i = 0; | 111 | int i = 0; |
@@ -138,12 +138,12 @@ static int il4965_sens_energy_cck(struct il_priv *il, | |||
138 | /* Find max silence rssi among all 3 receivers. | 138 | /* Find max silence rssi among all 3 receivers. |
139 | * This is background noise, which may include transmissions from other | 139 | * This is background noise, which may include transmissions from other |
140 | * networks, measured during silence before our network's beacon */ | 140 | * networks, measured during silence before our network's beacon */ |
141 | silence_rssi_a = (u8)((rx_info->beacon_silence_rssi_a & | 141 | silence_rssi_a = |
142 | ALL_BAND_FILTER) >> 8); | 142 | (u8) ((rx_info->beacon_silence_rssi_a & ALL_BAND_FILTER) >> 8); |
143 | silence_rssi_b = (u8)((rx_info->beacon_silence_rssi_b & | 143 | silence_rssi_b = |
144 | ALL_BAND_FILTER) >> 8); | 144 | (u8) ((rx_info->beacon_silence_rssi_b & ALL_BAND_FILTER) >> 8); |
145 | silence_rssi_c = (u8)((rx_info->beacon_silence_rssi_c & | 145 | silence_rssi_c = |
146 | ALL_BAND_FILTER) >> 8); | 146 | (u8) ((rx_info->beacon_silence_rssi_c & ALL_BAND_FILTER) >> 8); |
147 | 147 | ||
148 | val = max(silence_rssi_b, silence_rssi_c); | 148 | val = max(silence_rssi_b, silence_rssi_c); |
149 | max_silence_rssi = max(silence_rssi_a, (u8) val); | 149 | max_silence_rssi = max(silence_rssi_a, (u8) val); |
@@ -159,9 +159,8 @@ static int il4965_sens_energy_cck(struct il_priv *il, | |||
159 | val = data->nrg_silence_rssi[i]; | 159 | val = data->nrg_silence_rssi[i]; |
160 | silence_ref = max(silence_ref, val); | 160 | silence_ref = max(silence_ref, val); |
161 | } | 161 | } |
162 | D_CALIB("silence a %u, b %u, c %u, 20-bcn max %u\n", | 162 | D_CALIB("silence a %u, b %u, c %u, 20-bcn max %u\n", silence_rssi_a, |
163 | silence_rssi_a, silence_rssi_b, silence_rssi_c, | 163 | silence_rssi_b, silence_rssi_c, silence_ref); |
164 | silence_ref); | ||
165 | 164 | ||
166 | /* Find max rx energy (min value!) among all 3 receivers, | 165 | /* Find max rx energy (min value!) among all 3 receivers, |
167 | * measured during beacon frame. | 166 | * measured during beacon frame. |
@@ -184,8 +183,8 @@ static int il4965_sens_energy_cck(struct il_priv *il, | |||
184 | max_nrg_cck += 6; | 183 | max_nrg_cck += 6; |
185 | 184 | ||
186 | D_CALIB("rx energy a %u, b %u, c %u, 10-bcn max/min %u\n", | 185 | D_CALIB("rx energy a %u, b %u, c %u, 10-bcn max/min %u\n", |
187 | rx_info->beacon_energy_a, rx_info->beacon_energy_b, | 186 | rx_info->beacon_energy_a, rx_info->beacon_energy_b, |
188 | rx_info->beacon_energy_c, max_nrg_cck - 6); | 187 | rx_info->beacon_energy_c, max_nrg_cck - 6); |
189 | 188 | ||
190 | /* Count number of consecutive beacons with fewer-than-desired | 189 | /* Count number of consecutive beacons with fewer-than-desired |
191 | * false alarms. */ | 190 | * false alarms. */ |
@@ -194,13 +193,13 @@ static int il4965_sens_energy_cck(struct il_priv *il, | |||
194 | else | 193 | else |
195 | data->num_in_cck_no_fa = 0; | 194 | data->num_in_cck_no_fa = 0; |
196 | D_CALIB("consecutive bcns with few false alarms = %u\n", | 195 | D_CALIB("consecutive bcns with few false alarms = %u\n", |
197 | data->num_in_cck_no_fa); | 196 | data->num_in_cck_no_fa); |
198 | 197 | ||
199 | /* If we got too many false alarms this time, reduce sensitivity */ | 198 | /* If we got too many false alarms this time, reduce sensitivity */ |
200 | if (false_alarms > max_false_alarms && | 199 | if (false_alarms > max_false_alarms && |
201 | data->auto_corr_cck > AUTO_CORR_MAX_TH_CCK) { | 200 | data->auto_corr_cck > AUTO_CORR_MAX_TH_CCK) { |
202 | D_CALIB("norm FA %u > max FA %u\n", | 201 | D_CALIB("norm FA %u > max FA %u\n", false_alarms, |
203 | false_alarms, max_false_alarms); | 202 | max_false_alarms); |
204 | D_CALIB("... reducing sensitivity\n"); | 203 | D_CALIB("... reducing sensitivity\n"); |
205 | data->nrg_curr_state = IL_FA_TOO_MANY; | 204 | data->nrg_curr_state = IL_FA_TOO_MANY; |
206 | /* Store for "fewer than desired" on later beacon */ | 205 | /* Store for "fewer than desired" on later beacon */ |
@@ -209,19 +208,18 @@ static int il4965_sens_energy_cck(struct il_priv *il, | |||
209 | /* increase energy threshold (reduce nrg value) | 208 | /* increase energy threshold (reduce nrg value) |
210 | * to decrease sensitivity */ | 209 | * to decrease sensitivity */ |
211 | data->nrg_th_cck = data->nrg_th_cck - NRG_STEP_CCK; | 210 | data->nrg_th_cck = data->nrg_th_cck - NRG_STEP_CCK; |
212 | /* Else if we got fewer than desired, increase sensitivity */ | 211 | /* Else if we got fewer than desired, increase sensitivity */ |
213 | } else if (false_alarms < min_false_alarms) { | 212 | } else if (false_alarms < min_false_alarms) { |
214 | data->nrg_curr_state = IL_FA_TOO_FEW; | 213 | data->nrg_curr_state = IL_FA_TOO_FEW; |
215 | 214 | ||
216 | /* Compare silence level with silence level for most recent | 215 | /* Compare silence level with silence level for most recent |
217 | * healthy number or too many false alarms */ | 216 | * healthy number or too many false alarms */ |
218 | data->nrg_auto_corr_silence_diff = (s32)data->nrg_silence_ref - | 217 | data->nrg_auto_corr_silence_diff = |
219 | (s32)silence_ref; | 218 | (s32) data->nrg_silence_ref - (s32) silence_ref; |
220 | 219 | ||
221 | D_CALIB( | 220 | D_CALIB("norm FA %u < min FA %u, silence diff %d\n", |
222 | "norm FA %u < min FA %u, silence diff %d\n", | 221 | false_alarms, min_false_alarms, |
223 | false_alarms, min_false_alarms, | 222 | data->nrg_auto_corr_silence_diff); |
224 | data->nrg_auto_corr_silence_diff); | ||
225 | 223 | ||
226 | /* Increase value to increase sensitivity, but only if: | 224 | /* Increase value to increase sensitivity, but only if: |
227 | * 1a) previous beacon did *not* have *too many* false alarms | 225 | * 1a) previous beacon did *not* have *too many* false alarms |
@@ -236,13 +234,12 @@ static int il4965_sens_energy_cck(struct il_priv *il, | |||
236 | D_CALIB("... increasing sensitivity\n"); | 234 | D_CALIB("... increasing sensitivity\n"); |
237 | /* Increase nrg value to increase sensitivity */ | 235 | /* Increase nrg value to increase sensitivity */ |
238 | val = data->nrg_th_cck + NRG_STEP_CCK; | 236 | val = data->nrg_th_cck + NRG_STEP_CCK; |
239 | data->nrg_th_cck = min((u32)ranges->min_nrg_cck, val); | 237 | data->nrg_th_cck = min((u32) ranges->min_nrg_cck, val); |
240 | } else { | 238 | } else { |
241 | D_CALIB( | 239 | D_CALIB("... but not changing sensitivity\n"); |
242 | "... but not changing sensitivity\n"); | ||
243 | } | 240 | } |
244 | 241 | ||
245 | /* Else we got a healthy number of false alarms, keep status quo */ | 242 | /* Else we got a healthy number of false alarms, keep status quo */ |
246 | } else { | 243 | } else { |
247 | D_CALIB(" FA in safe zone\n"); | 244 | D_CALIB(" FA in safe zone\n"); |
248 | data->nrg_curr_state = IL_FA_GOOD_RANGE; | 245 | data->nrg_curr_state = IL_FA_GOOD_RANGE; |
@@ -283,31 +280,28 @@ static int il4965_sens_energy_cck(struct il_priv *il, | |||
283 | else { | 280 | else { |
284 | val = data->auto_corr_cck + AUTO_CORR_STEP_CCK; | 281 | val = data->auto_corr_cck + AUTO_CORR_STEP_CCK; |
285 | data->auto_corr_cck = | 282 | data->auto_corr_cck = |
286 | min((u32)ranges->auto_corr_max_cck, val); | 283 | min((u32) ranges->auto_corr_max_cck, val); |
287 | } | 284 | } |
288 | val = data->auto_corr_cck_mrc + AUTO_CORR_STEP_CCK; | 285 | val = data->auto_corr_cck_mrc + AUTO_CORR_STEP_CCK; |
289 | data->auto_corr_cck_mrc = | 286 | data->auto_corr_cck_mrc = |
290 | min((u32)ranges->auto_corr_max_cck_mrc, val); | 287 | min((u32) ranges->auto_corr_max_cck_mrc, val); |
291 | } else if (false_alarms < min_false_alarms && | 288 | } else if (false_alarms < min_false_alarms && |
292 | (data->nrg_auto_corr_silence_diff > NRG_DIFF || | 289 | (data->nrg_auto_corr_silence_diff > NRG_DIFF || |
293 | data->num_in_cck_no_fa > MAX_NUMBER_CCK_NO_FA)) { | 290 | data->num_in_cck_no_fa > MAX_NUMBER_CCK_NO_FA)) { |
294 | 291 | ||
295 | /* Decrease auto_corr values to increase sensitivity */ | 292 | /* Decrease auto_corr values to increase sensitivity */ |
296 | val = data->auto_corr_cck - AUTO_CORR_STEP_CCK; | 293 | val = data->auto_corr_cck - AUTO_CORR_STEP_CCK; |
297 | data->auto_corr_cck = | 294 | data->auto_corr_cck = max((u32) ranges->auto_corr_min_cck, val); |
298 | max((u32)ranges->auto_corr_min_cck, val); | ||
299 | val = data->auto_corr_cck_mrc - AUTO_CORR_STEP_CCK; | 295 | val = data->auto_corr_cck_mrc - AUTO_CORR_STEP_CCK; |
300 | data->auto_corr_cck_mrc = | 296 | data->auto_corr_cck_mrc = |
301 | max((u32)ranges->auto_corr_min_cck_mrc, val); | 297 | max((u32) ranges->auto_corr_min_cck_mrc, val); |
302 | } | 298 | } |
303 | 299 | ||
304 | return 0; | 300 | return 0; |
305 | } | 301 | } |
306 | 302 | ||
307 | 303 | static int | |
308 | static int il4965_sens_auto_corr_ofdm(struct il_priv *il, | 304 | il4965_sens_auto_corr_ofdm(struct il_priv *il, u32 norm_fa, u32 rx_enable_time) |
309 | u32 norm_fa, | ||
310 | u32 rx_enable_time) | ||
311 | { | 305 | { |
312 | u32 val; | 306 | u32 val; |
313 | u32 false_alarms = norm_fa * 200 * 1024; | 307 | u32 false_alarms = norm_fa * 200 * 1024; |
@@ -321,96 +315,94 @@ static int il4965_sens_auto_corr_ofdm(struct il_priv *il, | |||
321 | /* If we got too many false alarms this time, reduce sensitivity */ | 315 | /* If we got too many false alarms this time, reduce sensitivity */ |
322 | if (false_alarms > max_false_alarms) { | 316 | if (false_alarms > max_false_alarms) { |
323 | 317 | ||
324 | D_CALIB("norm FA %u > max FA %u)\n", | 318 | D_CALIB("norm FA %u > max FA %u)\n", false_alarms, |
325 | false_alarms, max_false_alarms); | 319 | max_false_alarms); |
326 | 320 | ||
327 | val = data->auto_corr_ofdm + AUTO_CORR_STEP_OFDM; | 321 | val = data->auto_corr_ofdm + AUTO_CORR_STEP_OFDM; |
328 | data->auto_corr_ofdm = | 322 | data->auto_corr_ofdm = |
329 | min((u32)ranges->auto_corr_max_ofdm, val); | 323 | min((u32) ranges->auto_corr_max_ofdm, val); |
330 | 324 | ||
331 | val = data->auto_corr_ofdm_mrc + AUTO_CORR_STEP_OFDM; | 325 | val = data->auto_corr_ofdm_mrc + AUTO_CORR_STEP_OFDM; |
332 | data->auto_corr_ofdm_mrc = | 326 | data->auto_corr_ofdm_mrc = |
333 | min((u32)ranges->auto_corr_max_ofdm_mrc, val); | 327 | min((u32) ranges->auto_corr_max_ofdm_mrc, val); |
334 | 328 | ||
335 | val = data->auto_corr_ofdm_x1 + AUTO_CORR_STEP_OFDM; | 329 | val = data->auto_corr_ofdm_x1 + AUTO_CORR_STEP_OFDM; |
336 | data->auto_corr_ofdm_x1 = | 330 | data->auto_corr_ofdm_x1 = |
337 | min((u32)ranges->auto_corr_max_ofdm_x1, val); | 331 | min((u32) ranges->auto_corr_max_ofdm_x1, val); |
338 | 332 | ||
339 | val = data->auto_corr_ofdm_mrc_x1 + AUTO_CORR_STEP_OFDM; | 333 | val = data->auto_corr_ofdm_mrc_x1 + AUTO_CORR_STEP_OFDM; |
340 | data->auto_corr_ofdm_mrc_x1 = | 334 | data->auto_corr_ofdm_mrc_x1 = |
341 | min((u32)ranges->auto_corr_max_ofdm_mrc_x1, val); | 335 | min((u32) ranges->auto_corr_max_ofdm_mrc_x1, val); |
342 | } | 336 | } |
343 | 337 | ||
344 | /* Else if we got fewer than desired, increase sensitivity */ | 338 | /* Else if we got fewer than desired, increase sensitivity */ |
345 | else if (false_alarms < min_false_alarms) { | 339 | else if (false_alarms < min_false_alarms) { |
346 | 340 | ||
347 | D_CALIB("norm FA %u < min FA %u\n", | 341 | D_CALIB("norm FA %u < min FA %u\n", false_alarms, |
348 | false_alarms, min_false_alarms); | 342 | min_false_alarms); |
349 | 343 | ||
350 | val = data->auto_corr_ofdm - AUTO_CORR_STEP_OFDM; | 344 | val = data->auto_corr_ofdm - AUTO_CORR_STEP_OFDM; |
351 | data->auto_corr_ofdm = | 345 | data->auto_corr_ofdm = |
352 | max((u32)ranges->auto_corr_min_ofdm, val); | 346 | max((u32) ranges->auto_corr_min_ofdm, val); |
353 | 347 | ||
354 | val = data->auto_corr_ofdm_mrc - AUTO_CORR_STEP_OFDM; | 348 | val = data->auto_corr_ofdm_mrc - AUTO_CORR_STEP_OFDM; |
355 | data->auto_corr_ofdm_mrc = | 349 | data->auto_corr_ofdm_mrc = |
356 | max((u32)ranges->auto_corr_min_ofdm_mrc, val); | 350 | max((u32) ranges->auto_corr_min_ofdm_mrc, val); |
357 | 351 | ||
358 | val = data->auto_corr_ofdm_x1 - AUTO_CORR_STEP_OFDM; | 352 | val = data->auto_corr_ofdm_x1 - AUTO_CORR_STEP_OFDM; |
359 | data->auto_corr_ofdm_x1 = | 353 | data->auto_corr_ofdm_x1 = |
360 | max((u32)ranges->auto_corr_min_ofdm_x1, val); | 354 | max((u32) ranges->auto_corr_min_ofdm_x1, val); |
361 | 355 | ||
362 | val = data->auto_corr_ofdm_mrc_x1 - AUTO_CORR_STEP_OFDM; | 356 | val = data->auto_corr_ofdm_mrc_x1 - AUTO_CORR_STEP_OFDM; |
363 | data->auto_corr_ofdm_mrc_x1 = | 357 | data->auto_corr_ofdm_mrc_x1 = |
364 | max((u32)ranges->auto_corr_min_ofdm_mrc_x1, val); | 358 | max((u32) ranges->auto_corr_min_ofdm_mrc_x1, val); |
365 | } else { | 359 | } else { |
366 | D_CALIB("min FA %u < norm FA %u < max FA %u OK\n", | 360 | D_CALIB("min FA %u < norm FA %u < max FA %u OK\n", |
367 | min_false_alarms, false_alarms, max_false_alarms); | 361 | min_false_alarms, false_alarms, max_false_alarms); |
368 | } | 362 | } |
369 | return 0; | 363 | return 0; |
370 | } | 364 | } |
371 | 365 | ||
372 | static void il4965_prepare_legacy_sensitivity_tbl(struct il_priv *il, | 366 | static void |
373 | struct il_sensitivity_data *data, | 367 | il4965_prepare_legacy_sensitivity_tbl(struct il_priv *il, |
374 | __le16 *tbl) | 368 | struct il_sensitivity_data *data, |
369 | __le16 * tbl) | ||
375 | { | 370 | { |
376 | tbl[HD_AUTO_CORR32_X4_TH_ADD_MIN_IDX] = | 371 | tbl[HD_AUTO_CORR32_X4_TH_ADD_MIN_IDX] = |
377 | cpu_to_le16((u16)data->auto_corr_ofdm); | 372 | cpu_to_le16((u16) data->auto_corr_ofdm); |
378 | tbl[HD_AUTO_CORR32_X4_TH_ADD_MIN_MRC_IDX] = | 373 | tbl[HD_AUTO_CORR32_X4_TH_ADD_MIN_MRC_IDX] = |
379 | cpu_to_le16((u16)data->auto_corr_ofdm_mrc); | 374 | cpu_to_le16((u16) data->auto_corr_ofdm_mrc); |
380 | tbl[HD_AUTO_CORR32_X1_TH_ADD_MIN_IDX] = | 375 | tbl[HD_AUTO_CORR32_X1_TH_ADD_MIN_IDX] = |
381 | cpu_to_le16((u16)data->auto_corr_ofdm_x1); | 376 | cpu_to_le16((u16) data->auto_corr_ofdm_x1); |
382 | tbl[HD_AUTO_CORR32_X1_TH_ADD_MIN_MRC_IDX] = | 377 | tbl[HD_AUTO_CORR32_X1_TH_ADD_MIN_MRC_IDX] = |
383 | cpu_to_le16((u16)data->auto_corr_ofdm_mrc_x1); | 378 | cpu_to_le16((u16) data->auto_corr_ofdm_mrc_x1); |
384 | 379 | ||
385 | tbl[HD_AUTO_CORR40_X4_TH_ADD_MIN_IDX] = | 380 | tbl[HD_AUTO_CORR40_X4_TH_ADD_MIN_IDX] = |
386 | cpu_to_le16((u16)data->auto_corr_cck); | 381 | cpu_to_le16((u16) data->auto_corr_cck); |
387 | tbl[HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_IDX] = | 382 | tbl[HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_IDX] = |
388 | cpu_to_le16((u16)data->auto_corr_cck_mrc); | 383 | cpu_to_le16((u16) data->auto_corr_cck_mrc); |
389 | 384 | ||
390 | tbl[HD_MIN_ENERGY_CCK_DET_IDX] = | 385 | tbl[HD_MIN_ENERGY_CCK_DET_IDX] = cpu_to_le16((u16) data->nrg_th_cck); |
391 | cpu_to_le16((u16)data->nrg_th_cck); | 386 | tbl[HD_MIN_ENERGY_OFDM_DET_IDX] = cpu_to_le16((u16) data->nrg_th_ofdm); |
392 | tbl[HD_MIN_ENERGY_OFDM_DET_IDX] = | ||
393 | cpu_to_le16((u16)data->nrg_th_ofdm); | ||
394 | 387 | ||
395 | tbl[HD_BARKER_CORR_TH_ADD_MIN_IDX] = | 388 | tbl[HD_BARKER_CORR_TH_ADD_MIN_IDX] = |
396 | cpu_to_le16(data->barker_corr_th_min); | 389 | cpu_to_le16(data->barker_corr_th_min); |
397 | tbl[HD_BARKER_CORR_TH_ADD_MIN_MRC_IDX] = | 390 | tbl[HD_BARKER_CORR_TH_ADD_MIN_MRC_IDX] = |
398 | cpu_to_le16(data->barker_corr_th_min_mrc); | 391 | cpu_to_le16(data->barker_corr_th_min_mrc); |
399 | tbl[HD_OFDM_ENERGY_TH_IN_IDX] = | 392 | tbl[HD_OFDM_ENERGY_TH_IN_IDX] = cpu_to_le16(data->nrg_th_cca); |
400 | cpu_to_le16(data->nrg_th_cca); | ||
401 | 393 | ||
402 | D_CALIB("ofdm: ac %u mrc %u x1 %u mrc_x1 %u thresh %u\n", | 394 | D_CALIB("ofdm: ac %u mrc %u x1 %u mrc_x1 %u thresh %u\n", |
403 | data->auto_corr_ofdm, data->auto_corr_ofdm_mrc, | 395 | data->auto_corr_ofdm, data->auto_corr_ofdm_mrc, |
404 | data->auto_corr_ofdm_x1, data->auto_corr_ofdm_mrc_x1, | 396 | data->auto_corr_ofdm_x1, data->auto_corr_ofdm_mrc_x1, |
405 | data->nrg_th_ofdm); | 397 | data->nrg_th_ofdm); |
406 | 398 | ||
407 | D_CALIB("cck: ac %u mrc %u thresh %u\n", | 399 | D_CALIB("cck: ac %u mrc %u thresh %u\n", data->auto_corr_cck, |
408 | data->auto_corr_cck, data->auto_corr_cck_mrc, | 400 | data->auto_corr_cck_mrc, data->nrg_th_cck); |
409 | data->nrg_th_cck); | ||
410 | } | 401 | } |
411 | 402 | ||
412 | /* Prepare a C_SENSITIVITY, send to uCode if values have changed */ | 403 | /* Prepare a C_SENSITIVITY, send to uCode if values have changed */ |
413 | static int il4965_sensitivity_write(struct il_priv *il) | 404 | static int |
405 | il4965_sensitivity_write(struct il_priv *il) | ||
414 | { | 406 | { |
415 | struct il_sensitivity_cmd cmd; | 407 | struct il_sensitivity_cmd cmd; |
416 | struct il_sensitivity_data *data = NULL; | 408 | struct il_sensitivity_data *data = NULL; |
@@ -431,20 +423,22 @@ static int il4965_sensitivity_write(struct il_priv *il) | |||
431 | cmd.control = C_SENSITIVITY_CONTROL_WORK_TBL; | 423 | cmd.control = C_SENSITIVITY_CONTROL_WORK_TBL; |
432 | 424 | ||
433 | /* Don't send command to uCode if nothing has changed */ | 425 | /* Don't send command to uCode if nothing has changed */ |
434 | if (!memcmp(&cmd.table[0], &(il->sensitivity_tbl[0]), | 426 | if (!memcmp |
435 | sizeof(u16)*HD_TBL_SIZE)) { | 427 | (&cmd.table[0], &(il->sensitivity_tbl[0]), |
428 | sizeof(u16) * HD_TBL_SIZE)) { | ||
436 | D_CALIB("No change in C_SENSITIVITY\n"); | 429 | D_CALIB("No change in C_SENSITIVITY\n"); |
437 | return 0; | 430 | return 0; |
438 | } | 431 | } |
439 | 432 | ||
440 | /* Copy table for comparison next time */ | 433 | /* Copy table for comparison next time */ |
441 | memcpy(&(il->sensitivity_tbl[0]), &(cmd.table[0]), | 434 | memcpy(&(il->sensitivity_tbl[0]), &(cmd.table[0]), |
442 | sizeof(u16)*HD_TBL_SIZE); | 435 | sizeof(u16) * HD_TBL_SIZE); |
443 | 436 | ||
444 | return il_send_cmd(il, &cmd_out); | 437 | return il_send_cmd(il, &cmd_out); |
445 | } | 438 | } |
446 | 439 | ||
447 | void il4965_init_sensitivity(struct il_priv *il) | 440 | void |
441 | il4965_init_sensitivity(struct il_priv *il) | ||
448 | { | 442 | { |
449 | int ret = 0; | 443 | int ret = 0; |
450 | int i; | 444 | int i; |
@@ -477,9 +471,9 @@ void il4965_init_sensitivity(struct il_priv *il) | |||
477 | for (i = 0; i < NRG_NUM_PREV_STAT_L; i++) | 471 | for (i = 0; i < NRG_NUM_PREV_STAT_L; i++) |
478 | data->nrg_silence_rssi[i] = 0; | 472 | data->nrg_silence_rssi[i] = 0; |
479 | 473 | ||
480 | data->auto_corr_ofdm = ranges->auto_corr_min_ofdm; | 474 | data->auto_corr_ofdm = ranges->auto_corr_min_ofdm; |
481 | data->auto_corr_ofdm_mrc = ranges->auto_corr_min_ofdm_mrc; | 475 | data->auto_corr_ofdm_mrc = ranges->auto_corr_min_ofdm_mrc; |
482 | data->auto_corr_ofdm_x1 = ranges->auto_corr_min_ofdm_x1; | 476 | data->auto_corr_ofdm_x1 = ranges->auto_corr_min_ofdm_x1; |
483 | data->auto_corr_ofdm_mrc_x1 = ranges->auto_corr_min_ofdm_mrc_x1; | 477 | data->auto_corr_ofdm_mrc_x1 = ranges->auto_corr_min_ofdm_mrc_x1; |
484 | data->auto_corr_cck = AUTO_CORR_CCK_MIN_VAL_DEF; | 478 | data->auto_corr_cck = AUTO_CORR_CCK_MIN_VAL_DEF; |
485 | data->auto_corr_cck_mrc = ranges->auto_corr_min_cck_mrc; | 479 | data->auto_corr_cck_mrc = ranges->auto_corr_min_cck_mrc; |
@@ -498,7 +492,8 @@ void il4965_init_sensitivity(struct il_priv *il) | |||
498 | D_CALIB("<<return 0x%X\n", ret); | 492 | D_CALIB("<<return 0x%X\n", ret); |
499 | } | 493 | } |
500 | 494 | ||
501 | void il4965_sensitivity_calibration(struct il_priv *il, void *resp) | 495 | void |
496 | il4965_sensitivity_calibration(struct il_priv *il, void *resp) | ||
502 | { | 497 | { |
503 | u32 rx_enable_time; | 498 | u32 rx_enable_time; |
504 | u32 fa_cck; | 499 | u32 fa_cck; |
@@ -543,17 +538,14 @@ void il4965_sensitivity_calibration(struct il_priv *il, void *resp) | |||
543 | bad_plcp_ofdm = le32_to_cpu(ofdm->plcp_err); | 538 | bad_plcp_ofdm = le32_to_cpu(ofdm->plcp_err); |
544 | 539 | ||
545 | statis.beacon_silence_rssi_a = | 540 | statis.beacon_silence_rssi_a = |
546 | le32_to_cpu(rx_info->beacon_silence_rssi_a); | 541 | le32_to_cpu(rx_info->beacon_silence_rssi_a); |
547 | statis.beacon_silence_rssi_b = | 542 | statis.beacon_silence_rssi_b = |
548 | le32_to_cpu(rx_info->beacon_silence_rssi_b); | 543 | le32_to_cpu(rx_info->beacon_silence_rssi_b); |
549 | statis.beacon_silence_rssi_c = | 544 | statis.beacon_silence_rssi_c = |
550 | le32_to_cpu(rx_info->beacon_silence_rssi_c); | 545 | le32_to_cpu(rx_info->beacon_silence_rssi_c); |
551 | statis.beacon_energy_a = | 546 | statis.beacon_energy_a = le32_to_cpu(rx_info->beacon_energy_a); |
552 | le32_to_cpu(rx_info->beacon_energy_a); | 547 | statis.beacon_energy_b = le32_to_cpu(rx_info->beacon_energy_b); |
553 | statis.beacon_energy_b = | 548 | statis.beacon_energy_c = le32_to_cpu(rx_info->beacon_energy_c); |
554 | le32_to_cpu(rx_info->beacon_energy_b); | ||
555 | statis.beacon_energy_c = | ||
556 | le32_to_cpu(rx_info->beacon_energy_c); | ||
557 | 549 | ||
558 | spin_unlock_irqrestore(&il->lock, flags); | 550 | spin_unlock_irqrestore(&il->lock, flags); |
559 | 551 | ||
@@ -599,9 +591,8 @@ void il4965_sensitivity_calibration(struct il_priv *il, void *resp) | |||
599 | norm_fa_ofdm = fa_ofdm + bad_plcp_ofdm; | 591 | norm_fa_ofdm = fa_ofdm + bad_plcp_ofdm; |
600 | norm_fa_cck = fa_cck + bad_plcp_cck; | 592 | norm_fa_cck = fa_cck + bad_plcp_cck; |
601 | 593 | ||
602 | D_CALIB( | 594 | D_CALIB("cck: fa %u badp %u ofdm: fa %u badp %u\n", fa_cck, |
603 | "cck: fa %u badp %u ofdm: fa %u badp %u\n", fa_cck, | 595 | bad_plcp_cck, fa_ofdm, bad_plcp_ofdm); |
604 | bad_plcp_cck, fa_ofdm, bad_plcp_ofdm); | ||
605 | 596 | ||
606 | il4965_sens_auto_corr_ofdm(il, norm_fa_ofdm, rx_enable_time); | 597 | il4965_sens_auto_corr_ofdm(il, norm_fa_ofdm, rx_enable_time); |
607 | il4965_sens_energy_cck(il, norm_fa_cck, rx_enable_time, &statis); | 598 | il4965_sens_energy_cck(il, norm_fa_cck, rx_enable_time, &statis); |
@@ -609,7 +600,8 @@ void il4965_sensitivity_calibration(struct il_priv *il, void *resp) | |||
609 | il4965_sensitivity_write(il); | 600 | il4965_sensitivity_write(il); |
610 | } | 601 | } |
611 | 602 | ||
612 | static inline u8 il4965_find_first_chain(u8 mask) | 603 | static inline u8 |
604 | il4965_find_first_chain(u8 mask) | ||
613 | { | 605 | { |
614 | if (mask & ANT_A) | 606 | if (mask & ANT_A) |
615 | return CHAIN_A; | 607 | return CHAIN_A; |
@@ -623,8 +615,8 @@ static inline u8 il4965_find_first_chain(u8 mask) | |||
623 | * disconnected. | 615 | * disconnected. |
624 | */ | 616 | */ |
625 | static void | 617 | static void |
626 | il4965_find_disconn_antenna(struct il_priv *il, u32* average_sig, | 618 | il4965_find_disconn_antenna(struct il_priv *il, u32 * average_sig, |
627 | struct il_chain_noise_data *data) | 619 | struct il_chain_noise_data *data) |
628 | { | 620 | { |
629 | u32 active_chains = 0; | 621 | u32 active_chains = 0; |
630 | u32 max_average_sig; | 622 | u32 max_average_sig; |
@@ -633,12 +625,15 @@ il4965_find_disconn_antenna(struct il_priv *il, u32* average_sig, | |||
633 | u8 first_chain; | 625 | u8 first_chain; |
634 | u16 i = 0; | 626 | u16 i = 0; |
635 | 627 | ||
636 | average_sig[0] = data->chain_signal_a / | 628 | average_sig[0] = |
637 | il->cfg->base_params->chain_noise_num_beacons; | 629 | data->chain_signal_a / |
638 | average_sig[1] = data->chain_signal_b / | 630 | il->cfg->base_params->chain_noise_num_beacons; |
639 | il->cfg->base_params->chain_noise_num_beacons; | 631 | average_sig[1] = |
640 | average_sig[2] = data->chain_signal_c / | 632 | data->chain_signal_b / |
641 | il->cfg->base_params->chain_noise_num_beacons; | 633 | il->cfg->base_params->chain_noise_num_beacons; |
634 | average_sig[2] = | ||
635 | data->chain_signal_c / | ||
636 | il->cfg->base_params->chain_noise_num_beacons; | ||
642 | 637 | ||
643 | if (average_sig[0] >= average_sig[1]) { | 638 | if (average_sig[0] >= average_sig[1]) { |
644 | max_average_sig = average_sig[0]; | 639 | max_average_sig = average_sig[0]; |
@@ -656,10 +651,10 @@ il4965_find_disconn_antenna(struct il_priv *il, u32* average_sig, | |||
656 | active_chains = (1 << max_average_sig_antenna_i); | 651 | active_chains = (1 << max_average_sig_antenna_i); |
657 | } | 652 | } |
658 | 653 | ||
659 | D_CALIB("average_sig: a %d b %d c %d\n", | 654 | D_CALIB("average_sig: a %d b %d c %d\n", average_sig[0], average_sig[1], |
660 | average_sig[0], average_sig[1], average_sig[2]); | 655 | average_sig[2]); |
661 | D_CALIB("max_average_sig = %d, antenna %d\n", | 656 | D_CALIB("max_average_sig = %d, antenna %d\n", max_average_sig, |
662 | max_average_sig, max_average_sig_antenna_i); | 657 | max_average_sig_antenna_i); |
663 | 658 | ||
664 | /* Compare signal strengths for all 3 receivers. */ | 659 | /* Compare signal strengths for all 3 receivers. */ |
665 | for (i = 0; i < NUM_RX_CHAINS; i++) { | 660 | for (i = 0; i < NUM_RX_CHAINS; i++) { |
@@ -673,8 +668,8 @@ il4965_find_disconn_antenna(struct il_priv *il, u32* average_sig, | |||
673 | else | 668 | else |
674 | active_chains |= (1 << i); | 669 | active_chains |= (1 << i); |
675 | D_CALIB("i = %d rssiDelta = %d " | 670 | D_CALIB("i = %d rssiDelta = %d " |
676 | "disconn_array[i] = %d\n", | 671 | "disconn_array[i] = %d\n", i, rssi_delta, |
677 | i, rssi_delta, data->disconn_array[i]); | 672 | data->disconn_array[i]); |
678 | } | 673 | } |
679 | } | 674 | } |
680 | 675 | ||
@@ -709,34 +704,31 @@ il4965_find_disconn_antenna(struct il_priv *il, u32* average_sig, | |||
709 | * connect the first valid tx chain | 704 | * connect the first valid tx chain |
710 | */ | 705 | */ |
711 | first_chain = | 706 | first_chain = |
712 | il4965_find_first_chain(il->cfg->valid_tx_ant); | 707 | il4965_find_first_chain(il->cfg->valid_tx_ant); |
713 | data->disconn_array[first_chain] = 0; | 708 | data->disconn_array[first_chain] = 0; |
714 | active_chains |= BIT(first_chain); | 709 | active_chains |= BIT(first_chain); |
715 | D_CALIB( | 710 | D_CALIB |
716 | "All Tx chains are disconnected W/A - declare %d as connected\n", | 711 | ("All Tx chains are disconnected W/A - declare %d as connected\n", |
717 | first_chain); | 712 | first_chain); |
718 | break; | 713 | break; |
719 | } | 714 | } |
720 | } | 715 | } |
721 | 716 | ||
722 | if (active_chains != il->hw_params.valid_rx_ant && | 717 | if (active_chains != il->hw_params.valid_rx_ant && |
723 | active_chains != il->chain_noise_data.active_chains) | 718 | active_chains != il->chain_noise_data.active_chains) |
724 | D_CALIB( | 719 | D_CALIB("Detected that not all antennas are connected! " |
725 | "Detected that not all antennas are connected! " | 720 | "Connected: %#x, valid: %#x.\n", active_chains, |
726 | "Connected: %#x, valid: %#x.\n", | 721 | il->hw_params.valid_rx_ant); |
727 | active_chains, il->hw_params.valid_rx_ant); | ||
728 | 722 | ||
729 | /* Save for use within RXON, TX, SCAN commands, etc. */ | 723 | /* Save for use within RXON, TX, SCAN commands, etc. */ |
730 | data->active_chains = active_chains; | 724 | data->active_chains = active_chains; |
731 | D_CALIB("active_chains (bitwise) = 0x%x\n", | 725 | D_CALIB("active_chains (bitwise) = 0x%x\n", active_chains); |
732 | active_chains); | ||
733 | } | 726 | } |
734 | 727 | ||
735 | static void il4965_gain_computation(struct il_priv *il, | 728 | static void |
736 | u32 *average_noise, | 729 | il4965_gain_computation(struct il_priv *il, u32 * average_noise, |
737 | u16 min_average_noise_antenna_i, | 730 | u16 min_average_noise_antenna_i, u32 min_average_noise, |
738 | u32 min_average_noise, | 731 | u8 default_chain) |
739 | u8 default_chain) | ||
740 | { | 732 | { |
741 | int i, ret; | 733 | int i, ret; |
742 | struct il_chain_noise_data *data = &il->chain_noise_data; | 734 | struct il_chain_noise_data *data = &il->chain_noise_data; |
@@ -747,23 +739,22 @@ static void il4965_gain_computation(struct il_priv *il, | |||
747 | s32 delta_g = 0; | 739 | s32 delta_g = 0; |
748 | 740 | ||
749 | if (!data->disconn_array[i] && | 741 | if (!data->disconn_array[i] && |
750 | data->delta_gain_code[i] == CHAIN_NOISE_DELTA_GAIN_INIT_VAL) { | 742 | data->delta_gain_code[i] == |
743 | CHAIN_NOISE_DELTA_GAIN_INIT_VAL) { | ||
751 | delta_g = average_noise[i] - min_average_noise; | 744 | delta_g = average_noise[i] - min_average_noise; |
752 | data->delta_gain_code[i] = (u8)((delta_g * 10) / 15); | 745 | data->delta_gain_code[i] = (u8) ((delta_g * 10) / 15); |
753 | data->delta_gain_code[i] = | 746 | data->delta_gain_code[i] = |
754 | min(data->delta_gain_code[i], | 747 | min(data->delta_gain_code[i], |
755 | (u8) CHAIN_NOISE_MAX_DELTA_GAIN_CODE); | 748 | (u8) CHAIN_NOISE_MAX_DELTA_GAIN_CODE); |
756 | 749 | ||
757 | data->delta_gain_code[i] = | 750 | data->delta_gain_code[i] = |
758 | (data->delta_gain_code[i] | (1 << 2)); | 751 | (data->delta_gain_code[i] | (1 << 2)); |
759 | } else { | 752 | } else { |
760 | data->delta_gain_code[i] = 0; | 753 | data->delta_gain_code[i] = 0; |
761 | } | 754 | } |
762 | } | 755 | } |
763 | D_CALIB("delta_gain_codes: a %d b %d c %d\n", | 756 | D_CALIB("delta_gain_codes: a %d b %d c %d\n", data->delta_gain_code[0], |
764 | data->delta_gain_code[0], | 757 | data->delta_gain_code[1], data->delta_gain_code[2]); |
765 | data->delta_gain_code[1], | ||
766 | data->delta_gain_code[2]); | ||
767 | 758 | ||
768 | /* Differential gain gets sent to uCode only once */ | 759 | /* Differential gain gets sent to uCode only once */ |
769 | if (!data->radio_write) { | 760 | if (!data->radio_write) { |
@@ -775,11 +766,9 @@ static void il4965_gain_computation(struct il_priv *il, | |||
775 | cmd.diff_gain_a = data->delta_gain_code[0]; | 766 | cmd.diff_gain_a = data->delta_gain_code[0]; |
776 | cmd.diff_gain_b = data->delta_gain_code[1]; | 767 | cmd.diff_gain_b = data->delta_gain_code[1]; |
777 | cmd.diff_gain_c = data->delta_gain_code[2]; | 768 | cmd.diff_gain_c = data->delta_gain_code[2]; |
778 | ret = il_send_cmd_pdu(il, C_PHY_CALIBRATION, | 769 | ret = il_send_cmd_pdu(il, C_PHY_CALIBRATION, sizeof(cmd), &cmd); |
779 | sizeof(cmd), &cmd); | ||
780 | if (ret) | 770 | if (ret) |
781 | D_CALIB("fail sending cmd " | 771 | D_CALIB("fail sending cmd " "C_PHY_CALIBRATION\n"); |
782 | "C_PHY_CALIBRATION\n"); | ||
783 | 772 | ||
784 | /* TODO we might want recalculate | 773 | /* TODO we might want recalculate |
785 | * rx_chain in rxon cmd */ | 774 | * rx_chain in rxon cmd */ |
@@ -789,15 +778,14 @@ static void il4965_gain_computation(struct il_priv *il, | |||
789 | } | 778 | } |
790 | } | 779 | } |
791 | 780 | ||
792 | |||
793 | |||
794 | /* | 781 | /* |
795 | * Accumulate 16 beacons of signal and noise stats for each of | 782 | * Accumulate 16 beacons of signal and noise stats for each of |
796 | * 3 receivers/antennas/rx-chains, then figure out: | 783 | * 3 receivers/antennas/rx-chains, then figure out: |
797 | * 1) Which antennas are connected. | 784 | * 1) Which antennas are connected. |
798 | * 2) Differential rx gain settings to balance the 3 receivers. | 785 | * 2) Differential rx gain settings to balance the 3 receivers. |
799 | */ | 786 | */ |
800 | void il4965_chain_noise_calibration(struct il_priv *il, void *stat_resp) | 787 | void |
788 | il4965_chain_noise_calibration(struct il_priv *il, void *stat_resp) | ||
801 | { | 789 | { |
802 | struct il_chain_noise_data *data = NULL; | 790 | struct il_chain_noise_data *data = NULL; |
803 | 791 | ||
@@ -807,8 +795,8 @@ void il4965_chain_noise_calibration(struct il_priv *il, void *stat_resp) | |||
807 | u32 chain_sig_a; | 795 | u32 chain_sig_a; |
808 | u32 chain_sig_b; | 796 | u32 chain_sig_b; |
809 | u32 chain_sig_c; | 797 | u32 chain_sig_c; |
810 | u32 average_sig[NUM_RX_CHAINS] = {INITIALIZATION_VALUE}; | 798 | u32 average_sig[NUM_RX_CHAINS] = { INITIALIZATION_VALUE }; |
811 | u32 average_noise[NUM_RX_CHAINS] = {INITIALIZATION_VALUE}; | 799 | u32 average_noise[NUM_RX_CHAINS] = { INITIALIZATION_VALUE }; |
812 | u32 min_average_noise = MIN_AVERAGE_NOISE_MAX_VALUE; | 800 | u32 min_average_noise = MIN_AVERAGE_NOISE_MAX_VALUE; |
813 | u16 min_average_noise_antenna_i = INITIALIZATION_VALUE; | 801 | u16 min_average_noise_antenna_i = INITIALIZATION_VALUE; |
814 | u16 i = 0; | 802 | u16 i = 0; |
@@ -838,8 +826,7 @@ void il4965_chain_noise_calibration(struct il_priv *il, void *stat_resp) | |||
838 | 826 | ||
839 | spin_lock_irqsave(&il->lock, flags); | 827 | spin_lock_irqsave(&il->lock, flags); |
840 | 828 | ||
841 | rx_info = &(((struct il_notif_stats *)stat_resp)-> | 829 | rx_info = &(((struct il_notif_stats *)stat_resp)->rx.general); |
842 | rx.general); | ||
843 | 830 | ||
844 | if (rx_info->interference_data_flag != INTERFERENCE_DATA_AVAILABLE) { | 831 | if (rx_info->interference_data_flag != INTERFERENCE_DATA_AVAILABLE) { |
845 | D_CALIB(" << Interference data unavailable\n"); | 832 | D_CALIB(" << Interference data unavailable\n"); |
@@ -850,17 +837,17 @@ void il4965_chain_noise_calibration(struct il_priv *il, void *stat_resp) | |||
850 | rxon_band24 = !!(ctx->staging.flags & RXON_FLG_BAND_24G_MSK); | 837 | rxon_band24 = !!(ctx->staging.flags & RXON_FLG_BAND_24G_MSK); |
851 | rxon_chnum = le16_to_cpu(ctx->staging.channel); | 838 | rxon_chnum = le16_to_cpu(ctx->staging.channel); |
852 | 839 | ||
853 | stat_band24 = !!(((struct il_notif_stats *) | 840 | stat_band24 = |
854 | stat_resp)->flag & | 841 | !!(((struct il_notif_stats *)stat_resp)-> |
855 | STATS_REPLY_FLG_BAND_24G_MSK); | 842 | flag & STATS_REPLY_FLG_BAND_24G_MSK); |
856 | stat_chnum = le32_to_cpu(((struct il_notif_stats *) | 843 | stat_chnum = |
857 | stat_resp)->flag) >> 16; | 844 | le32_to_cpu(((struct il_notif_stats *)stat_resp)->flag) >> 16; |
858 | 845 | ||
859 | /* Make sure we accumulate data for just the associated channel | 846 | /* Make sure we accumulate data for just the associated channel |
860 | * (even if scanning). */ | 847 | * (even if scanning). */ |
861 | if (rxon_chnum != stat_chnum || rxon_band24 != stat_band24) { | 848 | if (rxon_chnum != stat_chnum || rxon_band24 != stat_band24) { |
862 | D_CALIB("Stats not from chan=%d, band24=%d\n", | 849 | D_CALIB("Stats not from chan=%d, band24=%d\n", rxon_chnum, |
863 | rxon_chnum, rxon_band24); | 850 | rxon_band24); |
864 | spin_unlock_irqrestore(&il->lock, flags); | 851 | spin_unlock_irqrestore(&il->lock, flags); |
865 | return; | 852 | return; |
866 | } | 853 | } |
@@ -869,12 +856,12 @@ void il4965_chain_noise_calibration(struct il_priv *il, void *stat_resp) | |||
869 | * Accumulate beacon stats values across | 856 | * Accumulate beacon stats values across |
870 | * "chain_noise_num_beacons" | 857 | * "chain_noise_num_beacons" |
871 | */ | 858 | */ |
872 | chain_noise_a = le32_to_cpu(rx_info->beacon_silence_rssi_a) & | 859 | chain_noise_a = |
873 | IN_BAND_FILTER; | 860 | le32_to_cpu(rx_info->beacon_silence_rssi_a) & IN_BAND_FILTER; |
874 | chain_noise_b = le32_to_cpu(rx_info->beacon_silence_rssi_b) & | 861 | chain_noise_b = |
875 | IN_BAND_FILTER; | 862 | le32_to_cpu(rx_info->beacon_silence_rssi_b) & IN_BAND_FILTER; |
876 | chain_noise_c = le32_to_cpu(rx_info->beacon_silence_rssi_c) & | 863 | chain_noise_c = |
877 | IN_BAND_FILTER; | 864 | le32_to_cpu(rx_info->beacon_silence_rssi_c) & IN_BAND_FILTER; |
878 | 865 | ||
879 | chain_sig_a = le32_to_cpu(rx_info->beacon_rssi_a) & IN_BAND_FILTER; | 866 | chain_sig_a = le32_to_cpu(rx_info->beacon_rssi_a) & IN_BAND_FILTER; |
880 | chain_sig_b = le32_to_cpu(rx_info->beacon_rssi_b) & IN_BAND_FILTER; | 867 | chain_sig_b = le32_to_cpu(rx_info->beacon_rssi_b) & IN_BAND_FILTER; |
@@ -892,30 +879,29 @@ void il4965_chain_noise_calibration(struct il_priv *il, void *stat_resp) | |||
892 | data->chain_signal_b = (chain_sig_b + data->chain_signal_b); | 879 | data->chain_signal_b = (chain_sig_b + data->chain_signal_b); |
893 | data->chain_signal_c = (chain_sig_c + data->chain_signal_c); | 880 | data->chain_signal_c = (chain_sig_c + data->chain_signal_c); |
894 | 881 | ||
895 | D_CALIB("chan=%d, band24=%d, beacon=%d\n", | 882 | D_CALIB("chan=%d, band24=%d, beacon=%d\n", rxon_chnum, rxon_band24, |
896 | rxon_chnum, rxon_band24, data->beacon_count); | 883 | data->beacon_count); |
897 | D_CALIB("chain_sig: a %d b %d c %d\n", | 884 | D_CALIB("chain_sig: a %d b %d c %d\n", chain_sig_a, chain_sig_b, |
898 | chain_sig_a, chain_sig_b, chain_sig_c); | 885 | chain_sig_c); |
899 | D_CALIB("chain_noise: a %d b %d c %d\n", | 886 | D_CALIB("chain_noise: a %d b %d c %d\n", chain_noise_a, chain_noise_b, |
900 | chain_noise_a, chain_noise_b, chain_noise_c); | 887 | chain_noise_c); |
901 | 888 | ||
902 | /* If this is the "chain_noise_num_beacons", determine: | 889 | /* If this is the "chain_noise_num_beacons", determine: |
903 | * 1) Disconnected antennas (using signal strengths) | 890 | * 1) Disconnected antennas (using signal strengths) |
904 | * 2) Differential gain (using silence noise) to balance receivers */ | 891 | * 2) Differential gain (using silence noise) to balance receivers */ |
905 | if (data->beacon_count != | 892 | if (data->beacon_count != il->cfg->base_params->chain_noise_num_beacons) |
906 | il->cfg->base_params->chain_noise_num_beacons) | ||
907 | return; | 893 | return; |
908 | 894 | ||
909 | /* Analyze signal for disconnected antenna */ | 895 | /* Analyze signal for disconnected antenna */ |
910 | il4965_find_disconn_antenna(il, average_sig, data); | 896 | il4965_find_disconn_antenna(il, average_sig, data); |
911 | 897 | ||
912 | /* Analyze noise for rx balance */ | 898 | /* Analyze noise for rx balance */ |
913 | average_noise[0] = data->chain_noise_a / | 899 | average_noise[0] = |
914 | il->cfg->base_params->chain_noise_num_beacons; | 900 | data->chain_noise_a / il->cfg->base_params->chain_noise_num_beacons; |
915 | average_noise[1] = data->chain_noise_b / | 901 | average_noise[1] = |
916 | il->cfg->base_params->chain_noise_num_beacons; | 902 | data->chain_noise_b / il->cfg->base_params->chain_noise_num_beacons; |
917 | average_noise[2] = data->chain_noise_c / | 903 | average_noise[2] = |
918 | il->cfg->base_params->chain_noise_num_beacons; | 904 | data->chain_noise_c / il->cfg->base_params->chain_noise_num_beacons; |
919 | 905 | ||
920 | for (i = 0; i < NUM_RX_CHAINS; i++) { | 906 | for (i = 0; i < NUM_RX_CHAINS; i++) { |
921 | if (!data->disconn_array[i] && | 907 | if (!data->disconn_array[i] && |
@@ -927,16 +913,15 @@ void il4965_chain_noise_calibration(struct il_priv *il, void *stat_resp) | |||
927 | } | 913 | } |
928 | } | 914 | } |
929 | 915 | ||
930 | D_CALIB("average_noise: a %d b %d c %d\n", | 916 | D_CALIB("average_noise: a %d b %d c %d\n", average_noise[0], |
931 | average_noise[0], average_noise[1], | 917 | average_noise[1], average_noise[2]); |
932 | average_noise[2]); | ||
933 | 918 | ||
934 | D_CALIB("min_average_noise = %d, antenna %d\n", | 919 | D_CALIB("min_average_noise = %d, antenna %d\n", min_average_noise, |
935 | min_average_noise, min_average_noise_antenna_i); | 920 | min_average_noise_antenna_i); |
936 | 921 | ||
937 | il4965_gain_computation(il, average_noise, | 922 | il4965_gain_computation(il, average_noise, min_average_noise_antenna_i, |
938 | min_average_noise_antenna_i, min_average_noise, | 923 | min_average_noise, |
939 | il4965_find_first_chain(il->cfg->valid_rx_ant)); | 924 | il4965_find_first_chain(il->cfg->valid_rx_ant)); |
940 | 925 | ||
941 | /* Some power changes may have been made during the calibration. | 926 | /* Some power changes may have been made during the calibration. |
942 | * Update and commit the RXON | 927 | * Update and commit the RXON |
@@ -948,16 +933,15 @@ void il4965_chain_noise_calibration(struct il_priv *il, void *stat_resp) | |||
948 | il_power_update_mode(il, false); | 933 | il_power_update_mode(il, false); |
949 | } | 934 | } |
950 | 935 | ||
951 | void il4965_reset_run_time_calib(struct il_priv *il) | 936 | void |
937 | il4965_reset_run_time_calib(struct il_priv *il) | ||
952 | { | 938 | { |
953 | int i; | 939 | int i; |
954 | memset(&(il->sensitivity_data), 0, | 940 | memset(&(il->sensitivity_data), 0, sizeof(struct il_sensitivity_data)); |
955 | sizeof(struct il_sensitivity_data)); | 941 | memset(&(il->chain_noise_data), 0, sizeof(struct il_chain_noise_data)); |
956 | memset(&(il->chain_noise_data), 0, | ||
957 | sizeof(struct il_chain_noise_data)); | ||
958 | for (i = 0; i < NUM_RX_CHAINS; i++) | 942 | for (i = 0; i < NUM_RX_CHAINS; i++) |
959 | il->chain_noise_data.delta_gain_code[i] = | 943 | il->chain_noise_data.delta_gain_code[i] = |
960 | CHAIN_NOISE_DELTA_GAIN_INIT_VAL; | 944 | CHAIN_NOISE_DELTA_GAIN_INIT_VAL; |
961 | 945 | ||
962 | /* Ask for stats now, the uCode will send notification | 946 | /* Ask for stats now, the uCode will send notification |
963 | * periodically after association */ | 947 | * periodically after association */ |
diff --git a/drivers/net/wireless/iwlegacy/4965-debug.c b/drivers/net/wireless/iwlegacy/4965-debug.c index 5f8903175168..529939938600 100644 --- a/drivers/net/wireless/iwlegacy/4965-debug.c +++ b/drivers/net/wireless/iwlegacy/4965-debug.c | |||
@@ -31,9 +31,10 @@ | |||
31 | static const char *fmt_value = " %-30s %10u\n"; | 31 | static const char *fmt_value = " %-30s %10u\n"; |
32 | static const char *fmt_table = " %-30s %10u %10u %10u %10u\n"; | 32 | static const char *fmt_table = " %-30s %10u %10u %10u %10u\n"; |
33 | static const char *fmt_header = | 33 | static const char *fmt_header = |
34 | "%-32s current cumulative delta max\n"; | 34 | "%-32s current cumulative delta max\n"; |
35 | 35 | ||
36 | static int il4965_stats_flag(struct il_priv *il, char *buf, int bufsz) | 36 | static int |
37 | il4965_stats_flag(struct il_priv *il, char *buf, int bufsz) | ||
37 | { | 38 | { |
38 | int p = 0; | 39 | int p = 0; |
39 | u32 flag; | 40 | u32 flag; |
@@ -43,26 +44,28 @@ static int il4965_stats_flag(struct il_priv *il, char *buf, int bufsz) | |||
43 | p += scnprintf(buf + p, bufsz - p, "Statistics Flag(0x%X):\n", flag); | 44 | p += scnprintf(buf + p, bufsz - p, "Statistics Flag(0x%X):\n", flag); |
44 | if (flag & UCODE_STATS_CLEAR_MSK) | 45 | if (flag & UCODE_STATS_CLEAR_MSK) |
45 | p += scnprintf(buf + p, bufsz - p, | 46 | p += scnprintf(buf + p, bufsz - p, |
46 | "\tStatistics have been cleared\n"); | 47 | "\tStatistics have been cleared\n"); |
47 | p += scnprintf(buf + p, bufsz - p, "\tOperational Frequency: %s\n", | 48 | p += scnprintf(buf + p, bufsz - p, "\tOperational Frequency: %s\n", |
48 | (flag & UCODE_STATS_FREQUENCY_MSK) | 49 | (flag & UCODE_STATS_FREQUENCY_MSK) ? "2.4 GHz" : |
49 | ? "2.4 GHz" : "5.2 GHz"); | 50 | "5.2 GHz"); |
50 | p += scnprintf(buf + p, bufsz - p, "\tTGj Narrow Band: %s\n", | 51 | p += scnprintf(buf + p, bufsz - p, "\tTGj Narrow Band: %s\n", |
51 | (flag & UCODE_STATS_NARROW_BAND_MSK) | 52 | (flag & UCODE_STATS_NARROW_BAND_MSK) ? "enabled" : |
52 | ? "enabled" : "disabled"); | 53 | "disabled"); |
53 | 54 | ||
54 | return p; | 55 | return p; |
55 | } | 56 | } |
56 | 57 | ||
57 | ssize_t il4965_ucode_rx_stats_read(struct file *file, char __user *user_buf, | 58 | ssize_t |
58 | size_t count, loff_t *ppos) | 59 | il4965_ucode_rx_stats_read(struct file * file, char __user * user_buf, |
60 | size_t count, loff_t * ppos) | ||
59 | { | 61 | { |
60 | struct il_priv *il = file->private_data; | 62 | struct il_priv *il = file->private_data; |
61 | int pos = 0; | 63 | int pos = 0; |
62 | char *buf; | 64 | char *buf; |
63 | int bufsz = sizeof(struct stats_rx_phy) * 40 + | 65 | int bufsz = |
64 | sizeof(struct stats_rx_non_phy) * 40 + | 66 | sizeof(struct stats_rx_phy) * 40 + |
65 | sizeof(struct stats_rx_ht_phy) * 40 + 400; | 67 | sizeof(struct stats_rx_non_phy) * 40 + |
68 | sizeof(struct stats_rx_ht_phy) * 40 + 400; | ||
66 | ssize_t ret; | 69 | ssize_t ret; |
67 | struct stats_rx_phy *ofdm, *accum_ofdm, *delta_ofdm, *max_ofdm; | 70 | struct stats_rx_phy *ofdm, *accum_ofdm, *delta_ofdm, *max_ofdm; |
68 | struct stats_rx_phy *cck, *accum_cck, *delta_cck, *max_cck; | 71 | struct stats_rx_phy *cck, *accum_cck, *delta_cck, *max_cck; |
@@ -102,392 +105,371 @@ ssize_t il4965_ucode_rx_stats_read(struct file *file, char __user *user_buf, | |||
102 | max_ht = &il->_4965.max_delta.rx.ofdm_ht; | 105 | max_ht = &il->_4965.max_delta.rx.ofdm_ht; |
103 | 106 | ||
104 | pos += il4965_stats_flag(il, buf, bufsz); | 107 | pos += il4965_stats_flag(il, buf, bufsz); |
105 | pos += scnprintf(buf + pos, bufsz - pos, | 108 | pos += |
106 | fmt_header, "Statistics_Rx - OFDM:"); | 109 | scnprintf(buf + pos, bufsz - pos, fmt_header, |
107 | pos += scnprintf(buf + pos, bufsz - pos, | 110 | "Statistics_Rx - OFDM:"); |
108 | fmt_table, "ina_cnt:", | 111 | pos += |
109 | le32_to_cpu(ofdm->ina_cnt), | 112 | scnprintf(buf + pos, bufsz - pos, fmt_table, "ina_cnt:", |
110 | accum_ofdm->ina_cnt, | 113 | le32_to_cpu(ofdm->ina_cnt), accum_ofdm->ina_cnt, |
111 | delta_ofdm->ina_cnt, max_ofdm->ina_cnt); | 114 | delta_ofdm->ina_cnt, max_ofdm->ina_cnt); |
112 | pos += scnprintf(buf + pos, bufsz - pos, | 115 | pos += |
113 | fmt_table, "fina_cnt:", | 116 | scnprintf(buf + pos, bufsz - pos, fmt_table, "fina_cnt:", |
114 | le32_to_cpu(ofdm->fina_cnt), accum_ofdm->fina_cnt, | 117 | le32_to_cpu(ofdm->fina_cnt), accum_ofdm->fina_cnt, |
115 | delta_ofdm->fina_cnt, max_ofdm->fina_cnt); | 118 | delta_ofdm->fina_cnt, max_ofdm->fina_cnt); |
116 | pos += scnprintf(buf + pos, bufsz - pos, | 119 | pos += |
117 | fmt_table, "plcp_err:", | 120 | scnprintf(buf + pos, bufsz - pos, fmt_table, "plcp_err:", |
118 | le32_to_cpu(ofdm->plcp_err), accum_ofdm->plcp_err, | 121 | le32_to_cpu(ofdm->plcp_err), accum_ofdm->plcp_err, |
119 | delta_ofdm->plcp_err, max_ofdm->plcp_err); | 122 | delta_ofdm->plcp_err, max_ofdm->plcp_err); |
120 | pos += scnprintf(buf + pos, bufsz - pos, | 123 | pos += |
121 | fmt_table, "crc32_err:", | 124 | scnprintf(buf + pos, bufsz - pos, fmt_table, "crc32_err:", |
122 | le32_to_cpu(ofdm->crc32_err), accum_ofdm->crc32_err, | 125 | le32_to_cpu(ofdm->crc32_err), accum_ofdm->crc32_err, |
123 | delta_ofdm->crc32_err, max_ofdm->crc32_err); | 126 | delta_ofdm->crc32_err, max_ofdm->crc32_err); |
124 | pos += scnprintf(buf + pos, bufsz - pos, | 127 | pos += |
125 | fmt_table, "overrun_err:", | 128 | scnprintf(buf + pos, bufsz - pos, fmt_table, "overrun_err:", |
126 | le32_to_cpu(ofdm->overrun_err), | 129 | le32_to_cpu(ofdm->overrun_err), accum_ofdm->overrun_err, |
127 | accum_ofdm->overrun_err, delta_ofdm->overrun_err, | 130 | delta_ofdm->overrun_err, max_ofdm->overrun_err); |
128 | max_ofdm->overrun_err); | 131 | pos += |
129 | pos += scnprintf(buf + pos, bufsz - pos, | 132 | scnprintf(buf + pos, bufsz - pos, fmt_table, "early_overrun_err:", |
130 | fmt_table, "early_overrun_err:", | 133 | le32_to_cpu(ofdm->early_overrun_err), |
131 | le32_to_cpu(ofdm->early_overrun_err), | 134 | accum_ofdm->early_overrun_err, |
132 | accum_ofdm->early_overrun_err, | 135 | delta_ofdm->early_overrun_err, |
133 | delta_ofdm->early_overrun_err, | 136 | max_ofdm->early_overrun_err); |
134 | max_ofdm->early_overrun_err); | 137 | pos += |
135 | pos += scnprintf(buf + pos, bufsz - pos, | 138 | scnprintf(buf + pos, bufsz - pos, fmt_table, "crc32_good:", |
136 | fmt_table, "crc32_good:", | 139 | le32_to_cpu(ofdm->crc32_good), accum_ofdm->crc32_good, |
137 | le32_to_cpu(ofdm->crc32_good), | 140 | delta_ofdm->crc32_good, max_ofdm->crc32_good); |
138 | accum_ofdm->crc32_good, delta_ofdm->crc32_good, | 141 | pos += |
139 | max_ofdm->crc32_good); | 142 | scnprintf(buf + pos, bufsz - pos, fmt_table, "false_alarm_cnt:", |
140 | pos += scnprintf(buf + pos, bufsz - pos, | 143 | le32_to_cpu(ofdm->false_alarm_cnt), |
141 | fmt_table, "false_alarm_cnt:", | 144 | accum_ofdm->false_alarm_cnt, delta_ofdm->false_alarm_cnt, |
142 | le32_to_cpu(ofdm->false_alarm_cnt), | 145 | max_ofdm->false_alarm_cnt); |
143 | accum_ofdm->false_alarm_cnt, | 146 | pos += |
144 | delta_ofdm->false_alarm_cnt, | 147 | scnprintf(buf + pos, bufsz - pos, fmt_table, "fina_sync_err_cnt:", |
145 | max_ofdm->false_alarm_cnt); | 148 | le32_to_cpu(ofdm->fina_sync_err_cnt), |
146 | pos += scnprintf(buf + pos, bufsz - pos, | 149 | accum_ofdm->fina_sync_err_cnt, |
147 | fmt_table, "fina_sync_err_cnt:", | 150 | delta_ofdm->fina_sync_err_cnt, |
148 | le32_to_cpu(ofdm->fina_sync_err_cnt), | 151 | max_ofdm->fina_sync_err_cnt); |
149 | accum_ofdm->fina_sync_err_cnt, | 152 | pos += |
150 | delta_ofdm->fina_sync_err_cnt, | 153 | scnprintf(buf + pos, bufsz - pos, fmt_table, "sfd_timeout:", |
151 | max_ofdm->fina_sync_err_cnt); | 154 | le32_to_cpu(ofdm->sfd_timeout), accum_ofdm->sfd_timeout, |
152 | pos += scnprintf(buf + pos, bufsz - pos, | 155 | delta_ofdm->sfd_timeout, max_ofdm->sfd_timeout); |
153 | fmt_table, "sfd_timeout:", | 156 | pos += |
154 | le32_to_cpu(ofdm->sfd_timeout), | 157 | scnprintf(buf + pos, bufsz - pos, fmt_table, "fina_timeout:", |
155 | accum_ofdm->sfd_timeout, delta_ofdm->sfd_timeout, | 158 | le32_to_cpu(ofdm->fina_timeout), accum_ofdm->fina_timeout, |
156 | max_ofdm->sfd_timeout); | 159 | delta_ofdm->fina_timeout, max_ofdm->fina_timeout); |
157 | pos += scnprintf(buf + pos, bufsz - pos, | 160 | pos += |
158 | fmt_table, "fina_timeout:", | 161 | scnprintf(buf + pos, bufsz - pos, fmt_table, "unresponded_rts:", |
159 | le32_to_cpu(ofdm->fina_timeout), | 162 | le32_to_cpu(ofdm->unresponded_rts), |
160 | accum_ofdm->fina_timeout, delta_ofdm->fina_timeout, | 163 | accum_ofdm->unresponded_rts, delta_ofdm->unresponded_rts, |
161 | max_ofdm->fina_timeout); | 164 | max_ofdm->unresponded_rts); |
162 | pos += scnprintf(buf + pos, bufsz - pos, | 165 | pos += |
163 | fmt_table, "unresponded_rts:", | 166 | scnprintf(buf + pos, bufsz - pos, fmt_table, "rxe_frame_lmt_ovrun:", |
164 | le32_to_cpu(ofdm->unresponded_rts), | 167 | le32_to_cpu(ofdm->rxe_frame_limit_overrun), |
165 | accum_ofdm->unresponded_rts, | 168 | accum_ofdm->rxe_frame_limit_overrun, |
166 | delta_ofdm->unresponded_rts, | 169 | delta_ofdm->rxe_frame_limit_overrun, |
167 | max_ofdm->unresponded_rts); | 170 | max_ofdm->rxe_frame_limit_overrun); |
168 | pos += scnprintf(buf + pos, bufsz - pos, | 171 | pos += |
169 | fmt_table, "rxe_frame_lmt_ovrun:", | 172 | scnprintf(buf + pos, bufsz - pos, fmt_table, "sent_ack_cnt:", |
170 | le32_to_cpu(ofdm->rxe_frame_limit_overrun), | 173 | le32_to_cpu(ofdm->sent_ack_cnt), accum_ofdm->sent_ack_cnt, |
171 | accum_ofdm->rxe_frame_limit_overrun, | 174 | delta_ofdm->sent_ack_cnt, max_ofdm->sent_ack_cnt); |
172 | delta_ofdm->rxe_frame_limit_overrun, | 175 | pos += |
173 | max_ofdm->rxe_frame_limit_overrun); | 176 | scnprintf(buf + pos, bufsz - pos, fmt_table, "sent_cts_cnt:", |
174 | pos += scnprintf(buf + pos, bufsz - pos, | 177 | le32_to_cpu(ofdm->sent_cts_cnt), accum_ofdm->sent_cts_cnt, |
175 | fmt_table, "sent_ack_cnt:", | 178 | delta_ofdm->sent_cts_cnt, max_ofdm->sent_cts_cnt); |
176 | le32_to_cpu(ofdm->sent_ack_cnt), | 179 | pos += |
177 | accum_ofdm->sent_ack_cnt, delta_ofdm->sent_ack_cnt, | 180 | scnprintf(buf + pos, bufsz - pos, fmt_table, "sent_ba_rsp_cnt:", |
178 | max_ofdm->sent_ack_cnt); | 181 | le32_to_cpu(ofdm->sent_ba_rsp_cnt), |
179 | pos += scnprintf(buf + pos, bufsz - pos, | 182 | accum_ofdm->sent_ba_rsp_cnt, delta_ofdm->sent_ba_rsp_cnt, |
180 | fmt_table, "sent_cts_cnt:", | 183 | max_ofdm->sent_ba_rsp_cnt); |
181 | le32_to_cpu(ofdm->sent_cts_cnt), | 184 | pos += |
182 | accum_ofdm->sent_cts_cnt, delta_ofdm->sent_cts_cnt, | 185 | scnprintf(buf + pos, bufsz - pos, fmt_table, "dsp_self_kill:", |
183 | max_ofdm->sent_cts_cnt); | 186 | le32_to_cpu(ofdm->dsp_self_kill), |
184 | pos += scnprintf(buf + pos, bufsz - pos, | 187 | accum_ofdm->dsp_self_kill, delta_ofdm->dsp_self_kill, |
185 | fmt_table, "sent_ba_rsp_cnt:", | 188 | max_ofdm->dsp_self_kill); |
186 | le32_to_cpu(ofdm->sent_ba_rsp_cnt), | 189 | pos += |
187 | accum_ofdm->sent_ba_rsp_cnt, | 190 | scnprintf(buf + pos, bufsz - pos, fmt_table, "mh_format_err:", |
188 | delta_ofdm->sent_ba_rsp_cnt, | 191 | le32_to_cpu(ofdm->mh_format_err), |
189 | max_ofdm->sent_ba_rsp_cnt); | 192 | accum_ofdm->mh_format_err, delta_ofdm->mh_format_err, |
190 | pos += scnprintf(buf + pos, bufsz - pos, | 193 | max_ofdm->mh_format_err); |
191 | fmt_table, "dsp_self_kill:", | 194 | pos += |
192 | le32_to_cpu(ofdm->dsp_self_kill), | 195 | scnprintf(buf + pos, bufsz - pos, fmt_table, |
193 | accum_ofdm->dsp_self_kill, | 196 | "re_acq_main_rssi_sum:", |
194 | delta_ofdm->dsp_self_kill, | 197 | le32_to_cpu(ofdm->re_acq_main_rssi_sum), |
195 | max_ofdm->dsp_self_kill); | 198 | accum_ofdm->re_acq_main_rssi_sum, |
196 | pos += scnprintf(buf + pos, bufsz - pos, | 199 | delta_ofdm->re_acq_main_rssi_sum, |
197 | fmt_table, "mh_format_err:", | 200 | max_ofdm->re_acq_main_rssi_sum); |
198 | le32_to_cpu(ofdm->mh_format_err), | ||
199 | accum_ofdm->mh_format_err, | ||
200 | delta_ofdm->mh_format_err, | ||
201 | max_ofdm->mh_format_err); | ||
202 | pos += scnprintf(buf + pos, bufsz - pos, | ||
203 | fmt_table, "re_acq_main_rssi_sum:", | ||
204 | le32_to_cpu(ofdm->re_acq_main_rssi_sum), | ||
205 | accum_ofdm->re_acq_main_rssi_sum, | ||
206 | delta_ofdm->re_acq_main_rssi_sum, | ||
207 | max_ofdm->re_acq_main_rssi_sum); | ||
208 | 201 | ||
209 | pos += scnprintf(buf + pos, bufsz - pos, | 202 | pos += |
210 | fmt_header, "Statistics_Rx - CCK:"); | 203 | scnprintf(buf + pos, bufsz - pos, fmt_header, |
211 | pos += scnprintf(buf + pos, bufsz - pos, | 204 | "Statistics_Rx - CCK:"); |
212 | fmt_table, "ina_cnt:", | 205 | pos += |
213 | le32_to_cpu(cck->ina_cnt), accum_cck->ina_cnt, | 206 | scnprintf(buf + pos, bufsz - pos, fmt_table, "ina_cnt:", |
214 | delta_cck->ina_cnt, max_cck->ina_cnt); | 207 | le32_to_cpu(cck->ina_cnt), accum_cck->ina_cnt, |
215 | pos += scnprintf(buf + pos, bufsz - pos, | 208 | delta_cck->ina_cnt, max_cck->ina_cnt); |
216 | fmt_table, "fina_cnt:", | 209 | pos += |
217 | le32_to_cpu(cck->fina_cnt), accum_cck->fina_cnt, | 210 | scnprintf(buf + pos, bufsz - pos, fmt_table, "fina_cnt:", |
218 | delta_cck->fina_cnt, max_cck->fina_cnt); | 211 | le32_to_cpu(cck->fina_cnt), accum_cck->fina_cnt, |
219 | pos += scnprintf(buf + pos, bufsz - pos, | 212 | delta_cck->fina_cnt, max_cck->fina_cnt); |
220 | fmt_table, "plcp_err:", | 213 | pos += |
221 | le32_to_cpu(cck->plcp_err), accum_cck->plcp_err, | 214 | scnprintf(buf + pos, bufsz - pos, fmt_table, "plcp_err:", |
222 | delta_cck->plcp_err, max_cck->plcp_err); | 215 | le32_to_cpu(cck->plcp_err), accum_cck->plcp_err, |
223 | pos += scnprintf(buf + pos, bufsz - pos, | 216 | delta_cck->plcp_err, max_cck->plcp_err); |
224 | fmt_table, "crc32_err:", | 217 | pos += |
225 | le32_to_cpu(cck->crc32_err), accum_cck->crc32_err, | 218 | scnprintf(buf + pos, bufsz - pos, fmt_table, "crc32_err:", |
226 | delta_cck->crc32_err, max_cck->crc32_err); | 219 | le32_to_cpu(cck->crc32_err), accum_cck->crc32_err, |
227 | pos += scnprintf(buf + pos, bufsz - pos, | 220 | delta_cck->crc32_err, max_cck->crc32_err); |
228 | fmt_table, "overrun_err:", | 221 | pos += |
229 | le32_to_cpu(cck->overrun_err), | 222 | scnprintf(buf + pos, bufsz - pos, fmt_table, "overrun_err:", |
230 | accum_cck->overrun_err, delta_cck->overrun_err, | 223 | le32_to_cpu(cck->overrun_err), accum_cck->overrun_err, |
231 | max_cck->overrun_err); | 224 | delta_cck->overrun_err, max_cck->overrun_err); |
232 | pos += scnprintf(buf + pos, bufsz - pos, | 225 | pos += |
233 | fmt_table, "early_overrun_err:", | 226 | scnprintf(buf + pos, bufsz - pos, fmt_table, "early_overrun_err:", |
234 | le32_to_cpu(cck->early_overrun_err), | 227 | le32_to_cpu(cck->early_overrun_err), |
235 | accum_cck->early_overrun_err, | 228 | accum_cck->early_overrun_err, |
236 | delta_cck->early_overrun_err, | 229 | delta_cck->early_overrun_err, max_cck->early_overrun_err); |
237 | max_cck->early_overrun_err); | 230 | pos += |
238 | pos += scnprintf(buf + pos, bufsz - pos, | 231 | scnprintf(buf + pos, bufsz - pos, fmt_table, "crc32_good:", |
239 | fmt_table, "crc32_good:", | 232 | le32_to_cpu(cck->crc32_good), accum_cck->crc32_good, |
240 | le32_to_cpu(cck->crc32_good), accum_cck->crc32_good, | 233 | delta_cck->crc32_good, max_cck->crc32_good); |
241 | delta_cck->crc32_good, max_cck->crc32_good); | 234 | pos += |
242 | pos += scnprintf(buf + pos, bufsz - pos, | 235 | scnprintf(buf + pos, bufsz - pos, fmt_table, "false_alarm_cnt:", |
243 | fmt_table, "false_alarm_cnt:", | 236 | le32_to_cpu(cck->false_alarm_cnt), |
244 | le32_to_cpu(cck->false_alarm_cnt), | 237 | accum_cck->false_alarm_cnt, delta_cck->false_alarm_cnt, |
245 | accum_cck->false_alarm_cnt, | 238 | max_cck->false_alarm_cnt); |
246 | delta_cck->false_alarm_cnt, max_cck->false_alarm_cnt); | 239 | pos += |
247 | pos += scnprintf(buf + pos, bufsz - pos, | 240 | scnprintf(buf + pos, bufsz - pos, fmt_table, "fina_sync_err_cnt:", |
248 | fmt_table, "fina_sync_err_cnt:", | 241 | le32_to_cpu(cck->fina_sync_err_cnt), |
249 | le32_to_cpu(cck->fina_sync_err_cnt), | 242 | accum_cck->fina_sync_err_cnt, |
250 | accum_cck->fina_sync_err_cnt, | 243 | delta_cck->fina_sync_err_cnt, max_cck->fina_sync_err_cnt); |
251 | delta_cck->fina_sync_err_cnt, | 244 | pos += |
252 | max_cck->fina_sync_err_cnt); | 245 | scnprintf(buf + pos, bufsz - pos, fmt_table, "sfd_timeout:", |
253 | pos += scnprintf(buf + pos, bufsz - pos, | 246 | le32_to_cpu(cck->sfd_timeout), accum_cck->sfd_timeout, |
254 | fmt_table, "sfd_timeout:", | 247 | delta_cck->sfd_timeout, max_cck->sfd_timeout); |
255 | le32_to_cpu(cck->sfd_timeout), | 248 | pos += |
256 | accum_cck->sfd_timeout, delta_cck->sfd_timeout, | 249 | scnprintf(buf + pos, bufsz - pos, fmt_table, "fina_timeout:", |
257 | max_cck->sfd_timeout); | 250 | le32_to_cpu(cck->fina_timeout), accum_cck->fina_timeout, |
258 | pos += scnprintf(buf + pos, bufsz - pos, | 251 | delta_cck->fina_timeout, max_cck->fina_timeout); |
259 | fmt_table, "fina_timeout:", | 252 | pos += |
260 | le32_to_cpu(cck->fina_timeout), | 253 | scnprintf(buf + pos, bufsz - pos, fmt_table, "unresponded_rts:", |
261 | accum_cck->fina_timeout, delta_cck->fina_timeout, | 254 | le32_to_cpu(cck->unresponded_rts), |
262 | max_cck->fina_timeout); | 255 | accum_cck->unresponded_rts, delta_cck->unresponded_rts, |
263 | pos += scnprintf(buf + pos, bufsz - pos, | 256 | max_cck->unresponded_rts); |
264 | fmt_table, "unresponded_rts:", | 257 | pos += |
265 | le32_to_cpu(cck->unresponded_rts), | 258 | scnprintf(buf + pos, bufsz - pos, fmt_table, "rxe_frame_lmt_ovrun:", |
266 | accum_cck->unresponded_rts, delta_cck->unresponded_rts, | 259 | le32_to_cpu(cck->rxe_frame_limit_overrun), |
267 | max_cck->unresponded_rts); | 260 | accum_cck->rxe_frame_limit_overrun, |
268 | pos += scnprintf(buf + pos, bufsz - pos, | 261 | delta_cck->rxe_frame_limit_overrun, |
269 | fmt_table, "rxe_frame_lmt_ovrun:", | 262 | max_cck->rxe_frame_limit_overrun); |
270 | le32_to_cpu(cck->rxe_frame_limit_overrun), | 263 | pos += |
271 | accum_cck->rxe_frame_limit_overrun, | 264 | scnprintf(buf + pos, bufsz - pos, fmt_table, "sent_ack_cnt:", |
272 | delta_cck->rxe_frame_limit_overrun, | 265 | le32_to_cpu(cck->sent_ack_cnt), accum_cck->sent_ack_cnt, |
273 | max_cck->rxe_frame_limit_overrun); | 266 | delta_cck->sent_ack_cnt, max_cck->sent_ack_cnt); |
274 | pos += scnprintf(buf + pos, bufsz - pos, | 267 | pos += |
275 | fmt_table, "sent_ack_cnt:", | 268 | scnprintf(buf + pos, bufsz - pos, fmt_table, "sent_cts_cnt:", |
276 | le32_to_cpu(cck->sent_ack_cnt), | 269 | le32_to_cpu(cck->sent_cts_cnt), accum_cck->sent_cts_cnt, |
277 | accum_cck->sent_ack_cnt, delta_cck->sent_ack_cnt, | 270 | delta_cck->sent_cts_cnt, max_cck->sent_cts_cnt); |
278 | max_cck->sent_ack_cnt); | 271 | pos += |
279 | pos += scnprintf(buf + pos, bufsz - pos, | 272 | scnprintf(buf + pos, bufsz - pos, fmt_table, "sent_ba_rsp_cnt:", |
280 | fmt_table, "sent_cts_cnt:", | 273 | le32_to_cpu(cck->sent_ba_rsp_cnt), |
281 | le32_to_cpu(cck->sent_cts_cnt), | 274 | accum_cck->sent_ba_rsp_cnt, delta_cck->sent_ba_rsp_cnt, |
282 | accum_cck->sent_cts_cnt, delta_cck->sent_cts_cnt, | 275 | max_cck->sent_ba_rsp_cnt); |
283 | max_cck->sent_cts_cnt); | 276 | pos += |
284 | pos += scnprintf(buf + pos, bufsz - pos, | 277 | scnprintf(buf + pos, bufsz - pos, fmt_table, "dsp_self_kill:", |
285 | fmt_table, "sent_ba_rsp_cnt:", | 278 | le32_to_cpu(cck->dsp_self_kill), accum_cck->dsp_self_kill, |
286 | le32_to_cpu(cck->sent_ba_rsp_cnt), | 279 | delta_cck->dsp_self_kill, max_cck->dsp_self_kill); |
287 | accum_cck->sent_ba_rsp_cnt, | 280 | pos += |
288 | delta_cck->sent_ba_rsp_cnt, | 281 | scnprintf(buf + pos, bufsz - pos, fmt_table, "mh_format_err:", |
289 | max_cck->sent_ba_rsp_cnt); | 282 | le32_to_cpu(cck->mh_format_err), accum_cck->mh_format_err, |
290 | pos += scnprintf(buf + pos, bufsz - pos, | 283 | delta_cck->mh_format_err, max_cck->mh_format_err); |
291 | fmt_table, "dsp_self_kill:", | 284 | pos += |
292 | le32_to_cpu(cck->dsp_self_kill), | 285 | scnprintf(buf + pos, bufsz - pos, fmt_table, |
293 | accum_cck->dsp_self_kill, delta_cck->dsp_self_kill, | 286 | "re_acq_main_rssi_sum:", |
294 | max_cck->dsp_self_kill); | 287 | le32_to_cpu(cck->re_acq_main_rssi_sum), |
295 | pos += scnprintf(buf + pos, bufsz - pos, | 288 | accum_cck->re_acq_main_rssi_sum, |
296 | fmt_table, "mh_format_err:", | 289 | delta_cck->re_acq_main_rssi_sum, |
297 | le32_to_cpu(cck->mh_format_err), | 290 | max_cck->re_acq_main_rssi_sum); |
298 | accum_cck->mh_format_err, delta_cck->mh_format_err, | ||
299 | max_cck->mh_format_err); | ||
300 | pos += scnprintf(buf + pos, bufsz - pos, | ||
301 | fmt_table, "re_acq_main_rssi_sum:", | ||
302 | le32_to_cpu(cck->re_acq_main_rssi_sum), | ||
303 | accum_cck->re_acq_main_rssi_sum, | ||
304 | delta_cck->re_acq_main_rssi_sum, | ||
305 | max_cck->re_acq_main_rssi_sum); | ||
306 | 291 | ||
307 | pos += scnprintf(buf + pos, bufsz - pos, | 292 | pos += |
308 | fmt_header, "Statistics_Rx - GENERAL:"); | 293 | scnprintf(buf + pos, bufsz - pos, fmt_header, |
309 | pos += scnprintf(buf + pos, bufsz - pos, | 294 | "Statistics_Rx - GENERAL:"); |
310 | fmt_table, "bogus_cts:", | 295 | pos += |
311 | le32_to_cpu(general->bogus_cts), | 296 | scnprintf(buf + pos, bufsz - pos, fmt_table, "bogus_cts:", |
312 | accum_general->bogus_cts, delta_general->bogus_cts, | 297 | le32_to_cpu(general->bogus_cts), accum_general->bogus_cts, |
313 | max_general->bogus_cts); | 298 | delta_general->bogus_cts, max_general->bogus_cts); |
314 | pos += scnprintf(buf + pos, bufsz - pos, | 299 | pos += |
315 | fmt_table, "bogus_ack:", | 300 | scnprintf(buf + pos, bufsz - pos, fmt_table, "bogus_ack:", |
316 | le32_to_cpu(general->bogus_ack), | 301 | le32_to_cpu(general->bogus_ack), accum_general->bogus_ack, |
317 | accum_general->bogus_ack, delta_general->bogus_ack, | 302 | delta_general->bogus_ack, max_general->bogus_ack); |
318 | max_general->bogus_ack); | 303 | pos += |
319 | pos += scnprintf(buf + pos, bufsz - pos, | 304 | scnprintf(buf + pos, bufsz - pos, fmt_table, "non_bssid_frames:", |
320 | fmt_table, "non_bssid_frames:", | 305 | le32_to_cpu(general->non_bssid_frames), |
321 | le32_to_cpu(general->non_bssid_frames), | 306 | accum_general->non_bssid_frames, |
322 | accum_general->non_bssid_frames, | 307 | delta_general->non_bssid_frames, |
323 | delta_general->non_bssid_frames, | 308 | max_general->non_bssid_frames); |
324 | max_general->non_bssid_frames); | 309 | pos += |
325 | pos += scnprintf(buf + pos, bufsz - pos, | 310 | scnprintf(buf + pos, bufsz - pos, fmt_table, "filtered_frames:", |
326 | fmt_table, "filtered_frames:", | 311 | le32_to_cpu(general->filtered_frames), |
327 | le32_to_cpu(general->filtered_frames), | 312 | accum_general->filtered_frames, |
328 | accum_general->filtered_frames, | 313 | delta_general->filtered_frames, |
329 | delta_general->filtered_frames, | 314 | max_general->filtered_frames); |
330 | max_general->filtered_frames); | 315 | pos += |
331 | pos += scnprintf(buf + pos, bufsz - pos, | 316 | scnprintf(buf + pos, bufsz - pos, fmt_table, "non_channel_beacons:", |
332 | fmt_table, "non_channel_beacons:", | 317 | le32_to_cpu(general->non_channel_beacons), |
333 | le32_to_cpu(general->non_channel_beacons), | 318 | accum_general->non_channel_beacons, |
334 | accum_general->non_channel_beacons, | 319 | delta_general->non_channel_beacons, |
335 | delta_general->non_channel_beacons, | 320 | max_general->non_channel_beacons); |
336 | max_general->non_channel_beacons); | 321 | pos += |
337 | pos += scnprintf(buf + pos, bufsz - pos, | 322 | scnprintf(buf + pos, bufsz - pos, fmt_table, "channel_beacons:", |
338 | fmt_table, "channel_beacons:", | 323 | le32_to_cpu(general->channel_beacons), |
339 | le32_to_cpu(general->channel_beacons), | 324 | accum_general->channel_beacons, |
340 | accum_general->channel_beacons, | 325 | delta_general->channel_beacons, |
341 | delta_general->channel_beacons, | 326 | max_general->channel_beacons); |
342 | max_general->channel_beacons); | 327 | pos += |
343 | pos += scnprintf(buf + pos, bufsz - pos, | 328 | scnprintf(buf + pos, bufsz - pos, fmt_table, "num_missed_bcon:", |
344 | fmt_table, "num_missed_bcon:", | 329 | le32_to_cpu(general->num_missed_bcon), |
345 | le32_to_cpu(general->num_missed_bcon), | 330 | accum_general->num_missed_bcon, |
346 | accum_general->num_missed_bcon, | 331 | delta_general->num_missed_bcon, |
347 | delta_general->num_missed_bcon, | 332 | max_general->num_missed_bcon); |
348 | max_general->num_missed_bcon); | 333 | pos += |
349 | pos += scnprintf(buf + pos, bufsz - pos, | 334 | scnprintf(buf + pos, bufsz - pos, fmt_table, |
350 | fmt_table, "adc_rx_saturation_time:", | 335 | "adc_rx_saturation_time:", |
351 | le32_to_cpu(general->adc_rx_saturation_time), | 336 | le32_to_cpu(general->adc_rx_saturation_time), |
352 | accum_general->adc_rx_saturation_time, | 337 | accum_general->adc_rx_saturation_time, |
353 | delta_general->adc_rx_saturation_time, | 338 | delta_general->adc_rx_saturation_time, |
354 | max_general->adc_rx_saturation_time); | 339 | max_general->adc_rx_saturation_time); |
355 | pos += scnprintf(buf + pos, bufsz - pos, | 340 | pos += |
356 | fmt_table, "ina_detect_search_tm:", | 341 | scnprintf(buf + pos, bufsz - pos, fmt_table, |
357 | le32_to_cpu(general->ina_detection_search_time), | 342 | "ina_detect_search_tm:", |
358 | accum_general->ina_detection_search_time, | 343 | le32_to_cpu(general->ina_detection_search_time), |
359 | delta_general->ina_detection_search_time, | 344 | accum_general->ina_detection_search_time, |
360 | max_general->ina_detection_search_time); | 345 | delta_general->ina_detection_search_time, |
361 | pos += scnprintf(buf + pos, bufsz - pos, | 346 | max_general->ina_detection_search_time); |
362 | fmt_table, "beacon_silence_rssi_a:", | 347 | pos += |
363 | le32_to_cpu(general->beacon_silence_rssi_a), | 348 | scnprintf(buf + pos, bufsz - pos, fmt_table, |
364 | accum_general->beacon_silence_rssi_a, | 349 | "beacon_silence_rssi_a:", |
365 | delta_general->beacon_silence_rssi_a, | 350 | le32_to_cpu(general->beacon_silence_rssi_a), |
366 | max_general->beacon_silence_rssi_a); | 351 | accum_general->beacon_silence_rssi_a, |
367 | pos += scnprintf(buf + pos, bufsz - pos, | 352 | delta_general->beacon_silence_rssi_a, |
368 | fmt_table, "beacon_silence_rssi_b:", | 353 | max_general->beacon_silence_rssi_a); |
369 | le32_to_cpu(general->beacon_silence_rssi_b), | 354 | pos += |
370 | accum_general->beacon_silence_rssi_b, | 355 | scnprintf(buf + pos, bufsz - pos, fmt_table, |
371 | delta_general->beacon_silence_rssi_b, | 356 | "beacon_silence_rssi_b:", |
372 | max_general->beacon_silence_rssi_b); | 357 | le32_to_cpu(general->beacon_silence_rssi_b), |
373 | pos += scnprintf(buf + pos, bufsz - pos, | 358 | accum_general->beacon_silence_rssi_b, |
374 | fmt_table, "beacon_silence_rssi_c:", | 359 | delta_general->beacon_silence_rssi_b, |
375 | le32_to_cpu(general->beacon_silence_rssi_c), | 360 | max_general->beacon_silence_rssi_b); |
376 | accum_general->beacon_silence_rssi_c, | 361 | pos += |
377 | delta_general->beacon_silence_rssi_c, | 362 | scnprintf(buf + pos, bufsz - pos, fmt_table, |
378 | max_general->beacon_silence_rssi_c); | 363 | "beacon_silence_rssi_c:", |
379 | pos += scnprintf(buf + pos, bufsz - pos, | 364 | le32_to_cpu(general->beacon_silence_rssi_c), |
380 | fmt_table, "interference_data_flag:", | 365 | accum_general->beacon_silence_rssi_c, |
381 | le32_to_cpu(general->interference_data_flag), | 366 | delta_general->beacon_silence_rssi_c, |
382 | accum_general->interference_data_flag, | 367 | max_general->beacon_silence_rssi_c); |
383 | delta_general->interference_data_flag, | 368 | pos += |
384 | max_general->interference_data_flag); | 369 | scnprintf(buf + pos, bufsz - pos, fmt_table, |
385 | pos += scnprintf(buf + pos, bufsz - pos, | 370 | "interference_data_flag:", |
386 | fmt_table, "channel_load:", | 371 | le32_to_cpu(general->interference_data_flag), |
387 | le32_to_cpu(general->channel_load), | 372 | accum_general->interference_data_flag, |
388 | accum_general->channel_load, | 373 | delta_general->interference_data_flag, |
389 | delta_general->channel_load, | 374 | max_general->interference_data_flag); |
390 | max_general->channel_load); | 375 | pos += |
391 | pos += scnprintf(buf + pos, bufsz - pos, | 376 | scnprintf(buf + pos, bufsz - pos, fmt_table, "channel_load:", |
392 | fmt_table, "dsp_false_alarms:", | 377 | le32_to_cpu(general->channel_load), |
393 | le32_to_cpu(general->dsp_false_alarms), | 378 | accum_general->channel_load, delta_general->channel_load, |
394 | accum_general->dsp_false_alarms, | 379 | max_general->channel_load); |
395 | delta_general->dsp_false_alarms, | 380 | pos += |
396 | max_general->dsp_false_alarms); | 381 | scnprintf(buf + pos, bufsz - pos, fmt_table, "dsp_false_alarms:", |
397 | pos += scnprintf(buf + pos, bufsz - pos, | 382 | le32_to_cpu(general->dsp_false_alarms), |
398 | fmt_table, "beacon_rssi_a:", | 383 | accum_general->dsp_false_alarms, |
399 | le32_to_cpu(general->beacon_rssi_a), | 384 | delta_general->dsp_false_alarms, |
400 | accum_general->beacon_rssi_a, | 385 | max_general->dsp_false_alarms); |
401 | delta_general->beacon_rssi_a, | 386 | pos += |
402 | max_general->beacon_rssi_a); | 387 | scnprintf(buf + pos, bufsz - pos, fmt_table, "beacon_rssi_a:", |
403 | pos += scnprintf(buf + pos, bufsz - pos, | 388 | le32_to_cpu(general->beacon_rssi_a), |
404 | fmt_table, "beacon_rssi_b:", | 389 | accum_general->beacon_rssi_a, |
405 | le32_to_cpu(general->beacon_rssi_b), | 390 | delta_general->beacon_rssi_a, max_general->beacon_rssi_a); |
406 | accum_general->beacon_rssi_b, | 391 | pos += |
407 | delta_general->beacon_rssi_b, | 392 | scnprintf(buf + pos, bufsz - pos, fmt_table, "beacon_rssi_b:", |
408 | max_general->beacon_rssi_b); | 393 | le32_to_cpu(general->beacon_rssi_b), |
409 | pos += scnprintf(buf + pos, bufsz - pos, | 394 | accum_general->beacon_rssi_b, |
410 | fmt_table, "beacon_rssi_c:", | 395 | delta_general->beacon_rssi_b, max_general->beacon_rssi_b); |
411 | le32_to_cpu(general->beacon_rssi_c), | 396 | pos += |
412 | accum_general->beacon_rssi_c, | 397 | scnprintf(buf + pos, bufsz - pos, fmt_table, "beacon_rssi_c:", |
413 | delta_general->beacon_rssi_c, | 398 | le32_to_cpu(general->beacon_rssi_c), |
414 | max_general->beacon_rssi_c); | 399 | accum_general->beacon_rssi_c, |
415 | pos += scnprintf(buf + pos, bufsz - pos, | 400 | delta_general->beacon_rssi_c, max_general->beacon_rssi_c); |
416 | fmt_table, "beacon_energy_a:", | 401 | pos += |
417 | le32_to_cpu(general->beacon_energy_a), | 402 | scnprintf(buf + pos, bufsz - pos, fmt_table, "beacon_energy_a:", |
418 | accum_general->beacon_energy_a, | 403 | le32_to_cpu(general->beacon_energy_a), |
419 | delta_general->beacon_energy_a, | 404 | accum_general->beacon_energy_a, |
420 | max_general->beacon_energy_a); | 405 | delta_general->beacon_energy_a, |
421 | pos += scnprintf(buf + pos, bufsz - pos, | 406 | max_general->beacon_energy_a); |
422 | fmt_table, "beacon_energy_b:", | 407 | pos += |
423 | le32_to_cpu(general->beacon_energy_b), | 408 | scnprintf(buf + pos, bufsz - pos, fmt_table, "beacon_energy_b:", |
424 | accum_general->beacon_energy_b, | 409 | le32_to_cpu(general->beacon_energy_b), |
425 | delta_general->beacon_energy_b, | 410 | accum_general->beacon_energy_b, |
426 | max_general->beacon_energy_b); | 411 | delta_general->beacon_energy_b, |
427 | pos += scnprintf(buf + pos, bufsz - pos, | 412 | max_general->beacon_energy_b); |
428 | fmt_table, "beacon_energy_c:", | 413 | pos += |
429 | le32_to_cpu(general->beacon_energy_c), | 414 | scnprintf(buf + pos, bufsz - pos, fmt_table, "beacon_energy_c:", |
430 | accum_general->beacon_energy_c, | 415 | le32_to_cpu(general->beacon_energy_c), |
431 | delta_general->beacon_energy_c, | 416 | accum_general->beacon_energy_c, |
432 | max_general->beacon_energy_c); | 417 | delta_general->beacon_energy_c, |
418 | max_general->beacon_energy_c); | ||
433 | 419 | ||
434 | pos += scnprintf(buf + pos, bufsz - pos, | 420 | pos += |
435 | fmt_header, "Statistics_Rx - OFDM_HT:"); | 421 | scnprintf(buf + pos, bufsz - pos, fmt_header, |
436 | pos += scnprintf(buf + pos, bufsz - pos, | 422 | "Statistics_Rx - OFDM_HT:"); |
437 | fmt_table, "plcp_err:", | 423 | pos += |
438 | le32_to_cpu(ht->plcp_err), accum_ht->plcp_err, | 424 | scnprintf(buf + pos, bufsz - pos, fmt_table, "plcp_err:", |
439 | delta_ht->plcp_err, max_ht->plcp_err); | 425 | le32_to_cpu(ht->plcp_err), accum_ht->plcp_err, |
440 | pos += scnprintf(buf + pos, bufsz - pos, | 426 | delta_ht->plcp_err, max_ht->plcp_err); |
441 | fmt_table, "overrun_err:", | 427 | pos += |
442 | le32_to_cpu(ht->overrun_err), accum_ht->overrun_err, | 428 | scnprintf(buf + pos, bufsz - pos, fmt_table, "overrun_err:", |
443 | delta_ht->overrun_err, max_ht->overrun_err); | 429 | le32_to_cpu(ht->overrun_err), accum_ht->overrun_err, |
444 | pos += scnprintf(buf + pos, bufsz - pos, | 430 | delta_ht->overrun_err, max_ht->overrun_err); |
445 | fmt_table, "early_overrun_err:", | 431 | pos += |
446 | le32_to_cpu(ht->early_overrun_err), | 432 | scnprintf(buf + pos, bufsz - pos, fmt_table, "early_overrun_err:", |
447 | accum_ht->early_overrun_err, | 433 | le32_to_cpu(ht->early_overrun_err), |
448 | delta_ht->early_overrun_err, | 434 | accum_ht->early_overrun_err, delta_ht->early_overrun_err, |
449 | max_ht->early_overrun_err); | 435 | max_ht->early_overrun_err); |
450 | pos += scnprintf(buf + pos, bufsz - pos, | 436 | pos += |
451 | fmt_table, "crc32_good:", | 437 | scnprintf(buf + pos, bufsz - pos, fmt_table, "crc32_good:", |
452 | le32_to_cpu(ht->crc32_good), accum_ht->crc32_good, | 438 | le32_to_cpu(ht->crc32_good), accum_ht->crc32_good, |
453 | delta_ht->crc32_good, max_ht->crc32_good); | 439 | delta_ht->crc32_good, max_ht->crc32_good); |
454 | pos += scnprintf(buf + pos, bufsz - pos, | 440 | pos += |
455 | fmt_table, "crc32_err:", | 441 | scnprintf(buf + pos, bufsz - pos, fmt_table, "crc32_err:", |
456 | le32_to_cpu(ht->crc32_err), accum_ht->crc32_err, | 442 | le32_to_cpu(ht->crc32_err), accum_ht->crc32_err, |
457 | delta_ht->crc32_err, max_ht->crc32_err); | 443 | delta_ht->crc32_err, max_ht->crc32_err); |
458 | pos += scnprintf(buf + pos, bufsz - pos, | 444 | pos += |
459 | fmt_table, "mh_format_err:", | 445 | scnprintf(buf + pos, bufsz - pos, fmt_table, "mh_format_err:", |
460 | le32_to_cpu(ht->mh_format_err), | 446 | le32_to_cpu(ht->mh_format_err), accum_ht->mh_format_err, |
461 | accum_ht->mh_format_err, | 447 | delta_ht->mh_format_err, max_ht->mh_format_err); |
462 | delta_ht->mh_format_err, max_ht->mh_format_err); | 448 | pos += |
463 | pos += scnprintf(buf + pos, bufsz - pos, | 449 | scnprintf(buf + pos, bufsz - pos, fmt_table, "agg_crc32_good:", |
464 | fmt_table, "agg_crc32_good:", | 450 | le32_to_cpu(ht->agg_crc32_good), accum_ht->agg_crc32_good, |
465 | le32_to_cpu(ht->agg_crc32_good), | 451 | delta_ht->agg_crc32_good, max_ht->agg_crc32_good); |
466 | accum_ht->agg_crc32_good, | 452 | pos += |
467 | delta_ht->agg_crc32_good, max_ht->agg_crc32_good); | 453 | scnprintf(buf + pos, bufsz - pos, fmt_table, "agg_mpdu_cnt:", |
468 | pos += scnprintf(buf + pos, bufsz - pos, | 454 | le32_to_cpu(ht->agg_mpdu_cnt), accum_ht->agg_mpdu_cnt, |
469 | fmt_table, "agg_mpdu_cnt:", | 455 | delta_ht->agg_mpdu_cnt, max_ht->agg_mpdu_cnt); |
470 | le32_to_cpu(ht->agg_mpdu_cnt), | 456 | pos += |
471 | accum_ht->agg_mpdu_cnt, | 457 | scnprintf(buf + pos, bufsz - pos, fmt_table, "agg_cnt:", |
472 | delta_ht->agg_mpdu_cnt, max_ht->agg_mpdu_cnt); | 458 | le32_to_cpu(ht->agg_cnt), accum_ht->agg_cnt, |
473 | pos += scnprintf(buf + pos, bufsz - pos, | 459 | delta_ht->agg_cnt, max_ht->agg_cnt); |
474 | fmt_table, "agg_cnt:", | 460 | pos += |
475 | le32_to_cpu(ht->agg_cnt), accum_ht->agg_cnt, | 461 | scnprintf(buf + pos, bufsz - pos, fmt_table, "unsupport_mcs:", |
476 | delta_ht->agg_cnt, max_ht->agg_cnt); | 462 | le32_to_cpu(ht->unsupport_mcs), accum_ht->unsupport_mcs, |
477 | pos += scnprintf(buf + pos, bufsz - pos, | 463 | delta_ht->unsupport_mcs, max_ht->unsupport_mcs); |
478 | fmt_table, "unsupport_mcs:", | ||
479 | le32_to_cpu(ht->unsupport_mcs), | ||
480 | accum_ht->unsupport_mcs, | ||
481 | delta_ht->unsupport_mcs, max_ht->unsupport_mcs); | ||
482 | 464 | ||
483 | ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos); | 465 | ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos); |
484 | kfree(buf); | 466 | kfree(buf); |
485 | return ret; | 467 | return ret; |
486 | } | 468 | } |
487 | 469 | ||
488 | ssize_t il4965_ucode_tx_stats_read(struct file *file, | 470 | ssize_t |
489 | char __user *user_buf, | 471 | il4965_ucode_tx_stats_read(struct file * file, char __user * user_buf, |
490 | size_t count, loff_t *ppos) | 472 | size_t count, loff_t * ppos) |
491 | { | 473 | { |
492 | struct il_priv *il = file->private_data; | 474 | struct il_priv *il = file->private_data; |
493 | int pos = 0; | 475 | int pos = 0; |
@@ -506,154 +488,145 @@ ssize_t il4965_ucode_tx_stats_read(struct file *file, | |||
506 | } | 488 | } |
507 | 489 | ||
508 | /* the statistic information display here is based on | 490 | /* the statistic information display here is based on |
509 | * the last stats notification from uCode | 491 | * the last stats notification from uCode |
510 | * might not reflect the current uCode activity | 492 | * might not reflect the current uCode activity |
511 | */ | 493 | */ |
512 | tx = &il->_4965.stats.tx; | 494 | tx = &il->_4965.stats.tx; |
513 | accum_tx = &il->_4965.accum_stats.tx; | 495 | accum_tx = &il->_4965.accum_stats.tx; |
514 | delta_tx = &il->_4965.delta_stats.tx; | 496 | delta_tx = &il->_4965.delta_stats.tx; |
515 | max_tx = &il->_4965.max_delta.tx; | 497 | max_tx = &il->_4965.max_delta.tx; |
516 | 498 | ||
517 | pos += il4965_stats_flag(il, buf, bufsz); | 499 | pos += il4965_stats_flag(il, buf, bufsz); |
518 | pos += scnprintf(buf + pos, bufsz - pos, | 500 | pos += scnprintf(buf + pos, bufsz - pos, fmt_header, "Statistics_Tx:"); |
519 | fmt_header, "Statistics_Tx:"); | 501 | pos += |
520 | pos += scnprintf(buf + pos, bufsz - pos, | 502 | scnprintf(buf + pos, bufsz - pos, fmt_table, "preamble:", |
521 | fmt_table, "preamble:", | 503 | le32_to_cpu(tx->preamble_cnt), accum_tx->preamble_cnt, |
522 | le32_to_cpu(tx->preamble_cnt), | 504 | delta_tx->preamble_cnt, max_tx->preamble_cnt); |
523 | accum_tx->preamble_cnt, | 505 | pos += |
524 | delta_tx->preamble_cnt, max_tx->preamble_cnt); | 506 | scnprintf(buf + pos, bufsz - pos, fmt_table, "rx_detected_cnt:", |
525 | pos += scnprintf(buf + pos, bufsz - pos, | 507 | le32_to_cpu(tx->rx_detected_cnt), |
526 | fmt_table, "rx_detected_cnt:", | 508 | accum_tx->rx_detected_cnt, delta_tx->rx_detected_cnt, |
527 | le32_to_cpu(tx->rx_detected_cnt), | 509 | max_tx->rx_detected_cnt); |
528 | accum_tx->rx_detected_cnt, | 510 | pos += |
529 | delta_tx->rx_detected_cnt, max_tx->rx_detected_cnt); | 511 | scnprintf(buf + pos, bufsz - pos, fmt_table, "bt_prio_defer_cnt:", |
530 | pos += scnprintf(buf + pos, bufsz - pos, | 512 | le32_to_cpu(tx->bt_prio_defer_cnt), |
531 | fmt_table, "bt_prio_defer_cnt:", | 513 | accum_tx->bt_prio_defer_cnt, delta_tx->bt_prio_defer_cnt, |
532 | le32_to_cpu(tx->bt_prio_defer_cnt), | 514 | max_tx->bt_prio_defer_cnt); |
533 | accum_tx->bt_prio_defer_cnt, | 515 | pos += |
534 | delta_tx->bt_prio_defer_cnt, | 516 | scnprintf(buf + pos, bufsz - pos, fmt_table, "bt_prio_kill_cnt:", |
535 | max_tx->bt_prio_defer_cnt); | 517 | le32_to_cpu(tx->bt_prio_kill_cnt), |
536 | pos += scnprintf(buf + pos, bufsz - pos, | 518 | accum_tx->bt_prio_kill_cnt, delta_tx->bt_prio_kill_cnt, |
537 | fmt_table, "bt_prio_kill_cnt:", | 519 | max_tx->bt_prio_kill_cnt); |
538 | le32_to_cpu(tx->bt_prio_kill_cnt), | 520 | pos += |
539 | accum_tx->bt_prio_kill_cnt, | 521 | scnprintf(buf + pos, bufsz - pos, fmt_table, "few_bytes_cnt:", |
540 | delta_tx->bt_prio_kill_cnt, | 522 | le32_to_cpu(tx->few_bytes_cnt), accum_tx->few_bytes_cnt, |
541 | max_tx->bt_prio_kill_cnt); | 523 | delta_tx->few_bytes_cnt, max_tx->few_bytes_cnt); |
542 | pos += scnprintf(buf + pos, bufsz - pos, | 524 | pos += |
543 | fmt_table, "few_bytes_cnt:", | 525 | scnprintf(buf + pos, bufsz - pos, fmt_table, "cts_timeout:", |
544 | le32_to_cpu(tx->few_bytes_cnt), | 526 | le32_to_cpu(tx->cts_timeout), accum_tx->cts_timeout, |
545 | accum_tx->few_bytes_cnt, | 527 | delta_tx->cts_timeout, max_tx->cts_timeout); |
546 | delta_tx->few_bytes_cnt, max_tx->few_bytes_cnt); | 528 | pos += |
547 | pos += scnprintf(buf + pos, bufsz - pos, | 529 | scnprintf(buf + pos, bufsz - pos, fmt_table, "ack_timeout:", |
548 | fmt_table, "cts_timeout:", | 530 | le32_to_cpu(tx->ack_timeout), accum_tx->ack_timeout, |
549 | le32_to_cpu(tx->cts_timeout), accum_tx->cts_timeout, | 531 | delta_tx->ack_timeout, max_tx->ack_timeout); |
550 | delta_tx->cts_timeout, max_tx->cts_timeout); | 532 | pos += |
551 | pos += scnprintf(buf + pos, bufsz - pos, | 533 | scnprintf(buf + pos, bufsz - pos, fmt_table, "expected_ack_cnt:", |
552 | fmt_table, "ack_timeout:", | 534 | le32_to_cpu(tx->expected_ack_cnt), |
553 | le32_to_cpu(tx->ack_timeout), | 535 | accum_tx->expected_ack_cnt, delta_tx->expected_ack_cnt, |
554 | accum_tx->ack_timeout, | 536 | max_tx->expected_ack_cnt); |
555 | delta_tx->ack_timeout, max_tx->ack_timeout); | 537 | pos += |
556 | pos += scnprintf(buf + pos, bufsz - pos, | 538 | scnprintf(buf + pos, bufsz - pos, fmt_table, "actual_ack_cnt:", |
557 | fmt_table, "expected_ack_cnt:", | 539 | le32_to_cpu(tx->actual_ack_cnt), accum_tx->actual_ack_cnt, |
558 | le32_to_cpu(tx->expected_ack_cnt), | 540 | delta_tx->actual_ack_cnt, max_tx->actual_ack_cnt); |
559 | accum_tx->expected_ack_cnt, | 541 | pos += |
560 | delta_tx->expected_ack_cnt, | 542 | scnprintf(buf + pos, bufsz - pos, fmt_table, "dump_msdu_cnt:", |
561 | max_tx->expected_ack_cnt); | 543 | le32_to_cpu(tx->dump_msdu_cnt), accum_tx->dump_msdu_cnt, |
562 | pos += scnprintf(buf + pos, bufsz - pos, | 544 | delta_tx->dump_msdu_cnt, max_tx->dump_msdu_cnt); |
563 | fmt_table, "actual_ack_cnt:", | 545 | pos += |
564 | le32_to_cpu(tx->actual_ack_cnt), | 546 | scnprintf(buf + pos, bufsz - pos, fmt_table, |
565 | accum_tx->actual_ack_cnt, | 547 | "abort_nxt_frame_mismatch:", |
566 | delta_tx->actual_ack_cnt, | 548 | le32_to_cpu(tx->burst_abort_next_frame_mismatch_cnt), |
567 | max_tx->actual_ack_cnt); | 549 | accum_tx->burst_abort_next_frame_mismatch_cnt, |
568 | pos += scnprintf(buf + pos, bufsz - pos, | 550 | delta_tx->burst_abort_next_frame_mismatch_cnt, |
569 | fmt_table, "dump_msdu_cnt:", | 551 | max_tx->burst_abort_next_frame_mismatch_cnt); |
570 | le32_to_cpu(tx->dump_msdu_cnt), | 552 | pos += |
571 | accum_tx->dump_msdu_cnt, | 553 | scnprintf(buf + pos, bufsz - pos, fmt_table, |
572 | delta_tx->dump_msdu_cnt, | 554 | "abort_missing_nxt_frame:", |
573 | max_tx->dump_msdu_cnt); | 555 | le32_to_cpu(tx->burst_abort_missing_next_frame_cnt), |
574 | pos += scnprintf(buf + pos, bufsz - pos, | 556 | accum_tx->burst_abort_missing_next_frame_cnt, |
575 | fmt_table, "abort_nxt_frame_mismatch:", | 557 | delta_tx->burst_abort_missing_next_frame_cnt, |
576 | le32_to_cpu(tx->burst_abort_next_frame_mismatch_cnt), | 558 | max_tx->burst_abort_missing_next_frame_cnt); |
577 | accum_tx->burst_abort_next_frame_mismatch_cnt, | 559 | pos += |
578 | delta_tx->burst_abort_next_frame_mismatch_cnt, | 560 | scnprintf(buf + pos, bufsz - pos, fmt_table, |
579 | max_tx->burst_abort_next_frame_mismatch_cnt); | 561 | "cts_timeout_collision:", |
580 | pos += scnprintf(buf + pos, bufsz - pos, | 562 | le32_to_cpu(tx->cts_timeout_collision), |
581 | fmt_table, "abort_missing_nxt_frame:", | 563 | accum_tx->cts_timeout_collision, |
582 | le32_to_cpu(tx->burst_abort_missing_next_frame_cnt), | 564 | delta_tx->cts_timeout_collision, |
583 | accum_tx->burst_abort_missing_next_frame_cnt, | 565 | max_tx->cts_timeout_collision); |
584 | delta_tx->burst_abort_missing_next_frame_cnt, | 566 | pos += |
585 | max_tx->burst_abort_missing_next_frame_cnt); | 567 | scnprintf(buf + pos, bufsz - pos, fmt_table, |
586 | pos += scnprintf(buf + pos, bufsz - pos, | 568 | "ack_ba_timeout_collision:", |
587 | fmt_table, "cts_timeout_collision:", | 569 | le32_to_cpu(tx->ack_or_ba_timeout_collision), |
588 | le32_to_cpu(tx->cts_timeout_collision), | 570 | accum_tx->ack_or_ba_timeout_collision, |
589 | accum_tx->cts_timeout_collision, | 571 | delta_tx->ack_or_ba_timeout_collision, |
590 | delta_tx->cts_timeout_collision, | 572 | max_tx->ack_or_ba_timeout_collision); |
591 | max_tx->cts_timeout_collision); | 573 | pos += |
592 | pos += scnprintf(buf + pos, bufsz - pos, | 574 | scnprintf(buf + pos, bufsz - pos, fmt_table, "agg ba_timeout:", |
593 | fmt_table, "ack_ba_timeout_collision:", | 575 | le32_to_cpu(tx->agg.ba_timeout), accum_tx->agg.ba_timeout, |
594 | le32_to_cpu(tx->ack_or_ba_timeout_collision), | 576 | delta_tx->agg.ba_timeout, max_tx->agg.ba_timeout); |
595 | accum_tx->ack_or_ba_timeout_collision, | 577 | pos += |
596 | delta_tx->ack_or_ba_timeout_collision, | 578 | scnprintf(buf + pos, bufsz - pos, fmt_table, |
597 | max_tx->ack_or_ba_timeout_collision); | 579 | "agg ba_resched_frames:", |
598 | pos += scnprintf(buf + pos, bufsz - pos, | 580 | le32_to_cpu(tx->agg.ba_reschedule_frames), |
599 | fmt_table, "agg ba_timeout:", | 581 | accum_tx->agg.ba_reschedule_frames, |
600 | le32_to_cpu(tx->agg.ba_timeout), | 582 | delta_tx->agg.ba_reschedule_frames, |
601 | accum_tx->agg.ba_timeout, | 583 | max_tx->agg.ba_reschedule_frames); |
602 | delta_tx->agg.ba_timeout, | 584 | pos += |
603 | max_tx->agg.ba_timeout); | 585 | scnprintf(buf + pos, bufsz - pos, fmt_table, |
604 | pos += scnprintf(buf + pos, bufsz - pos, | 586 | "agg scd_query_agg_frame:", |
605 | fmt_table, "agg ba_resched_frames:", | 587 | le32_to_cpu(tx->agg.scd_query_agg_frame_cnt), |
606 | le32_to_cpu(tx->agg.ba_reschedule_frames), | 588 | accum_tx->agg.scd_query_agg_frame_cnt, |
607 | accum_tx->agg.ba_reschedule_frames, | 589 | delta_tx->agg.scd_query_agg_frame_cnt, |
608 | delta_tx->agg.ba_reschedule_frames, | 590 | max_tx->agg.scd_query_agg_frame_cnt); |
609 | max_tx->agg.ba_reschedule_frames); | 591 | pos += |
610 | pos += scnprintf(buf + pos, bufsz - pos, | 592 | scnprintf(buf + pos, bufsz - pos, fmt_table, |
611 | fmt_table, "agg scd_query_agg_frame:", | 593 | "agg scd_query_no_agg:", |
612 | le32_to_cpu(tx->agg.scd_query_agg_frame_cnt), | 594 | le32_to_cpu(tx->agg.scd_query_no_agg), |
613 | accum_tx->agg.scd_query_agg_frame_cnt, | 595 | accum_tx->agg.scd_query_no_agg, |
614 | delta_tx->agg.scd_query_agg_frame_cnt, | 596 | delta_tx->agg.scd_query_no_agg, |
615 | max_tx->agg.scd_query_agg_frame_cnt); | 597 | max_tx->agg.scd_query_no_agg); |
616 | pos += scnprintf(buf + pos, bufsz - pos, | 598 | pos += |
617 | fmt_table, "agg scd_query_no_agg:", | 599 | scnprintf(buf + pos, bufsz - pos, fmt_table, "agg scd_query_agg:", |
618 | le32_to_cpu(tx->agg.scd_query_no_agg), | 600 | le32_to_cpu(tx->agg.scd_query_agg), |
619 | accum_tx->agg.scd_query_no_agg, | 601 | accum_tx->agg.scd_query_agg, delta_tx->agg.scd_query_agg, |
620 | delta_tx->agg.scd_query_no_agg, | 602 | max_tx->agg.scd_query_agg); |
621 | max_tx->agg.scd_query_no_agg); | 603 | pos += |
622 | pos += scnprintf(buf + pos, bufsz - pos, | 604 | scnprintf(buf + pos, bufsz - pos, fmt_table, |
623 | fmt_table, "agg scd_query_agg:", | 605 | "agg scd_query_mismatch:", |
624 | le32_to_cpu(tx->agg.scd_query_agg), | 606 | le32_to_cpu(tx->agg.scd_query_mismatch), |
625 | accum_tx->agg.scd_query_agg, | 607 | accum_tx->agg.scd_query_mismatch, |
626 | delta_tx->agg.scd_query_agg, | 608 | delta_tx->agg.scd_query_mismatch, |
627 | max_tx->agg.scd_query_agg); | 609 | max_tx->agg.scd_query_mismatch); |
628 | pos += scnprintf(buf + pos, bufsz - pos, | 610 | pos += |
629 | fmt_table, "agg scd_query_mismatch:", | 611 | scnprintf(buf + pos, bufsz - pos, fmt_table, "agg frame_not_ready:", |
630 | le32_to_cpu(tx->agg.scd_query_mismatch), | 612 | le32_to_cpu(tx->agg.frame_not_ready), |
631 | accum_tx->agg.scd_query_mismatch, | 613 | accum_tx->agg.frame_not_ready, |
632 | delta_tx->agg.scd_query_mismatch, | 614 | delta_tx->agg.frame_not_ready, |
633 | max_tx->agg.scd_query_mismatch); | 615 | max_tx->agg.frame_not_ready); |
634 | pos += scnprintf(buf + pos, bufsz - pos, | 616 | pos += |
635 | fmt_table, "agg frame_not_ready:", | 617 | scnprintf(buf + pos, bufsz - pos, fmt_table, "agg underrun:", |
636 | le32_to_cpu(tx->agg.frame_not_ready), | 618 | le32_to_cpu(tx->agg.underrun), accum_tx->agg.underrun, |
637 | accum_tx->agg.frame_not_ready, | 619 | delta_tx->agg.underrun, max_tx->agg.underrun); |
638 | delta_tx->agg.frame_not_ready, | 620 | pos += |
639 | max_tx->agg.frame_not_ready); | 621 | scnprintf(buf + pos, bufsz - pos, fmt_table, "agg bt_prio_kill:", |
640 | pos += scnprintf(buf + pos, bufsz - pos, | 622 | le32_to_cpu(tx->agg.bt_prio_kill), |
641 | fmt_table, "agg underrun:", | 623 | accum_tx->agg.bt_prio_kill, delta_tx->agg.bt_prio_kill, |
642 | le32_to_cpu(tx->agg.underrun), | 624 | max_tx->agg.bt_prio_kill); |
643 | accum_tx->agg.underrun, | 625 | pos += |
644 | delta_tx->agg.underrun, max_tx->agg.underrun); | 626 | scnprintf(buf + pos, bufsz - pos, fmt_table, "agg rx_ba_rsp_cnt:", |
645 | pos += scnprintf(buf + pos, bufsz - pos, | 627 | le32_to_cpu(tx->agg.rx_ba_rsp_cnt), |
646 | fmt_table, "agg bt_prio_kill:", | 628 | accum_tx->agg.rx_ba_rsp_cnt, delta_tx->agg.rx_ba_rsp_cnt, |
647 | le32_to_cpu(tx->agg.bt_prio_kill), | 629 | max_tx->agg.rx_ba_rsp_cnt); |
648 | accum_tx->agg.bt_prio_kill, | ||
649 | delta_tx->agg.bt_prio_kill, | ||
650 | max_tx->agg.bt_prio_kill); | ||
651 | pos += scnprintf(buf + pos, bufsz - pos, | ||
652 | fmt_table, "agg rx_ba_rsp_cnt:", | ||
653 | le32_to_cpu(tx->agg.rx_ba_rsp_cnt), | ||
654 | accum_tx->agg.rx_ba_rsp_cnt, | ||
655 | delta_tx->agg.rx_ba_rsp_cnt, | ||
656 | max_tx->agg.rx_ba_rsp_cnt); | ||
657 | 630 | ||
658 | ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos); | 631 | ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos); |
659 | kfree(buf); | 632 | kfree(buf); |
@@ -661,8 +634,8 @@ ssize_t il4965_ucode_tx_stats_read(struct file *file, | |||
661 | } | 634 | } |
662 | 635 | ||
663 | ssize_t | 636 | ssize_t |
664 | il4965_ucode_general_stats_read(struct file *file, char __user *user_buf, | 637 | il4965_ucode_general_stats_read(struct file * file, char __user * user_buf, |
665 | size_t count, loff_t *ppos) | 638 | size_t count, loff_t * ppos) |
666 | { | 639 | { |
667 | struct il_priv *il = file->private_data; | 640 | struct il_priv *il = file->private_data; |
668 | int pos = 0; | 641 | int pos = 0; |
@@ -684,9 +657,9 @@ il4965_ucode_general_stats_read(struct file *file, char __user *user_buf, | |||
684 | } | 657 | } |
685 | 658 | ||
686 | /* the statistic information display here is based on | 659 | /* the statistic information display here is based on |
687 | * the last stats notification from uCode | 660 | * the last stats notification from uCode |
688 | * might not reflect the current uCode activity | 661 | * might not reflect the current uCode activity |
689 | */ | 662 | */ |
690 | general = &il->_4965.stats.general.common; | 663 | general = &il->_4965.stats.general.common; |
691 | dbg = &il->_4965.stats.general.common.dbg; | 664 | dbg = &il->_4965.stats.general.common.dbg; |
692 | div = &il->_4965.stats.general.common.div; | 665 | div = &il->_4965.stats.general.common.div; |
@@ -701,73 +674,72 @@ il4965_ucode_general_stats_read(struct file *file, char __user *user_buf, | |||
701 | max_div = &il->_4965.max_delta.general.common.div; | 674 | max_div = &il->_4965.max_delta.general.common.div; |
702 | 675 | ||
703 | pos += il4965_stats_flag(il, buf, bufsz); | 676 | pos += il4965_stats_flag(il, buf, bufsz); |
704 | pos += scnprintf(buf + pos, bufsz - pos, | 677 | pos += |
705 | fmt_header, "Statistics_General:"); | 678 | scnprintf(buf + pos, bufsz - pos, fmt_header, |
706 | pos += scnprintf(buf + pos, bufsz - pos, | 679 | "Statistics_General:"); |
707 | fmt_value, "temperature:", | 680 | pos += |
708 | le32_to_cpu(general->temperature)); | 681 | scnprintf(buf + pos, bufsz - pos, fmt_value, "temperature:", |
709 | pos += scnprintf(buf + pos, bufsz - pos, | 682 | le32_to_cpu(general->temperature)); |
710 | fmt_value, "ttl_timestamp:", | 683 | pos += |
711 | le32_to_cpu(general->ttl_timestamp)); | 684 | scnprintf(buf + pos, bufsz - pos, fmt_value, "ttl_timestamp:", |
712 | pos += scnprintf(buf + pos, bufsz - pos, | 685 | le32_to_cpu(general->ttl_timestamp)); |
713 | fmt_table, "burst_check:", | 686 | pos += |
714 | le32_to_cpu(dbg->burst_check), | 687 | scnprintf(buf + pos, bufsz - pos, fmt_table, "burst_check:", |
715 | accum_dbg->burst_check, | 688 | le32_to_cpu(dbg->burst_check), accum_dbg->burst_check, |
716 | delta_dbg->burst_check, max_dbg->burst_check); | 689 | delta_dbg->burst_check, max_dbg->burst_check); |
717 | pos += scnprintf(buf + pos, bufsz - pos, | 690 | pos += |
718 | fmt_table, "burst_count:", | 691 | scnprintf(buf + pos, bufsz - pos, fmt_table, "burst_count:", |
719 | le32_to_cpu(dbg->burst_count), | 692 | le32_to_cpu(dbg->burst_count), accum_dbg->burst_count, |
720 | accum_dbg->burst_count, | 693 | delta_dbg->burst_count, max_dbg->burst_count); |
721 | delta_dbg->burst_count, max_dbg->burst_count); | 694 | pos += |
722 | pos += scnprintf(buf + pos, bufsz - pos, | 695 | scnprintf(buf + pos, bufsz - pos, fmt_table, |
723 | fmt_table, "wait_for_silence_timeout_count:", | 696 | "wait_for_silence_timeout_count:", |
724 | le32_to_cpu(dbg->wait_for_silence_timeout_cnt), | 697 | le32_to_cpu(dbg->wait_for_silence_timeout_cnt), |
725 | accum_dbg->wait_for_silence_timeout_cnt, | 698 | accum_dbg->wait_for_silence_timeout_cnt, |
726 | delta_dbg->wait_for_silence_timeout_cnt, | 699 | delta_dbg->wait_for_silence_timeout_cnt, |
727 | max_dbg->wait_for_silence_timeout_cnt); | 700 | max_dbg->wait_for_silence_timeout_cnt); |
728 | pos += scnprintf(buf + pos, bufsz - pos, | 701 | pos += |
729 | fmt_table, "sleep_time:", | 702 | scnprintf(buf + pos, bufsz - pos, fmt_table, "sleep_time:", |
730 | le32_to_cpu(general->sleep_time), | 703 | le32_to_cpu(general->sleep_time), |
731 | accum_general->sleep_time, | 704 | accum_general->sleep_time, delta_general->sleep_time, |
732 | delta_general->sleep_time, max_general->sleep_time); | 705 | max_general->sleep_time); |
733 | pos += scnprintf(buf + pos, bufsz - pos, | 706 | pos += |
734 | fmt_table, "slots_out:", | 707 | scnprintf(buf + pos, bufsz - pos, fmt_table, "slots_out:", |
735 | le32_to_cpu(general->slots_out), | 708 | le32_to_cpu(general->slots_out), accum_general->slots_out, |
736 | accum_general->slots_out, | 709 | delta_general->slots_out, max_general->slots_out); |
737 | delta_general->slots_out, max_general->slots_out); | 710 | pos += |
738 | pos += scnprintf(buf + pos, bufsz - pos, | 711 | scnprintf(buf + pos, bufsz - pos, fmt_table, "slots_idle:", |
739 | fmt_table, "slots_idle:", | 712 | le32_to_cpu(general->slots_idle), |
740 | le32_to_cpu(general->slots_idle), | 713 | accum_general->slots_idle, delta_general->slots_idle, |
741 | accum_general->slots_idle, | 714 | max_general->slots_idle); |
742 | delta_general->slots_idle, max_general->slots_idle); | 715 | pos += |
743 | pos += scnprintf(buf + pos, bufsz - pos, | 716 | scnprintf(buf + pos, bufsz - pos, fmt_table, "tx_on_a:", |
744 | fmt_table, "tx_on_a:", | 717 | le32_to_cpu(div->tx_on_a), accum_div->tx_on_a, |
745 | le32_to_cpu(div->tx_on_a), accum_div->tx_on_a, | 718 | delta_div->tx_on_a, max_div->tx_on_a); |
746 | delta_div->tx_on_a, max_div->tx_on_a); | 719 | pos += |
747 | pos += scnprintf(buf + pos, bufsz - pos, | 720 | scnprintf(buf + pos, bufsz - pos, fmt_table, "tx_on_b:", |
748 | fmt_table, "tx_on_b:", | 721 | le32_to_cpu(div->tx_on_b), accum_div->tx_on_b, |
749 | le32_to_cpu(div->tx_on_b), accum_div->tx_on_b, | 722 | delta_div->tx_on_b, max_div->tx_on_b); |
750 | delta_div->tx_on_b, max_div->tx_on_b); | 723 | pos += |
751 | pos += scnprintf(buf + pos, bufsz - pos, | 724 | scnprintf(buf + pos, bufsz - pos, fmt_table, "exec_time:", |
752 | fmt_table, "exec_time:", | 725 | le32_to_cpu(div->exec_time), accum_div->exec_time, |
753 | le32_to_cpu(div->exec_time), accum_div->exec_time, | 726 | delta_div->exec_time, max_div->exec_time); |
754 | delta_div->exec_time, max_div->exec_time); | 727 | pos += |
755 | pos += scnprintf(buf + pos, bufsz - pos, | 728 | scnprintf(buf + pos, bufsz - pos, fmt_table, "probe_time:", |
756 | fmt_table, "probe_time:", | 729 | le32_to_cpu(div->probe_time), accum_div->probe_time, |
757 | le32_to_cpu(div->probe_time), accum_div->probe_time, | 730 | delta_div->probe_time, max_div->probe_time); |
758 | delta_div->probe_time, max_div->probe_time); | 731 | pos += |
759 | pos += scnprintf(buf + pos, bufsz - pos, | 732 | scnprintf(buf + pos, bufsz - pos, fmt_table, "rx_enable_counter:", |
760 | fmt_table, "rx_enable_counter:", | 733 | le32_to_cpu(general->rx_enable_counter), |
761 | le32_to_cpu(general->rx_enable_counter), | 734 | accum_general->rx_enable_counter, |
762 | accum_general->rx_enable_counter, | 735 | delta_general->rx_enable_counter, |
763 | delta_general->rx_enable_counter, | 736 | max_general->rx_enable_counter); |
764 | max_general->rx_enable_counter); | 737 | pos += |
765 | pos += scnprintf(buf + pos, bufsz - pos, | 738 | scnprintf(buf + pos, bufsz - pos, fmt_table, "num_of_sos_states:", |
766 | fmt_table, "num_of_sos_states:", | 739 | le32_to_cpu(general->num_of_sos_states), |
767 | le32_to_cpu(general->num_of_sos_states), | 740 | accum_general->num_of_sos_states, |
768 | accum_general->num_of_sos_states, | 741 | delta_general->num_of_sos_states, |
769 | delta_general->num_of_sos_states, | 742 | max_general->num_of_sos_states); |
770 | max_general->num_of_sos_states); | ||
771 | ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos); | 743 | ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos); |
772 | kfree(buf); | 744 | kfree(buf); |
773 | return ret; | 745 | return ret; |
diff --git a/drivers/net/wireless/iwlegacy/4965-mac.c b/drivers/net/wireless/iwlegacy/4965-mac.c index 9e3f74c8e9a7..ca819d872097 100644 --- a/drivers/net/wireless/iwlegacy/4965-mac.c +++ b/drivers/net/wireless/iwlegacy/4965-mac.c | |||
@@ -53,7 +53,6 @@ | |||
53 | #include "common.h" | 53 | #include "common.h" |
54 | #include "4965.h" | 54 | #include "4965.h" |
55 | 55 | ||
56 | |||
57 | /****************************************************************************** | 56 | /****************************************************************************** |
58 | * | 57 | * |
59 | * module boiler plate | 58 | * module boiler plate |
@@ -73,15 +72,14 @@ | |||
73 | 72 | ||
74 | #define DRV_VERSION IWLWIFI_VERSION VD | 73 | #define DRV_VERSION IWLWIFI_VERSION VD |
75 | 74 | ||
76 | |||
77 | MODULE_DESCRIPTION(DRV_DESCRIPTION); | 75 | MODULE_DESCRIPTION(DRV_DESCRIPTION); |
78 | MODULE_VERSION(DRV_VERSION); | 76 | MODULE_VERSION(DRV_VERSION); |
79 | MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR); | 77 | MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR); |
80 | MODULE_LICENSE("GPL"); | 78 | MODULE_LICENSE("GPL"); |
81 | MODULE_ALIAS("iwl4965"); | 79 | MODULE_ALIAS("iwl4965"); |
82 | 80 | ||
83 | void il4965_check_abort_status(struct il_priv *il, | 81 | void |
84 | u8 frame_count, u32 status) | 82 | il4965_check_abort_status(struct il_priv *il, u8 frame_count, u32 status) |
85 | { | 83 | { |
86 | if (frame_count == 1 && status == TX_STATUS_FAIL_RFKILL_FLUSH) { | 84 | if (frame_count == 1 && status == TX_STATUS_FAIL_RFKILL_FLUSH) { |
87 | IL_ERR("Tx flush command to flush out all frames\n"); | 85 | IL_ERR("Tx flush command to flush out all frames\n"); |
@@ -99,7 +97,8 @@ struct il_mod_params il4965_mod_params = { | |||
99 | /* the rest are 0 by default */ | 97 | /* the rest are 0 by default */ |
100 | }; | 98 | }; |
101 | 99 | ||
102 | void il4965_rx_queue_reset(struct il_priv *il, struct il_rx_queue *rxq) | 100 | void |
101 | il4965_rx_queue_reset(struct il_priv *il, struct il_rx_queue *rxq) | ||
103 | { | 102 | { |
104 | unsigned long flags; | 103 | unsigned long flags; |
105 | int i; | 104 | int i; |
@@ -112,8 +111,8 @@ void il4965_rx_queue_reset(struct il_priv *il, struct il_rx_queue *rxq) | |||
112 | * to an SKB, so we need to unmap and free potential storage */ | 111 | * to an SKB, so we need to unmap and free potential storage */ |
113 | if (rxq->pool[i].page != NULL) { | 112 | if (rxq->pool[i].page != NULL) { |
114 | pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma, | 113 | pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma, |
115 | PAGE_SIZE << il->hw_params.rx_page_order, | 114 | PAGE_SIZE << il->hw_params.rx_page_order, |
116 | PCI_DMA_FROMDEVICE); | 115 | PCI_DMA_FROMDEVICE); |
117 | __il_free_pages(il, rxq->pool[i].page); | 116 | __il_free_pages(il, rxq->pool[i].page); |
118 | rxq->pool[i].page = NULL; | 117 | rxq->pool[i].page = NULL; |
119 | } | 118 | } |
@@ -131,10 +130,11 @@ void il4965_rx_queue_reset(struct il_priv *il, struct il_rx_queue *rxq) | |||
131 | spin_unlock_irqrestore(&rxq->lock, flags); | 130 | spin_unlock_irqrestore(&rxq->lock, flags); |
132 | } | 131 | } |
133 | 132 | ||
134 | int il4965_rx_init(struct il_priv *il, struct il_rx_queue *rxq) | 133 | int |
134 | il4965_rx_init(struct il_priv *il, struct il_rx_queue *rxq) | ||
135 | { | 135 | { |
136 | u32 rb_size; | 136 | u32 rb_size; |
137 | const u32 rfdnlog = RX_QUEUE_SIZE_LOG; /* 256 RBDs */ | 137 | const u32 rfdnlog = RX_QUEUE_SIZE_LOG; /* 256 RBDs */ |
138 | u32 rb_timeout = 0; | 138 | u32 rb_timeout = 0; |
139 | 139 | ||
140 | if (il->cfg->mod_params->amsdu_size_8K) | 140 | if (il->cfg->mod_params->amsdu_size_8K) |
@@ -149,12 +149,10 @@ int il4965_rx_init(struct il_priv *il, struct il_rx_queue *rxq) | |||
149 | il_wr(il, FH49_RSCSR_CHNL0_RBDCB_WPTR_REG, 0); | 149 | il_wr(il, FH49_RSCSR_CHNL0_RBDCB_WPTR_REG, 0); |
150 | 150 | ||
151 | /* Tell device where to find RBD circular buffer in DRAM */ | 151 | /* Tell device where to find RBD circular buffer in DRAM */ |
152 | il_wr(il, FH49_RSCSR_CHNL0_RBDCB_BASE_REG, | 152 | il_wr(il, FH49_RSCSR_CHNL0_RBDCB_BASE_REG, (u32) (rxq->bd_dma >> 8)); |
153 | (u32)(rxq->bd_dma >> 8)); | ||
154 | 153 | ||
155 | /* Tell device where in DRAM to update its Rx status */ | 154 | /* Tell device where in DRAM to update its Rx status */ |
156 | il_wr(il, FH49_RSCSR_CHNL0_STTS_WPTR_REG, | 155 | il_wr(il, FH49_RSCSR_CHNL0_STTS_WPTR_REG, rxq->rb_stts_dma >> 4); |
157 | rxq->rb_stts_dma >> 4); | ||
158 | 156 | ||
159 | /* Enable Rx DMA | 157 | /* Enable Rx DMA |
160 | * Direct rx interrupts to hosts | 158 | * Direct rx interrupts to hosts |
@@ -163,12 +161,12 @@ int il4965_rx_init(struct il_priv *il, struct il_rx_queue *rxq) | |||
163 | * 256 RBDs | 161 | * 256 RBDs |
164 | */ | 162 | */ |
165 | il_wr(il, FH49_MEM_RCSR_CHNL0_CONFIG_REG, | 163 | il_wr(il, FH49_MEM_RCSR_CHNL0_CONFIG_REG, |
166 | FH49_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL | | 164 | FH49_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL | |
167 | FH49_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL | | 165 | FH49_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL | |
168 | FH49_RCSR_CHNL0_RX_CONFIG_SINGLE_FRAME_MSK | | 166 | FH49_RCSR_CHNL0_RX_CONFIG_SINGLE_FRAME_MSK | rb_size | (rb_timeout |
169 | rb_size| | 167 | << |
170 | (rb_timeout << FH49_RCSR_RX_CONFIG_REG_IRQ_RBTH_POS)| | 168 | FH49_RCSR_RX_CONFIG_REG_IRQ_RBTH_POS) |
171 | (rfdnlog << FH49_RCSR_RX_CONFIG_RBDCB_SIZE_POS)); | 169 | | (rfdnlog << FH49_RCSR_RX_CONFIG_RBDCB_SIZE_POS)); |
172 | 170 | ||
173 | /* Set interrupt coalescing timer to default (2048 usecs) */ | 171 | /* Set interrupt coalescing timer to default (2048 usecs) */ |
174 | il_write8(il, CSR_INT_COALESCING, IL_HOST_INT_TIMEOUT_DEF); | 172 | il_write8(il, CSR_INT_COALESCING, IL_HOST_INT_TIMEOUT_DEF); |
@@ -176,7 +174,8 @@ int il4965_rx_init(struct il_priv *il, struct il_rx_queue *rxq) | |||
176 | return 0; | 174 | return 0; |
177 | } | 175 | } |
178 | 176 | ||
179 | static void il4965_set_pwr_vmain(struct il_priv *il) | 177 | static void |
178 | il4965_set_pwr_vmain(struct il_priv *il) | ||
180 | { | 179 | { |
181 | /* | 180 | /* |
182 | * (for documentation purposes) | 181 | * (for documentation purposes) |
@@ -189,11 +188,12 @@ static void il4965_set_pwr_vmain(struct il_priv *il) | |||
189 | */ | 188 | */ |
190 | 189 | ||
191 | il_set_bits_mask_prph(il, APMG_PS_CTRL_REG, | 190 | il_set_bits_mask_prph(il, APMG_PS_CTRL_REG, |
192 | APMG_PS_CTRL_VAL_PWR_SRC_VMAIN, | 191 | APMG_PS_CTRL_VAL_PWR_SRC_VMAIN, |
193 | ~APMG_PS_CTRL_MSK_PWR_SRC); | 192 | ~APMG_PS_CTRL_MSK_PWR_SRC); |
194 | } | 193 | } |
195 | 194 | ||
196 | int il4965_hw_nic_init(struct il_priv *il) | 195 | int |
196 | il4965_hw_nic_init(struct il_priv *il) | ||
197 | { | 197 | { |
198 | unsigned long flags; | 198 | unsigned long flags; |
199 | struct il_rx_queue *rxq = &il->rxq; | 199 | struct il_rx_queue *rxq = &il->rxq; |
@@ -249,10 +249,10 @@ int il4965_hw_nic_init(struct il_priv *il) | |||
249 | /** | 249 | /** |
250 | * il4965_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr | 250 | * il4965_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr |
251 | */ | 251 | */ |
252 | static inline __le32 il4965_dma_addr2rbd_ptr(struct il_priv *il, | 252 | static inline __le32 |
253 | dma_addr_t dma_addr) | 253 | il4965_dma_addr2rbd_ptr(struct il_priv *il, dma_addr_t dma_addr) |
254 | { | 254 | { |
255 | return cpu_to_le32((u32)(dma_addr >> 8)); | 255 | return cpu_to_le32((u32) (dma_addr >> 8)); |
256 | } | 256 | } |
257 | 257 | ||
258 | /** | 258 | /** |
@@ -266,7 +266,8 @@ static inline __le32 il4965_dma_addr2rbd_ptr(struct il_priv *il, | |||
266 | * also updates the memory address in the firmware to reference the new | 266 | * also updates the memory address in the firmware to reference the new |
267 | * target buffer. | 267 | * target buffer. |
268 | */ | 268 | */ |
269 | void il4965_rx_queue_restock(struct il_priv *il) | 269 | void |
270 | il4965_rx_queue_restock(struct il_priv *il) | ||
270 | { | 271 | { |
271 | struct il_rx_queue *rxq = &il->rxq; | 272 | struct il_rx_queue *rxq = &il->rxq; |
272 | struct list_head *element; | 273 | struct list_head *element; |
@@ -285,8 +286,8 @@ void il4965_rx_queue_restock(struct il_priv *il) | |||
285 | list_del(element); | 286 | list_del(element); |
286 | 287 | ||
287 | /* Point to Rx buffer via next RBD in circular buffer */ | 288 | /* Point to Rx buffer via next RBD in circular buffer */ |
288 | rxq->bd[rxq->write] = il4965_dma_addr2rbd_ptr(il, | 289 | rxq->bd[rxq->write] = |
289 | rxb->page_dma); | 290 | il4965_dma_addr2rbd_ptr(il, rxb->page_dma); |
290 | rxq->queue[rxq->write] = rxb; | 291 | rxq->queue[rxq->write] = rxb; |
291 | rxq->write = (rxq->write + 1) & RX_QUEUE_MASK; | 292 | rxq->write = (rxq->write + 1) & RX_QUEUE_MASK; |
292 | rxq->free_count--; | 293 | rxq->free_count--; |
@@ -297,7 +298,6 @@ void il4965_rx_queue_restock(struct il_priv *il) | |||
297 | if (rxq->free_count <= RX_LOW_WATERMARK) | 298 | if (rxq->free_count <= RX_LOW_WATERMARK) |
298 | queue_work(il->workqueue, &il->rx_replenish); | 299 | queue_work(il->workqueue, &il->rx_replenish); |
299 | 300 | ||
300 | |||
301 | /* If we've added more space for the firmware to place data, tell it. | 301 | /* If we've added more space for the firmware to place data, tell it. |
302 | * Increment device's write pointer in multiples of 8. */ | 302 | * Increment device's write pointer in multiples of 8. */ |
303 | if (rxq->write_actual != (rxq->write & ~0x7)) { | 303 | if (rxq->write_actual != (rxq->write & ~0x7)) { |
@@ -316,7 +316,8 @@ void il4965_rx_queue_restock(struct il_priv *il) | |||
316 | * Also restock the Rx queue via il_rx_queue_restock. | 316 | * Also restock the Rx queue via il_rx_queue_restock. |
317 | * This is called as a scheduled work item (except for during initialization) | 317 | * This is called as a scheduled work item (except for during initialization) |
318 | */ | 318 | */ |
319 | static void il4965_rx_allocate(struct il_priv *il, gfp_t priority) | 319 | static void |
320 | il4965_rx_allocate(struct il_priv *il, gfp_t priority) | ||
320 | { | 321 | { |
321 | struct il_rx_queue *rxq = &il->rxq; | 322 | struct il_rx_queue *rxq = &il->rxq; |
322 | struct list_head *element; | 323 | struct list_head *element; |
@@ -343,18 +344,16 @@ static void il4965_rx_allocate(struct il_priv *il, gfp_t priority) | |||
343 | page = alloc_pages(gfp_mask, il->hw_params.rx_page_order); | 344 | page = alloc_pages(gfp_mask, il->hw_params.rx_page_order); |
344 | if (!page) { | 345 | if (!page) { |
345 | if (net_ratelimit()) | 346 | if (net_ratelimit()) |
346 | D_INFO("alloc_pages failed, " | 347 | D_INFO("alloc_pages failed, " "order: %d\n", |
347 | "order: %d\n", | 348 | il->hw_params.rx_page_order); |
348 | il->hw_params.rx_page_order); | ||
349 | 349 | ||
350 | if (rxq->free_count <= RX_LOW_WATERMARK && | 350 | if (rxq->free_count <= RX_LOW_WATERMARK && |
351 | net_ratelimit()) | 351 | net_ratelimit()) |
352 | IL_ERR( | 352 | IL_ERR("Failed to alloc_pages with %s. " |
353 | "Failed to alloc_pages with %s. " | 353 | "Only %u free buffers remaining.\n", |
354 | "Only %u free buffers remaining.\n", | 354 | priority == |
355 | priority == GFP_ATOMIC ? | 355 | GFP_ATOMIC ? "GFP_ATOMIC" : "GFP_KERNEL", |
356 | "GFP_ATOMIC" : "GFP_KERNEL", | 356 | rxq->free_count); |
357 | rxq->free_count); | ||
358 | /* We don't reschedule replenish work here -- we will | 357 | /* We don't reschedule replenish work here -- we will |
359 | * call the restock method and if it still needs | 358 | * call the restock method and if it still needs |
360 | * more buffers it will schedule replenish */ | 359 | * more buffers it will schedule replenish */ |
@@ -377,9 +376,10 @@ static void il4965_rx_allocate(struct il_priv *il, gfp_t priority) | |||
377 | BUG_ON(rxb->page); | 376 | BUG_ON(rxb->page); |
378 | rxb->page = page; | 377 | rxb->page = page; |
379 | /* Get physical address of the RB */ | 378 | /* Get physical address of the RB */ |
380 | rxb->page_dma = pci_map_page(il->pci_dev, page, 0, | 379 | rxb->page_dma = |
381 | PAGE_SIZE << il->hw_params.rx_page_order, | 380 | pci_map_page(il->pci_dev, page, 0, |
382 | PCI_DMA_FROMDEVICE); | 381 | PAGE_SIZE << il->hw_params.rx_page_order, |
382 | PCI_DMA_FROMDEVICE); | ||
383 | /* dma address must be no more than 36 bits */ | 383 | /* dma address must be no more than 36 bits */ |
384 | BUG_ON(rxb->page_dma & ~DMA_BIT_MASK(36)); | 384 | BUG_ON(rxb->page_dma & ~DMA_BIT_MASK(36)); |
385 | /* and also 256 byte aligned! */ | 385 | /* and also 256 byte aligned! */ |
@@ -395,7 +395,8 @@ static void il4965_rx_allocate(struct il_priv *il, gfp_t priority) | |||
395 | } | 395 | } |
396 | } | 396 | } |
397 | 397 | ||
398 | void il4965_rx_replenish(struct il_priv *il) | 398 | void |
399 | il4965_rx_replenish(struct il_priv *il) | ||
399 | { | 400 | { |
400 | unsigned long flags; | 401 | unsigned long flags; |
401 | 402 | ||
@@ -406,7 +407,8 @@ void il4965_rx_replenish(struct il_priv *il) | |||
406 | spin_unlock_irqrestore(&il->lock, flags); | 407 | spin_unlock_irqrestore(&il->lock, flags); |
407 | } | 408 | } |
408 | 409 | ||
409 | void il4965_rx_replenish_now(struct il_priv *il) | 410 | void |
411 | il4965_rx_replenish_now(struct il_priv *il) | ||
410 | { | 412 | { |
411 | il4965_rx_allocate(il, GFP_ATOMIC); | 413 | il4965_rx_allocate(il, GFP_ATOMIC); |
412 | 414 | ||
@@ -418,14 +420,15 @@ void il4965_rx_replenish_now(struct il_priv *il) | |||
418 | * This free routine walks the list of POOL entries and if SKB is set to | 420 | * This free routine walks the list of POOL entries and if SKB is set to |
419 | * non NULL it is unmapped and freed | 421 | * non NULL it is unmapped and freed |
420 | */ | 422 | */ |
421 | void il4965_rx_queue_free(struct il_priv *il, struct il_rx_queue *rxq) | 423 | void |
424 | il4965_rx_queue_free(struct il_priv *il, struct il_rx_queue *rxq) | ||
422 | { | 425 | { |
423 | int i; | 426 | int i; |
424 | for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) { | 427 | for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) { |
425 | if (rxq->pool[i].page != NULL) { | 428 | if (rxq->pool[i].page != NULL) { |
426 | pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma, | 429 | pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma, |
427 | PAGE_SIZE << il->hw_params.rx_page_order, | 430 | PAGE_SIZE << il->hw_params.rx_page_order, |
428 | PCI_DMA_FROMDEVICE); | 431 | PCI_DMA_FROMDEVICE); |
429 | __il_free_pages(il, rxq->pool[i].page); | 432 | __il_free_pages(il, rxq->pool[i].page); |
430 | rxq->pool[i].page = NULL; | 433 | rxq->pool[i].page = NULL; |
431 | } | 434 | } |
@@ -436,21 +439,23 @@ void il4965_rx_queue_free(struct il_priv *il, struct il_rx_queue *rxq) | |||
436 | dma_free_coherent(&il->pci_dev->dev, sizeof(struct il_rb_status), | 439 | dma_free_coherent(&il->pci_dev->dev, sizeof(struct il_rb_status), |
437 | rxq->rb_stts, rxq->rb_stts_dma); | 440 | rxq->rb_stts, rxq->rb_stts_dma); |
438 | rxq->bd = NULL; | 441 | rxq->bd = NULL; |
439 | rxq->rb_stts = NULL; | 442 | rxq->rb_stts = NULL; |
440 | } | 443 | } |
441 | 444 | ||
442 | int il4965_rxq_stop(struct il_priv *il) | 445 | int |
446 | il4965_rxq_stop(struct il_priv *il) | ||
443 | { | 447 | { |
444 | 448 | ||
445 | /* stop Rx DMA */ | 449 | /* stop Rx DMA */ |
446 | il_wr(il, FH49_MEM_RCSR_CHNL0_CONFIG_REG, 0); | 450 | il_wr(il, FH49_MEM_RCSR_CHNL0_CONFIG_REG, 0); |
447 | il_poll_bit(il, FH49_MEM_RSSR_RX_STATUS_REG, | 451 | il_poll_bit(il, FH49_MEM_RSSR_RX_STATUS_REG, |
448 | FH49_RSSR_CHNL0_RX_STATUS_CHNL_IDLE, 1000); | 452 | FH49_RSSR_CHNL0_RX_STATUS_CHNL_IDLE, 1000); |
449 | 453 | ||
450 | return 0; | 454 | return 0; |
451 | } | 455 | } |
452 | 456 | ||
453 | int il4965_hwrate_to_mac80211_idx(u32 rate_n_flags, enum ieee80211_band band) | 457 | int |
458 | il4965_hwrate_to_mac80211_idx(u32 rate_n_flags, enum ieee80211_band band) | ||
454 | { | 459 | { |
455 | int idx = 0; | 460 | int idx = 0; |
456 | int band_offset = 0; | 461 | int band_offset = 0; |
@@ -459,7 +464,7 @@ int il4965_hwrate_to_mac80211_idx(u32 rate_n_flags, enum ieee80211_band band) | |||
459 | if (rate_n_flags & RATE_MCS_HT_MSK) { | 464 | if (rate_n_flags & RATE_MCS_HT_MSK) { |
460 | idx = (rate_n_flags & 0xff); | 465 | idx = (rate_n_flags & 0xff); |
461 | return idx; | 466 | return idx; |
462 | /* Legacy rate format, search for match in table */ | 467 | /* Legacy rate format, search for match in table */ |
463 | } else { | 468 | } else { |
464 | if (band == IEEE80211_BAND_5GHZ) | 469 | if (band == IEEE80211_BAND_5GHZ) |
465 | band_offset = IL_FIRST_OFDM_RATE; | 470 | band_offset = IL_FIRST_OFDM_RATE; |
@@ -471,19 +476,20 @@ int il4965_hwrate_to_mac80211_idx(u32 rate_n_flags, enum ieee80211_band band) | |||
471 | return -1; | 476 | return -1; |
472 | } | 477 | } |
473 | 478 | ||
474 | static int il4965_calc_rssi(struct il_priv *il, | 479 | static int |
475 | struct il_rx_phy_res *rx_resp) | 480 | il4965_calc_rssi(struct il_priv *il, struct il_rx_phy_res *rx_resp) |
476 | { | 481 | { |
477 | /* data from PHY/DSP regarding signal strength, etc., | 482 | /* data from PHY/DSP regarding signal strength, etc., |
478 | * contents are always there, not configurable by host. */ | 483 | * contents are always there, not configurable by host. */ |
479 | struct il4965_rx_non_cfg_phy *ncphy = | 484 | struct il4965_rx_non_cfg_phy *ncphy = |
480 | (struct il4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy_buf; | 485 | (struct il4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy_buf; |
481 | u32 agc = (le16_to_cpu(ncphy->agc_info) & IL49_AGC_DB_MASK) | 486 | u32 agc = |
482 | >> IL49_AGC_DB_POS; | 487 | (le16_to_cpu(ncphy->agc_info) & IL49_AGC_DB_MASK) >> |
488 | IL49_AGC_DB_POS; | ||
483 | 489 | ||
484 | u32 valid_antennae = | 490 | u32 valid_antennae = |
485 | (le16_to_cpu(rx_resp->phy_flags) & IL49_RX_PHY_FLAGS_ANTENNAE_MASK) | 491 | (le16_to_cpu(rx_resp->phy_flags) & IL49_RX_PHY_FLAGS_ANTENNAE_MASK) |
486 | >> IL49_RX_PHY_FLAGS_ANTENNAE_OFFSET; | 492 | >> IL49_RX_PHY_FLAGS_ANTENNAE_OFFSET; |
487 | u8 max_rssi = 0; | 493 | u8 max_rssi = 0; |
488 | u32 i; | 494 | u32 i; |
489 | 495 | ||
@@ -505,31 +511,32 @@ static int il4965_calc_rssi(struct il_priv *il, | |||
505 | return max_rssi - agc - IL4965_RSSI_OFFSET; | 511 | return max_rssi - agc - IL4965_RSSI_OFFSET; |
506 | } | 512 | } |
507 | 513 | ||
508 | 514 | static u32 | |
509 | static u32 il4965_translate_rx_status(struct il_priv *il, u32 decrypt_in) | 515 | il4965_translate_rx_status(struct il_priv *il, u32 decrypt_in) |
510 | { | 516 | { |
511 | u32 decrypt_out = 0; | 517 | u32 decrypt_out = 0; |
512 | 518 | ||
513 | if ((decrypt_in & RX_RES_STATUS_STATION_FOUND) == | 519 | if ((decrypt_in & RX_RES_STATUS_STATION_FOUND) == |
514 | RX_RES_STATUS_STATION_FOUND) | 520 | RX_RES_STATUS_STATION_FOUND) |
515 | decrypt_out |= (RX_RES_STATUS_STATION_FOUND | | 521 | decrypt_out |= |
516 | RX_RES_STATUS_NO_STATION_INFO_MISMATCH); | 522 | (RX_RES_STATUS_STATION_FOUND | |
523 | RX_RES_STATUS_NO_STATION_INFO_MISMATCH); | ||
517 | 524 | ||
518 | decrypt_out |= (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK); | 525 | decrypt_out |= (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK); |
519 | 526 | ||
520 | /* packet was not encrypted */ | 527 | /* packet was not encrypted */ |
521 | if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) == | 528 | if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) == |
522 | RX_RES_STATUS_SEC_TYPE_NONE) | 529 | RX_RES_STATUS_SEC_TYPE_NONE) |
523 | return decrypt_out; | 530 | return decrypt_out; |
524 | 531 | ||
525 | /* packet was encrypted with unknown alg */ | 532 | /* packet was encrypted with unknown alg */ |
526 | if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) == | 533 | if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) == |
527 | RX_RES_STATUS_SEC_TYPE_ERR) | 534 | RX_RES_STATUS_SEC_TYPE_ERR) |
528 | return decrypt_out; | 535 | return decrypt_out; |
529 | 536 | ||
530 | /* decryption was not done in HW */ | 537 | /* decryption was not done in HW */ |
531 | if ((decrypt_in & RX_MPDU_RES_STATUS_DEC_DONE_MSK) != | 538 | if ((decrypt_in & RX_MPDU_RES_STATUS_DEC_DONE_MSK) != |
532 | RX_MPDU_RES_STATUS_DEC_DONE_MSK) | 539 | RX_MPDU_RES_STATUS_DEC_DONE_MSK) |
533 | return decrypt_out; | 540 | return decrypt_out; |
534 | 541 | ||
535 | switch (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) { | 542 | switch (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) { |
@@ -559,26 +566,22 @@ static u32 il4965_translate_rx_status(struct il_priv *il, u32 decrypt_in) | |||
559 | break; | 566 | break; |
560 | } | 567 | } |
561 | 568 | ||
562 | D_RX("decrypt_in:0x%x decrypt_out = 0x%x\n", | 569 | D_RX("decrypt_in:0x%x decrypt_out = 0x%x\n", decrypt_in, decrypt_out); |
563 | decrypt_in, decrypt_out); | ||
564 | 570 | ||
565 | return decrypt_out; | 571 | return decrypt_out; |
566 | } | 572 | } |
567 | 573 | ||
568 | static void il4965_pass_packet_to_mac80211(struct il_priv *il, | 574 | static void |
569 | struct ieee80211_hdr *hdr, | 575 | il4965_pass_packet_to_mac80211(struct il_priv *il, struct ieee80211_hdr *hdr, |
570 | u16 len, | 576 | u16 len, u32 ampdu_status, struct il_rx_buf *rxb, |
571 | u32 ampdu_status, | 577 | struct ieee80211_rx_status *stats) |
572 | struct il_rx_buf *rxb, | ||
573 | struct ieee80211_rx_status *stats) | ||
574 | { | 578 | { |
575 | struct sk_buff *skb; | 579 | struct sk_buff *skb; |
576 | __le16 fc = hdr->frame_control; | 580 | __le16 fc = hdr->frame_control; |
577 | 581 | ||
578 | /* We only process data packets if the interface is open */ | 582 | /* We only process data packets if the interface is open */ |
579 | if (unlikely(!il->is_open)) { | 583 | if (unlikely(!il->is_open)) { |
580 | D_DROP( | 584 | D_DROP("Dropping packet while interface is not open.\n"); |
581 | "Dropping packet while interface is not open.\n"); | ||
582 | return; | 585 | return; |
583 | } | 586 | } |
584 | 587 | ||
@@ -605,8 +608,8 @@ static void il4965_pass_packet_to_mac80211(struct il_priv *il, | |||
605 | 608 | ||
606 | /* Called for N_RX (legacy ABG frames), or | 609 | /* Called for N_RX (legacy ABG frames), or |
607 | * N_RX_MPDU (HT high-throughput N frames). */ | 610 | * N_RX_MPDU (HT high-throughput N frames). */ |
608 | void il4965_hdl_rx(struct il_priv *il, | 611 | void |
609 | struct il_rx_buf *rxb) | 612 | il4965_hdl_rx(struct il_priv *il, struct il_rx_buf *rxb) |
610 | { | 613 | { |
611 | struct ieee80211_hdr *header; | 614 | struct ieee80211_hdr *header; |
612 | struct ieee80211_rx_status rx_status; | 615 | struct ieee80211_rx_status rx_status; |
@@ -629,12 +632,14 @@ void il4965_hdl_rx(struct il_priv *il, | |||
629 | */ | 632 | */ |
630 | if (pkt->hdr.cmd == N_RX) { | 633 | if (pkt->hdr.cmd == N_RX) { |
631 | phy_res = (struct il_rx_phy_res *)pkt->u.raw; | 634 | phy_res = (struct il_rx_phy_res *)pkt->u.raw; |
632 | header = (struct ieee80211_hdr *)(pkt->u.raw + sizeof(*phy_res) | 635 | header = |
633 | + phy_res->cfg_phy_cnt); | 636 | (struct ieee80211_hdr *)(pkt->u.raw + sizeof(*phy_res) + |
637 | phy_res->cfg_phy_cnt); | ||
634 | 638 | ||
635 | len = le16_to_cpu(phy_res->byte_count); | 639 | len = le16_to_cpu(phy_res->byte_count); |
636 | rx_pkt_status = *(__le32 *)(pkt->u.raw + sizeof(*phy_res) + | 640 | rx_pkt_status = |
637 | phy_res->cfg_phy_cnt + len); | 641 | *(__le32 *) (pkt->u.raw + sizeof(*phy_res) + |
642 | phy_res->cfg_phy_cnt + len); | ||
638 | ampdu_status = le32_to_cpu(rx_pkt_status); | 643 | ampdu_status = le32_to_cpu(rx_pkt_status); |
639 | } else { | 644 | } else { |
640 | if (!il->_4965.last_phy_res_valid) { | 645 | if (!il->_4965.last_phy_res_valid) { |
@@ -645,21 +650,20 @@ void il4965_hdl_rx(struct il_priv *il, | |||
645 | amsdu = (struct il_rx_mpdu_res_start *)pkt->u.raw; | 650 | amsdu = (struct il_rx_mpdu_res_start *)pkt->u.raw; |
646 | header = (struct ieee80211_hdr *)(pkt->u.raw + sizeof(*amsdu)); | 651 | header = (struct ieee80211_hdr *)(pkt->u.raw + sizeof(*amsdu)); |
647 | len = le16_to_cpu(amsdu->byte_count); | 652 | len = le16_to_cpu(amsdu->byte_count); |
648 | rx_pkt_status = *(__le32 *)(pkt->u.raw + sizeof(*amsdu) + len); | 653 | rx_pkt_status = *(__le32 *) (pkt->u.raw + sizeof(*amsdu) + len); |
649 | ampdu_status = il4965_translate_rx_status(il, | 654 | ampdu_status = |
650 | le32_to_cpu(rx_pkt_status)); | 655 | il4965_translate_rx_status(il, le32_to_cpu(rx_pkt_status)); |
651 | } | 656 | } |
652 | 657 | ||
653 | if ((unlikely(phy_res->cfg_phy_cnt > 20))) { | 658 | if ((unlikely(phy_res->cfg_phy_cnt > 20))) { |
654 | D_DROP("dsp size out of range [0,20]: %d/n", | 659 | D_DROP("dsp size out of range [0,20]: %d/n", |
655 | phy_res->cfg_phy_cnt); | 660 | phy_res->cfg_phy_cnt); |
656 | return; | 661 | return; |
657 | } | 662 | } |
658 | 663 | ||
659 | if (!(rx_pkt_status & RX_RES_STATUS_NO_CRC32_ERROR) || | 664 | if (!(rx_pkt_status & RX_RES_STATUS_NO_CRC32_ERROR) || |
660 | !(rx_pkt_status & RX_RES_STATUS_NO_RXE_OVERFLOW)) { | 665 | !(rx_pkt_status & RX_RES_STATUS_NO_RXE_OVERFLOW)) { |
661 | D_RX("Bad CRC or FIFO: 0x%08X.\n", | 666 | D_RX("Bad CRC or FIFO: 0x%08X.\n", le32_to_cpu(rx_pkt_status)); |
662 | le32_to_cpu(rx_pkt_status)); | ||
663 | return; | 667 | return; |
664 | } | 668 | } |
665 | 669 | ||
@@ -668,18 +672,20 @@ void il4965_hdl_rx(struct il_priv *il, | |||
668 | 672 | ||
669 | /* rx_status carries information about the packet to mac80211 */ | 673 | /* rx_status carries information about the packet to mac80211 */ |
670 | rx_status.mactime = le64_to_cpu(phy_res->timestamp); | 674 | rx_status.mactime = le64_to_cpu(phy_res->timestamp); |
671 | rx_status.band = (phy_res->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ? | 675 | rx_status.band = |
672 | IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ; | 676 | (phy_res-> |
677 | phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ? IEEE80211_BAND_2GHZ : | ||
678 | IEEE80211_BAND_5GHZ; | ||
673 | rx_status.freq = | 679 | rx_status.freq = |
674 | ieee80211_channel_to_frequency(le16_to_cpu(phy_res->channel), | 680 | ieee80211_channel_to_frequency(le16_to_cpu(phy_res->channel), |
675 | rx_status.band); | 681 | rx_status.band); |
676 | rx_status.rate_idx = | 682 | rx_status.rate_idx = |
677 | il4965_hwrate_to_mac80211_idx(rate_n_flags, rx_status.band); | 683 | il4965_hwrate_to_mac80211_idx(rate_n_flags, rx_status.band); |
678 | rx_status.flag = 0; | 684 | rx_status.flag = 0; |
679 | 685 | ||
680 | /* TSF isn't reliable. In order to allow smooth user experience, | 686 | /* TSF isn't reliable. In order to allow smooth user experience, |
681 | * this W/A doesn't propagate it to the mac80211 */ | 687 | * this W/A doesn't propagate it to the mac80211 */ |
682 | /*rx_status.flag |= RX_FLAG_MACTIME_MPDU;*/ | 688 | /*rx_status.flag |= RX_FLAG_MACTIME_MPDU; */ |
683 | 689 | ||
684 | il->ucode_beacon_time = le32_to_cpu(phy_res->beacon_time_stamp); | 690 | il->ucode_beacon_time = le32_to_cpu(phy_res->beacon_time_stamp); |
685 | 691 | ||
@@ -687,8 +693,8 @@ void il4965_hdl_rx(struct il_priv *il, | |||
687 | rx_status.signal = il4965_calc_rssi(il, phy_res); | 693 | rx_status.signal = il4965_calc_rssi(il, phy_res); |
688 | 694 | ||
689 | il_dbg_log_rx_data_frame(il, len, header); | 695 | il_dbg_log_rx_data_frame(il, len, header); |
690 | D_STATS("Rssi %d, TSF %llu\n", | 696 | D_STATS("Rssi %d, TSF %llu\n", rx_status.signal, |
691 | rx_status.signal, (unsigned long long)rx_status.mactime); | 697 | (unsigned long long)rx_status.mactime); |
692 | 698 | ||
693 | /* | 699 | /* |
694 | * "antenna number" | 700 | * "antenna number" |
@@ -704,8 +710,8 @@ void il4965_hdl_rx(struct il_priv *il, | |||
704 | * as a bitmask. | 710 | * as a bitmask. |
705 | */ | 711 | */ |
706 | rx_status.antenna = | 712 | rx_status.antenna = |
707 | (le16_to_cpu(phy_res->phy_flags) & RX_RES_PHY_FLAGS_ANTENNA_MSK) | 713 | (le16_to_cpu(phy_res->phy_flags) & RX_RES_PHY_FLAGS_ANTENNA_MSK) >> |
708 | >> RX_RES_PHY_FLAGS_ANTENNA_POS; | 714 | RX_RES_PHY_FLAGS_ANTENNA_POS; |
709 | 715 | ||
710 | /* set the preamble flag if appropriate */ | 716 | /* set the preamble flag if appropriate */ |
711 | if (phy_res->phy_flags & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK) | 717 | if (phy_res->phy_flags & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK) |
@@ -719,14 +725,14 @@ void il4965_hdl_rx(struct il_priv *il, | |||
719 | if (rate_n_flags & RATE_MCS_SGI_MSK) | 725 | if (rate_n_flags & RATE_MCS_SGI_MSK) |
720 | rx_status.flag |= RX_FLAG_SHORT_GI; | 726 | rx_status.flag |= RX_FLAG_SHORT_GI; |
721 | 727 | ||
722 | il4965_pass_packet_to_mac80211(il, header, len, ampdu_status, | 728 | il4965_pass_packet_to_mac80211(il, header, len, ampdu_status, rxb, |
723 | rxb, &rx_status); | 729 | &rx_status); |
724 | } | 730 | } |
725 | 731 | ||
726 | /* Cache phy data (Rx signal strength, etc) for HT frame (N_RX_PHY). | 732 | /* Cache phy data (Rx signal strength, etc) for HT frame (N_RX_PHY). |
727 | * This will be used later in il_hdl_rx() for N_RX_MPDU. */ | 733 | * This will be used later in il_hdl_rx() for N_RX_MPDU. */ |
728 | void il4965_hdl_rx_phy(struct il_priv *il, | 734 | void |
729 | struct il_rx_buf *rxb) | 735 | il4965_hdl_rx_phy(struct il_priv *il, struct il_rx_buf *rxb) |
730 | { | 736 | { |
731 | struct il_rx_pkt *pkt = rxb_addr(rxb); | 737 | struct il_rx_pkt *pkt = rxb_addr(rxb); |
732 | il->_4965.last_phy_res_valid = true; | 738 | il->_4965.last_phy_res_valid = true; |
@@ -734,11 +740,10 @@ void il4965_hdl_rx_phy(struct il_priv *il, | |||
734 | sizeof(struct il_rx_phy_res)); | 740 | sizeof(struct il_rx_phy_res)); |
735 | } | 741 | } |
736 | 742 | ||
737 | static int il4965_get_channels_for_scan(struct il_priv *il, | 743 | static int |
738 | struct ieee80211_vif *vif, | 744 | il4965_get_channels_for_scan(struct il_priv *il, struct ieee80211_vif *vif, |
739 | enum ieee80211_band band, | 745 | enum ieee80211_band band, u8 is_active, |
740 | u8 is_active, u8 n_probes, | 746 | u8 n_probes, struct il_scan_channel *scan_ch) |
741 | struct il_scan_channel *scan_ch) | ||
742 | { | 747 | { |
743 | struct ieee80211_channel *chan; | 748 | struct ieee80211_channel *chan; |
744 | const struct ieee80211_supported_band *sband; | 749 | const struct ieee80211_supported_band *sband; |
@@ -769,9 +774,8 @@ static int il4965_get_channels_for_scan(struct il_priv *il, | |||
769 | 774 | ||
770 | ch_info = il_get_channel_info(il, band, channel); | 775 | ch_info = il_get_channel_info(il, band, channel); |
771 | if (!il_is_channel_valid(ch_info)) { | 776 | if (!il_is_channel_valid(ch_info)) { |
772 | D_SCAN( | 777 | D_SCAN("Channel %d is INVALID for this band.\n", |
773 | "Channel %d is INVALID for this band.\n", | 778 | channel); |
774 | channel); | ||
775 | continue; | 779 | continue; |
776 | } | 780 | } |
777 | 781 | ||
@@ -799,12 +803,13 @@ static int il4965_get_channels_for_scan(struct il_priv *il, | |||
799 | else | 803 | else |
800 | scan_ch->tx_gain = ((1 << 5) | (5 << 3)); | 804 | scan_ch->tx_gain = ((1 << 5) | (5 << 3)); |
801 | 805 | ||
802 | D_SCAN("Scanning ch=%d prob=0x%X [%s %d]\n", | 806 | D_SCAN("Scanning ch=%d prob=0x%X [%s %d]\n", channel, |
803 | channel, le32_to_cpu(scan_ch->type), | 807 | le32_to_cpu(scan_ch->type), |
804 | (scan_ch->type & SCAN_CHANNEL_TYPE_ACTIVE) ? | 808 | (scan_ch-> |
805 | "ACTIVE" : "PASSIVE", | 809 | type & SCAN_CHANNEL_TYPE_ACTIVE) ? "ACTIVE" : "PASSIVE", |
806 | (scan_ch->type & SCAN_CHANNEL_TYPE_ACTIVE) ? | 810 | (scan_ch-> |
807 | active_dwell : passive_dwell); | 811 | type & SCAN_CHANNEL_TYPE_ACTIVE) ? active_dwell : |
812 | passive_dwell); | ||
808 | 813 | ||
809 | scan_ch++; | 814 | scan_ch++; |
810 | added++; | 815 | added++; |
@@ -814,12 +819,14 @@ static int il4965_get_channels_for_scan(struct il_priv *il, | |||
814 | return added; | 819 | return added; |
815 | } | 820 | } |
816 | 821 | ||
817 | static inline u32 il4965_ant_idx_to_flags(u8 ant_idx) | 822 | static inline u32 |
823 | il4965_ant_idx_to_flags(u8 ant_idx) | ||
818 | { | 824 | { |
819 | return BIT(ant_idx) << RATE_MCS_ANT_POS; | 825 | return BIT(ant_idx) << RATE_MCS_ANT_POS; |
820 | } | 826 | } |
821 | 827 | ||
822 | int il4965_request_scan(struct il_priv *il, struct ieee80211_vif *vif) | 828 | int |
829 | il4965_request_scan(struct il_priv *il, struct ieee80211_vif *vif) | ||
823 | { | 830 | { |
824 | struct il_host_cmd cmd = { | 831 | struct il_host_cmd cmd = { |
825 | .id = C_SCAN, | 832 | .id = C_SCAN, |
@@ -836,7 +843,7 @@ int il4965_request_scan(struct il_priv *il, struct ieee80211_vif *vif) | |||
836 | u8 rx_ant = il->hw_params.valid_rx_ant; | 843 | u8 rx_ant = il->hw_params.valid_rx_ant; |
837 | u8 rate; | 844 | u8 rate; |
838 | bool is_active = false; | 845 | bool is_active = false; |
839 | int chan_mod; | 846 | int chan_mod; |
840 | u8 active_chains; | 847 | u8 active_chains; |
841 | u8 scan_tx_antennas = il->hw_params.valid_tx_ant; | 848 | u8 scan_tx_antennas = il->hw_params.valid_tx_ant; |
842 | int ret; | 849 | int ret; |
@@ -847,11 +854,11 @@ int il4965_request_scan(struct il_priv *il, struct ieee80211_vif *vif) | |||
847 | ctx = il_rxon_ctx_from_vif(vif); | 854 | ctx = il_rxon_ctx_from_vif(vif); |
848 | 855 | ||
849 | if (!il->scan_cmd) { | 856 | if (!il->scan_cmd) { |
850 | il->scan_cmd = kmalloc(sizeof(struct il_scan_cmd) + | 857 | il->scan_cmd = |
851 | IL_MAX_SCAN_SIZE, GFP_KERNEL); | 858 | kmalloc(sizeof(struct il_scan_cmd) + IL_MAX_SCAN_SIZE, |
859 | GFP_KERNEL); | ||
852 | if (!il->scan_cmd) { | 860 | if (!il->scan_cmd) { |
853 | D_SCAN( | 861 | D_SCAN("fail to allocate memory for scan\n"); |
854 | "fail to allocate memory for scan\n"); | ||
855 | return -ENOMEM; | 862 | return -ENOMEM; |
856 | } | 863 | } |
857 | } | 864 | } |
@@ -876,11 +883,11 @@ int il4965_request_scan(struct il_priv *il, struct ieee80211_vif *vif) | |||
876 | interval = suspend_time; | 883 | interval = suspend_time; |
877 | 884 | ||
878 | extra = (suspend_time / interval) << 22; | 885 | extra = (suspend_time / interval) << 22; |
879 | scan_suspend_time = (extra | | 886 | scan_suspend_time = |
880 | ((suspend_time % interval) * 1024)); | 887 | (extra | ((suspend_time % interval) * 1024)); |
881 | scan->suspend_time = cpu_to_le32(scan_suspend_time); | 888 | scan->suspend_time = cpu_to_le32(scan_suspend_time); |
882 | D_SCAN("suspend_time 0x%X beacon interval %d\n", | 889 | D_SCAN("suspend_time 0x%X beacon interval %d\n", |
883 | scan_suspend_time, interval); | 890 | scan_suspend_time, interval); |
884 | } | 891 | } |
885 | 892 | ||
886 | if (il->scan_request->n_ssids) { | 893 | if (il->scan_request->n_ssids) { |
@@ -892,7 +899,7 @@ int il4965_request_scan(struct il_priv *il, struct ieee80211_vif *vif) | |||
892 | continue; | 899 | continue; |
893 | scan->direct_scan[p].id = WLAN_EID_SSID; | 900 | scan->direct_scan[p].id = WLAN_EID_SSID; |
894 | scan->direct_scan[p].len = | 901 | scan->direct_scan[p].len = |
895 | il->scan_request->ssids[i].ssid_len; | 902 | il->scan_request->ssids[i].ssid_len; |
896 | memcpy(scan->direct_scan[p].ssid, | 903 | memcpy(scan->direct_scan[p].ssid, |
897 | il->scan_request->ssids[i].ssid, | 904 | il->scan_request->ssids[i].ssid, |
898 | il->scan_request->ssids[i].ssid_len); | 905 | il->scan_request->ssids[i].ssid_len); |
@@ -910,10 +917,10 @@ int il4965_request_scan(struct il_priv *il, struct ieee80211_vif *vif) | |||
910 | switch (il->scan_band) { | 917 | switch (il->scan_band) { |
911 | case IEEE80211_BAND_2GHZ: | 918 | case IEEE80211_BAND_2GHZ: |
912 | scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK; | 919 | scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK; |
913 | chan_mod = le32_to_cpu( | 920 | chan_mod = |
914 | il->ctx.active.flags & | 921 | le32_to_cpu(il->ctx.active. |
915 | RXON_FLG_CHANNEL_MODE_MSK) | 922 | flags & RXON_FLG_CHANNEL_MODE_MSK) >> |
916 | >> RXON_FLG_CHANNEL_MODE_POS; | 923 | RXON_FLG_CHANNEL_MODE_POS; |
917 | if (chan_mod == CHANNEL_MODE_PURE_40) { | 924 | if (chan_mod == CHANNEL_MODE_PURE_40) { |
918 | rate = RATE_6M_PLCP; | 925 | rate = RATE_6M_PLCP; |
919 | } else { | 926 | } else { |
@@ -946,30 +953,30 @@ int il4965_request_scan(struct il_priv *il, struct ieee80211_vif *vif) | |||
946 | * the aforementioned issue. Thus use IL_GOOD_CRC_TH_NEVER | 953 | * the aforementioned issue. Thus use IL_GOOD_CRC_TH_NEVER |
947 | * here instead of IL_GOOD_CRC_TH_DISABLED. | 954 | * here instead of IL_GOOD_CRC_TH_DISABLED. |
948 | */ | 955 | */ |
949 | scan->good_CRC_th = is_active ? IL_GOOD_CRC_TH_DEFAULT : | 956 | scan->good_CRC_th = |
950 | IL_GOOD_CRC_TH_NEVER; | 957 | is_active ? IL_GOOD_CRC_TH_DEFAULT : IL_GOOD_CRC_TH_NEVER; |
951 | 958 | ||
952 | band = il->scan_band; | 959 | band = il->scan_band; |
953 | 960 | ||
954 | if (il->cfg->scan_rx_antennas[band]) | 961 | if (il->cfg->scan_rx_antennas[band]) |
955 | rx_ant = il->cfg->scan_rx_antennas[band]; | 962 | rx_ant = il->cfg->scan_rx_antennas[band]; |
956 | 963 | ||
957 | il->scan_tx_ant[band] = il4965_toggle_tx_ant(il, | 964 | il->scan_tx_ant[band] = |
958 | il->scan_tx_ant[band], | 965 | il4965_toggle_tx_ant(il, il->scan_tx_ant[band], scan_tx_antennas); |
959 | scan_tx_antennas); | ||
960 | rate_flags |= il4965_ant_idx_to_flags(il->scan_tx_ant[band]); | 966 | rate_flags |= il4965_ant_idx_to_flags(il->scan_tx_ant[band]); |
961 | scan->tx_cmd.rate_n_flags = il4965_hw_set_rate_n_flags(rate, rate_flags); | 967 | scan->tx_cmd.rate_n_flags = |
968 | il4965_hw_set_rate_n_flags(rate, rate_flags); | ||
962 | 969 | ||
963 | /* In power save mode use one chain, otherwise use all chains */ | 970 | /* In power save mode use one chain, otherwise use all chains */ |
964 | if (test_bit(S_POWER_PMI, &il->status)) { | 971 | if (test_bit(S_POWER_PMI, &il->status)) { |
965 | /* rx_ant has been set to all valid chains previously */ | 972 | /* rx_ant has been set to all valid chains previously */ |
966 | active_chains = rx_ant & | 973 | active_chains = |
967 | ((u8)(il->chain_noise_data.active_chains)); | 974 | rx_ant & ((u8) (il->chain_noise_data.active_chains)); |
968 | if (!active_chains) | 975 | if (!active_chains) |
969 | active_chains = rx_ant; | 976 | active_chains = rx_ant; |
970 | 977 | ||
971 | D_SCAN("chain_noise_data.active_chains: %u\n", | 978 | D_SCAN("chain_noise_data.active_chains: %u\n", |
972 | il->chain_noise_data.active_chains); | 979 | il->chain_noise_data.active_chains); |
973 | 980 | ||
974 | rx_ant = il4965_first_antenna(active_chains); | 981 | rx_ant = il4965_first_antenna(active_chains); |
975 | } | 982 | } |
@@ -981,26 +988,26 @@ int il4965_request_scan(struct il_priv *il, struct ieee80211_vif *vif) | |||
981 | rx_chain |= 0x1 << RXON_RX_CHAIN_DRIVER_FORCE_POS; | 988 | rx_chain |= 0x1 << RXON_RX_CHAIN_DRIVER_FORCE_POS; |
982 | scan->rx_chain = cpu_to_le16(rx_chain); | 989 | scan->rx_chain = cpu_to_le16(rx_chain); |
983 | 990 | ||
984 | cmd_len = il_fill_probe_req(il, | 991 | cmd_len = |
985 | (struct ieee80211_mgmt *)scan->data, | 992 | il_fill_probe_req(il, (struct ieee80211_mgmt *)scan->data, |
986 | vif->addr, | 993 | vif->addr, il->scan_request->ie, |
987 | il->scan_request->ie, | 994 | il->scan_request->ie_len, |
988 | il->scan_request->ie_len, | 995 | IL_MAX_SCAN_SIZE - sizeof(*scan)); |
989 | IL_MAX_SCAN_SIZE - sizeof(*scan)); | ||
990 | scan->tx_cmd.len = cpu_to_le16(cmd_len); | 996 | scan->tx_cmd.len = cpu_to_le16(cmd_len); |
991 | 997 | ||
992 | scan->filter_flags |= (RXON_FILTER_ACCEPT_GRP_MSK | | 998 | scan->filter_flags |= |
993 | RXON_FILTER_BCON_AWARE_MSK); | 999 | (RXON_FILTER_ACCEPT_GRP_MSK | RXON_FILTER_BCON_AWARE_MSK); |
994 | 1000 | ||
995 | scan->channel_count = il4965_get_channels_for_scan(il, vif, band, | 1001 | scan->channel_count = |
996 | is_active, n_probes, | 1002 | il4965_get_channels_for_scan(il, vif, band, is_active, n_probes, |
997 | (void *)&scan->data[cmd_len]); | 1003 | (void *)&scan->data[cmd_len]); |
998 | if (scan->channel_count == 0) { | 1004 | if (scan->channel_count == 0) { |
999 | D_SCAN("channel count %d\n", scan->channel_count); | 1005 | D_SCAN("channel count %d\n", scan->channel_count); |
1000 | return -EIO; | 1006 | return -EIO; |
1001 | } | 1007 | } |
1002 | 1008 | ||
1003 | cmd.len += le16_to_cpu(scan->tx_cmd.len) + | 1009 | cmd.len += |
1010 | le16_to_cpu(scan->tx_cmd.len) + | ||
1004 | scan->channel_count * sizeof(struct il_scan_channel); | 1011 | scan->channel_count * sizeof(struct il_scan_channel); |
1005 | cmd.data = scan; | 1012 | cmd.data = scan; |
1006 | scan->len = cpu_to_le16(cmd.len); | 1013 | scan->len = cpu_to_le16(cmd.len); |
@@ -1014,8 +1021,9 @@ int il4965_request_scan(struct il_priv *il, struct ieee80211_vif *vif) | |||
1014 | return ret; | 1021 | return ret; |
1015 | } | 1022 | } |
1016 | 1023 | ||
1017 | int il4965_manage_ibss_station(struct il_priv *il, | 1024 | int |
1018 | struct ieee80211_vif *vif, bool add) | 1025 | il4965_manage_ibss_station(struct il_priv *il, struct ieee80211_vif *vif, |
1026 | bool add) | ||
1019 | { | 1027 | { |
1020 | struct il_vif_priv *vif_priv = (void *)vif->drv_priv; | 1028 | struct il_vif_priv *vif_priv = (void *)vif->drv_priv; |
1021 | 1029 | ||
@@ -1024,11 +1032,11 @@ int il4965_manage_ibss_station(struct il_priv *il, | |||
1024 | vif->bss_conf.bssid, | 1032 | vif->bss_conf.bssid, |
1025 | &vif_priv->ibss_bssid_sta_id); | 1033 | &vif_priv->ibss_bssid_sta_id); |
1026 | return il_remove_station(il, vif_priv->ibss_bssid_sta_id, | 1034 | return il_remove_station(il, vif_priv->ibss_bssid_sta_id, |
1027 | vif->bss_conf.bssid); | 1035 | vif->bss_conf.bssid); |
1028 | } | 1036 | } |
1029 | 1037 | ||
1030 | void il4965_free_tfds_in_queue(struct il_priv *il, | 1038 | void |
1031 | int sta_id, int tid, int freed) | 1039 | il4965_free_tfds_in_queue(struct il_priv *il, int sta_id, int tid, int freed) |
1032 | { | 1040 | { |
1033 | lockdep_assert_held(&il->sta_lock); | 1041 | lockdep_assert_held(&il->sta_lock); |
1034 | 1042 | ||
@@ -1036,18 +1044,18 @@ void il4965_free_tfds_in_queue(struct il_priv *il, | |||
1036 | il->stations[sta_id].tid[tid].tfds_in_queue -= freed; | 1044 | il->stations[sta_id].tid[tid].tfds_in_queue -= freed; |
1037 | else { | 1045 | else { |
1038 | D_TX("free more than tfds_in_queue (%u:%d)\n", | 1046 | D_TX("free more than tfds_in_queue (%u:%d)\n", |
1039 | il->stations[sta_id].tid[tid].tfds_in_queue, | 1047 | il->stations[sta_id].tid[tid].tfds_in_queue, freed); |
1040 | freed); | ||
1041 | il->stations[sta_id].tid[tid].tfds_in_queue = 0; | 1048 | il->stations[sta_id].tid[tid].tfds_in_queue = 0; |
1042 | } | 1049 | } |
1043 | } | 1050 | } |
1044 | 1051 | ||
1045 | #define IL_TX_QUEUE_MSK 0xfffff | 1052 | #define IL_TX_QUEUE_MSK 0xfffff |
1046 | 1053 | ||
1047 | static bool il4965_is_single_rx_stream(struct il_priv *il) | 1054 | static bool |
1055 | il4965_is_single_rx_stream(struct il_priv *il) | ||
1048 | { | 1056 | { |
1049 | return il->current_ht_config.smps == IEEE80211_SMPS_STATIC || | 1057 | return il->current_ht_config.smps == IEEE80211_SMPS_STATIC || |
1050 | il->current_ht_config.single_chain_sufficient; | 1058 | il->current_ht_config.single_chain_sufficient; |
1051 | } | 1059 | } |
1052 | 1060 | ||
1053 | #define IL_NUM_RX_CHAINS_MULTIPLE 3 | 1061 | #define IL_NUM_RX_CHAINS_MULTIPLE 3 |
@@ -1065,7 +1073,8 @@ static bool il4965_is_single_rx_stream(struct il_priv *il) | |||
1065 | * MIMO (dual stream) requires at least 2, but works better with 3. | 1073 | * MIMO (dual stream) requires at least 2, but works better with 3. |
1066 | * This does not determine *which* chains to use, just how many. | 1074 | * This does not determine *which* chains to use, just how many. |
1067 | */ | 1075 | */ |
1068 | static int il4965_get_active_rx_chain_count(struct il_priv *il) | 1076 | static int |
1077 | il4965_get_active_rx_chain_count(struct il_priv *il) | ||
1069 | { | 1078 | { |
1070 | /* # of Rx chains to use when expecting MIMO. */ | 1079 | /* # of Rx chains to use when expecting MIMO. */ |
1071 | if (il4965_is_single_rx_stream(il)) | 1080 | if (il4965_is_single_rx_stream(il)) |
@@ -1089,14 +1098,14 @@ il4965_get_idle_rx_chain_count(struct il_priv *il, int active_cnt) | |||
1089 | case IEEE80211_SMPS_OFF: | 1098 | case IEEE80211_SMPS_OFF: |
1090 | return active_cnt; | 1099 | return active_cnt; |
1091 | default: | 1100 | default: |
1092 | WARN(1, "invalid SMPS mode %d", | 1101 | WARN(1, "invalid SMPS mode %d", il->current_ht_config.smps); |
1093 | il->current_ht_config.smps); | ||
1094 | return active_cnt; | 1102 | return active_cnt; |
1095 | } | 1103 | } |
1096 | } | 1104 | } |
1097 | 1105 | ||
1098 | /* up to 4 chains */ | 1106 | /* up to 4 chains */ |
1099 | static u8 il4965_count_chain_bitmap(u32 chain_bitmap) | 1107 | static u8 |
1108 | il4965_count_chain_bitmap(u32 chain_bitmap) | ||
1100 | { | 1109 | { |
1101 | u8 res; | 1110 | u8 res; |
1102 | res = (chain_bitmap & BIT(0)) >> 0; | 1111 | res = (chain_bitmap & BIT(0)) >> 0; |
@@ -1112,7 +1121,8 @@ static u8 il4965_count_chain_bitmap(u32 chain_bitmap) | |||
1112 | * Selects how many and which Rx receivers/antennas/chains to use. | 1121 | * Selects how many and which Rx receivers/antennas/chains to use. |
1113 | * This should not be used for scan command ... it puts data in wrong place. | 1122 | * This should not be used for scan command ... it puts data in wrong place. |
1114 | */ | 1123 | */ |
1115 | void il4965_set_rxon_chain(struct il_priv *il, struct il_rxon_context *ctx) | 1124 | void |
1125 | il4965_set_rxon_chain(struct il_priv *il, struct il_rxon_context *ctx) | ||
1116 | { | 1126 | { |
1117 | bool is_single = il4965_is_single_rx_stream(il); | 1127 | bool is_single = il4965_is_single_rx_stream(il); |
1118 | bool is_cam = !test_bit(S_POWER_PMI, &il->status); | 1128 | bool is_cam = !test_bit(S_POWER_PMI, &il->status); |
@@ -1135,7 +1145,6 @@ void il4965_set_rxon_chain(struct il_priv *il, struct il_rxon_context *ctx) | |||
1135 | active_rx_cnt = il4965_get_active_rx_chain_count(il); | 1145 | active_rx_cnt = il4965_get_active_rx_chain_count(il); |
1136 | idle_rx_cnt = il4965_get_idle_rx_chain_count(il, active_rx_cnt); | 1146 | idle_rx_cnt = il4965_get_idle_rx_chain_count(il, active_rx_cnt); |
1137 | 1147 | ||
1138 | |||
1139 | /* correct rx chain count according hw settings | 1148 | /* correct rx chain count according hw settings |
1140 | * and chain noise calibration | 1149 | * and chain noise calibration |
1141 | */ | 1150 | */ |
@@ -1147,7 +1156,7 @@ void il4965_set_rxon_chain(struct il_priv *il, struct il_rxon_context *ctx) | |||
1147 | idle_rx_cnt = valid_rx_cnt; | 1156 | idle_rx_cnt = valid_rx_cnt; |
1148 | 1157 | ||
1149 | rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS; | 1158 | rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS; |
1150 | rx_chain |= idle_rx_cnt << RXON_RX_CHAIN_CNT_POS; | 1159 | rx_chain |= idle_rx_cnt << RXON_RX_CHAIN_CNT_POS; |
1151 | 1160 | ||
1152 | ctx->staging.rx_chain = cpu_to_le16(rx_chain); | 1161 | ctx->staging.rx_chain = cpu_to_le16(rx_chain); |
1153 | 1162 | ||
@@ -1156,45 +1165,47 @@ void il4965_set_rxon_chain(struct il_priv *il, struct il_rxon_context *ctx) | |||
1156 | else | 1165 | else |
1157 | ctx->staging.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK; | 1166 | ctx->staging.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK; |
1158 | 1167 | ||
1159 | D_ASSOC("rx_chain=0x%X active=%d idle=%d\n", | 1168 | D_ASSOC("rx_chain=0x%X active=%d idle=%d\n", ctx->staging.rx_chain, |
1160 | ctx->staging.rx_chain, | 1169 | active_rx_cnt, idle_rx_cnt); |
1161 | active_rx_cnt, idle_rx_cnt); | ||
1162 | 1170 | ||
1163 | WARN_ON(active_rx_cnt == 0 || idle_rx_cnt == 0 || | 1171 | WARN_ON(active_rx_cnt == 0 || idle_rx_cnt == 0 || |
1164 | active_rx_cnt < idle_rx_cnt); | 1172 | active_rx_cnt < idle_rx_cnt); |
1165 | } | 1173 | } |
1166 | 1174 | ||
1167 | u8 il4965_toggle_tx_ant(struct il_priv *il, u8 ant, u8 valid) | 1175 | u8 |
1176 | il4965_toggle_tx_ant(struct il_priv *il, u8 ant, u8 valid) | ||
1168 | { | 1177 | { |
1169 | int i; | 1178 | int i; |
1170 | u8 ind = ant; | 1179 | u8 ind = ant; |
1171 | 1180 | ||
1172 | for (i = 0; i < RATE_ANT_NUM - 1; i++) { | 1181 | for (i = 0; i < RATE_ANT_NUM - 1; i++) { |
1173 | ind = (ind + 1) < RATE_ANT_NUM ? ind + 1 : 0; | 1182 | ind = (ind + 1) < RATE_ANT_NUM ? ind + 1 : 0; |
1174 | if (valid & BIT(ind)) | 1183 | if (valid & BIT(ind)) |
1175 | return ind; | 1184 | return ind; |
1176 | } | 1185 | } |
1177 | return ant; | 1186 | return ant; |
1178 | } | 1187 | } |
1179 | 1188 | ||
1180 | static const char *il4965_get_fh_string(int cmd) | 1189 | static const char * |
1190 | il4965_get_fh_string(int cmd) | ||
1181 | { | 1191 | { |
1182 | switch (cmd) { | 1192 | switch (cmd) { |
1183 | IL_CMD(FH49_RSCSR_CHNL0_STTS_WPTR_REG); | 1193 | IL_CMD(FH49_RSCSR_CHNL0_STTS_WPTR_REG); |
1184 | IL_CMD(FH49_RSCSR_CHNL0_RBDCB_BASE_REG); | 1194 | IL_CMD(FH49_RSCSR_CHNL0_RBDCB_BASE_REG); |
1185 | IL_CMD(FH49_RSCSR_CHNL0_WPTR); | 1195 | IL_CMD(FH49_RSCSR_CHNL0_WPTR); |
1186 | IL_CMD(FH49_MEM_RCSR_CHNL0_CONFIG_REG); | 1196 | IL_CMD(FH49_MEM_RCSR_CHNL0_CONFIG_REG); |
1187 | IL_CMD(FH49_MEM_RSSR_SHARED_CTRL_REG); | 1197 | IL_CMD(FH49_MEM_RSSR_SHARED_CTRL_REG); |
1188 | IL_CMD(FH49_MEM_RSSR_RX_STATUS_REG); | 1198 | IL_CMD(FH49_MEM_RSSR_RX_STATUS_REG); |
1189 | IL_CMD(FH49_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV); | 1199 | IL_CMD(FH49_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV); |
1190 | IL_CMD(FH49_TSSR_TX_STATUS_REG); | 1200 | IL_CMD(FH49_TSSR_TX_STATUS_REG); |
1191 | IL_CMD(FH49_TSSR_TX_ERROR_REG); | 1201 | IL_CMD(FH49_TSSR_TX_ERROR_REG); |
1192 | default: | 1202 | default: |
1193 | return "UNKNOWN"; | 1203 | return "UNKNOWN"; |
1194 | } | 1204 | } |
1195 | } | 1205 | } |
1196 | 1206 | ||
1197 | int il4965_dump_fh(struct il_priv *il, char **buf, bool display) | 1207 | int |
1208 | il4965_dump_fh(struct il_priv *il, char **buf, bool display) | ||
1198 | { | 1209 | { |
1199 | int i; | 1210 | int i; |
1200 | #ifdef CONFIG_IWLEGACY_DEBUG | 1211 | #ifdef CONFIG_IWLEGACY_DEBUG |
@@ -1218,28 +1229,29 @@ int il4965_dump_fh(struct il_priv *il, char **buf, bool display) | |||
1218 | *buf = kmalloc(bufsz, GFP_KERNEL); | 1229 | *buf = kmalloc(bufsz, GFP_KERNEL); |
1219 | if (!*buf) | 1230 | if (!*buf) |
1220 | return -ENOMEM; | 1231 | return -ENOMEM; |
1221 | pos += scnprintf(*buf + pos, bufsz - pos, | 1232 | pos += |
1222 | "FH register values:\n"); | 1233 | scnprintf(*buf + pos, bufsz - pos, "FH register values:\n"); |
1223 | for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) { | 1234 | for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) { |
1224 | pos += scnprintf(*buf + pos, bufsz - pos, | 1235 | pos += |
1225 | " %34s: 0X%08x\n", | 1236 | scnprintf(*buf + pos, bufsz - pos, |
1226 | il4965_get_fh_string(fh_tbl[i]), | 1237 | " %34s: 0X%08x\n", |
1227 | il_rd(il, fh_tbl[i])); | 1238 | il4965_get_fh_string(fh_tbl[i]), il_rd(il, |
1239 | fh_tbl | ||
1240 | [i])); | ||
1228 | } | 1241 | } |
1229 | return pos; | 1242 | return pos; |
1230 | } | 1243 | } |
1231 | #endif | 1244 | #endif |
1232 | IL_ERR("FH register values:\n"); | 1245 | IL_ERR("FH register values:\n"); |
1233 | for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) { | 1246 | for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) { |
1234 | IL_ERR(" %34s: 0X%08x\n", | 1247 | IL_ERR(" %34s: 0X%08x\n", il4965_get_fh_string(fh_tbl[i]), |
1235 | il4965_get_fh_string(fh_tbl[i]), | 1248 | il_rd(il, fh_tbl[i])); |
1236 | il_rd(il, fh_tbl[i])); | ||
1237 | } | 1249 | } |
1238 | return 0; | 1250 | return 0; |
1239 | } | 1251 | } |
1240 | void il4965_hdl_missed_beacon(struct il_priv *il, | ||
1241 | struct il_rx_buf *rxb) | ||
1242 | 1252 | ||
1253 | void | ||
1254 | il4965_hdl_missed_beacon(struct il_priv *il, struct il_rx_buf *rxb) | ||
1243 | { | 1255 | { |
1244 | struct il_rx_pkt *pkt = rxb_addr(rxb); | 1256 | struct il_rx_pkt *pkt = rxb_addr(rxb); |
1245 | struct il_missed_beacon_notif *missed_beacon; | 1257 | struct il_missed_beacon_notif *missed_beacon; |
@@ -1247,12 +1259,11 @@ void il4965_hdl_missed_beacon(struct il_priv *il, | |||
1247 | missed_beacon = &pkt->u.missed_beacon; | 1259 | missed_beacon = &pkt->u.missed_beacon; |
1248 | if (le32_to_cpu(missed_beacon->consecutive_missed_beacons) > | 1260 | if (le32_to_cpu(missed_beacon->consecutive_missed_beacons) > |
1249 | il->missed_beacon_threshold) { | 1261 | il->missed_beacon_threshold) { |
1250 | D_CALIB( | 1262 | D_CALIB("missed bcn cnsq %d totl %d rcd %d expctd %d\n", |
1251 | "missed bcn cnsq %d totl %d rcd %d expctd %d\n", | 1263 | le32_to_cpu(missed_beacon->consecutive_missed_beacons), |
1252 | le32_to_cpu(missed_beacon->consecutive_missed_beacons), | 1264 | le32_to_cpu(missed_beacon->total_missed_becons), |
1253 | le32_to_cpu(missed_beacon->total_missed_becons), | 1265 | le32_to_cpu(missed_beacon->num_recvd_beacons), |
1254 | le32_to_cpu(missed_beacon->num_recvd_beacons), | 1266 | le32_to_cpu(missed_beacon->num_expected_beacons)); |
1255 | le32_to_cpu(missed_beacon->num_expected_beacons)); | ||
1256 | if (!test_bit(S_SCANNING, &il->status)) | 1267 | if (!test_bit(S_SCANNING, &il->status)) |
1257 | il4965_init_sensitivity(il); | 1268 | il4965_init_sensitivity(il); |
1258 | } | 1269 | } |
@@ -1261,7 +1272,8 @@ void il4965_hdl_missed_beacon(struct il_priv *il, | |||
1261 | /* Calculate noise level, based on measurements during network silence just | 1272 | /* Calculate noise level, based on measurements during network silence just |
1262 | * before arriving beacon. This measurement can be done only if we know | 1273 | * before arriving beacon. This measurement can be done only if we know |
1263 | * exactly when to expect beacons, therefore only when we're associated. */ | 1274 | * exactly when to expect beacons, therefore only when we're associated. */ |
1264 | static void il4965_rx_calc_noise(struct il_priv *il) | 1275 | static void |
1276 | il4965_rx_calc_noise(struct il_priv *il) | ||
1265 | { | 1277 | { |
1266 | struct stats_rx_non_phy *rx_info; | 1278 | struct stats_rx_non_phy *rx_info; |
1267 | int num_active_rx = 0; | 1279 | int num_active_rx = 0; |
@@ -1271,11 +1283,11 @@ static void il4965_rx_calc_noise(struct il_priv *il) | |||
1271 | 1283 | ||
1272 | rx_info = &(il->_4965.stats.rx.general); | 1284 | rx_info = &(il->_4965.stats.rx.general); |
1273 | bcn_silence_a = | 1285 | bcn_silence_a = |
1274 | le32_to_cpu(rx_info->beacon_silence_rssi_a) & IN_BAND_FILTER; | 1286 | le32_to_cpu(rx_info->beacon_silence_rssi_a) & IN_BAND_FILTER; |
1275 | bcn_silence_b = | 1287 | bcn_silence_b = |
1276 | le32_to_cpu(rx_info->beacon_silence_rssi_b) & IN_BAND_FILTER; | 1288 | le32_to_cpu(rx_info->beacon_silence_rssi_b) & IN_BAND_FILTER; |
1277 | bcn_silence_c = | 1289 | bcn_silence_c = |
1278 | le32_to_cpu(rx_info->beacon_silence_rssi_c) & IN_BAND_FILTER; | 1290 | le32_to_cpu(rx_info->beacon_silence_rssi_c) & IN_BAND_FILTER; |
1279 | 1291 | ||
1280 | if (bcn_silence_a) { | 1292 | if (bcn_silence_a) { |
1281 | total_silence += bcn_silence_a; | 1293 | total_silence += bcn_silence_a; |
@@ -1296,9 +1308,8 @@ static void il4965_rx_calc_noise(struct il_priv *il) | |||
1296 | else | 1308 | else |
1297 | last_rx_noise = IL_NOISE_MEAS_NOT_AVAILABLE; | 1309 | last_rx_noise = IL_NOISE_MEAS_NOT_AVAILABLE; |
1298 | 1310 | ||
1299 | D_CALIB("inband silence a %u, b %u, c %u, dBm %d\n", | 1311 | D_CALIB("inband silence a %u, b %u, c %u, dBm %d\n", bcn_silence_a, |
1300 | bcn_silence_a, bcn_silence_b, bcn_silence_c, | 1312 | bcn_silence_b, bcn_silence_c, last_rx_noise); |
1301 | last_rx_noise); | ||
1302 | } | 1313 | } |
1303 | 1314 | ||
1304 | #ifdef CONFIG_IWLEGACY_DEBUGFS | 1315 | #ifdef CONFIG_IWLEGACY_DEBUGFS |
@@ -1307,8 +1318,8 @@ static void il4965_rx_calc_noise(struct il_priv *il) | |||
1307 | * FIXME: This function is for debugging, do not deal with | 1318 | * FIXME: This function is for debugging, do not deal with |
1308 | * the case of counters roll-over. | 1319 | * the case of counters roll-over. |
1309 | */ | 1320 | */ |
1310 | static void il4965_accumulative_stats(struct il_priv *il, | 1321 | static void |
1311 | __le32 *stats) | 1322 | il4965_accumulative_stats(struct il_priv *il, __le32 * stats) |
1312 | { | 1323 | { |
1313 | int i, size; | 1324 | int i, size; |
1314 | __le32 *prev_stats; | 1325 | __le32 *prev_stats; |
@@ -1317,22 +1328,23 @@ static void il4965_accumulative_stats(struct il_priv *il, | |||
1317 | struct stats_general_common *general, *accum_general; | 1328 | struct stats_general_common *general, *accum_general; |
1318 | struct stats_tx *tx, *accum_tx; | 1329 | struct stats_tx *tx, *accum_tx; |
1319 | 1330 | ||
1320 | prev_stats = (__le32 *)&il->_4965.stats; | 1331 | prev_stats = (__le32 *) & il->_4965.stats; |
1321 | accum_stats = (u32 *)&il->_4965.accum_stats; | 1332 | accum_stats = (u32 *) & il->_4965.accum_stats; |
1322 | size = sizeof(struct il_notif_stats); | 1333 | size = sizeof(struct il_notif_stats); |
1323 | general = &il->_4965.stats.general.common; | 1334 | general = &il->_4965.stats.general.common; |
1324 | accum_general = &il->_4965.accum_stats.general.common; | 1335 | accum_general = &il->_4965.accum_stats.general.common; |
1325 | tx = &il->_4965.stats.tx; | 1336 | tx = &il->_4965.stats.tx; |
1326 | accum_tx = &il->_4965.accum_stats.tx; | 1337 | accum_tx = &il->_4965.accum_stats.tx; |
1327 | delta = (u32 *)&il->_4965.delta_stats; | 1338 | delta = (u32 *) & il->_4965.delta_stats; |
1328 | max_delta = (u32 *)&il->_4965.max_delta; | 1339 | max_delta = (u32 *) & il->_4965.max_delta; |
1329 | 1340 | ||
1330 | for (i = sizeof(__le32); i < size; | 1341 | for (i = sizeof(__le32); i < size; |
1331 | i += sizeof(__le32), stats++, prev_stats++, delta++, | 1342 | i += |
1332 | max_delta++, accum_stats++) { | 1343 | sizeof(__le32), stats++, prev_stats++, delta++, max_delta++, |
1344 | accum_stats++) { | ||
1333 | if (le32_to_cpu(*stats) > le32_to_cpu(*prev_stats)) { | 1345 | if (le32_to_cpu(*stats) > le32_to_cpu(*prev_stats)) { |
1334 | *delta = (le32_to_cpu(*stats) - | 1346 | *delta = |
1335 | le32_to_cpu(*prev_stats)); | 1347 | (le32_to_cpu(*stats) - le32_to_cpu(*prev_stats)); |
1336 | *accum_stats += *delta; | 1348 | *accum_stats += *delta; |
1337 | if (*delta > *max_delta) | 1349 | if (*delta > *max_delta) |
1338 | *max_delta = *delta; | 1350 | *max_delta = *delta; |
@@ -1347,31 +1359,27 @@ static void il4965_accumulative_stats(struct il_priv *il, | |||
1347 | 1359 | ||
1348 | #define REG_RECALIB_PERIOD (60) | 1360 | #define REG_RECALIB_PERIOD (60) |
1349 | 1361 | ||
1350 | void il4965_hdl_stats(struct il_priv *il, | 1362 | void |
1351 | struct il_rx_buf *rxb) | 1363 | il4965_hdl_stats(struct il_priv *il, struct il_rx_buf *rxb) |
1352 | { | 1364 | { |
1353 | int change; | 1365 | int change; |
1354 | struct il_rx_pkt *pkt = rxb_addr(rxb); | 1366 | struct il_rx_pkt *pkt = rxb_addr(rxb); |
1355 | 1367 | ||
1356 | D_RX( | 1368 | D_RX("Statistics notification received (%d vs %d).\n", |
1357 | "Statistics notification received (%d vs %d).\n", | 1369 | (int)sizeof(struct il_notif_stats), |
1358 | (int)sizeof(struct il_notif_stats), | 1370 | le32_to_cpu(pkt->len_n_flags) & IL_RX_FRAME_SIZE_MSK); |
1359 | le32_to_cpu(pkt->len_n_flags) & | 1371 | |
1360 | IL_RX_FRAME_SIZE_MSK); | 1372 | change = |
1361 | 1373 | ((il->_4965.stats.general.common.temperature != | |
1362 | change = ((il->_4965.stats.general.common.temperature != | 1374 | pkt->u.stats.general.common.temperature) || |
1363 | pkt->u.stats.general.common.temperature) || | 1375 | ((il->_4965.stats.flag & STATS_REPLY_FLG_HT40_MODE_MSK) != |
1364 | ((il->_4965.stats.flag & | 1376 | (pkt->u.stats.flag & STATS_REPLY_FLG_HT40_MODE_MSK))); |
1365 | STATS_REPLY_FLG_HT40_MODE_MSK) != | ||
1366 | (pkt->u.stats.flag & | ||
1367 | STATS_REPLY_FLG_HT40_MODE_MSK))); | ||
1368 | #ifdef CONFIG_IWLEGACY_DEBUGFS | 1377 | #ifdef CONFIG_IWLEGACY_DEBUGFS |
1369 | il4965_accumulative_stats(il, (__le32 *)&pkt->u.stats); | 1378 | il4965_accumulative_stats(il, (__le32 *) & pkt->u.stats); |
1370 | #endif | 1379 | #endif |
1371 | 1380 | ||
1372 | /* TODO: reading some of stats is unneeded */ | 1381 | /* TODO: reading some of stats is unneeded */ |
1373 | memcpy(&il->_4965.stats, &pkt->u.stats, | 1382 | memcpy(&il->_4965.stats, &pkt->u.stats, sizeof(il->_4965.stats)); |
1374 | sizeof(il->_4965.stats)); | ||
1375 | 1383 | ||
1376 | set_bit(S_STATS, &il->status); | 1384 | set_bit(S_STATS, &il->status); |
1377 | 1385 | ||
@@ -1379,8 +1387,8 @@ void il4965_hdl_stats(struct il_priv *il, | |||
1379 | * REG_RECALIB_PERIOD seconds to ensure we get a | 1387 | * REG_RECALIB_PERIOD seconds to ensure we get a |
1380 | * thermal update even if the uCode doesn't give | 1388 | * thermal update even if the uCode doesn't give |
1381 | * us one */ | 1389 | * us one */ |
1382 | mod_timer(&il->stats_periodic, jiffies + | 1390 | mod_timer(&il->stats_periodic, |
1383 | msecs_to_jiffies(REG_RECALIB_PERIOD * 1000)); | 1391 | jiffies + msecs_to_jiffies(REG_RECALIB_PERIOD * 1000)); |
1384 | 1392 | ||
1385 | if (unlikely(!test_bit(S_SCANNING, &il->status)) && | 1393 | if (unlikely(!test_bit(S_SCANNING, &il->status)) && |
1386 | (pkt->hdr.cmd == N_STATS)) { | 1394 | (pkt->hdr.cmd == N_STATS)) { |
@@ -1391,19 +1399,18 @@ void il4965_hdl_stats(struct il_priv *il, | |||
1391 | il->cfg->ops->lib->temp_ops.temperature(il); | 1399 | il->cfg->ops->lib->temp_ops.temperature(il); |
1392 | } | 1400 | } |
1393 | 1401 | ||
1394 | void il4965_hdl_c_stats(struct il_priv *il, | 1402 | void |
1395 | struct il_rx_buf *rxb) | 1403 | il4965_hdl_c_stats(struct il_priv *il, struct il_rx_buf *rxb) |
1396 | { | 1404 | { |
1397 | struct il_rx_pkt *pkt = rxb_addr(rxb); | 1405 | struct il_rx_pkt *pkt = rxb_addr(rxb); |
1398 | 1406 | ||
1399 | if (le32_to_cpu(pkt->u.stats.flag) & UCODE_STATS_CLEAR_MSK) { | 1407 | if (le32_to_cpu(pkt->u.stats.flag) & UCODE_STATS_CLEAR_MSK) { |
1400 | #ifdef CONFIG_IWLEGACY_DEBUGFS | 1408 | #ifdef CONFIG_IWLEGACY_DEBUGFS |
1401 | memset(&il->_4965.accum_stats, 0, | 1409 | memset(&il->_4965.accum_stats, 0, |
1402 | sizeof(struct il_notif_stats)); | 1410 | sizeof(struct il_notif_stats)); |
1403 | memset(&il->_4965.delta_stats, 0, | 1411 | memset(&il->_4965.delta_stats, 0, |
1404 | sizeof(struct il_notif_stats)); | 1412 | sizeof(struct il_notif_stats)); |
1405 | memset(&il->_4965.max_delta, 0, | 1413 | memset(&il->_4965.max_delta, 0, sizeof(struct il_notif_stats)); |
1406 | sizeof(struct il_notif_stats)); | ||
1407 | #endif | 1414 | #endif |
1408 | D_RX("Statistics have been cleared\n"); | 1415 | D_RX("Statistics have been cleared\n"); |
1409 | } | 1416 | } |
@@ -1448,7 +1455,8 @@ static const u8 tid_to_ac[] = { | |||
1448 | IEEE80211_AC_VO | 1455 | IEEE80211_AC_VO |
1449 | }; | 1456 | }; |
1450 | 1457 | ||
1451 | static inline int il4965_get_ac_from_tid(u16 tid) | 1458 | static inline int |
1459 | il4965_get_ac_from_tid(u16 tid) | ||
1452 | { | 1460 | { |
1453 | if (likely(tid < ARRAY_SIZE(tid_to_ac))) | 1461 | if (likely(tid < ARRAY_SIZE(tid_to_ac))) |
1454 | return tid_to_ac[tid]; | 1462 | return tid_to_ac[tid]; |
@@ -1470,12 +1478,11 @@ il4965_get_fifo_from_tid(struct il_rxon_context *ctx, u16 tid) | |||
1470 | /* | 1478 | /* |
1471 | * handle build C_TX command notification. | 1479 | * handle build C_TX command notification. |
1472 | */ | 1480 | */ |
1473 | static void il4965_tx_cmd_build_basic(struct il_priv *il, | 1481 | static void |
1474 | struct sk_buff *skb, | 1482 | il4965_tx_cmd_build_basic(struct il_priv *il, struct sk_buff *skb, |
1475 | struct il_tx_cmd *tx_cmd, | 1483 | struct il_tx_cmd *tx_cmd, |
1476 | struct ieee80211_tx_info *info, | 1484 | struct ieee80211_tx_info *info, |
1477 | struct ieee80211_hdr *hdr, | 1485 | struct ieee80211_hdr *hdr, u8 std_id) |
1478 | u8 std_id) | ||
1479 | { | 1486 | { |
1480 | __le16 fc = hdr->frame_control; | 1487 | __le16 fc = hdr->frame_control; |
1481 | __le32 tx_flags = tx_cmd->tx_flags; | 1488 | __le32 tx_flags = tx_cmd->tx_flags; |
@@ -1527,10 +1534,9 @@ static void il4965_tx_cmd_build_basic(struct il_priv *il, | |||
1527 | 1534 | ||
1528 | #define RTS_DFAULT_RETRY_LIMIT 60 | 1535 | #define RTS_DFAULT_RETRY_LIMIT 60 |
1529 | 1536 | ||
1530 | static void il4965_tx_cmd_build_rate(struct il_priv *il, | 1537 | static void |
1531 | struct il_tx_cmd *tx_cmd, | 1538 | il4965_tx_cmd_build_rate(struct il_priv *il, struct il_tx_cmd *tx_cmd, |
1532 | struct ieee80211_tx_info *info, | 1539 | struct ieee80211_tx_info *info, __le16 fc) |
1533 | __le16 fc) | ||
1534 | { | 1540 | { |
1535 | u32 rate_flags; | 1541 | u32 rate_flags; |
1536 | int rate_idx; | 1542 | int rate_idx; |
@@ -1538,7 +1544,7 @@ static void il4965_tx_cmd_build_rate(struct il_priv *il, | |||
1538 | u8 data_retry_limit; | 1544 | u8 data_retry_limit; |
1539 | u8 rate_plcp; | 1545 | u8 rate_plcp; |
1540 | 1546 | ||
1541 | /* Set retry limit on DATA packets and Probe Responses*/ | 1547 | /* Set retry limit on DATA packets and Probe Responses */ |
1542 | if (ieee80211_is_probe_resp(fc)) | 1548 | if (ieee80211_is_probe_resp(fc)) |
1543 | data_retry_limit = 3; | 1549 | data_retry_limit = 3; |
1544 | else | 1550 | else |
@@ -1566,10 +1572,11 @@ static void il4965_tx_cmd_build_rate(struct il_priv *il, | |||
1566 | * idx is invalid. | 1572 | * idx is invalid. |
1567 | */ | 1573 | */ |
1568 | rate_idx = info->control.rates[0].idx; | 1574 | rate_idx = info->control.rates[0].idx; |
1569 | if ((info->control.rates[0].flags & IEEE80211_TX_RC_MCS) || | 1575 | if ((info->control.rates[0].flags & IEEE80211_TX_RC_MCS) || rate_idx < 0 |
1570 | rate_idx < 0 || rate_idx > RATE_COUNT_LEGACY) | 1576 | || rate_idx > RATE_COUNT_LEGACY) |
1571 | rate_idx = rate_lowest_index(&il->bands[info->band], | 1577 | rate_idx = |
1572 | info->control.sta); | 1578 | rate_lowest_index(&il->bands[info->band], |
1579 | info->control.sta); | ||
1573 | /* For 5 GHZ band, remap mac80211 rate indices into driver indices */ | 1580 | /* For 5 GHZ band, remap mac80211 rate indices into driver indices */ |
1574 | if (info->band == IEEE80211_BAND_5GHZ) | 1581 | if (info->band == IEEE80211_BAND_5GHZ) |
1575 | rate_idx += IL_FIRST_OFDM_RATE; | 1582 | rate_idx += IL_FIRST_OFDM_RATE; |
@@ -1583,20 +1590,21 @@ static void il4965_tx_cmd_build_rate(struct il_priv *il, | |||
1583 | rate_flags |= RATE_MCS_CCK_MSK; | 1590 | rate_flags |= RATE_MCS_CCK_MSK; |
1584 | 1591 | ||
1585 | /* Set up antennas */ | 1592 | /* Set up antennas */ |
1586 | il->mgmt_tx_ant = il4965_toggle_tx_ant(il, il->mgmt_tx_ant, | 1593 | il->mgmt_tx_ant = |
1587 | il->hw_params.valid_tx_ant); | 1594 | il4965_toggle_tx_ant(il, il->mgmt_tx_ant, |
1595 | il->hw_params.valid_tx_ant); | ||
1588 | 1596 | ||
1589 | rate_flags |= il4965_ant_idx_to_flags(il->mgmt_tx_ant); | 1597 | rate_flags |= il4965_ant_idx_to_flags(il->mgmt_tx_ant); |
1590 | 1598 | ||
1591 | /* Set the rate in the TX cmd */ | 1599 | /* Set the rate in the TX cmd */ |
1592 | tx_cmd->rate_n_flags = il4965_hw_set_rate_n_flags(rate_plcp, rate_flags); | 1600 | tx_cmd->rate_n_flags = |
1601 | il4965_hw_set_rate_n_flags(rate_plcp, rate_flags); | ||
1593 | } | 1602 | } |
1594 | 1603 | ||
1595 | static void il4965_tx_cmd_build_hwcrypto(struct il_priv *il, | 1604 | static void |
1596 | struct ieee80211_tx_info *info, | 1605 | il4965_tx_cmd_build_hwcrypto(struct il_priv *il, struct ieee80211_tx_info *info, |
1597 | struct il_tx_cmd *tx_cmd, | 1606 | struct il_tx_cmd *tx_cmd, struct sk_buff *skb_frag, |
1598 | struct sk_buff *skb_frag, | 1607 | int sta_id) |
1599 | int sta_id) | ||
1600 | { | 1608 | { |
1601 | struct ieee80211_key_conf *keyconf = info->control.hw_key; | 1609 | struct ieee80211_key_conf *keyconf = info->control.hw_key; |
1602 | 1610 | ||
@@ -1619,13 +1627,14 @@ static void il4965_tx_cmd_build_hwcrypto(struct il_priv *il, | |||
1619 | tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128; | 1627 | tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128; |
1620 | /* fall through */ | 1628 | /* fall through */ |
1621 | case WLAN_CIPHER_SUITE_WEP40: | 1629 | case WLAN_CIPHER_SUITE_WEP40: |
1622 | tx_cmd->sec_ctl |= (TX_CMD_SEC_WEP | | 1630 | tx_cmd->sec_ctl |= |
1623 | (keyconf->keyidx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT); | 1631 | (TX_CMD_SEC_WEP | (keyconf->keyidx & TX_CMD_SEC_MSK) << |
1632 | TX_CMD_SEC_SHIFT); | ||
1624 | 1633 | ||
1625 | memcpy(&tx_cmd->key[3], keyconf->key, keyconf->keylen); | 1634 | memcpy(&tx_cmd->key[3], keyconf->key, keyconf->keylen); |
1626 | 1635 | ||
1627 | D_TX("Configuring packet for WEP encryption " | 1636 | D_TX("Configuring packet for WEP encryption " "with key %d\n", |
1628 | "with key %d\n", keyconf->keyidx); | 1637 | keyconf->keyidx); |
1629 | break; | 1638 | break; |
1630 | 1639 | ||
1631 | default: | 1640 | default: |
@@ -1637,7 +1646,8 @@ static void il4965_tx_cmd_build_hwcrypto(struct il_priv *il, | |||
1637 | /* | 1646 | /* |
1638 | * start C_TX command process | 1647 | * start C_TX command process |
1639 | */ | 1648 | */ |
1640 | int il4965_tx_skb(struct il_priv *il, struct sk_buff *skb) | 1649 | int |
1650 | il4965_tx_skb(struct il_priv *il, struct sk_buff *skb) | ||
1641 | { | 1651 | { |
1642 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; | 1652 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; |
1643 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); | 1653 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); |
@@ -1694,8 +1704,7 @@ int il4965_tx_skb(struct il_priv *il, struct sk_buff *skb) | |||
1694 | sta_id = il_sta_id_or_broadcast(il, ctx, info->control.sta); | 1704 | sta_id = il_sta_id_or_broadcast(il, ctx, info->control.sta); |
1695 | 1705 | ||
1696 | if (sta_id == IL_INVALID_STATION) { | 1706 | if (sta_id == IL_INVALID_STATION) { |
1697 | D_DROP("Dropping - INVALID STATION: %pM\n", | 1707 | D_DROP("Dropping - INVALID STATION: %pM\n", hdr->addr1); |
1698 | hdr->addr1); | ||
1699 | goto drop_unlock; | 1708 | goto drop_unlock; |
1700 | } | 1709 | } |
1701 | } | 1710 | } |
@@ -1729,8 +1738,7 @@ int il4965_tx_skb(struct il_priv *il, struct sk_buff *skb) | |||
1729 | * The microcode will clear the more data | 1738 | * The microcode will clear the more data |
1730 | * bit in the last frame it transmits. | 1739 | * bit in the last frame it transmits. |
1731 | */ | 1740 | */ |
1732 | hdr->frame_control |= | 1741 | hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_MOREDATA); |
1733 | cpu_to_le16(IEEE80211_FCTL_MOREDATA); | ||
1734 | } else | 1742 | } else |
1735 | txq_id = ctx->ac_to_queue[skb_get_queue_mapping(skb)]; | 1743 | txq_id = ctx->ac_to_queue[skb_get_queue_mapping(skb)]; |
1736 | 1744 | ||
@@ -1746,8 +1754,8 @@ int il4965_tx_skb(struct il_priv *il, struct sk_buff *skb) | |||
1746 | } | 1754 | } |
1747 | seq_number = il->stations[sta_id].tid[tid].seq_number; | 1755 | seq_number = il->stations[sta_id].tid[tid].seq_number; |
1748 | seq_number &= IEEE80211_SCTL_SEQ; | 1756 | seq_number &= IEEE80211_SCTL_SEQ; |
1749 | hdr->seq_ctrl = hdr->seq_ctrl & | 1757 | hdr->seq_ctrl = |
1750 | cpu_to_le16(IEEE80211_SCTL_FRAG); | 1758 | hdr->seq_ctrl & cpu_to_le16(IEEE80211_SCTL_FRAG); |
1751 | hdr->seq_ctrl |= cpu_to_le16(seq_number); | 1759 | hdr->seq_ctrl |= cpu_to_le16(seq_number); |
1752 | seq_number += 0x10; | 1760 | seq_number += 0x10; |
1753 | /* aggregation is on for this <sta,tid> */ | 1761 | /* aggregation is on for this <sta,tid> */ |
@@ -1793,15 +1801,15 @@ int il4965_tx_skb(struct il_priv *il, struct sk_buff *skb) | |||
1793 | * locate the frame within the tx queue and do post-tx processing. | 1801 | * locate the frame within the tx queue and do post-tx processing. |
1794 | */ | 1802 | */ |
1795 | out_cmd->hdr.cmd = C_TX; | 1803 | out_cmd->hdr.cmd = C_TX; |
1796 | out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) | | 1804 | out_cmd->hdr.sequence = |
1797 | IDX_TO_SEQ(q->write_ptr))); | 1805 | cpu_to_le16((u16) |
1806 | (QUEUE_TO_SEQ(txq_id) | IDX_TO_SEQ(q->write_ptr))); | ||
1798 | 1807 | ||
1799 | /* Copy MAC header from skb into command buffer */ | 1808 | /* Copy MAC header from skb into command buffer */ |
1800 | memcpy(tx_cmd->hdr, hdr, hdr_len); | 1809 | memcpy(tx_cmd->hdr, hdr, hdr_len); |
1801 | 1810 | ||
1802 | |||
1803 | /* Total # bytes to be transmitted */ | 1811 | /* Total # bytes to be transmitted */ |
1804 | len = (u16)skb->len; | 1812 | len = (u16) skb->len; |
1805 | tx_cmd->len = cpu_to_le16(len); | 1813 | tx_cmd->len = cpu_to_le16(len); |
1806 | 1814 | ||
1807 | if (info->control.hw_key) | 1815 | if (info->control.hw_key) |
@@ -1823,8 +1831,7 @@ int il4965_tx_skb(struct il_priv *il, struct sk_buff *skb) | |||
1823 | * of the MAC header (device reads on dword boundaries). | 1831 | * of the MAC header (device reads on dword boundaries). |
1824 | * We'll tell device about this padding later. | 1832 | * We'll tell device about this padding later. |
1825 | */ | 1833 | */ |
1826 | len = sizeof(struct il_tx_cmd) + | 1834 | len = sizeof(struct il_tx_cmd) + sizeof(struct il_cmd_header) + hdr_len; |
1827 | sizeof(struct il_cmd_header) + hdr_len; | ||
1828 | firstlen = (len + 3) & ~3; | 1835 | firstlen = (len + 3) & ~3; |
1829 | 1836 | ||
1830 | /* Tell NIC about any 2-byte padding after MAC header */ | 1837 | /* Tell NIC about any 2-byte padding after MAC header */ |
@@ -1833,15 +1840,15 @@ int il4965_tx_skb(struct il_priv *il, struct sk_buff *skb) | |||
1833 | 1840 | ||
1834 | /* Physical address of this Tx command's header (not MAC header!), | 1841 | /* Physical address of this Tx command's header (not MAC header!), |
1835 | * within command buffer array. */ | 1842 | * within command buffer array. */ |
1836 | txcmd_phys = pci_map_single(il->pci_dev, | 1843 | txcmd_phys = |
1837 | &out_cmd->hdr, firstlen, | 1844 | pci_map_single(il->pci_dev, &out_cmd->hdr, firstlen, |
1838 | PCI_DMA_BIDIRECTIONAL); | 1845 | PCI_DMA_BIDIRECTIONAL); |
1839 | dma_unmap_addr_set(out_meta, mapping, txcmd_phys); | 1846 | dma_unmap_addr_set(out_meta, mapping, txcmd_phys); |
1840 | dma_unmap_len_set(out_meta, len, firstlen); | 1847 | dma_unmap_len_set(out_meta, len, firstlen); |
1841 | /* Add buffer containing Tx command and MAC(!) header to TFD's | 1848 | /* Add buffer containing Tx command and MAC(!) header to TFD's |
1842 | * first entry */ | 1849 | * first entry */ |
1843 | il->cfg->ops->lib->txq_attach_buf_to_tfd(il, txq, | 1850 | il->cfg->ops->lib->txq_attach_buf_to_tfd(il, txq, txcmd_phys, firstlen, |
1844 | txcmd_phys, firstlen, 1, 0); | 1851 | 1, 0); |
1845 | 1852 | ||
1846 | if (!ieee80211_has_morefrags(hdr->frame_control)) { | 1853 | if (!ieee80211_has_morefrags(hdr->frame_control)) { |
1847 | txq->need_update = 1; | 1854 | txq->need_update = 1; |
@@ -1854,35 +1861,36 @@ int il4965_tx_skb(struct il_priv *il, struct sk_buff *skb) | |||
1854 | * if any (802.11 null frames have no payload). */ | 1861 | * if any (802.11 null frames have no payload). */ |
1855 | secondlen = skb->len - hdr_len; | 1862 | secondlen = skb->len - hdr_len; |
1856 | if (secondlen > 0) { | 1863 | if (secondlen > 0) { |
1857 | phys_addr = pci_map_single(il->pci_dev, skb->data + hdr_len, | 1864 | phys_addr = |
1858 | secondlen, PCI_DMA_TODEVICE); | 1865 | pci_map_single(il->pci_dev, skb->data + hdr_len, secondlen, |
1859 | il->cfg->ops->lib->txq_attach_buf_to_tfd(il, txq, | 1866 | PCI_DMA_TODEVICE); |
1860 | phys_addr, secondlen, | 1867 | il->cfg->ops->lib->txq_attach_buf_to_tfd(il, txq, phys_addr, |
1861 | 0, 0); | 1868 | secondlen, 0, 0); |
1862 | } | 1869 | } |
1863 | 1870 | ||
1864 | scratch_phys = txcmd_phys + sizeof(struct il_cmd_header) + | 1871 | scratch_phys = |
1865 | offsetof(struct il_tx_cmd, scratch); | 1872 | txcmd_phys + sizeof(struct il_cmd_header) + |
1873 | offsetof(struct il_tx_cmd, scratch); | ||
1866 | 1874 | ||
1867 | /* take back ownership of DMA buffer to enable update */ | 1875 | /* take back ownership of DMA buffer to enable update */ |
1868 | pci_dma_sync_single_for_cpu(il->pci_dev, txcmd_phys, | 1876 | pci_dma_sync_single_for_cpu(il->pci_dev, txcmd_phys, firstlen, |
1869 | firstlen, PCI_DMA_BIDIRECTIONAL); | 1877 | PCI_DMA_BIDIRECTIONAL); |
1870 | tx_cmd->dram_lsb_ptr = cpu_to_le32(scratch_phys); | 1878 | tx_cmd->dram_lsb_ptr = cpu_to_le32(scratch_phys); |
1871 | tx_cmd->dram_msb_ptr = il_get_dma_hi_addr(scratch_phys); | 1879 | tx_cmd->dram_msb_ptr = il_get_dma_hi_addr(scratch_phys); |
1872 | 1880 | ||
1873 | D_TX("sequence nr = 0X%x\n", | 1881 | D_TX("sequence nr = 0X%x\n", le16_to_cpu(out_cmd->hdr.sequence)); |
1874 | le16_to_cpu(out_cmd->hdr.sequence)); | ||
1875 | D_TX("tx_flags = 0X%x\n", le32_to_cpu(tx_cmd->tx_flags)); | 1882 | D_TX("tx_flags = 0X%x\n", le32_to_cpu(tx_cmd->tx_flags)); |
1876 | il_print_hex_dump(il, IL_DL_TX, (u8 *)tx_cmd, sizeof(*tx_cmd)); | 1883 | il_print_hex_dump(il, IL_DL_TX, (u8 *) tx_cmd, sizeof(*tx_cmd)); |
1877 | il_print_hex_dump(il, IL_DL_TX, (u8 *)tx_cmd->hdr, hdr_len); | 1884 | il_print_hex_dump(il, IL_DL_TX, (u8 *) tx_cmd->hdr, hdr_len); |
1878 | 1885 | ||
1879 | /* Set up entry for this TFD in Tx byte-count array */ | 1886 | /* Set up entry for this TFD in Tx byte-count array */ |
1880 | if (info->flags & IEEE80211_TX_CTL_AMPDU) | 1887 | if (info->flags & IEEE80211_TX_CTL_AMPDU) |
1881 | il->cfg->ops->lib->txq_update_byte_cnt_tbl(il, txq, | 1888 | il->cfg->ops->lib->txq_update_byte_cnt_tbl(il, txq, |
1882 | le16_to_cpu(tx_cmd->len)); | 1889 | le16_to_cpu(tx_cmd-> |
1890 | len)); | ||
1883 | 1891 | ||
1884 | pci_dma_sync_single_for_device(il->pci_dev, txcmd_phys, | 1892 | pci_dma_sync_single_for_device(il->pci_dev, txcmd_phys, firstlen, |
1885 | firstlen, PCI_DMA_BIDIRECTIONAL); | 1893 | PCI_DMA_BIDIRECTIONAL); |
1886 | 1894 | ||
1887 | /* Tell device the write idx *just past* this latest filled TFD */ | 1895 | /* Tell device the write idx *just past* this latest filled TFD */ |
1888 | q->write_ptr = il_queue_inc_wrap(q->write_ptr, q->n_bd); | 1896 | q->write_ptr = il_queue_inc_wrap(q->write_ptr, q->n_bd); |
@@ -1924,19 +1932,19 @@ drop_unlock: | |||
1924 | return -1; | 1932 | return -1; |
1925 | } | 1933 | } |
1926 | 1934 | ||
1927 | static inline int il4965_alloc_dma_ptr(struct il_priv *il, | 1935 | static inline int |
1928 | struct il_dma_ptr *ptr, size_t size) | 1936 | il4965_alloc_dma_ptr(struct il_priv *il, struct il_dma_ptr *ptr, size_t size) |
1929 | { | 1937 | { |
1930 | ptr->addr = dma_alloc_coherent(&il->pci_dev->dev, size, &ptr->dma, | 1938 | ptr->addr = |
1931 | GFP_KERNEL); | 1939 | dma_alloc_coherent(&il->pci_dev->dev, size, &ptr->dma, GFP_KERNEL); |
1932 | if (!ptr->addr) | 1940 | if (!ptr->addr) |
1933 | return -ENOMEM; | 1941 | return -ENOMEM; |
1934 | ptr->size = size; | 1942 | ptr->size = size; |
1935 | return 0; | 1943 | return 0; |
1936 | } | 1944 | } |
1937 | 1945 | ||
1938 | static inline void il4965_free_dma_ptr(struct il_priv *il, | 1946 | static inline void |
1939 | struct il_dma_ptr *ptr) | 1947 | il4965_free_dma_ptr(struct il_priv *il, struct il_dma_ptr *ptr) |
1940 | { | 1948 | { |
1941 | if (unlikely(!ptr->addr)) | 1949 | if (unlikely(!ptr->addr)) |
1942 | return; | 1950 | return; |
@@ -1950,7 +1958,8 @@ static inline void il4965_free_dma_ptr(struct il_priv *il, | |||
1950 | * | 1958 | * |
1951 | * Destroy all TX DMA queues and structures | 1959 | * Destroy all TX DMA queues and structures |
1952 | */ | 1960 | */ |
1953 | void il4965_hw_txq_ctx_free(struct il_priv *il) | 1961 | void |
1962 | il4965_hw_txq_ctx_free(struct il_priv *il) | ||
1954 | { | 1963 | { |
1955 | int txq_id; | 1964 | int txq_id; |
1956 | 1965 | ||
@@ -1977,7 +1986,8 @@ void il4965_hw_txq_ctx_free(struct il_priv *il) | |||
1977 | * @param il | 1986 | * @param il |
1978 | * @return error code | 1987 | * @return error code |
1979 | */ | 1988 | */ |
1980 | int il4965_txq_ctx_alloc(struct il_priv *il) | 1989 | int |
1990 | il4965_txq_ctx_alloc(struct il_priv *il) | ||
1981 | { | 1991 | { |
1982 | int ret; | 1992 | int ret; |
1983 | int txq_id, slots_num; | 1993 | int txq_id, slots_num; |
@@ -1986,8 +1996,9 @@ int il4965_txq_ctx_alloc(struct il_priv *il) | |||
1986 | /* Free all tx/cmd queues and keep-warm buffer */ | 1996 | /* Free all tx/cmd queues and keep-warm buffer */ |
1987 | il4965_hw_txq_ctx_free(il); | 1997 | il4965_hw_txq_ctx_free(il); |
1988 | 1998 | ||
1989 | ret = il4965_alloc_dma_ptr(il, &il->scd_bc_tbls, | 1999 | ret = |
1990 | il->hw_params.scd_bc_tbls_size); | 2000 | il4965_alloc_dma_ptr(il, &il->scd_bc_tbls, |
2001 | il->hw_params.scd_bc_tbls_size); | ||
1991 | if (ret) { | 2002 | if (ret) { |
1992 | IL_ERR("Scheduler BC Table allocation failed\n"); | 2003 | IL_ERR("Scheduler BC Table allocation failed\n"); |
1993 | goto error_bc_tbls; | 2004 | goto error_bc_tbls; |
@@ -2016,11 +2027,10 @@ int il4965_txq_ctx_alloc(struct il_priv *il) | |||
2016 | 2027 | ||
2017 | /* Alloc and init all Tx queues, including the command queue (#4/#9) */ | 2028 | /* Alloc and init all Tx queues, including the command queue (#4/#9) */ |
2018 | for (txq_id = 0; txq_id < il->hw_params.max_txq_num; txq_id++) { | 2029 | for (txq_id = 0; txq_id < il->hw_params.max_txq_num; txq_id++) { |
2019 | slots_num = (txq_id == il->cmd_queue) ? | 2030 | slots_num = |
2020 | TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS; | 2031 | (txq_id == |
2021 | ret = il_tx_queue_init(il, | 2032 | il->cmd_queue) ? TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS; |
2022 | &il->txq[txq_id], slots_num, | 2033 | ret = il_tx_queue_init(il, &il->txq[txq_id], slots_num, txq_id); |
2023 | txq_id); | ||
2024 | if (ret) { | 2034 | if (ret) { |
2025 | IL_ERR("Tx %d queue init failed\n", txq_id); | 2035 | IL_ERR("Tx %d queue init failed\n", txq_id); |
2026 | goto error; | 2036 | goto error; |
@@ -2029,16 +2039,17 @@ int il4965_txq_ctx_alloc(struct il_priv *il) | |||
2029 | 2039 | ||
2030 | return ret; | 2040 | return ret; |
2031 | 2041 | ||
2032 | error: | 2042 | error: |
2033 | il4965_hw_txq_ctx_free(il); | 2043 | il4965_hw_txq_ctx_free(il); |
2034 | il4965_free_dma_ptr(il, &il->kw); | 2044 | il4965_free_dma_ptr(il, &il->kw); |
2035 | error_kw: | 2045 | error_kw: |
2036 | il4965_free_dma_ptr(il, &il->scd_bc_tbls); | 2046 | il4965_free_dma_ptr(il, &il->scd_bc_tbls); |
2037 | error_bc_tbls: | 2047 | error_bc_tbls: |
2038 | return ret; | 2048 | return ret; |
2039 | } | 2049 | } |
2040 | 2050 | ||
2041 | void il4965_txq_ctx_reset(struct il_priv *il) | 2051 | void |
2052 | il4965_txq_ctx_reset(struct il_priv *il) | ||
2042 | { | 2053 | { |
2043 | int txq_id, slots_num; | 2054 | int txq_id, slots_num; |
2044 | unsigned long flags; | 2055 | unsigned long flags; |
@@ -2055,17 +2066,17 @@ void il4965_txq_ctx_reset(struct il_priv *il) | |||
2055 | 2066 | ||
2056 | /* Alloc and init all Tx queues, including the command queue (#4) */ | 2067 | /* Alloc and init all Tx queues, including the command queue (#4) */ |
2057 | for (txq_id = 0; txq_id < il->hw_params.max_txq_num; txq_id++) { | 2068 | for (txq_id = 0; txq_id < il->hw_params.max_txq_num; txq_id++) { |
2058 | slots_num = txq_id == il->cmd_queue ? | 2069 | slots_num = |
2059 | TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS; | 2070 | txq_id == il->cmd_queue ? TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS; |
2060 | il_tx_queue_reset(il, &il->txq[txq_id], | 2071 | il_tx_queue_reset(il, &il->txq[txq_id], slots_num, txq_id); |
2061 | slots_num, txq_id); | ||
2062 | } | 2072 | } |
2063 | } | 2073 | } |
2064 | 2074 | ||
2065 | /** | 2075 | /** |
2066 | * il4965_txq_ctx_stop - Stop all Tx DMA channels | 2076 | * il4965_txq_ctx_stop - Stop all Tx DMA channels |
2067 | */ | 2077 | */ |
2068 | void il4965_txq_ctx_stop(struct il_priv *il) | 2078 | void |
2079 | il4965_txq_ctx_stop(struct il_priv *il) | ||
2069 | { | 2080 | { |
2070 | int ch, txq_id; | 2081 | int ch, txq_id; |
2071 | unsigned long flags; | 2082 | unsigned long flags; |
@@ -2077,15 +2088,13 @@ void il4965_txq_ctx_stop(struct il_priv *il) | |||
2077 | 2088 | ||
2078 | /* Stop each Tx DMA channel, and wait for it to be idle */ | 2089 | /* Stop each Tx DMA channel, and wait for it to be idle */ |
2079 | for (ch = 0; ch < il->hw_params.dma_chnl_num; ch++) { | 2090 | for (ch = 0; ch < il->hw_params.dma_chnl_num; ch++) { |
2080 | il_wr(il, | 2091 | il_wr(il, FH49_TCSR_CHNL_TX_CONFIG_REG(ch), 0x0); |
2081 | FH49_TCSR_CHNL_TX_CONFIG_REG(ch), 0x0); | 2092 | if (il_poll_bit |
2082 | if (il_poll_bit(il, FH49_TSSR_TX_STATUS_REG, | 2093 | (il, FH49_TSSR_TX_STATUS_REG, |
2083 | FH49_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(ch), | 2094 | FH49_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(ch), 1000)) |
2084 | 1000)) | ||
2085 | IL_ERR("Failing on timeout while stopping" | 2095 | IL_ERR("Failing on timeout while stopping" |
2086 | " DMA channel %d [0x%08x]", ch, | 2096 | " DMA channel %d [0x%08x]", ch, il_rd(il, |
2087 | il_rd(il, | 2097 | FH49_TSSR_TX_STATUS_REG)); |
2088 | FH49_TSSR_TX_STATUS_REG)); | ||
2089 | } | 2098 | } |
2090 | spin_unlock_irqrestore(&il->lock, flags); | 2099 | spin_unlock_irqrestore(&il->lock, flags); |
2091 | 2100 | ||
@@ -2106,7 +2115,8 @@ void il4965_txq_ctx_stop(struct il_priv *il) | |||
2106 | * Should never return anything < 7, because they should already | 2115 | * Should never return anything < 7, because they should already |
2107 | * be in use as EDCA AC (0-3), Command (4), reserved (5, 6) | 2116 | * be in use as EDCA AC (0-3), Command (4), reserved (5, 6) |
2108 | */ | 2117 | */ |
2109 | static int il4965_txq_ctx_activate_free(struct il_priv *il) | 2118 | static int |
2119 | il4965_txq_ctx_activate_free(struct il_priv *il) | ||
2110 | { | 2120 | { |
2111 | int txq_id; | 2121 | int txq_id; |
2112 | 2122 | ||
@@ -2119,22 +2129,21 @@ static int il4965_txq_ctx_activate_free(struct il_priv *il) | |||
2119 | /** | 2129 | /** |
2120 | * il4965_tx_queue_stop_scheduler - Stop queue, but keep configuration | 2130 | * il4965_tx_queue_stop_scheduler - Stop queue, but keep configuration |
2121 | */ | 2131 | */ |
2122 | static void il4965_tx_queue_stop_scheduler(struct il_priv *il, | 2132 | static void |
2123 | u16 txq_id) | 2133 | il4965_tx_queue_stop_scheduler(struct il_priv *il, u16 txq_id) |
2124 | { | 2134 | { |
2125 | /* Simply stop the queue, but don't change any configuration; | 2135 | /* Simply stop the queue, but don't change any configuration; |
2126 | * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */ | 2136 | * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */ |
2127 | il_wr_prph(il, | 2137 | il_wr_prph(il, IL49_SCD_QUEUE_STATUS_BITS(txq_id), |
2128 | IL49_SCD_QUEUE_STATUS_BITS(txq_id), | 2138 | (0 << IL49_SCD_QUEUE_STTS_REG_POS_ACTIVE) | (1 << |
2129 | (0 << IL49_SCD_QUEUE_STTS_REG_POS_ACTIVE)| | 2139 | IL49_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN)); |
2130 | (1 << IL49_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN)); | ||
2131 | } | 2140 | } |
2132 | 2141 | ||
2133 | /** | 2142 | /** |
2134 | * il4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue | 2143 | * il4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue |
2135 | */ | 2144 | */ |
2136 | static int il4965_tx_queue_set_q2ratid(struct il_priv *il, u16 ra_tid, | 2145 | static int |
2137 | u16 txq_id) | 2146 | il4965_tx_queue_set_q2ratid(struct il_priv *il, u16 ra_tid, u16 txq_id) |
2138 | { | 2147 | { |
2139 | u32 tbl_dw_addr; | 2148 | u32 tbl_dw_addr; |
2140 | u32 tbl_dw; | 2149 | u32 tbl_dw; |
@@ -2142,8 +2151,8 @@ static int il4965_tx_queue_set_q2ratid(struct il_priv *il, u16 ra_tid, | |||
2142 | 2151 | ||
2143 | scd_q2ratid = ra_tid & IL_SCD_QUEUE_RA_TID_MAP_RATID_MSK; | 2152 | scd_q2ratid = ra_tid & IL_SCD_QUEUE_RA_TID_MAP_RATID_MSK; |
2144 | 2153 | ||
2145 | tbl_dw_addr = il->scd_base_addr + | 2154 | tbl_dw_addr = |
2146 | IL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id); | 2155 | il->scd_base_addr + IL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id); |
2147 | 2156 | ||
2148 | tbl_dw = il_read_targ_mem(il, tbl_dw_addr); | 2157 | tbl_dw = il_read_targ_mem(il, tbl_dw_addr); |
2149 | 2158 | ||
@@ -2163,8 +2172,9 @@ static int il4965_tx_queue_set_q2ratid(struct il_priv *il, u16 ra_tid, | |||
2163 | * NOTE: txq_id must be greater than IL49_FIRST_AMPDU_QUEUE, | 2172 | * NOTE: txq_id must be greater than IL49_FIRST_AMPDU_QUEUE, |
2164 | * i.e. it must be one of the higher queues used for aggregation | 2173 | * i.e. it must be one of the higher queues used for aggregation |
2165 | */ | 2174 | */ |
2166 | static int il4965_txq_agg_enable(struct il_priv *il, int txq_id, | 2175 | static int |
2167 | int tx_fifo, int sta_id, int tid, u16 ssn_idx) | 2176 | il4965_txq_agg_enable(struct il_priv *il, int txq_id, int tx_fifo, int sta_id, |
2177 | int tid, u16 ssn_idx) | ||
2168 | { | 2178 | { |
2169 | unsigned long flags; | 2179 | unsigned long flags; |
2170 | u16 ra_tid; | 2180 | u16 ra_tid; |
@@ -2172,9 +2182,8 @@ static int il4965_txq_agg_enable(struct il_priv *il, int txq_id, | |||
2172 | 2182 | ||
2173 | if ((IL49_FIRST_AMPDU_QUEUE > txq_id) || | 2183 | if ((IL49_FIRST_AMPDU_QUEUE > txq_id) || |
2174 | (IL49_FIRST_AMPDU_QUEUE + | 2184 | (IL49_FIRST_AMPDU_QUEUE + |
2175 | il->cfg->base_params->num_of_ampdu_queues <= txq_id)) { | 2185 | il->cfg->base_params->num_of_ampdu_queues <= txq_id)) { |
2176 | IL_WARN( | 2186 | IL_WARN("queue number out of range: %d, must be %d to %d\n", |
2177 | "queue number out of range: %d, must be %d to %d\n", | ||
2178 | txq_id, IL49_FIRST_AMPDU_QUEUE, | 2187 | txq_id, IL49_FIRST_AMPDU_QUEUE, |
2179 | IL49_FIRST_AMPDU_QUEUE + | 2188 | IL49_FIRST_AMPDU_QUEUE + |
2180 | il->cfg->base_params->num_of_ampdu_queues - 1); | 2189 | il->cfg->base_params->num_of_ampdu_queues - 1); |
@@ -2207,14 +2216,17 @@ static int il4965_txq_agg_enable(struct il_priv *il, int txq_id, | |||
2207 | 2216 | ||
2208 | /* Set up Tx win size and frame limit for this queue */ | 2217 | /* Set up Tx win size and frame limit for this queue */ |
2209 | il_write_targ_mem(il, | 2218 | il_write_targ_mem(il, |
2210 | il->scd_base_addr + IL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id), | 2219 | il->scd_base_addr + |
2211 | (SCD_WIN_SIZE << IL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) & | 2220 | IL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id), |
2212 | IL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK); | 2221 | (SCD_WIN_SIZE << IL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) |
2222 | & IL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK); | ||
2213 | 2223 | ||
2214 | il_write_targ_mem(il, il->scd_base_addr + | 2224 | il_write_targ_mem(il, |
2215 | IL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32), | 2225 | il->scd_base_addr + |
2216 | (SCD_FRAME_LIMIT << IL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) | 2226 | IL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32), |
2217 | & IL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK); | 2227 | (SCD_FRAME_LIMIT << |
2228 | IL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) & | ||
2229 | IL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK); | ||
2218 | 2230 | ||
2219 | il_set_bits_prph(il, IL49_SCD_INTERRUPT_MASK, (1 << txq_id)); | 2231 | il_set_bits_prph(il, IL49_SCD_INTERRUPT_MASK, (1 << txq_id)); |
2220 | 2232 | ||
@@ -2226,9 +2238,9 @@ static int il4965_txq_agg_enable(struct il_priv *il, int txq_id, | |||
2226 | return 0; | 2238 | return 0; |
2227 | } | 2239 | } |
2228 | 2240 | ||
2229 | 2241 | int | |
2230 | int il4965_tx_agg_start(struct il_priv *il, struct ieee80211_vif *vif, | 2242 | il4965_tx_agg_start(struct il_priv *il, struct ieee80211_vif *vif, |
2231 | struct ieee80211_sta *sta, u16 tid, u16 *ssn) | 2243 | struct ieee80211_sta *sta, u16 tid, u16 * ssn) |
2232 | { | 2244 | { |
2233 | int sta_id; | 2245 | int sta_id; |
2234 | int tx_fifo; | 2246 | int tx_fifo; |
@@ -2241,8 +2253,7 @@ int il4965_tx_agg_start(struct il_priv *il, struct ieee80211_vif *vif, | |||
2241 | if (unlikely(tx_fifo < 0)) | 2253 | if (unlikely(tx_fifo < 0)) |
2242 | return tx_fifo; | 2254 | return tx_fifo; |
2243 | 2255 | ||
2244 | IL_WARN("%s on ra = %pM tid = %d\n", | 2256 | IL_WARN("%s on ra = %pM tid = %d\n", __func__, sta->addr, tid); |
2245 | __func__, sta->addr, tid); | ||
2246 | 2257 | ||
2247 | sta_id = il_sta_id(sta); | 2258 | sta_id = il_sta_id(sta); |
2248 | if (sta_id == IL_INVALID_STATION) { | 2259 | if (sta_id == IL_INVALID_STATION) { |
@@ -2267,12 +2278,10 @@ int il4965_tx_agg_start(struct il_priv *il, struct ieee80211_vif *vif, | |||
2267 | tid_data = &il->stations[sta_id].tid[tid]; | 2278 | tid_data = &il->stations[sta_id].tid[tid]; |
2268 | *ssn = SEQ_TO_SN(tid_data->seq_number); | 2279 | *ssn = SEQ_TO_SN(tid_data->seq_number); |
2269 | tid_data->agg.txq_id = txq_id; | 2280 | tid_data->agg.txq_id = txq_id; |
2270 | il_set_swq_id(&il->txq[txq_id], | 2281 | il_set_swq_id(&il->txq[txq_id], il4965_get_ac_from_tid(tid), txq_id); |
2271 | il4965_get_ac_from_tid(tid), txq_id); | ||
2272 | spin_unlock_irqrestore(&il->sta_lock, flags); | 2282 | spin_unlock_irqrestore(&il->sta_lock, flags); |
2273 | 2283 | ||
2274 | ret = il4965_txq_agg_enable(il, txq_id, tx_fifo, | 2284 | ret = il4965_txq_agg_enable(il, txq_id, tx_fifo, sta_id, tid, *ssn); |
2275 | sta_id, tid, *ssn); | ||
2276 | if (ret) | 2285 | if (ret) |
2277 | return ret; | 2286 | return ret; |
2278 | 2287 | ||
@@ -2283,9 +2292,8 @@ int il4965_tx_agg_start(struct il_priv *il, struct ieee80211_vif *vif, | |||
2283 | tid_data->agg.state = IL_AGG_ON; | 2292 | tid_data->agg.state = IL_AGG_ON; |
2284 | ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid); | 2293 | ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid); |
2285 | } else { | 2294 | } else { |
2286 | D_HT( | 2295 | D_HT("HW queue is NOT empty: %d packets in HW queue\n", |
2287 | "HW queue is NOT empty: %d packets in HW queue\n", | 2296 | tid_data->tfds_in_queue); |
2288 | tid_data->tfds_in_queue); | ||
2289 | tid_data->agg.state = IL_EMPTYING_HW_QUEUE_ADDBA; | 2297 | tid_data->agg.state = IL_EMPTYING_HW_QUEUE_ADDBA; |
2290 | } | 2298 | } |
2291 | spin_unlock_irqrestore(&il->sta_lock, flags); | 2299 | spin_unlock_irqrestore(&il->sta_lock, flags); |
@@ -2296,14 +2304,13 @@ int il4965_tx_agg_start(struct il_priv *il, struct ieee80211_vif *vif, | |||
2296 | * txq_id must be greater than IL49_FIRST_AMPDU_QUEUE | 2304 | * txq_id must be greater than IL49_FIRST_AMPDU_QUEUE |
2297 | * il->lock must be held by the caller | 2305 | * il->lock must be held by the caller |
2298 | */ | 2306 | */ |
2299 | static int il4965_txq_agg_disable(struct il_priv *il, u16 txq_id, | 2307 | static int |
2300 | u16 ssn_idx, u8 tx_fifo) | 2308 | il4965_txq_agg_disable(struct il_priv *il, u16 txq_id, u16 ssn_idx, u8 tx_fifo) |
2301 | { | 2309 | { |
2302 | if ((IL49_FIRST_AMPDU_QUEUE > txq_id) || | 2310 | if ((IL49_FIRST_AMPDU_QUEUE > txq_id) || |
2303 | (IL49_FIRST_AMPDU_QUEUE + | 2311 | (IL49_FIRST_AMPDU_QUEUE + |
2304 | il->cfg->base_params->num_of_ampdu_queues <= txq_id)) { | 2312 | il->cfg->base_params->num_of_ampdu_queues <= txq_id)) { |
2305 | IL_WARN( | 2313 | IL_WARN("queue number out of range: %d, must be %d to %d\n", |
2306 | "queue number out of range: %d, must be %d to %d\n", | ||
2307 | txq_id, IL49_FIRST_AMPDU_QUEUE, | 2314 | txq_id, IL49_FIRST_AMPDU_QUEUE, |
2308 | IL49_FIRST_AMPDU_QUEUE + | 2315 | IL49_FIRST_AMPDU_QUEUE + |
2309 | il->cfg->base_params->num_of_ampdu_queues - 1); | 2316 | il->cfg->base_params->num_of_ampdu_queues - 1); |
@@ -2312,24 +2319,23 @@ static int il4965_txq_agg_disable(struct il_priv *il, u16 txq_id, | |||
2312 | 2319 | ||
2313 | il4965_tx_queue_stop_scheduler(il, txq_id); | 2320 | il4965_tx_queue_stop_scheduler(il, txq_id); |
2314 | 2321 | ||
2315 | il_clear_bits_prph(il, | 2322 | il_clear_bits_prph(il, IL49_SCD_QUEUECHAIN_SEL, (1 << txq_id)); |
2316 | IL49_SCD_QUEUECHAIN_SEL, (1 << txq_id)); | ||
2317 | 2323 | ||
2318 | il->txq[txq_id].q.read_ptr = (ssn_idx & 0xff); | 2324 | il->txq[txq_id].q.read_ptr = (ssn_idx & 0xff); |
2319 | il->txq[txq_id].q.write_ptr = (ssn_idx & 0xff); | 2325 | il->txq[txq_id].q.write_ptr = (ssn_idx & 0xff); |
2320 | /* supposes that ssn_idx is valid (!= 0xFFF) */ | 2326 | /* supposes that ssn_idx is valid (!= 0xFFF) */ |
2321 | il4965_set_wr_ptrs(il, txq_id, ssn_idx); | 2327 | il4965_set_wr_ptrs(il, txq_id, ssn_idx); |
2322 | 2328 | ||
2323 | il_clear_bits_prph(il, | 2329 | il_clear_bits_prph(il, IL49_SCD_INTERRUPT_MASK, (1 << txq_id)); |
2324 | IL49_SCD_INTERRUPT_MASK, (1 << txq_id)); | ||
2325 | il_txq_ctx_deactivate(il, txq_id); | 2330 | il_txq_ctx_deactivate(il, txq_id); |
2326 | il4965_tx_queue_set_status(il, &il->txq[txq_id], tx_fifo, 0); | 2331 | il4965_tx_queue_set_status(il, &il->txq[txq_id], tx_fifo, 0); |
2327 | 2332 | ||
2328 | return 0; | 2333 | return 0; |
2329 | } | 2334 | } |
2330 | 2335 | ||
2331 | int il4965_tx_agg_stop(struct il_priv *il, struct ieee80211_vif *vif, | 2336 | int |
2332 | struct ieee80211_sta *sta, u16 tid) | 2337 | il4965_tx_agg_stop(struct il_priv *il, struct ieee80211_vif *vif, |
2338 | struct ieee80211_sta *sta, u16 tid) | ||
2333 | { | 2339 | { |
2334 | int tx_fifo_id, txq_id, sta_id, ssn; | 2340 | int tx_fifo_id, txq_id, sta_id, ssn; |
2335 | struct il_tid_data *tid_data; | 2341 | struct il_tid_data *tid_data; |
@@ -2376,13 +2382,13 @@ int il4965_tx_agg_stop(struct il_priv *il, struct ieee80211_vif *vif, | |||
2376 | if (write_ptr != read_ptr) { | 2382 | if (write_ptr != read_ptr) { |
2377 | D_HT("Stopping a non empty AGG HW QUEUE\n"); | 2383 | D_HT("Stopping a non empty AGG HW QUEUE\n"); |
2378 | il->stations[sta_id].tid[tid].agg.state = | 2384 | il->stations[sta_id].tid[tid].agg.state = |
2379 | IL_EMPTYING_HW_QUEUE_DELBA; | 2385 | IL_EMPTYING_HW_QUEUE_DELBA; |
2380 | spin_unlock_irqrestore(&il->sta_lock, flags); | 2386 | spin_unlock_irqrestore(&il->sta_lock, flags); |
2381 | return 0; | 2387 | return 0; |
2382 | } | 2388 | } |
2383 | 2389 | ||
2384 | D_HT("HW queue is empty\n"); | 2390 | D_HT("HW queue is empty\n"); |
2385 | turn_off: | 2391 | turn_off: |
2386 | il->stations[sta_id].tid[tid].agg.state = IL_AGG_OFF; | 2392 | il->stations[sta_id].tid[tid].agg.state = IL_AGG_OFF; |
2387 | 2393 | ||
2388 | /* do not restore/save irqs */ | 2394 | /* do not restore/save irqs */ |
@@ -2404,8 +2410,8 @@ int il4965_tx_agg_stop(struct il_priv *il, struct ieee80211_vif *vif, | |||
2404 | return 0; | 2410 | return 0; |
2405 | } | 2411 | } |
2406 | 2412 | ||
2407 | int il4965_txq_check_empty(struct il_priv *il, | 2413 | int |
2408 | int sta_id, u8 tid, int txq_id) | 2414 | il4965_txq_check_empty(struct il_priv *il, int sta_id, u8 tid, int txq_id) |
2409 | { | 2415 | { |
2410 | struct il_queue *q = &il->txq[txq_id].q; | 2416 | struct il_queue *q = &il->txq[txq_id].q; |
2411 | u8 *addr = il->stations[sta_id].sta.sta.addr; | 2417 | u8 *addr = il->stations[sta_id].sta.sta.addr; |
@@ -2420,12 +2426,11 @@ int il4965_txq_check_empty(struct il_priv *il, | |||
2420 | case IL_EMPTYING_HW_QUEUE_DELBA: | 2426 | case IL_EMPTYING_HW_QUEUE_DELBA: |
2421 | /* We are reclaiming the last packet of the */ | 2427 | /* We are reclaiming the last packet of the */ |
2422 | /* aggregated HW queue */ | 2428 | /* aggregated HW queue */ |
2423 | if (txq_id == tid_data->agg.txq_id && | 2429 | if (txq_id == tid_data->agg.txq_id && |
2424 | q->read_ptr == q->write_ptr) { | 2430 | q->read_ptr == q->write_ptr) { |
2425 | u16 ssn = SEQ_TO_SN(tid_data->seq_number); | 2431 | u16 ssn = SEQ_TO_SN(tid_data->seq_number); |
2426 | int tx_fifo = il4965_get_fifo_from_tid(ctx, tid); | 2432 | int tx_fifo = il4965_get_fifo_from_tid(ctx, tid); |
2427 | D_HT( | 2433 | D_HT("HW queue empty: continue DELBA flow\n"); |
2428 | "HW queue empty: continue DELBA flow\n"); | ||
2429 | il4965_txq_agg_disable(il, txq_id, ssn, tx_fifo); | 2434 | il4965_txq_agg_disable(il, txq_id, ssn, tx_fifo); |
2430 | tid_data->agg.state = IL_AGG_OFF; | 2435 | tid_data->agg.state = IL_AGG_OFF; |
2431 | ieee80211_stop_tx_ba_cb_irqsafe(ctx->vif, addr, tid); | 2436 | ieee80211_stop_tx_ba_cb_irqsafe(ctx->vif, addr, tid); |
@@ -2434,8 +2439,7 @@ int il4965_txq_check_empty(struct il_priv *il, | |||
2434 | case IL_EMPTYING_HW_QUEUE_ADDBA: | 2439 | case IL_EMPTYING_HW_QUEUE_ADDBA: |
2435 | /* We are reclaiming the last packet of the queue */ | 2440 | /* We are reclaiming the last packet of the queue */ |
2436 | if (tid_data->tfds_in_queue == 0) { | 2441 | if (tid_data->tfds_in_queue == 0) { |
2437 | D_HT( | 2442 | D_HT("HW queue empty: continue ADDBA flow\n"); |
2438 | "HW queue empty: continue ADDBA flow\n"); | ||
2439 | tid_data->agg.state = IL_AGG_ON; | 2443 | tid_data->agg.state = IL_AGG_ON; |
2440 | ieee80211_start_tx_ba_cb_irqsafe(ctx->vif, addr, tid); | 2444 | ieee80211_start_tx_ba_cb_irqsafe(ctx->vif, addr, tid); |
2441 | } | 2445 | } |
@@ -2445,9 +2449,9 @@ int il4965_txq_check_empty(struct il_priv *il, | |||
2445 | return 0; | 2449 | return 0; |
2446 | } | 2450 | } |
2447 | 2451 | ||
2448 | static void il4965_non_agg_tx_status(struct il_priv *il, | 2452 | static void |
2449 | struct il_rxon_context *ctx, | 2453 | il4965_non_agg_tx_status(struct il_priv *il, struct il_rxon_context *ctx, |
2450 | const u8 *addr1) | 2454 | const u8 * addr1) |
2451 | { | 2455 | { |
2452 | struct ieee80211_sta *sta; | 2456 | struct ieee80211_sta *sta; |
2453 | struct il_station_priv *sta_priv; | 2457 | struct il_station_priv *sta_priv; |
@@ -2465,10 +2469,9 @@ static void il4965_non_agg_tx_status(struct il_priv *il, | |||
2465 | } | 2469 | } |
2466 | 2470 | ||
2467 | static void | 2471 | static void |
2468 | il4965_tx_status(struct il_priv *il, struct il_tx_info *tx_info, | 2472 | il4965_tx_status(struct il_priv *il, struct il_tx_info *tx_info, bool is_agg) |
2469 | bool is_agg) | ||
2470 | { | 2473 | { |
2471 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) tx_info->skb->data; | 2474 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)tx_info->skb->data; |
2472 | 2475 | ||
2473 | if (!is_agg) | 2476 | if (!is_agg) |
2474 | il4965_non_agg_tx_status(il, tx_info->ctx, hdr->addr1); | 2477 | il4965_non_agg_tx_status(il, tx_info->ctx, hdr->addr1); |
@@ -2476,7 +2479,8 @@ il4965_tx_status(struct il_priv *il, struct il_tx_info *tx_info, | |||
2476 | ieee80211_tx_status_irqsafe(il->hw, tx_info->skb); | 2479 | ieee80211_tx_status_irqsafe(il->hw, tx_info->skb); |
2477 | } | 2480 | } |
2478 | 2481 | ||
2479 | int il4965_tx_queue_reclaim(struct il_priv *il, int txq_id, int idx) | 2482 | int |
2483 | il4965_tx_queue_reclaim(struct il_priv *il, int txq_id, int idx) | ||
2480 | { | 2484 | { |
2481 | struct il_tx_queue *txq = &il->txq[txq_id]; | 2485 | struct il_tx_queue *txq = &il->txq[txq_id]; |
2482 | struct il_queue *q = &txq->q; | 2486 | struct il_queue *q = &txq->q; |
@@ -2486,13 +2490,12 @@ int il4965_tx_queue_reclaim(struct il_priv *il, int txq_id, int idx) | |||
2486 | 2490 | ||
2487 | if (idx >= q->n_bd || il_queue_used(q, idx) == 0) { | 2491 | if (idx >= q->n_bd || il_queue_used(q, idx) == 0) { |
2488 | IL_ERR("Read idx for DMA queue txq id (%d), idx %d, " | 2492 | IL_ERR("Read idx for DMA queue txq id (%d), idx %d, " |
2489 | "is out of range [0-%d] %d %d.\n", txq_id, | 2493 | "is out of range [0-%d] %d %d.\n", txq_id, idx, q->n_bd, |
2490 | idx, q->n_bd, q->write_ptr, q->read_ptr); | 2494 | q->write_ptr, q->read_ptr); |
2491 | return 0; | 2495 | return 0; |
2492 | } | 2496 | } |
2493 | 2497 | ||
2494 | for (idx = il_queue_inc_wrap(idx, q->n_bd); | 2498 | for (idx = il_queue_inc_wrap(idx, q->n_bd); q->read_ptr != idx; |
2495 | q->read_ptr != idx; | ||
2496 | q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd)) { | 2499 | q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd)) { |
2497 | 2500 | ||
2498 | tx_info = &txq->txb[txq->q.read_ptr]; | 2501 | tx_info = &txq->txb[txq->q.read_ptr]; |
@@ -2519,10 +2522,9 @@ int il4965_tx_queue_reclaim(struct il_priv *il, int txq_id, int idx) | |||
2519 | * Go through block-ack's bitmap of ACK'd frames, update driver's record of | 2522 | * Go through block-ack's bitmap of ACK'd frames, update driver's record of |
2520 | * ACK vs. not. This gets sent to mac80211, then to rate scaling algo. | 2523 | * ACK vs. not. This gets sent to mac80211, then to rate scaling algo. |
2521 | */ | 2524 | */ |
2522 | static int il4965_tx_status_reply_compressed_ba(struct il_priv *il, | 2525 | static int |
2523 | struct il_ht_agg *agg, | 2526 | il4965_tx_status_reply_compressed_ba(struct il_priv *il, struct il_ht_agg *agg, |
2524 | struct il_compressed_ba_resp *ba_resp) | 2527 | struct il_compressed_ba_resp *ba_resp) |
2525 | |||
2526 | { | 2528 | { |
2527 | int i, sh, ack; | 2529 | int i, sh, ack; |
2528 | u16 seq_ctl = le16_to_cpu(ba_resp->seq_ctl); | 2530 | u16 seq_ctl = le16_to_cpu(ba_resp->seq_ctl); |
@@ -2531,7 +2533,7 @@ static int il4965_tx_status_reply_compressed_ba(struct il_priv *il, | |||
2531 | struct ieee80211_tx_info *info; | 2533 | struct ieee80211_tx_info *info; |
2532 | u64 bitmap, sent_bitmap; | 2534 | u64 bitmap, sent_bitmap; |
2533 | 2535 | ||
2534 | if (unlikely(!agg->wait_for_ba)) { | 2536 | if (unlikely(!agg->wait_for_ba)) { |
2535 | if (unlikely(ba_resp->bitmap)) | 2537 | if (unlikely(ba_resp->bitmap)) |
2536 | IL_ERR("Received BA when not expected\n"); | 2538 | IL_ERR("Received BA when not expected\n"); |
2537 | return -EINVAL; | 2539 | return -EINVAL; |
@@ -2539,12 +2541,11 @@ static int il4965_tx_status_reply_compressed_ba(struct il_priv *il, | |||
2539 | 2541 | ||
2540 | /* Mark that the expected block-ack response arrived */ | 2542 | /* Mark that the expected block-ack response arrived */ |
2541 | agg->wait_for_ba = 0; | 2543 | agg->wait_for_ba = 0; |
2542 | D_TX_REPLY("BA %d %d\n", agg->start_idx, | 2544 | D_TX_REPLY("BA %d %d\n", agg->start_idx, ba_resp->seq_ctl); |
2543 | ba_resp->seq_ctl); | ||
2544 | 2545 | ||
2545 | /* Calculate shift to align block-ack bits with our Tx win bits */ | 2546 | /* Calculate shift to align block-ack bits with our Tx win bits */ |
2546 | sh = agg->start_idx - SEQ_TO_IDX(seq_ctl >> 4); | 2547 | sh = agg->start_idx - SEQ_TO_IDX(seq_ctl >> 4); |
2547 | if (sh < 0) /* tbw something is wrong with indices */ | 2548 | if (sh < 0) /* tbw something is wrong with indices */ |
2548 | sh += 0x100; | 2549 | sh += 0x100; |
2549 | 2550 | ||
2550 | if (agg->frame_count > (64 - sh)) { | 2551 | if (agg->frame_count > (64 - sh)) { |
@@ -2565,16 +2566,13 @@ static int il4965_tx_status_reply_compressed_ba(struct il_priv *il, | |||
2565 | while (sent_bitmap) { | 2566 | while (sent_bitmap) { |
2566 | ack = sent_bitmap & 1ULL; | 2567 | ack = sent_bitmap & 1ULL; |
2567 | successes += ack; | 2568 | successes += ack; |
2568 | D_TX_REPLY("%s ON i=%d idx=%d raw=%d\n", | 2569 | D_TX_REPLY("%s ON i=%d idx=%d raw=%d\n", ack ? "ACK" : "NACK", |
2569 | ack ? "ACK" : "NACK", i, | 2570 | i, (agg->start_idx + i) & 0xff, agg->start_idx + i); |
2570 | (agg->start_idx + i) & 0xff, | ||
2571 | agg->start_idx + i); | ||
2572 | sent_bitmap >>= 1; | 2571 | sent_bitmap >>= 1; |
2573 | ++i; | 2572 | ++i; |
2574 | } | 2573 | } |
2575 | 2574 | ||
2576 | D_TX_REPLY("Bitmap %llx\n", | 2575 | D_TX_REPLY("Bitmap %llx\n", (unsigned long long)bitmap); |
2577 | (unsigned long long)bitmap); | ||
2578 | 2576 | ||
2579 | info = IEEE80211_SKB_CB(il->txq[scd_flow].txb[agg->start_idx].skb); | 2577 | info = IEEE80211_SKB_CB(il->txq[scd_flow].txb[agg->start_idx].skb); |
2580 | memset(&info->status, 0, sizeof(info->status)); | 2578 | memset(&info->status, 0, sizeof(info->status)); |
@@ -2590,13 +2588,14 @@ static int il4965_tx_status_reply_compressed_ba(struct il_priv *il, | |||
2590 | /** | 2588 | /** |
2591 | * translate ucode response to mac80211 tx status control values | 2589 | * translate ucode response to mac80211 tx status control values |
2592 | */ | 2590 | */ |
2593 | void il4965_hwrate_to_tx_control(struct il_priv *il, u32 rate_n_flags, | 2591 | void |
2594 | struct ieee80211_tx_info *info) | 2592 | il4965_hwrate_to_tx_control(struct il_priv *il, u32 rate_n_flags, |
2593 | struct ieee80211_tx_info *info) | ||
2595 | { | 2594 | { |
2596 | struct ieee80211_tx_rate *r = &info->control.rates[0]; | 2595 | struct ieee80211_tx_rate *r = &info->control.rates[0]; |
2597 | 2596 | ||
2598 | info->antenna_sel_tx = | 2597 | info->antenna_sel_tx = |
2599 | ((rate_n_flags & RATE_MCS_ANT_ABC_MSK) >> RATE_MCS_ANT_POS); | 2598 | ((rate_n_flags & RATE_MCS_ANT_ABC_MSK) >> RATE_MCS_ANT_POS); |
2600 | if (rate_n_flags & RATE_MCS_HT_MSK) | 2599 | if (rate_n_flags & RATE_MCS_HT_MSK) |
2601 | r->flags |= IEEE80211_TX_RC_MCS; | 2600 | r->flags |= IEEE80211_TX_RC_MCS; |
2602 | if (rate_n_flags & RATE_MCS_GF_MSK) | 2601 | if (rate_n_flags & RATE_MCS_GF_MSK) |
@@ -2616,8 +2615,8 @@ void il4965_hwrate_to_tx_control(struct il_priv *il, u32 rate_n_flags, | |||
2616 | * Handles block-acknowledge notification from device, which reports success | 2615 | * Handles block-acknowledge notification from device, which reports success |
2617 | * of frames sent via aggregation. | 2616 | * of frames sent via aggregation. |
2618 | */ | 2617 | */ |
2619 | void il4965_hdl_compressed_ba(struct il_priv *il, | 2618 | void |
2620 | struct il_rx_buf *rxb) | 2619 | il4965_hdl_compressed_ba(struct il_priv *il, struct il_rx_buf *rxb) |
2621 | { | 2620 | { |
2622 | struct il_rx_pkt *pkt = rxb_addr(rxb); | 2621 | struct il_rx_pkt *pkt = rxb_addr(rxb); |
2623 | struct il_compressed_ba_resp *ba_resp = &pkt->u.compressed_ba; | 2622 | struct il_compressed_ba_resp *ba_resp = &pkt->u.compressed_ba; |
@@ -2636,8 +2635,7 @@ void il4965_hdl_compressed_ba(struct il_priv *il, | |||
2636 | u16 ba_resp_scd_ssn = le16_to_cpu(ba_resp->scd_ssn); | 2635 | u16 ba_resp_scd_ssn = le16_to_cpu(ba_resp->scd_ssn); |
2637 | 2636 | ||
2638 | if (scd_flow >= il->hw_params.max_txq_num) { | 2637 | if (scd_flow >= il->hw_params.max_txq_num) { |
2639 | IL_ERR( | 2638 | IL_ERR("BUG_ON scd_flow is bigger than number of queues\n"); |
2640 | "BUG_ON scd_flow is bigger than number of queues\n"); | ||
2641 | return; | 2639 | return; |
2642 | } | 2640 | } |
2643 | 2641 | ||
@@ -2652,9 +2650,8 @@ void il4965_hdl_compressed_ba(struct il_priv *il, | |||
2652 | * since it is possible happen very often and in order | 2650 | * since it is possible happen very often and in order |
2653 | * not to fill the syslog, don't enable the logging by default | 2651 | * not to fill the syslog, don't enable the logging by default |
2654 | */ | 2652 | */ |
2655 | D_TX_REPLY( | 2653 | D_TX_REPLY("BA scd_flow %d does not match txq_id %d\n", |
2656 | "BA scd_flow %d does not match txq_id %d\n", | 2654 | scd_flow, agg->txq_id); |
2657 | scd_flow, agg->txq_id); | ||
2658 | return; | 2655 | return; |
2659 | } | 2656 | } |
2660 | 2657 | ||
@@ -2663,22 +2660,15 @@ void il4965_hdl_compressed_ba(struct il_priv *il, | |||
2663 | 2660 | ||
2664 | spin_lock_irqsave(&il->sta_lock, flags); | 2661 | spin_lock_irqsave(&il->sta_lock, flags); |
2665 | 2662 | ||
2666 | D_TX_REPLY("N_COMPRESSED_BA [%d] Received from %pM, " | 2663 | D_TX_REPLY("N_COMPRESSED_BA [%d] Received from %pM, " "sta_id = %d\n", |
2667 | "sta_id = %d\n", | 2664 | agg->wait_for_ba, (u8 *) & ba_resp->sta_addr_lo32, |
2668 | agg->wait_for_ba, | 2665 | ba_resp->sta_id); |
2669 | (u8 *) &ba_resp->sta_addr_lo32, | 2666 | D_TX_REPLY("TID = %d, SeqCtl = %d, bitmap = 0x%llx," "scd_flow = " |
2670 | ba_resp->sta_id); | 2667 | "%d, scd_ssn = %d\n", ba_resp->tid, ba_resp->seq_ctl, |
2671 | D_TX_REPLY("TID = %d, SeqCtl = %d, bitmap = 0x%llx," | 2668 | (unsigned long long)le64_to_cpu(ba_resp->bitmap), |
2672 | "scd_flow = " | 2669 | ba_resp->scd_flow, ba_resp->scd_ssn); |
2673 | "%d, scd_ssn = %d\n", | 2670 | D_TX_REPLY("DAT start_idx = %d, bitmap = 0x%llx\n", agg->start_idx, |
2674 | ba_resp->tid, | 2671 | (unsigned long long)agg->bitmap); |
2675 | ba_resp->seq_ctl, | ||
2676 | (unsigned long long)le64_to_cpu(ba_resp->bitmap), | ||
2677 | ba_resp->scd_flow, | ||
2678 | ba_resp->scd_ssn); | ||
2679 | D_TX_REPLY("DAT start_idx = %d, bitmap = 0x%llx\n", | ||
2680 | agg->start_idx, | ||
2681 | (unsigned long long)agg->bitmap); | ||
2682 | 2672 | ||
2683 | /* Update driver's record of ACK vs. not for each frame in win */ | 2673 | /* Update driver's record of ACK vs. not for each frame in win */ |
2684 | il4965_tx_status_reply_compressed_ba(il, agg, ba_resp); | 2674 | il4965_tx_status_reply_compressed_ba(il, agg, ba_resp); |
@@ -2703,7 +2693,8 @@ void il4965_hdl_compressed_ba(struct il_priv *il, | |||
2703 | } | 2693 | } |
2704 | 2694 | ||
2705 | #ifdef CONFIG_IWLEGACY_DEBUG | 2695 | #ifdef CONFIG_IWLEGACY_DEBUG |
2706 | const char *il4965_get_tx_fail_reason(u32 status) | 2696 | const char * |
2697 | il4965_get_tx_fail_reason(u32 status) | ||
2707 | { | 2698 | { |
2708 | #define TX_STATUS_FAIL(x) case TX_STATUS_FAIL_ ## x: return #x | 2699 | #define TX_STATUS_FAIL(x) case TX_STATUS_FAIL_ ## x: return #x |
2709 | #define TX_STATUS_POSTPONE(x) case TX_STATUS_POSTPONE_ ## x: return #x | 2700 | #define TX_STATUS_POSTPONE(x) case TX_STATUS_POSTPONE_ ## x: return #x |
@@ -2711,27 +2702,27 @@ const char *il4965_get_tx_fail_reason(u32 status) | |||
2711 | switch (status & TX_STATUS_MSK) { | 2702 | switch (status & TX_STATUS_MSK) { |
2712 | case TX_STATUS_SUCCESS: | 2703 | case TX_STATUS_SUCCESS: |
2713 | return "SUCCESS"; | 2704 | return "SUCCESS"; |
2714 | TX_STATUS_POSTPONE(DELAY); | 2705 | TX_STATUS_POSTPONE(DELAY); |
2715 | TX_STATUS_POSTPONE(FEW_BYTES); | 2706 | TX_STATUS_POSTPONE(FEW_BYTES); |
2716 | TX_STATUS_POSTPONE(QUIET_PERIOD); | 2707 | TX_STATUS_POSTPONE(QUIET_PERIOD); |
2717 | TX_STATUS_POSTPONE(CALC_TTAK); | 2708 | TX_STATUS_POSTPONE(CALC_TTAK); |
2718 | TX_STATUS_FAIL(INTERNAL_CROSSED_RETRY); | 2709 | TX_STATUS_FAIL(INTERNAL_CROSSED_RETRY); |
2719 | TX_STATUS_FAIL(SHORT_LIMIT); | 2710 | TX_STATUS_FAIL(SHORT_LIMIT); |
2720 | TX_STATUS_FAIL(LONG_LIMIT); | 2711 | TX_STATUS_FAIL(LONG_LIMIT); |
2721 | TX_STATUS_FAIL(FIFO_UNDERRUN); | 2712 | TX_STATUS_FAIL(FIFO_UNDERRUN); |
2722 | TX_STATUS_FAIL(DRAIN_FLOW); | 2713 | TX_STATUS_FAIL(DRAIN_FLOW); |
2723 | TX_STATUS_FAIL(RFKILL_FLUSH); | 2714 | TX_STATUS_FAIL(RFKILL_FLUSH); |
2724 | TX_STATUS_FAIL(LIFE_EXPIRE); | 2715 | TX_STATUS_FAIL(LIFE_EXPIRE); |
2725 | TX_STATUS_FAIL(DEST_PS); | 2716 | TX_STATUS_FAIL(DEST_PS); |
2726 | TX_STATUS_FAIL(HOST_ABORTED); | 2717 | TX_STATUS_FAIL(HOST_ABORTED); |
2727 | TX_STATUS_FAIL(BT_RETRY); | 2718 | TX_STATUS_FAIL(BT_RETRY); |
2728 | TX_STATUS_FAIL(STA_INVALID); | 2719 | TX_STATUS_FAIL(STA_INVALID); |
2729 | TX_STATUS_FAIL(FRAG_DROPPED); | 2720 | TX_STATUS_FAIL(FRAG_DROPPED); |
2730 | TX_STATUS_FAIL(TID_DISABLE); | 2721 | TX_STATUS_FAIL(TID_DISABLE); |
2731 | TX_STATUS_FAIL(FIFO_FLUSHED); | 2722 | TX_STATUS_FAIL(FIFO_FLUSHED); |
2732 | TX_STATUS_FAIL(INSUFFICIENT_CF_POLL); | 2723 | TX_STATUS_FAIL(INSUFFICIENT_CF_POLL); |
2733 | TX_STATUS_FAIL(PASSIVE_NO_RX); | 2724 | TX_STATUS_FAIL(PASSIVE_NO_RX); |
2734 | TX_STATUS_FAIL(NO_BEACON_ON_RADAR); | 2725 | TX_STATUS_FAIL(NO_BEACON_ON_RADAR); |
2735 | } | 2726 | } |
2736 | 2727 | ||
2737 | return "UNKNOWN"; | 2728 | return "UNKNOWN"; |
@@ -2764,29 +2755,29 @@ il4965_sta_alloc_lq(struct il_priv *il, u8 sta_id) | |||
2764 | if (r >= IL_FIRST_CCK_RATE && r <= IL_LAST_CCK_RATE) | 2755 | if (r >= IL_FIRST_CCK_RATE && r <= IL_LAST_CCK_RATE) |
2765 | rate_flags |= RATE_MCS_CCK_MSK; | 2756 | rate_flags |= RATE_MCS_CCK_MSK; |
2766 | 2757 | ||
2767 | rate_flags |= il4965_first_antenna(il->hw_params.valid_tx_ant) << | 2758 | rate_flags |= |
2768 | RATE_MCS_ANT_POS; | 2759 | il4965_first_antenna(il->hw_params. |
2769 | rate_n_flags = il4965_hw_set_rate_n_flags(il_rates[r].plcp, | 2760 | valid_tx_ant) << RATE_MCS_ANT_POS; |
2770 | rate_flags); | 2761 | rate_n_flags = il4965_hw_set_rate_n_flags(il_rates[r].plcp, rate_flags); |
2771 | for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++) | 2762 | for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++) |
2772 | link_cmd->rs_table[i].rate_n_flags = rate_n_flags; | 2763 | link_cmd->rs_table[i].rate_n_flags = rate_n_flags; |
2773 | 2764 | ||
2774 | link_cmd->general_params.single_stream_ant_msk = | 2765 | link_cmd->general_params.single_stream_ant_msk = |
2775 | il4965_first_antenna(il->hw_params.valid_tx_ant); | 2766 | il4965_first_antenna(il->hw_params.valid_tx_ant); |
2776 | 2767 | ||
2777 | link_cmd->general_params.dual_stream_ant_msk = | 2768 | link_cmd->general_params.dual_stream_ant_msk = |
2778 | il->hw_params.valid_tx_ant & | 2769 | il->hw_params.valid_tx_ant & ~il4965_first_antenna(il->hw_params. |
2779 | ~il4965_first_antenna(il->hw_params.valid_tx_ant); | 2770 | valid_tx_ant); |
2780 | if (!link_cmd->general_params.dual_stream_ant_msk) { | 2771 | if (!link_cmd->general_params.dual_stream_ant_msk) { |
2781 | link_cmd->general_params.dual_stream_ant_msk = ANT_AB; | 2772 | link_cmd->general_params.dual_stream_ant_msk = ANT_AB; |
2782 | } else if (il4965_num_of_ant(il->hw_params.valid_tx_ant) == 2) { | 2773 | } else if (il4965_num_of_ant(il->hw_params.valid_tx_ant) == 2) { |
2783 | link_cmd->general_params.dual_stream_ant_msk = | 2774 | link_cmd->general_params.dual_stream_ant_msk = |
2784 | il->hw_params.valid_tx_ant; | 2775 | il->hw_params.valid_tx_ant; |
2785 | } | 2776 | } |
2786 | 2777 | ||
2787 | link_cmd->agg_params.agg_dis_start_th = LINK_QUAL_AGG_DISABLE_START_DEF; | 2778 | link_cmd->agg_params.agg_dis_start_th = LINK_QUAL_AGG_DISABLE_START_DEF; |
2788 | link_cmd->agg_params.agg_time_limit = | 2779 | link_cmd->agg_params.agg_time_limit = |
2789 | cpu_to_le16(LINK_QUAL_AGG_TIME_LIMIT_DEF); | 2780 | cpu_to_le16(LINK_QUAL_AGG_TIME_LIMIT_DEF); |
2790 | 2781 | ||
2791 | link_cmd->sta_id = sta_id; | 2782 | link_cmd->sta_id = sta_id; |
2792 | 2783 | ||
@@ -2800,7 +2791,7 @@ il4965_sta_alloc_lq(struct il_priv *il, u8 sta_id) | |||
2800 | */ | 2791 | */ |
2801 | int | 2792 | int |
2802 | il4965_add_bssid_station(struct il_priv *il, struct il_rxon_context *ctx, | 2793 | il4965_add_bssid_station(struct il_priv *il, struct il_rxon_context *ctx, |
2803 | const u8 *addr, u8 *sta_id_r) | 2794 | const u8 * addr, u8 * sta_id_r) |
2804 | { | 2795 | { |
2805 | int ret; | 2796 | int ret; |
2806 | u8 sta_id; | 2797 | u8 sta_id; |
@@ -2826,9 +2817,8 @@ il4965_add_bssid_station(struct il_priv *il, struct il_rxon_context *ctx, | |||
2826 | /* Set up default rate scaling table in device's station table */ | 2817 | /* Set up default rate scaling table in device's station table */ |
2827 | link_cmd = il4965_sta_alloc_lq(il, sta_id); | 2818 | link_cmd = il4965_sta_alloc_lq(il, sta_id); |
2828 | if (!link_cmd) { | 2819 | if (!link_cmd) { |
2829 | IL_ERR( | 2820 | IL_ERR("Unable to initialize rate scaling for station %pM.\n", |
2830 | "Unable to initialize rate scaling for station %pM.\n", | 2821 | addr); |
2831 | addr); | ||
2832 | return -ENOMEM; | 2822 | return -ENOMEM; |
2833 | } | 2823 | } |
2834 | 2824 | ||
@@ -2843,15 +2833,15 @@ il4965_add_bssid_station(struct il_priv *il, struct il_rxon_context *ctx, | |||
2843 | return 0; | 2833 | return 0; |
2844 | } | 2834 | } |
2845 | 2835 | ||
2846 | static int il4965_static_wepkey_cmd(struct il_priv *il, | 2836 | static int |
2847 | struct il_rxon_context *ctx, | 2837 | il4965_static_wepkey_cmd(struct il_priv *il, struct il_rxon_context *ctx, |
2848 | bool send_if_empty) | 2838 | bool send_if_empty) |
2849 | { | 2839 | { |
2850 | int i, not_empty = 0; | 2840 | int i, not_empty = 0; |
2851 | u8 buff[sizeof(struct il_wep_cmd) + | 2841 | u8 buff[sizeof(struct il_wep_cmd) + |
2852 | sizeof(struct il_wep_key) * WEP_KEYS_MAX]; | 2842 | sizeof(struct il_wep_key) * WEP_KEYS_MAX]; |
2853 | struct il_wep_cmd *wep_cmd = (struct il_wep_cmd *)buff; | 2843 | struct il_wep_cmd *wep_cmd = (struct il_wep_cmd *)buff; |
2854 | size_t cmd_size = sizeof(struct il_wep_cmd); | 2844 | size_t cmd_size = sizeof(struct il_wep_cmd); |
2855 | struct il_host_cmd cmd = { | 2845 | struct il_host_cmd cmd = { |
2856 | .id = ctx->wep_key_cmd, | 2846 | .id = ctx->wep_key_cmd, |
2857 | .data = wep_cmd, | 2847 | .data = wep_cmd, |
@@ -2860,10 +2850,10 @@ static int il4965_static_wepkey_cmd(struct il_priv *il, | |||
2860 | 2850 | ||
2861 | might_sleep(); | 2851 | might_sleep(); |
2862 | 2852 | ||
2863 | memset(wep_cmd, 0, cmd_size + | 2853 | memset(wep_cmd, 0, |
2864 | (sizeof(struct il_wep_key) * WEP_KEYS_MAX)); | 2854 | cmd_size + (sizeof(struct il_wep_key) * WEP_KEYS_MAX)); |
2865 | 2855 | ||
2866 | for (i = 0; i < WEP_KEYS_MAX ; i++) { | 2856 | for (i = 0; i < WEP_KEYS_MAX; i++) { |
2867 | wep_cmd->key[i].key_idx = i; | 2857 | wep_cmd->key[i].key_idx = i; |
2868 | if (ctx->wep_keys[i].key_size) { | 2858 | if (ctx->wep_keys[i].key_size) { |
2869 | wep_cmd->key[i].key_offset = i; | 2859 | wep_cmd->key[i].key_offset = i; |
@@ -2874,7 +2864,7 @@ static int il4965_static_wepkey_cmd(struct il_priv *il, | |||
2874 | 2864 | ||
2875 | wep_cmd->key[i].key_size = ctx->wep_keys[i].key_size; | 2865 | wep_cmd->key[i].key_size = ctx->wep_keys[i].key_size; |
2876 | memcpy(&wep_cmd->key[i].key[3], ctx->wep_keys[i].key, | 2866 | memcpy(&wep_cmd->key[i].key[3], ctx->wep_keys[i].key, |
2877 | ctx->wep_keys[i].key_size); | 2867 | ctx->wep_keys[i].key_size); |
2878 | } | 2868 | } |
2879 | 2869 | ||
2880 | wep_cmd->global_key_type = WEP_KEY_WEP_TYPE; | 2870 | wep_cmd->global_key_type = WEP_KEY_WEP_TYPE; |
@@ -2890,42 +2880,39 @@ static int il4965_static_wepkey_cmd(struct il_priv *il, | |||
2890 | return 0; | 2880 | return 0; |
2891 | } | 2881 | } |
2892 | 2882 | ||
2893 | int il4965_restore_default_wep_keys(struct il_priv *il, | 2883 | int |
2894 | struct il_rxon_context *ctx) | 2884 | il4965_restore_default_wep_keys(struct il_priv *il, struct il_rxon_context *ctx) |
2895 | { | 2885 | { |
2896 | lockdep_assert_held(&il->mutex); | 2886 | lockdep_assert_held(&il->mutex); |
2897 | 2887 | ||
2898 | return il4965_static_wepkey_cmd(il, ctx, false); | 2888 | return il4965_static_wepkey_cmd(il, ctx, false); |
2899 | } | 2889 | } |
2900 | 2890 | ||
2901 | int il4965_remove_default_wep_key(struct il_priv *il, | 2891 | int |
2902 | struct il_rxon_context *ctx, | 2892 | il4965_remove_default_wep_key(struct il_priv *il, struct il_rxon_context *ctx, |
2903 | struct ieee80211_key_conf *keyconf) | 2893 | struct ieee80211_key_conf *keyconf) |
2904 | { | 2894 | { |
2905 | int ret; | 2895 | int ret; |
2906 | 2896 | ||
2907 | lockdep_assert_held(&il->mutex); | 2897 | lockdep_assert_held(&il->mutex); |
2908 | 2898 | ||
2909 | D_WEP("Removing default WEP key: idx=%d\n", | 2899 | D_WEP("Removing default WEP key: idx=%d\n", keyconf->keyidx); |
2910 | keyconf->keyidx); | ||
2911 | 2900 | ||
2912 | memset(&ctx->wep_keys[keyconf->keyidx], 0, sizeof(ctx->wep_keys[0])); | 2901 | memset(&ctx->wep_keys[keyconf->keyidx], 0, sizeof(ctx->wep_keys[0])); |
2913 | if (il_is_rfkill(il)) { | 2902 | if (il_is_rfkill(il)) { |
2914 | D_WEP( | 2903 | D_WEP("Not sending C_WEPKEY command due to RFKILL.\n"); |
2915 | "Not sending C_WEPKEY command due to RFKILL.\n"); | ||
2916 | /* but keys in device are clear anyway so return success */ | 2904 | /* but keys in device are clear anyway so return success */ |
2917 | return 0; | 2905 | return 0; |
2918 | } | 2906 | } |
2919 | ret = il4965_static_wepkey_cmd(il, ctx, 1); | 2907 | ret = il4965_static_wepkey_cmd(il, ctx, 1); |
2920 | D_WEP("Remove default WEP key: idx=%d ret=%d\n", | 2908 | D_WEP("Remove default WEP key: idx=%d ret=%d\n", keyconf->keyidx, ret); |
2921 | keyconf->keyidx, ret); | ||
2922 | 2909 | ||
2923 | return ret; | 2910 | return ret; |
2924 | } | 2911 | } |
2925 | 2912 | ||
2926 | int il4965_set_default_wep_key(struct il_priv *il, | 2913 | int |
2927 | struct il_rxon_context *ctx, | 2914 | il4965_set_default_wep_key(struct il_priv *il, struct il_rxon_context *ctx, |
2928 | struct ieee80211_key_conf *keyconf) | 2915 | struct ieee80211_key_conf *keyconf) |
2929 | { | 2916 | { |
2930 | int ret; | 2917 | int ret; |
2931 | 2918 | ||
@@ -2943,19 +2930,18 @@ int il4965_set_default_wep_key(struct il_priv *il, | |||
2943 | 2930 | ||
2944 | ctx->wep_keys[keyconf->keyidx].key_size = keyconf->keylen; | 2931 | ctx->wep_keys[keyconf->keyidx].key_size = keyconf->keylen; |
2945 | memcpy(&ctx->wep_keys[keyconf->keyidx].key, &keyconf->key, | 2932 | memcpy(&ctx->wep_keys[keyconf->keyidx].key, &keyconf->key, |
2946 | keyconf->keylen); | 2933 | keyconf->keylen); |
2947 | 2934 | ||
2948 | ret = il4965_static_wepkey_cmd(il, ctx, false); | 2935 | ret = il4965_static_wepkey_cmd(il, ctx, false); |
2949 | D_WEP("Set default WEP key: len=%d idx=%d ret=%d\n", | 2936 | D_WEP("Set default WEP key: len=%d idx=%d ret=%d\n", keyconf->keylen, |
2950 | keyconf->keylen, keyconf->keyidx, ret); | 2937 | keyconf->keyidx, ret); |
2951 | 2938 | ||
2952 | return ret; | 2939 | return ret; |
2953 | } | 2940 | } |
2954 | 2941 | ||
2955 | static int il4965_set_wep_dynamic_key_info(struct il_priv *il, | 2942 | static int |
2956 | struct il_rxon_context *ctx, | 2943 | il4965_set_wep_dynamic_key_info(struct il_priv *il, struct il_rxon_context *ctx, |
2957 | struct ieee80211_key_conf *keyconf, | 2944 | struct ieee80211_key_conf *keyconf, u8 sta_id) |
2958 | u8 sta_id) | ||
2959 | { | 2945 | { |
2960 | unsigned long flags; | 2946 | unsigned long flags; |
2961 | __le16 key_flags = 0; | 2947 | __le16 key_flags = 0; |
@@ -2981,37 +2967,36 @@ static int il4965_set_wep_dynamic_key_info(struct il_priv *il, | |||
2981 | il->stations[sta_id].keyinfo.keylen = keyconf->keylen; | 2967 | il->stations[sta_id].keyinfo.keylen = keyconf->keylen; |
2982 | il->stations[sta_id].keyinfo.keyidx = keyconf->keyidx; | 2968 | il->stations[sta_id].keyinfo.keyidx = keyconf->keyidx; |
2983 | 2969 | ||
2984 | memcpy(il->stations[sta_id].keyinfo.key, | 2970 | memcpy(il->stations[sta_id].keyinfo.key, keyconf->key, keyconf->keylen); |
2985 | keyconf->key, keyconf->keylen); | ||
2986 | 2971 | ||
2987 | memcpy(&il->stations[sta_id].sta.key.key[3], | 2972 | memcpy(&il->stations[sta_id].sta.key.key[3], keyconf->key, |
2988 | keyconf->key, keyconf->keylen); | 2973 | keyconf->keylen); |
2989 | 2974 | ||
2990 | if ((il->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK) | 2975 | if ((il->stations[sta_id].sta.key. |
2991 | == STA_KEY_FLG_NO_ENC) | 2976 | key_flags & STA_KEY_FLG_ENCRYPT_MSK) == STA_KEY_FLG_NO_ENC) |
2992 | il->stations[sta_id].sta.key.key_offset = | 2977 | il->stations[sta_id].sta.key.key_offset = |
2993 | il_get_free_ucode_key_idx(il); | 2978 | il_get_free_ucode_key_idx(il); |
2994 | /* else, we are overriding an existing key => no need to allocated room | 2979 | /* else, we are overriding an existing key => no need to allocated room |
2995 | * in uCode. */ | 2980 | * in uCode. */ |
2996 | 2981 | ||
2997 | WARN(il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET, | 2982 | WARN(il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET, |
2998 | "no space for a new key"); | 2983 | "no space for a new key"); |
2999 | 2984 | ||
3000 | il->stations[sta_id].sta.key.key_flags = key_flags; | 2985 | il->stations[sta_id].sta.key.key_flags = key_flags; |
3001 | il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; | 2986 | il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; |
3002 | il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; | 2987 | il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; |
3003 | 2988 | ||
3004 | memcpy(&sta_cmd, &il->stations[sta_id].sta, | 2989 | memcpy(&sta_cmd, &il->stations[sta_id].sta, |
3005 | sizeof(struct il_addsta_cmd)); | 2990 | sizeof(struct il_addsta_cmd)); |
3006 | spin_unlock_irqrestore(&il->sta_lock, flags); | 2991 | spin_unlock_irqrestore(&il->sta_lock, flags); |
3007 | 2992 | ||
3008 | return il_send_add_sta(il, &sta_cmd, CMD_SYNC); | 2993 | return il_send_add_sta(il, &sta_cmd, CMD_SYNC); |
3009 | } | 2994 | } |
3010 | 2995 | ||
3011 | static int il4965_set_ccmp_dynamic_key_info(struct il_priv *il, | 2996 | static int |
3012 | struct il_rxon_context *ctx, | 2997 | il4965_set_ccmp_dynamic_key_info(struct il_priv *il, |
3013 | struct ieee80211_key_conf *keyconf, | 2998 | struct il_rxon_context *ctx, |
3014 | u8 sta_id) | 2999 | struct ieee80211_key_conf *keyconf, u8 sta_id) |
3015 | { | 3000 | { |
3016 | unsigned long flags; | 3001 | unsigned long flags; |
3017 | __le16 key_flags = 0; | 3002 | __le16 key_flags = 0; |
@@ -3032,37 +3017,35 @@ static int il4965_set_ccmp_dynamic_key_info(struct il_priv *il, | |||
3032 | il->stations[sta_id].keyinfo.cipher = keyconf->cipher; | 3017 | il->stations[sta_id].keyinfo.cipher = keyconf->cipher; |
3033 | il->stations[sta_id].keyinfo.keylen = keyconf->keylen; | 3018 | il->stations[sta_id].keyinfo.keylen = keyconf->keylen; |
3034 | 3019 | ||
3035 | memcpy(il->stations[sta_id].keyinfo.key, keyconf->key, | 3020 | memcpy(il->stations[sta_id].keyinfo.key, keyconf->key, keyconf->keylen); |
3036 | keyconf->keylen); | ||
3037 | 3021 | ||
3038 | memcpy(il->stations[sta_id].sta.key.key, keyconf->key, | 3022 | memcpy(il->stations[sta_id].sta.key.key, keyconf->key, keyconf->keylen); |
3039 | keyconf->keylen); | ||
3040 | 3023 | ||
3041 | if ((il->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK) | 3024 | if ((il->stations[sta_id].sta.key. |
3042 | == STA_KEY_FLG_NO_ENC) | 3025 | key_flags & STA_KEY_FLG_ENCRYPT_MSK) == STA_KEY_FLG_NO_ENC) |
3043 | il->stations[sta_id].sta.key.key_offset = | 3026 | il->stations[sta_id].sta.key.key_offset = |
3044 | il_get_free_ucode_key_idx(il); | 3027 | il_get_free_ucode_key_idx(il); |
3045 | /* else, we are overriding an existing key => no need to allocated room | 3028 | /* else, we are overriding an existing key => no need to allocated room |
3046 | * in uCode. */ | 3029 | * in uCode. */ |
3047 | 3030 | ||
3048 | WARN(il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET, | 3031 | WARN(il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET, |
3049 | "no space for a new key"); | 3032 | "no space for a new key"); |
3050 | 3033 | ||
3051 | il->stations[sta_id].sta.key.key_flags = key_flags; | 3034 | il->stations[sta_id].sta.key.key_flags = key_flags; |
3052 | il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; | 3035 | il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; |
3053 | il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; | 3036 | il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; |
3054 | 3037 | ||
3055 | memcpy(&sta_cmd, &il->stations[sta_id].sta, | 3038 | memcpy(&sta_cmd, &il->stations[sta_id].sta, |
3056 | sizeof(struct il_addsta_cmd)); | 3039 | sizeof(struct il_addsta_cmd)); |
3057 | spin_unlock_irqrestore(&il->sta_lock, flags); | 3040 | spin_unlock_irqrestore(&il->sta_lock, flags); |
3058 | 3041 | ||
3059 | return il_send_add_sta(il, &sta_cmd, CMD_SYNC); | 3042 | return il_send_add_sta(il, &sta_cmd, CMD_SYNC); |
3060 | } | 3043 | } |
3061 | 3044 | ||
3062 | static int il4965_set_tkip_dynamic_key_info(struct il_priv *il, | 3045 | static int |
3063 | struct il_rxon_context *ctx, | 3046 | il4965_set_tkip_dynamic_key_info(struct il_priv *il, |
3064 | struct ieee80211_key_conf *keyconf, | 3047 | struct il_rxon_context *ctx, |
3065 | u8 sta_id) | 3048 | struct ieee80211_key_conf *keyconf, u8 sta_id) |
3066 | { | 3049 | { |
3067 | unsigned long flags; | 3050 | unsigned long flags; |
3068 | int ret = 0; | 3051 | int ret = 0; |
@@ -3083,19 +3066,18 @@ static int il4965_set_tkip_dynamic_key_info(struct il_priv *il, | |||
3083 | il->stations[sta_id].keyinfo.cipher = keyconf->cipher; | 3066 | il->stations[sta_id].keyinfo.cipher = keyconf->cipher; |
3084 | il->stations[sta_id].keyinfo.keylen = 16; | 3067 | il->stations[sta_id].keyinfo.keylen = 16; |
3085 | 3068 | ||
3086 | if ((il->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK) | 3069 | if ((il->stations[sta_id].sta.key. |
3087 | == STA_KEY_FLG_NO_ENC) | 3070 | key_flags & STA_KEY_FLG_ENCRYPT_MSK) == STA_KEY_FLG_NO_ENC) |
3088 | il->stations[sta_id].sta.key.key_offset = | 3071 | il->stations[sta_id].sta.key.key_offset = |
3089 | il_get_free_ucode_key_idx(il); | 3072 | il_get_free_ucode_key_idx(il); |
3090 | /* else, we are overriding an existing key => no need to allocated room | 3073 | /* else, we are overriding an existing key => no need to allocated room |
3091 | * in uCode. */ | 3074 | * in uCode. */ |
3092 | 3075 | ||
3093 | WARN(il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET, | 3076 | WARN(il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET, |
3094 | "no space for a new key"); | 3077 | "no space for a new key"); |
3095 | 3078 | ||
3096 | il->stations[sta_id].sta.key.key_flags = key_flags; | 3079 | il->stations[sta_id].sta.key.key_flags = key_flags; |
3097 | 3080 | ||
3098 | |||
3099 | /* This copy is acutally not needed: we get the key with each TX */ | 3081 | /* This copy is acutally not needed: we get the key with each TX */ |
3100 | memcpy(il->stations[sta_id].keyinfo.key, keyconf->key, 16); | 3082 | memcpy(il->stations[sta_id].keyinfo.key, keyconf->key, 16); |
3101 | 3083 | ||
@@ -3106,10 +3088,10 @@ static int il4965_set_tkip_dynamic_key_info(struct il_priv *il, | |||
3106 | return ret; | 3088 | return ret; |
3107 | } | 3089 | } |
3108 | 3090 | ||
3109 | void il4965_update_tkip_key(struct il_priv *il, | 3091 | void |
3110 | struct il_rxon_context *ctx, | 3092 | il4965_update_tkip_key(struct il_priv *il, struct il_rxon_context *ctx, |
3111 | struct ieee80211_key_conf *keyconf, | 3093 | struct ieee80211_key_conf *keyconf, |
3112 | struct ieee80211_sta *sta, u32 iv32, u16 *phase1key) | 3094 | struct ieee80211_sta *sta, u32 iv32, u16 * phase1key) |
3113 | { | 3095 | { |
3114 | u8 sta_id; | 3096 | u8 sta_id; |
3115 | unsigned long flags; | 3097 | unsigned long flags; |
@@ -3131,7 +3113,7 @@ void il4965_update_tkip_key(struct il_priv *il, | |||
3131 | 3113 | ||
3132 | for (i = 0; i < 5; i++) | 3114 | for (i = 0; i < 5; i++) |
3133 | il->stations[sta_id].sta.key.tkip_rx_ttak[i] = | 3115 | il->stations[sta_id].sta.key.tkip_rx_ttak[i] = |
3134 | cpu_to_le16(phase1key[i]); | 3116 | cpu_to_le16(phase1key[i]); |
3135 | 3117 | ||
3136 | il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; | 3118 | il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; |
3137 | il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; | 3119 | il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; |
@@ -3142,10 +3124,9 @@ void il4965_update_tkip_key(struct il_priv *il, | |||
3142 | 3124 | ||
3143 | } | 3125 | } |
3144 | 3126 | ||
3145 | int il4965_remove_dynamic_key(struct il_priv *il, | 3127 | int |
3146 | struct il_rxon_context *ctx, | 3128 | il4965_remove_dynamic_key(struct il_priv *il, struct il_rxon_context *ctx, |
3147 | struct ieee80211_key_conf *keyconf, | 3129 | struct ieee80211_key_conf *keyconf, u8 sta_id) |
3148 | u8 sta_id) | ||
3149 | { | 3130 | { |
3150 | unsigned long flags; | 3131 | unsigned long flags; |
3151 | u16 key_flags; | 3132 | u16 key_flags; |
@@ -3160,8 +3141,7 @@ int il4965_remove_dynamic_key(struct il_priv *il, | |||
3160 | key_flags = le16_to_cpu(il->stations[sta_id].sta.key.key_flags); | 3141 | key_flags = le16_to_cpu(il->stations[sta_id].sta.key.key_flags); |
3161 | keyidx = (key_flags >> STA_KEY_FLG_KEYID_POS) & 0x3; | 3142 | keyidx = (key_flags >> STA_KEY_FLG_KEYID_POS) & 0x3; |
3162 | 3143 | ||
3163 | D_WEP("Remove dynamic key: idx=%d sta=%d\n", | 3144 | D_WEP("Remove dynamic key: idx=%d sta=%d\n", keyconf->keyidx, sta_id); |
3164 | keyconf->keyidx, sta_id); | ||
3165 | 3145 | ||
3166 | if (keyconf->keyidx != keyidx) { | 3146 | if (keyconf->keyidx != keyidx) { |
3167 | /* We need to remove a key with idx different that the one | 3147 | /* We need to remove a key with idx different that the one |
@@ -3174,41 +3154,40 @@ int il4965_remove_dynamic_key(struct il_priv *il, | |||
3174 | } | 3154 | } |
3175 | 3155 | ||
3176 | if (il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET) { | 3156 | if (il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET) { |
3177 | IL_WARN("Removing wrong key %d 0x%x\n", | 3157 | IL_WARN("Removing wrong key %d 0x%x\n", keyconf->keyidx, |
3178 | keyconf->keyidx, key_flags); | 3158 | key_flags); |
3179 | spin_unlock_irqrestore(&il->sta_lock, flags); | 3159 | spin_unlock_irqrestore(&il->sta_lock, flags); |
3180 | return 0; | 3160 | return 0; |
3181 | } | 3161 | } |
3182 | 3162 | ||
3183 | if (!test_and_clear_bit(il->stations[sta_id].sta.key.key_offset, | 3163 | if (!test_and_clear_bit |
3184 | &il->ucode_key_table)) | 3164 | (il->stations[sta_id].sta.key.key_offset, &il->ucode_key_table)) |
3185 | IL_ERR("idx %d not used in uCode key table.\n", | 3165 | IL_ERR("idx %d not used in uCode key table.\n", |
3186 | il->stations[sta_id].sta.key.key_offset); | 3166 | il->stations[sta_id].sta.key.key_offset); |
3187 | memset(&il->stations[sta_id].keyinfo, 0, | 3167 | memset(&il->stations[sta_id].keyinfo, 0, sizeof(struct il_hw_key)); |
3188 | sizeof(struct il_hw_key)); | 3168 | memset(&il->stations[sta_id].sta.key, 0, sizeof(struct il4965_keyinfo)); |
3189 | memset(&il->stations[sta_id].sta.key, 0, | ||
3190 | sizeof(struct il4965_keyinfo)); | ||
3191 | il->stations[sta_id].sta.key.key_flags = | 3169 | il->stations[sta_id].sta.key.key_flags = |
3192 | STA_KEY_FLG_NO_ENC | STA_KEY_FLG_INVALID; | 3170 | STA_KEY_FLG_NO_ENC | STA_KEY_FLG_INVALID; |
3193 | il->stations[sta_id].sta.key.key_offset = WEP_INVALID_OFFSET; | 3171 | il->stations[sta_id].sta.key.key_offset = WEP_INVALID_OFFSET; |
3194 | il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; | 3172 | il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; |
3195 | il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; | 3173 | il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; |
3196 | 3174 | ||
3197 | if (il_is_rfkill(il)) { | 3175 | if (il_is_rfkill(il)) { |
3198 | D_WEP( | 3176 | D_WEP |
3199 | "Not sending C_ADD_STA command because RFKILL enabled.\n"); | 3177 | ("Not sending C_ADD_STA command because RFKILL enabled.\n"); |
3200 | spin_unlock_irqrestore(&il->sta_lock, flags); | 3178 | spin_unlock_irqrestore(&il->sta_lock, flags); |
3201 | return 0; | 3179 | return 0; |
3202 | } | 3180 | } |
3203 | memcpy(&sta_cmd, &il->stations[sta_id].sta, | 3181 | memcpy(&sta_cmd, &il->stations[sta_id].sta, |
3204 | sizeof(struct il_addsta_cmd)); | 3182 | sizeof(struct il_addsta_cmd)); |
3205 | spin_unlock_irqrestore(&il->sta_lock, flags); | 3183 | spin_unlock_irqrestore(&il->sta_lock, flags); |
3206 | 3184 | ||
3207 | return il_send_add_sta(il, &sta_cmd, CMD_SYNC); | 3185 | return il_send_add_sta(il, &sta_cmd, CMD_SYNC); |
3208 | } | 3186 | } |
3209 | 3187 | ||
3210 | int il4965_set_dynamic_key(struct il_priv *il, struct il_rxon_context *ctx, | 3188 | int |
3211 | struct ieee80211_key_conf *keyconf, u8 sta_id) | 3189 | il4965_set_dynamic_key(struct il_priv *il, struct il_rxon_context *ctx, |
3190 | struct ieee80211_key_conf *keyconf, u8 sta_id) | ||
3212 | { | 3191 | { |
3213 | int ret; | 3192 | int ret; |
3214 | 3193 | ||
@@ -3219,29 +3198,25 @@ int il4965_set_dynamic_key(struct il_priv *il, struct il_rxon_context *ctx, | |||
3219 | 3198 | ||
3220 | switch (keyconf->cipher) { | 3199 | switch (keyconf->cipher) { |
3221 | case WLAN_CIPHER_SUITE_CCMP: | 3200 | case WLAN_CIPHER_SUITE_CCMP: |
3222 | ret = il4965_set_ccmp_dynamic_key_info(il, ctx, | 3201 | ret = |
3223 | keyconf, sta_id); | 3202 | il4965_set_ccmp_dynamic_key_info(il, ctx, keyconf, sta_id); |
3224 | break; | 3203 | break; |
3225 | case WLAN_CIPHER_SUITE_TKIP: | 3204 | case WLAN_CIPHER_SUITE_TKIP: |
3226 | ret = il4965_set_tkip_dynamic_key_info(il, ctx, | 3205 | ret = |
3227 | keyconf, sta_id); | 3206 | il4965_set_tkip_dynamic_key_info(il, ctx, keyconf, sta_id); |
3228 | break; | 3207 | break; |
3229 | case WLAN_CIPHER_SUITE_WEP40: | 3208 | case WLAN_CIPHER_SUITE_WEP40: |
3230 | case WLAN_CIPHER_SUITE_WEP104: | 3209 | case WLAN_CIPHER_SUITE_WEP104: |
3231 | ret = il4965_set_wep_dynamic_key_info(il, ctx, | 3210 | ret = il4965_set_wep_dynamic_key_info(il, ctx, keyconf, sta_id); |
3232 | keyconf, sta_id); | ||
3233 | break; | 3211 | break; |
3234 | default: | 3212 | default: |
3235 | IL_ERR( | 3213 | IL_ERR("Unknown alg: %s cipher = %x\n", __func__, |
3236 | "Unknown alg: %s cipher = %x\n", __func__, | 3214 | keyconf->cipher); |
3237 | keyconf->cipher); | ||
3238 | ret = -EINVAL; | 3215 | ret = -EINVAL; |
3239 | } | 3216 | } |
3240 | 3217 | ||
3241 | D_WEP( | 3218 | D_WEP("Set dynamic key: cipher=%x len=%d idx=%d sta=%d ret=%d\n", |
3242 | "Set dynamic key: cipher=%x len=%d idx=%d sta=%d ret=%d\n", | 3219 | keyconf->cipher, keyconf->keylen, keyconf->keyidx, sta_id, ret); |
3243 | keyconf->cipher, keyconf->keylen, keyconf->keyidx, | ||
3244 | sta_id, ret); | ||
3245 | 3220 | ||
3246 | return ret; | 3221 | return ret; |
3247 | } | 3222 | } |
@@ -3253,16 +3228,15 @@ int il4965_set_dynamic_key(struct il_priv *il, struct il_rxon_context *ctx, | |||
3253 | * and marks it driver active, so that it will be restored to the | 3228 | * and marks it driver active, so that it will be restored to the |
3254 | * device at the next best time. | 3229 | * device at the next best time. |
3255 | */ | 3230 | */ |
3256 | int il4965_alloc_bcast_station(struct il_priv *il, | 3231 | int |
3257 | struct il_rxon_context *ctx) | 3232 | il4965_alloc_bcast_station(struct il_priv *il, struct il_rxon_context *ctx) |
3258 | { | 3233 | { |
3259 | struct il_link_quality_cmd *link_cmd; | 3234 | struct il_link_quality_cmd *link_cmd; |
3260 | unsigned long flags; | 3235 | unsigned long flags; |
3261 | u8 sta_id; | 3236 | u8 sta_id; |
3262 | 3237 | ||
3263 | spin_lock_irqsave(&il->sta_lock, flags); | 3238 | spin_lock_irqsave(&il->sta_lock, flags); |
3264 | sta_id = il_prep_station(il, ctx, il_bcast_addr, | 3239 | sta_id = il_prep_station(il, ctx, il_bcast_addr, false, NULL); |
3265 | false, NULL); | ||
3266 | if (sta_id == IL_INVALID_STATION) { | 3240 | if (sta_id == IL_INVALID_STATION) { |
3267 | IL_ERR("Unable to prepare broadcast station\n"); | 3241 | IL_ERR("Unable to prepare broadcast station\n"); |
3268 | spin_unlock_irqrestore(&il->sta_lock, flags); | 3242 | spin_unlock_irqrestore(&il->sta_lock, flags); |
@@ -3276,8 +3250,8 @@ int il4965_alloc_bcast_station(struct il_priv *il, | |||
3276 | 3250 | ||
3277 | link_cmd = il4965_sta_alloc_lq(il, sta_id); | 3251 | link_cmd = il4965_sta_alloc_lq(il, sta_id); |
3278 | if (!link_cmd) { | 3252 | if (!link_cmd) { |
3279 | IL_ERR( | 3253 | IL_ERR |
3280 | "Unable to initialize rate scaling for bcast station.\n"); | 3254 | ("Unable to initialize rate scaling for bcast station.\n"); |
3281 | return -ENOMEM; | 3255 | return -ENOMEM; |
3282 | } | 3256 | } |
3283 | 3257 | ||
@@ -3294,8 +3268,8 @@ int il4965_alloc_bcast_station(struct il_priv *il, | |||
3294 | * Only used by iwl4965. Placed here to have all bcast station management | 3268 | * Only used by iwl4965. Placed here to have all bcast station management |
3295 | * code together. | 3269 | * code together. |
3296 | */ | 3270 | */ |
3297 | static int il4965_update_bcast_station(struct il_priv *il, | 3271 | static int |
3298 | struct il_rxon_context *ctx) | 3272 | il4965_update_bcast_station(struct il_priv *il, struct il_rxon_context *ctx) |
3299 | { | 3273 | { |
3300 | unsigned long flags; | 3274 | unsigned long flags; |
3301 | struct il_link_quality_cmd *link_cmd; | 3275 | struct il_link_quality_cmd *link_cmd; |
@@ -3303,8 +3277,8 @@ static int il4965_update_bcast_station(struct il_priv *il, | |||
3303 | 3277 | ||
3304 | link_cmd = il4965_sta_alloc_lq(il, sta_id); | 3278 | link_cmd = il4965_sta_alloc_lq(il, sta_id); |
3305 | if (!link_cmd) { | 3279 | if (!link_cmd) { |
3306 | IL_ERR( | 3280 | IL_ERR |
3307 | "Unable to initialize rate scaling for bcast station.\n"); | 3281 | ("Unable to initialize rate scaling for bcast station.\n"); |
3308 | return -ENOMEM; | 3282 | return -ENOMEM; |
3309 | } | 3283 | } |
3310 | 3284 | ||
@@ -3312,15 +3286,16 @@ static int il4965_update_bcast_station(struct il_priv *il, | |||
3312 | if (il->stations[sta_id].lq) | 3286 | if (il->stations[sta_id].lq) |
3313 | kfree(il->stations[sta_id].lq); | 3287 | kfree(il->stations[sta_id].lq); |
3314 | else | 3288 | else |
3315 | D_INFO( | 3289 | D_INFO |
3316 | "Bcast station rate scaling has not been initialized yet.\n"); | 3290 | ("Bcast station rate scaling has not been initialized yet.\n"); |
3317 | il->stations[sta_id].lq = link_cmd; | 3291 | il->stations[sta_id].lq = link_cmd; |
3318 | spin_unlock_irqrestore(&il->sta_lock, flags); | 3292 | spin_unlock_irqrestore(&il->sta_lock, flags); |
3319 | 3293 | ||
3320 | return 0; | 3294 | return 0; |
3321 | } | 3295 | } |
3322 | 3296 | ||
3323 | int il4965_update_bcast_stations(struct il_priv *il) | 3297 | int |
3298 | il4965_update_bcast_stations(struct il_priv *il) | ||
3324 | { | 3299 | { |
3325 | return il4965_update_bcast_station(il, &il->ctx); | 3300 | return il4965_update_bcast_station(il, &il->ctx); |
3326 | } | 3301 | } |
@@ -3328,7 +3303,8 @@ int il4965_update_bcast_stations(struct il_priv *il) | |||
3328 | /** | 3303 | /** |
3329 | * il4965_sta_tx_modify_enable_tid - Enable Tx for this TID in station table | 3304 | * il4965_sta_tx_modify_enable_tid - Enable Tx for this TID in station table |
3330 | */ | 3305 | */ |
3331 | int il4965_sta_tx_modify_enable_tid(struct il_priv *il, int sta_id, int tid) | 3306 | int |
3307 | il4965_sta_tx_modify_enable_tid(struct il_priv *il, int sta_id, int tid) | ||
3332 | { | 3308 | { |
3333 | unsigned long flags; | 3309 | unsigned long flags; |
3334 | struct il_addsta_cmd sta_cmd; | 3310 | struct il_addsta_cmd sta_cmd; |
@@ -3341,14 +3317,15 @@ int il4965_sta_tx_modify_enable_tid(struct il_priv *il, int sta_id, int tid) | |||
3341 | il->stations[sta_id].sta.tid_disable_tx &= cpu_to_le16(~(1 << tid)); | 3317 | il->stations[sta_id].sta.tid_disable_tx &= cpu_to_le16(~(1 << tid)); |
3342 | il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; | 3318 | il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; |
3343 | memcpy(&sta_cmd, &il->stations[sta_id].sta, | 3319 | memcpy(&sta_cmd, &il->stations[sta_id].sta, |
3344 | sizeof(struct il_addsta_cmd)); | 3320 | sizeof(struct il_addsta_cmd)); |
3345 | spin_unlock_irqrestore(&il->sta_lock, flags); | 3321 | spin_unlock_irqrestore(&il->sta_lock, flags); |
3346 | 3322 | ||
3347 | return il_send_add_sta(il, &sta_cmd, CMD_SYNC); | 3323 | return il_send_add_sta(il, &sta_cmd, CMD_SYNC); |
3348 | } | 3324 | } |
3349 | 3325 | ||
3350 | int il4965_sta_rx_agg_start(struct il_priv *il, struct ieee80211_sta *sta, | 3326 | int |
3351 | int tid, u16 ssn) | 3327 | il4965_sta_rx_agg_start(struct il_priv *il, struct ieee80211_sta *sta, int tid, |
3328 | u16 ssn) | ||
3352 | { | 3329 | { |
3353 | unsigned long flags; | 3330 | unsigned long flags; |
3354 | int sta_id; | 3331 | int sta_id; |
@@ -3363,18 +3340,18 @@ int il4965_sta_rx_agg_start(struct il_priv *il, struct ieee80211_sta *sta, | |||
3363 | spin_lock_irqsave(&il->sta_lock, flags); | 3340 | spin_lock_irqsave(&il->sta_lock, flags); |
3364 | il->stations[sta_id].sta.station_flags_msk = 0; | 3341 | il->stations[sta_id].sta.station_flags_msk = 0; |
3365 | il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_ADDBA_TID_MSK; | 3342 | il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_ADDBA_TID_MSK; |
3366 | il->stations[sta_id].sta.add_immediate_ba_tid = (u8)tid; | 3343 | il->stations[sta_id].sta.add_immediate_ba_tid = (u8) tid; |
3367 | il->stations[sta_id].sta.add_immediate_ba_ssn = cpu_to_le16(ssn); | 3344 | il->stations[sta_id].sta.add_immediate_ba_ssn = cpu_to_le16(ssn); |
3368 | il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; | 3345 | il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; |
3369 | memcpy(&sta_cmd, &il->stations[sta_id].sta, | 3346 | memcpy(&sta_cmd, &il->stations[sta_id].sta, |
3370 | sizeof(struct il_addsta_cmd)); | 3347 | sizeof(struct il_addsta_cmd)); |
3371 | spin_unlock_irqrestore(&il->sta_lock, flags); | 3348 | spin_unlock_irqrestore(&il->sta_lock, flags); |
3372 | 3349 | ||
3373 | return il_send_add_sta(il, &sta_cmd, CMD_SYNC); | 3350 | return il_send_add_sta(il, &sta_cmd, CMD_SYNC); |
3374 | } | 3351 | } |
3375 | 3352 | ||
3376 | int il4965_sta_rx_agg_stop(struct il_priv *il, struct ieee80211_sta *sta, | 3353 | int |
3377 | int tid) | 3354 | il4965_sta_rx_agg_stop(struct il_priv *il, struct ieee80211_sta *sta, int tid) |
3378 | { | 3355 | { |
3379 | unsigned long flags; | 3356 | unsigned long flags; |
3380 | int sta_id; | 3357 | int sta_id; |
@@ -3391,10 +3368,10 @@ int il4965_sta_rx_agg_stop(struct il_priv *il, struct ieee80211_sta *sta, | |||
3391 | spin_lock_irqsave(&il->sta_lock, flags); | 3368 | spin_lock_irqsave(&il->sta_lock, flags); |
3392 | il->stations[sta_id].sta.station_flags_msk = 0; | 3369 | il->stations[sta_id].sta.station_flags_msk = 0; |
3393 | il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_DELBA_TID_MSK; | 3370 | il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_DELBA_TID_MSK; |
3394 | il->stations[sta_id].sta.remove_immediate_ba_tid = (u8)tid; | 3371 | il->stations[sta_id].sta.remove_immediate_ba_tid = (u8) tid; |
3395 | il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; | 3372 | il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; |
3396 | memcpy(&sta_cmd, &il->stations[sta_id].sta, | 3373 | memcpy(&sta_cmd, &il->stations[sta_id].sta, |
3397 | sizeof(struct il_addsta_cmd)); | 3374 | sizeof(struct il_addsta_cmd)); |
3398 | spin_unlock_irqrestore(&il->sta_lock, flags); | 3375 | spin_unlock_irqrestore(&il->sta_lock, flags); |
3399 | 3376 | ||
3400 | return il_send_add_sta(il, &sta_cmd, CMD_SYNC); | 3377 | return il_send_add_sta(il, &sta_cmd, CMD_SYNC); |
@@ -3409,16 +3386,16 @@ il4965_sta_modify_sleep_tx_count(struct il_priv *il, int sta_id, int cnt) | |||
3409 | il->stations[sta_id].sta.station_flags |= STA_FLG_PWR_SAVE_MSK; | 3386 | il->stations[sta_id].sta.station_flags |= STA_FLG_PWR_SAVE_MSK; |
3410 | il->stations[sta_id].sta.station_flags_msk = STA_FLG_PWR_SAVE_MSK; | 3387 | il->stations[sta_id].sta.station_flags_msk = STA_FLG_PWR_SAVE_MSK; |
3411 | il->stations[sta_id].sta.sta.modify_mask = | 3388 | il->stations[sta_id].sta.sta.modify_mask = |
3412 | STA_MODIFY_SLEEP_TX_COUNT_MSK; | 3389 | STA_MODIFY_SLEEP_TX_COUNT_MSK; |
3413 | il->stations[sta_id].sta.sleep_tx_count = cpu_to_le16(cnt); | 3390 | il->stations[sta_id].sta.sleep_tx_count = cpu_to_le16(cnt); |
3414 | il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; | 3391 | il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; |
3415 | il_send_add_sta(il, | 3392 | il_send_add_sta(il, &il->stations[sta_id].sta, CMD_ASYNC); |
3416 | &il->stations[sta_id].sta, CMD_ASYNC); | ||
3417 | spin_unlock_irqrestore(&il->sta_lock, flags); | 3393 | spin_unlock_irqrestore(&il->sta_lock, flags); |
3418 | 3394 | ||
3419 | } | 3395 | } |
3420 | 3396 | ||
3421 | void il4965_update_chain_flags(struct il_priv *il) | 3397 | void |
3398 | il4965_update_chain_flags(struct il_priv *il) | ||
3422 | { | 3399 | { |
3423 | if (il->cfg->ops->hcmd->set_rxon_chain) { | 3400 | if (il->cfg->ops->hcmd->set_rxon_chain) { |
3424 | il->cfg->ops->hcmd->set_rxon_chain(il, &il->ctx); | 3401 | il->cfg->ops->hcmd->set_rxon_chain(il, &il->ctx); |
@@ -3427,12 +3404,12 @@ void il4965_update_chain_flags(struct il_priv *il) | |||
3427 | } | 3404 | } |
3428 | } | 3405 | } |
3429 | 3406 | ||
3430 | static void il4965_clear_free_frames(struct il_priv *il) | 3407 | static void |
3408 | il4965_clear_free_frames(struct il_priv *il) | ||
3431 | { | 3409 | { |
3432 | struct list_head *element; | 3410 | struct list_head *element; |
3433 | 3411 | ||
3434 | D_INFO("%d frames on pre-allocated heap on clear.\n", | 3412 | D_INFO("%d frames on pre-allocated heap on clear.\n", il->frames_count); |
3435 | il->frames_count); | ||
3436 | 3413 | ||
3437 | while (!list_empty(&il->free_frames)) { | 3414 | while (!list_empty(&il->free_frames)) { |
3438 | element = il->free_frames.next; | 3415 | element = il->free_frames.next; |
@@ -3443,12 +3420,13 @@ static void il4965_clear_free_frames(struct il_priv *il) | |||
3443 | 3420 | ||
3444 | if (il->frames_count) { | 3421 | if (il->frames_count) { |
3445 | IL_WARN("%d frames still in use. Did we lose one?\n", | 3422 | IL_WARN("%d frames still in use. Did we lose one?\n", |
3446 | il->frames_count); | 3423 | il->frames_count); |
3447 | il->frames_count = 0; | 3424 | il->frames_count = 0; |
3448 | } | 3425 | } |
3449 | } | 3426 | } |
3450 | 3427 | ||
3451 | static struct il_frame *il4965_get_free_frame(struct il_priv *il) | 3428 | static struct il_frame * |
3429 | il4965_get_free_frame(struct il_priv *il) | ||
3452 | { | 3430 | { |
3453 | struct il_frame *frame; | 3431 | struct il_frame *frame; |
3454 | struct list_head *element; | 3432 | struct list_head *element; |
@@ -3468,15 +3446,16 @@ static struct il_frame *il4965_get_free_frame(struct il_priv *il) | |||
3468 | return list_entry(element, struct il_frame, list); | 3446 | return list_entry(element, struct il_frame, list); |
3469 | } | 3447 | } |
3470 | 3448 | ||
3471 | static void il4965_free_frame(struct il_priv *il, struct il_frame *frame) | 3449 | static void |
3450 | il4965_free_frame(struct il_priv *il, struct il_frame *frame) | ||
3472 | { | 3451 | { |
3473 | memset(frame, 0, sizeof(*frame)); | 3452 | memset(frame, 0, sizeof(*frame)); |
3474 | list_add(&frame->list, &il->free_frames); | 3453 | list_add(&frame->list, &il->free_frames); |
3475 | } | 3454 | } |
3476 | 3455 | ||
3477 | static u32 il4965_fill_beacon_frame(struct il_priv *il, | 3456 | static u32 |
3478 | struct ieee80211_hdr *hdr, | 3457 | il4965_fill_beacon_frame(struct il_priv *il, struct ieee80211_hdr *hdr, |
3479 | int left) | 3458 | int left) |
3480 | { | 3459 | { |
3481 | lockdep_assert_held(&il->mutex); | 3460 | lockdep_assert_held(&il->mutex); |
3482 | 3461 | ||
@@ -3492,9 +3471,10 @@ static u32 il4965_fill_beacon_frame(struct il_priv *il, | |||
3492 | } | 3471 | } |
3493 | 3472 | ||
3494 | /* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */ | 3473 | /* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */ |
3495 | static void il4965_set_beacon_tim(struct il_priv *il, | 3474 | static void |
3496 | struct il_tx_beacon_cmd *tx_beacon_cmd, | 3475 | il4965_set_beacon_tim(struct il_priv *il, |
3497 | u8 *beacon, u32 frame_size) | 3476 | struct il_tx_beacon_cmd *tx_beacon_cmd, u8 * beacon, |
3477 | u32 frame_size) | ||
3498 | { | 3478 | { |
3499 | u16 tim_idx; | 3479 | u16 tim_idx; |
3500 | struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)beacon; | 3480 | struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)beacon; |
@@ -3507,19 +3487,19 @@ static void il4965_set_beacon_tim(struct il_priv *il, | |||
3507 | 3487 | ||
3508 | /* Parse variable-length elements of beacon to find WLAN_EID_TIM */ | 3488 | /* Parse variable-length elements of beacon to find WLAN_EID_TIM */ |
3509 | while ((tim_idx < (frame_size - 2)) && | 3489 | while ((tim_idx < (frame_size - 2)) && |
3510 | (beacon[tim_idx] != WLAN_EID_TIM)) | 3490 | (beacon[tim_idx] != WLAN_EID_TIM)) |
3511 | tim_idx += beacon[tim_idx+1] + 2; | 3491 | tim_idx += beacon[tim_idx + 1] + 2; |
3512 | 3492 | ||
3513 | /* If TIM field was found, set variables */ | 3493 | /* If TIM field was found, set variables */ |
3514 | if ((tim_idx < (frame_size - 1)) && (beacon[tim_idx] == WLAN_EID_TIM)) { | 3494 | if ((tim_idx < (frame_size - 1)) && (beacon[tim_idx] == WLAN_EID_TIM)) { |
3515 | tx_beacon_cmd->tim_idx = cpu_to_le16(tim_idx); | 3495 | tx_beacon_cmd->tim_idx = cpu_to_le16(tim_idx); |
3516 | tx_beacon_cmd->tim_size = beacon[tim_idx+1]; | 3496 | tx_beacon_cmd->tim_size = beacon[tim_idx + 1]; |
3517 | } else | 3497 | } else |
3518 | IL_WARN("Unable to find TIM Element in beacon\n"); | 3498 | IL_WARN("Unable to find TIM Element in beacon\n"); |
3519 | } | 3499 | } |
3520 | 3500 | ||
3521 | static unsigned int il4965_hw_get_beacon_cmd(struct il_priv *il, | 3501 | static unsigned int |
3522 | struct il_frame *frame) | 3502 | il4965_hw_get_beacon_cmd(struct il_priv *il, struct il_frame *frame) |
3523 | { | 3503 | { |
3524 | struct il_tx_beacon_cmd *tx_beacon_cmd; | 3504 | struct il_tx_beacon_cmd *tx_beacon_cmd; |
3525 | u32 frame_size; | 3505 | u32 frame_size; |
@@ -3542,38 +3522,42 @@ static unsigned int il4965_hw_get_beacon_cmd(struct il_priv *il, | |||
3542 | memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd)); | 3522 | memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd)); |
3543 | 3523 | ||
3544 | /* Set up TX beacon contents */ | 3524 | /* Set up TX beacon contents */ |
3545 | frame_size = il4965_fill_beacon_frame(il, tx_beacon_cmd->frame, | 3525 | frame_size = |
3546 | sizeof(frame->u) - sizeof(*tx_beacon_cmd)); | 3526 | il4965_fill_beacon_frame(il, tx_beacon_cmd->frame, |
3527 | sizeof(frame->u) - sizeof(*tx_beacon_cmd)); | ||
3547 | if (WARN_ON_ONCE(frame_size > MAX_MPDU_SIZE)) | 3528 | if (WARN_ON_ONCE(frame_size > MAX_MPDU_SIZE)) |
3548 | return 0; | 3529 | return 0; |
3549 | if (!frame_size) | 3530 | if (!frame_size) |
3550 | return 0; | 3531 | return 0; |
3551 | 3532 | ||
3552 | /* Set up TX command fields */ | 3533 | /* Set up TX command fields */ |
3553 | tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size); | 3534 | tx_beacon_cmd->tx.len = cpu_to_le16((u16) frame_size); |
3554 | tx_beacon_cmd->tx.sta_id = il->beacon_ctx->bcast_sta_id; | 3535 | tx_beacon_cmd->tx.sta_id = il->beacon_ctx->bcast_sta_id; |
3555 | tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE; | 3536 | tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE; |
3556 | tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK | | 3537 | tx_beacon_cmd->tx.tx_flags = |
3557 | TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK; | 3538 | TX_CMD_FLG_SEQ_CTL_MSK | TX_CMD_FLG_TSF_MSK | |
3539 | TX_CMD_FLG_STA_RATE_MSK; | ||
3558 | 3540 | ||
3559 | /* Set up TX beacon command fields */ | 3541 | /* Set up TX beacon command fields */ |
3560 | il4965_set_beacon_tim(il, tx_beacon_cmd, (u8 *)tx_beacon_cmd->frame, | 3542 | il4965_set_beacon_tim(il, tx_beacon_cmd, (u8 *) tx_beacon_cmd->frame, |
3561 | frame_size); | 3543 | frame_size); |
3562 | 3544 | ||
3563 | /* Set up packet rate and flags */ | 3545 | /* Set up packet rate and flags */ |
3564 | rate = il_get_lowest_plcp(il, il->beacon_ctx); | 3546 | rate = il_get_lowest_plcp(il, il->beacon_ctx); |
3565 | il->mgmt_tx_ant = il4965_toggle_tx_ant(il, il->mgmt_tx_ant, | 3547 | il->mgmt_tx_ant = |
3566 | il->hw_params.valid_tx_ant); | 3548 | il4965_toggle_tx_ant(il, il->mgmt_tx_ant, |
3549 | il->hw_params.valid_tx_ant); | ||
3567 | rate_flags = il4965_ant_idx_to_flags(il->mgmt_tx_ant); | 3550 | rate_flags = il4965_ant_idx_to_flags(il->mgmt_tx_ant); |
3568 | if ((rate >= IL_FIRST_CCK_RATE) && (rate <= IL_LAST_CCK_RATE)) | 3551 | if ((rate >= IL_FIRST_CCK_RATE) && (rate <= IL_LAST_CCK_RATE)) |
3569 | rate_flags |= RATE_MCS_CCK_MSK; | 3552 | rate_flags |= RATE_MCS_CCK_MSK; |
3570 | tx_beacon_cmd->tx.rate_n_flags = il4965_hw_set_rate_n_flags(rate, | 3553 | tx_beacon_cmd->tx.rate_n_flags = |
3571 | rate_flags); | 3554 | il4965_hw_set_rate_n_flags(rate, rate_flags); |
3572 | 3555 | ||
3573 | return sizeof(*tx_beacon_cmd) + frame_size; | 3556 | return sizeof(*tx_beacon_cmd) + frame_size; |
3574 | } | 3557 | } |
3575 | 3558 | ||
3576 | int il4965_send_beacon_cmd(struct il_priv *il) | 3559 | int |
3560 | il4965_send_beacon_cmd(struct il_priv *il) | ||
3577 | { | 3561 | { |
3578 | struct il_frame *frame; | 3562 | struct il_frame *frame; |
3579 | unsigned int frame_size; | 3563 | unsigned int frame_size; |
@@ -3582,7 +3566,7 @@ int il4965_send_beacon_cmd(struct il_priv *il) | |||
3582 | frame = il4965_get_free_frame(il); | 3566 | frame = il4965_get_free_frame(il); |
3583 | if (!frame) { | 3567 | if (!frame) { |
3584 | IL_ERR("Could not obtain free frame buffer for beacon " | 3568 | IL_ERR("Could not obtain free frame buffer for beacon " |
3585 | "command.\n"); | 3569 | "command.\n"); |
3586 | return -ENOMEM; | 3570 | return -ENOMEM; |
3587 | } | 3571 | } |
3588 | 3572 | ||
@@ -3593,35 +3577,37 @@ int il4965_send_beacon_cmd(struct il_priv *il) | |||
3593 | return -EINVAL; | 3577 | return -EINVAL; |
3594 | } | 3578 | } |
3595 | 3579 | ||
3596 | rc = il_send_cmd_pdu(il, C_TX_BEACON, frame_size, | 3580 | rc = il_send_cmd_pdu(il, C_TX_BEACON, frame_size, &frame->u.cmd[0]); |
3597 | &frame->u.cmd[0]); | ||
3598 | 3581 | ||
3599 | il4965_free_frame(il, frame); | 3582 | il4965_free_frame(il, frame); |
3600 | 3583 | ||
3601 | return rc; | 3584 | return rc; |
3602 | } | 3585 | } |
3603 | 3586 | ||
3604 | static inline dma_addr_t il4965_tfd_tb_get_addr(struct il_tfd *tfd, u8 idx) | 3587 | static inline dma_addr_t |
3588 | il4965_tfd_tb_get_addr(struct il_tfd *tfd, u8 idx) | ||
3605 | { | 3589 | { |
3606 | struct il_tfd_tb *tb = &tfd->tbs[idx]; | 3590 | struct il_tfd_tb *tb = &tfd->tbs[idx]; |
3607 | 3591 | ||
3608 | dma_addr_t addr = get_unaligned_le32(&tb->lo); | 3592 | dma_addr_t addr = get_unaligned_le32(&tb->lo); |
3609 | if (sizeof(dma_addr_t) > sizeof(u32)) | 3593 | if (sizeof(dma_addr_t) > sizeof(u32)) |
3610 | addr |= | 3594 | addr |= |
3611 | ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16; | 3595 | ((dma_addr_t) (le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << |
3596 | 16; | ||
3612 | 3597 | ||
3613 | return addr; | 3598 | return addr; |
3614 | } | 3599 | } |
3615 | 3600 | ||
3616 | static inline u16 il4965_tfd_tb_get_len(struct il_tfd *tfd, u8 idx) | 3601 | static inline u16 |
3602 | il4965_tfd_tb_get_len(struct il_tfd *tfd, u8 idx) | ||
3617 | { | 3603 | { |
3618 | struct il_tfd_tb *tb = &tfd->tbs[idx]; | 3604 | struct il_tfd_tb *tb = &tfd->tbs[idx]; |
3619 | 3605 | ||
3620 | return le16_to_cpu(tb->hi_n_len) >> 4; | 3606 | return le16_to_cpu(tb->hi_n_len) >> 4; |
3621 | } | 3607 | } |
3622 | 3608 | ||
3623 | static inline void il4965_tfd_set_tb(struct il_tfd *tfd, u8 idx, | 3609 | static inline void |
3624 | dma_addr_t addr, u16 len) | 3610 | il4965_tfd_set_tb(struct il_tfd *tfd, u8 idx, dma_addr_t addr, u16 len) |
3625 | { | 3611 | { |
3626 | struct il_tfd_tb *tb = &tfd->tbs[idx]; | 3612 | struct il_tfd_tb *tb = &tfd->tbs[idx]; |
3627 | u16 hi_n_len = len << 4; | 3613 | u16 hi_n_len = len << 4; |
@@ -3635,7 +3621,8 @@ static inline void il4965_tfd_set_tb(struct il_tfd *tfd, u8 idx, | |||
3635 | tfd->num_tbs = idx + 1; | 3621 | tfd->num_tbs = idx + 1; |
3636 | } | 3622 | } |
3637 | 3623 | ||
3638 | static inline u8 il4965_tfd_get_num_tbs(struct il_tfd *tfd) | 3624 | static inline u8 |
3625 | il4965_tfd_get_num_tbs(struct il_tfd *tfd) | ||
3639 | { | 3626 | { |
3640 | return tfd->num_tbs & 0x1f; | 3627 | return tfd->num_tbs & 0x1f; |
3641 | } | 3628 | } |
@@ -3648,7 +3635,8 @@ static inline u8 il4965_tfd_get_num_tbs(struct il_tfd *tfd) | |||
3648 | * Does NOT advance any TFD circular buffer read/write idxes | 3635 | * Does NOT advance any TFD circular buffer read/write idxes |
3649 | * Does NOT free the TFD itself (which is within circular buffer) | 3636 | * Does NOT free the TFD itself (which is within circular buffer) |
3650 | */ | 3637 | */ |
3651 | void il4965_hw_txq_free_tfd(struct il_priv *il, struct il_tx_queue *txq) | 3638 | void |
3639 | il4965_hw_txq_free_tfd(struct il_priv *il, struct il_tx_queue *txq) | ||
3652 | { | 3640 | { |
3653 | struct il_tfd *tfd_tmp = (struct il_tfd *)txq->tfds; | 3641 | struct il_tfd *tfd_tmp = (struct il_tfd *)txq->tfds; |
3654 | struct il_tfd *tfd; | 3642 | struct il_tfd *tfd; |
@@ -3670,16 +3658,15 @@ void il4965_hw_txq_free_tfd(struct il_priv *il, struct il_tx_queue *txq) | |||
3670 | 3658 | ||
3671 | /* Unmap tx_cmd */ | 3659 | /* Unmap tx_cmd */ |
3672 | if (num_tbs) | 3660 | if (num_tbs) |
3673 | pci_unmap_single(dev, | 3661 | pci_unmap_single(dev, dma_unmap_addr(&txq->meta[idx], mapping), |
3674 | dma_unmap_addr(&txq->meta[idx], mapping), | 3662 | dma_unmap_len(&txq->meta[idx], len), |
3675 | dma_unmap_len(&txq->meta[idx], len), | 3663 | PCI_DMA_BIDIRECTIONAL); |
3676 | PCI_DMA_BIDIRECTIONAL); | ||
3677 | 3664 | ||
3678 | /* Unmap chunks, if any. */ | 3665 | /* Unmap chunks, if any. */ |
3679 | for (i = 1; i < num_tbs; i++) | 3666 | for (i = 1; i < num_tbs; i++) |
3680 | pci_unmap_single(dev, il4965_tfd_tb_get_addr(tfd, i), | 3667 | pci_unmap_single(dev, il4965_tfd_tb_get_addr(tfd, i), |
3681 | il4965_tfd_tb_get_len(tfd, i), | 3668 | il4965_tfd_tb_get_len(tfd, i), |
3682 | PCI_DMA_TODEVICE); | 3669 | PCI_DMA_TODEVICE); |
3683 | 3670 | ||
3684 | /* free SKB */ | 3671 | /* free SKB */ |
3685 | if (txq->txb) { | 3672 | if (txq->txb) { |
@@ -3695,10 +3682,9 @@ void il4965_hw_txq_free_tfd(struct il_priv *il, struct il_tx_queue *txq) | |||
3695 | } | 3682 | } |
3696 | } | 3683 | } |
3697 | 3684 | ||
3698 | int il4965_hw_txq_attach_buf_to_tfd(struct il_priv *il, | 3685 | int |
3699 | struct il_tx_queue *txq, | 3686 | il4965_hw_txq_attach_buf_to_tfd(struct il_priv *il, struct il_tx_queue *txq, |
3700 | dma_addr_t addr, u16 len, | 3687 | dma_addr_t addr, u16 len, u8 reset, u8 pad) |
3701 | u8 reset, u8 pad) | ||
3702 | { | 3688 | { |
3703 | struct il_queue *q; | 3689 | struct il_queue *q; |
3704 | struct il_tfd *tfd, *tfd_tmp; | 3690 | struct il_tfd *tfd, *tfd_tmp; |
@@ -3716,14 +3702,13 @@ int il4965_hw_txq_attach_buf_to_tfd(struct il_priv *il, | |||
3716 | /* Each TFD can point to a maximum 20 Tx buffers */ | 3702 | /* Each TFD can point to a maximum 20 Tx buffers */ |
3717 | if (num_tbs >= IL_NUM_OF_TBS) { | 3703 | if (num_tbs >= IL_NUM_OF_TBS) { |
3718 | IL_ERR("Error can not send more than %d chunks\n", | 3704 | IL_ERR("Error can not send more than %d chunks\n", |
3719 | IL_NUM_OF_TBS); | 3705 | IL_NUM_OF_TBS); |
3720 | return -EINVAL; | 3706 | return -EINVAL; |
3721 | } | 3707 | } |
3722 | 3708 | ||
3723 | BUG_ON(addr & ~DMA_BIT_MASK(36)); | 3709 | BUG_ON(addr & ~DMA_BIT_MASK(36)); |
3724 | if (unlikely(addr & ~IL_TX_DMA_MASK)) | 3710 | if (unlikely(addr & ~IL_TX_DMA_MASK)) |
3725 | IL_ERR("Unaligned address = %llx\n", | 3711 | IL_ERR("Unaligned address = %llx\n", (unsigned long long)addr); |
3726 | (unsigned long long)addr); | ||
3727 | 3712 | ||
3728 | il4965_tfd_set_tb(tfd, num_tbs, addr, len); | 3713 | il4965_tfd_set_tb(tfd, num_tbs, addr, len); |
3729 | 3714 | ||
@@ -3737,14 +3722,13 @@ int il4965_hw_txq_attach_buf_to_tfd(struct il_priv *il, | |||
3737 | * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA | 3722 | * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA |
3738 | * channels supported in hardware. | 3723 | * channels supported in hardware. |
3739 | */ | 3724 | */ |
3740 | int il4965_hw_tx_queue_init(struct il_priv *il, | 3725 | int |
3741 | struct il_tx_queue *txq) | 3726 | il4965_hw_tx_queue_init(struct il_priv *il, struct il_tx_queue *txq) |
3742 | { | 3727 | { |
3743 | int txq_id = txq->q.id; | 3728 | int txq_id = txq->q.id; |
3744 | 3729 | ||
3745 | /* Circular buffer (TFD queue in DRAM) physical base address */ | 3730 | /* Circular buffer (TFD queue in DRAM) physical base address */ |
3746 | il_wr(il, FH49_MEM_CBBC_QUEUE(txq_id), | 3731 | il_wr(il, FH49_MEM_CBBC_QUEUE(txq_id), txq->q.dma_addr >> 8); |
3747 | txq->q.dma_addr >> 8); | ||
3748 | 3732 | ||
3749 | return 0; | 3733 | return 0; |
3750 | } | 3734 | } |
@@ -3754,8 +3738,8 @@ int il4965_hw_tx_queue_init(struct il_priv *il, | |||
3754 | * Generic RX handler implementations | 3738 | * Generic RX handler implementations |
3755 | * | 3739 | * |
3756 | ******************************************************************************/ | 3740 | ******************************************************************************/ |
3757 | static void il4965_hdl_alive(struct il_priv *il, | 3741 | static void |
3758 | struct il_rx_buf *rxb) | 3742 | il4965_hdl_alive(struct il_priv *il, struct il_rx_buf *rxb) |
3759 | { | 3743 | { |
3760 | struct il_rx_pkt *pkt = rxb_addr(rxb); | 3744 | struct il_rx_pkt *pkt = rxb_addr(rxb); |
3761 | struct il_alive_resp *palive; | 3745 | struct il_alive_resp *palive; |
@@ -3763,15 +3747,12 @@ static void il4965_hdl_alive(struct il_priv *il, | |||
3763 | 3747 | ||
3764 | palive = &pkt->u.alive_frame; | 3748 | palive = &pkt->u.alive_frame; |
3765 | 3749 | ||
3766 | D_INFO("Alive ucode status 0x%08X revision " | 3750 | D_INFO("Alive ucode status 0x%08X revision " "0x%01X 0x%01X\n", |
3767 | "0x%01X 0x%01X\n", | 3751 | palive->is_valid, palive->ver_type, palive->ver_subtype); |
3768 | palive->is_valid, palive->ver_type, | ||
3769 | palive->ver_subtype); | ||
3770 | 3752 | ||
3771 | if (palive->ver_subtype == INITIALIZE_SUBTYPE) { | 3753 | if (palive->ver_subtype == INITIALIZE_SUBTYPE) { |
3772 | D_INFO("Initialization Alive received.\n"); | 3754 | D_INFO("Initialization Alive received.\n"); |
3773 | memcpy(&il->card_alive_init, | 3755 | memcpy(&il->card_alive_init, &pkt->u.alive_frame, |
3774 | &pkt->u.alive_frame, | ||
3775 | sizeof(struct il_init_alive_resp)); | 3756 | sizeof(struct il_init_alive_resp)); |
3776 | pwork = &il->init_alive_start; | 3757 | pwork = &il->init_alive_start; |
3777 | } else { | 3758 | } else { |
@@ -3784,8 +3765,7 @@ static void il4965_hdl_alive(struct il_priv *il, | |||
3784 | /* We delay the ALIVE response by 5ms to | 3765 | /* We delay the ALIVE response by 5ms to |
3785 | * give the HW RF Kill time to activate... */ | 3766 | * give the HW RF Kill time to activate... */ |
3786 | if (palive->is_valid == UCODE_VALID_OK) | 3767 | if (palive->is_valid == UCODE_VALID_OK) |
3787 | queue_delayed_work(il->workqueue, pwork, | 3768 | queue_delayed_work(il->workqueue, pwork, msecs_to_jiffies(5)); |
3788 | msecs_to_jiffies(5)); | ||
3789 | else | 3769 | else |
3790 | IL_WARN("uCode did not respond OK.\n"); | 3770 | IL_WARN("uCode did not respond OK.\n"); |
3791 | } | 3771 | } |
@@ -3800,7 +3780,8 @@ static void il4965_hdl_alive(struct il_priv *il, | |||
3800 | * was received. We need to ensure we receive the stats in order | 3780 | * was received. We need to ensure we receive the stats in order |
3801 | * to update the temperature used for calibrating the TXPOWER. | 3781 | * to update the temperature used for calibrating the TXPOWER. |
3802 | */ | 3782 | */ |
3803 | static void il4965_bg_stats_periodic(unsigned long data) | 3783 | static void |
3784 | il4965_bg_stats_periodic(unsigned long data) | ||
3804 | { | 3785 | { |
3805 | struct il_priv *il = (struct il_priv *)data; | 3786 | struct il_priv *il = (struct il_priv *)data; |
3806 | 3787 | ||
@@ -3814,28 +3795,27 @@ static void il4965_bg_stats_periodic(unsigned long data) | |||
3814 | il_send_stats_request(il, CMD_ASYNC, false); | 3795 | il_send_stats_request(il, CMD_ASYNC, false); |
3815 | } | 3796 | } |
3816 | 3797 | ||
3817 | static void il4965_hdl_beacon(struct il_priv *il, | 3798 | static void |
3818 | struct il_rx_buf *rxb) | 3799 | il4965_hdl_beacon(struct il_priv *il, struct il_rx_buf *rxb) |
3819 | { | 3800 | { |
3820 | struct il_rx_pkt *pkt = rxb_addr(rxb); | 3801 | struct il_rx_pkt *pkt = rxb_addr(rxb); |
3821 | struct il4965_beacon_notif *beacon = | 3802 | struct il4965_beacon_notif *beacon = |
3822 | (struct il4965_beacon_notif *)pkt->u.raw; | 3803 | (struct il4965_beacon_notif *)pkt->u.raw; |
3823 | #ifdef CONFIG_IWLEGACY_DEBUG | 3804 | #ifdef CONFIG_IWLEGACY_DEBUG |
3824 | u8 rate = il4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags); | 3805 | u8 rate = il4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags); |
3825 | 3806 | ||
3826 | D_RX("beacon status %x retries %d iss %d " | 3807 | D_RX("beacon status %x retries %d iss %d " "tsf %d %d rate %d\n", |
3827 | "tsf %d %d rate %d\n", | 3808 | le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK, |
3828 | le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK, | 3809 | beacon->beacon_notify_hdr.failure_frame, |
3829 | beacon->beacon_notify_hdr.failure_frame, | 3810 | le32_to_cpu(beacon->ibss_mgr_status), |
3830 | le32_to_cpu(beacon->ibss_mgr_status), | 3811 | le32_to_cpu(beacon->high_tsf), le32_to_cpu(beacon->low_tsf), rate); |
3831 | le32_to_cpu(beacon->high_tsf), | ||
3832 | le32_to_cpu(beacon->low_tsf), rate); | ||
3833 | #endif | 3812 | #endif |
3834 | 3813 | ||
3835 | il->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status); | 3814 | il->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status); |
3836 | } | 3815 | } |
3837 | 3816 | ||
3838 | static void il4965_perform_ct_kill_task(struct il_priv *il) | 3817 | static void |
3818 | il4965_perform_ct_kill_task(struct il_priv *il) | ||
3839 | { | 3819 | { |
3840 | unsigned long flags; | 3820 | unsigned long flags; |
3841 | 3821 | ||
@@ -3845,7 +3825,7 @@ static void il4965_perform_ct_kill_task(struct il_priv *il) | |||
3845 | ieee80211_stop_queues(il->hw); | 3825 | ieee80211_stop_queues(il->hw); |
3846 | 3826 | ||
3847 | _il_wr(il, CSR_UCODE_DRV_GP1_SET, | 3827 | _il_wr(il, CSR_UCODE_DRV_GP1_SET, |
3848 | CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT); | 3828 | CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT); |
3849 | _il_rd(il, CSR_UCODE_DRV_GP1); | 3829 | _il_rd(il, CSR_UCODE_DRV_GP1); |
3850 | 3830 | ||
3851 | spin_lock_irqsave(&il->reg_lock, flags); | 3831 | spin_lock_irqsave(&il->reg_lock, flags); |
@@ -3856,33 +3836,30 @@ static void il4965_perform_ct_kill_task(struct il_priv *il) | |||
3856 | 3836 | ||
3857 | /* Handle notification from uCode that card's power state is changing | 3837 | /* Handle notification from uCode that card's power state is changing |
3858 | * due to software, hardware, or critical temperature RFKILL */ | 3838 | * due to software, hardware, or critical temperature RFKILL */ |
3859 | static void il4965_hdl_card_state(struct il_priv *il, | 3839 | static void |
3860 | struct il_rx_buf *rxb) | 3840 | il4965_hdl_card_state(struct il_priv *il, struct il_rx_buf *rxb) |
3861 | { | 3841 | { |
3862 | struct il_rx_pkt *pkt = rxb_addr(rxb); | 3842 | struct il_rx_pkt *pkt = rxb_addr(rxb); |
3863 | u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags); | 3843 | u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags); |
3864 | unsigned long status = il->status; | 3844 | unsigned long status = il->status; |
3865 | 3845 | ||
3866 | D_RF_KILL("Card state received: HW:%s SW:%s CT:%s\n", | 3846 | D_RF_KILL("Card state received: HW:%s SW:%s CT:%s\n", |
3867 | (flags & HW_CARD_DISABLED) ? "Kill" : "On", | 3847 | (flags & HW_CARD_DISABLED) ? "Kill" : "On", |
3868 | (flags & SW_CARD_DISABLED) ? "Kill" : "On", | 3848 | (flags & SW_CARD_DISABLED) ? "Kill" : "On", |
3869 | (flags & CT_CARD_DISABLED) ? | 3849 | (flags & CT_CARD_DISABLED) ? "Reached" : "Not reached"); |
3870 | "Reached" : "Not reached"); | ||
3871 | 3850 | ||
3872 | if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED | | 3851 | if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED | CT_CARD_DISABLED)) { |
3873 | CT_CARD_DISABLED)) { | ||
3874 | 3852 | ||
3875 | _il_wr(il, CSR_UCODE_DRV_GP1_SET, | 3853 | _il_wr(il, CSR_UCODE_DRV_GP1_SET, |
3876 | CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); | 3854 | CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); |
3877 | 3855 | ||
3878 | il_wr(il, HBUS_TARG_MBX_C, | 3856 | il_wr(il, HBUS_TARG_MBX_C, HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED); |
3879 | HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED); | ||
3880 | 3857 | ||
3881 | if (!(flags & RXON_CARD_DISABLED)) { | 3858 | if (!(flags & RXON_CARD_DISABLED)) { |
3882 | _il_wr(il, CSR_UCODE_DRV_GP1_CLR, | 3859 | _il_wr(il, CSR_UCODE_DRV_GP1_CLR, |
3883 | CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); | 3860 | CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); |
3884 | il_wr(il, HBUS_TARG_MBX_C, | 3861 | il_wr(il, HBUS_TARG_MBX_C, |
3885 | HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED); | 3862 | HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED); |
3886 | } | 3863 | } |
3887 | } | 3864 | } |
3888 | 3865 | ||
@@ -3900,7 +3877,7 @@ static void il4965_hdl_card_state(struct il_priv *il, | |||
3900 | if ((test_bit(S_RF_KILL_HW, &status) != | 3877 | if ((test_bit(S_RF_KILL_HW, &status) != |
3901 | test_bit(S_RF_KILL_HW, &il->status))) | 3878 | test_bit(S_RF_KILL_HW, &il->status))) |
3902 | wiphy_rfkill_set_hw_state(il->hw->wiphy, | 3879 | wiphy_rfkill_set_hw_state(il->hw->wiphy, |
3903 | test_bit(S_RF_KILL_HW, &il->status)); | 3880 | test_bit(S_RF_KILL_HW, &il->status)); |
3904 | else | 3881 | else |
3905 | wake_up(&il->wait_command_queue); | 3882 | wake_up(&il->wait_command_queue); |
3906 | } | 3883 | } |
@@ -3914,16 +3891,15 @@ static void il4965_hdl_card_state(struct il_priv *il, | |||
3914 | * This function chains into the hardware specific files for them to setup | 3891 | * This function chains into the hardware specific files for them to setup |
3915 | * any hardware specific handlers as well. | 3892 | * any hardware specific handlers as well. |
3916 | */ | 3893 | */ |
3917 | static void il4965_setup_handlers(struct il_priv *il) | 3894 | static void |
3895 | il4965_setup_handlers(struct il_priv *il) | ||
3918 | { | 3896 | { |
3919 | il->handlers[N_ALIVE] = il4965_hdl_alive; | 3897 | il->handlers[N_ALIVE] = il4965_hdl_alive; |
3920 | il->handlers[N_ERROR] = il_hdl_error; | 3898 | il->handlers[N_ERROR] = il_hdl_error; |
3921 | il->handlers[N_CHANNEL_SWITCH] = il_hdl_csa; | 3899 | il->handlers[N_CHANNEL_SWITCH] = il_hdl_csa; |
3922 | il->handlers[N_SPECTRUM_MEASUREMENT] = | 3900 | il->handlers[N_SPECTRUM_MEASUREMENT] = il_hdl_spectrum_measurement; |
3923 | il_hdl_spectrum_measurement; | ||
3924 | il->handlers[N_PM_SLEEP] = il_hdl_pm_sleep; | 3901 | il->handlers[N_PM_SLEEP] = il_hdl_pm_sleep; |
3925 | il->handlers[N_PM_DEBUG_STATS] = | 3902 | il->handlers[N_PM_DEBUG_STATS] = il_hdl_pm_debug_stats; |
3926 | il_hdl_pm_debug_stats; | ||
3927 | il->handlers[N_BEACON] = il4965_hdl_beacon; | 3903 | il->handlers[N_BEACON] = il4965_hdl_beacon; |
3928 | 3904 | ||
3929 | /* | 3905 | /* |
@@ -3937,11 +3913,9 @@ static void il4965_setup_handlers(struct il_priv *il) | |||
3937 | il_setup_rx_scan_handlers(il); | 3913 | il_setup_rx_scan_handlers(il); |
3938 | 3914 | ||
3939 | /* status change handler */ | 3915 | /* status change handler */ |
3940 | il->handlers[N_CARD_STATE] = | 3916 | il->handlers[N_CARD_STATE] = il4965_hdl_card_state; |
3941 | il4965_hdl_card_state; | ||
3942 | 3917 | ||
3943 | il->handlers[N_MISSED_BEACONS] = | 3918 | il->handlers[N_MISSED_BEACONS] = il4965_hdl_missed_beacon; |
3944 | il4965_hdl_missed_beacon; | ||
3945 | /* Rx handlers */ | 3919 | /* Rx handlers */ |
3946 | il->handlers[N_RX_PHY] = il4965_hdl_rx_phy; | 3920 | il->handlers[N_RX_PHY] = il4965_hdl_rx_phy; |
3947 | il->handlers[N_RX_MPDU] = il4965_hdl_rx; | 3921 | il->handlers[N_RX_MPDU] = il4965_hdl_rx; |
@@ -3958,7 +3932,8 @@ static void il4965_setup_handlers(struct il_priv *il) | |||
3958 | * the appropriate handlers, including command responses, | 3932 | * the appropriate handlers, including command responses, |
3959 | * frame-received notifications, and other notifications. | 3933 | * frame-received notifications, and other notifications. |
3960 | */ | 3934 | */ |
3961 | void il4965_rx_handle(struct il_priv *il) | 3935 | void |
3936 | il4965_rx_handle(struct il_priv *il) | ||
3962 | { | 3937 | { |
3963 | struct il_rx_buf *rxb; | 3938 | struct il_rx_buf *rxb; |
3964 | struct il_rx_pkt *pkt; | 3939 | struct il_rx_pkt *pkt; |
@@ -3972,7 +3947,7 @@ void il4965_rx_handle(struct il_priv *il) | |||
3972 | 3947 | ||
3973 | /* uCode's read idx (stored in shared DRAM) indicates the last Rx | 3948 | /* uCode's read idx (stored in shared DRAM) indicates the last Rx |
3974 | * buffer that the driver may process (last buffer filled by ucode). */ | 3949 | * buffer that the driver may process (last buffer filled by ucode). */ |
3975 | r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF; | 3950 | r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF; |
3976 | i = rxq->read; | 3951 | i = rxq->read; |
3977 | 3952 | ||
3978 | /* Rx interrupt, but nothing sent from uCode */ | 3953 | /* Rx interrupt, but nothing sent from uCode */ |
@@ -4005,7 +3980,7 @@ void il4965_rx_handle(struct il_priv *il) | |||
4005 | pkt = rxb_addr(rxb); | 3980 | pkt = rxb_addr(rxb); |
4006 | 3981 | ||
4007 | len = le32_to_cpu(pkt->len_n_flags) & IL_RX_FRAME_SIZE_MSK; | 3982 | len = le32_to_cpu(pkt->len_n_flags) & IL_RX_FRAME_SIZE_MSK; |
4008 | len += sizeof(u32); /* account for status word */ | 3983 | len += sizeof(u32); /* account for status word */ |
4009 | 3984 | ||
4010 | /* Reclaim a command buffer only if this packet is a response | 3985 | /* Reclaim a command buffer only if this packet is a response |
4011 | * to a (driver-originated) command. | 3986 | * to a (driver-originated) command. |
@@ -4014,28 +3989,23 @@ void il4965_rx_handle(struct il_priv *il) | |||
4014 | * Ucode should set SEQ_RX_FRAME bit if ucode-originated, | 3989 | * Ucode should set SEQ_RX_FRAME bit if ucode-originated, |
4015 | * but apparently a few don't get set; catch them here. */ | 3990 | * but apparently a few don't get set; catch them here. */ |
4016 | reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) && | 3991 | reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) && |
4017 | (pkt->hdr.cmd != N_RX_PHY) && | 3992 | (pkt->hdr.cmd != N_RX_PHY) && (pkt->hdr.cmd != N_RX) && |
4018 | (pkt->hdr.cmd != N_RX) && | 3993 | (pkt->hdr.cmd != N_RX_MPDU) && |
4019 | (pkt->hdr.cmd != N_RX_MPDU) && | 3994 | (pkt->hdr.cmd != N_COMPRESSED_BA) && |
4020 | (pkt->hdr.cmd != N_COMPRESSED_BA) && | 3995 | (pkt->hdr.cmd != N_STATS) && (pkt->hdr.cmd != C_TX); |
4021 | (pkt->hdr.cmd != N_STATS) && | ||
4022 | (pkt->hdr.cmd != C_TX); | ||
4023 | 3996 | ||
4024 | /* Based on type of command response or notification, | 3997 | /* Based on type of command response or notification, |
4025 | * handle those that need handling via function in | 3998 | * handle those that need handling via function in |
4026 | * handlers table. See il4965_setup_handlers() */ | 3999 | * handlers table. See il4965_setup_handlers() */ |
4027 | if (il->handlers[pkt->hdr.cmd]) { | 4000 | if (il->handlers[pkt->hdr.cmd]) { |
4028 | D_RX("r = %d, i = %d, %s, 0x%02x\n", r, | 4001 | D_RX("r = %d, i = %d, %s, 0x%02x\n", r, i, |
4029 | i, il_get_cmd_string(pkt->hdr.cmd), | 4002 | il_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd); |
4030 | pkt->hdr.cmd); | ||
4031 | il->isr_stats.handlers[pkt->hdr.cmd]++; | 4003 | il->isr_stats.handlers[pkt->hdr.cmd]++; |
4032 | il->handlers[pkt->hdr.cmd] (il, rxb); | 4004 | il->handlers[pkt->hdr.cmd] (il, rxb); |
4033 | } else { | 4005 | } else { |
4034 | /* No handling needed */ | 4006 | /* No handling needed */ |
4035 | D_RX( | 4007 | D_RX("r %d i %d No handler needed for %s, 0x%02x\n", r, |
4036 | "r %d i %d No handler needed for %s, 0x%02x\n", | 4008 | i, il_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd); |
4037 | r, i, il_get_cmd_string(pkt->hdr.cmd), | ||
4038 | pkt->hdr.cmd); | ||
4039 | } | 4009 | } |
4040 | 4010 | ||
4041 | /* | 4011 | /* |
@@ -4060,9 +4030,10 @@ void il4965_rx_handle(struct il_priv *il) | |||
4060 | * rx_free list for reuse later. */ | 4030 | * rx_free list for reuse later. */ |
4061 | spin_lock_irqsave(&rxq->lock, flags); | 4031 | spin_lock_irqsave(&rxq->lock, flags); |
4062 | if (rxb->page != NULL) { | 4032 | if (rxb->page != NULL) { |
4063 | rxb->page_dma = pci_map_page(il->pci_dev, rxb->page, | 4033 | rxb->page_dma = |
4064 | 0, PAGE_SIZE << il->hw_params.rx_page_order, | 4034 | pci_map_page(il->pci_dev, rxb->page, 0, |
4065 | PCI_DMA_FROMDEVICE); | 4035 | PAGE_SIZE << il->hw_params. |
4036 | rx_page_order, PCI_DMA_FROMDEVICE); | ||
4066 | list_add_tail(&rxb->list, &rxq->rx_free); | 4037 | list_add_tail(&rxb->list, &rxq->rx_free); |
4067 | rxq->free_count++; | 4038 | rxq->free_count++; |
4068 | } else | 4039 | } else |
@@ -4092,14 +4063,16 @@ void il4965_rx_handle(struct il_priv *il) | |||
4092 | } | 4063 | } |
4093 | 4064 | ||
4094 | /* call this function to flush any scheduled tasklet */ | 4065 | /* call this function to flush any scheduled tasklet */ |
4095 | static inline void il4965_synchronize_irq(struct il_priv *il) | 4066 | static inline void |
4067 | il4965_synchronize_irq(struct il_priv *il) | ||
4096 | { | 4068 | { |
4097 | /* wait to make sure we flush pending tasklet*/ | 4069 | /* wait to make sure we flush pending tasklet */ |
4098 | synchronize_irq(il->pci_dev->irq); | 4070 | synchronize_irq(il->pci_dev->irq); |
4099 | tasklet_kill(&il->irq_tasklet); | 4071 | tasklet_kill(&il->irq_tasklet); |
4100 | } | 4072 | } |
4101 | 4073 | ||
4102 | static void il4965_irq_tasklet(struct il_priv *il) | 4074 | static void |
4075 | il4965_irq_tasklet(struct il_priv *il) | ||
4103 | { | 4076 | { |
4104 | u32 inta, handled = 0; | 4077 | u32 inta, handled = 0; |
4105 | u32 inta_fh; | 4078 | u32 inta_fh; |
@@ -4127,8 +4100,8 @@ static void il4965_irq_tasklet(struct il_priv *il) | |||
4127 | if (il_get_debug_level(il) & IL_DL_ISR) { | 4100 | if (il_get_debug_level(il) & IL_DL_ISR) { |
4128 | /* just for debug */ | 4101 | /* just for debug */ |
4129 | inta_mask = _il_rd(il, CSR_INT_MASK); | 4102 | inta_mask = _il_rd(il, CSR_INT_MASK); |
4130 | D_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", | 4103 | D_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", inta, |
4131 | inta, inta_mask, inta_fh); | 4104 | inta_mask, inta_fh); |
4132 | } | 4105 | } |
4133 | #endif | 4106 | #endif |
4134 | 4107 | ||
@@ -4157,13 +4130,12 @@ static void il4965_irq_tasklet(struct il_priv *il) | |||
4157 | 4130 | ||
4158 | return; | 4131 | return; |
4159 | } | 4132 | } |
4160 | |||
4161 | #ifdef CONFIG_IWLEGACY_DEBUG | 4133 | #ifdef CONFIG_IWLEGACY_DEBUG |
4162 | if (il_get_debug_level(il) & (IL_DL_ISR)) { | 4134 | if (il_get_debug_level(il) & (IL_DL_ISR)) { |
4163 | /* NIC fires this, but we don't use it, redundant with WAKEUP */ | 4135 | /* NIC fires this, but we don't use it, redundant with WAKEUP */ |
4164 | if (inta & CSR_INT_BIT_SCD) { | 4136 | if (inta & CSR_INT_BIT_SCD) { |
4165 | D_ISR("Scheduler finished to transmit " | 4137 | D_ISR("Scheduler finished to transmit " |
4166 | "the frame/frames.\n"); | 4138 | "the frame/frames.\n"); |
4167 | il->isr_stats.sch++; | 4139 | il->isr_stats.sch++; |
4168 | } | 4140 | } |
4169 | 4141 | ||
@@ -4180,12 +4152,13 @@ static void il4965_irq_tasklet(struct il_priv *il) | |||
4180 | /* HW RF KILL switch toggled */ | 4152 | /* HW RF KILL switch toggled */ |
4181 | if (inta & CSR_INT_BIT_RF_KILL) { | 4153 | if (inta & CSR_INT_BIT_RF_KILL) { |
4182 | int hw_rf_kill = 0; | 4154 | int hw_rf_kill = 0; |
4183 | if (!(_il_rd(il, CSR_GP_CNTRL) & | 4155 | if (! |
4184 | CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)) | 4156 | (_il_rd(il, CSR_GP_CNTRL) & |
4157 | CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)) | ||
4185 | hw_rf_kill = 1; | 4158 | hw_rf_kill = 1; |
4186 | 4159 | ||
4187 | IL_WARN("RF_KILL bit toggled to %s.\n", | 4160 | IL_WARN("RF_KILL bit toggled to %s.\n", |
4188 | hw_rf_kill ? "disable radio" : "enable radio"); | 4161 | hw_rf_kill ? "disable radio" : "enable radio"); |
4189 | 4162 | ||
4190 | il->isr_stats.rfkill++; | 4163 | il->isr_stats.rfkill++; |
4191 | 4164 | ||
@@ -4214,8 +4187,8 @@ static void il4965_irq_tasklet(struct il_priv *il) | |||
4214 | 4187 | ||
4215 | /* Error detected by uCode */ | 4188 | /* Error detected by uCode */ |
4216 | if (inta & CSR_INT_BIT_SW_ERR) { | 4189 | if (inta & CSR_INT_BIT_SW_ERR) { |
4217 | IL_ERR("Microcode SW error detected. " | 4190 | IL_ERR("Microcode SW error detected. " " Restarting 0x%X.\n", |
4218 | " Restarting 0x%X.\n", inta); | 4191 | inta); |
4219 | il->isr_stats.sw++; | 4192 | il->isr_stats.sw++; |
4220 | il_irq_handle_error(il); | 4193 | il_irq_handle_error(il); |
4221 | handled |= CSR_INT_BIT_SW_ERR; | 4194 | handled |= CSR_INT_BIT_SW_ERR; |
@@ -4261,7 +4234,7 @@ static void il4965_irq_tasklet(struct il_priv *il) | |||
4261 | 4234 | ||
4262 | if (inta & ~(il->inta_mask)) { | 4235 | if (inta & ~(il->inta_mask)) { |
4263 | IL_WARN("Disabled INTA bits 0x%08x were pending\n", | 4236 | IL_WARN("Disabled INTA bits 0x%08x were pending\n", |
4264 | inta & ~il->inta_mask); | 4237 | inta & ~il->inta_mask); |
4265 | IL_WARN(" with FH49_INT = 0x%08x\n", inta_fh); | 4238 | IL_WARN(" with FH49_INT = 0x%08x\n", inta_fh); |
4266 | } | 4239 | } |
4267 | 4240 | ||
@@ -4278,9 +4251,8 @@ static void il4965_irq_tasklet(struct il_priv *il) | |||
4278 | inta = _il_rd(il, CSR_INT); | 4251 | inta = _il_rd(il, CSR_INT); |
4279 | inta_mask = _il_rd(il, CSR_INT_MASK); | 4252 | inta_mask = _il_rd(il, CSR_INT_MASK); |
4280 | inta_fh = _il_rd(il, CSR_FH_INT_STATUS); | 4253 | inta_fh = _il_rd(il, CSR_FH_INT_STATUS); |
4281 | D_ISR( | 4254 | D_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, " |
4282 | "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, " | 4255 | "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags); |
4283 | "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags); | ||
4284 | } | 4256 | } |
4285 | #endif | 4257 | #endif |
4286 | } | 4258 | } |
@@ -4304,15 +4276,17 @@ static void il4965_irq_tasklet(struct il_priv *il) | |||
4304 | * level that is used instead of the global debug level if it (the per | 4276 | * level that is used instead of the global debug level if it (the per |
4305 | * device debug level) is set. | 4277 | * device debug level) is set. |
4306 | */ | 4278 | */ |
4307 | static ssize_t il4965_show_debug_level(struct device *d, | 4279 | static ssize_t |
4308 | struct device_attribute *attr, char *buf) | 4280 | il4965_show_debug_level(struct device *d, struct device_attribute *attr, |
4281 | char *buf) | ||
4309 | { | 4282 | { |
4310 | struct il_priv *il = dev_get_drvdata(d); | 4283 | struct il_priv *il = dev_get_drvdata(d); |
4311 | return sprintf(buf, "0x%08X\n", il_get_debug_level(il)); | 4284 | return sprintf(buf, "0x%08X\n", il_get_debug_level(il)); |
4312 | } | 4285 | } |
4313 | static ssize_t il4965_store_debug_level(struct device *d, | 4286 | |
4314 | struct device_attribute *attr, | 4287 | static ssize_t |
4315 | const char *buf, size_t count) | 4288 | il4965_store_debug_level(struct device *d, struct device_attribute *attr, |
4289 | const char *buf, size_t count) | ||
4316 | { | 4290 | { |
4317 | struct il_priv *il = dev_get_drvdata(d); | 4291 | struct il_priv *il = dev_get_drvdata(d); |
4318 | unsigned long val; | 4292 | unsigned long val; |
@@ -4324,21 +4298,19 @@ static ssize_t il4965_store_debug_level(struct device *d, | |||
4324 | else { | 4298 | else { |
4325 | il->debug_level = val; | 4299 | il->debug_level = val; |
4326 | if (il_alloc_traffic_mem(il)) | 4300 | if (il_alloc_traffic_mem(il)) |
4327 | IL_ERR( | 4301 | IL_ERR("Not enough memory to generate traffic log\n"); |
4328 | "Not enough memory to generate traffic log\n"); | ||
4329 | } | 4302 | } |
4330 | return strnlen(buf, count); | 4303 | return strnlen(buf, count); |
4331 | } | 4304 | } |
4332 | 4305 | ||
4333 | static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO, | 4306 | static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO, il4965_show_debug_level, |
4334 | il4965_show_debug_level, il4965_store_debug_level); | 4307 | il4965_store_debug_level); |
4335 | |||
4336 | 4308 | ||
4337 | #endif /* CONFIG_IWLEGACY_DEBUG */ | 4309 | #endif /* CONFIG_IWLEGACY_DEBUG */ |
4338 | 4310 | ||
4339 | 4311 | static ssize_t | |
4340 | static ssize_t il4965_show_temperature(struct device *d, | 4312 | il4965_show_temperature(struct device *d, struct device_attribute *attr, |
4341 | struct device_attribute *attr, char *buf) | 4313 | char *buf) |
4342 | { | 4314 | { |
4343 | struct il_priv *il = dev_get_drvdata(d); | 4315 | struct il_priv *il = dev_get_drvdata(d); |
4344 | 4316 | ||
@@ -4350,8 +4322,8 @@ static ssize_t il4965_show_temperature(struct device *d, | |||
4350 | 4322 | ||
4351 | static DEVICE_ATTR(temperature, S_IRUGO, il4965_show_temperature, NULL); | 4323 | static DEVICE_ATTR(temperature, S_IRUGO, il4965_show_temperature, NULL); |
4352 | 4324 | ||
4353 | static ssize_t il4965_show_tx_power(struct device *d, | 4325 | static ssize_t |
4354 | struct device_attribute *attr, char *buf) | 4326 | il4965_show_tx_power(struct device *d, struct device_attribute *attr, char *buf) |
4355 | { | 4327 | { |
4356 | struct il_priv *il = dev_get_drvdata(d); | 4328 | struct il_priv *il = dev_get_drvdata(d); |
4357 | 4329 | ||
@@ -4361,9 +4333,9 @@ static ssize_t il4965_show_tx_power(struct device *d, | |||
4361 | return sprintf(buf, "%d\n", il->tx_power_user_lmt); | 4333 | return sprintf(buf, "%d\n", il->tx_power_user_lmt); |
4362 | } | 4334 | } |
4363 | 4335 | ||
4364 | static ssize_t il4965_store_tx_power(struct device *d, | 4336 | static ssize_t |
4365 | struct device_attribute *attr, | 4337 | il4965_store_tx_power(struct device *d, struct device_attribute *attr, |
4366 | const char *buf, size_t count) | 4338 | const char *buf, size_t count) |
4367 | { | 4339 | { |
4368 | struct il_priv *il = dev_get_drvdata(d); | 4340 | struct il_priv *il = dev_get_drvdata(d); |
4369 | unsigned long val; | 4341 | unsigned long val; |
@@ -4375,16 +4347,15 @@ static ssize_t il4965_store_tx_power(struct device *d, | |||
4375 | else { | 4347 | else { |
4376 | ret = il_set_tx_power(il, val, false); | 4348 | ret = il_set_tx_power(il, val, false); |
4377 | if (ret) | 4349 | if (ret) |
4378 | IL_ERR("failed setting tx power (0x%d).\n", | 4350 | IL_ERR("failed setting tx power (0x%d).\n", ret); |
4379 | ret); | ||
4380 | else | 4351 | else |
4381 | ret = count; | 4352 | ret = count; |
4382 | } | 4353 | } |
4383 | return ret; | 4354 | return ret; |
4384 | } | 4355 | } |
4385 | 4356 | ||
4386 | static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, | 4357 | static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, il4965_show_tx_power, |
4387 | il4965_show_tx_power, il4965_store_tx_power); | 4358 | il4965_store_tx_power); |
4388 | 4359 | ||
4389 | static struct attribute *il_sysfs_entries[] = { | 4360 | static struct attribute *il_sysfs_entries[] = { |
4390 | &dev_attr_temperature.attr, | 4361 | &dev_attr_temperature.attr, |
@@ -4406,7 +4377,8 @@ static struct attribute_group il_attribute_group = { | |||
4406 | * | 4377 | * |
4407 | ******************************************************************************/ | 4378 | ******************************************************************************/ |
4408 | 4379 | ||
4409 | static void il4965_dealloc_ucode_pci(struct il_priv *il) | 4380 | static void |
4381 | il4965_dealloc_ucode_pci(struct il_priv *il) | ||
4410 | { | 4382 | { |
4411 | il_free_fw_desc(il->pci_dev, &il->ucode_code); | 4383 | il_free_fw_desc(il->pci_dev, &il->ucode_code); |
4412 | il_free_fw_desc(il->pci_dev, &il->ucode_data); | 4384 | il_free_fw_desc(il->pci_dev, &il->ucode_data); |
@@ -4416,18 +4388,19 @@ static void il4965_dealloc_ucode_pci(struct il_priv *il) | |||
4416 | il_free_fw_desc(il->pci_dev, &il->ucode_boot); | 4388 | il_free_fw_desc(il->pci_dev, &il->ucode_boot); |
4417 | } | 4389 | } |
4418 | 4390 | ||
4419 | static void il4965_nic_start(struct il_priv *il) | 4391 | static void |
4392 | il4965_nic_start(struct il_priv *il) | ||
4420 | { | 4393 | { |
4421 | /* Remove all resets to allow NIC to operate */ | 4394 | /* Remove all resets to allow NIC to operate */ |
4422 | _il_wr(il, CSR_RESET, 0); | 4395 | _il_wr(il, CSR_RESET, 0); |
4423 | } | 4396 | } |
4424 | 4397 | ||
4425 | static void il4965_ucode_callback(const struct firmware *ucode_raw, | 4398 | static void il4965_ucode_callback(const struct firmware *ucode_raw, |
4426 | void *context); | 4399 | void *context); |
4427 | static int il4965_mac_setup_register(struct il_priv *il, | 4400 | static int il4965_mac_setup_register(struct il_priv *il, u32 max_probe_length); |
4428 | u32 max_probe_length); | ||
4429 | 4401 | ||
4430 | static int __must_check il4965_request_firmware(struct il_priv *il, bool first) | 4402 | static int __must_check |
4403 | il4965_request_firmware(struct il_priv *il, bool first) | ||
4431 | { | 4404 | { |
4432 | const char *name_pre = il->cfg->fw_name_pre; | 4405 | const char *name_pre = il->cfg->fw_name_pre; |
4433 | char tag[8]; | 4406 | char tag[8]; |
@@ -4447,8 +4420,7 @@ static int __must_check il4965_request_firmware(struct il_priv *il, bool first) | |||
4447 | 4420 | ||
4448 | sprintf(il->firmware_name, "%s%s%s", name_pre, tag, ".ucode"); | 4421 | sprintf(il->firmware_name, "%s%s%s", name_pre, tag, ".ucode"); |
4449 | 4422 | ||
4450 | D_INFO("attempting to load firmware '%s'\n", | 4423 | D_INFO("attempting to load firmware '%s'\n", il->firmware_name); |
4451 | il->firmware_name); | ||
4452 | 4424 | ||
4453 | return request_firmware_nowait(THIS_MODULE, 1, il->firmware_name, | 4425 | return request_firmware_nowait(THIS_MODULE, 1, il->firmware_name, |
4454 | &il->pci_dev->dev, GFP_KERNEL, il, | 4426 | &il->pci_dev->dev, GFP_KERNEL, il, |
@@ -4460,9 +4432,9 @@ struct il4965_firmware_pieces { | |||
4460 | size_t inst_size, data_size, init_size, init_data_size, boot_size; | 4432 | size_t inst_size, data_size, init_size, init_data_size, boot_size; |
4461 | }; | 4433 | }; |
4462 | 4434 | ||
4463 | static int il4965_load_firmware(struct il_priv *il, | 4435 | static int |
4464 | const struct firmware *ucode_raw, | 4436 | il4965_load_firmware(struct il_priv *il, const struct firmware *ucode_raw, |
4465 | struct il4965_firmware_pieces *pieces) | 4437 | struct il4965_firmware_pieces *pieces) |
4466 | { | 4438 | { |
4467 | struct il_ucode_header *ucode = (void *)ucode_raw->data; | 4439 | struct il_ucode_header *ucode = (void *)ucode_raw->data; |
4468 | u32 api_ver, hdr_size; | 4440 | u32 api_ver, hdr_size; |
@@ -4484,21 +4456,19 @@ static int il4965_load_firmware(struct il_priv *il, | |||
4484 | pieces->inst_size = le32_to_cpu(ucode->v1.inst_size); | 4456 | pieces->inst_size = le32_to_cpu(ucode->v1.inst_size); |
4485 | pieces->data_size = le32_to_cpu(ucode->v1.data_size); | 4457 | pieces->data_size = le32_to_cpu(ucode->v1.data_size); |
4486 | pieces->init_size = le32_to_cpu(ucode->v1.init_size); | 4458 | pieces->init_size = le32_to_cpu(ucode->v1.init_size); |
4487 | pieces->init_data_size = | 4459 | pieces->init_data_size = le32_to_cpu(ucode->v1.init_data_size); |
4488 | le32_to_cpu(ucode->v1.init_data_size); | ||
4489 | pieces->boot_size = le32_to_cpu(ucode->v1.boot_size); | 4460 | pieces->boot_size = le32_to_cpu(ucode->v1.boot_size); |
4490 | src = ucode->v1.data; | 4461 | src = ucode->v1.data; |
4491 | break; | 4462 | break; |
4492 | } | 4463 | } |
4493 | 4464 | ||
4494 | /* Verify size of file vs. image size info in file's header */ | 4465 | /* Verify size of file vs. image size info in file's header */ |
4495 | if (ucode_raw->size != hdr_size + pieces->inst_size + | 4466 | if (ucode_raw->size != |
4496 | pieces->data_size + pieces->init_size + | 4467 | hdr_size + pieces->inst_size + pieces->data_size + |
4497 | pieces->init_data_size + pieces->boot_size) { | 4468 | pieces->init_size + pieces->init_data_size + pieces->boot_size) { |
4498 | 4469 | ||
4499 | IL_ERR( | 4470 | IL_ERR("uCode file size %d does not match expected size\n", |
4500 | "uCode file size %d does not match expected size\n", | 4471 | (int)ucode_raw->size); |
4501 | (int)ucode_raw->size); | ||
4502 | return -EINVAL; | 4472 | return -EINVAL; |
4503 | } | 4473 | } |
4504 | 4474 | ||
@@ -4535,20 +4505,19 @@ il4965_ucode_callback(const struct firmware *ucode_raw, void *context) | |||
4535 | 4505 | ||
4536 | u32 max_probe_length = 200; | 4506 | u32 max_probe_length = 200; |
4537 | u32 standard_phy_calibration_size = | 4507 | u32 standard_phy_calibration_size = |
4538 | IL_DEFAULT_STANDARD_PHY_CALIBRATE_TBL_SIZE; | 4508 | IL_DEFAULT_STANDARD_PHY_CALIBRATE_TBL_SIZE; |
4539 | 4509 | ||
4540 | memset(&pieces, 0, sizeof(pieces)); | 4510 | memset(&pieces, 0, sizeof(pieces)); |
4541 | 4511 | ||
4542 | if (!ucode_raw) { | 4512 | if (!ucode_raw) { |
4543 | if (il->fw_idx <= il->cfg->ucode_api_max) | 4513 | if (il->fw_idx <= il->cfg->ucode_api_max) |
4544 | IL_ERR( | 4514 | IL_ERR("request for firmware file '%s' failed.\n", |
4545 | "request for firmware file '%s' failed.\n", | 4515 | il->firmware_name); |
4546 | il->firmware_name); | ||
4547 | goto try_again; | 4516 | goto try_again; |
4548 | } | 4517 | } |
4549 | 4518 | ||
4550 | D_INFO("Loaded firmware file '%s' (%zd bytes).\n", | 4519 | D_INFO("Loaded firmware file '%s' (%zd bytes).\n", il->firmware_name, |
4551 | il->firmware_name, ucode_raw->size); | 4520 | ucode_raw->size); |
4552 | 4521 | ||
4553 | /* Make sure that we got at least the API version number */ | 4522 | /* Make sure that we got at least the API version number */ |
4554 | if (ucode_raw->size < 4) { | 4523 | if (ucode_raw->size < 4) { |
@@ -4572,32 +4541,25 @@ il4965_ucode_callback(const struct firmware *ucode_raw, void *context) | |||
4572 | * on the API version read from firmware header from here on forward | 4541 | * on the API version read from firmware header from here on forward |
4573 | */ | 4542 | */ |
4574 | if (api_ver < api_min || api_ver > api_max) { | 4543 | if (api_ver < api_min || api_ver > api_max) { |
4575 | IL_ERR( | 4544 | IL_ERR("Driver unable to support your firmware API. " |
4576 | "Driver unable to support your firmware API. " | 4545 | "Driver supports v%u, firmware is v%u.\n", api_max, |
4577 | "Driver supports v%u, firmware is v%u.\n", | 4546 | api_ver); |
4578 | api_max, api_ver); | ||
4579 | goto try_again; | 4547 | goto try_again; |
4580 | } | 4548 | } |
4581 | 4549 | ||
4582 | if (api_ver != api_max) | 4550 | if (api_ver != api_max) |
4583 | IL_ERR( | 4551 | IL_ERR("Firmware has old API version. Expected v%u, " |
4584 | "Firmware has old API version. Expected v%u, " | 4552 | "got v%u. New firmware can be obtained " |
4585 | "got v%u. New firmware can be obtained " | 4553 | "from http://www.intellinuxwireless.org.\n", api_max, |
4586 | "from http://www.intellinuxwireless.org.\n", | 4554 | api_ver); |
4587 | api_max, api_ver); | ||
4588 | 4555 | ||
4589 | IL_INFO("loaded firmware version %u.%u.%u.%u\n", | 4556 | IL_INFO("loaded firmware version %u.%u.%u.%u\n", |
4590 | IL_UCODE_MAJOR(il->ucode_ver), | 4557 | IL_UCODE_MAJOR(il->ucode_ver), IL_UCODE_MINOR(il->ucode_ver), |
4591 | IL_UCODE_MINOR(il->ucode_ver), | 4558 | IL_UCODE_API(il->ucode_ver), IL_UCODE_SERIAL(il->ucode_ver)); |
4592 | IL_UCODE_API(il->ucode_ver), | ||
4593 | IL_UCODE_SERIAL(il->ucode_ver)); | ||
4594 | 4559 | ||
4595 | snprintf(il->hw->wiphy->fw_version, | 4560 | snprintf(il->hw->wiphy->fw_version, sizeof(il->hw->wiphy->fw_version), |
4596 | sizeof(il->hw->wiphy->fw_version), | 4561 | "%u.%u.%u.%u", IL_UCODE_MAJOR(il->ucode_ver), |
4597 | "%u.%u.%u.%u", | 4562 | IL_UCODE_MINOR(il->ucode_ver), IL_UCODE_API(il->ucode_ver), |
4598 | IL_UCODE_MAJOR(il->ucode_ver), | ||
4599 | IL_UCODE_MINOR(il->ucode_ver), | ||
4600 | IL_UCODE_API(il->ucode_ver), | ||
4601 | IL_UCODE_SERIAL(il->ucode_ver)); | 4563 | IL_UCODE_SERIAL(il->ucode_ver)); |
4602 | 4564 | ||
4603 | /* | 4565 | /* |
@@ -4606,47 +4568,41 @@ il4965_ucode_callback(const struct firmware *ucode_raw, void *context) | |||
4606 | * user just got a corrupted version of the latest API. | 4568 | * user just got a corrupted version of the latest API. |
4607 | */ | 4569 | */ |
4608 | 4570 | ||
4609 | D_INFO("f/w package hdr ucode version raw = 0x%x\n", | 4571 | D_INFO("f/w package hdr ucode version raw = 0x%x\n", il->ucode_ver); |
4610 | il->ucode_ver); | 4572 | D_INFO("f/w package hdr runtime inst size = %Zd\n", pieces.inst_size); |
4611 | D_INFO("f/w package hdr runtime inst size = %Zd\n", | 4573 | D_INFO("f/w package hdr runtime data size = %Zd\n", pieces.data_size); |
4612 | pieces.inst_size); | 4574 | D_INFO("f/w package hdr init inst size = %Zd\n", pieces.init_size); |
4613 | D_INFO("f/w package hdr runtime data size = %Zd\n", | 4575 | D_INFO("f/w package hdr init data size = %Zd\n", pieces.init_data_size); |
4614 | pieces.data_size); | 4576 | D_INFO("f/w package hdr boot inst size = %Zd\n", pieces.boot_size); |
4615 | D_INFO("f/w package hdr init inst size = %Zd\n", | ||
4616 | pieces.init_size); | ||
4617 | D_INFO("f/w package hdr init data size = %Zd\n", | ||
4618 | pieces.init_data_size); | ||
4619 | D_INFO("f/w package hdr boot inst size = %Zd\n", | ||
4620 | pieces.boot_size); | ||
4621 | 4577 | ||
4622 | /* Verify that uCode images will fit in card's SRAM */ | 4578 | /* Verify that uCode images will fit in card's SRAM */ |
4623 | if (pieces.inst_size > il->hw_params.max_inst_size) { | 4579 | if (pieces.inst_size > il->hw_params.max_inst_size) { |
4624 | IL_ERR("uCode instr len %Zd too large to fit in\n", | 4580 | IL_ERR("uCode instr len %Zd too large to fit in\n", |
4625 | pieces.inst_size); | 4581 | pieces.inst_size); |
4626 | goto try_again; | 4582 | goto try_again; |
4627 | } | 4583 | } |
4628 | 4584 | ||
4629 | if (pieces.data_size > il->hw_params.max_data_size) { | 4585 | if (pieces.data_size > il->hw_params.max_data_size) { |
4630 | IL_ERR("uCode data len %Zd too large to fit in\n", | 4586 | IL_ERR("uCode data len %Zd too large to fit in\n", |
4631 | pieces.data_size); | 4587 | pieces.data_size); |
4632 | goto try_again; | 4588 | goto try_again; |
4633 | } | 4589 | } |
4634 | 4590 | ||
4635 | if (pieces.init_size > il->hw_params.max_inst_size) { | 4591 | if (pieces.init_size > il->hw_params.max_inst_size) { |
4636 | IL_ERR("uCode init instr len %Zd too large to fit in\n", | 4592 | IL_ERR("uCode init instr len %Zd too large to fit in\n", |
4637 | pieces.init_size); | 4593 | pieces.init_size); |
4638 | goto try_again; | 4594 | goto try_again; |
4639 | } | 4595 | } |
4640 | 4596 | ||
4641 | if (pieces.init_data_size > il->hw_params.max_data_size) { | 4597 | if (pieces.init_data_size > il->hw_params.max_data_size) { |
4642 | IL_ERR("uCode init data len %Zd too large to fit in\n", | 4598 | IL_ERR("uCode init data len %Zd too large to fit in\n", |
4643 | pieces.init_data_size); | 4599 | pieces.init_data_size); |
4644 | goto try_again; | 4600 | goto try_again; |
4645 | } | 4601 | } |
4646 | 4602 | ||
4647 | if (pieces.boot_size > il->hw_params.max_bsm_size) { | 4603 | if (pieces.boot_size > il->hw_params.max_bsm_size) { |
4648 | IL_ERR("uCode boot instr len %Zd too large to fit in\n", | 4604 | IL_ERR("uCode boot instr len %Zd too large to fit in\n", |
4649 | pieces.boot_size); | 4605 | pieces.boot_size); |
4650 | goto try_again; | 4606 | goto try_again; |
4651 | } | 4607 | } |
4652 | 4608 | ||
@@ -4697,41 +4653,39 @@ il4965_ucode_callback(const struct firmware *ucode_raw, void *context) | |||
4697 | 4653 | ||
4698 | /* Runtime instructions (first block of data in file) */ | 4654 | /* Runtime instructions (first block of data in file) */ |
4699 | D_INFO("Copying (but not loading) uCode instr len %Zd\n", | 4655 | D_INFO("Copying (but not loading) uCode instr len %Zd\n", |
4700 | pieces.inst_size); | 4656 | pieces.inst_size); |
4701 | memcpy(il->ucode_code.v_addr, pieces.inst, pieces.inst_size); | 4657 | memcpy(il->ucode_code.v_addr, pieces.inst, pieces.inst_size); |
4702 | 4658 | ||
4703 | D_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n", | 4659 | D_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n", |
4704 | il->ucode_code.v_addr, (u32)il->ucode_code.p_addr); | 4660 | il->ucode_code.v_addr, (u32) il->ucode_code.p_addr); |
4705 | 4661 | ||
4706 | /* | 4662 | /* |
4707 | * Runtime data | 4663 | * Runtime data |
4708 | * NOTE: Copy into backup buffer will be done in il_up() | 4664 | * NOTE: Copy into backup buffer will be done in il_up() |
4709 | */ | 4665 | */ |
4710 | D_INFO("Copying (but not loading) uCode data len %Zd\n", | 4666 | D_INFO("Copying (but not loading) uCode data len %Zd\n", |
4711 | pieces.data_size); | 4667 | pieces.data_size); |
4712 | memcpy(il->ucode_data.v_addr, pieces.data, pieces.data_size); | 4668 | memcpy(il->ucode_data.v_addr, pieces.data, pieces.data_size); |
4713 | memcpy(il->ucode_data_backup.v_addr, pieces.data, pieces.data_size); | 4669 | memcpy(il->ucode_data_backup.v_addr, pieces.data, pieces.data_size); |
4714 | 4670 | ||
4715 | /* Initialization instructions */ | 4671 | /* Initialization instructions */ |
4716 | if (pieces.init_size) { | 4672 | if (pieces.init_size) { |
4717 | D_INFO( | 4673 | D_INFO("Copying (but not loading) init instr len %Zd\n", |
4718 | "Copying (but not loading) init instr len %Zd\n", | 4674 | pieces.init_size); |
4719 | pieces.init_size); | ||
4720 | memcpy(il->ucode_init.v_addr, pieces.init, pieces.init_size); | 4675 | memcpy(il->ucode_init.v_addr, pieces.init, pieces.init_size); |
4721 | } | 4676 | } |
4722 | 4677 | ||
4723 | /* Initialization data */ | 4678 | /* Initialization data */ |
4724 | if (pieces.init_data_size) { | 4679 | if (pieces.init_data_size) { |
4725 | D_INFO( | 4680 | D_INFO("Copying (but not loading) init data len %Zd\n", |
4726 | "Copying (but not loading) init data len %Zd\n", | 4681 | pieces.init_data_size); |
4727 | pieces.init_data_size); | ||
4728 | memcpy(il->ucode_init_data.v_addr, pieces.init_data, | 4682 | memcpy(il->ucode_init_data.v_addr, pieces.init_data, |
4729 | pieces.init_data_size); | 4683 | pieces.init_data_size); |
4730 | } | 4684 | } |
4731 | 4685 | ||
4732 | /* Bootstrap instructions */ | 4686 | /* Bootstrap instructions */ |
4733 | D_INFO("Copying (but not loading) boot instr len %Zd\n", | 4687 | D_INFO("Copying (but not loading) boot instr len %Zd\n", |
4734 | pieces.boot_size); | 4688 | pieces.boot_size); |
4735 | memcpy(il->ucode_boot.v_addr, pieces.boot, pieces.boot_size); | 4689 | memcpy(il->ucode_boot.v_addr, pieces.boot, pieces.boot_size); |
4736 | 4690 | ||
4737 | /* | 4691 | /* |
@@ -4739,9 +4693,9 @@ il4965_ucode_callback(const struct firmware *ucode_raw, void *context) | |||
4739 | * base on the size of standard phy calibration commands table size | 4693 | * base on the size of standard phy calibration commands table size |
4740 | */ | 4694 | */ |
4741 | il->_4965.phy_calib_chain_noise_reset_cmd = | 4695 | il->_4965.phy_calib_chain_noise_reset_cmd = |
4742 | standard_phy_calibration_size; | 4696 | standard_phy_calibration_size; |
4743 | il->_4965.phy_calib_chain_noise_gain_cmd = | 4697 | il->_4965.phy_calib_chain_noise_gain_cmd = |
4744 | standard_phy_calibration_size + 1; | 4698 | standard_phy_calibration_size + 1; |
4745 | 4699 | ||
4746 | /************************************************** | 4700 | /************************************************** |
4747 | * This is still part of probe() in a sense... | 4701 | * This is still part of probe() in a sense... |
@@ -4754,11 +4708,10 @@ il4965_ucode_callback(const struct firmware *ucode_raw, void *context) | |||
4754 | 4708 | ||
4755 | err = il_dbgfs_register(il, DRV_NAME); | 4709 | err = il_dbgfs_register(il, DRV_NAME); |
4756 | if (err) | 4710 | if (err) |
4757 | IL_ERR( | 4711 | IL_ERR("failed to create debugfs files. Ignoring error: %d\n", |
4758 | "failed to create debugfs files. Ignoring error: %d\n", err); | 4712 | err); |
4759 | 4713 | ||
4760 | err = sysfs_create_group(&il->pci_dev->dev.kobj, | 4714 | err = sysfs_create_group(&il->pci_dev->dev.kobj, &il_attribute_group); |
4761 | &il_attribute_group); | ||
4762 | if (err) { | 4715 | if (err) { |
4763 | IL_ERR("failed to create sysfs device attributes\n"); | 4716 | IL_ERR("failed to create sysfs device attributes\n"); |
4764 | goto out_unbind; | 4717 | goto out_unbind; |
@@ -4769,23 +4722,23 @@ il4965_ucode_callback(const struct firmware *ucode_raw, void *context) | |||
4769 | complete(&il->_4965.firmware_loading_complete); | 4722 | complete(&il->_4965.firmware_loading_complete); |
4770 | return; | 4723 | return; |
4771 | 4724 | ||
4772 | try_again: | 4725 | try_again: |
4773 | /* try next, if any */ | 4726 | /* try next, if any */ |
4774 | if (il4965_request_firmware(il, false)) | 4727 | if (il4965_request_firmware(il, false)) |
4775 | goto out_unbind; | 4728 | goto out_unbind; |
4776 | release_firmware(ucode_raw); | 4729 | release_firmware(ucode_raw); |
4777 | return; | 4730 | return; |
4778 | 4731 | ||
4779 | err_pci_alloc: | 4732 | err_pci_alloc: |
4780 | IL_ERR("failed to allocate pci memory\n"); | 4733 | IL_ERR("failed to allocate pci memory\n"); |
4781 | il4965_dealloc_ucode_pci(il); | 4734 | il4965_dealloc_ucode_pci(il); |
4782 | out_unbind: | 4735 | out_unbind: |
4783 | complete(&il->_4965.firmware_loading_complete); | 4736 | complete(&il->_4965.firmware_loading_complete); |
4784 | device_release_driver(&il->pci_dev->dev); | 4737 | device_release_driver(&il->pci_dev->dev); |
4785 | release_firmware(ucode_raw); | 4738 | release_firmware(ucode_raw); |
4786 | } | 4739 | } |
4787 | 4740 | ||
4788 | static const char * const desc_lookup_text[] = { | 4741 | static const char *const desc_lookup_text[] = { |
4789 | "OK", | 4742 | "OK", |
4790 | "FAIL", | 4743 | "FAIL", |
4791 | "BAD_PARAM", | 4744 | "BAD_PARAM", |
@@ -4816,26 +4769,30 @@ static const char * const desc_lookup_text[] = { | |||
4816 | "DEBUG_3", | 4769 | "DEBUG_3", |
4817 | }; | 4770 | }; |
4818 | 4771 | ||
4819 | static struct { char *name; u8 num; } advanced_lookup[] = { | 4772 | static struct { |
4820 | { "NMI_INTERRUPT_WDG", 0x34 }, | 4773 | char *name; |
4821 | { "SYSASSERT", 0x35 }, | 4774 | u8 num; |
4822 | { "UCODE_VERSION_MISMATCH", 0x37 }, | 4775 | } advanced_lookup[] = { |
4823 | { "BAD_COMMAND", 0x38 }, | 4776 | { |
4824 | { "NMI_INTERRUPT_DATA_ACTION_PT", 0x3C }, | 4777 | "NMI_INTERRUPT_WDG", 0x34}, { |
4825 | { "FATAL_ERROR", 0x3D }, | 4778 | "SYSASSERT", 0x35}, { |
4826 | { "NMI_TRM_HW_ERR", 0x46 }, | 4779 | "UCODE_VERSION_MISMATCH", 0x37}, { |
4827 | { "NMI_INTERRUPT_TRM", 0x4C }, | 4780 | "BAD_COMMAND", 0x38}, { |
4828 | { "NMI_INTERRUPT_BREAK_POINT", 0x54 }, | 4781 | "NMI_INTERRUPT_DATA_ACTION_PT", 0x3C}, { |
4829 | { "NMI_INTERRUPT_WDG_RXF_FULL", 0x5C }, | 4782 | "FATAL_ERROR", 0x3D}, { |
4830 | { "NMI_INTERRUPT_WDG_NO_RBD_RXF_FULL", 0x64 }, | 4783 | "NMI_TRM_HW_ERR", 0x46}, { |
4831 | { "NMI_INTERRUPT_HOST", 0x66 }, | 4784 | "NMI_INTERRUPT_TRM", 0x4C}, { |
4832 | { "NMI_INTERRUPT_ACTION_PT", 0x7C }, | 4785 | "NMI_INTERRUPT_BREAK_POINT", 0x54}, { |
4833 | { "NMI_INTERRUPT_UNKNOWN", 0x84 }, | 4786 | "NMI_INTERRUPT_WDG_RXF_FULL", 0x5C}, { |
4834 | { "NMI_INTERRUPT_INST_ACTION_PT", 0x86 }, | 4787 | "NMI_INTERRUPT_WDG_NO_RBD_RXF_FULL", 0x64}, { |
4835 | { "ADVANCED_SYSASSERT", 0 }, | 4788 | "NMI_INTERRUPT_HOST", 0x66}, { |
4836 | }; | 4789 | "NMI_INTERRUPT_ACTION_PT", 0x7C}, { |
4837 | 4790 | "NMI_INTERRUPT_UNKNOWN", 0x84}, { | |
4838 | static const char *il4965_desc_lookup(u32 num) | 4791 | "NMI_INTERRUPT_INST_ACTION_PT", 0x86}, { |
4792 | "ADVANCED_SYSASSERT", 0},}; | ||
4793 | |||
4794 | static const char * | ||
4795 | il4965_desc_lookup(u32 num) | ||
4839 | { | 4796 | { |
4840 | int i; | 4797 | int i; |
4841 | int max = ARRAY_SIZE(desc_lookup_text); | 4798 | int max = ARRAY_SIZE(desc_lookup_text); |
@@ -4854,7 +4811,8 @@ static const char *il4965_desc_lookup(u32 num) | |||
4854 | #define ERROR_START_OFFSET (1 * sizeof(u32)) | 4811 | #define ERROR_START_OFFSET (1 * sizeof(u32)) |
4855 | #define ERROR_ELEM_SIZE (7 * sizeof(u32)) | 4812 | #define ERROR_ELEM_SIZE (7 * sizeof(u32)) |
4856 | 4813 | ||
4857 | void il4965_dump_nic_error_log(struct il_priv *il) | 4814 | void |
4815 | il4965_dump_nic_error_log(struct il_priv *il) | ||
4858 | { | 4816 | { |
4859 | u32 data2, line; | 4817 | u32 data2, line; |
4860 | u32 desc, time, count, base, data1; | 4818 | u32 desc, time, count, base, data1; |
@@ -4868,9 +4826,8 @@ void il4965_dump_nic_error_log(struct il_priv *il) | |||
4868 | } | 4826 | } |
4869 | 4827 | ||
4870 | if (!il->cfg->ops->lib->is_valid_rtc_data_addr(base)) { | 4828 | if (!il->cfg->ops->lib->is_valid_rtc_data_addr(base)) { |
4871 | IL_ERR( | 4829 | IL_ERR("Not valid error log pointer 0x%08X for %s uCode\n", |
4872 | "Not valid error log pointer 0x%08X for %s uCode\n", | 4830 | base, (il->ucode_type == UCODE_INIT) ? "Init" : "RT"); |
4873 | base, (il->ucode_type == UCODE_INIT) ? "Init" : "RT"); | ||
4874 | return; | 4831 | return; |
4875 | } | 4832 | } |
4876 | 4833 | ||
@@ -4878,8 +4835,7 @@ void il4965_dump_nic_error_log(struct il_priv *il) | |||
4878 | 4835 | ||
4879 | if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) { | 4836 | if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) { |
4880 | IL_ERR("Start IWL Error Log Dump:\n"); | 4837 | IL_ERR("Start IWL Error Log Dump:\n"); |
4881 | IL_ERR("Status: 0x%08lX, count: %d\n", | 4838 | IL_ERR("Status: 0x%08lX, count: %d\n", il->status, count); |
4882 | il->status, count); | ||
4883 | } | 4839 | } |
4884 | 4840 | ||
4885 | desc = il_read_targ_mem(il, base + 1 * sizeof(u32)); | 4841 | desc = il_read_targ_mem(il, base + 1 * sizeof(u32)); |
@@ -4896,15 +4852,16 @@ void il4965_dump_nic_error_log(struct il_priv *il) | |||
4896 | hcmd = il_read_targ_mem(il, base + 22 * sizeof(u32)); | 4852 | hcmd = il_read_targ_mem(il, base + 22 * sizeof(u32)); |
4897 | 4853 | ||
4898 | IL_ERR("Desc Time " | 4854 | IL_ERR("Desc Time " |
4899 | "data1 data2 line\n"); | 4855 | "data1 data2 line\n"); |
4900 | IL_ERR("%-28s (0x%04X) %010u 0x%08X 0x%08X %u\n", | 4856 | IL_ERR("%-28s (0x%04X) %010u 0x%08X 0x%08X %u\n", |
4901 | il4965_desc_lookup(desc), desc, time, data1, data2, line); | 4857 | il4965_desc_lookup(desc), desc, time, data1, data2, line); |
4902 | IL_ERR("pc blink1 blink2 ilink1 ilink2 hcmd\n"); | 4858 | IL_ERR("pc blink1 blink2 ilink1 ilink2 hcmd\n"); |
4903 | IL_ERR("0x%05X 0x%05X 0x%05X 0x%05X 0x%05X 0x%05X\n", | 4859 | IL_ERR("0x%05X 0x%05X 0x%05X 0x%05X 0x%05X 0x%05X\n", pc, blink1, |
4904 | pc, blink1, blink2, ilink1, ilink2, hcmd); | 4860 | blink2, ilink1, ilink2, hcmd); |
4905 | } | 4861 | } |
4906 | 4862 | ||
4907 | static void il4965_rf_kill_ct_config(struct il_priv *il) | 4863 | static void |
4864 | il4965_rf_kill_ct_config(struct il_priv *il) | ||
4908 | { | 4865 | { |
4909 | struct il_ct_kill_config cmd; | 4866 | struct il_ct_kill_config cmd; |
4910 | unsigned long flags; | 4867 | unsigned long flags; |
@@ -4912,21 +4869,19 @@ static void il4965_rf_kill_ct_config(struct il_priv *il) | |||
4912 | 4869 | ||
4913 | spin_lock_irqsave(&il->lock, flags); | 4870 | spin_lock_irqsave(&il->lock, flags); |
4914 | _il_wr(il, CSR_UCODE_DRV_GP1_CLR, | 4871 | _il_wr(il, CSR_UCODE_DRV_GP1_CLR, |
4915 | CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT); | 4872 | CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT); |
4916 | spin_unlock_irqrestore(&il->lock, flags); | 4873 | spin_unlock_irqrestore(&il->lock, flags); |
4917 | 4874 | ||
4918 | cmd.critical_temperature_R = | 4875 | cmd.critical_temperature_R = |
4919 | cpu_to_le32(il->hw_params.ct_kill_threshold); | 4876 | cpu_to_le32(il->hw_params.ct_kill_threshold); |
4920 | 4877 | ||
4921 | ret = il_send_cmd_pdu(il, C_CT_KILL_CONFIG, | 4878 | ret = il_send_cmd_pdu(il, C_CT_KILL_CONFIG, sizeof(cmd), &cmd); |
4922 | sizeof(cmd), &cmd); | ||
4923 | if (ret) | 4879 | if (ret) |
4924 | IL_ERR("C_CT_KILL_CONFIG failed\n"); | 4880 | IL_ERR("C_CT_KILL_CONFIG failed\n"); |
4925 | else | 4881 | else |
4926 | D_INFO("C_CT_KILL_CONFIG " | 4882 | D_INFO("C_CT_KILL_CONFIG " "succeeded, " |
4927 | "succeeded, " | 4883 | "critical temperature is %d\n", |
4928 | "critical temperature is %d\n", | 4884 | il->hw_params.ct_kill_threshold); |
4929 | il->hw_params.ct_kill_threshold); | ||
4930 | } | 4885 | } |
4931 | 4886 | ||
4932 | static const s8 default_queue_to_tx_fifo[] = { | 4887 | static const s8 default_queue_to_tx_fifo[] = { |
@@ -4941,7 +4896,8 @@ static const s8 default_queue_to_tx_fifo[] = { | |||
4941 | 4896 | ||
4942 | #define IL_MASK(lo, hi) ((1 << (hi)) | ((1 << (hi)) - (1 << (lo)))) | 4897 | #define IL_MASK(lo, hi) ((1 << (hi)) | ((1 << (hi)) - (1 << (lo)))) |
4943 | 4898 | ||
4944 | static int il4965_alive_notify(struct il_priv *il) | 4899 | static int |
4900 | il4965_alive_notify(struct il_priv *il) | ||
4945 | { | 4901 | { |
4946 | u32 a; | 4902 | u32 a; |
4947 | unsigned long flags; | 4903 | unsigned long flags; |
@@ -4951,32 +4907,32 @@ static int il4965_alive_notify(struct il_priv *il) | |||
4951 | spin_lock_irqsave(&il->lock, flags); | 4907 | spin_lock_irqsave(&il->lock, flags); |
4952 | 4908 | ||
4953 | /* Clear 4965's internal Tx Scheduler data base */ | 4909 | /* Clear 4965's internal Tx Scheduler data base */ |
4954 | il->scd_base_addr = il_rd_prph(il, | 4910 | il->scd_base_addr = il_rd_prph(il, IL49_SCD_SRAM_BASE_ADDR); |
4955 | IL49_SCD_SRAM_BASE_ADDR); | ||
4956 | a = il->scd_base_addr + IL49_SCD_CONTEXT_DATA_OFFSET; | 4911 | a = il->scd_base_addr + IL49_SCD_CONTEXT_DATA_OFFSET; |
4957 | for (; a < il->scd_base_addr + IL49_SCD_TX_STTS_BITMAP_OFFSET; a += 4) | 4912 | for (; a < il->scd_base_addr + IL49_SCD_TX_STTS_BITMAP_OFFSET; a += 4) |
4958 | il_write_targ_mem(il, a, 0); | 4913 | il_write_targ_mem(il, a, 0); |
4959 | for (; a < il->scd_base_addr + IL49_SCD_TRANSLATE_TBL_OFFSET; a += 4) | 4914 | for (; a < il->scd_base_addr + IL49_SCD_TRANSLATE_TBL_OFFSET; a += 4) |
4960 | il_write_targ_mem(il, a, 0); | 4915 | il_write_targ_mem(il, a, 0); |
4961 | for (; a < il->scd_base_addr + | 4916 | for (; |
4962 | IL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(il->hw_params.max_txq_num); a += 4) | 4917 | a < |
4918 | il->scd_base_addr + | ||
4919 | IL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(il->hw_params.max_txq_num); | ||
4920 | a += 4) | ||
4963 | il_write_targ_mem(il, a, 0); | 4921 | il_write_targ_mem(il, a, 0); |
4964 | 4922 | ||
4965 | /* Tel 4965 where to find Tx byte count tables */ | 4923 | /* Tel 4965 where to find Tx byte count tables */ |
4966 | il_wr_prph(il, IL49_SCD_DRAM_BASE_ADDR, | 4924 | il_wr_prph(il, IL49_SCD_DRAM_BASE_ADDR, il->scd_bc_tbls.dma >> 10); |
4967 | il->scd_bc_tbls.dma >> 10); | ||
4968 | 4925 | ||
4969 | /* Enable DMA channel */ | 4926 | /* Enable DMA channel */ |
4970 | for (chan = 0; chan < FH49_TCSR_CHNL_NUM ; chan++) | 4927 | for (chan = 0; chan < FH49_TCSR_CHNL_NUM; chan++) |
4971 | il_wr(il, | 4928 | il_wr(il, FH49_TCSR_CHNL_TX_CONFIG_REG(chan), |
4972 | FH49_TCSR_CHNL_TX_CONFIG_REG(chan), | 4929 | FH49_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE | |
4973 | FH49_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE | | 4930 | FH49_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE); |
4974 | FH49_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE); | ||
4975 | 4931 | ||
4976 | /* Update FH chicken bits */ | 4932 | /* Update FH chicken bits */ |
4977 | reg_val = il_rd(il, FH49_TX_CHICKEN_BITS_REG); | 4933 | reg_val = il_rd(il, FH49_TX_CHICKEN_BITS_REG); |
4978 | il_wr(il, FH49_TX_CHICKEN_BITS_REG, | 4934 | il_wr(il, FH49_TX_CHICKEN_BITS_REG, |
4979 | reg_val | FH49_TX_CHICKEN_BITS_SCD_AUTO_RETRY_EN); | 4935 | reg_val | FH49_TX_CHICKEN_BITS_SCD_AUTO_RETRY_EN); |
4980 | 4936 | ||
4981 | /* Disable chain mode for all queues */ | 4937 | /* Disable chain mode for all queues */ |
4982 | il_wr_prph(il, IL49_SCD_QUEUECHAIN_SEL, 0); | 4938 | il_wr_prph(il, IL49_SCD_QUEUECHAIN_SEL, 0); |
@@ -4989,23 +4945,25 @@ static int il4965_alive_notify(struct il_priv *il) | |||
4989 | il_wr(il, HBUS_TARG_WRPTR, 0 | (i << 8)); | 4945 | il_wr(il, HBUS_TARG_WRPTR, 0 | (i << 8)); |
4990 | 4946 | ||
4991 | /* Max Tx Window size for Scheduler-ACK mode */ | 4947 | /* Max Tx Window size for Scheduler-ACK mode */ |
4992 | il_write_targ_mem(il, il->scd_base_addr + | 4948 | il_write_targ_mem(il, |
4993 | IL49_SCD_CONTEXT_QUEUE_OFFSET(i), | 4949 | il->scd_base_addr + |
4994 | (SCD_WIN_SIZE << | 4950 | IL49_SCD_CONTEXT_QUEUE_OFFSET(i), |
4995 | IL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) & | 4951 | (SCD_WIN_SIZE << |
4996 | IL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK); | 4952 | IL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) & |
4953 | IL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK); | ||
4997 | 4954 | ||
4998 | /* Frame limit */ | 4955 | /* Frame limit */ |
4999 | il_write_targ_mem(il, il->scd_base_addr + | 4956 | il_write_targ_mem(il, |
5000 | IL49_SCD_CONTEXT_QUEUE_OFFSET(i) + | 4957 | il->scd_base_addr + |
5001 | sizeof(u32), | 4958 | IL49_SCD_CONTEXT_QUEUE_OFFSET(i) + |
5002 | (SCD_FRAME_LIMIT << | 4959 | sizeof(u32), |
5003 | IL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) & | 4960 | (SCD_FRAME_LIMIT << |
5004 | IL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK); | 4961 | IL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) & |
4962 | IL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK); | ||
5005 | 4963 | ||
5006 | } | 4964 | } |
5007 | il_wr_prph(il, IL49_SCD_INTERRUPT_MASK, | 4965 | il_wr_prph(il, IL49_SCD_INTERRUPT_MASK, |
5008 | (1 << il->hw_params.max_txq_num) - 1); | 4966 | (1 << il->hw_params.max_txq_num) - 1); |
5009 | 4967 | ||
5010 | /* Activate all Tx DMA/FIFO channels */ | 4968 | /* Activate all Tx DMA/FIFO channels */ |
5011 | il4965_txq_set_sched(il, IL_MASK(0, 6)); | 4969 | il4965_txq_set_sched(il, IL_MASK(0, 6)); |
@@ -5043,7 +5001,8 @@ static int il4965_alive_notify(struct il_priv *il) | |||
5043 | * from protocol/runtime uCode (initialization uCode's | 5001 | * from protocol/runtime uCode (initialization uCode's |
5044 | * Alive gets handled by il_init_alive_start()). | 5002 | * Alive gets handled by il_init_alive_start()). |
5045 | */ | 5003 | */ |
5046 | static void il4965_alive_start(struct il_priv *il) | 5004 | static void |
5005 | il4965_alive_start(struct il_priv *il) | ||
5047 | { | 5006 | { |
5048 | int ret = 0; | 5007 | int ret = 0; |
5049 | struct il_rxon_context *ctx = &il->ctx; | 5008 | struct il_rxon_context *ctx = &il->ctx; |
@@ -5069,12 +5028,10 @@ static void il4965_alive_start(struct il_priv *il) | |||
5069 | 5028 | ||
5070 | ret = il4965_alive_notify(il); | 5029 | ret = il4965_alive_notify(il); |
5071 | if (ret) { | 5030 | if (ret) { |
5072 | IL_WARN( | 5031 | IL_WARN("Could not complete ALIVE transition [ntf]: %d\n", ret); |
5073 | "Could not complete ALIVE transition [ntf]: %d\n", ret); | ||
5074 | goto restart; | 5032 | goto restart; |
5075 | } | 5033 | } |
5076 | 5034 | ||
5077 | |||
5078 | /* After the ALIVE response, we can send host commands to the uCode */ | 5035 | /* After the ALIVE response, we can send host commands to the uCode */ |
5079 | set_bit(S_ALIVE, &il->status); | 5036 | set_bit(S_ALIVE, &il->status); |
5080 | 5037 | ||
@@ -5090,7 +5047,7 @@ static void il4965_alive_start(struct il_priv *il) | |||
5090 | 5047 | ||
5091 | if (il_is_associated_ctx(ctx)) { | 5048 | if (il_is_associated_ctx(ctx)) { |
5092 | struct il_rxon_cmd *active_rxon = | 5049 | struct il_rxon_cmd *active_rxon = |
5093 | (struct il_rxon_cmd *)&ctx->active; | 5050 | (struct il_rxon_cmd *)&ctx->active; |
5094 | /* apply any changes in staging */ | 5051 | /* apply any changes in staging */ |
5095 | ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK; | 5052 | ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK; |
5096 | active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK; | 5053 | active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK; |
@@ -5123,13 +5080,14 @@ static void il4965_alive_start(struct il_priv *il) | |||
5123 | 5080 | ||
5124 | return; | 5081 | return; |
5125 | 5082 | ||
5126 | restart: | 5083 | restart: |
5127 | queue_work(il->workqueue, &il->restart); | 5084 | queue_work(il->workqueue, &il->restart); |
5128 | } | 5085 | } |
5129 | 5086 | ||
5130 | static void il4965_cancel_deferred_work(struct il_priv *il); | 5087 | static void il4965_cancel_deferred_work(struct il_priv *il); |
5131 | 5088 | ||
5132 | static void __il4965_down(struct il_priv *il) | 5089 | static void |
5090 | __il4965_down(struct il_priv *il) | ||
5133 | { | 5091 | { |
5134 | unsigned long flags; | 5092 | unsigned long flags; |
5135 | int exit_pending; | 5093 | int exit_pending; |
@@ -5171,25 +5129,28 @@ static void __il4965_down(struct il_priv *il) | |||
5171 | /* If we have not previously called il_init() then | 5129 | /* If we have not previously called il_init() then |
5172 | * clear all bits but the RF Kill bit and return */ | 5130 | * clear all bits but the RF Kill bit and return */ |
5173 | if (!il_is_init(il)) { | 5131 | if (!il_is_init(il)) { |
5174 | il->status = test_bit(S_RF_KILL_HW, &il->status) << | 5132 | il->status = |
5175 | S_RF_KILL_HW | | 5133 | test_bit(S_RF_KILL_HW, |
5176 | test_bit(S_GEO_CONFIGURED, &il->status) << | 5134 | &il-> |
5177 | S_GEO_CONFIGURED | | 5135 | status) << S_RF_KILL_HW | |
5178 | test_bit(S_EXIT_PENDING, &il->status) << | 5136 | test_bit(S_GEO_CONFIGURED, |
5179 | S_EXIT_PENDING; | 5137 | &il-> |
5138 | status) << S_GEO_CONFIGURED | | ||
5139 | test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING; | ||
5180 | goto exit; | 5140 | goto exit; |
5181 | } | 5141 | } |
5182 | 5142 | ||
5183 | /* ...otherwise clear out all the status bits but the RF Kill | 5143 | /* ...otherwise clear out all the status bits but the RF Kill |
5184 | * bit and continue taking the NIC down. */ | 5144 | * bit and continue taking the NIC down. */ |
5185 | il->status &= test_bit(S_RF_KILL_HW, &il->status) << | 5145 | il->status &= |
5186 | S_RF_KILL_HW | | 5146 | test_bit(S_RF_KILL_HW, |
5187 | test_bit(S_GEO_CONFIGURED, &il->status) << | 5147 | &il->status) << S_RF_KILL_HW | test_bit(S_GEO_CONFIGURED, |
5188 | S_GEO_CONFIGURED | | 5148 | &il-> |
5189 | test_bit(S_FW_ERROR, &il->status) << | 5149 | status) << |
5190 | S_FW_ERROR | | 5150 | S_GEO_CONFIGURED | test_bit(S_FW_ERROR, |
5191 | test_bit(S_EXIT_PENDING, &il->status) << | 5151 | &il-> |
5192 | S_EXIT_PENDING; | 5152 | status) << S_FW_ERROR | |
5153 | test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING; | ||
5193 | 5154 | ||
5194 | il4965_txq_ctx_stop(il); | 5155 | il4965_txq_ctx_stop(il); |
5195 | il4965_rxq_stop(il); | 5156 | il4965_rxq_stop(il); |
@@ -5199,13 +5160,12 @@ static void __il4965_down(struct il_priv *il) | |||
5199 | udelay(5); | 5160 | udelay(5); |
5200 | 5161 | ||
5201 | /* Make sure (redundant) we've released our request to stay awake */ | 5162 | /* Make sure (redundant) we've released our request to stay awake */ |
5202 | il_clear_bit(il, CSR_GP_CNTRL, | 5163 | il_clear_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); |
5203 | CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); | ||
5204 | 5164 | ||
5205 | /* Stop the device, and put it in low power state */ | 5165 | /* Stop the device, and put it in low power state */ |
5206 | il_apm_stop(il); | 5166 | il_apm_stop(il); |
5207 | 5167 | ||
5208 | exit: | 5168 | exit: |
5209 | memset(&il->card_alive, 0, sizeof(struct il_alive_resp)); | 5169 | memset(&il->card_alive, 0, sizeof(struct il_alive_resp)); |
5210 | 5170 | ||
5211 | dev_kfree_skb(il->beacon_skb); | 5171 | dev_kfree_skb(il->beacon_skb); |
@@ -5215,7 +5175,8 @@ static void __il4965_down(struct il_priv *il) | |||
5215 | il4965_clear_free_frames(il); | 5175 | il4965_clear_free_frames(il); |
5216 | } | 5176 | } |
5217 | 5177 | ||
5218 | static void il4965_down(struct il_priv *il) | 5178 | static void |
5179 | il4965_down(struct il_priv *il) | ||
5219 | { | 5180 | { |
5220 | mutex_lock(&il->mutex); | 5181 | mutex_lock(&il->mutex); |
5221 | __il4965_down(il); | 5182 | __il4965_down(il); |
@@ -5226,29 +5187,30 @@ static void il4965_down(struct il_priv *il) | |||
5226 | 5187 | ||
5227 | #define HW_READY_TIMEOUT (50) | 5188 | #define HW_READY_TIMEOUT (50) |
5228 | 5189 | ||
5229 | static int il4965_set_hw_ready(struct il_priv *il) | 5190 | static int |
5191 | il4965_set_hw_ready(struct il_priv *il) | ||
5230 | { | 5192 | { |
5231 | int ret = 0; | 5193 | int ret = 0; |
5232 | 5194 | ||
5233 | il_set_bit(il, CSR_HW_IF_CONFIG_REG, | 5195 | il_set_bit(il, CSR_HW_IF_CONFIG_REG, |
5234 | CSR_HW_IF_CONFIG_REG_BIT_NIC_READY); | 5196 | CSR_HW_IF_CONFIG_REG_BIT_NIC_READY); |
5235 | 5197 | ||
5236 | /* See if we got it */ | 5198 | /* See if we got it */ |
5237 | ret = _il_poll_bit(il, CSR_HW_IF_CONFIG_REG, | 5199 | ret = |
5238 | CSR_HW_IF_CONFIG_REG_BIT_NIC_READY, | 5200 | _il_poll_bit(il, CSR_HW_IF_CONFIG_REG, |
5239 | CSR_HW_IF_CONFIG_REG_BIT_NIC_READY, | 5201 | CSR_HW_IF_CONFIG_REG_BIT_NIC_READY, |
5240 | HW_READY_TIMEOUT); | 5202 | CSR_HW_IF_CONFIG_REG_BIT_NIC_READY, HW_READY_TIMEOUT); |
5241 | if (ret != -ETIMEDOUT) | 5203 | if (ret != -ETIMEDOUT) |
5242 | il->hw_ready = true; | 5204 | il->hw_ready = true; |
5243 | else | 5205 | else |
5244 | il->hw_ready = false; | 5206 | il->hw_ready = false; |
5245 | 5207 | ||
5246 | D_INFO("hardware %s\n", | 5208 | D_INFO("hardware %s\n", (il->hw_ready == 1) ? "ready" : "not ready"); |
5247 | (il->hw_ready == 1) ? "ready" : "not ready"); | ||
5248 | return ret; | 5209 | return ret; |
5249 | } | 5210 | } |
5250 | 5211 | ||
5251 | static int il4965_prepare_card_hw(struct il_priv *il) | 5212 | static int |
5213 | il4965_prepare_card_hw(struct il_priv *il) | ||
5252 | { | 5214 | { |
5253 | int ret = 0; | 5215 | int ret = 0; |
5254 | 5216 | ||
@@ -5259,12 +5221,12 @@ static int il4965_prepare_card_hw(struct il_priv *il) | |||
5259 | return ret; | 5221 | return ret; |
5260 | 5222 | ||
5261 | /* If HW is not ready, prepare the conditions to check again */ | 5223 | /* If HW is not ready, prepare the conditions to check again */ |
5262 | il_set_bit(il, CSR_HW_IF_CONFIG_REG, | 5224 | il_set_bit(il, CSR_HW_IF_CONFIG_REG, CSR_HW_IF_CONFIG_REG_PREPARE); |
5263 | CSR_HW_IF_CONFIG_REG_PREPARE); | ||
5264 | 5225 | ||
5265 | ret = _il_poll_bit(il, CSR_HW_IF_CONFIG_REG, | 5226 | ret = |
5266 | ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, | 5227 | _il_poll_bit(il, CSR_HW_IF_CONFIG_REG, |
5267 | CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000); | 5228 | ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, |
5229 | CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000); | ||
5268 | 5230 | ||
5269 | /* HW should be ready by now, check again. */ | 5231 | /* HW should be ready by now, check again. */ |
5270 | if (ret != -ETIMEDOUT) | 5232 | if (ret != -ETIMEDOUT) |
@@ -5275,7 +5237,8 @@ static int il4965_prepare_card_hw(struct il_priv *il) | |||
5275 | 5237 | ||
5276 | #define MAX_HW_RESTARTS 5 | 5238 | #define MAX_HW_RESTARTS 5 |
5277 | 5239 | ||
5278 | static int __il4965_up(struct il_priv *il) | 5240 | static int |
5241 | __il4965_up(struct il_priv *il) | ||
5279 | { | 5242 | { |
5280 | int i; | 5243 | int i; |
5281 | int ret; | 5244 | int ret; |
@@ -5304,8 +5267,7 @@ static int __il4965_up(struct il_priv *il) | |||
5304 | } | 5267 | } |
5305 | 5268 | ||
5306 | /* If platform's RF_KILL switch is NOT set to KILL */ | 5269 | /* If platform's RF_KILL switch is NOT set to KILL */ |
5307 | if (_il_rd(il, | 5270 | if (_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW) |
5308 | CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW) | ||
5309 | clear_bit(S_RF_KILL_HW, &il->status); | 5271 | clear_bit(S_RF_KILL_HW, &il->status); |
5310 | else | 5272 | else |
5311 | set_bit(S_RF_KILL_HW, &il->status); | 5273 | set_bit(S_RF_KILL_HW, &il->status); |
@@ -5331,8 +5293,7 @@ static int __il4965_up(struct il_priv *il) | |||
5331 | 5293 | ||
5332 | /* make sure rfkill handshake bits are cleared */ | 5294 | /* make sure rfkill handshake bits are cleared */ |
5333 | _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); | 5295 | _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); |
5334 | _il_wr(il, CSR_UCODE_DRV_GP1_CLR, | 5296 | _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); |
5335 | CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); | ||
5336 | 5297 | ||
5337 | /* clear (again), then enable host interrupts */ | 5298 | /* clear (again), then enable host interrupts */ |
5338 | _il_wr(il, CSR_INT, 0xFFFFFFFF); | 5299 | _il_wr(il, CSR_INT, 0xFFFFFFFF); |
@@ -5356,8 +5317,7 @@ static int __il4965_up(struct il_priv *il) | |||
5356 | ret = il->cfg->ops->lib->load_ucode(il); | 5317 | ret = il->cfg->ops->lib->load_ucode(il); |
5357 | 5318 | ||
5358 | if (ret) { | 5319 | if (ret) { |
5359 | IL_ERR("Unable to set up bootstrap uCode: %d\n", | 5320 | IL_ERR("Unable to set up bootstrap uCode: %d\n", ret); |
5360 | ret); | ||
5361 | continue; | 5321 | continue; |
5362 | } | 5322 | } |
5363 | 5323 | ||
@@ -5379,14 +5339,14 @@ static int __il4965_up(struct il_priv *il) | |||
5379 | return -EIO; | 5339 | return -EIO; |
5380 | } | 5340 | } |
5381 | 5341 | ||
5382 | |||
5383 | /***************************************************************************** | 5342 | /***************************************************************************** |
5384 | * | 5343 | * |
5385 | * Workqueue callbacks | 5344 | * Workqueue callbacks |
5386 | * | 5345 | * |
5387 | *****************************************************************************/ | 5346 | *****************************************************************************/ |
5388 | 5347 | ||
5389 | static void il4965_bg_init_alive_start(struct work_struct *data) | 5348 | static void |
5349 | il4965_bg_init_alive_start(struct work_struct *data) | ||
5390 | { | 5350 | { |
5391 | struct il_priv *il = | 5351 | struct il_priv *il = |
5392 | container_of(data, struct il_priv, init_alive_start.work); | 5352 | container_of(data, struct il_priv, init_alive_start.work); |
@@ -5400,7 +5360,8 @@ out: | |||
5400 | mutex_unlock(&il->mutex); | 5360 | mutex_unlock(&il->mutex); |
5401 | } | 5361 | } |
5402 | 5362 | ||
5403 | static void il4965_bg_alive_start(struct work_struct *data) | 5363 | static void |
5364 | il4965_bg_alive_start(struct work_struct *data) | ||
5404 | { | 5365 | { |
5405 | struct il_priv *il = | 5366 | struct il_priv *il = |
5406 | container_of(data, struct il_priv, alive_start.work); | 5367 | container_of(data, struct il_priv, alive_start.work); |
@@ -5414,10 +5375,11 @@ out: | |||
5414 | mutex_unlock(&il->mutex); | 5375 | mutex_unlock(&il->mutex); |
5415 | } | 5376 | } |
5416 | 5377 | ||
5417 | static void il4965_bg_run_time_calib_work(struct work_struct *work) | 5378 | static void |
5379 | il4965_bg_run_time_calib_work(struct work_struct *work) | ||
5418 | { | 5380 | { |
5419 | struct il_priv *il = container_of(work, struct il_priv, | 5381 | struct il_priv *il = container_of(work, struct il_priv, |
5420 | run_time_calib_work); | 5382 | run_time_calib_work); |
5421 | 5383 | ||
5422 | mutex_lock(&il->mutex); | 5384 | mutex_lock(&il->mutex); |
5423 | 5385 | ||
@@ -5428,16 +5390,15 @@ static void il4965_bg_run_time_calib_work(struct work_struct *work) | |||
5428 | } | 5390 | } |
5429 | 5391 | ||
5430 | if (il->start_calib) { | 5392 | if (il->start_calib) { |
5431 | il4965_chain_noise_calibration(il, | 5393 | il4965_chain_noise_calibration(il, (void *)&il->_4965.stats); |
5432 | (void *)&il->_4965.stats); | 5394 | il4965_sensitivity_calibration(il, (void *)&il->_4965.stats); |
5433 | il4965_sensitivity_calibration(il, | ||
5434 | (void *)&il->_4965.stats); | ||
5435 | } | 5395 | } |
5436 | 5396 | ||
5437 | mutex_unlock(&il->mutex); | 5397 | mutex_unlock(&il->mutex); |
5438 | } | 5398 | } |
5439 | 5399 | ||
5440 | static void il4965_bg_restart(struct work_struct *data) | 5400 | static void |
5401 | il4965_bg_restart(struct work_struct *data) | ||
5441 | { | 5402 | { |
5442 | struct il_priv *il = container_of(data, struct il_priv, restart); | 5403 | struct il_priv *il = container_of(data, struct il_priv, restart); |
5443 | 5404 | ||
@@ -5468,10 +5429,10 @@ static void il4965_bg_restart(struct work_struct *data) | |||
5468 | } | 5429 | } |
5469 | } | 5430 | } |
5470 | 5431 | ||
5471 | static void il4965_bg_rx_replenish(struct work_struct *data) | 5432 | static void |
5433 | il4965_bg_rx_replenish(struct work_struct *data) | ||
5472 | { | 5434 | { |
5473 | struct il_priv *il = | 5435 | struct il_priv *il = container_of(data, struct il_priv, rx_replenish); |
5474 | container_of(data, struct il_priv, rx_replenish); | ||
5475 | 5436 | ||
5476 | if (test_bit(S_EXIT_PENDING, &il->status)) | 5437 | if (test_bit(S_EXIT_PENDING, &il->status)) |
5477 | return; | 5438 | return; |
@@ -5493,8 +5454,8 @@ static void il4965_bg_rx_replenish(struct work_struct *data) | |||
5493 | * Not a mac80211 entry point function, but it fits in with all the | 5454 | * Not a mac80211 entry point function, but it fits in with all the |
5494 | * other mac80211 functions grouped here. | 5455 | * other mac80211 functions grouped here. |
5495 | */ | 5456 | */ |
5496 | static int il4965_mac_setup_register(struct il_priv *il, | 5457 | static int |
5497 | u32 max_probe_length) | 5458 | il4965_mac_setup_register(struct il_priv *il, u32 max_probe_length) |
5498 | { | 5459 | { |
5499 | int ret; | 5460 | int ret; |
5500 | struct ieee80211_hw *hw = il->hw; | 5461 | struct ieee80211_hw *hw = il->hw; |
@@ -5502,15 +5463,15 @@ static int il4965_mac_setup_register(struct il_priv *il, | |||
5502 | hw->rate_control_algorithm = "iwl-4965-rs"; | 5463 | hw->rate_control_algorithm = "iwl-4965-rs"; |
5503 | 5464 | ||
5504 | /* Tell mac80211 our characteristics */ | 5465 | /* Tell mac80211 our characteristics */ |
5505 | hw->flags = IEEE80211_HW_SIGNAL_DBM | | 5466 | hw->flags = |
5506 | IEEE80211_HW_AMPDU_AGGREGATION | | 5467 | IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_AMPDU_AGGREGATION | |
5507 | IEEE80211_HW_NEED_DTIM_PERIOD | | 5468 | IEEE80211_HW_NEED_DTIM_PERIOD | IEEE80211_HW_SPECTRUM_MGMT | |
5508 | IEEE80211_HW_SPECTRUM_MGMT | | 5469 | IEEE80211_HW_REPORTS_TX_ACK_STATUS; |
5509 | IEEE80211_HW_REPORTS_TX_ACK_STATUS; | ||
5510 | 5470 | ||
5511 | if (il->cfg->sku & IL_SKU_N) | 5471 | if (il->cfg->sku & IL_SKU_N) |
5512 | hw->flags |= IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS | | 5472 | hw->flags |= |
5513 | IEEE80211_HW_SUPPORTS_STATIC_SMPS; | 5473 | IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS | |
5474 | IEEE80211_HW_SUPPORTS_STATIC_SMPS; | ||
5514 | 5475 | ||
5515 | hw->sta_data_size = sizeof(struct il_station_priv); | 5476 | hw->sta_data_size = sizeof(struct il_station_priv); |
5516 | hw->vif_data_size = sizeof(struct il_vif_priv); | 5477 | hw->vif_data_size = sizeof(struct il_vif_priv); |
@@ -5518,8 +5479,8 @@ static int il4965_mac_setup_register(struct il_priv *il, | |||
5518 | hw->wiphy->interface_modes |= il->ctx.interface_modes; | 5479 | hw->wiphy->interface_modes |= il->ctx.interface_modes; |
5519 | hw->wiphy->interface_modes |= il->ctx.exclusive_interface_modes; | 5480 | hw->wiphy->interface_modes |= il->ctx.exclusive_interface_modes; |
5520 | 5481 | ||
5521 | hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY | | 5482 | hw->wiphy->flags |= |
5522 | WIPHY_FLAG_DISABLE_BEACON_HINTS; | 5483 | WIPHY_FLAG_CUSTOM_REGULATORY | WIPHY_FLAG_DISABLE_BEACON_HINTS; |
5523 | 5484 | ||
5524 | /* | 5485 | /* |
5525 | * For now, disable PS by default because it affects | 5486 | * For now, disable PS by default because it affects |
@@ -5538,10 +5499,10 @@ static int il4965_mac_setup_register(struct il_priv *il, | |||
5538 | 5499 | ||
5539 | if (il->bands[IEEE80211_BAND_2GHZ].n_channels) | 5500 | if (il->bands[IEEE80211_BAND_2GHZ].n_channels) |
5540 | il->hw->wiphy->bands[IEEE80211_BAND_2GHZ] = | 5501 | il->hw->wiphy->bands[IEEE80211_BAND_2GHZ] = |
5541 | &il->bands[IEEE80211_BAND_2GHZ]; | 5502 | &il->bands[IEEE80211_BAND_2GHZ]; |
5542 | if (il->bands[IEEE80211_BAND_5GHZ].n_channels) | 5503 | if (il->bands[IEEE80211_BAND_5GHZ].n_channels) |
5543 | il->hw->wiphy->bands[IEEE80211_BAND_5GHZ] = | 5504 | il->hw->wiphy->bands[IEEE80211_BAND_5GHZ] = |
5544 | &il->bands[IEEE80211_BAND_5GHZ]; | 5505 | &il->bands[IEEE80211_BAND_5GHZ]; |
5545 | 5506 | ||
5546 | il_leds_init(il); | 5507 | il_leds_init(il); |
5547 | 5508 | ||
@@ -5555,8 +5516,8 @@ static int il4965_mac_setup_register(struct il_priv *il, | |||
5555 | return 0; | 5516 | return 0; |
5556 | } | 5517 | } |
5557 | 5518 | ||
5558 | 5519 | int | |
5559 | int il4965_mac_start(struct ieee80211_hw *hw) | 5520 | il4965_mac_start(struct ieee80211_hw *hw) |
5560 | { | 5521 | { |
5561 | struct il_priv *il = hw->priv; | 5522 | struct il_priv *il = hw->priv; |
5562 | int ret; | 5523 | int ret; |
@@ -5579,8 +5540,8 @@ int il4965_mac_start(struct ieee80211_hw *hw) | |||
5579 | /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from | 5540 | /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from |
5580 | * mac80211 will not be run successfully. */ | 5541 | * mac80211 will not be run successfully. */ |
5581 | ret = wait_event_timeout(il->wait_command_queue, | 5542 | ret = wait_event_timeout(il->wait_command_queue, |
5582 | test_bit(S_READY, &il->status), | 5543 | test_bit(S_READY, &il->status), |
5583 | UCODE_READY_TIMEOUT); | 5544 | UCODE_READY_TIMEOUT); |
5584 | if (!ret) { | 5545 | if (!ret) { |
5585 | if (!test_bit(S_READY, &il->status)) { | 5546 | if (!test_bit(S_READY, &il->status)) { |
5586 | IL_ERR("START_ALIVE timeout after %dms.\n", | 5547 | IL_ERR("START_ALIVE timeout after %dms.\n", |
@@ -5597,7 +5558,8 @@ out: | |||
5597 | return 0; | 5558 | return 0; |
5598 | } | 5559 | } |
5599 | 5560 | ||
5600 | void il4965_mac_stop(struct ieee80211_hw *hw) | 5561 | void |
5562 | il4965_mac_stop(struct ieee80211_hw *hw) | ||
5601 | { | 5563 | { |
5602 | struct il_priv *il = hw->priv; | 5564 | struct il_priv *il = hw->priv; |
5603 | 5565 | ||
@@ -5620,14 +5582,15 @@ void il4965_mac_stop(struct ieee80211_hw *hw) | |||
5620 | D_MAC80211("leave\n"); | 5582 | D_MAC80211("leave\n"); |
5621 | } | 5583 | } |
5622 | 5584 | ||
5623 | void il4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb) | 5585 | void |
5586 | il4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb) | ||
5624 | { | 5587 | { |
5625 | struct il_priv *il = hw->priv; | 5588 | struct il_priv *il = hw->priv; |
5626 | 5589 | ||
5627 | D_MACDUMP("enter\n"); | 5590 | D_MACDUMP("enter\n"); |
5628 | 5591 | ||
5629 | D_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len, | 5592 | D_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len, |
5630 | ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate); | 5593 | ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate); |
5631 | 5594 | ||
5632 | if (il4965_tx_skb(il, skb)) | 5595 | if (il4965_tx_skb(il, skb)) |
5633 | dev_kfree_skb_any(skb); | 5596 | dev_kfree_skb_any(skb); |
@@ -5635,26 +5598,26 @@ void il4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb) | |||
5635 | D_MACDUMP("leave\n"); | 5598 | D_MACDUMP("leave\n"); |
5636 | } | 5599 | } |
5637 | 5600 | ||
5638 | void il4965_mac_update_tkip_key(struct ieee80211_hw *hw, | 5601 | void |
5639 | struct ieee80211_vif *vif, | 5602 | il4965_mac_update_tkip_key(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
5640 | struct ieee80211_key_conf *keyconf, | 5603 | struct ieee80211_key_conf *keyconf, |
5641 | struct ieee80211_sta *sta, | 5604 | struct ieee80211_sta *sta, u32 iv32, u16 * phase1key) |
5642 | u32 iv32, u16 *phase1key) | ||
5643 | { | 5605 | { |
5644 | struct il_priv *il = hw->priv; | 5606 | struct il_priv *il = hw->priv; |
5645 | struct il_vif_priv *vif_priv = (void *)vif->drv_priv; | 5607 | struct il_vif_priv *vif_priv = (void *)vif->drv_priv; |
5646 | 5608 | ||
5647 | D_MAC80211("enter\n"); | 5609 | D_MAC80211("enter\n"); |
5648 | 5610 | ||
5649 | il4965_update_tkip_key(il, vif_priv->ctx, keyconf, sta, | 5611 | il4965_update_tkip_key(il, vif_priv->ctx, keyconf, sta, iv32, |
5650 | iv32, phase1key); | 5612 | phase1key); |
5651 | 5613 | ||
5652 | D_MAC80211("leave\n"); | 5614 | D_MAC80211("leave\n"); |
5653 | } | 5615 | } |
5654 | 5616 | ||
5655 | int il4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, | 5617 | int |
5656 | struct ieee80211_vif *vif, struct ieee80211_sta *sta, | 5618 | il4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, |
5657 | struct ieee80211_key_conf *key) | 5619 | struct ieee80211_vif *vif, struct ieee80211_sta *sta, |
5620 | struct ieee80211_key_conf *key) | ||
5658 | { | 5621 | { |
5659 | struct il_priv *il = hw->priv; | 5622 | struct il_priv *il = hw->priv; |
5660 | struct il_vif_priv *vif_priv = (void *)vif->drv_priv; | 5623 | struct il_vif_priv *vif_priv = (void *)vif->drv_priv; |
@@ -5684,23 +5647,23 @@ int il4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, | |||
5684 | * In legacy wep mode, we use another host command to the uCode. | 5647 | * In legacy wep mode, we use another host command to the uCode. |
5685 | */ | 5648 | */ |
5686 | if ((key->cipher == WLAN_CIPHER_SUITE_WEP40 || | 5649 | if ((key->cipher == WLAN_CIPHER_SUITE_WEP40 || |
5687 | key->cipher == WLAN_CIPHER_SUITE_WEP104) && | 5650 | key->cipher == WLAN_CIPHER_SUITE_WEP104) && !sta) { |
5688 | !sta) { | ||
5689 | if (cmd == SET_KEY) | 5651 | if (cmd == SET_KEY) |
5690 | is_default_wep_key = !ctx->key_mapping_keys; | 5652 | is_default_wep_key = !ctx->key_mapping_keys; |
5691 | else | 5653 | else |
5692 | is_default_wep_key = | 5654 | is_default_wep_key = |
5693 | (key->hw_key_idx == HW_KEY_DEFAULT); | 5655 | (key->hw_key_idx == HW_KEY_DEFAULT); |
5694 | } | 5656 | } |
5695 | 5657 | ||
5696 | switch (cmd) { | 5658 | switch (cmd) { |
5697 | case SET_KEY: | 5659 | case SET_KEY: |
5698 | if (is_default_wep_key) | 5660 | if (is_default_wep_key) |
5699 | ret = il4965_set_default_wep_key(il, | 5661 | ret = |
5700 | vif_priv->ctx, key); | 5662 | il4965_set_default_wep_key(il, vif_priv->ctx, key); |
5701 | else | 5663 | else |
5702 | ret = il4965_set_dynamic_key(il, vif_priv->ctx, | 5664 | ret = |
5703 | key, sta_id); | 5665 | il4965_set_dynamic_key(il, vif_priv->ctx, key, |
5666 | sta_id); | ||
5704 | 5667 | ||
5705 | D_MAC80211("enable hwcrypto key\n"); | 5668 | D_MAC80211("enable hwcrypto key\n"); |
5706 | break; | 5669 | break; |
@@ -5708,8 +5671,7 @@ int il4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, | |||
5708 | if (is_default_wep_key) | 5671 | if (is_default_wep_key) |
5709 | ret = il4965_remove_default_wep_key(il, ctx, key); | 5672 | ret = il4965_remove_default_wep_key(il, ctx, key); |
5710 | else | 5673 | else |
5711 | ret = il4965_remove_dynamic_key(il, ctx, | 5674 | ret = il4965_remove_dynamic_key(il, ctx, key, sta_id); |
5712 | key, sta_id); | ||
5713 | 5675 | ||
5714 | D_MAC80211("disable hwcrypto key\n"); | 5676 | D_MAC80211("disable hwcrypto key\n"); |
5715 | break; | 5677 | break; |
@@ -5723,17 +5685,16 @@ int il4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, | |||
5723 | return ret; | 5685 | return ret; |
5724 | } | 5686 | } |
5725 | 5687 | ||
5726 | int il4965_mac_ampdu_action(struct ieee80211_hw *hw, | 5688 | int |
5727 | struct ieee80211_vif *vif, | 5689 | il4965_mac_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
5728 | enum ieee80211_ampdu_mlme_action action, | 5690 | enum ieee80211_ampdu_mlme_action action, |
5729 | struct ieee80211_sta *sta, u16 tid, u16 *ssn, | 5691 | struct ieee80211_sta *sta, u16 tid, u16 * ssn, |
5730 | u8 buf_size) | 5692 | u8 buf_size) |
5731 | { | 5693 | { |
5732 | struct il_priv *il = hw->priv; | 5694 | struct il_priv *il = hw->priv; |
5733 | int ret = -EINVAL; | 5695 | int ret = -EINVAL; |
5734 | 5696 | ||
5735 | D_HT("A-MPDU action on addr %pM tid %d\n", | 5697 | D_HT("A-MPDU action on addr %pM tid %d\n", sta->addr, tid); |
5736 | sta->addr, tid); | ||
5737 | 5698 | ||
5738 | if (!(il->cfg->sku & IL_SKU_N)) | 5699 | if (!(il->cfg->sku & IL_SKU_N)) |
5739 | return -EACCES; | 5700 | return -EACCES; |
@@ -5770,9 +5731,9 @@ int il4965_mac_ampdu_action(struct ieee80211_hw *hw, | |||
5770 | return ret; | 5731 | return ret; |
5771 | } | 5732 | } |
5772 | 5733 | ||
5773 | int il4965_mac_sta_add(struct ieee80211_hw *hw, | 5734 | int |
5774 | struct ieee80211_vif *vif, | 5735 | il4965_mac_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
5775 | struct ieee80211_sta *sta) | 5736 | struct ieee80211_sta *sta) |
5776 | { | 5737 | { |
5777 | struct il_priv *il = hw->priv; | 5738 | struct il_priv *il = hw->priv; |
5778 | struct il_station_priv *sta_priv = (void *)sta->drv_priv; | 5739 | struct il_station_priv *sta_priv = (void *)sta->drv_priv; |
@@ -5781,20 +5742,18 @@ int il4965_mac_sta_add(struct ieee80211_hw *hw, | |||
5781 | int ret; | 5742 | int ret; |
5782 | u8 sta_id; | 5743 | u8 sta_id; |
5783 | 5744 | ||
5784 | D_INFO("received request to add station %pM\n", | 5745 | D_INFO("received request to add station %pM\n", sta->addr); |
5785 | sta->addr); | ||
5786 | mutex_lock(&il->mutex); | 5746 | mutex_lock(&il->mutex); |
5787 | D_INFO("proceeding to add station %pM\n", | 5747 | D_INFO("proceeding to add station %pM\n", sta->addr); |
5788 | sta->addr); | ||
5789 | sta_priv->common.sta_id = IL_INVALID_STATION; | 5748 | sta_priv->common.sta_id = IL_INVALID_STATION; |
5790 | 5749 | ||
5791 | atomic_set(&sta_priv->pending_frames, 0); | 5750 | atomic_set(&sta_priv->pending_frames, 0); |
5792 | 5751 | ||
5793 | ret = il_add_station_common(il, vif_priv->ctx, sta->addr, | 5752 | ret = |
5794 | is_ap, sta, &sta_id); | 5753 | il_add_station_common(il, vif_priv->ctx, sta->addr, is_ap, sta, |
5754 | &sta_id); | ||
5795 | if (ret) { | 5755 | if (ret) { |
5796 | IL_ERR("Unable to add station %pM (%d)\n", | 5756 | IL_ERR("Unable to add station %pM (%d)\n", sta->addr, ret); |
5797 | sta->addr, ret); | ||
5798 | /* Should we return success if return code is EEXIST ? */ | 5757 | /* Should we return success if return code is EEXIST ? */ |
5799 | mutex_unlock(&il->mutex); | 5758 | mutex_unlock(&il->mutex); |
5800 | return ret; | 5759 | return ret; |
@@ -5803,16 +5762,16 @@ int il4965_mac_sta_add(struct ieee80211_hw *hw, | |||
5803 | sta_priv->common.sta_id = sta_id; | 5762 | sta_priv->common.sta_id = sta_id; |
5804 | 5763 | ||
5805 | /* Initialize rate scaling */ | 5764 | /* Initialize rate scaling */ |
5806 | D_INFO("Initializing rate scaling for station %pM\n", | 5765 | D_INFO("Initializing rate scaling for station %pM\n", sta->addr); |
5807 | sta->addr); | ||
5808 | il4965_rs_rate_init(il, sta, sta_id); | 5766 | il4965_rs_rate_init(il, sta, sta_id); |
5809 | mutex_unlock(&il->mutex); | 5767 | mutex_unlock(&il->mutex); |
5810 | 5768 | ||
5811 | return 0; | 5769 | return 0; |
5812 | } | 5770 | } |
5813 | 5771 | ||
5814 | void il4965_mac_channel_switch(struct ieee80211_hw *hw, | 5772 | void |
5815 | struct ieee80211_channel_switch *ch_switch) | 5773 | il4965_mac_channel_switch(struct ieee80211_hw *hw, |
5774 | struct ieee80211_channel_switch *ch_switch) | ||
5816 | { | 5775 | { |
5817 | struct il_priv *il = hw->priv; | 5776 | struct il_priv *il = hw->priv; |
5818 | const struct il_channel_info *ch_info; | 5777 | const struct il_channel_info *ch_info; |
@@ -5860,15 +5819,15 @@ void il4965_mac_channel_switch(struct ieee80211_hw *hw, | |||
5860 | if (ctx->ht.enabled) { | 5819 | if (ctx->ht.enabled) { |
5861 | if (conf_is_ht40_minus(conf)) { | 5820 | if (conf_is_ht40_minus(conf)) { |
5862 | ctx->ht.extension_chan_offset = | 5821 | ctx->ht.extension_chan_offset = |
5863 | IEEE80211_HT_PARAM_CHA_SEC_BELOW; | 5822 | IEEE80211_HT_PARAM_CHA_SEC_BELOW; |
5864 | ctx->ht.is_40mhz = true; | 5823 | ctx->ht.is_40mhz = true; |
5865 | } else if (conf_is_ht40_plus(conf)) { | 5824 | } else if (conf_is_ht40_plus(conf)) { |
5866 | ctx->ht.extension_chan_offset = | 5825 | ctx->ht.extension_chan_offset = |
5867 | IEEE80211_HT_PARAM_CHA_SEC_ABOVE; | 5826 | IEEE80211_HT_PARAM_CHA_SEC_ABOVE; |
5868 | ctx->ht.is_40mhz = true; | 5827 | ctx->ht.is_40mhz = true; |
5869 | } else { | 5828 | } else { |
5870 | ctx->ht.extension_chan_offset = | 5829 | ctx->ht.extension_chan_offset = |
5871 | IEEE80211_HT_PARAM_CHA_SEC_NONE; | 5830 | IEEE80211_HT_PARAM_CHA_SEC_NONE; |
5872 | ctx->ht.is_40mhz = false; | 5831 | ctx->ht.is_40mhz = false; |
5873 | } | 5832 | } |
5874 | } else | 5833 | } else |
@@ -5901,10 +5860,9 @@ out: | |||
5901 | D_MAC80211("leave\n"); | 5860 | D_MAC80211("leave\n"); |
5902 | } | 5861 | } |
5903 | 5862 | ||
5904 | void il4965_configure_filter(struct ieee80211_hw *hw, | 5863 | void |
5905 | unsigned int changed_flags, | 5864 | il4965_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags, |
5906 | unsigned int *total_flags, | 5865 | unsigned int *total_flags, u64 multicast) |
5907 | u64 multicast) | ||
5908 | { | 5866 | { |
5909 | struct il_priv *il = hw->priv; | 5867 | struct il_priv *il = hw->priv; |
5910 | __le32 filter_or = 0, filter_nand = 0; | 5868 | __le32 filter_or = 0, filter_nand = 0; |
@@ -5916,8 +5874,8 @@ void il4965_configure_filter(struct ieee80211_hw *hw, | |||
5916 | filter_nand |= (flag); \ | 5874 | filter_nand |= (flag); \ |
5917 | } while (0) | 5875 | } while (0) |
5918 | 5876 | ||
5919 | D_MAC80211("Enter: changed: 0x%x, total: 0x%x\n", | 5877 | D_MAC80211("Enter: changed: 0x%x, total: 0x%x\n", changed_flags, |
5920 | changed_flags, *total_flags); | 5878 | *total_flags); |
5921 | 5879 | ||
5922 | CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK); | 5880 | CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK); |
5923 | /* Setting _just_ RXON_FILTER_CTL2HOST_MSK causes FH errors */ | 5881 | /* Setting _just_ RXON_FILTER_CTL2HOST_MSK causes FH errors */ |
@@ -5944,8 +5902,9 @@ void il4965_configure_filter(struct ieee80211_hw *hw, | |||
5944 | * since we currently do not support programming multicast | 5902 | * since we currently do not support programming multicast |
5945 | * filters into the device. | 5903 | * filters into the device. |
5946 | */ | 5904 | */ |
5947 | *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS | | 5905 | *total_flags &= |
5948 | FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL; | 5906 | FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS | |
5907 | FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL; | ||
5949 | } | 5908 | } |
5950 | 5909 | ||
5951 | /***************************************************************************** | 5910 | /***************************************************************************** |
@@ -5954,10 +5913,11 @@ void il4965_configure_filter(struct ieee80211_hw *hw, | |||
5954 | * | 5913 | * |
5955 | *****************************************************************************/ | 5914 | *****************************************************************************/ |
5956 | 5915 | ||
5957 | static void il4965_bg_txpower_work(struct work_struct *work) | 5916 | static void |
5917 | il4965_bg_txpower_work(struct work_struct *work) | ||
5958 | { | 5918 | { |
5959 | struct il_priv *il = container_of(work, struct il_priv, | 5919 | struct il_priv *il = container_of(work, struct il_priv, |
5960 | txpower_work); | 5920 | txpower_work); |
5961 | 5921 | ||
5962 | mutex_lock(&il->mutex); | 5922 | mutex_lock(&il->mutex); |
5963 | 5923 | ||
@@ -5981,7 +5941,8 @@ out: | |||
5981 | mutex_unlock(&il->mutex); | 5941 | mutex_unlock(&il->mutex); |
5982 | } | 5942 | } |
5983 | 5943 | ||
5984 | static void il4965_setup_deferred_work(struct il_priv *il) | 5944 | static void |
5945 | il4965_setup_deferred_work(struct il_priv *il) | ||
5985 | { | 5946 | { |
5986 | il->workqueue = create_singlethread_workqueue(DRV_NAME); | 5947 | il->workqueue = create_singlethread_workqueue(DRV_NAME); |
5987 | 5948 | ||
@@ -6005,11 +5966,13 @@ static void il4965_setup_deferred_work(struct il_priv *il) | |||
6005 | il->watchdog.data = (unsigned long)il; | 5966 | il->watchdog.data = (unsigned long)il; |
6006 | il->watchdog.function = il_bg_watchdog; | 5967 | il->watchdog.function = il_bg_watchdog; |
6007 | 5968 | ||
6008 | tasklet_init(&il->irq_tasklet, (void (*)(unsigned long)) | 5969 | tasklet_init(&il->irq_tasklet, |
6009 | il4965_irq_tasklet, (unsigned long)il); | 5970 | (void (*)(unsigned long))il4965_irq_tasklet, |
5971 | (unsigned long)il); | ||
6010 | } | 5972 | } |
6011 | 5973 | ||
6012 | static void il4965_cancel_deferred_work(struct il_priv *il) | 5974 | static void |
5975 | il4965_cancel_deferred_work(struct il_priv *il) | ||
6013 | { | 5976 | { |
6014 | cancel_work_sync(&il->txpower_work); | 5977 | cancel_work_sync(&il->txpower_work); |
6015 | cancel_delayed_work_sync(&il->init_alive_start); | 5978 | cancel_delayed_work_sync(&il->init_alive_start); |
@@ -6021,14 +5984,14 @@ static void il4965_cancel_deferred_work(struct il_priv *il) | |||
6021 | del_timer_sync(&il->stats_periodic); | 5984 | del_timer_sync(&il->stats_periodic); |
6022 | } | 5985 | } |
6023 | 5986 | ||
6024 | static void il4965_init_hw_rates(struct il_priv *il, | 5987 | static void |
6025 | struct ieee80211_rate *rates) | 5988 | il4965_init_hw_rates(struct il_priv *il, struct ieee80211_rate *rates) |
6026 | { | 5989 | { |
6027 | int i; | 5990 | int i; |
6028 | 5991 | ||
6029 | for (i = 0; i < RATE_COUNT_LEGACY; i++) { | 5992 | for (i = 0; i < RATE_COUNT_LEGACY; i++) { |
6030 | rates[i].bitrate = il_rates[i].ieee * 5; | 5993 | rates[i].bitrate = il_rates[i].ieee * 5; |
6031 | rates[i].hw_value = i; /* Rate scaling will work on idxes */ | 5994 | rates[i].hw_value = i; /* Rate scaling will work on idxes */ |
6032 | rates[i].hw_value_short = i; | 5995 | rates[i].hw_value_short = i; |
6033 | rates[i].flags = 0; | 5996 | rates[i].flags = 0; |
6034 | if ((i >= IL_FIRST_CCK_RATE) && (i <= IL_LAST_CCK_RATE)) { | 5997 | if ((i >= IL_FIRST_CCK_RATE) && (i <= IL_LAST_CCK_RATE)) { |
@@ -6036,24 +5999,25 @@ static void il4965_init_hw_rates(struct il_priv *il, | |||
6036 | * If CCK != 1M then set short preamble rate flag. | 5999 | * If CCK != 1M then set short preamble rate flag. |
6037 | */ | 6000 | */ |
6038 | rates[i].flags |= | 6001 | rates[i].flags |= |
6039 | (il_rates[i].plcp == RATE_1M_PLCP) ? | 6002 | (il_rates[i].plcp == |
6040 | 0 : IEEE80211_RATE_SHORT_PREAMBLE; | 6003 | RATE_1M_PLCP) ? 0 : IEEE80211_RATE_SHORT_PREAMBLE; |
6041 | } | 6004 | } |
6042 | } | 6005 | } |
6043 | } | 6006 | } |
6007 | |||
6044 | /* | 6008 | /* |
6045 | * Acquire il->lock before calling this function ! | 6009 | * Acquire il->lock before calling this function ! |
6046 | */ | 6010 | */ |
6047 | void il4965_set_wr_ptrs(struct il_priv *il, int txq_id, u32 idx) | 6011 | void |
6012 | il4965_set_wr_ptrs(struct il_priv *il, int txq_id, u32 idx) | ||
6048 | { | 6013 | { |
6049 | il_wr(il, HBUS_TARG_WRPTR, | 6014 | il_wr(il, HBUS_TARG_WRPTR, (idx & 0xff) | (txq_id << 8)); |
6050 | (idx & 0xff) | (txq_id << 8)); | ||
6051 | il_wr_prph(il, IL49_SCD_QUEUE_RDPTR(txq_id), idx); | 6015 | il_wr_prph(il, IL49_SCD_QUEUE_RDPTR(txq_id), idx); |
6052 | } | 6016 | } |
6053 | 6017 | ||
6054 | void il4965_tx_queue_set_status(struct il_priv *il, | 6018 | void |
6055 | struct il_tx_queue *txq, | 6019 | il4965_tx_queue_set_status(struct il_priv *il, struct il_tx_queue *txq, |
6056 | int tx_fifo_id, int scd_retry) | 6020 | int tx_fifo_id, int scd_retry) |
6057 | { | 6021 | { |
6058 | int txq_id = txq->q.id; | 6022 | int txq_id = txq->q.id; |
6059 | 6023 | ||
@@ -6062,21 +6026,22 @@ void il4965_tx_queue_set_status(struct il_priv *il, | |||
6062 | 6026 | ||
6063 | /* Set up and activate */ | 6027 | /* Set up and activate */ |
6064 | il_wr_prph(il, IL49_SCD_QUEUE_STATUS_BITS(txq_id), | 6028 | il_wr_prph(il, IL49_SCD_QUEUE_STATUS_BITS(txq_id), |
6065 | (active << IL49_SCD_QUEUE_STTS_REG_POS_ACTIVE) | | 6029 | (active << IL49_SCD_QUEUE_STTS_REG_POS_ACTIVE) | (tx_fifo_id |
6066 | (tx_fifo_id << IL49_SCD_QUEUE_STTS_REG_POS_TXF) | | 6030 | << |
6067 | (scd_retry << IL49_SCD_QUEUE_STTS_REG_POS_WSL) | | 6031 | IL49_SCD_QUEUE_STTS_REG_POS_TXF) |
6068 | (scd_retry << IL49_SCD_QUEUE_STTS_REG_POS_SCD_ACK) | | 6032 | | (scd_retry << IL49_SCD_QUEUE_STTS_REG_POS_WSL) | (scd_retry |
6069 | IL49_SCD_QUEUE_STTS_REG_MSK); | 6033 | << |
6034 | IL49_SCD_QUEUE_STTS_REG_POS_SCD_ACK) | ||
6035 | | IL49_SCD_QUEUE_STTS_REG_MSK); | ||
6070 | 6036 | ||
6071 | txq->sched_retry = scd_retry; | 6037 | txq->sched_retry = scd_retry; |
6072 | 6038 | ||
6073 | D_INFO("%s %s Queue %d on AC %d\n", | 6039 | D_INFO("%s %s Queue %d on AC %d\n", active ? "Activate" : "Deactivate", |
6074 | active ? "Activate" : "Deactivate", | 6040 | scd_retry ? "BA" : "AC", txq_id, tx_fifo_id); |
6075 | scd_retry ? "BA" : "AC", txq_id, tx_fifo_id); | ||
6076 | } | 6041 | } |
6077 | 6042 | ||
6078 | 6043 | static int | |
6079 | static int il4965_init_drv(struct il_priv *il) | 6044 | il4965_init_drv(struct il_priv *il) |
6080 | { | 6045 | { |
6081 | int ret; | 6046 | int ret; |
6082 | 6047 | ||
@@ -6100,8 +6065,7 @@ static int il4965_init_drv(struct il_priv *il) | |||
6100 | 6065 | ||
6101 | /* Choose which receivers/antennas to use */ | 6066 | /* Choose which receivers/antennas to use */ |
6102 | if (il->cfg->ops->hcmd->set_rxon_chain) | 6067 | if (il->cfg->ops->hcmd->set_rxon_chain) |
6103 | il->cfg->ops->hcmd->set_rxon_chain(il, | 6068 | il->cfg->ops->hcmd->set_rxon_chain(il, &il->ctx); |
6104 | &il->ctx); | ||
6105 | 6069 | ||
6106 | il_init_scan_params(il); | 6070 | il_init_scan_params(il); |
6107 | 6071 | ||
@@ -6126,7 +6090,8 @@ err: | |||
6126 | return ret; | 6090 | return ret; |
6127 | } | 6091 | } |
6128 | 6092 | ||
6129 | static void il4965_uninit_drv(struct il_priv *il) | 6093 | static void |
6094 | il4965_uninit_drv(struct il_priv *il) | ||
6130 | { | 6095 | { |
6131 | il4965_calib_free_results(il); | 6096 | il4965_calib_free_results(il); |
6132 | il_free_geos(il); | 6097 | il_free_geos(il); |
@@ -6134,7 +6099,8 @@ static void il4965_uninit_drv(struct il_priv *il) | |||
6134 | kfree(il->scan_cmd); | 6099 | kfree(il->scan_cmd); |
6135 | } | 6100 | } |
6136 | 6101 | ||
6137 | static void il4965_hw_detect(struct il_priv *il) | 6102 | static void |
6103 | il4965_hw_detect(struct il_priv *il) | ||
6138 | { | 6104 | { |
6139 | il->hw_rev = _il_rd(il, CSR_HW_REV); | 6105 | il->hw_rev = _il_rd(il, CSR_HW_REV); |
6140 | il->hw_wa_rev = _il_rd(il, CSR_HW_REV_WA_REG); | 6106 | il->hw_wa_rev = _il_rd(il, CSR_HW_REV_WA_REG); |
@@ -6142,7 +6108,8 @@ static void il4965_hw_detect(struct il_priv *il) | |||
6142 | D_INFO("HW Revision ID = 0x%X\n", il->rev_id); | 6108 | D_INFO("HW Revision ID = 0x%X\n", il->rev_id); |
6143 | } | 6109 | } |
6144 | 6110 | ||
6145 | static int il4965_set_hw_params(struct il_priv *il) | 6111 | static int |
6112 | il4965_set_hw_params(struct il_priv *il) | ||
6146 | { | 6113 | { |
6147 | il->hw_params.max_rxq_size = RX_QUEUE_SIZE; | 6114 | il->hw_params.max_rxq_size = RX_QUEUE_SIZE; |
6148 | il->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG; | 6115 | il->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG; |
@@ -6205,10 +6172,8 @@ il4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
6205 | il->ctx.wep_key_cmd = C_WEPKEY; | 6172 | il->ctx.wep_key_cmd = C_WEPKEY; |
6206 | il->ctx.ac_to_fifo = il4965_bss_ac_to_fifo; | 6173 | il->ctx.ac_to_fifo = il4965_bss_ac_to_fifo; |
6207 | il->ctx.ac_to_queue = il4965_bss_ac_to_queue; | 6174 | il->ctx.ac_to_queue = il4965_bss_ac_to_queue; |
6208 | il->ctx.exclusive_interface_modes = | 6175 | il->ctx.exclusive_interface_modes = BIT(NL80211_IFTYPE_ADHOC); |
6209 | BIT(NL80211_IFTYPE_ADHOC); | 6176 | il->ctx.interface_modes = BIT(NL80211_IFTYPE_STATION); |
6210 | il->ctx.interface_modes = | ||
6211 | BIT(NL80211_IFTYPE_STATION); | ||
6212 | il->ctx.ap_devtype = RXON_DEV_TYPE_AP; | 6177 | il->ctx.ap_devtype = RXON_DEV_TYPE_AP; |
6213 | il->ctx.ibss_devtype = RXON_DEV_TYPE_IBSS; | 6178 | il->ctx.ibss_devtype = RXON_DEV_TYPE_IBSS; |
6214 | il->ctx.station_devtype = RXON_DEV_TYPE_ESS; | 6179 | il->ctx.station_devtype = RXON_DEV_TYPE_ESS; |
@@ -6227,8 +6192,9 @@ il4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
6227 | /************************** | 6192 | /************************** |
6228 | * 2. Initializing PCI bus | 6193 | * 2. Initializing PCI bus |
6229 | **************************/ | 6194 | **************************/ |
6230 | pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 | | 6195 | pci_disable_link_state(pdev, |
6231 | PCIE_LINK_STATE_CLKPM); | 6196 | PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 | |
6197 | PCIE_LINK_STATE_CLKPM); | ||
6232 | 6198 | ||
6233 | if (pci_enable_device(pdev)) { | 6199 | if (pci_enable_device(pdev)) { |
6234 | err = -ENODEV; | 6200 | err = -ENODEV; |
@@ -6243,8 +6209,8 @@ il4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
6243 | if (err) { | 6209 | if (err) { |
6244 | err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); | 6210 | err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); |
6245 | if (!err) | 6211 | if (!err) |
6246 | err = pci_set_consistent_dma_mask(pdev, | 6212 | err = |
6247 | DMA_BIT_MASK(32)); | 6213 | pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); |
6248 | /* both attempts failed: */ | 6214 | /* both attempts failed: */ |
6249 | if (err) { | 6215 | if (err) { |
6250 | IL_WARN("No suitable DMA available.\n"); | 6216 | IL_WARN("No suitable DMA available.\n"); |
@@ -6258,7 +6224,6 @@ il4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
6258 | 6224 | ||
6259 | pci_set_drvdata(pdev, il); | 6225 | pci_set_drvdata(pdev, il); |
6260 | 6226 | ||
6261 | |||
6262 | /*********************** | 6227 | /*********************** |
6263 | * 3. Read REV register | 6228 | * 3. Read REV register |
6264 | ***********************/ | 6229 | ***********************/ |
@@ -6269,7 +6234,7 @@ il4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
6269 | } | 6234 | } |
6270 | 6235 | ||
6271 | D_INFO("pci_resource_len = 0x%08llx\n", | 6236 | D_INFO("pci_resource_len = 0x%08llx\n", |
6272 | (unsigned long long) pci_resource_len(pdev, 0)); | 6237 | (unsigned long long)pci_resource_len(pdev, 0)); |
6273 | D_INFO("pci_resource_base = %p\n", il->hw_base); | 6238 | D_INFO("pci_resource_base = %p\n", il->hw_base); |
6274 | 6239 | ||
6275 | /* these spin locks will be used in apm_ops.init and EEPROM access | 6240 | /* these spin locks will be used in apm_ops.init and EEPROM access |
@@ -6286,8 +6251,7 @@ il4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
6286 | _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET); | 6251 | _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET); |
6287 | 6252 | ||
6288 | il4965_hw_detect(il); | 6253 | il4965_hw_detect(il); |
6289 | IL_INFO("Detected %s, REV=0x%X\n", | 6254 | IL_INFO("Detected %s, REV=0x%X\n", il->cfg->name, il->hw_rev); |
6290 | il->cfg->name, il->hw_rev); | ||
6291 | 6255 | ||
6292 | /* We disable the RETRY_TIMEOUT register (0x41) to keep | 6256 | /* We disable the RETRY_TIMEOUT register (0x41) to keep |
6293 | * PCI Tx retries from interfering with C3 CPU state */ | 6257 | * PCI Tx retries from interfering with C3 CPU state */ |
@@ -6347,8 +6311,7 @@ il4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
6347 | 6311 | ||
6348 | pci_enable_msi(il->pci_dev); | 6312 | pci_enable_msi(il->pci_dev); |
6349 | 6313 | ||
6350 | err = request_irq(il->pci_dev->irq, il_isr, | 6314 | err = request_irq(il->pci_dev->irq, il_isr, IRQF_SHARED, DRV_NAME, il); |
6351 | IRQF_SHARED, DRV_NAME, il); | ||
6352 | if (err) { | 6315 | if (err) { |
6353 | IL_ERR("Error allocating IRQ %d\n", il->pci_dev->irq); | 6316 | IL_ERR("Error allocating IRQ %d\n", il->pci_dev->irq); |
6354 | goto out_disable_msi; | 6317 | goto out_disable_msi; |
@@ -6371,14 +6334,13 @@ il4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
6371 | il_enable_rfkill_int(il); | 6334 | il_enable_rfkill_int(il); |
6372 | 6335 | ||
6373 | /* If platform's RF_KILL switch is NOT set to KILL */ | 6336 | /* If platform's RF_KILL switch is NOT set to KILL */ |
6374 | if (_il_rd(il, CSR_GP_CNTRL) & | 6337 | if (_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW) |
6375 | CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW) | ||
6376 | clear_bit(S_RF_KILL_HW, &il->status); | 6338 | clear_bit(S_RF_KILL_HW, &il->status); |
6377 | else | 6339 | else |
6378 | set_bit(S_RF_KILL_HW, &il->status); | 6340 | set_bit(S_RF_KILL_HW, &il->status); |
6379 | 6341 | ||
6380 | wiphy_rfkill_set_hw_state(il->hw->wiphy, | 6342 | wiphy_rfkill_set_hw_state(il->hw->wiphy, |
6381 | test_bit(S_RF_KILL_HW, &il->status)); | 6343 | test_bit(S_RF_KILL_HW, &il->status)); |
6382 | 6344 | ||
6383 | il_power_initialize(il); | 6345 | il_power_initialize(il); |
6384 | 6346 | ||
@@ -6390,30 +6352,31 @@ il4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
6390 | 6352 | ||
6391 | return 0; | 6353 | return 0; |
6392 | 6354 | ||
6393 | out_destroy_workqueue: | 6355 | out_destroy_workqueue: |
6394 | destroy_workqueue(il->workqueue); | 6356 | destroy_workqueue(il->workqueue); |
6395 | il->workqueue = NULL; | 6357 | il->workqueue = NULL; |
6396 | free_irq(il->pci_dev->irq, il); | 6358 | free_irq(il->pci_dev->irq, il); |
6397 | out_disable_msi: | 6359 | out_disable_msi: |
6398 | pci_disable_msi(il->pci_dev); | 6360 | pci_disable_msi(il->pci_dev); |
6399 | il4965_uninit_drv(il); | 6361 | il4965_uninit_drv(il); |
6400 | out_free_eeprom: | 6362 | out_free_eeprom: |
6401 | il_eeprom_free(il); | 6363 | il_eeprom_free(il); |
6402 | out_iounmap: | 6364 | out_iounmap: |
6403 | pci_iounmap(pdev, il->hw_base); | 6365 | pci_iounmap(pdev, il->hw_base); |
6404 | out_pci_release_regions: | 6366 | out_pci_release_regions: |
6405 | pci_set_drvdata(pdev, NULL); | 6367 | pci_set_drvdata(pdev, NULL); |
6406 | pci_release_regions(pdev); | 6368 | pci_release_regions(pdev); |
6407 | out_pci_disable_device: | 6369 | out_pci_disable_device: |
6408 | pci_disable_device(pdev); | 6370 | pci_disable_device(pdev); |
6409 | out_ieee80211_free_hw: | 6371 | out_ieee80211_free_hw: |
6410 | il_free_traffic_mem(il); | 6372 | il_free_traffic_mem(il); |
6411 | ieee80211_free_hw(il->hw); | 6373 | ieee80211_free_hw(il->hw); |
6412 | out: | 6374 | out: |
6413 | return err; | 6375 | return err; |
6414 | } | 6376 | } |
6415 | 6377 | ||
6416 | static void __devexit il4965_pci_remove(struct pci_dev *pdev) | 6378 | static void __devexit |
6379 | il4965_pci_remove(struct pci_dev *pdev) | ||
6417 | { | 6380 | { |
6418 | struct il_priv *il = pci_get_drvdata(pdev); | 6381 | struct il_priv *il = pci_get_drvdata(pdev); |
6419 | unsigned long flags; | 6382 | unsigned long flags; |
@@ -6469,7 +6432,6 @@ static void __devexit il4965_pci_remove(struct pci_dev *pdev) | |||
6469 | 6432 | ||
6470 | il_eeprom_free(il); | 6433 | il_eeprom_free(il); |
6471 | 6434 | ||
6472 | |||
6473 | /*netif_stop_queue(dev); */ | 6435 | /*netif_stop_queue(dev); */ |
6474 | flush_workqueue(il->workqueue); | 6436 | flush_workqueue(il->workqueue); |
6475 | 6437 | ||
@@ -6498,7 +6460,8 @@ static void __devexit il4965_pci_remove(struct pci_dev *pdev) | |||
6498 | * Activate/Deactivate Tx DMA/FIFO channels according tx fifos mask | 6460 | * Activate/Deactivate Tx DMA/FIFO channels according tx fifos mask |
6499 | * must be called under il->lock and mac access | 6461 | * must be called under il->lock and mac access |
6500 | */ | 6462 | */ |
6501 | void il4965_txq_set_sched(struct il_priv *il, u32 mask) | 6463 | void |
6464 | il4965_txq_set_sched(struct il_priv *il, u32 mask) | ||
6502 | { | 6465 | { |
6503 | il_wr_prph(il, IL49_SCD_TXFACT, mask); | 6466 | il_wr_prph(il, IL49_SCD_TXFACT, mask); |
6504 | } | 6467 | } |
@@ -6525,7 +6488,8 @@ static struct pci_driver il4965_driver = { | |||
6525 | .driver.pm = IL_LEGACY_PM_OPS, | 6488 | .driver.pm = IL_LEGACY_PM_OPS, |
6526 | }; | 6489 | }; |
6527 | 6490 | ||
6528 | static int __init il4965_init(void) | 6491 | static int __init |
6492 | il4965_init(void) | ||
6529 | { | 6493 | { |
6530 | 6494 | ||
6531 | int ret; | 6495 | int ret; |
@@ -6551,7 +6515,8 @@ error_register: | |||
6551 | return ret; | 6515 | return ret; |
6552 | } | 6516 | } |
6553 | 6517 | ||
6554 | static void __exit il4965_exit(void) | 6518 | static void __exit |
6519 | il4965_exit(void) | ||
6555 | { | 6520 | { |
6556 | pci_unregister_driver(&il4965_driver); | 6521 | pci_unregister_driver(&il4965_driver); |
6557 | il4965_rate_control_unregister(); | 6522 | il4965_rate_control_unregister(); |
@@ -6571,8 +6536,8 @@ module_param_named(queues_num, il4965_mod_params.num_of_queues, int, S_IRUGO); | |||
6571 | MODULE_PARM_DESC(queues_num, "number of hw queues."); | 6536 | MODULE_PARM_DESC(queues_num, "number of hw queues."); |
6572 | module_param_named(11n_disable, il4965_mod_params.disable_11n, int, S_IRUGO); | 6537 | module_param_named(11n_disable, il4965_mod_params.disable_11n, int, S_IRUGO); |
6573 | MODULE_PARM_DESC(11n_disable, "disable 11n functionality"); | 6538 | MODULE_PARM_DESC(11n_disable, "disable 11n functionality"); |
6574 | module_param_named(amsdu_size_8K, il4965_mod_params.amsdu_size_8K, | 6539 | module_param_named(amsdu_size_8K, il4965_mod_params.amsdu_size_8K, int, |
6575 | int, S_IRUGO); | 6540 | S_IRUGO); |
6576 | MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size"); | 6541 | MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size"); |
6577 | module_param_named(fw_restart, il4965_mod_params.restart_fw, int, S_IRUGO); | 6542 | module_param_named(fw_restart, il4965_mod_params.restart_fw, int, S_IRUGO); |
6578 | MODULE_PARM_DESC(fw_restart, "restart firmware in case of error"); | 6543 | MODULE_PARM_DESC(fw_restart, "restart firmware in case of error"); |
diff --git a/drivers/net/wireless/iwlegacy/4965-rs.c b/drivers/net/wireless/iwlegacy/4965-rs.c index f9db9df21321..3ea236157058 100644 --- a/drivers/net/wireless/iwlegacy/4965-rs.c +++ b/drivers/net/wireless/iwlegacy/4965-rs.c | |||
@@ -95,22 +95,23 @@ static const u8 ant_toggle_lookup[] = { | |||
95 | * | 95 | * |
96 | */ | 96 | */ |
97 | const struct il_rate_info il_rates[RATE_COUNT] = { | 97 | const struct il_rate_info il_rates[RATE_COUNT] = { |
98 | IL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2), /* 1mbps */ | 98 | IL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2), /* 1mbps */ |
99 | IL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5), /* 2mbps */ | 99 | IL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5), /* 2mbps */ |
100 | IL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11), /*5.5mbps */ | 100 | IL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11), /*5.5mbps */ |
101 | IL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18), /* 11mbps */ | 101 | IL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18), /* 11mbps */ |
102 | IL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11), /* 6mbps */ | 102 | IL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11), /* 6mbps */ |
103 | IL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11), /* 9mbps */ | 103 | IL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11), /* 9mbps */ |
104 | IL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18), /* 12mbps */ | 104 | IL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18), /* 12mbps */ |
105 | IL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24), /* 18mbps */ | 105 | IL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24), /* 18mbps */ |
106 | IL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36), /* 24mbps */ | 106 | IL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36), /* 24mbps */ |
107 | IL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48), /* 36mbps */ | 107 | IL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48), /* 36mbps */ |
108 | IL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54), /* 48mbps */ | 108 | IL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54), /* 48mbps */ |
109 | IL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */ | 109 | IL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV), /* 54mbps */ |
110 | IL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */ | 110 | IL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV), /* 60mbps */ |
111 | }; | 111 | }; |
112 | 112 | ||
113 | static int il4965_hwrate_to_plcp_idx(u32 rate_n_flags) | 113 | static int |
114 | il4965_hwrate_to_plcp_idx(u32 rate_n_flags) | ||
114 | { | 115 | { |
115 | int idx = 0; | 116 | int idx = 0; |
116 | 117 | ||
@@ -122,13 +123,13 @@ static int il4965_hwrate_to_plcp_idx(u32 rate_n_flags) | |||
122 | idx = idx - RATE_MIMO2_6M_PLCP; | 123 | idx = idx - RATE_MIMO2_6M_PLCP; |
123 | 124 | ||
124 | idx += IL_FIRST_OFDM_RATE; | 125 | idx += IL_FIRST_OFDM_RATE; |
125 | /* skip 9M not supported in ht*/ | 126 | /* skip 9M not supported in ht */ |
126 | if (idx >= RATE_9M_IDX) | 127 | if (idx >= RATE_9M_IDX) |
127 | idx += 1; | 128 | idx += 1; |
128 | if (idx >= IL_FIRST_OFDM_RATE && idx <= IL_LAST_OFDM_RATE) | 129 | if (idx >= IL_FIRST_OFDM_RATE && idx <= IL_LAST_OFDM_RATE) |
129 | return idx; | 130 | return idx; |
130 | 131 | ||
131 | /* legacy rate format, search for match in table */ | 132 | /* legacy rate format, search for match in table */ |
132 | } else { | 133 | } else { |
133 | for (idx = 0; idx < ARRAY_SIZE(il_rates); idx++) | 134 | for (idx = 0; idx < ARRAY_SIZE(il_rates); idx++) |
134 | if (il_rates[idx].plcp == (rate_n_flags & 0xFF)) | 135 | if (il_rates[idx].plcp == (rate_n_flags & 0xFF)) |
@@ -139,21 +140,22 @@ static int il4965_hwrate_to_plcp_idx(u32 rate_n_flags) | |||
139 | } | 140 | } |
140 | 141 | ||
141 | static void il4965_rs_rate_scale_perform(struct il_priv *il, | 142 | static void il4965_rs_rate_scale_perform(struct il_priv *il, |
142 | struct sk_buff *skb, | 143 | struct sk_buff *skb, |
143 | struct ieee80211_sta *sta, | 144 | struct ieee80211_sta *sta, |
144 | struct il_lq_sta *lq_sta); | 145 | struct il_lq_sta *lq_sta); |
145 | static void il4965_rs_fill_link_cmd(struct il_priv *il, | 146 | static void il4965_rs_fill_link_cmd(struct il_priv *il, |
146 | struct il_lq_sta *lq_sta, u32 rate_n_flags); | 147 | struct il_lq_sta *lq_sta, u32 rate_n_flags); |
147 | static void il4965_rs_stay_in_table(struct il_lq_sta *lq_sta, | 148 | static void il4965_rs_stay_in_table(struct il_lq_sta *lq_sta, |
148 | bool force_search); | 149 | bool force_search); |
149 | 150 | ||
150 | #ifdef CONFIG_MAC80211_DEBUGFS | 151 | #ifdef CONFIG_MAC80211_DEBUGFS |
151 | static void il4965_rs_dbgfs_set_mcs(struct il_lq_sta *lq_sta, | 152 | static void il4965_rs_dbgfs_set_mcs(struct il_lq_sta *lq_sta, |
152 | u32 *rate_n_flags, int idx); | 153 | u32 * rate_n_flags, int idx); |
153 | #else | 154 | #else |
154 | static void il4965_rs_dbgfs_set_mcs(struct il_lq_sta *lq_sta, | 155 | static void |
155 | u32 *rate_n_flags, int idx) | 156 | il4965_rs_dbgfs_set_mcs(struct il_lq_sta *lq_sta, u32 * rate_n_flags, int idx) |
156 | {} | 157 | { |
158 | } | ||
157 | #endif | 159 | #endif |
158 | 160 | ||
159 | /** | 161 | /** |
@@ -172,55 +174,56 @@ static s32 expected_tpt_legacy[RATE_COUNT] = { | |||
172 | }; | 174 | }; |
173 | 175 | ||
174 | static s32 expected_tpt_siso20MHz[4][RATE_COUNT] = { | 176 | static s32 expected_tpt_siso20MHz[4][RATE_COUNT] = { |
175 | {0, 0, 0, 0, 42, 0, 76, 102, 124, 158, 183, 193, 202}, /* Norm */ | 177 | {0, 0, 0, 0, 42, 0, 76, 102, 124, 158, 183, 193, 202}, /* Norm */ |
176 | {0, 0, 0, 0, 46, 0, 82, 110, 132, 167, 192, 202, 210}, /* SGI */ | 178 | {0, 0, 0, 0, 46, 0, 82, 110, 132, 167, 192, 202, 210}, /* SGI */ |
177 | {0, 0, 0, 0, 48, 0, 93, 135, 176, 251, 319, 351, 381}, /* AGG */ | 179 | {0, 0, 0, 0, 48, 0, 93, 135, 176, 251, 319, 351, 381}, /* AGG */ |
178 | {0, 0, 0, 0, 53, 0, 102, 149, 193, 275, 348, 381, 413}, /* AGG+SGI */ | 180 | {0, 0, 0, 0, 53, 0, 102, 149, 193, 275, 348, 381, 413}, /* AGG+SGI */ |
179 | }; | 181 | }; |
180 | 182 | ||
181 | static s32 expected_tpt_siso40MHz[4][RATE_COUNT] = { | 183 | static s32 expected_tpt_siso40MHz[4][RATE_COUNT] = { |
182 | {0, 0, 0, 0, 77, 0, 127, 160, 184, 220, 242, 250, 257}, /* Norm */ | 184 | {0, 0, 0, 0, 77, 0, 127, 160, 184, 220, 242, 250, 257}, /* Norm */ |
183 | {0, 0, 0, 0, 83, 0, 135, 169, 193, 229, 250, 257, 264}, /* SGI */ | 185 | {0, 0, 0, 0, 83, 0, 135, 169, 193, 229, 250, 257, 264}, /* SGI */ |
184 | {0, 0, 0, 0, 96, 0, 182, 259, 328, 451, 553, 598, 640}, /* AGG */ | 186 | {0, 0, 0, 0, 96, 0, 182, 259, 328, 451, 553, 598, 640}, /* AGG */ |
185 | {0, 0, 0, 0, 106, 0, 199, 282, 357, 487, 593, 640, 683}, /* AGG+SGI */ | 187 | {0, 0, 0, 0, 106, 0, 199, 282, 357, 487, 593, 640, 683}, /* AGG+SGI */ |
186 | }; | 188 | }; |
187 | 189 | ||
188 | static s32 expected_tpt_mimo2_20MHz[4][RATE_COUNT] = { | 190 | static s32 expected_tpt_mimo2_20MHz[4][RATE_COUNT] = { |
189 | {0, 0, 0, 0, 74, 0, 123, 155, 179, 213, 235, 243, 250}, /* Norm */ | 191 | {0, 0, 0, 0, 74, 0, 123, 155, 179, 213, 235, 243, 250}, /* Norm */ |
190 | {0, 0, 0, 0, 81, 0, 131, 164, 187, 221, 242, 250, 256}, /* SGI */ | 192 | {0, 0, 0, 0, 81, 0, 131, 164, 187, 221, 242, 250, 256}, /* SGI */ |
191 | {0, 0, 0, 0, 92, 0, 175, 250, 317, 436, 534, 578, 619}, /* AGG */ | 193 | {0, 0, 0, 0, 92, 0, 175, 250, 317, 436, 534, 578, 619}, /* AGG */ |
192 | {0, 0, 0, 0, 102, 0, 192, 273, 344, 470, 573, 619, 660}, /* AGG+SGI*/ | 194 | {0, 0, 0, 0, 102, 0, 192, 273, 344, 470, 573, 619, 660}, /* AGG+SGI */ |
193 | }; | 195 | }; |
194 | 196 | ||
195 | static s32 expected_tpt_mimo2_40MHz[4][RATE_COUNT] = { | 197 | static s32 expected_tpt_mimo2_40MHz[4][RATE_COUNT] = { |
196 | {0, 0, 0, 0, 123, 0, 182, 214, 235, 264, 279, 285, 289}, /* Norm */ | 198 | {0, 0, 0, 0, 123, 0, 182, 214, 235, 264, 279, 285, 289}, /* Norm */ |
197 | {0, 0, 0, 0, 131, 0, 191, 222, 242, 270, 284, 289, 293}, /* SGI */ | 199 | {0, 0, 0, 0, 131, 0, 191, 222, 242, 270, 284, 289, 293}, /* SGI */ |
198 | {0, 0, 0, 0, 180, 0, 327, 446, 545, 708, 828, 878, 922}, /* AGG */ | 200 | {0, 0, 0, 0, 180, 0, 327, 446, 545, 708, 828, 878, 922}, /* AGG */ |
199 | {0, 0, 0, 0, 197, 0, 355, 481, 584, 752, 872, 922, 966}, /* AGG+SGI */ | 201 | {0, 0, 0, 0, 197, 0, 355, 481, 584, 752, 872, 922, 966}, /* AGG+SGI */ |
200 | }; | 202 | }; |
201 | 203 | ||
202 | /* mbps, mcs */ | 204 | /* mbps, mcs */ |
203 | static const struct il_rate_mcs_info il_rate_mcs[RATE_COUNT] = { | 205 | static const struct il_rate_mcs_info il_rate_mcs[RATE_COUNT] = { |
204 | { "1", "BPSK DSSS"}, | 206 | {"1", "BPSK DSSS"}, |
205 | { "2", "QPSK DSSS"}, | 207 | {"2", "QPSK DSSS"}, |
206 | {"5.5", "BPSK CCK"}, | 208 | {"5.5", "BPSK CCK"}, |
207 | { "11", "QPSK CCK"}, | 209 | {"11", "QPSK CCK"}, |
208 | { "6", "BPSK 1/2"}, | 210 | {"6", "BPSK 1/2"}, |
209 | { "9", "BPSK 1/2"}, | 211 | {"9", "BPSK 1/2"}, |
210 | { "12", "QPSK 1/2"}, | 212 | {"12", "QPSK 1/2"}, |
211 | { "18", "QPSK 3/4"}, | 213 | {"18", "QPSK 3/4"}, |
212 | { "24", "16QAM 1/2"}, | 214 | {"24", "16QAM 1/2"}, |
213 | { "36", "16QAM 3/4"}, | 215 | {"36", "16QAM 3/4"}, |
214 | { "48", "64QAM 2/3"}, | 216 | {"48", "64QAM 2/3"}, |
215 | { "54", "64QAM 3/4"}, | 217 | {"54", "64QAM 3/4"}, |
216 | { "60", "64QAM 5/6"}, | 218 | {"60", "64QAM 5/6"}, |
217 | }; | 219 | }; |
218 | 220 | ||
219 | #define MCS_IDX_PER_STREAM (8) | 221 | #define MCS_IDX_PER_STREAM (8) |
220 | 222 | ||
221 | static inline u8 il4965_rs_extract_rate(u32 rate_n_flags) | 223 | static inline u8 |
224 | il4965_rs_extract_rate(u32 rate_n_flags) | ||
222 | { | 225 | { |
223 | return (u8)(rate_n_flags & 0xFF); | 226 | return (u8) (rate_n_flags & 0xFF); |
224 | } | 227 | } |
225 | 228 | ||
226 | static void | 229 | static void |
@@ -234,7 +237,8 @@ il4965_rs_rate_scale_clear_win(struct il_rate_scale_data *win) | |||
234 | win->stamp = 0; | 237 | win->stamp = 0; |
235 | } | 238 | } |
236 | 239 | ||
237 | static inline u8 il4965_rs_is_valid_ant(u8 valid_antenna, u8 ant_type) | 240 | static inline u8 |
241 | il4965_rs_is_valid_ant(u8 valid_antenna, u8 ant_type) | ||
238 | { | 242 | { |
239 | return (ant_type & valid_antenna) == ant_type; | 243 | return (ant_type & valid_antenna) == ant_type; |
240 | } | 244 | } |
@@ -264,8 +268,8 @@ il4965_rs_tl_rm_old_stats(struct il_traffic_load *tl, u32 curr_time) | |||
264 | * increment traffic load value for tid and also remove | 268 | * increment traffic load value for tid and also remove |
265 | * any old values if passed the certain time period | 269 | * any old values if passed the certain time period |
266 | */ | 270 | */ |
267 | static u8 il4965_rs_tl_add_packet(struct il_lq_sta *lq_data, | 271 | static u8 |
268 | struct ieee80211_hdr *hdr) | 272 | il4965_rs_tl_add_packet(struct il_lq_sta *lq_data, struct ieee80211_hdr *hdr) |
269 | { | 273 | { |
270 | u32 curr_time = jiffies_to_msecs(jiffies); | 274 | u32 curr_time = jiffies_to_msecs(jiffies); |
271 | u32 time_diff; | 275 | u32 time_diff; |
@@ -317,7 +321,8 @@ static u8 il4965_rs_tl_add_packet(struct il_lq_sta *lq_data, | |||
317 | /* | 321 | /* |
318 | get the traffic load value for tid | 322 | get the traffic load value for tid |
319 | */ | 323 | */ |
320 | static u32 il4965_rs_tl_get_load(struct il_lq_sta *lq_data, u8 tid) | 324 | static u32 |
325 | il4965_rs_tl_get_load(struct il_lq_sta *lq_data, u8 tid) | ||
321 | { | 326 | { |
322 | u32 curr_time = jiffies_to_msecs(jiffies); | 327 | u32 curr_time = jiffies_to_msecs(jiffies); |
323 | u32 time_diff; | 328 | u32 time_diff; |
@@ -345,9 +350,9 @@ static u32 il4965_rs_tl_get_load(struct il_lq_sta *lq_data, u8 tid) | |||
345 | return tl->total; | 350 | return tl->total; |
346 | } | 351 | } |
347 | 352 | ||
348 | static int il4965_rs_tl_turn_on_agg_for_tid(struct il_priv *il, | 353 | static int |
349 | struct il_lq_sta *lq_data, u8 tid, | 354 | il4965_rs_tl_turn_on_agg_for_tid(struct il_priv *il, struct il_lq_sta *lq_data, |
350 | struct ieee80211_sta *sta) | 355 | u8 tid, struct ieee80211_sta *sta) |
351 | { | 356 | { |
352 | int ret = -EAGAIN; | 357 | int ret = -EAGAIN; |
353 | u32 load; | 358 | u32 load; |
@@ -355,8 +360,7 @@ static int il4965_rs_tl_turn_on_agg_for_tid(struct il_priv *il, | |||
355 | load = il4965_rs_tl_get_load(lq_data, tid); | 360 | load = il4965_rs_tl_get_load(lq_data, tid); |
356 | 361 | ||
357 | if (load > IL_AGG_LOAD_THRESHOLD) { | 362 | if (load > IL_AGG_LOAD_THRESHOLD) { |
358 | D_HT("Starting Tx agg: STA: %pM tid: %d\n", | 363 | D_HT("Starting Tx agg: STA: %pM tid: %d\n", sta->addr, tid); |
359 | sta->addr, tid); | ||
360 | ret = ieee80211_start_tx_ba_session(sta, tid, 5000); | 364 | ret = ieee80211_start_tx_ba_session(sta, tid, 5000); |
361 | if (ret == -EAGAIN) { | 365 | if (ret == -EAGAIN) { |
362 | /* | 366 | /* |
@@ -364,33 +368,33 @@ static int il4965_rs_tl_turn_on_agg_for_tid(struct il_priv *il, | |||
364 | * this might be cause by reloading firmware | 368 | * this might be cause by reloading firmware |
365 | * stop the tx ba session here | 369 | * stop the tx ba session here |
366 | */ | 370 | */ |
367 | IL_ERR("Fail start Tx agg on tid: %d\n", | 371 | IL_ERR("Fail start Tx agg on tid: %d\n", tid); |
368 | tid); | ||
369 | ieee80211_stop_tx_ba_session(sta, tid); | 372 | ieee80211_stop_tx_ba_session(sta, tid); |
370 | } | 373 | } |
371 | } else { | 374 | } else { |
372 | IL_ERR("Aggregation not enabled for tid %d " | 375 | IL_ERR("Aggregation not enabled for tid %d " |
373 | "because load = %u\n", tid, load); | 376 | "because load = %u\n", tid, load); |
374 | } | 377 | } |
375 | return ret; | 378 | return ret; |
376 | } | 379 | } |
377 | 380 | ||
378 | static void il4965_rs_tl_turn_on_agg(struct il_priv *il, u8 tid, | 381 | static void |
379 | struct il_lq_sta *lq_data, | 382 | il4965_rs_tl_turn_on_agg(struct il_priv *il, u8 tid, struct il_lq_sta *lq_data, |
380 | struct ieee80211_sta *sta) | 383 | struct ieee80211_sta *sta) |
381 | { | 384 | { |
382 | if (tid < TID_MAX_LOAD_COUNT) | 385 | if (tid < TID_MAX_LOAD_COUNT) |
383 | il4965_rs_tl_turn_on_agg_for_tid(il, lq_data, tid, sta); | 386 | il4965_rs_tl_turn_on_agg_for_tid(il, lq_data, tid, sta); |
384 | else | 387 | else |
385 | IL_ERR("tid exceeds max load count: %d/%d\n", | 388 | IL_ERR("tid exceeds max load count: %d/%d\n", tid, |
386 | tid, TID_MAX_LOAD_COUNT); | 389 | TID_MAX_LOAD_COUNT); |
387 | } | 390 | } |
388 | 391 | ||
389 | static inline int il4965_get_il4965_num_of_ant_from_rate(u32 rate_n_flags) | 392 | static inline int |
393 | il4965_get_il4965_num_of_ant_from_rate(u32 rate_n_flags) | ||
390 | { | 394 | { |
391 | return !!(rate_n_flags & RATE_MCS_ANT_A_MSK) + | 395 | return !!(rate_n_flags & RATE_MCS_ANT_A_MSK) + |
392 | !!(rate_n_flags & RATE_MCS_ANT_B_MSK) + | 396 | !!(rate_n_flags & RATE_MCS_ANT_B_MSK) + |
393 | !!(rate_n_flags & RATE_MCS_ANT_C_MSK); | 397 | !!(rate_n_flags & RATE_MCS_ANT_C_MSK); |
394 | } | 398 | } |
395 | 399 | ||
396 | /* | 400 | /* |
@@ -412,11 +416,12 @@ il4965_get_expected_tpt(struct il_scale_tbl_info *tbl, int rs_idx) | |||
412 | * at this rate. win->data contains the bitmask of successful | 416 | * at this rate. win->data contains the bitmask of successful |
413 | * packets. | 417 | * packets. |
414 | */ | 418 | */ |
415 | static int il4965_rs_collect_tx_data(struct il_scale_tbl_info *tbl, | 419 | static int |
416 | int scale_idx, int attempts, int successes) | 420 | il4965_rs_collect_tx_data(struct il_scale_tbl_info *tbl, int scale_idx, |
421 | int attempts, int successes) | ||
417 | { | 422 | { |
418 | struct il_rate_scale_data *win = NULL; | 423 | struct il_rate_scale_data *win = NULL; |
419 | static const u64 mask = (((u64)1) << (RATE_MAX_WINDOW - 1)); | 424 | static const u64 mask = (((u64) 1) << (RATE_MAX_WINDOW - 1)); |
420 | s32 fail_count, tpt; | 425 | s32 fail_count, tpt; |
421 | 426 | ||
422 | if (scale_idx < 0 || scale_idx >= RATE_COUNT) | 427 | if (scale_idx < 0 || scale_idx >= RATE_COUNT) |
@@ -466,8 +471,8 @@ static int il4965_rs_collect_tx_data(struct il_scale_tbl_info *tbl, | |||
466 | 471 | ||
467 | /* Calculate current success ratio, avoid divide-by-0! */ | 472 | /* Calculate current success ratio, avoid divide-by-0! */ |
468 | if (win->counter > 0) | 473 | if (win->counter > 0) |
469 | win->success_ratio = 128 * (100 * win->success_counter) | 474 | win->success_ratio = |
470 | / win->counter; | 475 | 128 * (100 * win->success_counter) / win->counter; |
471 | else | 476 | else |
472 | win->success_ratio = IL_INVALID_VALUE; | 477 | win->success_ratio = IL_INVALID_VALUE; |
473 | 478 | ||
@@ -489,9 +494,9 @@ static int il4965_rs_collect_tx_data(struct il_scale_tbl_info *tbl, | |||
489 | /* | 494 | /* |
490 | * Fill uCode API rate_n_flags field, based on "search" or "active" table. | 495 | * Fill uCode API rate_n_flags field, based on "search" or "active" table. |
491 | */ | 496 | */ |
492 | static u32 il4965_rate_n_flags_from_tbl(struct il_priv *il, | 497 | static u32 |
493 | struct il_scale_tbl_info *tbl, | 498 | il4965_rate_n_flags_from_tbl(struct il_priv *il, struct il_scale_tbl_info *tbl, |
494 | int idx, u8 use_green) | 499 | int idx, u8 use_green) |
495 | { | 500 | { |
496 | u32 rate_n_flags = 0; | 501 | u32 rate_n_flags = 0; |
497 | 502 | ||
@@ -508,15 +513,15 @@ static u32 il4965_rate_n_flags_from_tbl(struct il_priv *il, | |||
508 | rate_n_flags = RATE_MCS_HT_MSK; | 513 | rate_n_flags = RATE_MCS_HT_MSK; |
509 | 514 | ||
510 | if (is_siso(tbl->lq_type)) | 515 | if (is_siso(tbl->lq_type)) |
511 | rate_n_flags |= il_rates[idx].plcp_siso; | 516 | rate_n_flags |= il_rates[idx].plcp_siso; |
512 | else | 517 | else |
513 | rate_n_flags |= il_rates[idx].plcp_mimo2; | 518 | rate_n_flags |= il_rates[idx].plcp_mimo2; |
514 | } else { | 519 | } else { |
515 | IL_ERR("Invalid tbl->lq_type %d\n", tbl->lq_type); | 520 | IL_ERR("Invalid tbl->lq_type %d\n", tbl->lq_type); |
516 | } | 521 | } |
517 | 522 | ||
518 | rate_n_flags |= ((tbl->ant_type << RATE_MCS_ANT_POS) & | 523 | rate_n_flags |= |
519 | RATE_MCS_ANT_ABC_MSK); | 524 | ((tbl->ant_type << RATE_MCS_ANT_POS) & RATE_MCS_ANT_ABC_MSK); |
520 | 525 | ||
521 | if (is_Ht(tbl->lq_type)) { | 526 | if (is_Ht(tbl->lq_type)) { |
522 | if (tbl->is_ht40) { | 527 | if (tbl->is_ht40) { |
@@ -543,19 +548,20 @@ static u32 il4965_rate_n_flags_from_tbl(struct il_priv *il, | |||
543 | * Interpret uCode API's rate_n_flags format, | 548 | * Interpret uCode API's rate_n_flags format, |
544 | * fill "search" or "active" tx mode table. | 549 | * fill "search" or "active" tx mode table. |
545 | */ | 550 | */ |
546 | static int il4965_rs_get_tbl_info_from_mcs(const u32 rate_n_flags, | 551 | static int |
547 | enum ieee80211_band band, | 552 | il4965_rs_get_tbl_info_from_mcs(const u32 rate_n_flags, |
548 | struct il_scale_tbl_info *tbl, | 553 | enum ieee80211_band band, |
549 | int *rate_idx) | 554 | struct il_scale_tbl_info *tbl, int *rate_idx) |
550 | { | 555 | { |
551 | u32 ant_msk = (rate_n_flags & RATE_MCS_ANT_ABC_MSK); | 556 | u32 ant_msk = (rate_n_flags & RATE_MCS_ANT_ABC_MSK); |
552 | u8 il4965_num_of_ant = il4965_get_il4965_num_of_ant_from_rate(rate_n_flags); | 557 | u8 il4965_num_of_ant = |
558 | il4965_get_il4965_num_of_ant_from_rate(rate_n_flags); | ||
553 | u8 mcs; | 559 | u8 mcs; |
554 | 560 | ||
555 | memset(tbl, 0, sizeof(struct il_scale_tbl_info)); | 561 | memset(tbl, 0, sizeof(struct il_scale_tbl_info)); |
556 | *rate_idx = il4965_hwrate_to_plcp_idx(rate_n_flags); | 562 | *rate_idx = il4965_hwrate_to_plcp_idx(rate_n_flags); |
557 | 563 | ||
558 | if (*rate_idx == RATE_INVALID) { | 564 | if (*rate_idx == RATE_INVALID) { |
559 | *rate_idx = -1; | 565 | *rate_idx = -1; |
560 | return -EINVAL; | 566 | return -EINVAL; |
561 | } | 567 | } |
@@ -574,7 +580,7 @@ static int il4965_rs_get_tbl_info_from_mcs(const u32 rate_n_flags, | |||
574 | else | 580 | else |
575 | tbl->lq_type = LQ_G; | 581 | tbl->lq_type = LQ_G; |
576 | } | 582 | } |
577 | /* HT rate format */ | 583 | /* HT rate format */ |
578 | } else { | 584 | } else { |
579 | if (rate_n_flags & RATE_MCS_SGI_MSK) | 585 | if (rate_n_flags & RATE_MCS_SGI_MSK) |
580 | tbl->is_SGI = 1; | 586 | tbl->is_SGI = 1; |
@@ -591,8 +597,8 @@ static int il4965_rs_get_tbl_info_from_mcs(const u32 rate_n_flags, | |||
591 | /* SISO */ | 597 | /* SISO */ |
592 | if (mcs <= RATE_SISO_60M_PLCP) { | 598 | if (mcs <= RATE_SISO_60M_PLCP) { |
593 | if (il4965_num_of_ant == 1) | 599 | if (il4965_num_of_ant == 1) |
594 | tbl->lq_type = LQ_SISO; /*else NONE*/ | 600 | tbl->lq_type = LQ_SISO; /*else NONE */ |
595 | /* MIMO2 */ | 601 | /* MIMO2 */ |
596 | } else { | 602 | } else { |
597 | if (il4965_num_of_ant == 2) | 603 | if (il4965_num_of_ant == 2) |
598 | tbl->lq_type = LQ_MIMO2; | 604 | tbl->lq_type = LQ_MIMO2; |
@@ -603,8 +609,9 @@ static int il4965_rs_get_tbl_info_from_mcs(const u32 rate_n_flags, | |||
603 | 609 | ||
604 | /* switch to another antenna/antennas and return 1 */ | 610 | /* switch to another antenna/antennas and return 1 */ |
605 | /* if no other valid antenna found, return 0 */ | 611 | /* if no other valid antenna found, return 0 */ |
606 | static int il4965_rs_toggle_antenna(u32 valid_ant, u32 *rate_n_flags, | 612 | static int |
607 | struct il_scale_tbl_info *tbl) | 613 | il4965_rs_toggle_antenna(u32 valid_ant, u32 * rate_n_flags, |
614 | struct il_scale_tbl_info *tbl) | ||
608 | { | 615 | { |
609 | u8 new_ant_type; | 616 | u8 new_ant_type; |
610 | 617 | ||
@@ -633,13 +640,14 @@ static int il4965_rs_toggle_antenna(u32 valid_ant, u32 *rate_n_flags, | |||
633 | * Green-field mode is valid if the station supports it and | 640 | * Green-field mode is valid if the station supports it and |
634 | * there are no non-GF stations present in the BSS. | 641 | * there are no non-GF stations present in the BSS. |
635 | */ | 642 | */ |
636 | static bool il4965_rs_use_green(struct ieee80211_sta *sta) | 643 | static bool |
644 | il4965_rs_use_green(struct ieee80211_sta *sta) | ||
637 | { | 645 | { |
638 | struct il_station_priv *sta_priv = (void *)sta->drv_priv; | 646 | struct il_station_priv *sta_priv = (void *)sta->drv_priv; |
639 | struct il_rxon_context *ctx = sta_priv->common.ctx; | 647 | struct il_rxon_context *ctx = sta_priv->common.ctx; |
640 | 648 | ||
641 | return (sta->ht_cap.cap & IEEE80211_HT_CAP_GRN_FLD) && | 649 | return (sta->ht_cap.cap & IEEE80211_HT_CAP_GRN_FLD) && |
642 | !(ctx->ht.non_gf_sta_present); | 650 | !(ctx->ht.non_gf_sta_present); |
643 | } | 651 | } |
644 | 652 | ||
645 | /** | 653 | /** |
@@ -649,9 +657,10 @@ static bool il4965_rs_use_green(struct ieee80211_sta *sta) | |||
649 | * basic available rates. | 657 | * basic available rates. |
650 | * | 658 | * |
651 | */ | 659 | */ |
652 | static u16 il4965_rs_get_supported_rates(struct il_lq_sta *lq_sta, | 660 | static u16 |
653 | struct ieee80211_hdr *hdr, | 661 | il4965_rs_get_supported_rates(struct il_lq_sta *lq_sta, |
654 | enum il_table_type rate_type) | 662 | struct ieee80211_hdr *hdr, |
663 | enum il_table_type rate_type) | ||
655 | { | 664 | { |
656 | if (is_legacy(rate_type)) { | 665 | if (is_legacy(rate_type)) { |
657 | return lq_sta->active_legacy_rate; | 666 | return lq_sta->active_legacy_rate; |
@@ -665,7 +674,7 @@ static u16 il4965_rs_get_supported_rates(struct il_lq_sta *lq_sta, | |||
665 | 674 | ||
666 | static u16 | 675 | static u16 |
667 | il4965_rs_get_adjacent_rate(struct il_priv *il, u8 idx, u16 rate_mask, | 676 | il4965_rs_get_adjacent_rate(struct il_priv *il, u8 idx, u16 rate_mask, |
668 | int rate_type) | 677 | int rate_type) |
669 | { | 678 | { |
670 | u8 high = RATE_INVALID; | 679 | u8 high = RATE_INVALID; |
671 | u8 low = RATE_INVALID; | 680 | u8 low = RATE_INVALID; |
@@ -720,9 +729,10 @@ il4965_rs_get_adjacent_rate(struct il_priv *il, u8 idx, u16 rate_mask, | |||
720 | return (high << 8) | low; | 729 | return (high << 8) | low; |
721 | } | 730 | } |
722 | 731 | ||
723 | static u32 il4965_rs_get_lower_rate(struct il_lq_sta *lq_sta, | 732 | static u32 |
724 | struct il_scale_tbl_info *tbl, | 733 | il4965_rs_get_lower_rate(struct il_lq_sta *lq_sta, |
725 | u8 scale_idx, u8 ht_possible) | 734 | struct il_scale_tbl_info *tbl, u8 scale_idx, |
735 | u8 ht_possible) | ||
726 | { | 736 | { |
727 | s32 low; | 737 | s32 low; |
728 | u16 rate_mask; | 738 | u16 rate_mask; |
@@ -744,7 +754,7 @@ static u32 il4965_rs_get_lower_rate(struct il_lq_sta *lq_sta, | |||
744 | 754 | ||
745 | if (il4965_num_of_ant(tbl->ant_type) > 1) | 755 | if (il4965_num_of_ant(tbl->ant_type) > 1) |
746 | tbl->ant_type = | 756 | tbl->ant_type = |
747 | il4965_first_antenna(il->hw_params.valid_tx_ant); | 757 | il4965_first_antenna(il->hw_params.valid_tx_ant); |
748 | 758 | ||
749 | tbl->is_ht40 = 0; | 759 | tbl->is_ht40 = 0; |
750 | tbl->is_SGI = 0; | 760 | tbl->is_SGI = 0; |
@@ -757,10 +767,11 @@ static u32 il4965_rs_get_lower_rate(struct il_lq_sta *lq_sta, | |||
757 | if (is_legacy(tbl->lq_type)) { | 767 | if (is_legacy(tbl->lq_type)) { |
758 | /* supp_rates has no CCK bits in A mode */ | 768 | /* supp_rates has no CCK bits in A mode */ |
759 | if (lq_sta->band == IEEE80211_BAND_5GHZ) | 769 | if (lq_sta->band == IEEE80211_BAND_5GHZ) |
760 | rate_mask = (u16)(rate_mask & | 770 | rate_mask = |
761 | (lq_sta->supp_rates << IL_FIRST_OFDM_RATE)); | 771 | (u16) (rate_mask & |
772 | (lq_sta->supp_rates << IL_FIRST_OFDM_RATE)); | ||
762 | else | 773 | else |
763 | rate_mask = (u16)(rate_mask & lq_sta->supp_rates); | 774 | rate_mask = (u16) (rate_mask & lq_sta->supp_rates); |
764 | } | 775 | } |
765 | 776 | ||
766 | /* If we switched from HT to legacy, check current rate */ | 777 | /* If we switched from HT to legacy, check current rate */ |
@@ -769,8 +780,8 @@ static u32 il4965_rs_get_lower_rate(struct il_lq_sta *lq_sta, | |||
769 | goto out; | 780 | goto out; |
770 | } | 781 | } |
771 | 782 | ||
772 | high_low = il4965_rs_get_adjacent_rate(lq_sta->drv, | 783 | high_low = |
773 | scale_idx, rate_mask, | 784 | il4965_rs_get_adjacent_rate(lq_sta->drv, scale_idx, rate_mask, |
774 | tbl->lq_type); | 785 | tbl->lq_type); |
775 | low = high_low & 0xff; | 786 | low = high_low & 0xff; |
776 | 787 | ||
@@ -784,8 +795,9 @@ out: | |||
784 | /* | 795 | /* |
785 | * Simple function to compare two rate scale table types | 796 | * Simple function to compare two rate scale table types |
786 | */ | 797 | */ |
787 | static bool il4965_table_type_matches(struct il_scale_tbl_info *a, | 798 | static bool |
788 | struct il_scale_tbl_info *b) | 799 | il4965_table_type_matches(struct il_scale_tbl_info *a, |
800 | struct il_scale_tbl_info *b) | ||
789 | { | 801 | { |
790 | return (a->lq_type == b->lq_type && a->ant_type == b->ant_type && | 802 | return (a->lq_type == b->lq_type && a->ant_type == b->ant_type && |
791 | a->is_SGI == b->is_SGI); | 803 | a->is_SGI == b->is_SGI); |
@@ -796,8 +808,8 @@ static bool il4965_table_type_matches(struct il_scale_tbl_info *a, | |||
796 | */ | 808 | */ |
797 | static void | 809 | static void |
798 | il4965_rs_tx_status(void *il_r, struct ieee80211_supported_band *sband, | 810 | il4965_rs_tx_status(void *il_r, struct ieee80211_supported_band *sband, |
799 | struct ieee80211_sta *sta, void *il_sta, | 811 | struct ieee80211_sta *sta, void *il_sta, |
800 | struct sk_buff *skb) | 812 | struct sk_buff *skb) |
801 | { | 813 | { |
802 | int legacy_success; | 814 | int legacy_success; |
803 | int retries; | 815 | int retries; |
@@ -814,8 +826,7 @@ il4965_rs_tx_status(void *il_r, struct ieee80211_supported_band *sband, | |||
814 | struct il_station_priv *sta_priv = (void *)sta->drv_priv; | 826 | struct il_station_priv *sta_priv = (void *)sta->drv_priv; |
815 | struct il_rxon_context *ctx = sta_priv->common.ctx; | 827 | struct il_rxon_context *ctx = sta_priv->common.ctx; |
816 | 828 | ||
817 | D_RATE( | 829 | D_RATE("get frame ack response, update rate scale win\n"); |
818 | "get frame ack response, update rate scale win\n"); | ||
819 | 830 | ||
820 | /* Treat uninitialized rate scaling data same as non-existing. */ | 831 | /* Treat uninitialized rate scaling data same as non-existing. */ |
821 | if (!lq_sta) { | 832 | if (!lq_sta) { |
@@ -845,8 +856,7 @@ il4965_rs_tx_status(void *il_r, struct ieee80211_supported_band *sband, | |||
845 | */ | 856 | */ |
846 | table = &lq_sta->lq; | 857 | table = &lq_sta->lq; |
847 | tx_rate = le32_to_cpu(table->rs_table[0].rate_n_flags); | 858 | tx_rate = le32_to_cpu(table->rs_table[0].rate_n_flags); |
848 | il4965_rs_get_tbl_info_from_mcs(tx_rate, | 859 | il4965_rs_get_tbl_info_from_mcs(tx_rate, il->band, &tbl_type, &rs_idx); |
849 | il->band, &tbl_type, &rs_idx); | ||
850 | if (il->band == IEEE80211_BAND_5GHZ) | 860 | if (il->band == IEEE80211_BAND_5GHZ) |
851 | rs_idx -= IL_FIRST_OFDM_RATE; | 861 | rs_idx -= IL_FIRST_OFDM_RATE; |
852 | mac_flags = info->status.rates[0].flags; | 862 | mac_flags = info->status.rates[0].flags; |
@@ -869,12 +879,11 @@ il4965_rs_tx_status(void *il_r, struct ieee80211_supported_band *sband, | |||
869 | tbl_type.is_ht40 != !!(mac_flags & IEEE80211_TX_RC_40_MHZ_WIDTH) || | 879 | tbl_type.is_ht40 != !!(mac_flags & IEEE80211_TX_RC_40_MHZ_WIDTH) || |
870 | tbl_type.is_dup != !!(mac_flags & IEEE80211_TX_RC_DUP_DATA) || | 880 | tbl_type.is_dup != !!(mac_flags & IEEE80211_TX_RC_DUP_DATA) || |
871 | tbl_type.ant_type != info->antenna_sel_tx || | 881 | tbl_type.ant_type != info->antenna_sel_tx || |
872 | !!(tx_rate & RATE_MCS_HT_MSK) != !!(mac_flags & IEEE80211_TX_RC_MCS) || | 882 | !!(tx_rate & RATE_MCS_HT_MSK) != !!(mac_flags & IEEE80211_TX_RC_MCS) |
873 | !!(tx_rate & RATE_MCS_GF_MSK) != !!(mac_flags & IEEE80211_TX_RC_GREEN_FIELD) || | 883 | || !!(tx_rate & RATE_MCS_GF_MSK) != |
874 | rs_idx != mac_idx) { | 884 | !!(mac_flags & IEEE80211_TX_RC_GREEN_FIELD) || rs_idx != mac_idx) { |
875 | D_RATE( | 885 | D_RATE("initial rate %d does not match %d (0x%x)\n", mac_idx, |
876 | "initial rate %d does not match %d (0x%x)\n", | 886 | rs_idx, tx_rate); |
877 | mac_idx, rs_idx, tx_rate); | ||
878 | /* | 887 | /* |
879 | * Since rates mis-match, the last LQ command may have failed. | 888 | * Since rates mis-match, the last LQ command may have failed. |
880 | * After IL_MISSED_RATE_MAX mis-matches, resync the uCode with | 889 | * After IL_MISSED_RATE_MAX mis-matches, resync the uCode with |
@@ -883,8 +892,7 @@ il4965_rs_tx_status(void *il_r, struct ieee80211_supported_band *sband, | |||
883 | lq_sta->missed_rate_counter++; | 892 | lq_sta->missed_rate_counter++; |
884 | if (lq_sta->missed_rate_counter > IL_MISSED_RATE_MAX) { | 893 | if (lq_sta->missed_rate_counter > IL_MISSED_RATE_MAX) { |
885 | lq_sta->missed_rate_counter = 0; | 894 | lq_sta->missed_rate_counter = 0; |
886 | il_send_lq_cmd(il, ctx, &lq_sta->lq, | 895 | il_send_lq_cmd(il, ctx, &lq_sta->lq, CMD_ASYNC, false); |
887 | CMD_ASYNC, false); | ||
888 | } | 896 | } |
889 | /* Regardless, ignore this status info for outdated rate */ | 897 | /* Regardless, ignore this status info for outdated rate */ |
890 | return; | 898 | return; |
@@ -893,25 +901,25 @@ il4965_rs_tx_status(void *il_r, struct ieee80211_supported_band *sband, | |||
893 | lq_sta->missed_rate_counter = 0; | 901 | lq_sta->missed_rate_counter = 0; |
894 | 902 | ||
895 | /* Figure out if rate scale algorithm is in active or search table */ | 903 | /* Figure out if rate scale algorithm is in active or search table */ |
896 | if (il4965_table_type_matches(&tbl_type, | 904 | if (il4965_table_type_matches |
897 | &(lq_sta->lq_info[lq_sta->active_tbl]))) { | 905 | (&tbl_type, &(lq_sta->lq_info[lq_sta->active_tbl]))) { |
898 | curr_tbl = &(lq_sta->lq_info[lq_sta->active_tbl]); | 906 | curr_tbl = &(lq_sta->lq_info[lq_sta->active_tbl]); |
899 | other_tbl = &(lq_sta->lq_info[1 - lq_sta->active_tbl]); | 907 | other_tbl = &(lq_sta->lq_info[1 - lq_sta->active_tbl]); |
900 | } else if (il4965_table_type_matches(&tbl_type, | 908 | } else |
901 | &lq_sta->lq_info[1 - lq_sta->active_tbl])) { | 909 | if (il4965_table_type_matches |
910 | (&tbl_type, &lq_sta->lq_info[1 - lq_sta->active_tbl])) { | ||
902 | curr_tbl = &(lq_sta->lq_info[1 - lq_sta->active_tbl]); | 911 | curr_tbl = &(lq_sta->lq_info[1 - lq_sta->active_tbl]); |
903 | other_tbl = &(lq_sta->lq_info[lq_sta->active_tbl]); | 912 | other_tbl = &(lq_sta->lq_info[lq_sta->active_tbl]); |
904 | } else { | 913 | } else { |
905 | D_RATE( | 914 | D_RATE("Neither active nor search matches tx rate\n"); |
906 | "Neither active nor search matches tx rate\n"); | ||
907 | tmp_tbl = &(lq_sta->lq_info[lq_sta->active_tbl]); | 915 | tmp_tbl = &(lq_sta->lq_info[lq_sta->active_tbl]); |
908 | D_RATE("active- lq:%x, ant:%x, SGI:%d\n", | 916 | D_RATE("active- lq:%x, ant:%x, SGI:%d\n", tmp_tbl->lq_type, |
909 | tmp_tbl->lq_type, tmp_tbl->ant_type, tmp_tbl->is_SGI); | 917 | tmp_tbl->ant_type, tmp_tbl->is_SGI); |
910 | tmp_tbl = &(lq_sta->lq_info[1 - lq_sta->active_tbl]); | 918 | tmp_tbl = &(lq_sta->lq_info[1 - lq_sta->active_tbl]); |
911 | D_RATE("search- lq:%x, ant:%x, SGI:%d\n", | 919 | D_RATE("search- lq:%x, ant:%x, SGI:%d\n", tmp_tbl->lq_type, |
912 | tmp_tbl->lq_type, tmp_tbl->ant_type, tmp_tbl->is_SGI); | 920 | tmp_tbl->ant_type, tmp_tbl->is_SGI); |
913 | D_RATE("actual- lq:%x, ant:%x, SGI:%d\n", | 921 | D_RATE("actual- lq:%x, ant:%x, SGI:%d\n", tbl_type.lq_type, |
914 | tbl_type.lq_type, tbl_type.ant_type, tbl_type.is_SGI); | 922 | tbl_type.ant_type, tbl_type.is_SGI); |
915 | /* | 923 | /* |
916 | * no matching table found, let's by-pass the data collection | 924 | * no matching table found, let's by-pass the data collection |
917 | * and continue to perform rate scale to find the rate table | 925 | * and continue to perform rate scale to find the rate table |
@@ -930,21 +938,22 @@ il4965_rs_tx_status(void *il_r, struct ieee80211_supported_band *sband, | |||
930 | if (info->flags & IEEE80211_TX_STAT_AMPDU) { | 938 | if (info->flags & IEEE80211_TX_STAT_AMPDU) { |
931 | tx_rate = le32_to_cpu(table->rs_table[0].rate_n_flags); | 939 | tx_rate = le32_to_cpu(table->rs_table[0].rate_n_flags); |
932 | il4965_rs_get_tbl_info_from_mcs(tx_rate, il->band, &tbl_type, | 940 | il4965_rs_get_tbl_info_from_mcs(tx_rate, il->band, &tbl_type, |
933 | &rs_idx); | 941 | &rs_idx); |
934 | il4965_rs_collect_tx_data(curr_tbl, rs_idx, | 942 | il4965_rs_collect_tx_data(curr_tbl, rs_idx, |
935 | info->status.ampdu_len, | 943 | info->status.ampdu_len, |
936 | info->status.ampdu_ack_len); | 944 | info->status.ampdu_ack_len); |
937 | 945 | ||
938 | /* Update success/fail counts if not searching for new mode */ | 946 | /* Update success/fail counts if not searching for new mode */ |
939 | if (lq_sta->stay_in_tbl) { | 947 | if (lq_sta->stay_in_tbl) { |
940 | lq_sta->total_success += info->status.ampdu_ack_len; | 948 | lq_sta->total_success += info->status.ampdu_ack_len; |
941 | lq_sta->total_failed += (info->status.ampdu_len - | 949 | lq_sta->total_failed += |
942 | info->status.ampdu_ack_len); | 950 | (info->status.ampdu_len - |
951 | info->status.ampdu_ack_len); | ||
943 | } | 952 | } |
944 | } else { | 953 | } else { |
945 | /* | 954 | /* |
946 | * For legacy, update frame history with for each Tx retry. | 955 | * For legacy, update frame history with for each Tx retry. |
947 | */ | 956 | */ |
948 | retries = info->status.rates[0].count - 1; | 957 | retries = info->status.rates[0].count - 1; |
949 | /* HW doesn't send more than 15 retries */ | 958 | /* HW doesn't send more than 15 retries */ |
950 | retries = min(retries, 15); | 959 | retries = min(retries, 15); |
@@ -955,20 +964,21 @@ il4965_rs_tx_status(void *il_r, struct ieee80211_supported_band *sband, | |||
955 | for (i = 0; i <= retries; ++i) { | 964 | for (i = 0; i <= retries; ++i) { |
956 | tx_rate = le32_to_cpu(table->rs_table[i].rate_n_flags); | 965 | tx_rate = le32_to_cpu(table->rs_table[i].rate_n_flags); |
957 | il4965_rs_get_tbl_info_from_mcs(tx_rate, il->band, | 966 | il4965_rs_get_tbl_info_from_mcs(tx_rate, il->band, |
958 | &tbl_type, &rs_idx); | 967 | &tbl_type, &rs_idx); |
959 | /* | 968 | /* |
960 | * Only collect stats if retried rate is in the same RS | 969 | * Only collect stats if retried rate is in the same RS |
961 | * table as active/search. | 970 | * table as active/search. |
962 | */ | 971 | */ |
963 | if (il4965_table_type_matches(&tbl_type, curr_tbl)) | 972 | if (il4965_table_type_matches(&tbl_type, curr_tbl)) |
964 | tmp_tbl = curr_tbl; | 973 | tmp_tbl = curr_tbl; |
965 | else if (il4965_table_type_matches(&tbl_type, | 974 | else if (il4965_table_type_matches |
966 | other_tbl)) | 975 | (&tbl_type, other_tbl)) |
967 | tmp_tbl = other_tbl; | 976 | tmp_tbl = other_tbl; |
968 | else | 977 | else |
969 | continue; | 978 | continue; |
970 | il4965_rs_collect_tx_data(tmp_tbl, rs_idx, 1, | 979 | il4965_rs_collect_tx_data(tmp_tbl, rs_idx, 1, |
971 | i < retries ? 0 : legacy_success); | 980 | i < |
981 | retries ? 0 : legacy_success); | ||
972 | } | 982 | } |
973 | 983 | ||
974 | /* Update success/fail counts if not searching for new mode */ | 984 | /* Update success/fail counts if not searching for new mode */ |
@@ -993,8 +1003,9 @@ done: | |||
993 | * These control how long we stay using same modulation mode before | 1003 | * These control how long we stay using same modulation mode before |
994 | * searching for a new mode. | 1004 | * searching for a new mode. |
995 | */ | 1005 | */ |
996 | static void il4965_rs_set_stay_in_table(struct il_priv *il, u8 is_legacy, | 1006 | static void |
997 | struct il_lq_sta *lq_sta) | 1007 | il4965_rs_set_stay_in_table(struct il_priv *il, u8 is_legacy, |
1008 | struct il_lq_sta *lq_sta) | ||
998 | { | 1009 | { |
999 | D_RATE("we are staying in the same table\n"); | 1010 | D_RATE("we are staying in the same table\n"); |
1000 | lq_sta->stay_in_tbl = 1; /* only place this gets set */ | 1011 | lq_sta->stay_in_tbl = 1; /* only place this gets set */ |
@@ -1017,11 +1028,12 @@ static void il4965_rs_set_stay_in_table(struct il_priv *il, u8 is_legacy, | |||
1017 | /* | 1028 | /* |
1018 | * Find correct throughput table for given mode of modulation | 1029 | * Find correct throughput table for given mode of modulation |
1019 | */ | 1030 | */ |
1020 | static void il4965_rs_set_expected_tpt_table(struct il_lq_sta *lq_sta, | 1031 | static void |
1021 | struct il_scale_tbl_info *tbl) | 1032 | il4965_rs_set_expected_tpt_table(struct il_lq_sta *lq_sta, |
1033 | struct il_scale_tbl_info *tbl) | ||
1022 | { | 1034 | { |
1023 | /* Used to choose among HT tables */ | 1035 | /* Used to choose among HT tables */ |
1024 | s32 (*ht_tbl_pointer)[RATE_COUNT]; | 1036 | s32(*ht_tbl_pointer)[RATE_COUNT]; |
1025 | 1037 | ||
1026 | /* Check for invalid LQ type */ | 1038 | /* Check for invalid LQ type */ |
1027 | if (WARN_ON_ONCE(!is_legacy(tbl->lq_type) && !is_Ht(tbl->lq_type))) { | 1039 | if (WARN_ON_ONCE(!is_legacy(tbl->lq_type) && !is_Ht(tbl->lq_type))) { |
@@ -1044,16 +1056,16 @@ static void il4965_rs_set_expected_tpt_table(struct il_lq_sta *lq_sta, | |||
1044 | ht_tbl_pointer = expected_tpt_siso40MHz; | 1056 | ht_tbl_pointer = expected_tpt_siso40MHz; |
1045 | else if (is_mimo2(tbl->lq_type) && (!tbl->is_ht40 || lq_sta->is_dup)) | 1057 | else if (is_mimo2(tbl->lq_type) && (!tbl->is_ht40 || lq_sta->is_dup)) |
1046 | ht_tbl_pointer = expected_tpt_mimo2_20MHz; | 1058 | ht_tbl_pointer = expected_tpt_mimo2_20MHz; |
1047 | else /* if (is_mimo2(tbl->lq_type)) <-- must be true */ | 1059 | else /* if (is_mimo2(tbl->lq_type)) <-- must be true */ |
1048 | ht_tbl_pointer = expected_tpt_mimo2_40MHz; | 1060 | ht_tbl_pointer = expected_tpt_mimo2_40MHz; |
1049 | 1061 | ||
1050 | if (!tbl->is_SGI && !lq_sta->is_agg) /* Normal */ | 1062 | if (!tbl->is_SGI && !lq_sta->is_agg) /* Normal */ |
1051 | tbl->expected_tpt = ht_tbl_pointer[0]; | 1063 | tbl->expected_tpt = ht_tbl_pointer[0]; |
1052 | else if (tbl->is_SGI && !lq_sta->is_agg) /* SGI */ | 1064 | else if (tbl->is_SGI && !lq_sta->is_agg) /* SGI */ |
1053 | tbl->expected_tpt = ht_tbl_pointer[1]; | 1065 | tbl->expected_tpt = ht_tbl_pointer[1]; |
1054 | else if (!tbl->is_SGI && lq_sta->is_agg) /* AGG */ | 1066 | else if (!tbl->is_SGI && lq_sta->is_agg) /* AGG */ |
1055 | tbl->expected_tpt = ht_tbl_pointer[2]; | 1067 | tbl->expected_tpt = ht_tbl_pointer[2]; |
1056 | else /* AGG+SGI */ | 1068 | else /* AGG+SGI */ |
1057 | tbl->expected_tpt = ht_tbl_pointer[3]; | 1069 | tbl->expected_tpt = ht_tbl_pointer[3]; |
1058 | } | 1070 | } |
1059 | 1071 | ||
@@ -1069,10 +1081,9 @@ static void il4965_rs_set_expected_tpt_table(struct il_lq_sta *lq_sta, | |||
1069 | * to decrease to match "active" throughput. When moving from MIMO to SISO, | 1081 | * to decrease to match "active" throughput. When moving from MIMO to SISO, |
1070 | * bit rate will typically need to increase, but not if performance was bad. | 1082 | * bit rate will typically need to increase, but not if performance was bad. |
1071 | */ | 1083 | */ |
1072 | static s32 il4965_rs_get_best_rate(struct il_priv *il, | 1084 | static s32 |
1073 | struct il_lq_sta *lq_sta, | 1085 | il4965_rs_get_best_rate(struct il_priv *il, struct il_lq_sta *lq_sta, struct il_scale_tbl_info *tbl, /* "search" */ |
1074 | struct il_scale_tbl_info *tbl, /* "search" */ | 1086 | u16 rate_mask, s8 idx) |
1075 | u16 rate_mask, s8 idx) | ||
1076 | { | 1087 | { |
1077 | /* "active" values */ | 1088 | /* "active" values */ |
1078 | struct il_scale_tbl_info *active_tbl = | 1089 | struct il_scale_tbl_info *active_tbl = |
@@ -1089,8 +1100,9 @@ static s32 il4965_rs_get_best_rate(struct il_priv *il, | |||
1089 | 1100 | ||
1090 | new_rate = high = low = start_hi = RATE_INVALID; | 1101 | new_rate = high = low = start_hi = RATE_INVALID; |
1091 | 1102 | ||
1092 | for (; ;) { | 1103 | for (;;) { |
1093 | high_low = il4965_rs_get_adjacent_rate(il, rate, rate_mask, | 1104 | high_low = |
1105 | il4965_rs_get_adjacent_rate(il, rate, rate_mask, | ||
1094 | tbl->lq_type); | 1106 | tbl->lq_type); |
1095 | 1107 | ||
1096 | low = high_low & 0xff; | 1108 | low = high_low & 0xff; |
@@ -1112,9 +1124,8 @@ static s32 il4965_rs_get_best_rate(struct il_priv *il, | |||
1112 | * "active" throughput (under perfect conditions). | 1124 | * "active" throughput (under perfect conditions). |
1113 | */ | 1125 | */ |
1114 | if ((100 * tpt_tbl[rate] > lq_sta->last_tpt && | 1126 | if ((100 * tpt_tbl[rate] > lq_sta->last_tpt && |
1115 | (active_sr > RATE_DECREASE_TH && | 1127 | (active_sr > RATE_DECREASE_TH && active_sr <= RATE_HIGH_TH |
1116 | active_sr <= RATE_HIGH_TH && | 1128 | && tpt_tbl[rate] <= active_tpt)) || |
1117 | tpt_tbl[rate] <= active_tpt)) || | ||
1118 | (active_sr >= RATE_SCALE_SWITCH && | 1129 | (active_sr >= RATE_SCALE_SWITCH && |
1119 | tpt_tbl[rate] > active_tpt)) { | 1130 | tpt_tbl[rate] > active_tpt)) { |
1120 | 1131 | ||
@@ -1136,7 +1147,7 @@ static s32 il4965_rs_get_best_rate(struct il_priv *il, | |||
1136 | else | 1147 | else |
1137 | break; | 1148 | break; |
1138 | 1149 | ||
1139 | /* Else try to raise the "search" rate to match "active" */ | 1150 | /* Else try to raise the "search" rate to match "active" */ |
1140 | } else { | 1151 | } else { |
1141 | /* (2nd or later pass) | 1152 | /* (2nd or later pass) |
1142 | * If we've already tried to lower the rate, and are | 1153 | * If we've already tried to lower the rate, and are |
@@ -1149,7 +1160,7 @@ static s32 il4965_rs_get_best_rate(struct il_priv *il, | |||
1149 | start_hi = high; | 1160 | start_hi = high; |
1150 | rate = high; | 1161 | rate = high; |
1151 | 1162 | ||
1152 | /* Higher rate not available, use the original */ | 1163 | /* Higher rate not available, use the original */ |
1153 | } else { | 1164 | } else { |
1154 | new_rate = rate; | 1165 | new_rate = rate; |
1155 | break; | 1166 | break; |
@@ -1163,11 +1174,11 @@ static s32 il4965_rs_get_best_rate(struct il_priv *il, | |||
1163 | /* | 1174 | /* |
1164 | * Set up search table for MIMO2 | 1175 | * Set up search table for MIMO2 |
1165 | */ | 1176 | */ |
1166 | static int il4965_rs_switch_to_mimo2(struct il_priv *il, | 1177 | static int |
1167 | struct il_lq_sta *lq_sta, | 1178 | il4965_rs_switch_to_mimo2(struct il_priv *il, struct il_lq_sta *lq_sta, |
1168 | struct ieee80211_conf *conf, | 1179 | struct ieee80211_conf *conf, |
1169 | struct ieee80211_sta *sta, | 1180 | struct ieee80211_sta *sta, |
1170 | struct il_scale_tbl_info *tbl, int idx) | 1181 | struct il_scale_tbl_info *tbl, int idx) |
1171 | { | 1182 | { |
1172 | u16 rate_mask; | 1183 | u16 rate_mask; |
1173 | s32 rate; | 1184 | s32 rate; |
@@ -1178,8 +1189,8 @@ static int il4965_rs_switch_to_mimo2(struct il_priv *il, | |||
1178 | if (!conf_is_ht(conf) || !sta->ht_cap.ht_supported) | 1189 | if (!conf_is_ht(conf) || !sta->ht_cap.ht_supported) |
1179 | return -1; | 1190 | return -1; |
1180 | 1191 | ||
1181 | if (((sta->ht_cap.cap & IEEE80211_HT_CAP_SM_PS) >> 2) | 1192 | if (((sta->ht_cap.cap & IEEE80211_HT_CAP_SM_PS) >> 2) == |
1182 | == WLAN_HT_CAP_SM_PS_STATIC) | 1193 | WLAN_HT_CAP_SM_PS_STATIC) |
1183 | return -1; | 1194 | return -1; |
1184 | 1195 | ||
1185 | /* Need both Tx chains/antennas to support MIMO */ | 1196 | /* Need both Tx chains/antennas to support MIMO */ |
@@ -1203,30 +1214,27 @@ static int il4965_rs_switch_to_mimo2(struct il_priv *il, | |||
1203 | 1214 | ||
1204 | rate = il4965_rs_get_best_rate(il, lq_sta, tbl, rate_mask, idx); | 1215 | rate = il4965_rs_get_best_rate(il, lq_sta, tbl, rate_mask, idx); |
1205 | 1216 | ||
1206 | D_RATE("LQ: MIMO2 best rate %d mask %X\n", | 1217 | D_RATE("LQ: MIMO2 best rate %d mask %X\n", rate, rate_mask); |
1207 | rate, rate_mask); | ||
1208 | if (rate == RATE_INVALID || !((1 << rate) & rate_mask)) { | 1218 | if (rate == RATE_INVALID || !((1 << rate) & rate_mask)) { |
1209 | D_RATE( | 1219 | D_RATE("Can't switch with idx %d rate mask %x\n", rate, |
1210 | "Can't switch with idx %d rate mask %x\n", | 1220 | rate_mask); |
1211 | rate, rate_mask); | ||
1212 | return -1; | 1221 | return -1; |
1213 | } | 1222 | } |
1214 | tbl->current_rate = il4965_rate_n_flags_from_tbl(il, | 1223 | tbl->current_rate = |
1215 | tbl, rate, is_green); | 1224 | il4965_rate_n_flags_from_tbl(il, tbl, rate, is_green); |
1216 | 1225 | ||
1217 | D_RATE("LQ: Switch to new mcs %X idx is green %X\n", | 1226 | D_RATE("LQ: Switch to new mcs %X idx is green %X\n", tbl->current_rate, |
1218 | tbl->current_rate, is_green); | 1227 | is_green); |
1219 | return 0; | 1228 | return 0; |
1220 | } | 1229 | } |
1221 | 1230 | ||
1222 | /* | 1231 | /* |
1223 | * Set up search table for SISO | 1232 | * Set up search table for SISO |
1224 | */ | 1233 | */ |
1225 | static int il4965_rs_switch_to_siso(struct il_priv *il, | 1234 | static int |
1226 | struct il_lq_sta *lq_sta, | 1235 | il4965_rs_switch_to_siso(struct il_priv *il, struct il_lq_sta *lq_sta, |
1227 | struct ieee80211_conf *conf, | 1236 | struct ieee80211_conf *conf, struct ieee80211_sta *sta, |
1228 | struct ieee80211_sta *sta, | 1237 | struct il_scale_tbl_info *tbl, int idx) |
1229 | struct il_scale_tbl_info *tbl, int idx) | ||
1230 | { | 1238 | { |
1231 | u16 rate_mask; | 1239 | u16 rate_mask; |
1232 | u8 is_green = lq_sta->is_green; | 1240 | u8 is_green = lq_sta->is_green; |
@@ -1251,40 +1259,39 @@ static int il4965_rs_switch_to_siso(struct il_priv *il, | |||
1251 | tbl->is_ht40 = 0; | 1259 | tbl->is_ht40 = 0; |
1252 | 1260 | ||
1253 | if (is_green) | 1261 | if (is_green) |
1254 | tbl->is_SGI = 0; /*11n spec: no SGI in SISO+Greenfield*/ | 1262 | tbl->is_SGI = 0; /*11n spec: no SGI in SISO+Greenfield */ |
1255 | 1263 | ||
1256 | il4965_rs_set_expected_tpt_table(lq_sta, tbl); | 1264 | il4965_rs_set_expected_tpt_table(lq_sta, tbl); |
1257 | rate = il4965_rs_get_best_rate(il, lq_sta, tbl, rate_mask, idx); | 1265 | rate = il4965_rs_get_best_rate(il, lq_sta, tbl, rate_mask, idx); |
1258 | 1266 | ||
1259 | D_RATE("LQ: get best rate %d mask %X\n", rate, rate_mask); | 1267 | D_RATE("LQ: get best rate %d mask %X\n", rate, rate_mask); |
1260 | if (rate == RATE_INVALID || !((1 << rate) & rate_mask)) { | 1268 | if (rate == RATE_INVALID || !((1 << rate) & rate_mask)) { |
1261 | D_RATE( | 1269 | D_RATE("can not switch with idx %d rate mask %x\n", rate, |
1262 | "can not switch with idx %d rate mask %x\n", | 1270 | rate_mask); |
1263 | rate, rate_mask); | ||
1264 | return -1; | 1271 | return -1; |
1265 | } | 1272 | } |
1266 | tbl->current_rate = il4965_rate_n_flags_from_tbl(il, | 1273 | tbl->current_rate = |
1267 | tbl, rate, is_green); | 1274 | il4965_rate_n_flags_from_tbl(il, tbl, rate, is_green); |
1268 | D_RATE("LQ: Switch to new mcs %X idx is green %X\n", | 1275 | D_RATE("LQ: Switch to new mcs %X idx is green %X\n", tbl->current_rate, |
1269 | tbl->current_rate, is_green); | 1276 | is_green); |
1270 | return 0; | 1277 | return 0; |
1271 | } | 1278 | } |
1272 | 1279 | ||
1273 | /* | 1280 | /* |
1274 | * Try to switch to new modulation mode from legacy | 1281 | * Try to switch to new modulation mode from legacy |
1275 | */ | 1282 | */ |
1276 | static int il4965_rs_move_legacy_other(struct il_priv *il, | 1283 | static int |
1277 | struct il_lq_sta *lq_sta, | 1284 | il4965_rs_move_legacy_other(struct il_priv *il, struct il_lq_sta *lq_sta, |
1278 | struct ieee80211_conf *conf, | 1285 | struct ieee80211_conf *conf, |
1279 | struct ieee80211_sta *sta, | 1286 | struct ieee80211_sta *sta, int idx) |
1280 | int idx) | ||
1281 | { | 1287 | { |
1282 | struct il_scale_tbl_info *tbl = &(lq_sta->lq_info[lq_sta->active_tbl]); | 1288 | struct il_scale_tbl_info *tbl = &(lq_sta->lq_info[lq_sta->active_tbl]); |
1283 | struct il_scale_tbl_info *search_tbl = | 1289 | struct il_scale_tbl_info *search_tbl = |
1284 | &(lq_sta->lq_info[(1 - lq_sta->active_tbl)]); | 1290 | &(lq_sta->lq_info[(1 - lq_sta->active_tbl)]); |
1285 | struct il_rate_scale_data *win = &(tbl->win[idx]); | 1291 | struct il_rate_scale_data *win = &(tbl->win[idx]); |
1286 | u32 sz = (sizeof(struct il_scale_tbl_info) - | 1292 | u32 sz = |
1287 | (sizeof(struct il_rate_scale_data) * RATE_COUNT)); | 1293 | (sizeof(struct il_scale_tbl_info) - |
1294 | (sizeof(struct il_rate_scale_data) * RATE_COUNT)); | ||
1288 | u8 start_action; | 1295 | u8 start_action; |
1289 | u8 valid_tx_ant = il->hw_params.valid_tx_ant; | 1296 | u8 valid_tx_ant = il->hw_params.valid_tx_ant; |
1290 | u8 tx_chains_num = il->hw_params.tx_chains_num; | 1297 | u8 tx_chains_num = il->hw_params.tx_chains_num; |
@@ -1294,7 +1301,7 @@ static int il4965_rs_move_legacy_other(struct il_priv *il, | |||
1294 | tbl->action = IL_LEGACY_SWITCH_SISO; | 1301 | tbl->action = IL_LEGACY_SWITCH_SISO; |
1295 | 1302 | ||
1296 | start_action = tbl->action; | 1303 | start_action = tbl->action; |
1297 | for (; ;) { | 1304 | for (;;) { |
1298 | lq_sta->action_counter++; | 1305 | lq_sta->action_counter++; |
1299 | switch (tbl->action) { | 1306 | switch (tbl->action) { |
1300 | case IL_LEGACY_SWITCH_ANTENNA1: | 1307 | case IL_LEGACY_SWITCH_ANTENNA1: |
@@ -1302,9 +1309,9 @@ static int il4965_rs_move_legacy_other(struct il_priv *il, | |||
1302 | D_RATE("LQ: Legacy toggle Antenna\n"); | 1309 | D_RATE("LQ: Legacy toggle Antenna\n"); |
1303 | 1310 | ||
1304 | if ((tbl->action == IL_LEGACY_SWITCH_ANTENNA1 && | 1311 | if ((tbl->action == IL_LEGACY_SWITCH_ANTENNA1 && |
1305 | tx_chains_num <= 1) || | 1312 | tx_chains_num <= 1) || |
1306 | (tbl->action == IL_LEGACY_SWITCH_ANTENNA2 && | 1313 | (tbl->action == IL_LEGACY_SWITCH_ANTENNA2 && |
1307 | tx_chains_num <= 2)) | 1314 | tx_chains_num <= 2)) |
1308 | break; | 1315 | break; |
1309 | 1316 | ||
1310 | /* Don't change antenna if success has been great */ | 1317 | /* Don't change antenna if success has been great */ |
@@ -1314,11 +1321,12 @@ static int il4965_rs_move_legacy_other(struct il_priv *il, | |||
1314 | /* Set up search table to try other antenna */ | 1321 | /* Set up search table to try other antenna */ |
1315 | memcpy(search_tbl, tbl, sz); | 1322 | memcpy(search_tbl, tbl, sz); |
1316 | 1323 | ||
1317 | if (il4965_rs_toggle_antenna(valid_tx_ant, | 1324 | if (il4965_rs_toggle_antenna |
1318 | &search_tbl->current_rate, search_tbl)) { | 1325 | (valid_tx_ant, &search_tbl->current_rate, |
1326 | search_tbl)) { | ||
1319 | update_search_tbl_counter = 1; | 1327 | update_search_tbl_counter = 1; |
1320 | il4965_rs_set_expected_tpt_table(lq_sta, | 1328 | il4965_rs_set_expected_tpt_table(lq_sta, |
1321 | search_tbl); | 1329 | search_tbl); |
1322 | goto out; | 1330 | goto out; |
1323 | } | 1331 | } |
1324 | break; | 1332 | break; |
@@ -1328,8 +1336,9 @@ static int il4965_rs_move_legacy_other(struct il_priv *il, | |||
1328 | /* Set up search table to try SISO */ | 1336 | /* Set up search table to try SISO */ |
1329 | memcpy(search_tbl, tbl, sz); | 1337 | memcpy(search_tbl, tbl, sz); |
1330 | search_tbl->is_SGI = 0; | 1338 | search_tbl->is_SGI = 0; |
1331 | ret = il4965_rs_switch_to_siso(il, lq_sta, conf, sta, | 1339 | ret = |
1332 | search_tbl, idx); | 1340 | il4965_rs_switch_to_siso(il, lq_sta, conf, sta, |
1341 | search_tbl, idx); | ||
1333 | if (!ret) { | 1342 | if (!ret) { |
1334 | lq_sta->action_counter = 0; | 1343 | lq_sta->action_counter = 0; |
1335 | goto out; | 1344 | goto out; |
@@ -1352,13 +1361,13 @@ static int il4965_rs_move_legacy_other(struct il_priv *il, | |||
1352 | else | 1361 | else |
1353 | search_tbl->ant_type = ANT_BC; | 1362 | search_tbl->ant_type = ANT_BC; |
1354 | 1363 | ||
1355 | if (!il4965_rs_is_valid_ant(valid_tx_ant, | 1364 | if (!il4965_rs_is_valid_ant |
1356 | search_tbl->ant_type)) | 1365 | (valid_tx_ant, search_tbl->ant_type)) |
1357 | break; | 1366 | break; |
1358 | 1367 | ||
1359 | ret = il4965_rs_switch_to_mimo2(il, lq_sta, | 1368 | ret = |
1360 | conf, sta, | 1369 | il4965_rs_switch_to_mimo2(il, lq_sta, conf, sta, |
1361 | search_tbl, idx); | 1370 | search_tbl, idx); |
1362 | if (!ret) { | 1371 | if (!ret) { |
1363 | lq_sta->action_counter = 0; | 1372 | lq_sta->action_counter = 0; |
1364 | goto out; | 1373 | goto out; |
@@ -1390,19 +1399,20 @@ out: | |||
1390 | /* | 1399 | /* |
1391 | * Try to switch to new modulation mode from SISO | 1400 | * Try to switch to new modulation mode from SISO |
1392 | */ | 1401 | */ |
1393 | static int il4965_rs_move_siso_to_other(struct il_priv *il, | 1402 | static int |
1394 | struct il_lq_sta *lq_sta, | 1403 | il4965_rs_move_siso_to_other(struct il_priv *il, struct il_lq_sta *lq_sta, |
1395 | struct ieee80211_conf *conf, | 1404 | struct ieee80211_conf *conf, |
1396 | struct ieee80211_sta *sta, int idx) | 1405 | struct ieee80211_sta *sta, int idx) |
1397 | { | 1406 | { |
1398 | u8 is_green = lq_sta->is_green; | 1407 | u8 is_green = lq_sta->is_green; |
1399 | struct il_scale_tbl_info *tbl = &(lq_sta->lq_info[lq_sta->active_tbl]); | 1408 | struct il_scale_tbl_info *tbl = &(lq_sta->lq_info[lq_sta->active_tbl]); |
1400 | struct il_scale_tbl_info *search_tbl = | 1409 | struct il_scale_tbl_info *search_tbl = |
1401 | &(lq_sta->lq_info[(1 - lq_sta->active_tbl)]); | 1410 | &(lq_sta->lq_info[(1 - lq_sta->active_tbl)]); |
1402 | struct il_rate_scale_data *win = &(tbl->win[idx]); | 1411 | struct il_rate_scale_data *win = &(tbl->win[idx]); |
1403 | struct ieee80211_sta_ht_cap *ht_cap = &sta->ht_cap; | 1412 | struct ieee80211_sta_ht_cap *ht_cap = &sta->ht_cap; |
1404 | u32 sz = (sizeof(struct il_scale_tbl_info) - | 1413 | u32 sz = |
1405 | (sizeof(struct il_rate_scale_data) * RATE_COUNT)); | 1414 | (sizeof(struct il_scale_tbl_info) - |
1415 | (sizeof(struct il_rate_scale_data) * RATE_COUNT)); | ||
1406 | u8 start_action; | 1416 | u8 start_action; |
1407 | u8 valid_tx_ant = il->hw_params.valid_tx_ant; | 1417 | u8 valid_tx_ant = il->hw_params.valid_tx_ant; |
1408 | u8 tx_chains_num = il->hw_params.tx_chains_num; | 1418 | u8 tx_chains_num = il->hw_params.tx_chains_num; |
@@ -1418,17 +1428,18 @@ static int il4965_rs_move_siso_to_other(struct il_priv *il, | |||
1418 | case IL_SISO_SWITCH_ANTENNA2: | 1428 | case IL_SISO_SWITCH_ANTENNA2: |
1419 | D_RATE("LQ: SISO toggle Antenna\n"); | 1429 | D_RATE("LQ: SISO toggle Antenna\n"); |
1420 | if ((tbl->action == IL_SISO_SWITCH_ANTENNA1 && | 1430 | if ((tbl->action == IL_SISO_SWITCH_ANTENNA1 && |
1421 | tx_chains_num <= 1) || | 1431 | tx_chains_num <= 1) || |
1422 | (tbl->action == IL_SISO_SWITCH_ANTENNA2 && | 1432 | (tbl->action == IL_SISO_SWITCH_ANTENNA2 && |
1423 | tx_chains_num <= 2)) | 1433 | tx_chains_num <= 2)) |
1424 | break; | 1434 | break; |
1425 | 1435 | ||
1426 | if (win->success_ratio >= IL_RS_GOOD_RATIO) | 1436 | if (win->success_ratio >= IL_RS_GOOD_RATIO) |
1427 | break; | 1437 | break; |
1428 | 1438 | ||
1429 | memcpy(search_tbl, tbl, sz); | 1439 | memcpy(search_tbl, tbl, sz); |
1430 | if (il4965_rs_toggle_antenna(valid_tx_ant, | 1440 | if (il4965_rs_toggle_antenna |
1431 | &search_tbl->current_rate, search_tbl)) { | 1441 | (valid_tx_ant, &search_tbl->current_rate, |
1442 | search_tbl)) { | ||
1432 | update_search_tbl_counter = 1; | 1443 | update_search_tbl_counter = 1; |
1433 | goto out; | 1444 | goto out; |
1434 | } | 1445 | } |
@@ -1447,22 +1458,22 @@ static int il4965_rs_move_siso_to_other(struct il_priv *il, | |||
1447 | else | 1458 | else |
1448 | search_tbl->ant_type = ANT_BC; | 1459 | search_tbl->ant_type = ANT_BC; |
1449 | 1460 | ||
1450 | if (!il4965_rs_is_valid_ant(valid_tx_ant, | 1461 | if (!il4965_rs_is_valid_ant |
1451 | search_tbl->ant_type)) | 1462 | (valid_tx_ant, search_tbl->ant_type)) |
1452 | break; | 1463 | break; |
1453 | 1464 | ||
1454 | ret = il4965_rs_switch_to_mimo2(il, lq_sta, | 1465 | ret = |
1455 | conf, sta, | 1466 | il4965_rs_switch_to_mimo2(il, lq_sta, conf, sta, |
1456 | search_tbl, idx); | 1467 | search_tbl, idx); |
1457 | if (!ret) | 1468 | if (!ret) |
1458 | goto out; | 1469 | goto out; |
1459 | break; | 1470 | break; |
1460 | case IL_SISO_SWITCH_GI: | 1471 | case IL_SISO_SWITCH_GI: |
1461 | if (!tbl->is_ht40 && !(ht_cap->cap & | 1472 | if (!tbl->is_ht40 && |
1462 | IEEE80211_HT_CAP_SGI_20)) | 1473 | !(ht_cap->cap & IEEE80211_HT_CAP_SGI_20)) |
1463 | break; | 1474 | break; |
1464 | if (tbl->is_ht40 && !(ht_cap->cap & | 1475 | if (tbl->is_ht40 && |
1465 | IEEE80211_HT_CAP_SGI_40)) | 1476 | !(ht_cap->cap & IEEE80211_HT_CAP_SGI_40)) |
1466 | break; | 1477 | break; |
1467 | 1478 | ||
1468 | D_RATE("LQ: SISO toggle SGI/NGI\n"); | 1479 | D_RATE("LQ: SISO toggle SGI/NGI\n"); |
@@ -1472,8 +1483,7 @@ static int il4965_rs_move_siso_to_other(struct il_priv *il, | |||
1472 | if (!tbl->is_SGI) | 1483 | if (!tbl->is_SGI) |
1473 | break; | 1484 | break; |
1474 | else | 1485 | else |
1475 | IL_ERR( | 1486 | IL_ERR("SGI was set in GF+SISO\n"); |
1476 | "SGI was set in GF+SISO\n"); | ||
1477 | } | 1487 | } |
1478 | search_tbl->is_SGI = !tbl->is_SGI; | 1488 | search_tbl->is_SGI = !tbl->is_SGI; |
1479 | il4965_rs_set_expected_tpt_table(lq_sta, search_tbl); | 1489 | il4965_rs_set_expected_tpt_table(lq_sta, search_tbl); |
@@ -1483,8 +1493,8 @@ static int il4965_rs_move_siso_to_other(struct il_priv *il, | |||
1483 | break; | 1493 | break; |
1484 | } | 1494 | } |
1485 | search_tbl->current_rate = | 1495 | search_tbl->current_rate = |
1486 | il4965_rate_n_flags_from_tbl(il, search_tbl, | 1496 | il4965_rate_n_flags_from_tbl(il, search_tbl, idx, |
1487 | idx, is_green); | 1497 | is_green); |
1488 | update_search_tbl_counter = 1; | 1498 | update_search_tbl_counter = 1; |
1489 | goto out; | 1499 | goto out; |
1490 | } | 1500 | } |
@@ -1498,7 +1508,7 @@ static int il4965_rs_move_siso_to_other(struct il_priv *il, | |||
1498 | search_tbl->lq_type = LQ_NONE; | 1508 | search_tbl->lq_type = LQ_NONE; |
1499 | return 0; | 1509 | return 0; |
1500 | 1510 | ||
1501 | out: | 1511 | out: |
1502 | lq_sta->search_better_tbl = 1; | 1512 | lq_sta->search_better_tbl = 1; |
1503 | tbl->action++; | 1513 | tbl->action++; |
1504 | if (tbl->action > IL_SISO_SWITCH_GI) | 1514 | if (tbl->action > IL_SISO_SWITCH_GI) |
@@ -1512,19 +1522,20 @@ static int il4965_rs_move_siso_to_other(struct il_priv *il, | |||
1512 | /* | 1522 | /* |
1513 | * Try to switch to new modulation mode from MIMO2 | 1523 | * Try to switch to new modulation mode from MIMO2 |
1514 | */ | 1524 | */ |
1515 | static int il4965_rs_move_mimo2_to_other(struct il_priv *il, | 1525 | static int |
1516 | struct il_lq_sta *lq_sta, | 1526 | il4965_rs_move_mimo2_to_other(struct il_priv *il, struct il_lq_sta *lq_sta, |
1517 | struct ieee80211_conf *conf, | 1527 | struct ieee80211_conf *conf, |
1518 | struct ieee80211_sta *sta, int idx) | 1528 | struct ieee80211_sta *sta, int idx) |
1519 | { | 1529 | { |
1520 | s8 is_green = lq_sta->is_green; | 1530 | s8 is_green = lq_sta->is_green; |
1521 | struct il_scale_tbl_info *tbl = &(lq_sta->lq_info[lq_sta->active_tbl]); | 1531 | struct il_scale_tbl_info *tbl = &(lq_sta->lq_info[lq_sta->active_tbl]); |
1522 | struct il_scale_tbl_info *search_tbl = | 1532 | struct il_scale_tbl_info *search_tbl = |
1523 | &(lq_sta->lq_info[(1 - lq_sta->active_tbl)]); | 1533 | &(lq_sta->lq_info[(1 - lq_sta->active_tbl)]); |
1524 | struct il_rate_scale_data *win = &(tbl->win[idx]); | 1534 | struct il_rate_scale_data *win = &(tbl->win[idx]); |
1525 | struct ieee80211_sta_ht_cap *ht_cap = &sta->ht_cap; | 1535 | struct ieee80211_sta_ht_cap *ht_cap = &sta->ht_cap; |
1526 | u32 sz = (sizeof(struct il_scale_tbl_info) - | 1536 | u32 sz = |
1527 | (sizeof(struct il_rate_scale_data) * RATE_COUNT)); | 1537 | (sizeof(struct il_scale_tbl_info) - |
1538 | (sizeof(struct il_rate_scale_data) * RATE_COUNT)); | ||
1528 | u8 start_action; | 1539 | u8 start_action; |
1529 | u8 valid_tx_ant = il->hw_params.valid_tx_ant; | 1540 | u8 valid_tx_ant = il->hw_params.valid_tx_ant; |
1530 | u8 tx_chains_num = il->hw_params.tx_chains_num; | 1541 | u8 tx_chains_num = il->hw_params.tx_chains_num; |
@@ -1546,8 +1557,9 @@ static int il4965_rs_move_mimo2_to_other(struct il_priv *il, | |||
1546 | break; | 1557 | break; |
1547 | 1558 | ||
1548 | memcpy(search_tbl, tbl, sz); | 1559 | memcpy(search_tbl, tbl, sz); |
1549 | if (il4965_rs_toggle_antenna(valid_tx_ant, | 1560 | if (il4965_rs_toggle_antenna |
1550 | &search_tbl->current_rate, search_tbl)) { | 1561 | (valid_tx_ant, &search_tbl->current_rate, |
1562 | search_tbl)) { | ||
1551 | update_search_tbl_counter = 1; | 1563 | update_search_tbl_counter = 1; |
1552 | goto out; | 1564 | goto out; |
1553 | } | 1565 | } |
@@ -1567,24 +1579,24 @@ static int il4965_rs_move_mimo2_to_other(struct il_priv *il, | |||
1567 | else | 1579 | else |
1568 | search_tbl->ant_type = ANT_C; | 1580 | search_tbl->ant_type = ANT_C; |
1569 | 1581 | ||
1570 | if (!il4965_rs_is_valid_ant(valid_tx_ant, | 1582 | if (!il4965_rs_is_valid_ant |
1571 | search_tbl->ant_type)) | 1583 | (valid_tx_ant, search_tbl->ant_type)) |
1572 | break; | 1584 | break; |
1573 | 1585 | ||
1574 | ret = il4965_rs_switch_to_siso(il, lq_sta, | 1586 | ret = |
1575 | conf, sta, | 1587 | il4965_rs_switch_to_siso(il, lq_sta, conf, sta, |
1576 | search_tbl, idx); | 1588 | search_tbl, idx); |
1577 | if (!ret) | 1589 | if (!ret) |
1578 | goto out; | 1590 | goto out; |
1579 | 1591 | ||
1580 | break; | 1592 | break; |
1581 | 1593 | ||
1582 | case IL_MIMO2_SWITCH_GI: | 1594 | case IL_MIMO2_SWITCH_GI: |
1583 | if (!tbl->is_ht40 && !(ht_cap->cap & | 1595 | if (!tbl->is_ht40 && |
1584 | IEEE80211_HT_CAP_SGI_20)) | 1596 | !(ht_cap->cap & IEEE80211_HT_CAP_SGI_20)) |
1585 | break; | 1597 | break; |
1586 | if (tbl->is_ht40 && !(ht_cap->cap & | 1598 | if (tbl->is_ht40 && |
1587 | IEEE80211_HT_CAP_SGI_40)) | 1599 | !(ht_cap->cap & IEEE80211_HT_CAP_SGI_40)) |
1588 | break; | 1600 | break; |
1589 | 1601 | ||
1590 | D_RATE("LQ: MIMO2 toggle SGI/NGI\n"); | 1602 | D_RATE("LQ: MIMO2 toggle SGI/NGI\n"); |
@@ -1605,8 +1617,8 @@ static int il4965_rs_move_mimo2_to_other(struct il_priv *il, | |||
1605 | break; | 1617 | break; |
1606 | } | 1618 | } |
1607 | search_tbl->current_rate = | 1619 | search_tbl->current_rate = |
1608 | il4965_rate_n_flags_from_tbl(il, search_tbl, | 1620 | il4965_rate_n_flags_from_tbl(il, search_tbl, idx, |
1609 | idx, is_green); | 1621 | is_green); |
1610 | update_search_tbl_counter = 1; | 1622 | update_search_tbl_counter = 1; |
1611 | goto out; | 1623 | goto out; |
1612 | 1624 | ||
@@ -1620,7 +1632,7 @@ static int il4965_rs_move_mimo2_to_other(struct il_priv *il, | |||
1620 | } | 1632 | } |
1621 | search_tbl->lq_type = LQ_NONE; | 1633 | search_tbl->lq_type = LQ_NONE; |
1622 | return 0; | 1634 | return 0; |
1623 | out: | 1635 | out: |
1624 | lq_sta->search_better_tbl = 1; | 1636 | lq_sta->search_better_tbl = 1; |
1625 | tbl->action++; | 1637 | tbl->action++; |
1626 | if (tbl->action > IL_MIMO2_SWITCH_GI) | 1638 | if (tbl->action > IL_MIMO2_SWITCH_GI) |
@@ -1659,9 +1671,9 @@ il4965_rs_stay_in_table(struct il_lq_sta *lq_sta, bool force_search) | |||
1659 | /* Elapsed time using current modulation mode */ | 1671 | /* Elapsed time using current modulation mode */ |
1660 | if (lq_sta->flush_timer) | 1672 | if (lq_sta->flush_timer) |
1661 | flush_interval_passed = | 1673 | flush_interval_passed = |
1662 | time_after(jiffies, | 1674 | time_after(jiffies, |
1663 | (unsigned long)(lq_sta->flush_timer + | 1675 | (unsigned long)(lq_sta->flush_timer + |
1664 | RATE_SCALE_FLUSH_INTVL)); | 1676 | RATE_SCALE_FLUSH_INTVL)); |
1665 | 1677 | ||
1666 | /* | 1678 | /* |
1667 | * Check if we should allow search for new modulation mode. | 1679 | * Check if we should allow search for new modulation mode. |
@@ -1677,9 +1689,8 @@ il4965_rs_stay_in_table(struct il_lq_sta *lq_sta, bool force_search) | |||
1677 | (!lq_sta->search_better_tbl && lq_sta->flush_timer && | 1689 | (!lq_sta->search_better_tbl && lq_sta->flush_timer && |
1678 | flush_interval_passed)) { | 1690 | flush_interval_passed)) { |
1679 | D_RATE("LQ: stay is expired %d %d %d\n:", | 1691 | D_RATE("LQ: stay is expired %d %d %d\n:", |
1680 | lq_sta->total_failed, | 1692 | lq_sta->total_failed, lq_sta->total_success, |
1681 | lq_sta->total_success, | 1693 | flush_interval_passed); |
1682 | flush_interval_passed); | ||
1683 | 1694 | ||
1684 | /* Allow search for new mode */ | 1695 | /* Allow search for new mode */ |
1685 | lq_sta->stay_in_tbl = 0; /* only place reset */ | 1696 | lq_sta->stay_in_tbl = 0; /* only place reset */ |
@@ -1687,23 +1698,23 @@ il4965_rs_stay_in_table(struct il_lq_sta *lq_sta, bool force_search) | |||
1687 | lq_sta->total_success = 0; | 1698 | lq_sta->total_success = 0; |
1688 | lq_sta->flush_timer = 0; | 1699 | lq_sta->flush_timer = 0; |
1689 | 1700 | ||
1690 | /* | 1701 | /* |
1691 | * Else if we've used this modulation mode enough repetitions | 1702 | * Else if we've used this modulation mode enough repetitions |
1692 | * (regardless of elapsed time or success/failure), reset | 1703 | * (regardless of elapsed time or success/failure), reset |
1693 | * history bitmaps and rate-specific stats for all rates in | 1704 | * history bitmaps and rate-specific stats for all rates in |
1694 | * active table. | 1705 | * active table. |
1695 | */ | 1706 | */ |
1696 | } else { | 1707 | } else { |
1697 | lq_sta->table_count++; | 1708 | lq_sta->table_count++; |
1698 | if (lq_sta->table_count >= | 1709 | if (lq_sta->table_count >= lq_sta->table_count_limit) { |
1699 | lq_sta->table_count_limit) { | ||
1700 | lq_sta->table_count = 0; | 1710 | lq_sta->table_count = 0; |
1701 | 1711 | ||
1702 | D_RATE( | 1712 | D_RATE("LQ: stay in table clear win\n"); |
1703 | "LQ: stay in table clear win\n"); | ||
1704 | for (i = 0; i < RATE_COUNT; i++) | 1713 | for (i = 0; i < RATE_COUNT; i++) |
1705 | il4965_rs_rate_scale_clear_win( | 1714 | il4965_rs_rate_scale_clear_win(& |
1706 | &(tbl->win[i])); | 1715 | (tbl-> |
1716 | win | ||
1717 | [i])); | ||
1707 | } | 1718 | } |
1708 | } | 1719 | } |
1709 | 1720 | ||
@@ -1712,8 +1723,7 @@ il4965_rs_stay_in_table(struct il_lq_sta *lq_sta, bool force_search) | |||
1712 | * "search" table). */ | 1723 | * "search" table). */ |
1713 | if (!lq_sta->stay_in_tbl) { | 1724 | if (!lq_sta->stay_in_tbl) { |
1714 | for (i = 0; i < RATE_COUNT; i++) | 1725 | for (i = 0; i < RATE_COUNT; i++) |
1715 | il4965_rs_rate_scale_clear_win( | 1726 | il4965_rs_rate_scale_clear_win(&(tbl->win[i])); |
1716 | &(tbl->win[i])); | ||
1717 | } | 1727 | } |
1718 | } | 1728 | } |
1719 | } | 1729 | } |
@@ -1722,11 +1732,10 @@ il4965_rs_stay_in_table(struct il_lq_sta *lq_sta, bool force_search) | |||
1722 | * setup rate table in uCode | 1732 | * setup rate table in uCode |
1723 | * return rate_n_flags as used in the table | 1733 | * return rate_n_flags as used in the table |
1724 | */ | 1734 | */ |
1725 | static u32 il4965_rs_update_rate_tbl(struct il_priv *il, | 1735 | static u32 |
1726 | struct il_rxon_context *ctx, | 1736 | il4965_rs_update_rate_tbl(struct il_priv *il, struct il_rxon_context *ctx, |
1727 | struct il_lq_sta *lq_sta, | 1737 | struct il_lq_sta *lq_sta, |
1728 | struct il_scale_tbl_info *tbl, | 1738 | struct il_scale_tbl_info *tbl, int idx, u8 is_green) |
1729 | int idx, u8 is_green) | ||
1730 | { | 1739 | { |
1731 | u32 rate; | 1740 | u32 rate; |
1732 | 1741 | ||
@@ -1741,10 +1750,10 @@ static u32 il4965_rs_update_rate_tbl(struct il_priv *il, | |||
1741 | /* | 1750 | /* |
1742 | * Do rate scaling and search for new modulation mode. | 1751 | * Do rate scaling and search for new modulation mode. |
1743 | */ | 1752 | */ |
1744 | static void il4965_rs_rate_scale_perform(struct il_priv *il, | 1753 | static void |
1745 | struct sk_buff *skb, | 1754 | il4965_rs_rate_scale_perform(struct il_priv *il, struct sk_buff *skb, |
1746 | struct ieee80211_sta *sta, | 1755 | struct ieee80211_sta *sta, |
1747 | struct il_lq_sta *lq_sta) | 1756 | struct il_lq_sta *lq_sta) |
1748 | { | 1757 | { |
1749 | struct ieee80211_hw *hw = il->hw; | 1758 | struct ieee80211_hw *hw = il->hw; |
1750 | struct ieee80211_conf *conf = &hw->conf; | 1759 | struct ieee80211_conf *conf = &hw->conf; |
@@ -1818,8 +1827,7 @@ static void il4965_rs_rate_scale_perform(struct il_priv *il, | |||
1818 | /* current tx rate */ | 1827 | /* current tx rate */ |
1819 | idx = lq_sta->last_txrate_idx; | 1828 | idx = lq_sta->last_txrate_idx; |
1820 | 1829 | ||
1821 | D_RATE("Rate scale idx %d for type %d\n", idx, | 1830 | D_RATE("Rate scale idx %d for type %d\n", idx, tbl->lq_type); |
1822 | tbl->lq_type); | ||
1823 | 1831 | ||
1824 | /* rates available for this association, and for modulation mode */ | 1832 | /* rates available for this association, and for modulation mode */ |
1825 | rate_mask = il4965_rs_get_supported_rates(lq_sta, hdr, tbl->lq_type); | 1833 | rate_mask = il4965_rs_get_supported_rates(lq_sta, hdr, tbl->lq_type); |
@@ -1830,11 +1838,12 @@ static void il4965_rs_rate_scale_perform(struct il_priv *il, | |||
1830 | if (is_legacy(tbl->lq_type)) { | 1838 | if (is_legacy(tbl->lq_type)) { |
1831 | if (lq_sta->band == IEEE80211_BAND_5GHZ) | 1839 | if (lq_sta->band == IEEE80211_BAND_5GHZ) |
1832 | /* supp_rates has no CCK bits in A mode */ | 1840 | /* supp_rates has no CCK bits in A mode */ |
1833 | rate_scale_idx_msk = (u16) (rate_mask & | 1841 | rate_scale_idx_msk = |
1834 | (lq_sta->supp_rates << IL_FIRST_OFDM_RATE)); | 1842 | (u16) (rate_mask & |
1843 | (lq_sta->supp_rates << IL_FIRST_OFDM_RATE)); | ||
1835 | else | 1844 | else |
1836 | rate_scale_idx_msk = (u16) (rate_mask & | 1845 | rate_scale_idx_msk = |
1837 | lq_sta->supp_rates); | 1846 | (u16) (rate_mask & lq_sta->supp_rates); |
1838 | 1847 | ||
1839 | } else | 1848 | } else |
1840 | rate_scale_idx_msk = rate_mask; | 1849 | rate_scale_idx_msk = rate_mask; |
@@ -1845,14 +1854,15 @@ static void il4965_rs_rate_scale_perform(struct il_priv *il, | |||
1845 | if (!((1 << idx) & rate_scale_idx_msk)) { | 1854 | if (!((1 << idx) & rate_scale_idx_msk)) { |
1846 | IL_ERR("Current Rate is not valid\n"); | 1855 | IL_ERR("Current Rate is not valid\n"); |
1847 | if (lq_sta->search_better_tbl) { | 1856 | if (lq_sta->search_better_tbl) { |
1848 | /* revert to active table if search table is not valid*/ | 1857 | /* revert to active table if search table is not valid */ |
1849 | tbl->lq_type = LQ_NONE; | 1858 | tbl->lq_type = LQ_NONE; |
1850 | lq_sta->search_better_tbl = 0; | 1859 | lq_sta->search_better_tbl = 0; |
1851 | tbl = &(lq_sta->lq_info[lq_sta->active_tbl]); | 1860 | tbl = &(lq_sta->lq_info[lq_sta->active_tbl]); |
1852 | /* get "active" rate info */ | 1861 | /* get "active" rate info */ |
1853 | idx = il4965_hwrate_to_plcp_idx(tbl->current_rate); | 1862 | idx = il4965_hwrate_to_plcp_idx(tbl->current_rate); |
1854 | rate = il4965_rs_update_rate_tbl(il, ctx, lq_sta, | 1863 | rate = |
1855 | tbl, idx, is_green); | 1864 | il4965_rs_update_rate_tbl(il, ctx, lq_sta, tbl, idx, |
1865 | is_green); | ||
1856 | } | 1866 | } |
1857 | return; | 1867 | return; |
1858 | } | 1868 | } |
@@ -1864,8 +1874,7 @@ static void il4965_rs_rate_scale_perform(struct il_priv *il, | |||
1864 | } | 1874 | } |
1865 | 1875 | ||
1866 | /* force user max rate if set by user */ | 1876 | /* force user max rate if set by user */ |
1867 | if (lq_sta->max_rate_idx != -1 && | 1877 | if (lq_sta->max_rate_idx != -1 && lq_sta->max_rate_idx < idx) { |
1868 | lq_sta->max_rate_idx < idx) { | ||
1869 | idx = lq_sta->max_rate_idx; | 1878 | idx = lq_sta->max_rate_idx; |
1870 | update_lq = 1; | 1879 | update_lq = 1; |
1871 | win = &(tbl->win[idx]); | 1880 | win = &(tbl->win[idx]); |
@@ -1884,9 +1893,8 @@ static void il4965_rs_rate_scale_perform(struct il_priv *il, | |||
1884 | fail_count = win->counter - win->success_counter; | 1893 | fail_count = win->counter - win->success_counter; |
1885 | if (fail_count < RATE_MIN_FAILURE_TH && | 1894 | if (fail_count < RATE_MIN_FAILURE_TH && |
1886 | win->success_counter < RATE_MIN_SUCCESS_TH) { | 1895 | win->success_counter < RATE_MIN_SUCCESS_TH) { |
1887 | D_RATE("LQ: still below TH. succ=%d total=%d " | 1896 | D_RATE("LQ: still below TH. succ=%d total=%d " "for idx %d\n", |
1888 | "for idx %d\n", | 1897 | win->success_counter, win->counter, idx); |
1889 | win->success_counter, win->counter, idx); | ||
1890 | 1898 | ||
1891 | /* Can't calculate this yet; not enough history */ | 1899 | /* Can't calculate this yet; not enough history */ |
1892 | win->average_tpt = IL_INVALID_VALUE; | 1900 | win->average_tpt = IL_INVALID_VALUE; |
@@ -1899,12 +1907,11 @@ static void il4965_rs_rate_scale_perform(struct il_priv *il, | |||
1899 | } | 1907 | } |
1900 | /* Else we have enough samples; calculate estimate of | 1908 | /* Else we have enough samples; calculate estimate of |
1901 | * actual average throughput */ | 1909 | * actual average throughput */ |
1902 | if (win->average_tpt != ((win->success_ratio * | 1910 | if (win->average_tpt != |
1903 | tbl->expected_tpt[idx] + 64) / 128)) { | 1911 | ((win->success_ratio * tbl->expected_tpt[idx] + 64) / 128)) { |
1904 | IL_ERR( | 1912 | IL_ERR("expected_tpt should have been calculated by now\n"); |
1905 | "expected_tpt should have been calculated by now\n"); | 1913 | win->average_tpt = |
1906 | win->average_tpt = ((win->success_ratio * | 1914 | ((win->success_ratio * tbl->expected_tpt[idx] + 64) / 128); |
1907 | tbl->expected_tpt[idx] + 64) / 128); | ||
1908 | } | 1915 | } |
1909 | 1916 | ||
1910 | /* If we are searching for better modulation mode, check success. */ | 1917 | /* If we are searching for better modulation mode, check success. */ |
@@ -1915,10 +1922,9 @@ static void il4965_rs_rate_scale_perform(struct il_priv *il, | |||
1915 | if (win->average_tpt > lq_sta->last_tpt) { | 1922 | if (win->average_tpt > lq_sta->last_tpt) { |
1916 | 1923 | ||
1917 | D_RATE("LQ: SWITCHING TO NEW TBL " | 1924 | D_RATE("LQ: SWITCHING TO NEW TBL " |
1918 | "suc=%d cur-tpt=%d old-tpt=%d\n", | 1925 | "suc=%d cur-tpt=%d old-tpt=%d\n", |
1919 | win->success_ratio, | 1926 | win->success_ratio, win->average_tpt, |
1920 | win->average_tpt, | 1927 | lq_sta->last_tpt); |
1921 | lq_sta->last_tpt); | ||
1922 | 1928 | ||
1923 | if (!is_legacy(tbl->lq_type)) | 1929 | if (!is_legacy(tbl->lq_type)) |
1924 | lq_sta->enable_counter = 1; | 1930 | lq_sta->enable_counter = 1; |
@@ -1927,14 +1933,13 @@ static void il4965_rs_rate_scale_perform(struct il_priv *il, | |||
1927 | lq_sta->active_tbl = active_tbl; | 1933 | lq_sta->active_tbl = active_tbl; |
1928 | current_tpt = win->average_tpt; | 1934 | current_tpt = win->average_tpt; |
1929 | 1935 | ||
1930 | /* Else poor success; go back to mode in "active" table */ | 1936 | /* Else poor success; go back to mode in "active" table */ |
1931 | } else { | 1937 | } else { |
1932 | 1938 | ||
1933 | D_RATE("LQ: GOING BACK TO THE OLD TBL " | 1939 | D_RATE("LQ: GOING BACK TO THE OLD TBL " |
1934 | "suc=%d cur-tpt=%d old-tpt=%d\n", | 1940 | "suc=%d cur-tpt=%d old-tpt=%d\n", |
1935 | win->success_ratio, | 1941 | win->success_ratio, win->average_tpt, |
1936 | win->average_tpt, | 1942 | lq_sta->last_tpt); |
1937 | lq_sta->last_tpt); | ||
1938 | 1943 | ||
1939 | /* Nullify "search" table */ | 1944 | /* Nullify "search" table */ |
1940 | tbl->lq_type = LQ_NONE; | 1945 | tbl->lq_type = LQ_NONE; |
@@ -1960,15 +1965,14 @@ static void il4965_rs_rate_scale_perform(struct il_priv *il, | |||
1960 | 1965 | ||
1961 | /* (Else) not in search of better modulation mode, try for better | 1966 | /* (Else) not in search of better modulation mode, try for better |
1962 | * starting rate, while staying in this mode. */ | 1967 | * starting rate, while staying in this mode. */ |
1963 | high_low = il4965_rs_get_adjacent_rate(il, idx, | 1968 | high_low = |
1964 | rate_scale_idx_msk, | 1969 | il4965_rs_get_adjacent_rate(il, idx, rate_scale_idx_msk, |
1965 | tbl->lq_type); | 1970 | tbl->lq_type); |
1966 | low = high_low & 0xff; | 1971 | low = high_low & 0xff; |
1967 | high = (high_low >> 8) & 0xff; | 1972 | high = (high_low >> 8) & 0xff; |
1968 | 1973 | ||
1969 | /* If user set max rate, dont allow higher than user constrain */ | 1974 | /* If user set max rate, dont allow higher than user constrain */ |
1970 | if (lq_sta->max_rate_idx != -1 && | 1975 | if (lq_sta->max_rate_idx != -1 && lq_sta->max_rate_idx < high) |
1971 | lq_sta->max_rate_idx < high) | ||
1972 | high = RATE_INVALID; | 1976 | high = RATE_INVALID; |
1973 | 1977 | ||
1974 | sr = win->success_ratio; | 1978 | sr = win->success_ratio; |
@@ -1984,13 +1988,11 @@ static void il4965_rs_rate_scale_perform(struct il_priv *il, | |||
1984 | 1988 | ||
1985 | /* Too many failures, decrease rate */ | 1989 | /* Too many failures, decrease rate */ |
1986 | if (sr <= RATE_DECREASE_TH || current_tpt == 0) { | 1990 | if (sr <= RATE_DECREASE_TH || current_tpt == 0) { |
1987 | D_RATE( | 1991 | D_RATE("decrease rate because of low success_ratio\n"); |
1988 | "decrease rate because of low success_ratio\n"); | ||
1989 | scale_action = -1; | 1992 | scale_action = -1; |
1990 | 1993 | ||
1991 | /* No throughput measured yet for adjacent rates; try increase. */ | 1994 | /* No throughput measured yet for adjacent rates; try increase. */ |
1992 | } else if (low_tpt == IL_INVALID_VALUE && | 1995 | } else if (low_tpt == IL_INVALID_VALUE && high_tpt == IL_INVALID_VALUE) { |
1993 | high_tpt == IL_INVALID_VALUE) { | ||
1994 | 1996 | ||
1995 | if (high != RATE_INVALID && sr >= RATE_INCREASE_TH) | 1997 | if (high != RATE_INVALID && sr >= RATE_INCREASE_TH) |
1996 | scale_action = 1; | 1998 | scale_action = 1; |
@@ -2010,19 +2012,17 @@ static void il4965_rs_rate_scale_perform(struct il_priv *il, | |||
2010 | /* Higher adjacent rate's throughput is measured */ | 2012 | /* Higher adjacent rate's throughput is measured */ |
2011 | if (high_tpt != IL_INVALID_VALUE) { | 2013 | if (high_tpt != IL_INVALID_VALUE) { |
2012 | /* Higher rate has better throughput */ | 2014 | /* Higher rate has better throughput */ |
2013 | if (high_tpt > current_tpt && | 2015 | if (high_tpt > current_tpt && sr >= RATE_INCREASE_TH) { |
2014 | sr >= RATE_INCREASE_TH) { | ||
2015 | scale_action = 1; | 2016 | scale_action = 1; |
2016 | } else { | 2017 | } else { |
2017 | scale_action = 0; | 2018 | scale_action = 0; |
2018 | } | 2019 | } |
2019 | 2020 | ||
2020 | /* Lower adjacent rate's throughput is measured */ | 2021 | /* Lower adjacent rate's throughput is measured */ |
2021 | } else if (low_tpt != IL_INVALID_VALUE) { | 2022 | } else if (low_tpt != IL_INVALID_VALUE) { |
2022 | /* Lower rate has better throughput */ | 2023 | /* Lower rate has better throughput */ |
2023 | if (low_tpt > current_tpt) { | 2024 | if (low_tpt > current_tpt) { |
2024 | D_RATE( | 2025 | D_RATE("decrease rate because of low tpt\n"); |
2025 | "decrease rate because of low tpt\n"); | ||
2026 | scale_action = -1; | 2026 | scale_action = -1; |
2027 | } else if (sr >= RATE_INCREASE_TH) { | 2027 | } else if (sr >= RATE_INCREASE_TH) { |
2028 | scale_action = 1; | 2028 | scale_action = 1; |
@@ -2059,19 +2059,19 @@ static void il4965_rs_rate_scale_perform(struct il_priv *il, | |||
2059 | break; | 2059 | break; |
2060 | } | 2060 | } |
2061 | 2061 | ||
2062 | D_RATE("choose rate scale idx %d action %d low %d " | 2062 | D_RATE("choose rate scale idx %d action %d low %d " "high %d type %d\n", |
2063 | "high %d type %d\n", | 2063 | idx, scale_action, low, high, tbl->lq_type); |
2064 | idx, scale_action, low, high, tbl->lq_type); | ||
2065 | 2064 | ||
2066 | lq_update: | 2065 | lq_update: |
2067 | /* Replace uCode's rate table for the destination station. */ | 2066 | /* Replace uCode's rate table for the destination station. */ |
2068 | if (update_lq) | 2067 | if (update_lq) |
2069 | rate = il4965_rs_update_rate_tbl(il, ctx, lq_sta, | 2068 | rate = |
2070 | tbl, idx, is_green); | 2069 | il4965_rs_update_rate_tbl(il, ctx, lq_sta, tbl, idx, |
2070 | is_green); | ||
2071 | 2071 | ||
2072 | /* Should we stay with this modulation mode, | 2072 | /* Should we stay with this modulation mode, |
2073 | * or search for a new one? */ | 2073 | * or search for a new one? */ |
2074 | il4965_rs_stay_in_table(lq_sta, false); | 2074 | il4965_rs_stay_in_table(lq_sta, false); |
2075 | 2075 | ||
2076 | /* | 2076 | /* |
2077 | * Search for new modulation mode if we're: | 2077 | * Search for new modulation mode if we're: |
@@ -2079,41 +2079,35 @@ lq_update: | |||
2079 | * 2) Not just finishing up a search | 2079 | * 2) Not just finishing up a search |
2080 | * 3) Allowing a new search | 2080 | * 3) Allowing a new search |
2081 | */ | 2081 | */ |
2082 | if (!update_lq && !done_search && !lq_sta->stay_in_tbl && | 2082 | if (!update_lq && !done_search && !lq_sta->stay_in_tbl && win->counter) { |
2083 | win->counter) { | 2083 | /* Save current throughput to compare with "search" throughput */ |
2084 | /* Save current throughput to compare with "search" throughput*/ | ||
2085 | lq_sta->last_tpt = current_tpt; | 2084 | lq_sta->last_tpt = current_tpt; |
2086 | 2085 | ||
2087 | /* Select a new "search" modulation mode to try. | 2086 | /* Select a new "search" modulation mode to try. |
2088 | * If one is found, set up the new "search" table. */ | 2087 | * If one is found, set up the new "search" table. */ |
2089 | if (is_legacy(tbl->lq_type)) | 2088 | if (is_legacy(tbl->lq_type)) |
2090 | il4965_rs_move_legacy_other(il, lq_sta, | 2089 | il4965_rs_move_legacy_other(il, lq_sta, conf, sta, idx); |
2091 | conf, sta, idx); | ||
2092 | else if (is_siso(tbl->lq_type)) | 2090 | else if (is_siso(tbl->lq_type)) |
2093 | il4965_rs_move_siso_to_other(il, lq_sta, | 2091 | il4965_rs_move_siso_to_other(il, lq_sta, conf, sta, |
2094 | conf, sta, idx); | 2092 | idx); |
2095 | else /* (is_mimo2(tbl->lq_type)) */ | 2093 | else /* (is_mimo2(tbl->lq_type)) */ |
2096 | il4965_rs_move_mimo2_to_other(il, lq_sta, | 2094 | il4965_rs_move_mimo2_to_other(il, lq_sta, conf, sta, |
2097 | conf, sta, idx); | 2095 | idx); |
2098 | 2096 | ||
2099 | /* If new "search" mode was selected, set up in uCode table */ | 2097 | /* If new "search" mode was selected, set up in uCode table */ |
2100 | if (lq_sta->search_better_tbl) { | 2098 | if (lq_sta->search_better_tbl) { |
2101 | /* Access the "search" table, clear its history. */ | 2099 | /* Access the "search" table, clear its history. */ |
2102 | tbl = &(lq_sta->lq_info[(1 - lq_sta->active_tbl)]); | 2100 | tbl = &(lq_sta->lq_info[(1 - lq_sta->active_tbl)]); |
2103 | for (i = 0; i < RATE_COUNT; i++) | 2101 | for (i = 0; i < RATE_COUNT; i++) |
2104 | il4965_rs_rate_scale_clear_win( | 2102 | il4965_rs_rate_scale_clear_win(&(tbl->win[i])); |
2105 | &(tbl->win[i])); | ||
2106 | 2103 | ||
2107 | /* Use new "search" start rate */ | 2104 | /* Use new "search" start rate */ |
2108 | idx = il4965_hwrate_to_plcp_idx(tbl->current_rate); | 2105 | idx = il4965_hwrate_to_plcp_idx(tbl->current_rate); |
2109 | 2106 | ||
2110 | D_RATE( | 2107 | D_RATE("Switch current mcs: %X idx: %d\n", |
2111 | "Switch current mcs: %X idx: %d\n", | 2108 | tbl->current_rate, idx); |
2112 | tbl->current_rate, idx); | 2109 | il4965_rs_fill_link_cmd(il, lq_sta, tbl->current_rate); |
2113 | il4965_rs_fill_link_cmd(il, lq_sta, | 2110 | il_send_lq_cmd(il, ctx, &lq_sta->lq, CMD_ASYNC, false); |
2114 | tbl->current_rate); | ||
2115 | il_send_lq_cmd(il, ctx, | ||
2116 | &lq_sta->lq, CMD_ASYNC, false); | ||
2117 | } else | 2111 | } else |
2118 | done_search = 1; | 2112 | done_search = 1; |
2119 | } | 2113 | } |
@@ -2140,13 +2134,12 @@ lq_update: | |||
2140 | (lq_sta->tx_agg_tid_en & (1 << tid)) && | 2134 | (lq_sta->tx_agg_tid_en & (1 << tid)) && |
2141 | tid != MAX_TID_COUNT) { | 2135 | tid != MAX_TID_COUNT) { |
2142 | tid_data = | 2136 | tid_data = |
2143 | &il->stations[lq_sta->lq.sta_id].tid[tid]; | 2137 | &il->stations[lq_sta->lq.sta_id].tid[tid]; |
2144 | if (tid_data->agg.state == IL_AGG_OFF) { | 2138 | if (tid_data->agg.state == IL_AGG_OFF) { |
2145 | D_RATE( | 2139 | D_RATE("try to aggregate tid %d\n", |
2146 | "try to aggregate tid %d\n", | 2140 | tid); |
2147 | tid); | ||
2148 | il4965_rs_tl_turn_on_agg(il, tid, | 2141 | il4965_rs_tl_turn_on_agg(il, tid, |
2149 | lq_sta, sta); | 2142 | lq_sta, sta); |
2150 | } | 2143 | } |
2151 | } | 2144 | } |
2152 | il4965_rs_set_stay_in_table(il, 0, lq_sta); | 2145 | il4965_rs_set_stay_in_table(il, 0, lq_sta); |
@@ -2154,8 +2147,8 @@ lq_update: | |||
2154 | } | 2147 | } |
2155 | 2148 | ||
2156 | out: | 2149 | out: |
2157 | tbl->current_rate = il4965_rate_n_flags_from_tbl(il, tbl, | 2150 | tbl->current_rate = |
2158 | idx, is_green); | 2151 | il4965_rate_n_flags_from_tbl(il, tbl, idx, is_green); |
2159 | i = idx; | 2152 | i = idx; |
2160 | lq_sta->last_txrate_idx = i; | 2153 | lq_sta->last_txrate_idx = i; |
2161 | } | 2154 | } |
@@ -2174,10 +2167,9 @@ out: | |||
2174 | * calling this function (which runs C_TX_LINK_QUALITY_CMD, | 2167 | * calling this function (which runs C_TX_LINK_QUALITY_CMD, |
2175 | * which requires station table entry to exist). | 2168 | * which requires station table entry to exist). |
2176 | */ | 2169 | */ |
2177 | static void il4965_rs_initialize_lq(struct il_priv *il, | 2170 | static void |
2178 | struct ieee80211_conf *conf, | 2171 | il4965_rs_initialize_lq(struct il_priv *il, struct ieee80211_conf *conf, |
2179 | struct ieee80211_sta *sta, | 2172 | struct ieee80211_sta *sta, struct il_lq_sta *lq_sta) |
2180 | struct il_lq_sta *lq_sta) | ||
2181 | { | 2173 | { |
2182 | struct il_scale_tbl_info *tbl; | 2174 | struct il_scale_tbl_info *tbl; |
2183 | int rate_idx; | 2175 | int rate_idx; |
@@ -2230,7 +2222,7 @@ static void il4965_rs_initialize_lq(struct il_priv *il, | |||
2230 | 2222 | ||
2231 | static void | 2223 | static void |
2232 | il4965_rs_get_rate(void *il_r, struct ieee80211_sta *sta, void *il_sta, | 2224 | il4965_rs_get_rate(void *il_r, struct ieee80211_sta *sta, void *il_sta, |
2233 | struct ieee80211_tx_rate_control *txrc) | 2225 | struct ieee80211_tx_rate_control *txrc) |
2234 | { | 2226 | { |
2235 | 2227 | ||
2236 | struct sk_buff *skb = txrc->skb; | 2228 | struct sk_buff *skb = txrc->skb; |
@@ -2266,28 +2258,28 @@ il4965_rs_get_rate(void *il_r, struct ieee80211_sta *sta, void *il_sta, | |||
2266 | if (!lq_sta) | 2258 | if (!lq_sta) |
2267 | return; | 2259 | return; |
2268 | 2260 | ||
2269 | rate_idx = lq_sta->last_txrate_idx; | 2261 | rate_idx = lq_sta->last_txrate_idx; |
2270 | 2262 | ||
2271 | if (lq_sta->last_rate_n_flags & RATE_MCS_HT_MSK) { | 2263 | if (lq_sta->last_rate_n_flags & RATE_MCS_HT_MSK) { |
2272 | rate_idx -= IL_FIRST_OFDM_RATE; | 2264 | rate_idx -= IL_FIRST_OFDM_RATE; |
2273 | /* 6M and 9M shared same MCS idx */ | 2265 | /* 6M and 9M shared same MCS idx */ |
2274 | rate_idx = (rate_idx > 0) ? (rate_idx - 1) : 0; | 2266 | rate_idx = (rate_idx > 0) ? (rate_idx - 1) : 0; |
2275 | if (il4965_rs_extract_rate(lq_sta->last_rate_n_flags) >= | 2267 | if (il4965_rs_extract_rate(lq_sta->last_rate_n_flags) >= |
2276 | RATE_MIMO2_6M_PLCP) | 2268 | RATE_MIMO2_6M_PLCP) |
2277 | rate_idx = rate_idx + MCS_IDX_PER_STREAM; | 2269 | rate_idx = rate_idx + MCS_IDX_PER_STREAM; |
2278 | info->control.rates[0].flags = IEEE80211_TX_RC_MCS; | 2270 | info->control.rates[0].flags = IEEE80211_TX_RC_MCS; |
2279 | if (lq_sta->last_rate_n_flags & RATE_MCS_SGI_MSK) | 2271 | if (lq_sta->last_rate_n_flags & RATE_MCS_SGI_MSK) |
2280 | info->control.rates[0].flags |= | 2272 | info->control.rates[0].flags |= |
2281 | IEEE80211_TX_RC_SHORT_GI; | 2273 | IEEE80211_TX_RC_SHORT_GI; |
2282 | if (lq_sta->last_rate_n_flags & RATE_MCS_DUP_MSK) | 2274 | if (lq_sta->last_rate_n_flags & RATE_MCS_DUP_MSK) |
2283 | info->control.rates[0].flags |= | 2275 | info->control.rates[0].flags |= |
2284 | IEEE80211_TX_RC_DUP_DATA; | 2276 | IEEE80211_TX_RC_DUP_DATA; |
2285 | if (lq_sta->last_rate_n_flags & RATE_MCS_HT40_MSK) | 2277 | if (lq_sta->last_rate_n_flags & RATE_MCS_HT40_MSK) |
2286 | info->control.rates[0].flags |= | 2278 | info->control.rates[0].flags |= |
2287 | IEEE80211_TX_RC_40_MHZ_WIDTH; | 2279 | IEEE80211_TX_RC_40_MHZ_WIDTH; |
2288 | if (lq_sta->last_rate_n_flags & RATE_MCS_GF_MSK) | 2280 | if (lq_sta->last_rate_n_flags & RATE_MCS_GF_MSK) |
2289 | info->control.rates[0].flags |= | 2281 | info->control.rates[0].flags |= |
2290 | IEEE80211_TX_RC_GREEN_FIELD; | 2282 | IEEE80211_TX_RC_GREEN_FIELD; |
2291 | } else { | 2283 | } else { |
2292 | /* Check for invalid rates */ | 2284 | /* Check for invalid rates */ |
2293 | if (rate_idx < 0 || rate_idx >= RATE_COUNT_LEGACY || | 2285 | if (rate_idx < 0 || rate_idx >= RATE_COUNT_LEGACY || |
@@ -2303,12 +2295,12 @@ il4965_rs_get_rate(void *il_r, struct ieee80211_sta *sta, void *il_sta, | |||
2303 | 2295 | ||
2304 | } | 2296 | } |
2305 | 2297 | ||
2306 | static void *il4965_rs_alloc_sta(void *il_rate, struct ieee80211_sta *sta, | 2298 | static void * |
2307 | gfp_t gfp) | 2299 | il4965_rs_alloc_sta(void *il_rate, struct ieee80211_sta *sta, gfp_t gfp) |
2308 | { | 2300 | { |
2309 | struct il_lq_sta *lq_sta; | 2301 | struct il_lq_sta *lq_sta; |
2310 | struct il_station_priv *sta_priv = | 2302 | struct il_station_priv *sta_priv = |
2311 | (struct il_station_priv *) sta->drv_priv; | 2303 | (struct il_station_priv *)sta->drv_priv; |
2312 | struct il_priv *il; | 2304 | struct il_priv *il; |
2313 | 2305 | ||
2314 | il = (struct il_priv *)il_rate; | 2306 | il = (struct il_priv *)il_rate; |
@@ -2323,9 +2315,7 @@ static void *il4965_rs_alloc_sta(void *il_rate, struct ieee80211_sta *sta, | |||
2323 | * Called after adding a new station to initialize rate scaling | 2315 | * Called after adding a new station to initialize rate scaling |
2324 | */ | 2316 | */ |
2325 | void | 2317 | void |
2326 | il4965_rs_rate_init(struct il_priv *il, | 2318 | il4965_rs_rate_init(struct il_priv *il, struct ieee80211_sta *sta, u8 sta_id) |
2327 | struct ieee80211_sta *sta, | ||
2328 | u8 sta_id) | ||
2329 | { | 2319 | { |
2330 | int i, j; | 2320 | int i, j; |
2331 | struct ieee80211_hw *hw = il->hw; | 2321 | struct ieee80211_hw *hw = il->hw; |
@@ -2335,28 +2325,26 @@ il4965_rs_rate_init(struct il_priv *il, | |||
2335 | struct il_lq_sta *lq_sta; | 2325 | struct il_lq_sta *lq_sta; |
2336 | struct ieee80211_supported_band *sband; | 2326 | struct ieee80211_supported_band *sband; |
2337 | 2327 | ||
2338 | sta_priv = (struct il_station_priv *) sta->drv_priv; | 2328 | sta_priv = (struct il_station_priv *)sta->drv_priv; |
2339 | lq_sta = &sta_priv->lq_sta; | 2329 | lq_sta = &sta_priv->lq_sta; |
2340 | sband = hw->wiphy->bands[conf->channel->band]; | 2330 | sband = hw->wiphy->bands[conf->channel->band]; |
2341 | 2331 | ||
2342 | |||
2343 | lq_sta->lq.sta_id = sta_id; | 2332 | lq_sta->lq.sta_id = sta_id; |
2344 | 2333 | ||
2345 | for (j = 0; j < LQ_SIZE; j++) | 2334 | for (j = 0; j < LQ_SIZE; j++) |
2346 | for (i = 0; i < RATE_COUNT; i++) | 2335 | for (i = 0; i < RATE_COUNT; i++) |
2347 | il4965_rs_rate_scale_clear_win( | 2336 | il4965_rs_rate_scale_clear_win(&lq_sta->lq_info[j]. |
2348 | &lq_sta->lq_info[j].win[i]); | 2337 | win[i]); |
2349 | 2338 | ||
2350 | lq_sta->flush_timer = 0; | 2339 | lq_sta->flush_timer = 0; |
2351 | lq_sta->supp_rates = sta->supp_rates[sband->band]; | 2340 | lq_sta->supp_rates = sta->supp_rates[sband->band]; |
2352 | for (j = 0; j < LQ_SIZE; j++) | 2341 | for (j = 0; j < LQ_SIZE; j++) |
2353 | for (i = 0; i < RATE_COUNT; i++) | 2342 | for (i = 0; i < RATE_COUNT; i++) |
2354 | il4965_rs_rate_scale_clear_win( | 2343 | il4965_rs_rate_scale_clear_win(&lq_sta->lq_info[j]. |
2355 | &lq_sta->lq_info[j].win[i]); | 2344 | win[i]); |
2356 | 2345 | ||
2357 | D_RATE("LQ:" | 2346 | D_RATE("LQ:" "*** rate scale station global init for station %d ***\n", |
2358 | "*** rate scale station global init for station %d ***\n", | 2347 | sta_id); |
2359 | sta_id); | ||
2360 | /* TODO: what is a good starting rate for STA? About middle? Maybe not | 2348 | /* TODO: what is a good starting rate for STA? About middle? Maybe not |
2361 | * the lowest or the highest rate.. Could consider using RSSI from | 2349 | * the lowest or the highest rate.. Could consider using RSSI from |
2362 | * previous packets? Need to have IEEE 802.1X auth succeed immediately | 2350 | * previous packets? Need to have IEEE 802.1X auth succeed immediately |
@@ -2374,26 +2362,26 @@ il4965_rs_rate_init(struct il_priv *il, | |||
2374 | */ | 2362 | */ |
2375 | lq_sta->active_siso_rate = ht_cap->mcs.rx_mask[0] << 1; | 2363 | lq_sta->active_siso_rate = ht_cap->mcs.rx_mask[0] << 1; |
2376 | lq_sta->active_siso_rate |= ht_cap->mcs.rx_mask[0] & 0x1; | 2364 | lq_sta->active_siso_rate |= ht_cap->mcs.rx_mask[0] & 0x1; |
2377 | lq_sta->active_siso_rate &= ~((u16)0x2); | 2365 | lq_sta->active_siso_rate &= ~((u16) 0x2); |
2378 | lq_sta->active_siso_rate <<= IL_FIRST_OFDM_RATE; | 2366 | lq_sta->active_siso_rate <<= IL_FIRST_OFDM_RATE; |
2379 | 2367 | ||
2380 | /* Same here */ | 2368 | /* Same here */ |
2381 | lq_sta->active_mimo2_rate = ht_cap->mcs.rx_mask[1] << 1; | 2369 | lq_sta->active_mimo2_rate = ht_cap->mcs.rx_mask[1] << 1; |
2382 | lq_sta->active_mimo2_rate |= ht_cap->mcs.rx_mask[1] & 0x1; | 2370 | lq_sta->active_mimo2_rate |= ht_cap->mcs.rx_mask[1] & 0x1; |
2383 | lq_sta->active_mimo2_rate &= ~((u16)0x2); | 2371 | lq_sta->active_mimo2_rate &= ~((u16) 0x2); |
2384 | lq_sta->active_mimo2_rate <<= IL_FIRST_OFDM_RATE; | 2372 | lq_sta->active_mimo2_rate <<= IL_FIRST_OFDM_RATE; |
2385 | 2373 | ||
2386 | /* These values will be overridden later */ | 2374 | /* These values will be overridden later */ |
2387 | lq_sta->lq.general_params.single_stream_ant_msk = | 2375 | lq_sta->lq.general_params.single_stream_ant_msk = |
2388 | il4965_first_antenna(il->hw_params.valid_tx_ant); | 2376 | il4965_first_antenna(il->hw_params.valid_tx_ant); |
2389 | lq_sta->lq.general_params.dual_stream_ant_msk = | 2377 | lq_sta->lq.general_params.dual_stream_ant_msk = |
2390 | il->hw_params.valid_tx_ant & | 2378 | il->hw_params.valid_tx_ant & ~il4965_first_antenna(il->hw_params. |
2391 | ~il4965_first_antenna(il->hw_params.valid_tx_ant); | 2379 | valid_tx_ant); |
2392 | if (!lq_sta->lq.general_params.dual_stream_ant_msk) { | 2380 | if (!lq_sta->lq.general_params.dual_stream_ant_msk) { |
2393 | lq_sta->lq.general_params.dual_stream_ant_msk = ANT_AB; | 2381 | lq_sta->lq.general_params.dual_stream_ant_msk = ANT_AB; |
2394 | } else if (il4965_num_of_ant(il->hw_params.valid_tx_ant) == 2) { | 2382 | } else if (il4965_num_of_ant(il->hw_params.valid_tx_ant) == 2) { |
2395 | lq_sta->lq.general_params.dual_stream_ant_msk = | 2383 | lq_sta->lq.general_params.dual_stream_ant_msk = |
2396 | il->hw_params.valid_tx_ant; | 2384 | il->hw_params.valid_tx_ant; |
2397 | } | 2385 | } |
2398 | 2386 | ||
2399 | /* as default allow aggregation for all tids */ | 2387 | /* as default allow aggregation for all tids */ |
@@ -2413,8 +2401,9 @@ il4965_rs_rate_init(struct il_priv *il, | |||
2413 | il4965_rs_initialize_lq(il, conf, sta, lq_sta); | 2401 | il4965_rs_initialize_lq(il, conf, sta, lq_sta); |
2414 | } | 2402 | } |
2415 | 2403 | ||
2416 | static void il4965_rs_fill_link_cmd(struct il_priv *il, | 2404 | static void |
2417 | struct il_lq_sta *lq_sta, u32 new_rate) | 2405 | il4965_rs_fill_link_cmd(struct il_priv *il, struct il_lq_sta *lq_sta, |
2406 | u32 new_rate) | ||
2418 | { | 2407 | { |
2419 | struct il_scale_tbl_info tbl_type; | 2408 | struct il_scale_tbl_info tbl_type; |
2420 | int idx = 0; | 2409 | int idx = 0; |
@@ -2429,8 +2418,8 @@ static void il4965_rs_fill_link_cmd(struct il_priv *il, | |||
2429 | il4965_rs_dbgfs_set_mcs(lq_sta, &new_rate, idx); | 2418 | il4965_rs_dbgfs_set_mcs(lq_sta, &new_rate, idx); |
2430 | 2419 | ||
2431 | /* Interpret new_rate (rate_n_flags) */ | 2420 | /* Interpret new_rate (rate_n_flags) */ |
2432 | il4965_rs_get_tbl_info_from_mcs(new_rate, lq_sta->band, | 2421 | il4965_rs_get_tbl_info_from_mcs(new_rate, lq_sta->band, &tbl_type, |
2433 | &tbl_type, &rate_idx); | 2422 | &rate_idx); |
2434 | 2423 | ||
2435 | /* How many times should we repeat the initial rate? */ | 2424 | /* How many times should we repeat the initial rate? */ |
2436 | if (is_legacy(tbl_type.lq_type)) { | 2425 | if (is_legacy(tbl_type.lq_type)) { |
@@ -2441,19 +2430,18 @@ static void il4965_rs_fill_link_cmd(struct il_priv *il, | |||
2441 | } | 2430 | } |
2442 | 2431 | ||
2443 | lq_cmd->general_params.mimo_delimiter = | 2432 | lq_cmd->general_params.mimo_delimiter = |
2444 | is_mimo(tbl_type.lq_type) ? 1 : 0; | 2433 | is_mimo(tbl_type.lq_type) ? 1 : 0; |
2445 | 2434 | ||
2446 | /* Fill 1st table entry (idx 0) */ | 2435 | /* Fill 1st table entry (idx 0) */ |
2447 | lq_cmd->rs_table[idx].rate_n_flags = cpu_to_le32(new_rate); | 2436 | lq_cmd->rs_table[idx].rate_n_flags = cpu_to_le32(new_rate); |
2448 | 2437 | ||
2449 | if (il4965_num_of_ant(tbl_type.ant_type) == 1) { | 2438 | if (il4965_num_of_ant(tbl_type.ant_type) == 1) { |
2450 | lq_cmd->general_params.single_stream_ant_msk = | 2439 | lq_cmd->general_params.single_stream_ant_msk = |
2451 | tbl_type.ant_type; | 2440 | tbl_type.ant_type; |
2452 | } else if (il4965_num_of_ant(tbl_type.ant_type) == 2) { | 2441 | } else if (il4965_num_of_ant(tbl_type.ant_type) == 2) { |
2453 | lq_cmd->general_params.dual_stream_ant_msk = | 2442 | lq_cmd->general_params.dual_stream_ant_msk = tbl_type.ant_type; |
2454 | tbl_type.ant_type; | 2443 | } |
2455 | } /* otherwise we don't modify the existing value */ | 2444 | /* otherwise we don't modify the existing value */ |
2456 | |||
2457 | idx++; | 2445 | idx++; |
2458 | repeat_rate--; | 2446 | repeat_rate--; |
2459 | if (il) | 2447 | if (il) |
@@ -2470,7 +2458,8 @@ static void il4965_rs_fill_link_cmd(struct il_priv *il, | |||
2470 | ant_toggle_cnt++; | 2458 | ant_toggle_cnt++; |
2471 | else if (il && | 2459 | else if (il && |
2472 | il4965_rs_toggle_antenna(valid_tx_ant, | 2460 | il4965_rs_toggle_antenna(valid_tx_ant, |
2473 | &new_rate, &tbl_type)) | 2461 | &new_rate, |
2462 | &tbl_type)) | ||
2474 | ant_toggle_cnt = 1; | 2463 | ant_toggle_cnt = 1; |
2475 | } | 2464 | } |
2476 | 2465 | ||
@@ -2479,14 +2468,13 @@ static void il4965_rs_fill_link_cmd(struct il_priv *il, | |||
2479 | 2468 | ||
2480 | /* Fill next table entry */ | 2469 | /* Fill next table entry */ |
2481 | lq_cmd->rs_table[idx].rate_n_flags = | 2470 | lq_cmd->rs_table[idx].rate_n_flags = |
2482 | cpu_to_le32(new_rate); | 2471 | cpu_to_le32(new_rate); |
2483 | repeat_rate--; | 2472 | repeat_rate--; |
2484 | idx++; | 2473 | idx++; |
2485 | } | 2474 | } |
2486 | 2475 | ||
2487 | il4965_rs_get_tbl_info_from_mcs(new_rate, | 2476 | il4965_rs_get_tbl_info_from_mcs(new_rate, lq_sta->band, |
2488 | lq_sta->band, &tbl_type, | 2477 | &tbl_type, &rate_idx); |
2489 | &rate_idx); | ||
2490 | 2478 | ||
2491 | /* Indicate to uCode which entries might be MIMO. | 2479 | /* Indicate to uCode which entries might be MIMO. |
2492 | * If initial rate was MIMO, this will finally end up | 2480 | * If initial rate was MIMO, this will finally end up |
@@ -2495,8 +2483,8 @@ static void il4965_rs_fill_link_cmd(struct il_priv *il, | |||
2495 | lq_cmd->general_params.mimo_delimiter = idx; | 2483 | lq_cmd->general_params.mimo_delimiter = idx; |
2496 | 2484 | ||
2497 | /* Get next rate */ | 2485 | /* Get next rate */ |
2498 | new_rate = il4965_rs_get_lower_rate(lq_sta, | 2486 | new_rate = |
2499 | &tbl_type, rate_idx, | 2487 | il4965_rs_get_lower_rate(lq_sta, &tbl_type, rate_idx, |
2500 | use_ht_possible); | 2488 | use_ht_possible); |
2501 | 2489 | ||
2502 | /* How many times should we repeat the next rate? */ | 2490 | /* How many times should we repeat the next rate? */ |
@@ -2505,7 +2493,7 @@ static void il4965_rs_fill_link_cmd(struct il_priv *il, | |||
2505 | ant_toggle_cnt++; | 2493 | ant_toggle_cnt++; |
2506 | else if (il && | 2494 | else if (il && |
2507 | il4965_rs_toggle_antenna(valid_tx_ant, | 2495 | il4965_rs_toggle_antenna(valid_tx_ant, |
2508 | &new_rate, &tbl_type)) | 2496 | &new_rate, &tbl_type)) |
2509 | ant_toggle_cnt = 1; | 2497 | ant_toggle_cnt = 1; |
2510 | 2498 | ||
2511 | repeat_rate = IL_NUMBER_TRY; | 2499 | repeat_rate = IL_NUMBER_TRY; |
@@ -2531,22 +2519,24 @@ static void il4965_rs_fill_link_cmd(struct il_priv *il, | |||
2531 | lq_cmd->agg_params.agg_dis_start_th = LINK_QUAL_AGG_DISABLE_START_DEF; | 2519 | lq_cmd->agg_params.agg_dis_start_th = LINK_QUAL_AGG_DISABLE_START_DEF; |
2532 | 2520 | ||
2533 | lq_cmd->agg_params.agg_time_limit = | 2521 | lq_cmd->agg_params.agg_time_limit = |
2534 | cpu_to_le16(LINK_QUAL_AGG_TIME_LIMIT_DEF); | 2522 | cpu_to_le16(LINK_QUAL_AGG_TIME_LIMIT_DEF); |
2535 | } | 2523 | } |
2536 | 2524 | ||
2537 | static void | 2525 | static void * |
2538 | *il4965_rs_alloc(struct ieee80211_hw *hw, struct dentry *debugfsdir) | 2526 | il4965_rs_alloc(struct ieee80211_hw *hw, struct dentry *debugfsdir) |
2539 | { | 2527 | { |
2540 | return hw->priv; | 2528 | return hw->priv; |
2541 | } | 2529 | } |
2530 | |||
2542 | /* rate scale requires free function to be implemented */ | 2531 | /* rate scale requires free function to be implemented */ |
2543 | static void il4965_rs_free(void *il_rate) | 2532 | static void |
2533 | il4965_rs_free(void *il_rate) | ||
2544 | { | 2534 | { |
2545 | return; | 2535 | return; |
2546 | } | 2536 | } |
2547 | 2537 | ||
2548 | static void il4965_rs_free_sta(void *il_r, struct ieee80211_sta *sta, | 2538 | static void |
2549 | void *il_sta) | 2539 | il4965_rs_free_sta(void *il_r, struct ieee80211_sta *sta, void *il_sta) |
2550 | { | 2540 | { |
2551 | struct il_priv *il __maybe_unused = il_r; | 2541 | struct il_priv *il __maybe_unused = il_r; |
2552 | 2542 | ||
@@ -2554,15 +2544,16 @@ static void il4965_rs_free_sta(void *il_r, struct ieee80211_sta *sta, | |||
2554 | D_RATE("leave\n"); | 2544 | D_RATE("leave\n"); |
2555 | } | 2545 | } |
2556 | 2546 | ||
2557 | |||
2558 | #ifdef CONFIG_MAC80211_DEBUGFS | 2547 | #ifdef CONFIG_MAC80211_DEBUGFS |
2559 | static int il4965_open_file_generic(struct inode *inode, struct file *file) | 2548 | static int |
2549 | il4965_open_file_generic(struct inode *inode, struct file *file) | ||
2560 | { | 2550 | { |
2561 | file->private_data = inode->i_private; | 2551 | file->private_data = inode->i_private; |
2562 | return 0; | 2552 | return 0; |
2563 | } | 2553 | } |
2564 | static void il4965_rs_dbgfs_set_mcs(struct il_lq_sta *lq_sta, | 2554 | |
2565 | u32 *rate_n_flags, int idx) | 2555 | static void |
2556 | il4965_rs_dbgfs_set_mcs(struct il_lq_sta *lq_sta, u32 * rate_n_flags, int idx) | ||
2566 | { | 2557 | { |
2567 | struct il_priv *il; | 2558 | struct il_priv *il; |
2568 | u8 valid_tx_ant; | 2559 | u8 valid_tx_ant; |
@@ -2572,16 +2563,17 @@ static void il4965_rs_dbgfs_set_mcs(struct il_lq_sta *lq_sta, | |||
2572 | valid_tx_ant = il->hw_params.valid_tx_ant; | 2563 | valid_tx_ant = il->hw_params.valid_tx_ant; |
2573 | if (lq_sta->dbg_fixed_rate) { | 2564 | if (lq_sta->dbg_fixed_rate) { |
2574 | ant_sel_tx = | 2565 | ant_sel_tx = |
2575 | ((lq_sta->dbg_fixed_rate & RATE_MCS_ANT_ABC_MSK) | 2566 | ((lq_sta-> |
2576 | >> RATE_MCS_ANT_POS); | 2567 | dbg_fixed_rate & RATE_MCS_ANT_ABC_MSK) >> |
2568 | RATE_MCS_ANT_POS); | ||
2577 | if ((valid_tx_ant & ant_sel_tx) == ant_sel_tx) { | 2569 | if ((valid_tx_ant & ant_sel_tx) == ant_sel_tx) { |
2578 | *rate_n_flags = lq_sta->dbg_fixed_rate; | 2570 | *rate_n_flags = lq_sta->dbg_fixed_rate; |
2579 | D_RATE("Fixed rate ON\n"); | 2571 | D_RATE("Fixed rate ON\n"); |
2580 | } else { | 2572 | } else { |
2581 | lq_sta->dbg_fixed_rate = 0; | 2573 | lq_sta->dbg_fixed_rate = 0; |
2582 | IL_ERR( | 2574 | IL_ERR |
2583 | "Invalid antenna selection 0x%X, Valid is 0x%X\n", | 2575 | ("Invalid antenna selection 0x%X, Valid is 0x%X\n", |
2584 | ant_sel_tx, valid_tx_ant); | 2576 | ant_sel_tx, valid_tx_ant); |
2585 | D_RATE("Fixed rate OFF\n"); | 2577 | D_RATE("Fixed rate OFF\n"); |
2586 | } | 2578 | } |
2587 | } else { | 2579 | } else { |
@@ -2589,8 +2581,10 @@ static void il4965_rs_dbgfs_set_mcs(struct il_lq_sta *lq_sta, | |||
2589 | } | 2581 | } |
2590 | } | 2582 | } |
2591 | 2583 | ||
2592 | static ssize_t il4965_rs_sta_dbgfs_scale_table_write(struct file *file, | 2584 | static ssize_t |
2593 | const char __user *user_buf, size_t count, loff_t *ppos) | 2585 | il4965_rs_sta_dbgfs_scale_table_write(struct file *file, |
2586 | const char __user * user_buf, | ||
2587 | size_t count, loff_t * ppos) | ||
2594 | { | 2588 | { |
2595 | struct il_lq_sta *lq_sta = file->private_data; | 2589 | struct il_lq_sta *lq_sta = file->private_data; |
2596 | struct il_priv *il; | 2590 | struct il_priv *il; |
@@ -2598,12 +2592,12 @@ static ssize_t il4965_rs_sta_dbgfs_scale_table_write(struct file *file, | |||
2598 | size_t buf_size; | 2592 | size_t buf_size; |
2599 | u32 parsed_rate; | 2593 | u32 parsed_rate; |
2600 | struct il_station_priv *sta_priv = | 2594 | struct il_station_priv *sta_priv = |
2601 | container_of(lq_sta, struct il_station_priv, lq_sta); | 2595 | container_of(lq_sta, struct il_station_priv, lq_sta); |
2602 | struct il_rxon_context *ctx = sta_priv->common.ctx; | 2596 | struct il_rxon_context *ctx = sta_priv->common.ctx; |
2603 | 2597 | ||
2604 | il = lq_sta->drv; | 2598 | il = lq_sta->drv; |
2605 | memset(buf, 0, sizeof(buf)); | 2599 | memset(buf, 0, sizeof(buf)); |
2606 | buf_size = min(count, sizeof(buf) - 1); | 2600 | buf_size = min(count, sizeof(buf) - 1); |
2607 | if (copy_from_user(buf, user_buf, buf_size)) | 2601 | if (copy_from_user(buf, user_buf, buf_size)) |
2608 | return -EFAULT; | 2602 | return -EFAULT; |
2609 | 2603 | ||
@@ -2613,23 +2607,23 @@ static ssize_t il4965_rs_sta_dbgfs_scale_table_write(struct file *file, | |||
2613 | lq_sta->dbg_fixed_rate = 0; | 2607 | lq_sta->dbg_fixed_rate = 0; |
2614 | 2608 | ||
2615 | lq_sta->active_legacy_rate = 0x0FFF; /* 1 - 54 MBits, includes CCK */ | 2609 | lq_sta->active_legacy_rate = 0x0FFF; /* 1 - 54 MBits, includes CCK */ |
2616 | lq_sta->active_siso_rate = 0x1FD0; /* 6 - 60 MBits, no 9, no CCK */ | 2610 | lq_sta->active_siso_rate = 0x1FD0; /* 6 - 60 MBits, no 9, no CCK */ |
2617 | lq_sta->active_mimo2_rate = 0x1FD0; /* 6 - 60 MBits, no 9, no CCK */ | 2611 | lq_sta->active_mimo2_rate = 0x1FD0; /* 6 - 60 MBits, no 9, no CCK */ |
2618 | 2612 | ||
2619 | D_RATE("sta_id %d rate 0x%X\n", | 2613 | D_RATE("sta_id %d rate 0x%X\n", lq_sta->lq.sta_id, |
2620 | lq_sta->lq.sta_id, lq_sta->dbg_fixed_rate); | 2614 | lq_sta->dbg_fixed_rate); |
2621 | 2615 | ||
2622 | if (lq_sta->dbg_fixed_rate) { | 2616 | if (lq_sta->dbg_fixed_rate) { |
2623 | il4965_rs_fill_link_cmd(NULL, lq_sta, lq_sta->dbg_fixed_rate); | 2617 | il4965_rs_fill_link_cmd(NULL, lq_sta, lq_sta->dbg_fixed_rate); |
2624 | il_send_lq_cmd(lq_sta->drv, ctx, &lq_sta->lq, CMD_ASYNC, | 2618 | il_send_lq_cmd(lq_sta->drv, ctx, &lq_sta->lq, CMD_ASYNC, false); |
2625 | false); | ||
2626 | } | 2619 | } |
2627 | 2620 | ||
2628 | return count; | 2621 | return count; |
2629 | } | 2622 | } |
2630 | 2623 | ||
2631 | static ssize_t il4965_rs_sta_dbgfs_scale_table_read(struct file *file, | 2624 | static ssize_t |
2632 | char __user *user_buf, size_t count, loff_t *ppos) | 2625 | il4965_rs_sta_dbgfs_scale_table_read(struct file *file, char __user * user_buf, |
2626 | size_t count, loff_t * ppos) | ||
2633 | { | 2627 | { |
2634 | char *buff; | 2628 | char *buff; |
2635 | int desc = 0; | 2629 | int desc = 0; |
@@ -2646,64 +2640,80 @@ static ssize_t il4965_rs_sta_dbgfs_scale_table_read(struct file *file, | |||
2646 | if (!buff) | 2640 | if (!buff) |
2647 | return -ENOMEM; | 2641 | return -ENOMEM; |
2648 | 2642 | ||
2649 | desc += sprintf(buff+desc, "sta_id %d\n", lq_sta->lq.sta_id); | 2643 | desc += sprintf(buff + desc, "sta_id %d\n", lq_sta->lq.sta_id); |
2650 | desc += sprintf(buff+desc, "failed=%d success=%d rate=0%X\n", | 2644 | desc += |
2651 | lq_sta->total_failed, lq_sta->total_success, | 2645 | sprintf(buff + desc, "failed=%d success=%d rate=0%X\n", |
2652 | lq_sta->active_legacy_rate); | 2646 | lq_sta->total_failed, lq_sta->total_success, |
2653 | desc += sprintf(buff+desc, "fixed rate 0x%X\n", | 2647 | lq_sta->active_legacy_rate); |
2654 | lq_sta->dbg_fixed_rate); | 2648 | desc += |
2655 | desc += sprintf(buff+desc, "valid_tx_ant %s%s%s\n", | 2649 | sprintf(buff + desc, "fixed rate 0x%X\n", lq_sta->dbg_fixed_rate); |
2656 | (il->hw_params.valid_tx_ant & ANT_A) ? "ANT_A," : "", | 2650 | desc += |
2657 | (il->hw_params.valid_tx_ant & ANT_B) ? "ANT_B," : "", | 2651 | sprintf(buff + desc, "valid_tx_ant %s%s%s\n", |
2658 | (il->hw_params.valid_tx_ant & ANT_C) ? "ANT_C" : ""); | 2652 | (il->hw_params.valid_tx_ant & ANT_A) ? "ANT_A," : "", |
2659 | desc += sprintf(buff+desc, "lq type %s\n", | 2653 | (il->hw_params.valid_tx_ant & ANT_B) ? "ANT_B," : "", |
2660 | (is_legacy(tbl->lq_type)) ? "legacy" : "HT"); | 2654 | (il->hw_params.valid_tx_ant & ANT_C) ? "ANT_C" : ""); |
2655 | desc += | ||
2656 | sprintf(buff + desc, "lq type %s\n", | ||
2657 | (is_legacy(tbl->lq_type)) ? "legacy" : "HT"); | ||
2661 | if (is_Ht(tbl->lq_type)) { | 2658 | if (is_Ht(tbl->lq_type)) { |
2662 | desc += sprintf(buff+desc, " %s", | 2659 | desc += |
2663 | (is_siso(tbl->lq_type)) ? "SISO" : "MIMO2"); | 2660 | sprintf(buff + desc, " %s", |
2664 | desc += sprintf(buff+desc, " %s", | 2661 | (is_siso(tbl->lq_type)) ? "SISO" : "MIMO2"); |
2665 | (tbl->is_ht40) ? "40MHz" : "20MHz"); | 2662 | desc += |
2666 | desc += sprintf(buff+desc, " %s %s %s\n", | 2663 | sprintf(buff + desc, " %s", |
2667 | (tbl->is_SGI) ? "SGI" : "", | 2664 | (tbl->is_ht40) ? "40MHz" : "20MHz"); |
2668 | (lq_sta->is_green) ? "GF enabled" : "", | 2665 | desc += |
2669 | (lq_sta->is_agg) ? "AGG on" : ""); | 2666 | sprintf(buff + desc, " %s %s %s\n", |
2667 | (tbl->is_SGI) ? "SGI" : "", | ||
2668 | (lq_sta->is_green) ? "GF enabled" : "", | ||
2669 | (lq_sta->is_agg) ? "AGG on" : ""); | ||
2670 | } | 2670 | } |
2671 | desc += sprintf(buff+desc, "last tx rate=0x%X\n", | 2671 | desc += |
2672 | lq_sta->last_rate_n_flags); | 2672 | sprintf(buff + desc, "last tx rate=0x%X\n", |
2673 | desc += sprintf(buff+desc, "general:" | 2673 | lq_sta->last_rate_n_flags); |
2674 | "flags=0x%X mimo-d=%d s-ant0x%x d-ant=0x%x\n", | 2674 | desc += |
2675 | lq_sta->lq.general_params.flags, | 2675 | sprintf(buff + desc, |
2676 | lq_sta->lq.general_params.mimo_delimiter, | 2676 | "general:" "flags=0x%X mimo-d=%d s-ant0x%x d-ant=0x%x\n", |
2677 | lq_sta->lq.general_params.single_stream_ant_msk, | 2677 | lq_sta->lq.general_params.flags, |
2678 | lq_sta->lq.general_params.dual_stream_ant_msk); | 2678 | lq_sta->lq.general_params.mimo_delimiter, |
2679 | 2679 | lq_sta->lq.general_params.single_stream_ant_msk, | |
2680 | desc += sprintf(buff+desc, "agg:" | 2680 | lq_sta->lq.general_params.dual_stream_ant_msk); |
2681 | "time_limit=%d dist_start_th=%d frame_cnt_limit=%d\n", | 2681 | |
2682 | le16_to_cpu(lq_sta->lq.agg_params.agg_time_limit), | 2682 | desc += |
2683 | lq_sta->lq.agg_params.agg_dis_start_th, | 2683 | sprintf(buff + desc, |
2684 | lq_sta->lq.agg_params.agg_frame_cnt_limit); | 2684 | "agg:" |
2685 | 2685 | "time_limit=%d dist_start_th=%d frame_cnt_limit=%d\n", | |
2686 | desc += sprintf(buff+desc, | 2686 | le16_to_cpu(lq_sta->lq.agg_params.agg_time_limit), |
2687 | "Start idx [0]=0x%x [1]=0x%x [2]=0x%x [3]=0x%x\n", | 2687 | lq_sta->lq.agg_params.agg_dis_start_th, |
2688 | lq_sta->lq.general_params.start_rate_idx[0], | 2688 | lq_sta->lq.agg_params.agg_frame_cnt_limit); |
2689 | lq_sta->lq.general_params.start_rate_idx[1], | 2689 | |
2690 | lq_sta->lq.general_params.start_rate_idx[2], | 2690 | desc += |
2691 | lq_sta->lq.general_params.start_rate_idx[3]); | 2691 | sprintf(buff + desc, |
2692 | "Start idx [0]=0x%x [1]=0x%x [2]=0x%x [3]=0x%x\n", | ||
2693 | lq_sta->lq.general_params.start_rate_idx[0], | ||
2694 | lq_sta->lq.general_params.start_rate_idx[1], | ||
2695 | lq_sta->lq.general_params.start_rate_idx[2], | ||
2696 | lq_sta->lq.general_params.start_rate_idx[3]); | ||
2692 | 2697 | ||
2693 | for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++) { | 2698 | for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++) { |
2694 | idx = il4965_hwrate_to_plcp_idx( | 2699 | idx = |
2695 | le32_to_cpu(lq_sta->lq.rs_table[i].rate_n_flags)); | 2700 | il4965_hwrate_to_plcp_idx(le32_to_cpu |
2701 | (lq_sta->lq.rs_table[i]. | ||
2702 | rate_n_flags)); | ||
2696 | if (is_legacy(tbl->lq_type)) { | 2703 | if (is_legacy(tbl->lq_type)) { |
2697 | desc += sprintf(buff+desc, " rate[%d] 0x%X %smbps\n", | 2704 | desc += |
2698 | i, | 2705 | sprintf(buff + desc, " rate[%d] 0x%X %smbps\n", i, |
2699 | le32_to_cpu(lq_sta->lq.rs_table[i].rate_n_flags), | 2706 | le32_to_cpu(lq_sta->lq.rs_table[i]. |
2700 | il_rate_mcs[idx].mbps); | 2707 | rate_n_flags), |
2708 | il_rate_mcs[idx].mbps); | ||
2701 | } else { | 2709 | } else { |
2702 | desc += sprintf(buff+desc, | 2710 | desc += |
2703 | " rate[%d] 0x%X %smbps (%s)\n", | 2711 | sprintf(buff + desc, " rate[%d] 0x%X %smbps (%s)\n", |
2704 | i, | 2712 | i, |
2705 | le32_to_cpu(lq_sta->lq.rs_table[i].rate_n_flags), | 2713 | le32_to_cpu(lq_sta->lq.rs_table[i]. |
2706 | il_rate_mcs[idx].mbps, il_rate_mcs[idx].mcs); | 2714 | rate_n_flags), |
2715 | il_rate_mcs[idx].mbps, | ||
2716 | il_rate_mcs[idx].mcs); | ||
2707 | } | 2717 | } |
2708 | } | 2718 | } |
2709 | 2719 | ||
@@ -2718,8 +2728,10 @@ static const struct file_operations rs_sta_dbgfs_scale_table_ops = { | |||
2718 | .open = il4965_open_file_generic, | 2728 | .open = il4965_open_file_generic, |
2719 | .llseek = default_llseek, | 2729 | .llseek = default_llseek, |
2720 | }; | 2730 | }; |
2721 | static ssize_t il4965_rs_sta_dbgfs_stats_table_read(struct file *file, | 2731 | |
2722 | char __user *user_buf, size_t count, loff_t *ppos) | 2732 | static ssize_t |
2733 | il4965_rs_sta_dbgfs_stats_table_read(struct file *file, char __user * user_buf, | ||
2734 | size_t count, loff_t * ppos) | ||
2723 | { | 2735 | { |
2724 | char *buff; | 2736 | char *buff; |
2725 | int desc = 0; | 2737 | int desc = 0; |
@@ -2733,22 +2745,22 @@ static ssize_t il4965_rs_sta_dbgfs_stats_table_read(struct file *file, | |||
2733 | return -ENOMEM; | 2745 | return -ENOMEM; |
2734 | 2746 | ||
2735 | for (i = 0; i < LQ_SIZE; i++) { | 2747 | for (i = 0; i < LQ_SIZE; i++) { |
2736 | desc += sprintf(buff+desc, | 2748 | desc += |
2737 | "%s type=%d SGI=%d HT40=%d DUP=%d GF=%d\n" | 2749 | sprintf(buff + desc, |
2738 | "rate=0x%X\n", | 2750 | "%s type=%d SGI=%d HT40=%d DUP=%d GF=%d\n" |
2739 | lq_sta->active_tbl == i ? "*" : "x", | 2751 | "rate=0x%X\n", lq_sta->active_tbl == i ? "*" : "x", |
2740 | lq_sta->lq_info[i].lq_type, | 2752 | lq_sta->lq_info[i].lq_type, |
2741 | lq_sta->lq_info[i].is_SGI, | 2753 | lq_sta->lq_info[i].is_SGI, |
2742 | lq_sta->lq_info[i].is_ht40, | 2754 | lq_sta->lq_info[i].is_ht40, |
2743 | lq_sta->lq_info[i].is_dup, | 2755 | lq_sta->lq_info[i].is_dup, lq_sta->is_green, |
2744 | lq_sta->is_green, | 2756 | lq_sta->lq_info[i].current_rate); |
2745 | lq_sta->lq_info[i].current_rate); | ||
2746 | for (j = 0; j < RATE_COUNT; j++) { | 2757 | for (j = 0; j < RATE_COUNT; j++) { |
2747 | desc += sprintf(buff+desc, | 2758 | desc += |
2748 | "counter=%d success=%d %%=%d\n", | 2759 | sprintf(buff + desc, |
2749 | lq_sta->lq_info[i].win[j].counter, | 2760 | "counter=%d success=%d %%=%d\n", |
2750 | lq_sta->lq_info[i].win[j].success_counter, | 2761 | lq_sta->lq_info[i].win[j].counter, |
2751 | lq_sta->lq_info[i].win[j].success_ratio); | 2762 | lq_sta->lq_info[i].win[j].success_counter, |
2763 | lq_sta->lq_info[i].win[j].success_ratio); | ||
2752 | } | 2764 | } |
2753 | } | 2765 | } |
2754 | ret = simple_read_from_buffer(user_buf, count, ppos, buff, desc); | 2766 | ret = simple_read_from_buffer(user_buf, count, ppos, buff, desc); |
@@ -2762,8 +2774,10 @@ static const struct file_operations rs_sta_dbgfs_stats_table_ops = { | |||
2762 | .llseek = default_llseek, | 2774 | .llseek = default_llseek, |
2763 | }; | 2775 | }; |
2764 | 2776 | ||
2765 | static ssize_t il4965_rs_sta_dbgfs_rate_scale_data_read(struct file *file, | 2777 | static ssize_t |
2766 | char __user *user_buf, size_t count, loff_t *ppos) | 2778 | il4965_rs_sta_dbgfs_rate_scale_data_read(struct file *file, |
2779 | char __user * user_buf, size_t count, | ||
2780 | loff_t * ppos) | ||
2767 | { | 2781 | { |
2768 | char buff[120]; | 2782 | char buff[120]; |
2769 | int desc = 0; | 2783 | int desc = 0; |
@@ -2776,13 +2790,13 @@ static ssize_t il4965_rs_sta_dbgfs_rate_scale_data_read(struct file *file, | |||
2776 | il = lq_sta->drv; | 2790 | il = lq_sta->drv; |
2777 | 2791 | ||
2778 | if (is_Ht(tbl->lq_type)) | 2792 | if (is_Ht(tbl->lq_type)) |
2779 | desc += sprintf(buff+desc, | 2793 | desc += |
2780 | "Bit Rate= %d Mb/s\n", | 2794 | sprintf(buff + desc, "Bit Rate= %d Mb/s\n", |
2781 | tbl->expected_tpt[lq_sta->last_txrate_idx]); | 2795 | tbl->expected_tpt[lq_sta->last_txrate_idx]); |
2782 | else | 2796 | else |
2783 | desc += sprintf(buff+desc, | 2797 | desc += |
2784 | "Bit Rate= %d Mb/s\n", | 2798 | sprintf(buff + desc, "Bit Rate= %d Mb/s\n", |
2785 | il_rates[lq_sta->last_txrate_idx].ieee >> 1); | 2799 | il_rates[lq_sta->last_txrate_idx].ieee >> 1); |
2786 | 2800 | ||
2787 | ret = simple_read_from_buffer(user_buf, count, ppos, buff, desc); | 2801 | ret = simple_read_from_buffer(user_buf, count, ppos, buff, desc); |
2788 | return ret; | 2802 | return ret; |
@@ -2794,26 +2808,27 @@ static const struct file_operations rs_sta_dbgfs_rate_scale_data_ops = { | |||
2794 | .llseek = default_llseek, | 2808 | .llseek = default_llseek, |
2795 | }; | 2809 | }; |
2796 | 2810 | ||
2797 | static void il4965_rs_add_debugfs(void *il, void *il_sta, | 2811 | static void |
2798 | struct dentry *dir) | 2812 | il4965_rs_add_debugfs(void *il, void *il_sta, struct dentry *dir) |
2799 | { | 2813 | { |
2800 | struct il_lq_sta *lq_sta = il_sta; | 2814 | struct il_lq_sta *lq_sta = il_sta; |
2801 | lq_sta->rs_sta_dbgfs_scale_table_file = | 2815 | lq_sta->rs_sta_dbgfs_scale_table_file = |
2802 | debugfs_create_file("rate_scale_table", S_IRUSR | S_IWUSR, dir, | 2816 | debugfs_create_file("rate_scale_table", S_IRUSR | S_IWUSR, dir, |
2803 | lq_sta, &rs_sta_dbgfs_scale_table_ops); | 2817 | lq_sta, &rs_sta_dbgfs_scale_table_ops); |
2804 | lq_sta->rs_sta_dbgfs_stats_table_file = | 2818 | lq_sta->rs_sta_dbgfs_stats_table_file = |
2805 | debugfs_create_file("rate_stats_table", S_IRUSR, dir, | 2819 | debugfs_create_file("rate_stats_table", S_IRUSR, dir, lq_sta, |
2806 | lq_sta, &rs_sta_dbgfs_stats_table_ops); | 2820 | &rs_sta_dbgfs_stats_table_ops); |
2807 | lq_sta->rs_sta_dbgfs_rate_scale_data_file = | 2821 | lq_sta->rs_sta_dbgfs_rate_scale_data_file = |
2808 | debugfs_create_file("rate_scale_data", S_IRUSR, dir, | 2822 | debugfs_create_file("rate_scale_data", S_IRUSR, dir, lq_sta, |
2809 | lq_sta, &rs_sta_dbgfs_rate_scale_data_ops); | 2823 | &rs_sta_dbgfs_rate_scale_data_ops); |
2810 | lq_sta->rs_sta_dbgfs_tx_agg_tid_en_file = | 2824 | lq_sta->rs_sta_dbgfs_tx_agg_tid_en_file = |
2811 | debugfs_create_u8("tx_agg_tid_enable", S_IRUSR | S_IWUSR, dir, | 2825 | debugfs_create_u8("tx_agg_tid_enable", S_IRUSR | S_IWUSR, dir, |
2812 | &lq_sta->tx_agg_tid_en); | 2826 | &lq_sta->tx_agg_tid_en); |
2813 | 2827 | ||
2814 | } | 2828 | } |
2815 | 2829 | ||
2816 | static void il4965_rs_remove_debugfs(void *il, void *il_sta) | 2830 | static void |
2831 | il4965_rs_remove_debugfs(void *il, void *il_sta) | ||
2817 | { | 2832 | { |
2818 | struct il_lq_sta *lq_sta = il_sta; | 2833 | struct il_lq_sta *lq_sta = il_sta; |
2819 | debugfs_remove(lq_sta->rs_sta_dbgfs_scale_table_file); | 2834 | debugfs_remove(lq_sta->rs_sta_dbgfs_scale_table_file); |
@@ -2833,6 +2848,7 @@ il4965_rs_rate_init_stub(void *il_r, struct ieee80211_supported_band *sband, | |||
2833 | struct ieee80211_sta *sta, void *il_sta) | 2848 | struct ieee80211_sta *sta, void *il_sta) |
2834 | { | 2849 | { |
2835 | } | 2850 | } |
2851 | |||
2836 | static struct rate_control_ops rs_4965_ops = { | 2852 | static struct rate_control_ops rs_4965_ops = { |
2837 | .module = NULL, | 2853 | .module = NULL, |
2838 | .name = IL4965_RS_NAME, | 2854 | .name = IL4965_RS_NAME, |
@@ -2849,12 +2865,14 @@ static struct rate_control_ops rs_4965_ops = { | |||
2849 | #endif | 2865 | #endif |
2850 | }; | 2866 | }; |
2851 | 2867 | ||
2852 | int il4965_rate_control_register(void) | 2868 | int |
2869 | il4965_rate_control_register(void) | ||
2853 | { | 2870 | { |
2854 | return ieee80211_rate_control_register(&rs_4965_ops); | 2871 | return ieee80211_rate_control_register(&rs_4965_ops); |
2855 | } | 2872 | } |
2856 | 2873 | ||
2857 | void il4965_rate_control_unregister(void) | 2874 | void |
2875 | il4965_rate_control_unregister(void) | ||
2858 | { | 2876 | { |
2859 | ieee80211_rate_control_unregister(&rs_4965_ops); | 2877 | ieee80211_rate_control_unregister(&rs_4965_ops); |
2860 | } | 2878 | } |
diff --git a/drivers/net/wireless/iwlegacy/4965.c b/drivers/net/wireless/iwlegacy/4965.c index cbbb2c03f51b..be054f1452b8 100644 --- a/drivers/net/wireless/iwlegacy/4965.c +++ b/drivers/net/wireless/iwlegacy/4965.c | |||
@@ -48,7 +48,7 @@ | |||
48 | * it's a pretty good bet that everything between them is good, too. | 48 | * it's a pretty good bet that everything between them is good, too. |
49 | */ | 49 | */ |
50 | static int | 50 | static int |
51 | il4965_verify_inst_sparse(struct il_priv *il, __le32 *image, u32 len) | 51 | il4965_verify_inst_sparse(struct il_priv *il, __le32 * image, u32 len) |
52 | { | 52 | { |
53 | u32 val; | 53 | u32 val; |
54 | int ret = 0; | 54 | int ret = 0; |
@@ -57,12 +57,11 @@ il4965_verify_inst_sparse(struct il_priv *il, __le32 *image, u32 len) | |||
57 | 57 | ||
58 | D_INFO("ucode inst image size is %u\n", len); | 58 | D_INFO("ucode inst image size is %u\n", len); |
59 | 59 | ||
60 | for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) { | 60 | for (i = 0; i < len; i += 100, image += 100 / sizeof(u32)) { |
61 | /* read data comes through single port, auto-incr addr */ | 61 | /* read data comes through single port, auto-incr addr */ |
62 | /* NOTE: Use the debugless read so we don't flood kernel log | 62 | /* NOTE: Use the debugless read so we don't flood kernel log |
63 | * if IL_DL_IO is set */ | 63 | * if IL_DL_IO is set */ |
64 | il_wr(il, HBUS_TARG_MEM_RADDR, | 64 | il_wr(il, HBUS_TARG_MEM_RADDR, i + IL4965_RTC_INST_LOWER_BOUND); |
65 | i + IL4965_RTC_INST_LOWER_BOUND); | ||
66 | val = _il_rd(il, HBUS_TARG_MEM_RDAT); | 65 | val = _il_rd(il, HBUS_TARG_MEM_RDAT); |
67 | if (val != le32_to_cpu(*image)) { | 66 | if (val != le32_to_cpu(*image)) { |
68 | ret = -EIO; | 67 | ret = -EIO; |
@@ -79,8 +78,8 @@ il4965_verify_inst_sparse(struct il_priv *il, __le32 *image, u32 len) | |||
79 | * il4965_verify_inst_full - verify runtime uCode image in card vs. host, | 78 | * il4965_verify_inst_full - verify runtime uCode image in card vs. host, |
80 | * looking at all data. | 79 | * looking at all data. |
81 | */ | 80 | */ |
82 | static int il4965_verify_inst_full(struct il_priv *il, __le32 *image, | 81 | static int |
83 | u32 len) | 82 | il4965_verify_inst_full(struct il_priv *il, __le32 * image, u32 len) |
84 | { | 83 | { |
85 | u32 val; | 84 | u32 val; |
86 | u32 save_len = len; | 85 | u32 save_len = len; |
@@ -89,8 +88,7 @@ static int il4965_verify_inst_full(struct il_priv *il, __le32 *image, | |||
89 | 88 | ||
90 | D_INFO("ucode inst image size is %u\n", len); | 89 | D_INFO("ucode inst image size is %u\n", len); |
91 | 90 | ||
92 | il_wr(il, HBUS_TARG_MEM_RADDR, | 91 | il_wr(il, HBUS_TARG_MEM_RADDR, IL4965_RTC_INST_LOWER_BOUND); |
93 | IL4965_RTC_INST_LOWER_BOUND); | ||
94 | 92 | ||
95 | errcnt = 0; | 93 | errcnt = 0; |
96 | for (; len > 0; len -= sizeof(u32), image++) { | 94 | for (; len > 0; len -= sizeof(u32), image++) { |
@@ -100,8 +98,8 @@ static int il4965_verify_inst_full(struct il_priv *il, __le32 *image, | |||
100 | val = _il_rd(il, HBUS_TARG_MEM_RDAT); | 98 | val = _il_rd(il, HBUS_TARG_MEM_RDAT); |
101 | if (val != le32_to_cpu(*image)) { | 99 | if (val != le32_to_cpu(*image)) { |
102 | IL_ERR("uCode INST section is invalid at " | 100 | IL_ERR("uCode INST section is invalid at " |
103 | "offset 0x%x, is 0x%x, s/b 0x%x\n", | 101 | "offset 0x%x, is 0x%x, s/b 0x%x\n", |
104 | save_len - len, val, le32_to_cpu(*image)); | 102 | save_len - len, val, le32_to_cpu(*image)); |
105 | ret = -EIO; | 103 | ret = -EIO; |
106 | errcnt++; | 104 | errcnt++; |
107 | if (errcnt >= 20) | 105 | if (errcnt >= 20) |
@@ -110,8 +108,7 @@ static int il4965_verify_inst_full(struct il_priv *il, __le32 *image, | |||
110 | } | 108 | } |
111 | 109 | ||
112 | if (!errcnt) | 110 | if (!errcnt) |
113 | D_INFO( | 111 | D_INFO("ucode image in INSTRUCTION memory is good\n"); |
114 | "ucode image in INSTRUCTION memory is good\n"); | ||
115 | 112 | ||
116 | return ret; | 113 | return ret; |
117 | } | 114 | } |
@@ -120,14 +117,15 @@ static int il4965_verify_inst_full(struct il_priv *il, __le32 *image, | |||
120 | * il4965_verify_ucode - determine which instruction image is in SRAM, | 117 | * il4965_verify_ucode - determine which instruction image is in SRAM, |
121 | * and verify its contents | 118 | * and verify its contents |
122 | */ | 119 | */ |
123 | int il4965_verify_ucode(struct il_priv *il) | 120 | int |
121 | il4965_verify_ucode(struct il_priv *il) | ||
124 | { | 122 | { |
125 | __le32 *image; | 123 | __le32 *image; |
126 | u32 len; | 124 | u32 len; |
127 | int ret; | 125 | int ret; |
128 | 126 | ||
129 | /* Try bootstrap */ | 127 | /* Try bootstrap */ |
130 | image = (__le32 *)il->ucode_boot.v_addr; | 128 | image = (__le32 *) il->ucode_boot.v_addr; |
131 | len = il->ucode_boot.len; | 129 | len = il->ucode_boot.len; |
132 | ret = il4965_verify_inst_sparse(il, image, len); | 130 | ret = il4965_verify_inst_sparse(il, image, len); |
133 | if (!ret) { | 131 | if (!ret) { |
@@ -136,7 +134,7 @@ int il4965_verify_ucode(struct il_priv *il) | |||
136 | } | 134 | } |
137 | 135 | ||
138 | /* Try initialize */ | 136 | /* Try initialize */ |
139 | image = (__le32 *)il->ucode_init.v_addr; | 137 | image = (__le32 *) il->ucode_init.v_addr; |
140 | len = il->ucode_init.len; | 138 | len = il->ucode_init.len; |
141 | ret = il4965_verify_inst_sparse(il, image, len); | 139 | ret = il4965_verify_inst_sparse(il, image, len); |
142 | if (!ret) { | 140 | if (!ret) { |
@@ -145,7 +143,7 @@ int il4965_verify_ucode(struct il_priv *il) | |||
145 | } | 143 | } |
146 | 144 | ||
147 | /* Try runtime/protocol */ | 145 | /* Try runtime/protocol */ |
148 | image = (__le32 *)il->ucode_code.v_addr; | 146 | image = (__le32 *) il->ucode_code.v_addr; |
149 | len = il->ucode_code.len; | 147 | len = il->ucode_code.len; |
150 | ret = il4965_verify_inst_sparse(il, image, len); | 148 | ret = il4965_verify_inst_sparse(il, image, len); |
151 | if (!ret) { | 149 | if (!ret) { |
@@ -158,7 +156,7 @@ int il4965_verify_ucode(struct il_priv *il) | |||
158 | /* Since nothing seems to match, show first several data entries in | 156 | /* Since nothing seems to match, show first several data entries in |
159 | * instruction SRAM, so maybe visual inspection will give a clue. | 157 | * instruction SRAM, so maybe visual inspection will give a clue. |
160 | * Selection of bootstrap image (vs. other images) is arbitrary. */ | 158 | * Selection of bootstrap image (vs. other images) is arbitrary. */ |
161 | image = (__le32 *)il->ucode_boot.v_addr; | 159 | image = (__le32 *) il->ucode_boot.v_addr; |
162 | len = il->ucode_boot.len; | 160 | len = il->ucode_boot.len; |
163 | ret = il4965_verify_inst_full(il, image, len); | 161 | ret = il4965_verify_inst_full(il, image, len); |
164 | 162 | ||
@@ -177,7 +175,8 @@ int il4965_verify_ucode(struct il_priv *il) | |||
177 | * EEPROM chip, not a single event, so even reads could conflict if they | 175 | * EEPROM chip, not a single event, so even reads could conflict if they |
178 | * weren't arbitrated by the semaphore. | 176 | * weren't arbitrated by the semaphore. |
179 | */ | 177 | */ |
180 | int il4965_eeprom_acquire_semaphore(struct il_priv *il) | 178 | int |
179 | il4965_eeprom_acquire_semaphore(struct il_priv *il) | ||
181 | { | 180 | { |
182 | u16 count; | 181 | u16 count; |
183 | int ret; | 182 | int ret; |
@@ -185,13 +184,14 @@ int il4965_eeprom_acquire_semaphore(struct il_priv *il) | |||
185 | for (count = 0; count < EEPROM_SEM_RETRY_LIMIT; count++) { | 184 | for (count = 0; count < EEPROM_SEM_RETRY_LIMIT; count++) { |
186 | /* Request semaphore */ | 185 | /* Request semaphore */ |
187 | il_set_bit(il, CSR_HW_IF_CONFIG_REG, | 186 | il_set_bit(il, CSR_HW_IF_CONFIG_REG, |
188 | CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM); | 187 | CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM); |
189 | 188 | ||
190 | /* See if we got it */ | 189 | /* See if we got it */ |
191 | ret = _il_poll_bit(il, CSR_HW_IF_CONFIG_REG, | 190 | ret = |
192 | CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM, | 191 | _il_poll_bit(il, CSR_HW_IF_CONFIG_REG, |
193 | CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM, | 192 | CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM, |
194 | EEPROM_SEM_TIMEOUT); | 193 | CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM, |
194 | EEPROM_SEM_TIMEOUT); | ||
195 | if (ret >= 0) | 195 | if (ret >= 0) |
196 | return ret; | 196 | return ret; |
197 | } | 197 | } |
@@ -199,43 +199,43 @@ int il4965_eeprom_acquire_semaphore(struct il_priv *il) | |||
199 | return ret; | 199 | return ret; |
200 | } | 200 | } |
201 | 201 | ||
202 | void il4965_eeprom_release_semaphore(struct il_priv *il) | 202 | void |
203 | il4965_eeprom_release_semaphore(struct il_priv *il) | ||
203 | { | 204 | { |
204 | il_clear_bit(il, CSR_HW_IF_CONFIG_REG, | 205 | il_clear_bit(il, CSR_HW_IF_CONFIG_REG, |
205 | CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM); | 206 | CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM); |
206 | 207 | ||
207 | } | 208 | } |
208 | 209 | ||
209 | int il4965_eeprom_check_version(struct il_priv *il) | 210 | int |
211 | il4965_eeprom_check_version(struct il_priv *il) | ||
210 | { | 212 | { |
211 | u16 eeprom_ver; | 213 | u16 eeprom_ver; |
212 | u16 calib_ver; | 214 | u16 calib_ver; |
213 | 215 | ||
214 | eeprom_ver = il_eeprom_query16(il, EEPROM_VERSION); | 216 | eeprom_ver = il_eeprom_query16(il, EEPROM_VERSION); |
215 | calib_ver = il_eeprom_query16(il, | 217 | calib_ver = il_eeprom_query16(il, EEPROM_4965_CALIB_VERSION_OFFSET); |
216 | EEPROM_4965_CALIB_VERSION_OFFSET); | ||
217 | 218 | ||
218 | if (eeprom_ver < il->cfg->eeprom_ver || | 219 | if (eeprom_ver < il->cfg->eeprom_ver || |
219 | calib_ver < il->cfg->eeprom_calib_ver) | 220 | calib_ver < il->cfg->eeprom_calib_ver) |
220 | goto err; | 221 | goto err; |
221 | 222 | ||
222 | IL_INFO("device EEPROM VER=0x%x, CALIB=0x%x\n", | 223 | IL_INFO("device EEPROM VER=0x%x, CALIB=0x%x\n", eeprom_ver, calib_ver); |
223 | eeprom_ver, calib_ver); | ||
224 | 224 | ||
225 | return 0; | 225 | return 0; |
226 | err: | 226 | err: |
227 | IL_ERR("Unsupported (too old) EEPROM VER=0x%x < 0x%x " | 227 | IL_ERR("Unsupported (too old) EEPROM VER=0x%x < 0x%x " |
228 | "CALIB=0x%x < 0x%x\n", | 228 | "CALIB=0x%x < 0x%x\n", eeprom_ver, il->cfg->eeprom_ver, |
229 | eeprom_ver, il->cfg->eeprom_ver, | 229 | calib_ver, il->cfg->eeprom_calib_ver); |
230 | calib_ver, il->cfg->eeprom_calib_ver); | ||
231 | return -EINVAL; | 230 | return -EINVAL; |
232 | 231 | ||
233 | } | 232 | } |
234 | 233 | ||
235 | void il4965_eeprom_get_mac(const struct il_priv *il, u8 *mac) | 234 | void |
235 | il4965_eeprom_get_mac(const struct il_priv *il, u8 * mac) | ||
236 | { | 236 | { |
237 | const u8 *addr = il_eeprom_query_addr(il, | 237 | const u8 *addr = il_eeprom_query_addr(il, |
238 | EEPROM_MAC_ADDRESS); | 238 | EEPROM_MAC_ADDRESS); |
239 | memcpy(mac, addr, ETH_ALEN); | 239 | memcpy(mac, addr, ETH_ALEN); |
240 | } | 240 | } |
241 | 241 | ||
@@ -260,7 +260,8 @@ il4965_send_led_cmd(struct il_priv *il, struct il_led_cmd *led_cmd) | |||
260 | } | 260 | } |
261 | 261 | ||
262 | /* Set led register off */ | 262 | /* Set led register off */ |
263 | void il4965_led_enable(struct il_priv *il) | 263 | void |
264 | il4965_led_enable(struct il_priv *il) | ||
264 | { | 265 | { |
265 | _il_wr(il, CSR_LED_REG, CSR_LED_REG_TRUN_ON); | 266 | _il_wr(il, CSR_LED_REG, CSR_LED_REG_TRUN_ON); |
266 | } | 267 | } |
@@ -283,7 +284,8 @@ static int il4965_hw_get_temperature(struct il_priv *il); | |||
283 | #define IL4965_MODULE_FIRMWARE(api) _IL4965_MODULE_FIRMWARE(api) | 284 | #define IL4965_MODULE_FIRMWARE(api) _IL4965_MODULE_FIRMWARE(api) |
284 | 285 | ||
285 | /* check contents of special bootstrap uCode SRAM */ | 286 | /* check contents of special bootstrap uCode SRAM */ |
286 | static int il4965_verify_bsm(struct il_priv *il) | 287 | static int |
288 | il4965_verify_bsm(struct il_priv *il) | ||
287 | { | 289 | { |
288 | __le32 *image = il->ucode_boot.v_addr; | 290 | __le32 *image = il->ucode_boot.v_addr; |
289 | u32 len = il->ucode_boot.len; | 291 | u32 len = il->ucode_boot.len; |
@@ -294,16 +296,14 @@ static int il4965_verify_bsm(struct il_priv *il) | |||
294 | 296 | ||
295 | /* verify BSM SRAM contents */ | 297 | /* verify BSM SRAM contents */ |
296 | val = il_rd_prph(il, BSM_WR_DWCOUNT_REG); | 298 | val = il_rd_prph(il, BSM_WR_DWCOUNT_REG); |
297 | for (reg = BSM_SRAM_LOWER_BOUND; | 299 | for (reg = BSM_SRAM_LOWER_BOUND; reg < BSM_SRAM_LOWER_BOUND + len; |
298 | reg < BSM_SRAM_LOWER_BOUND + len; | ||
299 | reg += sizeof(u32), image++) { | 300 | reg += sizeof(u32), image++) { |
300 | val = il_rd_prph(il, reg); | 301 | val = il_rd_prph(il, reg); |
301 | if (val != le32_to_cpu(*image)) { | 302 | if (val != le32_to_cpu(*image)) { |
302 | IL_ERR("BSM uCode verification failed at " | 303 | IL_ERR("BSM uCode verification failed at " |
303 | "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n", | 304 | "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n", |
304 | BSM_SRAM_LOWER_BOUND, | 305 | BSM_SRAM_LOWER_BOUND, reg - BSM_SRAM_LOWER_BOUND, |
305 | reg - BSM_SRAM_LOWER_BOUND, len, | 306 | len, val, le32_to_cpu(*image)); |
306 | val, le32_to_cpu(*image)); | ||
307 | return -EIO; | 307 | return -EIO; |
308 | } | 308 | } |
309 | } | 309 | } |
@@ -345,7 +345,8 @@ static int il4965_verify_bsm(struct il_priv *il) | |||
345 | * the runtime uCode instructions and the backup data cache into SRAM, | 345 | * the runtime uCode instructions and the backup data cache into SRAM, |
346 | * and re-launches the runtime uCode from where it left off. | 346 | * and re-launches the runtime uCode from where it left off. |
347 | */ | 347 | */ |
348 | static int il4965_load_bsm(struct il_priv *il) | 348 | static int |
349 | il4965_load_bsm(struct il_priv *il) | ||
349 | { | 350 | { |
350 | __le32 *image = il->ucode_boot.v_addr; | 351 | __le32 *image = il->ucode_boot.v_addr; |
351 | u32 len = il->ucode_boot.len; | 352 | u32 len = il->ucode_boot.len; |
@@ -394,8 +395,7 @@ static int il4965_load_bsm(struct il_priv *il) | |||
394 | 395 | ||
395 | /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */ | 396 | /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */ |
396 | il_wr_prph(il, BSM_WR_MEM_SRC_REG, 0x0); | 397 | il_wr_prph(il, BSM_WR_MEM_SRC_REG, 0x0); |
397 | il_wr_prph(il, | 398 | il_wr_prph(il, BSM_WR_MEM_DST_REG, IL49_RTC_INST_LOWER_BOUND); |
398 | BSM_WR_MEM_DST_REG, IL49_RTC_INST_LOWER_BOUND); | ||
399 | il_wr_prph(il, BSM_WR_DWCOUNT_REG, len / sizeof(u32)); | 399 | il_wr_prph(il, BSM_WR_DWCOUNT_REG, len / sizeof(u32)); |
400 | 400 | ||
401 | /* Load bootstrap code into instruction SRAM now, | 401 | /* Load bootstrap code into instruction SRAM now, |
@@ -418,9 +418,7 @@ static int il4965_load_bsm(struct il_priv *il) | |||
418 | 418 | ||
419 | /* Enable future boot loads whenever power management unit triggers it | 419 | /* Enable future boot loads whenever power management unit triggers it |
420 | * (e.g. when powering back up after power-save shutdown) */ | 420 | * (e.g. when powering back up after power-save shutdown) */ |
421 | il_wr_prph(il, | 421 | il_wr_prph(il, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN); |
422 | BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN); | ||
423 | |||
424 | 422 | ||
425 | return 0; | 423 | return 0; |
426 | } | 424 | } |
@@ -434,7 +432,8 @@ static int il4965_load_bsm(struct il_priv *il) | |||
434 | * We need to replace them to load runtime uCode inst and data, | 432 | * We need to replace them to load runtime uCode inst and data, |
435 | * and to save runtime data when powering down. | 433 | * and to save runtime data when powering down. |
436 | */ | 434 | */ |
437 | static int il4965_set_ucode_ptrs(struct il_priv *il) | 435 | static int |
436 | il4965_set_ucode_ptrs(struct il_priv *il) | ||
438 | { | 437 | { |
439 | dma_addr_t pinst; | 438 | dma_addr_t pinst; |
440 | dma_addr_t pdata; | 439 | dma_addr_t pdata; |
@@ -447,13 +446,12 @@ static int il4965_set_ucode_ptrs(struct il_priv *il) | |||
447 | /* Tell bootstrap uCode where to find image to load */ | 446 | /* Tell bootstrap uCode where to find image to load */ |
448 | il_wr_prph(il, BSM_DRAM_INST_PTR_REG, pinst); | 447 | il_wr_prph(il, BSM_DRAM_INST_PTR_REG, pinst); |
449 | il_wr_prph(il, BSM_DRAM_DATA_PTR_REG, pdata); | 448 | il_wr_prph(il, BSM_DRAM_DATA_PTR_REG, pdata); |
450 | il_wr_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG, | 449 | il_wr_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG, il->ucode_data.len); |
451 | il->ucode_data.len); | ||
452 | 450 | ||
453 | /* Inst byte count must be last to set up, bit 31 signals uCode | 451 | /* Inst byte count must be last to set up, bit 31 signals uCode |
454 | * that all new ptr/size info is in place */ | 452 | * that all new ptr/size info is in place */ |
455 | il_wr_prph(il, BSM_DRAM_INST_BYTECOUNT_REG, | 453 | il_wr_prph(il, BSM_DRAM_INST_BYTECOUNT_REG, |
456 | il->ucode_code.len | BSM_DRAM_INST_LOAD); | 454 | il->ucode_code.len | BSM_DRAM_INST_LOAD); |
457 | D_INFO("Runtime uCode pointers are set.\n"); | 455 | D_INFO("Runtime uCode pointers are set.\n"); |
458 | 456 | ||
459 | return ret; | 457 | return ret; |
@@ -470,7 +468,8 @@ static int il4965_set_ucode_ptrs(struct il_priv *il) | |||
470 | * | 468 | * |
471 | * Tell "initialize" uCode to go ahead and load the runtime uCode. | 469 | * Tell "initialize" uCode to go ahead and load the runtime uCode. |
472 | */ | 470 | */ |
473 | static void il4965_init_alive_start(struct il_priv *il) | 471 | static void |
472 | il4965_init_alive_start(struct il_priv *il) | ||
474 | { | 473 | { |
475 | /* Bootstrap uCode has loaded initialize uCode ... verify inst image. | 474 | /* Bootstrap uCode has loaded initialize uCode ... verify inst image. |
476 | * This is a paranoid check, because we would not have gotten the | 475 | * This is a paranoid check, because we would not have gotten the |
@@ -501,15 +500,18 @@ restart: | |||
501 | queue_work(il->workqueue, &il->restart); | 500 | queue_work(il->workqueue, &il->restart); |
502 | } | 501 | } |
503 | 502 | ||
504 | static bool iw4965_is_ht40_channel(__le32 rxon_flags) | 503 | static bool |
504 | iw4965_is_ht40_channel(__le32 rxon_flags) | ||
505 | { | 505 | { |
506 | int chan_mod = le32_to_cpu(rxon_flags & RXON_FLG_CHANNEL_MODE_MSK) | 506 | int chan_mod = |
507 | >> RXON_FLG_CHANNEL_MODE_POS; | 507 | le32_to_cpu(rxon_flags & RXON_FLG_CHANNEL_MODE_MSK) >> |
508 | RXON_FLG_CHANNEL_MODE_POS; | ||
508 | return (chan_mod == CHANNEL_MODE_PURE_40 || | 509 | return (chan_mod == CHANNEL_MODE_PURE_40 || |
509 | chan_mod == CHANNEL_MODE_MIXED); | 510 | chan_mod == CHANNEL_MODE_MIXED); |
510 | } | 511 | } |
511 | 512 | ||
512 | static void il4965_nic_config(struct il_priv *il) | 513 | static void |
514 | il4965_nic_config(struct il_priv *il) | ||
513 | { | 515 | { |
514 | unsigned long flags; | 516 | unsigned long flags; |
515 | u16 radio_cfg; | 517 | u16 radio_cfg; |
@@ -521,18 +523,18 @@ static void il4965_nic_config(struct il_priv *il) | |||
521 | /* write radio config values to register */ | 523 | /* write radio config values to register */ |
522 | if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) == EEPROM_4965_RF_CFG_TYPE_MAX) | 524 | if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) == EEPROM_4965_RF_CFG_TYPE_MAX) |
523 | il_set_bit(il, CSR_HW_IF_CONFIG_REG, | 525 | il_set_bit(il, CSR_HW_IF_CONFIG_REG, |
524 | EEPROM_RF_CFG_TYPE_MSK(radio_cfg) | | 526 | EEPROM_RF_CFG_TYPE_MSK(radio_cfg) | |
525 | EEPROM_RF_CFG_STEP_MSK(radio_cfg) | | 527 | EEPROM_RF_CFG_STEP_MSK(radio_cfg) | |
526 | EEPROM_RF_CFG_DASH_MSK(radio_cfg)); | 528 | EEPROM_RF_CFG_DASH_MSK(radio_cfg)); |
527 | 529 | ||
528 | /* set CSR_HW_CONFIG_REG for uCode use */ | 530 | /* set CSR_HW_CONFIG_REG for uCode use */ |
529 | il_set_bit(il, CSR_HW_IF_CONFIG_REG, | 531 | il_set_bit(il, CSR_HW_IF_CONFIG_REG, |
530 | CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI | | 532 | CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI | |
531 | CSR_HW_IF_CONFIG_REG_BIT_MAC_SI); | 533 | CSR_HW_IF_CONFIG_REG_BIT_MAC_SI); |
532 | 534 | ||
533 | il->calib_info = (struct il_eeprom_calib_info *) | 535 | il->calib_info = |
534 | il_eeprom_query_addr(il, | 536 | (struct il_eeprom_calib_info *)il_eeprom_query_addr(il, |
535 | EEPROM_4965_CALIB_TXPOWER_OFFSET); | 537 | EEPROM_4965_CALIB_TXPOWER_OFFSET); |
536 | 538 | ||
537 | spin_unlock_irqrestore(&il->lock, flags); | 539 | spin_unlock_irqrestore(&il->lock, flags); |
538 | } | 540 | } |
@@ -540,12 +542,12 @@ static void il4965_nic_config(struct il_priv *il) | |||
540 | /* Reset differential Rx gains in NIC to prepare for chain noise calibration. | 542 | /* Reset differential Rx gains in NIC to prepare for chain noise calibration. |
541 | * Called after every association, but this runs only once! | 543 | * Called after every association, but this runs only once! |
542 | * ... once chain noise is calibrated the first time, it's good forever. */ | 544 | * ... once chain noise is calibrated the first time, it's good forever. */ |
543 | static void il4965_chain_noise_reset(struct il_priv *il) | 545 | static void |
546 | il4965_chain_noise_reset(struct il_priv *il) | ||
544 | { | 547 | { |
545 | struct il_chain_noise_data *data = &(il->chain_noise_data); | 548 | struct il_chain_noise_data *data = &(il->chain_noise_data); |
546 | 549 | ||
547 | if (data->state == IL_CHAIN_NOISE_ALIVE && | 550 | if (data->state == IL_CHAIN_NOISE_ALIVE && il_is_any_associated(il)) { |
548 | il_is_any_associated(il)) { | ||
549 | struct il_calib_diff_gain_cmd cmd; | 551 | struct il_calib_diff_gain_cmd cmd; |
550 | 552 | ||
551 | /* clear data for chain noise calibration algorithm */ | 553 | /* clear data for chain noise calibration algorithm */ |
@@ -562,10 +564,8 @@ static void il4965_chain_noise_reset(struct il_priv *il) | |||
562 | cmd.diff_gain_a = 0; | 564 | cmd.diff_gain_a = 0; |
563 | cmd.diff_gain_b = 0; | 565 | cmd.diff_gain_b = 0; |
564 | cmd.diff_gain_c = 0; | 566 | cmd.diff_gain_c = 0; |
565 | if (il_send_cmd_pdu(il, C_PHY_CALIBRATION, | 567 | if (il_send_cmd_pdu(il, C_PHY_CALIBRATION, sizeof(cmd), &cmd)) |
566 | sizeof(cmd), &cmd)) | 568 | IL_ERR("Could not send C_PHY_CALIBRATION\n"); |
567 | IL_ERR( | ||
568 | "Could not send C_PHY_CALIBRATION\n"); | ||
569 | data->state = IL_CHAIN_NOISE_ACCUMULATE; | 569 | data->state = IL_CHAIN_NOISE_ACCUMULATE; |
570 | D_CALIB("Run chain_noise_calibrate\n"); | 570 | D_CALIB("Run chain_noise_calibrate\n"); |
571 | } | 571 | } |
@@ -573,7 +573,7 @@ static void il4965_chain_noise_reset(struct il_priv *il) | |||
573 | 573 | ||
574 | static struct il_sensitivity_ranges il4965_sensitivity = { | 574 | static struct il_sensitivity_ranges il4965_sensitivity = { |
575 | .min_nrg_cck = 97, | 575 | .min_nrg_cck = 97, |
576 | .max_nrg_cck = 0, /* not used, set to 0 */ | 576 | .max_nrg_cck = 0, /* not used, set to 0 */ |
577 | 577 | ||
578 | .auto_corr_min_ofdm = 85, | 578 | .auto_corr_min_ofdm = 85, |
579 | .auto_corr_min_ofdm_mrc = 170, | 579 | .auto_corr_min_ofdm_mrc = 170, |
@@ -598,11 +598,12 @@ static struct il_sensitivity_ranges il4965_sensitivity = { | |||
598 | .nrg_th_cca = 62, | 598 | .nrg_th_cca = 62, |
599 | }; | 599 | }; |
600 | 600 | ||
601 | static void il4965_set_ct_threshold(struct il_priv *il) | 601 | static void |
602 | il4965_set_ct_threshold(struct il_priv *il) | ||
602 | { | 603 | { |
603 | /* want Kelvin */ | 604 | /* want Kelvin */ |
604 | il->hw_params.ct_kill_threshold = | 605 | il->hw_params.ct_kill_threshold = |
605 | CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD_LEGACY); | 606 | CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD_LEGACY); |
606 | } | 607 | } |
607 | 608 | ||
608 | /** | 609 | /** |
@@ -610,18 +611,19 @@ static void il4965_set_ct_threshold(struct il_priv *il) | |||
610 | * | 611 | * |
611 | * Called when initializing driver | 612 | * Called when initializing driver |
612 | */ | 613 | */ |
613 | static int il4965_hw_set_hw_params(struct il_priv *il) | 614 | static int |
615 | il4965_hw_set_hw_params(struct il_priv *il) | ||
614 | { | 616 | { |
615 | if (il->cfg->mod_params->num_of_queues >= IL_MIN_NUM_QUEUES && | 617 | if (il->cfg->mod_params->num_of_queues >= IL_MIN_NUM_QUEUES && |
616 | il->cfg->mod_params->num_of_queues <= IL49_NUM_QUEUES) | 618 | il->cfg->mod_params->num_of_queues <= IL49_NUM_QUEUES) |
617 | il->cfg->base_params->num_of_queues = | 619 | il->cfg->base_params->num_of_queues = |
618 | il->cfg->mod_params->num_of_queues; | 620 | il->cfg->mod_params->num_of_queues; |
619 | 621 | ||
620 | il->hw_params.max_txq_num = il->cfg->base_params->num_of_queues; | 622 | il->hw_params.max_txq_num = il->cfg->base_params->num_of_queues; |
621 | il->hw_params.dma_chnl_num = FH49_TCSR_CHNL_NUM; | 623 | il->hw_params.dma_chnl_num = FH49_TCSR_CHNL_NUM; |
622 | il->hw_params.scd_bc_tbls_size = | 624 | il->hw_params.scd_bc_tbls_size = |
623 | il->cfg->base_params->num_of_queues * | 625 | il->cfg->base_params->num_of_queues * |
624 | sizeof(struct il4965_scd_bc_tbl); | 626 | sizeof(struct il4965_scd_bc_tbl); |
625 | il->hw_params.tfd_size = sizeof(struct il_tfd); | 627 | il->hw_params.tfd_size = sizeof(struct il_tfd); |
626 | il->hw_params.max_stations = IL4965_STATION_COUNT; | 628 | il->hw_params.max_stations = IL4965_STATION_COUNT; |
627 | il->ctx.bcast_sta_id = IL4965_BROADCAST_ID; | 629 | il->ctx.bcast_sta_id = IL4965_BROADCAST_ID; |
@@ -645,7 +647,8 @@ static int il4965_hw_set_hw_params(struct il_priv *il) | |||
645 | return 0; | 647 | return 0; |
646 | } | 648 | } |
647 | 649 | ||
648 | static s32 il4965_math_div_round(s32 num, s32 denom, s32 *res) | 650 | static s32 |
651 | il4965_math_div_round(s32 num, s32 denom, s32 * res) | ||
649 | { | 652 | { |
650 | s32 sign = 1; | 653 | s32 sign = 1; |
651 | 654 | ||
@@ -674,8 +677,8 @@ static s32 il4965_math_div_round(s32 num, s32 denom, s32 *res) | |||
674 | * Voltage indication is higher for lower voltage. | 677 | * Voltage indication is higher for lower voltage. |
675 | * Lower voltage requires more gain (lower gain table idx). | 678 | * Lower voltage requires more gain (lower gain table idx). |
676 | */ | 679 | */ |
677 | static s32 il4965_get_voltage_compensation(s32 eeprom_voltage, | 680 | static s32 |
678 | s32 current_voltage) | 681 | il4965_get_voltage_compensation(s32 eeprom_voltage, s32 current_voltage) |
679 | { | 682 | { |
680 | s32 comp = 0; | 683 | s32 comp = 0; |
681 | 684 | ||
@@ -684,7 +687,7 @@ static s32 il4965_get_voltage_compensation(s32 eeprom_voltage, | |||
684 | return 0; | 687 | return 0; |
685 | 688 | ||
686 | il4965_math_div_round(current_voltage - eeprom_voltage, | 689 | il4965_math_div_round(current_voltage - eeprom_voltage, |
687 | TX_POWER_IL_VOLTAGE_CODES_PER_03V, &comp); | 690 | TX_POWER_IL_VOLTAGE_CODES_PER_03V, &comp); |
688 | 691 | ||
689 | if (current_voltage > eeprom_voltage) | 692 | if (current_voltage > eeprom_voltage) |
690 | comp *= 2; | 693 | comp *= 2; |
@@ -694,7 +697,8 @@ static s32 il4965_get_voltage_compensation(s32 eeprom_voltage, | |||
694 | return comp; | 697 | return comp; |
695 | } | 698 | } |
696 | 699 | ||
697 | static s32 il4965_get_tx_atten_grp(u16 channel) | 700 | static s32 |
701 | il4965_get_tx_atten_grp(u16 channel) | ||
698 | { | 702 | { |
699 | if (channel >= CALIB_IL_TX_ATTEN_GR5_FCH && | 703 | if (channel >= CALIB_IL_TX_ATTEN_GR5_FCH && |
700 | channel <= CALIB_IL_TX_ATTEN_GR5_LCH) | 704 | channel <= CALIB_IL_TX_ATTEN_GR5_LCH) |
@@ -719,7 +723,8 @@ static s32 il4965_get_tx_atten_grp(u16 channel) | |||
719 | return -EINVAL; | 723 | return -EINVAL; |
720 | } | 724 | } |
721 | 725 | ||
722 | static u32 il4965_get_sub_band(const struct il_priv *il, u32 channel) | 726 | static u32 |
727 | il4965_get_sub_band(const struct il_priv *il, u32 channel) | ||
723 | { | 728 | { |
724 | s32 b = -1; | 729 | s32 b = -1; |
725 | 730 | ||
@@ -735,7 +740,8 @@ static u32 il4965_get_sub_band(const struct il_priv *il, u32 channel) | |||
735 | return b; | 740 | return b; |
736 | } | 741 | } |
737 | 742 | ||
738 | static s32 il4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2) | 743 | static s32 |
744 | il4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2) | ||
739 | { | 745 | { |
740 | s32 val; | 746 | s32 val; |
741 | 747 | ||
@@ -755,8 +761,9 @@ static s32 il4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2) | |||
755 | * differences in channel frequencies, which is proportional to differences | 761 | * differences in channel frequencies, which is proportional to differences |
756 | * in channel number. | 762 | * in channel number. |
757 | */ | 763 | */ |
758 | static int il4965_interpolate_chan(struct il_priv *il, u32 channel, | 764 | static int |
759 | struct il_eeprom_calib_ch_info *chan_info) | 765 | il4965_interpolate_chan(struct il_priv *il, u32 channel, |
766 | struct il_eeprom_calib_ch_info *chan_info) | ||
760 | { | 767 | { |
761 | s32 s = -1; | 768 | s32 s = -1; |
762 | u32 c; | 769 | u32 c; |
@@ -777,8 +784,8 @@ static int il4965_interpolate_chan(struct il_priv *il, u32 channel, | |||
777 | ch_i2 = il->calib_info->band_info[s].ch2.ch_num; | 784 | ch_i2 = il->calib_info->band_info[s].ch2.ch_num; |
778 | chan_info->ch_num = (u8) channel; | 785 | chan_info->ch_num = (u8) channel; |
779 | 786 | ||
780 | D_TXPOWER("channel %d subband %d factory cal ch %d & %d\n", | 787 | D_TXPOWER("channel %d subband %d factory cal ch %d & %d\n", channel, s, |
781 | channel, s, ch_i1, ch_i2); | 788 | ch_i1, ch_i2); |
782 | 789 | ||
783 | for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) { | 790 | for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) { |
784 | for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) { | 791 | for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) { |
@@ -790,36 +797,33 @@ static int il4965_interpolate_chan(struct il_priv *il, u32 channel, | |||
790 | 797 | ||
791 | omeas->actual_pow = | 798 | omeas->actual_pow = |
792 | (u8) il4965_interpolate_value(channel, ch_i1, | 799 | (u8) il4965_interpolate_value(channel, ch_i1, |
793 | m1->actual_pow, | 800 | m1->actual_pow, ch_i2, |
794 | ch_i2, | 801 | m2->actual_pow); |
795 | m2->actual_pow); | ||
796 | omeas->gain_idx = | 802 | omeas->gain_idx = |
797 | (u8) il4965_interpolate_value(channel, ch_i1, | 803 | (u8) il4965_interpolate_value(channel, ch_i1, |
798 | m1->gain_idx, ch_i2, | 804 | m1->gain_idx, ch_i2, |
799 | m2->gain_idx); | 805 | m2->gain_idx); |
800 | omeas->temperature = | 806 | omeas->temperature = |
801 | (u8) il4965_interpolate_value(channel, ch_i1, | 807 | (u8) il4965_interpolate_value(channel, ch_i1, |
802 | m1->temperature, | 808 | m1->temperature, |
803 | ch_i2, | 809 | ch_i2, |
804 | m2->temperature); | 810 | m2->temperature); |
805 | omeas->pa_det = | 811 | omeas->pa_det = |
806 | (s8) il4965_interpolate_value(channel, ch_i1, | 812 | (s8) il4965_interpolate_value(channel, ch_i1, |
807 | m1->pa_det, ch_i2, | 813 | m1->pa_det, ch_i2, |
808 | m2->pa_det); | 814 | m2->pa_det); |
809 | 815 | ||
810 | D_TXPOWER( | 816 | D_TXPOWER("chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, |
811 | "chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, m, | 817 | m, m1->actual_pow, m2->actual_pow, |
812 | m1->actual_pow, m2->actual_pow, omeas->actual_pow); | 818 | omeas->actual_pow); |
813 | D_TXPOWER( | 819 | D_TXPOWER("chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, |
814 | "chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, m, | 820 | m, m1->gain_idx, m2->gain_idx, |
815 | m1->gain_idx, m2->gain_idx, omeas->gain_idx); | 821 | omeas->gain_idx); |
816 | D_TXPOWER( | 822 | D_TXPOWER("chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, |
817 | "chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, m, | 823 | m, m1->pa_det, m2->pa_det, omeas->pa_det); |
818 | m1->pa_det, m2->pa_det, omeas->pa_det); | 824 | D_TXPOWER("chain %d meas %d T1=%d T2=%d T=%d\n", c, |
819 | D_TXPOWER( | 825 | m, m1->temperature, m2->temperature, |
820 | "chain %d meas %d T1=%d T2=%d T=%d\n", c, m, | 826 | omeas->temperature); |
821 | m1->temperature, m2->temperature, | ||
822 | omeas->temperature); | ||
823 | } | 827 | } |
824 | } | 828 | } |
825 | 829 | ||
@@ -842,14 +846,20 @@ static struct il4965_txpower_comp_entry { | |||
842 | s32 degrees_per_05db_a; | 846 | s32 degrees_per_05db_a; |
843 | s32 degrees_per_05db_a_denom; | 847 | s32 degrees_per_05db_a_denom; |
844 | } tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = { | 848 | } tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = { |
845 | {9, 2}, /* group 0 5.2, ch 34-43 */ | 849 | { |
846 | {4, 1}, /* group 1 5.2, ch 44-70 */ | 850 | 9, 2}, /* group 0 5.2, ch 34-43 */ |
847 | {4, 1}, /* group 2 5.2, ch 71-124 */ | 851 | { |
848 | {4, 1}, /* group 3 5.2, ch 125-200 */ | 852 | 4, 1}, /* group 1 5.2, ch 44-70 */ |
849 | {3, 1} /* group 4 2.4, ch all */ | 853 | { |
854 | 4, 1}, /* group 2 5.2, ch 71-124 */ | ||
855 | { | ||
856 | 4, 1}, /* group 3 5.2, ch 125-200 */ | ||
857 | { | ||
858 | 3, 1} /* group 4 2.4, ch all */ | ||
850 | }; | 859 | }; |
851 | 860 | ||
852 | static s32 get_min_power_idx(s32 rate_power_idx, u32 band) | 861 | static s32 |
862 | get_min_power_idx(s32 rate_power_idx, u32 band) | ||
853 | { | 863 | { |
854 | if (!band) { | 864 | if (!band) { |
855 | if ((rate_power_idx & 7) <= 4) | 865 | if ((rate_power_idx & 7) <= 4) |
@@ -1088,9 +1098,10 @@ static const struct gain_entry gain_table[2][108] = { | |||
1088 | } | 1098 | } |
1089 | }; | 1099 | }; |
1090 | 1100 | ||
1091 | static int il4965_fill_txpower_tbl(struct il_priv *il, u8 band, u16 channel, | 1101 | static int |
1092 | u8 is_ht40, u8 ctrl_chan_high, | 1102 | il4965_fill_txpower_tbl(struct il_priv *il, u8 band, u16 channel, u8 is_ht40, |
1093 | struct il4965_tx_power_db *tx_power_tbl) | 1103 | u8 ctrl_chan_high, |
1104 | struct il4965_tx_power_db *tx_power_tbl) | ||
1094 | { | 1105 | { |
1095 | u8 saturation_power; | 1106 | u8 saturation_power; |
1096 | s32 target_power; | 1107 | s32 target_power; |
@@ -1121,8 +1132,7 @@ static int il4965_fill_txpower_tbl(struct il_priv *il, u8 band, u16 channel, | |||
1121 | user_target_power = 2 * il->tx_power_user_lmt; | 1132 | user_target_power = 2 * il->tx_power_user_lmt; |
1122 | 1133 | ||
1123 | /* Get current (RXON) channel, band, width */ | 1134 | /* Get current (RXON) channel, band, width */ |
1124 | D_TXPOWER("chan %d band %d is_ht40 %d\n", channel, band, | 1135 | D_TXPOWER("chan %d band %d is_ht40 %d\n", channel, band, is_ht40); |
1125 | is_ht40); | ||
1126 | 1136 | ||
1127 | ch_info = il_get_channel_info(il, il->band, channel); | 1137 | ch_info = il_get_channel_info(il, il->band, channel); |
1128 | 1138 | ||
@@ -1133,13 +1143,12 @@ static int il4965_fill_txpower_tbl(struct il_priv *il, u8 band, u16 channel, | |||
1133 | * and 2) mimo txpower balance between Tx chains. */ | 1143 | * and 2) mimo txpower balance between Tx chains. */ |
1134 | txatten_grp = il4965_get_tx_atten_grp(channel); | 1144 | txatten_grp = il4965_get_tx_atten_grp(channel); |
1135 | if (txatten_grp < 0) { | 1145 | if (txatten_grp < 0) { |
1136 | IL_ERR("Can't find txatten group for channel %d.\n", | 1146 | IL_ERR("Can't find txatten group for channel %d.\n", channel); |
1137 | channel); | ||
1138 | return txatten_grp; | 1147 | return txatten_grp; |
1139 | } | 1148 | } |
1140 | 1149 | ||
1141 | D_TXPOWER("channel %d belongs to txatten group %d\n", | 1150 | D_TXPOWER("channel %d belongs to txatten group %d\n", channel, |
1142 | channel, txatten_grp); | 1151 | txatten_grp); |
1143 | 1152 | ||
1144 | if (is_ht40) { | 1153 | if (is_ht40) { |
1145 | if (ctrl_chan_high) | 1154 | if (ctrl_chan_high) |
@@ -1184,13 +1193,12 @@ static int il4965_fill_txpower_tbl(struct il_priv *il, u8 band, u16 channel, | |||
1184 | 1193 | ||
1185 | /* calculate tx gain adjustment based on power supply voltage */ | 1194 | /* calculate tx gain adjustment based on power supply voltage */ |
1186 | voltage = le16_to_cpu(il->calib_info->voltage); | 1195 | voltage = le16_to_cpu(il->calib_info->voltage); |
1187 | init_voltage = (s32)le32_to_cpu(il->card_alive_init.voltage); | 1196 | init_voltage = (s32) le32_to_cpu(il->card_alive_init.voltage); |
1188 | voltage_compensation = | 1197 | voltage_compensation = |
1189 | il4965_get_voltage_compensation(voltage, init_voltage); | 1198 | il4965_get_voltage_compensation(voltage, init_voltage); |
1190 | 1199 | ||
1191 | D_TXPOWER("curr volt %d eeprom volt %d volt comp %d\n", | 1200 | D_TXPOWER("curr volt %d eeprom volt %d volt comp %d\n", init_voltage, |
1192 | init_voltage, | 1201 | voltage, voltage_compensation); |
1193 | voltage, voltage_compensation); | ||
1194 | 1202 | ||
1195 | /* get current temperature (Celsius) */ | 1203 | /* get current temperature (Celsius) */ |
1196 | current_temp = max(il->temperature, IL_TX_POWER_TEMPERATURE_MIN); | 1204 | current_temp = max(il->temperature, IL_TX_POWER_TEMPERATURE_MIN); |
@@ -1211,23 +1219,20 @@ static int il4965_fill_txpower_tbl(struct il_priv *il, u8 band, u16 channel, | |||
1211 | /* txgain adjustment (in half-dB steps) based on difference | 1219 | /* txgain adjustment (in half-dB steps) based on difference |
1212 | * between factory and current temperature */ | 1220 | * between factory and current temperature */ |
1213 | factory_temp = measurement->temperature; | 1221 | factory_temp = measurement->temperature; |
1214 | il4965_math_div_round((current_temp - factory_temp) * | 1222 | il4965_math_div_round((current_temp - |
1215 | degrees_per_05db_denom, | 1223 | factory_temp) * degrees_per_05db_denom, |
1216 | degrees_per_05db_num, | 1224 | degrees_per_05db_num, |
1217 | &temperature_comp[c]); | 1225 | &temperature_comp[c]); |
1218 | 1226 | ||
1219 | factory_gain_idx[c] = measurement->gain_idx; | 1227 | factory_gain_idx[c] = measurement->gain_idx; |
1220 | factory_actual_pwr[c] = measurement->actual_pow; | 1228 | factory_actual_pwr[c] = measurement->actual_pow; |
1221 | 1229 | ||
1222 | D_TXPOWER("chain = %d\n", c); | 1230 | D_TXPOWER("chain = %d\n", c); |
1223 | D_TXPOWER("fctry tmp %d, " | 1231 | D_TXPOWER("fctry tmp %d, " "curr tmp %d, comp %d steps\n", |
1224 | "curr tmp %d, comp %d steps\n", | 1232 | factory_temp, current_temp, temperature_comp[c]); |
1225 | factory_temp, current_temp, | 1233 | |
1226 | temperature_comp[c]); | 1234 | D_TXPOWER("fctry idx %d, fctry pwr %d\n", factory_gain_idx[c], |
1227 | 1235 | factory_actual_pwr[c]); | |
1228 | D_TXPOWER("fctry idx %d, fctry pwr %d\n", | ||
1229 | factory_gain_idx[c], | ||
1230 | factory_actual_pwr[c]); | ||
1231 | } | 1236 | } |
1232 | 1237 | ||
1233 | /* for each of 33 bit-rates (including 1 for CCK) */ | 1238 | /* for each of 33 bit-rates (including 1 for CCK) */ |
@@ -1239,7 +1244,8 @@ static int il4965_fill_txpower_tbl(struct il_priv *il, u8 band, u16 channel, | |||
1239 | * (3dB, 6 steps), so total output power is regulatory | 1244 | * (3dB, 6 steps), so total output power is regulatory |
1240 | * compliant. */ | 1245 | * compliant. */ |
1241 | if (i & 0x8) { | 1246 | if (i & 0x8) { |
1242 | current_regulatory = reg_limit - | 1247 | current_regulatory = |
1248 | reg_limit - | ||
1243 | IL_TX_POWER_MIMO_REGULATORY_COMPENSATION; | 1249 | IL_TX_POWER_MIMO_REGULATORY_COMPENSATION; |
1244 | is_mimo_rate = 1; | 1250 | is_mimo_rate = 1; |
1245 | } else { | 1251 | } else { |
@@ -1258,10 +1264,9 @@ static int il4965_fill_txpower_tbl(struct il_priv *il, u8 band, u16 channel, | |||
1258 | if (target_power > power_limit) | 1264 | if (target_power > power_limit) |
1259 | target_power = power_limit; | 1265 | target_power = power_limit; |
1260 | 1266 | ||
1261 | D_TXPOWER("rate %d sat %d reg %d usr %d tgt %d\n", | 1267 | D_TXPOWER("rate %d sat %d reg %d usr %d tgt %d\n", i, |
1262 | i, saturation_power - back_off_table[i], | 1268 | saturation_power - back_off_table[i], |
1263 | current_regulatory, user_target_power, | 1269 | current_regulatory, user_target_power, target_power); |
1264 | target_power); | ||
1265 | 1270 | ||
1266 | /* for each of 2 Tx chains (radio transmitters) */ | 1271 | /* for each of 2 Tx chains (radio transmitters) */ |
1267 | for (c = 0; c < 2; c++) { | 1272 | for (c = 0; c < 2; c++) { |
@@ -1269,18 +1274,17 @@ static int il4965_fill_txpower_tbl(struct il_priv *il, u8 band, u16 channel, | |||
1269 | 1274 | ||
1270 | if (is_mimo_rate) | 1275 | if (is_mimo_rate) |
1271 | atten_value = | 1276 | atten_value = |
1272 | (s32)le32_to_cpu(il->card_alive_init. | 1277 | (s32) le32_to_cpu(il->card_alive_init. |
1273 | tx_atten[txatten_grp][c]); | 1278 | tx_atten[txatten_grp][c]); |
1274 | else | 1279 | else |
1275 | atten_value = 0; | 1280 | atten_value = 0; |
1276 | 1281 | ||
1277 | /* calculate idx; higher idx means lower txpower */ | 1282 | /* calculate idx; higher idx means lower txpower */ |
1278 | power_idx = (u8) (factory_gain_idx[c] - | 1283 | power_idx = |
1279 | (target_power - | 1284 | (u8) (factory_gain_idx[c] - |
1280 | factory_actual_pwr[c]) - | 1285 | (target_power - factory_actual_pwr[c]) - |
1281 | temperature_comp[c] - | 1286 | temperature_comp[c] - voltage_compensation + |
1282 | voltage_compensation + | 1287 | atten_value); |
1283 | atten_value); | ||
1284 | 1288 | ||
1285 | /* D_TXPOWER("calculated txpower idx %d\n", | 1289 | /* D_TXPOWER("calculated txpower idx %d\n", |
1286 | power_idx); */ | 1290 | power_idx); */ |
@@ -1299,32 +1303,29 @@ static int il4965_fill_txpower_tbl(struct il_priv *il, u8 band, u16 channel, | |||
1299 | 1303 | ||
1300 | /* stay within the table! */ | 1304 | /* stay within the table! */ |
1301 | if (power_idx > 107) { | 1305 | if (power_idx > 107) { |
1302 | IL_WARN("txpower idx %d > 107\n", | 1306 | IL_WARN("txpower idx %d > 107\n", power_idx); |
1303 | power_idx); | ||
1304 | power_idx = 107; | 1307 | power_idx = 107; |
1305 | } | 1308 | } |
1306 | if (power_idx < 0) { | 1309 | if (power_idx < 0) { |
1307 | IL_WARN("txpower idx %d < 0\n", | 1310 | IL_WARN("txpower idx %d < 0\n", power_idx); |
1308 | power_idx); | ||
1309 | power_idx = 0; | 1311 | power_idx = 0; |
1310 | } | 1312 | } |
1311 | 1313 | ||
1312 | /* fill txpower command for this rate/chain */ | 1314 | /* fill txpower command for this rate/chain */ |
1313 | tx_power.s.radio_tx_gain[c] = | 1315 | tx_power.s.radio_tx_gain[c] = |
1314 | gain_table[band][power_idx].radio; | 1316 | gain_table[band][power_idx].radio; |
1315 | tx_power.s.dsp_predis_atten[c] = | 1317 | tx_power.s.dsp_predis_atten[c] = |
1316 | gain_table[band][power_idx].dsp; | 1318 | gain_table[band][power_idx].dsp; |
1317 | 1319 | ||
1318 | D_TXPOWER("chain %d mimo %d idx %d " | 1320 | D_TXPOWER("chain %d mimo %d idx %d " |
1319 | "gain 0x%02x dsp %d\n", | 1321 | "gain 0x%02x dsp %d\n", c, atten_value, |
1320 | c, atten_value, power_idx, | 1322 | power_idx, tx_power.s.radio_tx_gain[c], |
1321 | tx_power.s.radio_tx_gain[c], | 1323 | tx_power.s.dsp_predis_atten[c]); |
1322 | tx_power.s.dsp_predis_atten[c]); | 1324 | } /* for each chain */ |
1323 | } /* for each chain */ | ||
1324 | 1325 | ||
1325 | tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw); | 1326 | tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw); |
1326 | 1327 | ||
1327 | } /* for each rate */ | 1328 | } /* for each rate */ |
1328 | 1329 | ||
1329 | return 0; | 1330 | return 0; |
1330 | } | 1331 | } |
@@ -1335,7 +1336,8 @@ static int il4965_fill_txpower_tbl(struct il_priv *il, u8 band, u16 channel, | |||
1335 | * Uses the active RXON for channel, band, and characteristics (ht40, high) | 1336 | * Uses the active RXON for channel, band, and characteristics (ht40, high) |
1336 | * The power limit is taken from il->tx_power_user_lmt. | 1337 | * The power limit is taken from il->tx_power_user_lmt. |
1337 | */ | 1338 | */ |
1338 | static int il4965_send_tx_power(struct il_priv *il) | 1339 | static int |
1340 | il4965_send_tx_power(struct il_priv *il) | ||
1339 | { | 1341 | { |
1340 | struct il4965_txpowertable_cmd cmd = { 0 }; | 1342 | struct il4965_txpowertable_cmd cmd = { 0 }; |
1341 | int ret; | 1343 | int ret; |
@@ -1344,8 +1346,9 @@ static int il4965_send_tx_power(struct il_priv *il) | |||
1344 | u8 ctrl_chan_high = 0; | 1346 | u8 ctrl_chan_high = 0; |
1345 | struct il_rxon_context *ctx = &il->ctx; | 1347 | struct il_rxon_context *ctx = &il->ctx; |
1346 | 1348 | ||
1347 | if (WARN_ONCE(test_bit(S_SCAN_HW, &il->status), | 1349 | if (WARN_ONCE |
1348 | "TX Power requested while scanning!\n")) | 1350 | (test_bit(S_SCAN_HW, &il->status), |
1351 | "TX Power requested while scanning!\n")) | ||
1349 | return -EAGAIN; | 1352 | return -EAGAIN; |
1350 | 1353 | ||
1351 | band = il->band == IEEE80211_BAND_2GHZ; | 1354 | band = il->band == IEEE80211_BAND_2GHZ; |
@@ -1358,21 +1361,20 @@ static int il4965_send_tx_power(struct il_priv *il) | |||
1358 | cmd.band = band; | 1361 | cmd.band = band; |
1359 | cmd.channel = ctx->active.channel; | 1362 | cmd.channel = ctx->active.channel; |
1360 | 1363 | ||
1361 | ret = il4965_fill_txpower_tbl(il, band, | 1364 | ret = |
1362 | le16_to_cpu(ctx->active.channel), | 1365 | il4965_fill_txpower_tbl(il, band, le16_to_cpu(ctx->active.channel), |
1363 | is_ht40, ctrl_chan_high, &cmd.tx_power); | 1366 | is_ht40, ctrl_chan_high, &cmd.tx_power); |
1364 | if (ret) | 1367 | if (ret) |
1365 | goto out; | 1368 | goto out; |
1366 | 1369 | ||
1367 | ret = il_send_cmd_pdu(il, | 1370 | ret = il_send_cmd_pdu(il, C_TX_PWR_TBL, sizeof(cmd), &cmd); |
1368 | C_TX_PWR_TBL, sizeof(cmd), &cmd); | ||
1369 | 1371 | ||
1370 | out: | 1372 | out: |
1371 | return ret; | 1373 | return ret; |
1372 | } | 1374 | } |
1373 | 1375 | ||
1374 | static int il4965_send_rxon_assoc(struct il_priv *il, | 1376 | static int |
1375 | struct il_rxon_context *ctx) | 1377 | il4965_send_rxon_assoc(struct il_priv *il, struct il_rxon_context *ctx) |
1376 | { | 1378 | { |
1377 | int ret = 0; | 1379 | int ret = 0; |
1378 | struct il4965_rxon_assoc_cmd rxon_assoc; | 1380 | struct il4965_rxon_assoc_cmd rxon_assoc; |
@@ -1383,9 +1385,9 @@ static int il4965_send_rxon_assoc(struct il_priv *il, | |||
1383 | rxon1->filter_flags == rxon2->filter_flags && | 1385 | rxon1->filter_flags == rxon2->filter_flags && |
1384 | rxon1->cck_basic_rates == rxon2->cck_basic_rates && | 1386 | rxon1->cck_basic_rates == rxon2->cck_basic_rates && |
1385 | rxon1->ofdm_ht_single_stream_basic_rates == | 1387 | rxon1->ofdm_ht_single_stream_basic_rates == |
1386 | rxon2->ofdm_ht_single_stream_basic_rates && | 1388 | rxon2->ofdm_ht_single_stream_basic_rates && |
1387 | rxon1->ofdm_ht_dual_stream_basic_rates == | 1389 | rxon1->ofdm_ht_dual_stream_basic_rates == |
1388 | rxon2->ofdm_ht_dual_stream_basic_rates && | 1390 | rxon2->ofdm_ht_dual_stream_basic_rates && |
1389 | rxon1->rx_chain == rxon2->rx_chain && | 1391 | rxon1->rx_chain == rxon2->rx_chain && |
1390 | rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates) { | 1392 | rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates) { |
1391 | D_INFO("Using current RXON_ASSOC. Not resending.\n"); | 1393 | D_INFO("Using current RXON_ASSOC. Not resending.\n"); |
@@ -1403,19 +1405,20 @@ static int il4965_send_rxon_assoc(struct il_priv *il, | |||
1403 | ctx->staging.ofdm_ht_dual_stream_basic_rates; | 1405 | ctx->staging.ofdm_ht_dual_stream_basic_rates; |
1404 | rxon_assoc.rx_chain_select_flags = ctx->staging.rx_chain; | 1406 | rxon_assoc.rx_chain_select_flags = ctx->staging.rx_chain; |
1405 | 1407 | ||
1406 | ret = il_send_cmd_pdu_async(il, C_RXON_ASSOC, | 1408 | ret = |
1407 | sizeof(rxon_assoc), &rxon_assoc, NULL); | 1409 | il_send_cmd_pdu_async(il, C_RXON_ASSOC, sizeof(rxon_assoc), |
1410 | &rxon_assoc, NULL); | ||
1408 | 1411 | ||
1409 | return ret; | 1412 | return ret; |
1410 | } | 1413 | } |
1411 | 1414 | ||
1412 | static int il4965_commit_rxon(struct il_priv *il, struct il_rxon_context *ctx) | 1415 | static int |
1416 | il4965_commit_rxon(struct il_priv *il, struct il_rxon_context *ctx) | ||
1413 | { | 1417 | { |
1414 | /* cast away the const for active_rxon in this function */ | 1418 | /* cast away the const for active_rxon in this function */ |
1415 | struct il_rxon_cmd *active_rxon = (void *)&ctx->active; | 1419 | struct il_rxon_cmd *active_rxon = (void *)&ctx->active; |
1416 | int ret; | 1420 | int ret; |
1417 | bool new_assoc = | 1421 | bool new_assoc = !!(ctx->staging.filter_flags & RXON_FILTER_ASSOC_MSK); |
1418 | !!(ctx->staging.filter_flags & RXON_FILTER_ASSOC_MSK); | ||
1419 | 1422 | ||
1420 | if (!il_is_alive(il)) | 1423 | if (!il_is_alive(il)) |
1421 | return -EBUSY; | 1424 | return -EBUSY; |
@@ -1471,9 +1474,9 @@ static int il4965_commit_rxon(struct il_priv *il, struct il_rxon_context *ctx) | |||
1471 | D_INFO("Toggling associated bit on current RXON\n"); | 1474 | D_INFO("Toggling associated bit on current RXON\n"); |
1472 | active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK; | 1475 | active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK; |
1473 | 1476 | ||
1474 | ret = il_send_cmd_pdu(il, ctx->rxon_cmd, | 1477 | ret = |
1475 | sizeof(struct il_rxon_cmd), | 1478 | il_send_cmd_pdu(il, ctx->rxon_cmd, |
1476 | active_rxon); | 1479 | sizeof(struct il_rxon_cmd), active_rxon); |
1477 | 1480 | ||
1478 | /* If the mask clearing failed then we set | 1481 | /* If the mask clearing failed then we set |
1479 | * active_rxon back to what it was previously */ | 1482 | * active_rxon back to what it was previously */ |
@@ -1491,24 +1494,20 @@ static int il4965_commit_rxon(struct il_priv *il, struct il_rxon_context *ctx) | |||
1491 | } | 1494 | } |
1492 | } | 1495 | } |
1493 | 1496 | ||
1494 | D_INFO("Sending RXON\n" | 1497 | D_INFO("Sending RXON\n" "* with%s RXON_FILTER_ASSOC_MSK\n" |
1495 | "* with%s RXON_FILTER_ASSOC_MSK\n" | 1498 | "* channel = %d\n" "* bssid = %pM\n", (new_assoc ? "" : "out"), |
1496 | "* channel = %d\n" | 1499 | le16_to_cpu(ctx->staging.channel), ctx->staging.bssid_addr); |
1497 | "* bssid = %pM\n", | ||
1498 | (new_assoc ? "" : "out"), | ||
1499 | le16_to_cpu(ctx->staging.channel), | ||
1500 | ctx->staging.bssid_addr); | ||
1501 | 1500 | ||
1502 | il_set_rxon_hwcrypto(il, ctx, | 1501 | il_set_rxon_hwcrypto(il, ctx, !il->cfg->mod_params->sw_crypto); |
1503 | !il->cfg->mod_params->sw_crypto); | ||
1504 | 1502 | ||
1505 | /* Apply the new configuration | 1503 | /* Apply the new configuration |
1506 | * RXON unassoc clears the station table in uCode so restoration of | 1504 | * RXON unassoc clears the station table in uCode so restoration of |
1507 | * stations is needed after it (the RXON command) completes | 1505 | * stations is needed after it (the RXON command) completes |
1508 | */ | 1506 | */ |
1509 | if (!new_assoc) { | 1507 | if (!new_assoc) { |
1510 | ret = il_send_cmd_pdu(il, ctx->rxon_cmd, | 1508 | ret = |
1511 | sizeof(struct il_rxon_cmd), &ctx->staging); | 1509 | il_send_cmd_pdu(il, ctx->rxon_cmd, |
1510 | sizeof(struct il_rxon_cmd), &ctx->staging); | ||
1512 | if (ret) { | 1511 | if (ret) { |
1513 | IL_ERR("Error setting new RXON (%d)\n", ret); | 1512 | IL_ERR("Error setting new RXON (%d)\n", ret); |
1514 | return ret; | 1513 | return ret; |
@@ -1528,8 +1527,9 @@ static int il4965_commit_rxon(struct il_priv *il, struct il_rxon_context *ctx) | |||
1528 | /* Apply the new configuration | 1527 | /* Apply the new configuration |
1529 | * RXON assoc doesn't clear the station table in uCode, | 1528 | * RXON assoc doesn't clear the station table in uCode, |
1530 | */ | 1529 | */ |
1531 | ret = il_send_cmd_pdu(il, ctx->rxon_cmd, | 1530 | ret = |
1532 | sizeof(struct il_rxon_cmd), &ctx->staging); | 1531 | il_send_cmd_pdu(il, ctx->rxon_cmd, |
1532 | sizeof(struct il_rxon_cmd), &ctx->staging); | ||
1533 | if (ret) { | 1533 | if (ret) { |
1534 | IL_ERR("Error setting new RXON (%d)\n", ret); | 1534 | IL_ERR("Error setting new RXON (%d)\n", ret); |
1535 | return ret; | 1535 | return ret; |
@@ -1551,8 +1551,9 @@ static int il4965_commit_rxon(struct il_priv *il, struct il_rxon_context *ctx) | |||
1551 | return 0; | 1551 | return 0; |
1552 | } | 1552 | } |
1553 | 1553 | ||
1554 | static int il4965_hw_channel_switch(struct il_priv *il, | 1554 | static int |
1555 | struct ieee80211_channel_switch *ch_switch) | 1555 | il4965_hw_channel_switch(struct il_priv *il, |
1556 | struct ieee80211_channel_switch *ch_switch) | ||
1556 | { | 1557 | { |
1557 | struct il_rxon_context *ctx = &il->ctx; | 1558 | struct il_rxon_context *ctx = &il->ctx; |
1558 | int rc; | 1559 | int rc; |
@@ -1571,8 +1572,7 @@ static int il4965_hw_channel_switch(struct il_priv *il, | |||
1571 | 1572 | ||
1572 | is_ht40 = iw4965_is_ht40_channel(ctx->staging.flags); | 1573 | is_ht40 = iw4965_is_ht40_channel(ctx->staging.flags); |
1573 | 1574 | ||
1574 | if (is_ht40 && | 1575 | if (is_ht40 && (ctx->staging.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK)) |
1575 | (ctx->staging.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK)) | ||
1576 | ctrl_chan_high = 1; | 1576 | ctrl_chan_high = 1; |
1577 | 1577 | ||
1578 | cmd.band = band; | 1578 | cmd.band = band; |
@@ -1588,10 +1588,10 @@ static int il4965_hw_channel_switch(struct il_priv *il, | |||
1588 | * adding TSF as one of the factor for when to switch | 1588 | * adding TSF as one of the factor for when to switch |
1589 | */ | 1589 | */ |
1590 | if (il->ucode_beacon_time > tsf_low && beacon_interval) { | 1590 | if (il->ucode_beacon_time > tsf_low && beacon_interval) { |
1591 | if (switch_count > ((il->ucode_beacon_time - tsf_low) / | 1591 | if (switch_count > |
1592 | beacon_interval)) { | 1592 | ((il->ucode_beacon_time - tsf_low) / beacon_interval)) { |
1593 | switch_count -= (il->ucode_beacon_time - | 1593 | switch_count -= |
1594 | tsf_low) / beacon_interval; | 1594 | (il->ucode_beacon_time - tsf_low) / beacon_interval; |
1595 | } else | 1595 | } else |
1596 | switch_count = 0; | 1596 | switch_count = 0; |
1597 | } | 1597 | } |
@@ -1599,43 +1599,40 @@ static int il4965_hw_channel_switch(struct il_priv *il, | |||
1599 | cmd.switch_time = cpu_to_le32(il->ucode_beacon_time); | 1599 | cmd.switch_time = cpu_to_le32(il->ucode_beacon_time); |
1600 | else { | 1600 | else { |
1601 | switch_time_in_usec = | 1601 | switch_time_in_usec = |
1602 | vif->bss_conf.beacon_int * switch_count * TIME_UNIT; | 1602 | vif->bss_conf.beacon_int * switch_count * TIME_UNIT; |
1603 | ucode_switch_time = il_usecs_to_beacons(il, | 1603 | ucode_switch_time = |
1604 | switch_time_in_usec, | 1604 | il_usecs_to_beacons(il, switch_time_in_usec, |
1605 | beacon_interval); | 1605 | beacon_interval); |
1606 | cmd.switch_time = il_add_beacon_time(il, | 1606 | cmd.switch_time = |
1607 | il->ucode_beacon_time, | 1607 | il_add_beacon_time(il, il->ucode_beacon_time, |
1608 | ucode_switch_time, | 1608 | ucode_switch_time, beacon_interval); |
1609 | beacon_interval); | ||
1610 | } | 1609 | } |
1611 | D_11H("uCode time for the switch is 0x%x\n", | 1610 | D_11H("uCode time for the switch is 0x%x\n", cmd.switch_time); |
1612 | cmd.switch_time); | ||
1613 | ch_info = il_get_channel_info(il, il->band, ch); | 1611 | ch_info = il_get_channel_info(il, il->band, ch); |
1614 | if (ch_info) | 1612 | if (ch_info) |
1615 | cmd.expect_beacon = il_is_channel_radar(ch_info); | 1613 | cmd.expect_beacon = il_is_channel_radar(ch_info); |
1616 | else { | 1614 | else { |
1617 | IL_ERR("invalid channel switch from %u to %u\n", | 1615 | IL_ERR("invalid channel switch from %u to %u\n", |
1618 | ctx->active.channel, ch); | 1616 | ctx->active.channel, ch); |
1619 | return -EFAULT; | 1617 | return -EFAULT; |
1620 | } | 1618 | } |
1621 | 1619 | ||
1622 | rc = il4965_fill_txpower_tbl(il, band, ch, is_ht40, | 1620 | rc = il4965_fill_txpower_tbl(il, band, ch, is_ht40, ctrl_chan_high, |
1623 | ctrl_chan_high, &cmd.tx_power); | 1621 | &cmd.tx_power); |
1624 | if (rc) { | 1622 | if (rc) { |
1625 | D_11H("error:%d fill txpower_tbl\n", rc); | 1623 | D_11H("error:%d fill txpower_tbl\n", rc); |
1626 | return rc; | 1624 | return rc; |
1627 | } | 1625 | } |
1628 | 1626 | ||
1629 | return il_send_cmd_pdu(il, | 1627 | return il_send_cmd_pdu(il, C_CHANNEL_SWITCH, sizeof(cmd), &cmd); |
1630 | C_CHANNEL_SWITCH, sizeof(cmd), &cmd); | ||
1631 | } | 1628 | } |
1632 | 1629 | ||
1633 | /** | 1630 | /** |
1634 | * il4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array | 1631 | * il4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array |
1635 | */ | 1632 | */ |
1636 | static void il4965_txq_update_byte_cnt_tbl(struct il_priv *il, | 1633 | static void |
1637 | struct il_tx_queue *txq, | 1634 | il4965_txq_update_byte_cnt_tbl(struct il_priv *il, struct il_tx_queue *txq, |
1638 | u16 byte_cnt) | 1635 | u16 byte_cnt) |
1639 | { | 1636 | { |
1640 | struct il4965_scd_bc_tbl *scd_bc_tbl = il->scd_bc_tbls.addr; | 1637 | struct il4965_scd_bc_tbl *scd_bc_tbl = il->scd_bc_tbls.addr; |
1641 | int txq_id = txq->q.id; | 1638 | int txq_id = txq->q.id; |
@@ -1651,8 +1648,8 @@ static void il4965_txq_update_byte_cnt_tbl(struct il_priv *il, | |||
1651 | 1648 | ||
1652 | /* If within first 64 entries, duplicate at end */ | 1649 | /* If within first 64 entries, duplicate at end */ |
1653 | if (write_ptr < TFD_QUEUE_SIZE_BC_DUP) | 1650 | if (write_ptr < TFD_QUEUE_SIZE_BC_DUP) |
1654 | scd_bc_tbl[txq_id]. | 1651 | scd_bc_tbl[txq_id].tfd_offset[TFD_QUEUE_SIZE_MAX + write_ptr] = |
1655 | tfd_offset[TFD_QUEUE_SIZE_MAX + write_ptr] = bc_ent; | 1652 | bc_ent; |
1656 | } | 1653 | } |
1657 | 1654 | ||
1658 | /** | 1655 | /** |
@@ -1661,7 +1658,8 @@ static void il4965_txq_update_byte_cnt_tbl(struct il_priv *il, | |||
1661 | * | 1658 | * |
1662 | * A return of <0 indicates bogus data in the stats | 1659 | * A return of <0 indicates bogus data in the stats |
1663 | */ | 1660 | */ |
1664 | static int il4965_hw_get_temperature(struct il_priv *il) | 1661 | static int |
1662 | il4965_hw_get_temperature(struct il_priv *il) | ||
1665 | { | 1663 | { |
1666 | s32 temperature; | 1664 | s32 temperature; |
1667 | s32 vt; | 1665 | s32 vt; |
@@ -1669,18 +1667,17 @@ static int il4965_hw_get_temperature(struct il_priv *il) | |||
1669 | u32 R4; | 1667 | u32 R4; |
1670 | 1668 | ||
1671 | if (test_bit(S_TEMPERATURE, &il->status) && | 1669 | if (test_bit(S_TEMPERATURE, &il->status) && |
1672 | (il->_4965.stats.flag & | 1670 | (il->_4965.stats.flag & STATS_REPLY_FLG_HT40_MODE_MSK)) { |
1673 | STATS_REPLY_FLG_HT40_MODE_MSK)) { | ||
1674 | D_TEMP("Running HT40 temperature calibration\n"); | 1671 | D_TEMP("Running HT40 temperature calibration\n"); |
1675 | R1 = (s32)le32_to_cpu(il->card_alive_init.therm_r1[1]); | 1672 | R1 = (s32) le32_to_cpu(il->card_alive_init.therm_r1[1]); |
1676 | R2 = (s32)le32_to_cpu(il->card_alive_init.therm_r2[1]); | 1673 | R2 = (s32) le32_to_cpu(il->card_alive_init.therm_r2[1]); |
1677 | R3 = (s32)le32_to_cpu(il->card_alive_init.therm_r3[1]); | 1674 | R3 = (s32) le32_to_cpu(il->card_alive_init.therm_r3[1]); |
1678 | R4 = le32_to_cpu(il->card_alive_init.therm_r4[1]); | 1675 | R4 = le32_to_cpu(il->card_alive_init.therm_r4[1]); |
1679 | } else { | 1676 | } else { |
1680 | D_TEMP("Running temperature calibration\n"); | 1677 | D_TEMP("Running temperature calibration\n"); |
1681 | R1 = (s32)le32_to_cpu(il->card_alive_init.therm_r1[0]); | 1678 | R1 = (s32) le32_to_cpu(il->card_alive_init.therm_r1[0]); |
1682 | R2 = (s32)le32_to_cpu(il->card_alive_init.therm_r2[0]); | 1679 | R2 = (s32) le32_to_cpu(il->card_alive_init.therm_r2[0]); |
1683 | R3 = (s32)le32_to_cpu(il->card_alive_init.therm_r3[0]); | 1680 | R3 = (s32) le32_to_cpu(il->card_alive_init.therm_r3[0]); |
1684 | R4 = le32_to_cpu(il->card_alive_init.therm_r4[0]); | 1681 | R4 = le32_to_cpu(il->card_alive_init.therm_r4[0]); |
1685 | } | 1682 | } |
1686 | 1683 | ||
@@ -1694,8 +1691,9 @@ static int il4965_hw_get_temperature(struct il_priv *il) | |||
1694 | if (!test_bit(S_TEMPERATURE, &il->status)) | 1691 | if (!test_bit(S_TEMPERATURE, &il->status)) |
1695 | vt = sign_extend32(R4, 23); | 1692 | vt = sign_extend32(R4, 23); |
1696 | else | 1693 | else |
1697 | vt = sign_extend32(le32_to_cpu(il->_4965.stats. | 1694 | vt = sign_extend32(le32_to_cpu |
1698 | general.common.temperature), 23); | 1695 | (il->_4965.stats.general.common.temperature), |
1696 | 23); | ||
1699 | 1697 | ||
1700 | D_TEMP("Calib values R[1-3]: %d %d %d R4: %d\n", R1, R2, R3, vt); | 1698 | D_TEMP("Calib values R[1-3]: %d %d %d R4: %d\n", R1, R2, R3, vt); |
1701 | 1699 | ||
@@ -1708,10 +1706,11 @@ static int il4965_hw_get_temperature(struct il_priv *il) | |||
1708 | * Add offset to center the adjustment around 0 degrees Centigrade. */ | 1706 | * Add offset to center the adjustment around 0 degrees Centigrade. */ |
1709 | temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2); | 1707 | temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2); |
1710 | temperature /= (R3 - R1); | 1708 | temperature /= (R3 - R1); |
1711 | temperature = (temperature * 97) / 100 + TEMPERATURE_CALIB_KELVIN_OFFSET; | 1709 | temperature = |
1710 | (temperature * 97) / 100 + TEMPERATURE_CALIB_KELVIN_OFFSET; | ||
1712 | 1711 | ||
1713 | D_TEMP("Calibrated temperature: %dK, %dC\n", | 1712 | D_TEMP("Calibrated temperature: %dK, %dC\n", temperature, |
1714 | temperature, KELVIN_TO_CELSIUS(temperature)); | 1713 | KELVIN_TO_CELSIUS(temperature)); |
1715 | 1714 | ||
1716 | return temperature; | 1715 | return temperature; |
1717 | } | 1716 | } |
@@ -1728,7 +1727,8 @@ static int il4965_hw_get_temperature(struct il_priv *il) | |||
1728 | * Assumes caller will replace il->last_temperature once calibration | 1727 | * Assumes caller will replace il->last_temperature once calibration |
1729 | * executed. | 1728 | * executed. |
1730 | */ | 1729 | */ |
1731 | static int il4965_is_temp_calib_needed(struct il_priv *il) | 1730 | static int |
1731 | il4965_is_temp_calib_needed(struct il_priv *il) | ||
1732 | { | 1732 | { |
1733 | int temp_diff; | 1733 | int temp_diff; |
1734 | 1734 | ||
@@ -1758,7 +1758,8 @@ static int il4965_is_temp_calib_needed(struct il_priv *il) | |||
1758 | return 1; | 1758 | return 1; |
1759 | } | 1759 | } |
1760 | 1760 | ||
1761 | static void il4965_temperature_calib(struct il_priv *il) | 1761 | static void |
1762 | il4965_temperature_calib(struct il_priv *il) | ||
1762 | { | 1763 | { |
1763 | s32 temp; | 1764 | s32 temp; |
1764 | 1765 | ||
@@ -1768,26 +1769,25 @@ static void il4965_temperature_calib(struct il_priv *il) | |||
1768 | 1769 | ||
1769 | if (il->temperature != temp) { | 1770 | if (il->temperature != temp) { |
1770 | if (il->temperature) | 1771 | if (il->temperature) |
1771 | D_TEMP("Temperature changed " | 1772 | D_TEMP("Temperature changed " "from %dC to %dC\n", |
1772 | "from %dC to %dC\n", | 1773 | KELVIN_TO_CELSIUS(il->temperature), |
1773 | KELVIN_TO_CELSIUS(il->temperature), | 1774 | KELVIN_TO_CELSIUS(temp)); |
1774 | KELVIN_TO_CELSIUS(temp)); | ||
1775 | else | 1775 | else |
1776 | D_TEMP("Temperature " | 1776 | D_TEMP("Temperature " "initialized to %dC\n", |
1777 | "initialized to %dC\n", | 1777 | KELVIN_TO_CELSIUS(temp)); |
1778 | KELVIN_TO_CELSIUS(temp)); | ||
1779 | } | 1778 | } |
1780 | 1779 | ||
1781 | il->temperature = temp; | 1780 | il->temperature = temp; |
1782 | set_bit(S_TEMPERATURE, &il->status); | 1781 | set_bit(S_TEMPERATURE, &il->status); |
1783 | 1782 | ||
1784 | if (!il->disable_tx_power_cal && | 1783 | if (!il->disable_tx_power_cal && |
1785 | unlikely(!test_bit(S_SCANNING, &il->status)) && | 1784 | unlikely(!test_bit(S_SCANNING, &il->status)) && |
1786 | il4965_is_temp_calib_needed(il)) | 1785 | il4965_is_temp_calib_needed(il)) |
1787 | queue_work(il->workqueue, &il->txpower_work); | 1786 | queue_work(il->workqueue, &il->txpower_work); |
1788 | } | 1787 | } |
1789 | 1788 | ||
1790 | static u16 il4965_get_hcmd_size(u8 cmd_id, u16 len) | 1789 | static u16 |
1790 | il4965_get_hcmd_size(u8 cmd_id, u16 len) | ||
1791 | { | 1791 | { |
1792 | switch (cmd_id) { | 1792 | switch (cmd_id) { |
1793 | case C_RXON: | 1793 | case C_RXON: |
@@ -1797,8 +1797,8 @@ static u16 il4965_get_hcmd_size(u8 cmd_id, u16 len) | |||
1797 | } | 1797 | } |
1798 | } | 1798 | } |
1799 | 1799 | ||
1800 | static u16 il4965_build_addsta_hcmd(const struct il_addsta_cmd *cmd, | 1800 | static u16 |
1801 | u8 *data) | 1801 | il4965_build_addsta_hcmd(const struct il_addsta_cmd *cmd, u8 * data) |
1802 | { | 1802 | { |
1803 | struct il4965_addsta_cmd *addsta = (struct il4965_addsta_cmd *)data; | 1803 | struct il4965_addsta_cmd *addsta = (struct il4965_addsta_cmd *)data; |
1804 | addsta->mode = cmd->mode; | 1804 | addsta->mode = cmd->mode; |
@@ -1814,15 +1814,17 @@ static u16 il4965_build_addsta_hcmd(const struct il_addsta_cmd *cmd, | |||
1814 | addsta->reserved1 = cpu_to_le16(0); | 1814 | addsta->reserved1 = cpu_to_le16(0); |
1815 | addsta->reserved2 = cpu_to_le16(0); | 1815 | addsta->reserved2 = cpu_to_le16(0); |
1816 | 1816 | ||
1817 | return (u16)sizeof(struct il4965_addsta_cmd); | 1817 | return (u16) sizeof(struct il4965_addsta_cmd); |
1818 | } | 1818 | } |
1819 | 1819 | ||
1820 | static inline u32 il4965_get_scd_ssn(struct il4965_tx_resp *tx_resp) | 1820 | static inline u32 |
1821 | il4965_get_scd_ssn(struct il4965_tx_resp *tx_resp) | ||
1821 | { | 1822 | { |
1822 | return le32_to_cpup(&tx_resp->u.status + tx_resp->frame_count) & MAX_SN; | 1823 | return le32_to_cpup(&tx_resp->u.status + tx_resp->frame_count) & MAX_SN; |
1823 | } | 1824 | } |
1824 | 1825 | ||
1825 | static inline u32 il4965_tx_status_to_mac80211(u32 status) | 1826 | static inline u32 |
1827 | il4965_tx_status_to_mac80211(u32 status) | ||
1826 | { | 1828 | { |
1827 | status &= TX_STATUS_MSK; | 1829 | status &= TX_STATUS_MSK; |
1828 | 1830 | ||
@@ -1837,20 +1839,20 @@ static inline u32 il4965_tx_status_to_mac80211(u32 status) | |||
1837 | } | 1839 | } |
1838 | } | 1840 | } |
1839 | 1841 | ||
1840 | static inline bool il4965_is_tx_success(u32 status) | 1842 | static inline bool |
1843 | il4965_is_tx_success(u32 status) | ||
1841 | { | 1844 | { |
1842 | status &= TX_STATUS_MSK; | 1845 | status &= TX_STATUS_MSK; |
1843 | return (status == TX_STATUS_SUCCESS || | 1846 | return (status == TX_STATUS_SUCCESS || status == TX_STATUS_DIRECT_DONE); |
1844 | status == TX_STATUS_DIRECT_DONE); | ||
1845 | } | 1847 | } |
1846 | 1848 | ||
1847 | /** | 1849 | /** |
1848 | * il4965_tx_status_reply_tx - Handle Tx response for frames in aggregation queue | 1850 | * il4965_tx_status_reply_tx - Handle Tx response for frames in aggregation queue |
1849 | */ | 1851 | */ |
1850 | static int il4965_tx_status_reply_tx(struct il_priv *il, | 1852 | static int |
1851 | struct il_ht_agg *agg, | 1853 | il4965_tx_status_reply_tx(struct il_priv *il, struct il_ht_agg *agg, |
1852 | struct il4965_tx_resp *tx_resp, | 1854 | struct il4965_tx_resp *tx_resp, int txq_id, |
1853 | int txq_id, u16 start_idx) | 1855 | u16 start_idx) |
1854 | { | 1856 | { |
1855 | u16 status; | 1857 | u16 status; |
1856 | struct agg_tx_status *frame_status = tx_resp->u.agg_status; | 1858 | struct agg_tx_status *frame_status = tx_resp->u.agg_status; |
@@ -1874,7 +1876,7 @@ static int il4965_tx_status_reply_tx(struct il_priv *il, | |||
1874 | idx = start_idx; | 1876 | idx = start_idx; |
1875 | 1877 | ||
1876 | D_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n", | 1878 | D_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n", |
1877 | agg->frame_count, agg->start_idx, idx); | 1879 | agg->frame_count, agg->start_idx, idx); |
1878 | 1880 | ||
1879 | info = IEEE80211_SKB_CB(il->txq[txq_id].txb[idx].skb); | 1881 | info = IEEE80211_SKB_CB(il->txq[txq_id].txb[idx].skb); |
1880 | info->status.rates[0].count = tx_resp->failure_frame + 1; | 1882 | info->status.rates[0].count = tx_resp->failure_frame + 1; |
@@ -1882,8 +1884,8 @@ static int il4965_tx_status_reply_tx(struct il_priv *il, | |||
1882 | info->flags |= il4965_tx_status_to_mac80211(status); | 1884 | info->flags |= il4965_tx_status_to_mac80211(status); |
1883 | il4965_hwrate_to_tx_control(il, rate_n_flags, info); | 1885 | il4965_hwrate_to_tx_control(il, rate_n_flags, info); |
1884 | 1886 | ||
1885 | D_TX_REPLY("1 Frame 0x%x failure :%d\n", | 1887 | D_TX_REPLY("1 Frame 0x%x failure :%d\n", status & 0xff, |
1886 | status & 0xff, tx_resp->failure_frame); | 1888 | tx_resp->failure_frame); |
1887 | D_TX_REPLY("Rate Info rate_n_flags=%x\n", rate_n_flags); | 1889 | D_TX_REPLY("Rate Info rate_n_flags=%x\n", rate_n_flags); |
1888 | 1890 | ||
1889 | agg->wait_for_ba = 0; | 1891 | agg->wait_for_ba = 0; |
@@ -1896,36 +1898,35 @@ static int il4965_tx_status_reply_tx(struct il_priv *il, | |||
1896 | for (i = 0; i < agg->frame_count; i++) { | 1898 | for (i = 0; i < agg->frame_count; i++) { |
1897 | u16 sc; | 1899 | u16 sc; |
1898 | status = le16_to_cpu(frame_status[i].status); | 1900 | status = le16_to_cpu(frame_status[i].status); |
1899 | seq = le16_to_cpu(frame_status[i].sequence); | 1901 | seq = le16_to_cpu(frame_status[i].sequence); |
1900 | idx = SEQ_TO_IDX(seq); | 1902 | idx = SEQ_TO_IDX(seq); |
1901 | txq_id = SEQ_TO_QUEUE(seq); | 1903 | txq_id = SEQ_TO_QUEUE(seq); |
1902 | 1904 | ||
1903 | if (status & (AGG_TX_STATE_FEW_BYTES_MSK | | 1905 | if (status & |
1904 | AGG_TX_STATE_ABORT_MSK)) | 1906 | (AGG_TX_STATE_FEW_BYTES_MSK | |
1907 | AGG_TX_STATE_ABORT_MSK)) | ||
1905 | continue; | 1908 | continue; |
1906 | 1909 | ||
1907 | D_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n", | 1910 | D_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n", |
1908 | agg->frame_count, txq_id, idx); | 1911 | agg->frame_count, txq_id, idx); |
1909 | 1912 | ||
1910 | hdr = il_tx_queue_get_hdr(il, txq_id, idx); | 1913 | hdr = il_tx_queue_get_hdr(il, txq_id, idx); |
1911 | if (!hdr) { | 1914 | if (!hdr) { |
1912 | IL_ERR( | 1915 | IL_ERR("BUG_ON idx doesn't point to valid skb" |
1913 | "BUG_ON idx doesn't point to valid skb" | 1916 | " idx=%d, txq_id=%d\n", idx, txq_id); |
1914 | " idx=%d, txq_id=%d\n", idx, txq_id); | ||
1915 | return -1; | 1917 | return -1; |
1916 | } | 1918 | } |
1917 | 1919 | ||
1918 | sc = le16_to_cpu(hdr->seq_ctrl); | 1920 | sc = le16_to_cpu(hdr->seq_ctrl); |
1919 | if (idx != (SEQ_TO_SN(sc) & 0xff)) { | 1921 | if (idx != (SEQ_TO_SN(sc) & 0xff)) { |
1920 | IL_ERR( | 1922 | IL_ERR("BUG_ON idx doesn't match seq control" |
1921 | "BUG_ON idx doesn't match seq control" | 1923 | " idx=%d, seq_idx=%d, seq=%d\n", idx, |
1922 | " idx=%d, seq_idx=%d, seq=%d\n", | 1924 | SEQ_TO_SN(sc), hdr->seq_ctrl); |
1923 | idx, SEQ_TO_SN(sc), hdr->seq_ctrl); | ||
1924 | return -1; | 1925 | return -1; |
1925 | } | 1926 | } |
1926 | 1927 | ||
1927 | D_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n", | 1928 | D_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n", i, idx, |
1928 | i, idx, SEQ_TO_SN(sc)); | 1929 | SEQ_TO_SN(sc)); |
1929 | 1930 | ||
1930 | sh = idx - start; | 1931 | sh = idx - start; |
1931 | if (sh > 64) { | 1932 | if (sh > 64) { |
@@ -1934,7 +1935,7 @@ static int il4965_tx_status_reply_tx(struct il_priv *il, | |||
1934 | sh = 0; | 1935 | sh = 0; |
1935 | start = idx; | 1936 | start = idx; |
1936 | } else if (sh < -64) | 1937 | } else if (sh < -64) |
1937 | sh = 0xff - (start - idx); | 1938 | sh = 0xff - (start - idx); |
1938 | else if (sh < 0) { | 1939 | else if (sh < 0) { |
1939 | sh = start - idx; | 1940 | sh = start - idx; |
1940 | start = idx; | 1941 | start = idx; |
@@ -1942,15 +1943,15 @@ static int il4965_tx_status_reply_tx(struct il_priv *il, | |||
1942 | sh = 0; | 1943 | sh = 0; |
1943 | } | 1944 | } |
1944 | bitmap |= 1ULL << sh; | 1945 | bitmap |= 1ULL << sh; |
1945 | D_TX_REPLY("start=%d bitmap=0x%llx\n", | 1946 | D_TX_REPLY("start=%d bitmap=0x%llx\n", start, |
1946 | start, (unsigned long long)bitmap); | 1947 | (unsigned long long)bitmap); |
1947 | } | 1948 | } |
1948 | 1949 | ||
1949 | agg->bitmap = bitmap; | 1950 | agg->bitmap = bitmap; |
1950 | agg->start_idx = start; | 1951 | agg->start_idx = start; |
1951 | D_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n", | 1952 | D_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n", |
1952 | agg->frame_count, agg->start_idx, | 1953 | agg->frame_count, agg->start_idx, |
1953 | (unsigned long long)agg->bitmap); | 1954 | (unsigned long long)agg->bitmap); |
1954 | 1955 | ||
1955 | if (bitmap) | 1956 | if (bitmap) |
1956 | agg->wait_for_ba = 1; | 1957 | agg->wait_for_ba = 1; |
@@ -1958,7 +1959,8 @@ static int il4965_tx_status_reply_tx(struct il_priv *il, | |||
1958 | return 0; | 1959 | return 0; |
1959 | } | 1960 | } |
1960 | 1961 | ||
1961 | static u8 il4965_find_station(struct il_priv *il, const u8 *addr) | 1962 | static u8 |
1963 | il4965_find_station(struct il_priv *il, const u8 * addr) | ||
1962 | { | 1964 | { |
1963 | int i; | 1965 | int i; |
1964 | int start = 0; | 1966 | int start = 0; |
@@ -1974,16 +1976,14 @@ static u8 il4965_find_station(struct il_priv *il, const u8 *addr) | |||
1974 | spin_lock_irqsave(&il->sta_lock, flags); | 1976 | spin_lock_irqsave(&il->sta_lock, flags); |
1975 | for (i = start; i < il->hw_params.max_stations; i++) | 1977 | for (i = start; i < il->hw_params.max_stations; i++) |
1976 | if (il->stations[i].used && | 1978 | if (il->stations[i].used && |
1977 | (!compare_ether_addr(il->stations[i].sta.sta.addr, | 1979 | (!compare_ether_addr(il->stations[i].sta.sta.addr, addr))) { |
1978 | addr))) { | ||
1979 | ret = i; | 1980 | ret = i; |
1980 | goto out; | 1981 | goto out; |
1981 | } | 1982 | } |
1982 | 1983 | ||
1983 | D_ASSOC("can not find STA %pM total %d\n", | 1984 | D_ASSOC("can not find STA %pM total %d\n", addr, il->num_stations); |
1984 | addr, il->num_stations); | ||
1985 | 1985 | ||
1986 | out: | 1986 | out: |
1987 | /* | 1987 | /* |
1988 | * It may be possible that more commands interacting with stations | 1988 | * It may be possible that more commands interacting with stations |
1989 | * arrive before we completed processing the adding of | 1989 | * arrive before we completed processing the adding of |
@@ -1994,14 +1994,15 @@ static u8 il4965_find_station(struct il_priv *il, const u8 *addr) | |||
1994 | ((il->stations[ret].used & IL_STA_UCODE_ACTIVE) && | 1994 | ((il->stations[ret].used & IL_STA_UCODE_ACTIVE) && |
1995 | (il->stations[ret].used & IL_STA_UCODE_INPROGRESS)))) { | 1995 | (il->stations[ret].used & IL_STA_UCODE_INPROGRESS)))) { |
1996 | IL_ERR("Requested station info for sta %d before ready.\n", | 1996 | IL_ERR("Requested station info for sta %d before ready.\n", |
1997 | ret); | 1997 | ret); |
1998 | ret = IL_INVALID_STATION; | 1998 | ret = IL_INVALID_STATION; |
1999 | } | 1999 | } |
2000 | spin_unlock_irqrestore(&il->sta_lock, flags); | 2000 | spin_unlock_irqrestore(&il->sta_lock, flags); |
2001 | return ret; | 2001 | return ret; |
2002 | } | 2002 | } |
2003 | 2003 | ||
2004 | static int il4965_get_ra_sta_id(struct il_priv *il, struct ieee80211_hdr *hdr) | 2004 | static int |
2005 | il4965_get_ra_sta_id(struct il_priv *il, struct ieee80211_hdr *hdr) | ||
2005 | { | 2006 | { |
2006 | if (il->iw_mode == NL80211_IFTYPE_STATION) { | 2007 | if (il->iw_mode == NL80211_IFTYPE_STATION) { |
2007 | return IL_AP_ID; | 2008 | return IL_AP_ID; |
@@ -2014,8 +2015,8 @@ static int il4965_get_ra_sta_id(struct il_priv *il, struct ieee80211_hdr *hdr) | |||
2014 | /** | 2015 | /** |
2015 | * il4965_hdl_tx - Handle standard (non-aggregation) Tx response | 2016 | * il4965_hdl_tx - Handle standard (non-aggregation) Tx response |
2016 | */ | 2017 | */ |
2017 | static void il4965_hdl_tx(struct il_priv *il, | 2018 | static void |
2018 | struct il_rx_buf *rxb) | 2019 | il4965_hdl_tx(struct il_priv *il, struct il_rx_buf *rxb) |
2019 | { | 2020 | { |
2020 | struct il_rx_pkt *pkt = rxb_addr(rxb); | 2021 | struct il_rx_pkt *pkt = rxb_addr(rxb); |
2021 | u16 sequence = le16_to_cpu(pkt->hdr.sequence); | 2022 | u16 sequence = le16_to_cpu(pkt->hdr.sequence); |
@@ -2025,7 +2026,7 @@ static void il4965_hdl_tx(struct il_priv *il, | |||
2025 | struct ieee80211_hdr *hdr; | 2026 | struct ieee80211_hdr *hdr; |
2026 | struct ieee80211_tx_info *info; | 2027 | struct ieee80211_tx_info *info; |
2027 | struct il4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0]; | 2028 | struct il4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0]; |
2028 | u32 status = le32_to_cpu(tx_resp->u.status); | 2029 | u32 status = le32_to_cpu(tx_resp->u.status); |
2029 | int uninitialized_var(tid); | 2030 | int uninitialized_var(tid); |
2030 | int sta_id; | 2031 | int sta_id; |
2031 | int freed; | 2032 | int freed; |
@@ -2034,9 +2035,8 @@ static void il4965_hdl_tx(struct il_priv *il, | |||
2034 | 2035 | ||
2035 | if (idx >= txq->q.n_bd || il_queue_used(&txq->q, idx) == 0) { | 2036 | if (idx >= txq->q.n_bd || il_queue_used(&txq->q, idx) == 0) { |
2036 | IL_ERR("Read idx for DMA queue txq_id (%d) idx %d " | 2037 | IL_ERR("Read idx for DMA queue txq_id (%d) idx %d " |
2037 | "is out of range [0-%d] %d %d\n", txq_id, | 2038 | "is out of range [0-%d] %d %d\n", txq_id, idx, |
2038 | idx, txq->q.n_bd, txq->q.write_ptr, | 2039 | txq->q.n_bd, txq->q.write_ptr, txq->q.read_ptr); |
2039 | txq->q.read_ptr); | ||
2040 | return; | 2040 | return; |
2041 | } | 2041 | } |
2042 | 2042 | ||
@@ -2067,18 +2067,18 @@ static void il4965_hdl_tx(struct il_priv *il, | |||
2067 | il4965_tx_status_reply_tx(il, agg, tx_resp, txq_id, idx); | 2067 | il4965_tx_status_reply_tx(il, agg, tx_resp, txq_id, idx); |
2068 | 2068 | ||
2069 | /* check if BAR is needed */ | 2069 | /* check if BAR is needed */ |
2070 | if ((tx_resp->frame_count == 1) && !il4965_is_tx_success(status)) | 2070 | if ((tx_resp->frame_count == 1) && |
2071 | !il4965_is_tx_success(status)) | ||
2071 | info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK; | 2072 | info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK; |
2072 | 2073 | ||
2073 | if (txq->q.read_ptr != (scd_ssn & 0xff)) { | 2074 | if (txq->q.read_ptr != (scd_ssn & 0xff)) { |
2074 | idx = il_queue_dec_wrap(scd_ssn & 0xff, | 2075 | idx = il_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd); |
2075 | txq->q.n_bd); | ||
2076 | D_TX_REPLY("Retry scheduler reclaim scd_ssn " | 2076 | D_TX_REPLY("Retry scheduler reclaim scd_ssn " |
2077 | "%d idx %d\n", scd_ssn , idx); | 2077 | "%d idx %d\n", scd_ssn, idx); |
2078 | freed = il4965_tx_queue_reclaim(il, txq_id, idx); | 2078 | freed = il4965_tx_queue_reclaim(il, txq_id, idx); |
2079 | if (qc) | 2079 | if (qc) |
2080 | il4965_free_tfds_in_queue(il, sta_id, | 2080 | il4965_free_tfds_in_queue(il, sta_id, tid, |
2081 | tid, freed); | 2081 | freed); |
2082 | 2082 | ||
2083 | if (il->mac80211_registered && | 2083 | if (il->mac80211_registered && |
2084 | il_queue_space(&txq->q) > txq->q.low_mark && | 2084 | il_queue_space(&txq->q) > txq->q.low_mark && |
@@ -2089,15 +2089,14 @@ static void il4965_hdl_tx(struct il_priv *il, | |||
2089 | info->status.rates[0].count = tx_resp->failure_frame + 1; | 2089 | info->status.rates[0].count = tx_resp->failure_frame + 1; |
2090 | info->flags |= il4965_tx_status_to_mac80211(status); | 2090 | info->flags |= il4965_tx_status_to_mac80211(status); |
2091 | il4965_hwrate_to_tx_control(il, | 2091 | il4965_hwrate_to_tx_control(il, |
2092 | le32_to_cpu(tx_resp->rate_n_flags), | 2092 | le32_to_cpu(tx_resp->rate_n_flags), |
2093 | info); | 2093 | info); |
2094 | 2094 | ||
2095 | D_TX_REPLY("TXQ %d status %s (0x%08x) " | 2095 | D_TX_REPLY("TXQ %d status %s (0x%08x) " |
2096 | "rate_n_flags 0x%x retries %d\n", | 2096 | "rate_n_flags 0x%x retries %d\n", txq_id, |
2097 | txq_id, | 2097 | il4965_get_tx_fail_reason(status), status, |
2098 | il4965_get_tx_fail_reason(status), status, | 2098 | le32_to_cpu(tx_resp->rate_n_flags), |
2099 | le32_to_cpu(tx_resp->rate_n_flags), | 2099 | tx_resp->failure_frame); |
2100 | tx_resp->failure_frame); | ||
2101 | 2100 | ||
2102 | freed = il4965_tx_queue_reclaim(il, txq_id, idx); | 2101 | freed = il4965_tx_queue_reclaim(il, txq_id, idx); |
2103 | if (qc && likely(sta_id != IL_INVALID_STATION)) | 2102 | if (qc && likely(sta_id != IL_INVALID_STATION)) |
@@ -2117,27 +2116,27 @@ static void il4965_hdl_tx(struct il_priv *il, | |||
2117 | spin_unlock_irqrestore(&il->sta_lock, flags); | 2116 | spin_unlock_irqrestore(&il->sta_lock, flags); |
2118 | } | 2117 | } |
2119 | 2118 | ||
2120 | static void il4965_hdl_beacon(struct il_priv *il, | 2119 | static void |
2121 | struct il_rx_buf *rxb) | 2120 | il4965_hdl_beacon(struct il_priv *il, struct il_rx_buf *rxb) |
2122 | { | 2121 | { |
2123 | struct il_rx_pkt *pkt = rxb_addr(rxb); | 2122 | struct il_rx_pkt *pkt = rxb_addr(rxb); |
2124 | struct il4965_beacon_notif *beacon = (void *)pkt->u.raw; | 2123 | struct il4965_beacon_notif *beacon = (void *)pkt->u.raw; |
2125 | u8 rate __maybe_unused = | 2124 | u8 rate __maybe_unused = |
2126 | il4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags); | 2125 | il4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags); |
2127 | 2126 | ||
2128 | D_RX("beacon status %#x, retries:%d ibssmgr:%d " | 2127 | D_RX("beacon status %#x, retries:%d ibssmgr:%d " |
2129 | "tsf:0x%.8x%.8x rate:%d\n", | 2128 | "tsf:0x%.8x%.8x rate:%d\n", |
2130 | le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK, | 2129 | le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK, |
2131 | beacon->beacon_notify_hdr.failure_frame, | 2130 | beacon->beacon_notify_hdr.failure_frame, |
2132 | le32_to_cpu(beacon->ibss_mgr_status), | 2131 | le32_to_cpu(beacon->ibss_mgr_status), |
2133 | le32_to_cpu(beacon->high_tsf), | 2132 | le32_to_cpu(beacon->high_tsf), le32_to_cpu(beacon->low_tsf), rate); |
2134 | le32_to_cpu(beacon->low_tsf), rate); | ||
2135 | 2133 | ||
2136 | il->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status); | 2134 | il->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status); |
2137 | } | 2135 | } |
2138 | 2136 | ||
2139 | /* Set up 4965-specific Rx frame reply handlers */ | 2137 | /* Set up 4965-specific Rx frame reply handlers */ |
2140 | static void il4965_handler_setup(struct il_priv *il) | 2138 | static void |
2139 | il4965_handler_setup(struct il_priv *il) | ||
2141 | { | 2140 | { |
2142 | /* Legacy Rx frames */ | 2141 | /* Legacy Rx frames */ |
2143 | il->handlers[N_RX] = il4965_hdl_rx; | 2142 | il->handlers[N_RX] = il4965_hdl_rx; |
@@ -2152,7 +2151,8 @@ static struct il_hcmd_ops il4965_hcmd = { | |||
2152 | .set_rxon_chain = il4965_set_rxon_chain, | 2151 | .set_rxon_chain = il4965_set_rxon_chain, |
2153 | }; | 2152 | }; |
2154 | 2153 | ||
2155 | static void il4965_post_scan(struct il_priv *il) | 2154 | static void |
2155 | il4965_post_scan(struct il_priv *il) | ||
2156 | { | 2156 | { |
2157 | struct il_rxon_context *ctx = &il->ctx; | 2157 | struct il_rxon_context *ctx = &il->ctx; |
2158 | 2158 | ||
@@ -2164,7 +2164,8 @@ static void il4965_post_scan(struct il_priv *il) | |||
2164 | il_commit_rxon(il, ctx); | 2164 | il_commit_rxon(il, ctx); |
2165 | } | 2165 | } |
2166 | 2166 | ||
2167 | static void il4965_post_associate(struct il_priv *il) | 2167 | static void |
2168 | il4965_post_associate(struct il_priv *il) | ||
2168 | { | 2169 | { |
2169 | struct il_rxon_context *ctx = &il->ctx; | 2170 | struct il_rxon_context *ctx = &il->ctx; |
2170 | struct ieee80211_vif *vif = ctx->vif; | 2171 | struct ieee80211_vif *vif = ctx->vif; |
@@ -2186,8 +2187,7 @@ static void il4965_post_associate(struct il_priv *il) | |||
2186 | 2187 | ||
2187 | ret = il_send_rxon_timing(il, ctx); | 2188 | ret = il_send_rxon_timing(il, ctx); |
2188 | if (ret) | 2189 | if (ret) |
2189 | IL_WARN("RXON timing - " | 2190 | IL_WARN("RXON timing - " "Attempting to continue.\n"); |
2190 | "Attempting to continue.\n"); | ||
2191 | 2191 | ||
2192 | ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK; | 2192 | ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK; |
2193 | 2193 | ||
@@ -2198,8 +2198,8 @@ static void il4965_post_associate(struct il_priv *il) | |||
2198 | 2198 | ||
2199 | ctx->staging.assoc_id = cpu_to_le16(vif->bss_conf.aid); | 2199 | ctx->staging.assoc_id = cpu_to_le16(vif->bss_conf.aid); |
2200 | 2200 | ||
2201 | D_ASSOC("assoc id %d beacon interval %d\n", | 2201 | D_ASSOC("assoc id %d beacon interval %d\n", vif->bss_conf.aid, |
2202 | vif->bss_conf.aid, vif->bss_conf.beacon_int); | 2202 | vif->bss_conf.beacon_int); |
2203 | 2203 | ||
2204 | if (vif->bss_conf.use_short_preamble) | 2204 | if (vif->bss_conf.use_short_preamble) |
2205 | ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; | 2205 | ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; |
@@ -2215,8 +2215,8 @@ static void il4965_post_associate(struct il_priv *il) | |||
2215 | 2215 | ||
2216 | il_commit_rxon(il, ctx); | 2216 | il_commit_rxon(il, ctx); |
2217 | 2217 | ||
2218 | D_ASSOC("Associated as %d to: %pM\n", | 2218 | D_ASSOC("Associated as %d to: %pM\n", vif->bss_conf.aid, |
2219 | vif->bss_conf.aid, ctx->active.bssid_addr); | 2219 | ctx->active.bssid_addr); |
2220 | 2220 | ||
2221 | switch (vif->type) { | 2221 | switch (vif->type) { |
2222 | case NL80211_IFTYPE_STATION: | 2222 | case NL80211_IFTYPE_STATION: |
@@ -2225,8 +2225,8 @@ static void il4965_post_associate(struct il_priv *il) | |||
2225 | il4965_send_beacon_cmd(il); | 2225 | il4965_send_beacon_cmd(il); |
2226 | break; | 2226 | break; |
2227 | default: | 2227 | default: |
2228 | IL_ERR("%s Should not be called in %d mode\n", | 2228 | IL_ERR("%s Should not be called in %d mode\n", __func__, |
2229 | __func__, vif->type); | 2229 | vif->type); |
2230 | break; | 2230 | break; |
2231 | } | 2231 | } |
2232 | 2232 | ||
@@ -2241,7 +2241,8 @@ static void il4965_post_associate(struct il_priv *il) | |||
2241 | il->start_calib = 1; | 2241 | il->start_calib = 1; |
2242 | } | 2242 | } |
2243 | 2243 | ||
2244 | static void il4965_config_ap(struct il_priv *il) | 2244 | static void |
2245 | il4965_config_ap(struct il_priv *il) | ||
2245 | { | 2246 | { |
2246 | struct il_rxon_context *ctx = &il->ctx; | 2247 | struct il_rxon_context *ctx = &il->ctx; |
2247 | struct ieee80211_vif *vif = ctx->vif; | 2248 | struct ieee80211_vif *vif = ctx->vif; |
@@ -2263,11 +2264,10 @@ static void il4965_config_ap(struct il_priv *il) | |||
2263 | ret = il_send_rxon_timing(il, ctx); | 2264 | ret = il_send_rxon_timing(il, ctx); |
2264 | if (ret) | 2265 | if (ret) |
2265 | IL_WARN("RXON timing failed - " | 2266 | IL_WARN("RXON timing failed - " |
2266 | "Attempting to continue.\n"); | 2267 | "Attempting to continue.\n"); |
2267 | 2268 | ||
2268 | /* AP has all antennas */ | 2269 | /* AP has all antennas */ |
2269 | il->chain_noise_data.active_chains = | 2270 | il->chain_noise_data.active_chains = il->hw_params.valid_rx_ant; |
2270 | il->hw_params.valid_rx_ant; | ||
2271 | il_set_rxon_ht(il, &il->current_ht_config); | 2271 | il_set_rxon_ht(il, &il->current_ht_config); |
2272 | if (il->cfg->ops->hcmd->set_rxon_chain) | 2272 | if (il->cfg->ops->hcmd->set_rxon_chain) |
2273 | il->cfg->ops->hcmd->set_rxon_chain(il, ctx); | 2273 | il->cfg->ops->hcmd->set_rxon_chain(il, ctx); |
@@ -2275,19 +2275,15 @@ static void il4965_config_ap(struct il_priv *il) | |||
2275 | ctx->staging.assoc_id = 0; | 2275 | ctx->staging.assoc_id = 0; |
2276 | 2276 | ||
2277 | if (vif->bss_conf.use_short_preamble) | 2277 | if (vif->bss_conf.use_short_preamble) |
2278 | ctx->staging.flags |= | 2278 | ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; |
2279 | RXON_FLG_SHORT_PREAMBLE_MSK; | ||
2280 | else | 2279 | else |
2281 | ctx->staging.flags &= | 2280 | ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; |
2282 | ~RXON_FLG_SHORT_PREAMBLE_MSK; | ||
2283 | 2281 | ||
2284 | if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK) { | 2282 | if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK) { |
2285 | if (vif->bss_conf.use_short_slot) | 2283 | if (vif->bss_conf.use_short_slot) |
2286 | ctx->staging.flags |= | 2284 | ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK; |
2287 | RXON_FLG_SHORT_SLOT_MSK; | ||
2288 | else | 2285 | else |
2289 | ctx->staging.flags &= | 2286 | ctx->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK; |
2290 | ~RXON_FLG_SHORT_SLOT_MSK; | ||
2291 | } | 2287 | } |
2292 | /* need to send beacon cmd before committing assoc RXON! */ | 2288 | /* need to send beacon cmd before committing assoc RXON! */ |
2293 | il4965_send_beacon_cmd(il); | 2289 | il4965_send_beacon_cmd(il); |
@@ -2319,32 +2315,31 @@ static struct il_lib_ops il4965_lib = { | |||
2319 | .dump_fh = il4965_dump_fh, | 2315 | .dump_fh = il4965_dump_fh, |
2320 | .set_channel_switch = il4965_hw_channel_switch, | 2316 | .set_channel_switch = il4965_hw_channel_switch, |
2321 | .apm_ops = { | 2317 | .apm_ops = { |
2322 | .init = il_apm_init, | 2318 | .init = il_apm_init, |
2323 | .config = il4965_nic_config, | 2319 | .config = il4965_nic_config, |
2324 | }, | 2320 | }, |
2325 | .eeprom_ops = { | 2321 | .eeprom_ops = { |
2326 | .regulatory_bands = { | 2322 | .regulatory_bands = { |
2327 | EEPROM_REGULATORY_BAND_1_CHANNELS, | 2323 | EEPROM_REGULATORY_BAND_1_CHANNELS, |
2328 | EEPROM_REGULATORY_BAND_2_CHANNELS, | 2324 | EEPROM_REGULATORY_BAND_2_CHANNELS, |
2329 | EEPROM_REGULATORY_BAND_3_CHANNELS, | 2325 | EEPROM_REGULATORY_BAND_3_CHANNELS, |
2330 | EEPROM_REGULATORY_BAND_4_CHANNELS, | 2326 | EEPROM_REGULATORY_BAND_4_CHANNELS, |
2331 | EEPROM_REGULATORY_BAND_5_CHANNELS, | 2327 | EEPROM_REGULATORY_BAND_5_CHANNELS, |
2332 | EEPROM_4965_REGULATORY_BAND_24_HT40_CHANNELS, | 2328 | EEPROM_4965_REGULATORY_BAND_24_HT40_CHANNELS, |
2333 | EEPROM_4965_REGULATORY_BAND_52_HT40_CHANNELS | 2329 | EEPROM_4965_REGULATORY_BAND_52_HT40_CHANNELS}, |
2334 | }, | 2330 | .acquire_semaphore = il4965_eeprom_acquire_semaphore, |
2335 | .acquire_semaphore = il4965_eeprom_acquire_semaphore, | 2331 | .release_semaphore = il4965_eeprom_release_semaphore, |
2336 | .release_semaphore = il4965_eeprom_release_semaphore, | 2332 | }, |
2337 | }, | 2333 | .send_tx_power = il4965_send_tx_power, |
2338 | .send_tx_power = il4965_send_tx_power, | ||
2339 | .update_chain_flags = il4965_update_chain_flags, | 2334 | .update_chain_flags = il4965_update_chain_flags, |
2340 | .temp_ops = { | 2335 | .temp_ops = { |
2341 | .temperature = il4965_temperature_calib, | 2336 | .temperature = il4965_temperature_calib, |
2342 | }, | 2337 | }, |
2343 | .debugfs_ops = { | 2338 | .debugfs_ops = { |
2344 | .rx_stats_read = il4965_ucode_rx_stats_read, | 2339 | .rx_stats_read = il4965_ucode_rx_stats_read, |
2345 | .tx_stats_read = il4965_ucode_tx_stats_read, | 2340 | .tx_stats_read = il4965_ucode_tx_stats_read, |
2346 | .general_stats_read = il4965_ucode_general_stats_read, | 2341 | .general_stats_read = il4965_ucode_general_stats_read, |
2347 | }, | 2342 | }, |
2348 | }; | 2343 | }; |
2349 | 2344 | ||
2350 | static const struct il_legacy_ops il4965_legacy_ops = { | 2345 | static const struct il_legacy_ops il4965_legacy_ops = { |
@@ -2406,7 +2401,7 @@ struct il_cfg il4965_cfg = { | |||
2406 | .fw_name_pre = IL4965_FW_PRE, | 2401 | .fw_name_pre = IL4965_FW_PRE, |
2407 | .ucode_api_max = IL4965_UCODE_API_MAX, | 2402 | .ucode_api_max = IL4965_UCODE_API_MAX, |
2408 | .ucode_api_min = IL4965_UCODE_API_MIN, | 2403 | .ucode_api_min = IL4965_UCODE_API_MIN, |
2409 | .sku = IL_SKU_A|IL_SKU_G|IL_SKU_N, | 2404 | .sku = IL_SKU_A | IL_SKU_G | IL_SKU_N, |
2410 | .valid_tx_ant = ANT_AB, | 2405 | .valid_tx_ant = ANT_AB, |
2411 | .valid_rx_ant = ANT_ABC, | 2406 | .valid_rx_ant = ANT_ABC, |
2412 | .eeprom_ver = EEPROM_4965_EEPROM_VERSION, | 2407 | .eeprom_ver = EEPROM_4965_EEPROM_VERSION, |
diff --git a/drivers/net/wireless/iwlegacy/4965.h b/drivers/net/wireless/iwlegacy/4965.h index a4e256bb5061..78eae22c8f29 100644 --- a/drivers/net/wireless/iwlegacy/4965.h +++ b/drivers/net/wireless/iwlegacy/4965.h | |||
@@ -44,19 +44,17 @@ extern struct il_mod_params il4965_mod_params; | |||
44 | extern struct ieee80211_ops il4965_hw_ops; | 44 | extern struct ieee80211_ops il4965_hw_ops; |
45 | 45 | ||
46 | /* tx queue */ | 46 | /* tx queue */ |
47 | void il4965_free_tfds_in_queue(struct il_priv *il, | 47 | void il4965_free_tfds_in_queue(struct il_priv *il, int sta_id, int tid, |
48 | int sta_id, int tid, int freed); | 48 | int freed); |
49 | 49 | ||
50 | /* RXON */ | 50 | /* RXON */ |
51 | void il4965_set_rxon_chain(struct il_priv *il, | 51 | void il4965_set_rxon_chain(struct il_priv *il, struct il_rxon_context *ctx); |
52 | struct il_rxon_context *ctx); | ||
53 | 52 | ||
54 | /* uCode */ | 53 | /* uCode */ |
55 | int il4965_verify_ucode(struct il_priv *il); | 54 | int il4965_verify_ucode(struct il_priv *il); |
56 | 55 | ||
57 | /* lib */ | 56 | /* lib */ |
58 | void il4965_check_abort_status(struct il_priv *il, | 57 | void il4965_check_abort_status(struct il_priv *il, u8 frame_count, u32 status); |
59 | u8 frame_count, u32 status); | ||
60 | 58 | ||
61 | void il4965_rx_queue_reset(struct il_priv *il, struct il_rx_queue *rxq); | 59 | void il4965_rx_queue_reset(struct il_priv *il, struct il_rx_queue *rxq); |
62 | int il4965_rx_init(struct il_priv *il, struct il_rx_queue *rxq); | 60 | int il4965_rx_init(struct il_priv *il, struct il_rx_queue *rxq); |
@@ -70,30 +68,24 @@ void il4965_rx_replenish_now(struct il_priv *il); | |||
70 | void il4965_rx_queue_free(struct il_priv *il, struct il_rx_queue *rxq); | 68 | void il4965_rx_queue_free(struct il_priv *il, struct il_rx_queue *rxq); |
71 | int il4965_rxq_stop(struct il_priv *il); | 69 | int il4965_rxq_stop(struct il_priv *il); |
72 | int il4965_hwrate_to_mac80211_idx(u32 rate_n_flags, enum ieee80211_band band); | 70 | int il4965_hwrate_to_mac80211_idx(u32 rate_n_flags, enum ieee80211_band band); |
73 | void il4965_hdl_rx(struct il_priv *il, | 71 | void il4965_hdl_rx(struct il_priv *il, struct il_rx_buf *rxb); |
74 | struct il_rx_buf *rxb); | 72 | void il4965_hdl_rx_phy(struct il_priv *il, struct il_rx_buf *rxb); |
75 | void il4965_hdl_rx_phy(struct il_priv *il, | ||
76 | struct il_rx_buf *rxb); | ||
77 | void il4965_rx_handle(struct il_priv *il); | 73 | void il4965_rx_handle(struct il_priv *il); |
78 | 74 | ||
79 | /* tx */ | 75 | /* tx */ |
80 | void il4965_hw_txq_free_tfd(struct il_priv *il, struct il_tx_queue *txq); | 76 | void il4965_hw_txq_free_tfd(struct il_priv *il, struct il_tx_queue *txq); |
81 | int il4965_hw_txq_attach_buf_to_tfd(struct il_priv *il, | 77 | int il4965_hw_txq_attach_buf_to_tfd(struct il_priv *il, struct il_tx_queue *txq, |
82 | struct il_tx_queue *txq, | 78 | dma_addr_t addr, u16 len, u8 reset, u8 pad); |
83 | dma_addr_t addr, u16 len, u8 reset, u8 pad); | 79 | int il4965_hw_tx_queue_init(struct il_priv *il, struct il_tx_queue *txq); |
84 | int il4965_hw_tx_queue_init(struct il_priv *il, | ||
85 | struct il_tx_queue *txq); | ||
86 | void il4965_hwrate_to_tx_control(struct il_priv *il, u32 rate_n_flags, | 80 | void il4965_hwrate_to_tx_control(struct il_priv *il, u32 rate_n_flags, |
87 | struct ieee80211_tx_info *info); | 81 | struct ieee80211_tx_info *info); |
88 | int il4965_tx_skb(struct il_priv *il, struct sk_buff *skb); | 82 | int il4965_tx_skb(struct il_priv *il, struct sk_buff *skb); |
89 | int il4965_tx_agg_start(struct il_priv *il, struct ieee80211_vif *vif, | 83 | int il4965_tx_agg_start(struct il_priv *il, struct ieee80211_vif *vif, |
90 | struct ieee80211_sta *sta, u16 tid, u16 *ssn); | 84 | struct ieee80211_sta *sta, u16 tid, u16 * ssn); |
91 | int il4965_tx_agg_stop(struct il_priv *il, struct ieee80211_vif *vif, | 85 | int il4965_tx_agg_stop(struct il_priv *il, struct ieee80211_vif *vif, |
92 | struct ieee80211_sta *sta, u16 tid); | 86 | struct ieee80211_sta *sta, u16 tid); |
93 | int il4965_txq_check_empty(struct il_priv *il, | 87 | int il4965_txq_check_empty(struct il_priv *il, int sta_id, u8 tid, int txq_id); |
94 | int sta_id, u8 tid, int txq_id); | 88 | void il4965_hdl_compressed_ba(struct il_priv *il, struct il_rx_buf *rxb); |
95 | void il4965_hdl_compressed_ba(struct il_priv *il, | ||
96 | struct il_rx_buf *rxb); | ||
97 | int il4965_tx_queue_reclaim(struct il_priv *il, int txq_id, int idx); | 89 | int il4965_tx_queue_reclaim(struct il_priv *il, int txq_id, int idx); |
98 | void il4965_hw_txq_ctx_free(struct il_priv *il); | 90 | void il4965_hw_txq_ctx_free(struct il_priv *il); |
99 | int il4965_txq_ctx_alloc(struct il_priv *il); | 91 | int il4965_txq_ctx_alloc(struct il_priv *il); |
@@ -112,28 +104,23 @@ void il4965_set_wr_ptrs(struct il_priv *il, int txq_id, u32 idx); | |||
112 | * | 104 | * |
113 | * NOTE: Acquire il->lock before calling this function ! | 105 | * NOTE: Acquire il->lock before calling this function ! |
114 | */ | 106 | */ |
115 | void il4965_tx_queue_set_status(struct il_priv *il, | 107 | void il4965_tx_queue_set_status(struct il_priv *il, struct il_tx_queue *txq, |
116 | struct il_tx_queue *txq, | 108 | int tx_fifo_id, int scd_retry); |
117 | int tx_fifo_id, int scd_retry); | ||
118 | 109 | ||
119 | u8 il4965_toggle_tx_ant(struct il_priv *il, u8 ant_idx, u8 valid); | 110 | u8 il4965_toggle_tx_ant(struct il_priv *il, u8 ant_idx, u8 valid); |
120 | 111 | ||
121 | /* rx */ | 112 | /* rx */ |
122 | void il4965_hdl_missed_beacon(struct il_priv *il, | 113 | void il4965_hdl_missed_beacon(struct il_priv *il, struct il_rx_buf *rxb); |
123 | struct il_rx_buf *rxb); | 114 | bool il4965_good_plcp_health(struct il_priv *il, struct il_rx_pkt *pkt); |
124 | bool il4965_good_plcp_health(struct il_priv *il, | 115 | void il4965_hdl_stats(struct il_priv *il, struct il_rx_buf *rxb); |
125 | struct il_rx_pkt *pkt); | 116 | void il4965_hdl_c_stats(struct il_priv *il, struct il_rx_buf *rxb); |
126 | void il4965_hdl_stats(struct il_priv *il, | ||
127 | struct il_rx_buf *rxb); | ||
128 | void il4965_hdl_c_stats(struct il_priv *il, | ||
129 | struct il_rx_buf *rxb); | ||
130 | 117 | ||
131 | /* scan */ | 118 | /* scan */ |
132 | int il4965_request_scan(struct il_priv *il, struct ieee80211_vif *vif); | 119 | int il4965_request_scan(struct il_priv *il, struct ieee80211_vif *vif); |
133 | 120 | ||
134 | /* station mgmt */ | 121 | /* station mgmt */ |
135 | int il4965_manage_ibss_station(struct il_priv *il, | 122 | int il4965_manage_ibss_station(struct il_priv *il, struct ieee80211_vif *vif, |
136 | struct ieee80211_vif *vif, bool add); | 123 | bool add); |
137 | 124 | ||
138 | /* hcmd */ | 125 | /* hcmd */ |
139 | int il4965_send_beacon_cmd(struct il_priv *il); | 126 | int il4965_send_beacon_cmd(struct il_priv *il); |
@@ -142,59 +129,57 @@ int il4965_send_beacon_cmd(struct il_priv *il); | |||
142 | const char *il4965_get_tx_fail_reason(u32 status); | 129 | const char *il4965_get_tx_fail_reason(u32 status); |
143 | #else | 130 | #else |
144 | static inline const char * | 131 | static inline const char * |
145 | il4965_get_tx_fail_reason(u32 status) { return ""; } | 132 | il4965_get_tx_fail_reason(u32 status) |
133 | { | ||
134 | return ""; | ||
135 | } | ||
146 | #endif | 136 | #endif |
147 | 137 | ||
148 | /* station management */ | 138 | /* station management */ |
149 | int il4965_alloc_bcast_station(struct il_priv *il, | 139 | int il4965_alloc_bcast_station(struct il_priv *il, struct il_rxon_context *ctx); |
150 | struct il_rxon_context *ctx); | 140 | int il4965_add_bssid_station(struct il_priv *il, struct il_rxon_context *ctx, |
151 | int il4965_add_bssid_station(struct il_priv *il, | 141 | const u8 * addr, u8 * sta_id_r); |
152 | struct il_rxon_context *ctx, | ||
153 | const u8 *addr, u8 *sta_id_r); | ||
154 | int il4965_remove_default_wep_key(struct il_priv *il, | 142 | int il4965_remove_default_wep_key(struct il_priv *il, |
155 | struct il_rxon_context *ctx, | 143 | struct il_rxon_context *ctx, |
144 | struct ieee80211_key_conf *key); | ||
145 | int il4965_set_default_wep_key(struct il_priv *il, struct il_rxon_context *ctx, | ||
156 | struct ieee80211_key_conf *key); | 146 | struct ieee80211_key_conf *key); |
157 | int il4965_set_default_wep_key(struct il_priv *il, | ||
158 | struct il_rxon_context *ctx, | ||
159 | struct ieee80211_key_conf *key); | ||
160 | int il4965_restore_default_wep_keys(struct il_priv *il, | 147 | int il4965_restore_default_wep_keys(struct il_priv *il, |
161 | struct il_rxon_context *ctx); | 148 | struct il_rxon_context *ctx); |
162 | int il4965_set_dynamic_key(struct il_priv *il, | 149 | int il4965_set_dynamic_key(struct il_priv *il, struct il_rxon_context *ctx, |
163 | struct il_rxon_context *ctx, | 150 | struct ieee80211_key_conf *key, u8 sta_id); |
164 | struct ieee80211_key_conf *key, u8 sta_id); | 151 | int il4965_remove_dynamic_key(struct il_priv *il, struct il_rxon_context *ctx, |
165 | int il4965_remove_dynamic_key(struct il_priv *il, | 152 | struct ieee80211_key_conf *key, u8 sta_id); |
166 | struct il_rxon_context *ctx, | 153 | void il4965_update_tkip_key(struct il_priv *il, struct il_rxon_context *ctx, |
167 | struct ieee80211_key_conf *key, u8 sta_id); | 154 | struct ieee80211_key_conf *keyconf, |
168 | void il4965_update_tkip_key(struct il_priv *il, | 155 | struct ieee80211_sta *sta, u32 iv32, |
169 | struct il_rxon_context *ctx, | 156 | u16 * phase1key); |
170 | struct ieee80211_key_conf *keyconf, | 157 | int il4965_sta_tx_modify_enable_tid(struct il_priv *il, int sta_id, int tid); |
171 | struct ieee80211_sta *sta, u32 iv32, u16 *phase1key); | ||
172 | int il4965_sta_tx_modify_enable_tid(struct il_priv *il, | ||
173 | int sta_id, int tid); | ||
174 | int il4965_sta_rx_agg_start(struct il_priv *il, struct ieee80211_sta *sta, | 158 | int il4965_sta_rx_agg_start(struct il_priv *il, struct ieee80211_sta *sta, |
175 | int tid, u16 ssn); | 159 | int tid, u16 ssn); |
176 | int il4965_sta_rx_agg_stop(struct il_priv *il, struct ieee80211_sta *sta, | 160 | int il4965_sta_rx_agg_stop(struct il_priv *il, struct ieee80211_sta *sta, |
177 | int tid); | 161 | int tid); |
178 | void il4965_sta_modify_sleep_tx_count(struct il_priv *il, | 162 | void il4965_sta_modify_sleep_tx_count(struct il_priv *il, int sta_id, int cnt); |
179 | int sta_id, int cnt); | ||
180 | int il4965_update_bcast_stations(struct il_priv *il); | 163 | int il4965_update_bcast_stations(struct il_priv *il); |
181 | 164 | ||
182 | /* rate */ | 165 | /* rate */ |
183 | static inline u8 il4965_hw_get_rate(__le32 rate_n_flags) | 166 | static inline u8 |
167 | il4965_hw_get_rate(__le32 rate_n_flags) | ||
184 | { | 168 | { |
185 | return le32_to_cpu(rate_n_flags) & 0xFF; | 169 | return le32_to_cpu(rate_n_flags) & 0xFF; |
186 | } | 170 | } |
187 | 171 | ||
188 | static inline __le32 il4965_hw_set_rate_n_flags(u8 rate, u32 flags) | 172 | static inline __le32 |
173 | il4965_hw_set_rate_n_flags(u8 rate, u32 flags) | ||
189 | { | 174 | { |
190 | return cpu_to_le32(flags|(u32)rate); | 175 | return cpu_to_le32(flags | (u32) rate); |
191 | } | 176 | } |
192 | 177 | ||
193 | /* eeprom */ | 178 | /* eeprom */ |
194 | void il4965_eeprom_get_mac(const struct il_priv *il, u8 *mac); | 179 | void il4965_eeprom_get_mac(const struct il_priv *il, u8 * mac); |
195 | int il4965_eeprom_acquire_semaphore(struct il_priv *il); | 180 | int il4965_eeprom_acquire_semaphore(struct il_priv *il); |
196 | void il4965_eeprom_release_semaphore(struct il_priv *il); | 181 | void il4965_eeprom_release_semaphore(struct il_priv *il); |
197 | int il4965_eeprom_check_version(struct il_priv *il); | 182 | int il4965_eeprom_check_version(struct il_priv *il); |
198 | 183 | ||
199 | /* mac80211 handlers (for 4965) */ | 184 | /* mac80211 handlers (for 4965) */ |
200 | void il4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb); | 185 | void il4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb); |
@@ -202,30 +187,26 @@ int il4965_mac_start(struct ieee80211_hw *hw); | |||
202 | void il4965_mac_stop(struct ieee80211_hw *hw); | 187 | void il4965_mac_stop(struct ieee80211_hw *hw); |
203 | void il4965_configure_filter(struct ieee80211_hw *hw, | 188 | void il4965_configure_filter(struct ieee80211_hw *hw, |
204 | unsigned int changed_flags, | 189 | unsigned int changed_flags, |
205 | unsigned int *total_flags, | 190 | unsigned int *total_flags, u64 multicast); |
206 | u64 multicast); | ||
207 | int il4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, | 191 | int il4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, |
208 | struct ieee80211_vif *vif, struct ieee80211_sta *sta, | 192 | struct ieee80211_vif *vif, struct ieee80211_sta *sta, |
209 | struct ieee80211_key_conf *key); | 193 | struct ieee80211_key_conf *key); |
210 | void il4965_mac_update_tkip_key(struct ieee80211_hw *hw, | 194 | void il4965_mac_update_tkip_key(struct ieee80211_hw *hw, |
211 | struct ieee80211_vif *vif, | 195 | struct ieee80211_vif *vif, |
212 | struct ieee80211_key_conf *keyconf, | 196 | struct ieee80211_key_conf *keyconf, |
213 | struct ieee80211_sta *sta, | 197 | struct ieee80211_sta *sta, u32 iv32, |
214 | u32 iv32, u16 *phase1key); | 198 | u16 * phase1key); |
215 | int il4965_mac_ampdu_action(struct ieee80211_hw *hw, | 199 | int il4965_mac_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
216 | struct ieee80211_vif *vif, | ||
217 | enum ieee80211_ampdu_mlme_action action, | 200 | enum ieee80211_ampdu_mlme_action action, |
218 | struct ieee80211_sta *sta, u16 tid, u16 *ssn, | 201 | struct ieee80211_sta *sta, u16 tid, u16 * ssn, |
219 | u8 buf_size); | 202 | u8 buf_size); |
220 | int il4965_mac_sta_add(struct ieee80211_hw *hw, | 203 | int il4965_mac_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
221 | struct ieee80211_vif *vif, | ||
222 | struct ieee80211_sta *sta); | 204 | struct ieee80211_sta *sta); |
223 | void il4965_mac_channel_switch(struct ieee80211_hw *hw, | 205 | void il4965_mac_channel_switch(struct ieee80211_hw *hw, |
224 | struct ieee80211_channel_switch *ch_switch); | 206 | struct ieee80211_channel_switch *ch_switch); |
225 | 207 | ||
226 | void il4965_led_enable(struct il_priv *il); | 208 | void il4965_led_enable(struct il_priv *il); |
227 | 209 | ||
228 | |||
229 | /* EEPROM */ | 210 | /* EEPROM */ |
230 | #define IL4965_EEPROM_IMG_SIZE 1024 | 211 | #define IL4965_EEPROM_IMG_SIZE 1024 |
231 | 212 | ||
@@ -255,7 +236,8 @@ void il4965_led_enable(struct il_priv *il); | |||
255 | /* Size of uCode instruction memory in bootstrap state machine */ | 236 | /* Size of uCode instruction memory in bootstrap state machine */ |
256 | #define IL49_MAX_BSM_SIZE BSM_SRAM_SIZE | 237 | #define IL49_MAX_BSM_SIZE BSM_SRAM_SIZE |
257 | 238 | ||
258 | static inline int il4965_hw_valid_rtc_data_addr(u32 addr) | 239 | static inline int |
240 | il4965_hw_valid_rtc_data_addr(u32 addr) | ||
259 | { | 241 | { |
260 | return (addr >= IL49_RTC_DATA_LOWER_BOUND && | 242 | return (addr >= IL49_RTC_DATA_LOWER_BOUND && |
261 | addr < IL49_RTC_DATA_UPPER_BOUND); | 243 | addr < IL49_RTC_DATA_UPPER_BOUND); |
@@ -588,8 +570,8 @@ static inline int il4965_hw_valid_rtc_data_addr(u32 addr) | |||
588 | * present during factory calibration). A 5 Ghz EEPROM idx of "40" | 570 | * present during factory calibration). A 5 Ghz EEPROM idx of "40" |
589 | * corresponds to the 49th entry in the table used by the driver. | 571 | * corresponds to the 49th entry in the table used by the driver. |
590 | */ | 572 | */ |
591 | #define MIN_TX_GAIN_IDX (0) /* highest gain, lowest idx, 2.4 */ | 573 | #define MIN_TX_GAIN_IDX (0) /* highest gain, lowest idx, 2.4 */ |
592 | #define MIN_TX_GAIN_IDX_52GHZ_EXT (-9) /* highest gain, lowest idx, 5 */ | 574 | #define MIN_TX_GAIN_IDX_52GHZ_EXT (-9) /* highest gain, lowest idx, 5 */ |
593 | 575 | ||
594 | /** | 576 | /** |
595 | * 2.4 GHz gain table | 577 | * 2.4 GHz gain table |
@@ -810,7 +792,6 @@ static inline int il4965_hw_valid_rtc_data_addr(u32 addr) | |||
810 | * 98 78 0x00 | 792 | * 98 78 0x00 |
811 | */ | 793 | */ |
812 | 794 | ||
813 | |||
814 | /** | 795 | /** |
815 | * Sanity checks and default values for EEPROM regulatory levels. | 796 | * Sanity checks and default values for EEPROM regulatory levels. |
816 | * If EEPROM values fall outside MIN/MAX range, use default values. | 797 | * If EEPROM values fall outside MIN/MAX range, use default values. |
@@ -894,7 +875,6 @@ enum { | |||
894 | 875 | ||
895 | /********************* END TXPOWER *****************************************/ | 876 | /********************* END TXPOWER *****************************************/ |
896 | 877 | ||
897 | |||
898 | /** | 878 | /** |
899 | * Tx/Rx Queues | 879 | * Tx/Rx Queues |
900 | * | 880 | * |
@@ -920,7 +900,6 @@ enum { | |||
920 | #define IL49_NUM_QUEUES 16 | 900 | #define IL49_NUM_QUEUES 16 |
921 | #define IL49_NUM_AMPDU_QUEUES 8 | 901 | #define IL49_NUM_AMPDU_QUEUES 8 |
922 | 902 | ||
923 | |||
924 | /** | 903 | /** |
925 | * struct il4965_schedq_bc_tbl | 904 | * struct il4965_schedq_bc_tbl |
926 | * | 905 | * |
@@ -944,7 +923,6 @@ struct il4965_scd_bc_tbl { | |||
944 | u8 pad[1024 - (TFD_QUEUE_BC_SIZE) * sizeof(__le16)]; | 923 | u8 pad[1024 - (TFD_QUEUE_BC_SIZE) * sizeof(__le16)]; |
945 | } __packed; | 924 | } __packed; |
946 | 925 | ||
947 | |||
948 | #define IL4965_RTC_INST_LOWER_BOUND (0x000000) | 926 | #define IL4965_RTC_INST_LOWER_BOUND (0x000000) |
949 | 927 | ||
950 | /* RSSI to dBm */ | 928 | /* RSSI to dBm */ |
@@ -971,28 +949,31 @@ void il4965_calib_free_results(struct il_priv *il); | |||
971 | 949 | ||
972 | /* Debug */ | 950 | /* Debug */ |
973 | #ifdef CONFIG_IWLEGACY_DEBUGFS | 951 | #ifdef CONFIG_IWLEGACY_DEBUGFS |
974 | ssize_t il4965_ucode_rx_stats_read(struct file *file, char __user *user_buf, | 952 | ssize_t il4965_ucode_rx_stats_read(struct file *file, char __user * user_buf, |
975 | size_t count, loff_t *ppos); | 953 | size_t count, loff_t * ppos); |
976 | ssize_t il4965_ucode_tx_stats_read(struct file *file, char __user *user_buf, | 954 | ssize_t il4965_ucode_tx_stats_read(struct file *file, char __user * user_buf, |
977 | size_t count, loff_t *ppos); | 955 | size_t count, loff_t * ppos); |
978 | ssize_t il4965_ucode_general_stats_read(struct file *file, | 956 | ssize_t il4965_ucode_general_stats_read(struct file *file, |
979 | char __user *user_buf, size_t count, loff_t *ppos); | 957 | char __user * user_buf, size_t count, |
958 | loff_t * ppos); | ||
980 | #else | 959 | #else |
981 | static ssize_t | 960 | static ssize_t |
982 | il4965_ucode_rx_stats_read(struct file *file, char __user *user_buf, | 961 | il4965_ucode_rx_stats_read(struct file *file, char __user * user_buf, |
983 | size_t count, loff_t *ppos) | 962 | size_t count, loff_t * ppos) |
984 | { | 963 | { |
985 | return 0; | 964 | return 0; |
986 | } | 965 | } |
966 | |||
987 | static ssize_t | 967 | static ssize_t |
988 | il4965_ucode_tx_stats_read(struct file *file, char __user *user_buf, | 968 | il4965_ucode_tx_stats_read(struct file *file, char __user * user_buf, |
989 | size_t count, loff_t *ppos) | 969 | size_t count, loff_t * ppos) |
990 | { | 970 | { |
991 | return 0; | 971 | return 0; |
992 | } | 972 | } |
973 | |||
993 | static ssize_t | 974 | static ssize_t |
994 | il4965_ucode_general_stats_read(struct file *file, char __user *user_buf, | 975 | il4965_ucode_general_stats_read(struct file *file, char __user * user_buf, |
995 | size_t count, loff_t *ppos) | 976 | size_t count, loff_t * ppos) |
996 | { | 977 | { |
997 | return 0; | 978 | return 0; |
998 | } | 979 | } |
@@ -1028,7 +1009,6 @@ il4965_ucode_general_stats_read(struct file *file, char __user *user_buf, | |||
1028 | */ | 1009 | */ |
1029 | #define FH49_KW_MEM_ADDR_REG (FH49_MEM_LOWER_BOUND + 0x97C) | 1010 | #define FH49_KW_MEM_ADDR_REG (FH49_MEM_LOWER_BOUND + 0x97C) |
1030 | 1011 | ||
1031 | |||
1032 | /** | 1012 | /** |
1033 | * TFD Circular Buffers Base (CBBC) addresses | 1013 | * TFD Circular Buffers Base (CBBC) addresses |
1034 | * | 1014 | * |
@@ -1047,7 +1027,6 @@ il4965_ucode_general_stats_read(struct file *file, char __user *user_buf, | |||
1047 | /* Find TFD CB base pointer for given queue (range 0-15). */ | 1027 | /* Find TFD CB base pointer for given queue (range 0-15). */ |
1048 | #define FH49_MEM_CBBC_QUEUE(x) (FH49_MEM_CBBC_LOWER_BOUND + (x) * 0x4) | 1028 | #define FH49_MEM_CBBC_QUEUE(x) (FH49_MEM_CBBC_LOWER_BOUND + (x) * 0x4) |
1049 | 1029 | ||
1050 | |||
1051 | /** | 1030 | /** |
1052 | * Rx SRAM Control and Status Registers (RSCSR) | 1031 | * Rx SRAM Control and Status Registers (RSCSR) |
1053 | * | 1032 | * |
@@ -1144,7 +1123,6 @@ il4965_ucode_general_stats_read(struct file *file, char __user *user_buf, | |||
1144 | #define FH49_RSCSR_CHNL0_RBDCB_WPTR_REG (FH49_MEM_RSCSR_CHNL0 + 0x008) | 1123 | #define FH49_RSCSR_CHNL0_RBDCB_WPTR_REG (FH49_MEM_RSCSR_CHNL0 + 0x008) |
1145 | #define FH49_RSCSR_CHNL0_WPTR (FH49_RSCSR_CHNL0_RBDCB_WPTR_REG) | 1124 | #define FH49_RSCSR_CHNL0_WPTR (FH49_RSCSR_CHNL0_RBDCB_WPTR_REG) |
1146 | 1125 | ||
1147 | |||
1148 | /** | 1126 | /** |
1149 | * Rx Config/Status Registers (RCSR) | 1127 | * Rx Config/Status Registers (RCSR) |
1150 | * Rx Config Reg for channel 0 (only channel used) | 1128 | * Rx Config Reg for channel 0 (only channel used) |
@@ -1177,12 +1155,12 @@ il4965_ucode_general_stats_read(struct file *file, char __user *user_buf, | |||
1177 | 1155 | ||
1178 | #define FH49_MEM_RCSR_CHNL0_CONFIG_REG (FH49_MEM_RCSR_CHNL0) | 1156 | #define FH49_MEM_RCSR_CHNL0_CONFIG_REG (FH49_MEM_RCSR_CHNL0) |
1179 | 1157 | ||
1180 | #define FH49_RCSR_CHNL0_RX_CONFIG_RB_TIMEOUT_MSK (0x00000FF0) /* bits 4-11 */ | 1158 | #define FH49_RCSR_CHNL0_RX_CONFIG_RB_TIMEOUT_MSK (0x00000FF0) /* bits 4-11 */ |
1181 | #define FH49_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_MSK (0x00001000) /* bits 12 */ | 1159 | #define FH49_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_MSK (0x00001000) /* bits 12 */ |
1182 | #define FH49_RCSR_CHNL0_RX_CONFIG_SINGLE_FRAME_MSK (0x00008000) /* bit 15 */ | 1160 | #define FH49_RCSR_CHNL0_RX_CONFIG_SINGLE_FRAME_MSK (0x00008000) /* bit 15 */ |
1183 | #define FH49_RCSR_CHNL0_RX_CONFIG_RB_SIZE_MSK (0x00030000) /* bits 16-17 */ | 1161 | #define FH49_RCSR_CHNL0_RX_CONFIG_RB_SIZE_MSK (0x00030000) /* bits 16-17 */ |
1184 | #define FH49_RCSR_CHNL0_RX_CONFIG_RBDBC_SIZE_MSK (0x00F00000) /* bits 20-23 */ | 1162 | #define FH49_RCSR_CHNL0_RX_CONFIG_RBDBC_SIZE_MSK (0x00F00000) /* bits 20-23 */ |
1185 | #define FH49_RCSR_CHNL0_RX_CONFIG_DMA_CHNL_EN_MSK (0xC0000000) /* bits 30-31*/ | 1163 | #define FH49_RCSR_CHNL0_RX_CONFIG_DMA_CHNL_EN_MSK (0xC0000000) /* bits 30-31 */ |
1186 | 1164 | ||
1187 | #define FH49_RCSR_RX_CONFIG_RBDCB_SIZE_POS (20) | 1165 | #define FH49_RCSR_RX_CONFIG_RBDCB_SIZE_POS (20) |
1188 | #define FH49_RCSR_RX_CONFIG_REG_IRQ_RBTH_POS (4) | 1166 | #define FH49_RCSR_RX_CONFIG_REG_IRQ_RBTH_POS (4) |
diff --git a/drivers/net/wireless/iwlegacy/commands.h b/drivers/net/wireless/iwlegacy/commands.h index 9eb7a83bbf1b..25dd7d28d022 100644 --- a/drivers/net/wireless/iwlegacy/commands.h +++ b/drivers/net/wireless/iwlegacy/commands.h | |||
@@ -74,7 +74,6 @@ struct il_priv; | |||
74 | #define IL_UCODE_API(ver) (((ver) & 0x0000FF00) >> 8) | 74 | #define IL_UCODE_API(ver) (((ver) & 0x0000FF00) >> 8) |
75 | #define IL_UCODE_SERIAL(ver) ((ver) & 0x000000FF) | 75 | #define IL_UCODE_SERIAL(ver) ((ver) & 0x000000FF) |
76 | 76 | ||
77 | |||
78 | /* Tx rates */ | 77 | /* Tx rates */ |
79 | #define IL_CCK_RATES 4 | 78 | #define IL_CCK_RATES 4 |
80 | #define IL_OFDM_RATES 8 | 79 | #define IL_OFDM_RATES 8 |
@@ -98,11 +97,11 @@ enum { | |||
98 | C_WEPKEY = 0x20, | 97 | C_WEPKEY = 0x20, |
99 | 98 | ||
100 | /* RX, TX, LEDs */ | 99 | /* RX, TX, LEDs */ |
101 | N_3945_RX = 0x1b, /* 3945 only */ | 100 | N_3945_RX = 0x1b, /* 3945 only */ |
102 | C_TX = 0x1c, | 101 | C_TX = 0x1c, |
103 | C_RATE_SCALE = 0x47, /* 3945 only */ | 102 | C_RATE_SCALE = 0x47, /* 3945 only */ |
104 | C_LEDS = 0x48, | 103 | C_LEDS = 0x48, |
105 | C_TX_LINK_QUALITY_CMD = 0x4e, /* for 4965 */ | 104 | C_TX_LINK_QUALITY_CMD = 0x4e, /* for 4965 */ |
106 | 105 | ||
107 | /* 802.11h related */ | 106 | /* 802.11h related */ |
108 | C_CHANNEL_SWITCH = 0x72, | 107 | C_CHANNEL_SWITCH = 0x72, |
@@ -124,7 +123,7 @@ enum { | |||
124 | 123 | ||
125 | /* IBSS/AP commands */ | 124 | /* IBSS/AP commands */ |
126 | N_BEACON = 0x90, | 125 | N_BEACON = 0x90, |
127 | C_TX_BEACON= 0x91, | 126 | C_TX_BEACON = 0x91, |
128 | 127 | ||
129 | /* Miscellaneous commands */ | 128 | /* Miscellaneous commands */ |
130 | C_TX_PWR_TBL = 0x97, | 129 | C_TX_PWR_TBL = 0x97, |
@@ -177,8 +176,8 @@ enum { | |||
177 | * driver, and each response/notification received from uCode. | 176 | * driver, and each response/notification received from uCode. |
178 | */ | 177 | */ |
179 | struct il_cmd_header { | 178 | struct il_cmd_header { |
180 | u8 cmd; /* Command ID: C_RXON, etc. */ | 179 | u8 cmd; /* Command ID: C_RXON, etc. */ |
181 | u8 flags; /* 0:5 reserved, 6 abort, 7 internal */ | 180 | u8 flags; /* 0:5 reserved, 6 abort, 7 internal */ |
182 | /* | 181 | /* |
183 | * The driver sets up the sequence number to values of its choosing. | 182 | * The driver sets up the sequence number to values of its choosing. |
184 | * uCode does not use this value, but passes it back to the driver | 183 | * uCode does not use this value, but passes it back to the driver |
@@ -194,20 +193,19 @@ struct il_cmd_header { | |||
194 | * | 193 | * |
195 | * The Linux driver uses the following format: | 194 | * The Linux driver uses the following format: |
196 | * | 195 | * |
197 | * 0:7 tfd idx - position within TX queue | 196 | * 0:7 tfd idx - position within TX queue |
198 | * 8:12 TX queue id | 197 | * 8:12 TX queue id |
199 | * 13 reserved | 198 | * 13 reserved |
200 | * 14 huge - driver sets this to indicate command is in the | 199 | * 14 huge - driver sets this to indicate command is in the |
201 | * 'huge' storage at the end of the command buffers | 200 | * 'huge' storage at the end of the command buffers |
202 | * 15 unsolicited RX or uCode-originated notification | 201 | * 15 unsolicited RX or uCode-originated notification |
203 | */ | 202 | */ |
204 | __le16 sequence; | 203 | __le16 sequence; |
205 | 204 | ||
206 | /* command or response/notification data follows immediately */ | 205 | /* command or response/notification data follows immediately */ |
207 | u8 data[0]; | 206 | u8 data[0]; |
208 | } __packed; | 207 | } __packed; |
209 | 208 | ||
210 | |||
211 | /** | 209 | /** |
212 | * struct il3945_tx_power | 210 | * struct il3945_tx_power |
213 | * | 211 | * |
@@ -430,7 +428,6 @@ struct il_init_alive_resp { | |||
430 | * 2 Tx chains */ | 428 | * 2 Tx chains */ |
431 | } __packed; | 429 | } __packed; |
432 | 430 | ||
433 | |||
434 | /** | 431 | /** |
435 | * N_ALIVE = 0x1 (response only, not a command) | 432 | * N_ALIVE = 0x1 (response only, not a command) |
436 | * | 433 | * |
@@ -514,7 +511,7 @@ struct il_alive_resp { | |||
514 | __le16 reserved1; | 511 | __le16 reserved1; |
515 | u8 sw_rev[8]; | 512 | u8 sw_rev[8]; |
516 | u8 ver_type; | 513 | u8 ver_type; |
517 | u8 ver_subtype; /* not "9" for runtime alive */ | 514 | u8 ver_subtype; /* not "9" for runtime alive */ |
518 | __le16 reserved2; | 515 | __le16 reserved2; |
519 | __le32 log_event_table_ptr; /* SRAM address for event log */ | 516 | __le32 log_event_table_ptr; /* SRAM address for event log */ |
520 | __le32 error_event_table_ptr; /* SRAM address for error log */ | 517 | __le32 error_event_table_ptr; /* SRAM address for error log */ |
@@ -551,7 +548,6 @@ enum { | |||
551 | RXON_DEV_TYPE_SNIFFER = 6, | 548 | RXON_DEV_TYPE_SNIFFER = 6, |
552 | }; | 549 | }; |
553 | 550 | ||
554 | |||
555 | #define RXON_RX_CHAIN_DRIVER_FORCE_MSK cpu_to_le16(0x1 << 0) | 551 | #define RXON_RX_CHAIN_DRIVER_FORCE_MSK cpu_to_le16(0x1 << 0) |
556 | #define RXON_RX_CHAIN_DRIVER_FORCE_POS (0) | 552 | #define RXON_RX_CHAIN_DRIVER_FORCE_POS (0) |
557 | #define RXON_RX_CHAIN_VALID_MSK cpu_to_le16(0x7 << 1) | 553 | #define RXON_RX_CHAIN_VALID_MSK cpu_to_le16(0x7 << 1) |
@@ -590,7 +586,6 @@ enum { | |||
590 | * (according to ON_AIR deassertion) */ | 586 | * (according to ON_AIR deassertion) */ |
591 | #define RXON_FLG_TSF2HOST_MSK cpu_to_le32(1 << 15) | 587 | #define RXON_FLG_TSF2HOST_MSK cpu_to_le32(1 << 15) |
592 | 588 | ||
593 | |||
594 | /* HT flags */ | 589 | /* HT flags */ |
595 | #define RXON_FLG_CTRL_CHANNEL_LOC_POS (22) | 590 | #define RXON_FLG_CTRL_CHANNEL_LOC_POS (22) |
596 | #define RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK cpu_to_le32(0x1 << 22) | 591 | #define RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK cpu_to_le32(0x1 << 22) |
@@ -718,7 +713,6 @@ struct il_rxon_cmd { | |||
718 | u8 reserved5; | 713 | u8 reserved5; |
719 | } __packed; | 714 | } __packed; |
720 | 715 | ||
721 | |||
722 | /* | 716 | /* |
723 | * C_RXON_ASSOC = 0x11 (command, has simple generic response) | 717 | * C_RXON_ASSOC = 0x11 (command, has simple generic response) |
724 | */ | 718 | */ |
@@ -742,8 +736,8 @@ struct il4965_rxon_assoc_cmd { | |||
742 | } __packed; | 736 | } __packed; |
743 | 737 | ||
744 | #define IL_CONN_MAX_LISTEN_INTERVAL 10 | 738 | #define IL_CONN_MAX_LISTEN_INTERVAL 10 |
745 | #define IL_MAX_UCODE_BEACON_INTERVAL 4 /* 4096 */ | 739 | #define IL_MAX_UCODE_BEACON_INTERVAL 4 /* 4096 */ |
746 | #define IL39_MAX_UCODE_BEACON_INTERVAL 1 /* 1024 */ | 740 | #define IL39_MAX_UCODE_BEACON_INTERVAL 1 /* 1024 */ |
747 | 741 | ||
748 | /* | 742 | /* |
749 | * C_RXON_TIMING = 0x14 (command, has simple generic response) | 743 | * C_RXON_TIMING = 0x14 (command, has simple generic response) |
@@ -856,7 +850,7 @@ struct il_qosparam_cmd { | |||
856 | #define IL4965_BROADCAST_ID 31 | 850 | #define IL4965_BROADCAST_ID 31 |
857 | #define IL4965_STATION_COUNT 32 | 851 | #define IL4965_STATION_COUNT 32 |
858 | 852 | ||
859 | #define IL_STATION_COUNT 32 /* MAX(3945,4965)*/ | 853 | #define IL_STATION_COUNT 32 /* MAX(3945,4965) */ |
860 | #define IL_INVALID_STATION 255 | 854 | #define IL_INVALID_STATION 255 |
861 | 855 | ||
862 | #define STA_FLG_TX_RATE_MSK cpu_to_le32(1 << 2) | 856 | #define STA_FLG_TX_RATE_MSK cpu_to_le32(1 << 2) |
@@ -964,7 +958,7 @@ struct il3945_addsta_cmd { | |||
964 | u8 reserved[3]; | 958 | u8 reserved[3]; |
965 | struct sta_id_modify sta; | 959 | struct sta_id_modify sta; |
966 | struct il4965_keyinfo key; | 960 | struct il4965_keyinfo key; |
967 | __le32 station_flags; /* STA_FLG_* */ | 961 | __le32 station_flags; /* STA_FLG_* */ |
968 | __le32 station_flags_msk; /* STA_FLG_* */ | 962 | __le32 station_flags_msk; /* STA_FLG_* */ |
969 | 963 | ||
970 | /* bit field to disable (1) or enable (0) Tx for Traffic ID (TID) | 964 | /* bit field to disable (1) or enable (0) Tx for Traffic ID (TID) |
@@ -992,7 +986,7 @@ struct il4965_addsta_cmd { | |||
992 | u8 reserved[3]; | 986 | u8 reserved[3]; |
993 | struct sta_id_modify sta; | 987 | struct sta_id_modify sta; |
994 | struct il4965_keyinfo key; | 988 | struct il4965_keyinfo key; |
995 | __le32 station_flags; /* STA_FLG_* */ | 989 | __le32 station_flags; /* STA_FLG_* */ |
996 | __le32 station_flags_msk; /* STA_FLG_* */ | 990 | __le32 station_flags_msk; /* STA_FLG_* */ |
997 | 991 | ||
998 | /* bit field to disable (1) or enable (0) Tx for Traffic ID (TID) | 992 | /* bit field to disable (1) or enable (0) Tx for Traffic ID (TID) |
@@ -1000,7 +994,7 @@ struct il4965_addsta_cmd { | |||
1000 | * Set modify_mask bit STA_MODIFY_TID_DISABLE_TX to use this field. */ | 994 | * Set modify_mask bit STA_MODIFY_TID_DISABLE_TX to use this field. */ |
1001 | __le16 tid_disable_tx; | 995 | __le16 tid_disable_tx; |
1002 | 996 | ||
1003 | __le16 reserved1; | 997 | __le16 reserved1; |
1004 | 998 | ||
1005 | /* TID for which to add block-ack support. | 999 | /* TID for which to add block-ack support. |
1006 | * Set modify_mask bit STA_MODIFY_ADDBA_TID_MSK to use this field. */ | 1000 | * Set modify_mask bit STA_MODIFY_ADDBA_TID_MSK to use this field. */ |
@@ -1030,7 +1024,7 @@ struct il_addsta_cmd { | |||
1030 | u8 reserved[3]; | 1024 | u8 reserved[3]; |
1031 | struct sta_id_modify sta; | 1025 | struct sta_id_modify sta; |
1032 | struct il4965_keyinfo key; | 1026 | struct il4965_keyinfo key; |
1033 | __le32 station_flags; /* STA_FLG_* */ | 1027 | __le32 station_flags; /* STA_FLG_* */ |
1034 | __le32 station_flags_msk; /* STA_FLG_* */ | 1028 | __le32 station_flags_msk; /* STA_FLG_* */ |
1035 | 1029 | ||
1036 | /* bit field to disable (1) or enable (0) Tx for Traffic ID (TID) | 1030 | /* bit field to disable (1) or enable (0) Tx for Traffic ID (TID) |
@@ -1038,7 +1032,7 @@ struct il_addsta_cmd { | |||
1038 | * Set modify_mask bit STA_MODIFY_TID_DISABLE_TX to use this field. */ | 1032 | * Set modify_mask bit STA_MODIFY_TID_DISABLE_TX to use this field. */ |
1039 | __le16 tid_disable_tx; | 1033 | __le16 tid_disable_tx; |
1040 | 1034 | ||
1041 | __le16 rate_n_flags; /* 3945 only */ | 1035 | __le16 rate_n_flags; /* 3945 only */ |
1042 | 1036 | ||
1043 | /* TID for which to add block-ack support. | 1037 | /* TID for which to add block-ack support. |
1044 | * Set modify_mask bit STA_MODIFY_ADDBA_TID_MSK to use this field. */ | 1038 | * Set modify_mask bit STA_MODIFY_ADDBA_TID_MSK to use this field. */ |
@@ -1062,7 +1056,6 @@ struct il_addsta_cmd { | |||
1062 | __le16 reserved2; | 1056 | __le16 reserved2; |
1063 | } __packed; | 1057 | } __packed; |
1064 | 1058 | ||
1065 | |||
1066 | #define ADD_STA_SUCCESS_MSK 0x1 | 1059 | #define ADD_STA_SUCCESS_MSK 0x1 |
1067 | #define ADD_STA_NO_ROOM_IN_TBL 0x2 | 1060 | #define ADD_STA_NO_ROOM_IN_TBL 0x2 |
1068 | #define ADD_STA_NO_BLOCK_ACK_RESOURCE 0x4 | 1061 | #define ADD_STA_NO_BLOCK_ACK_RESOURCE 0x4 |
@@ -1071,7 +1064,7 @@ struct il_addsta_cmd { | |||
1071 | * C_ADD_STA = 0x18 (response) | 1064 | * C_ADD_STA = 0x18 (response) |
1072 | */ | 1065 | */ |
1073 | struct il_add_sta_resp { | 1066 | struct il_add_sta_resp { |
1074 | u8 status; /* ADD_STA_* */ | 1067 | u8 status; /* ADD_STA_* */ |
1075 | } __packed; | 1068 | } __packed; |
1076 | 1069 | ||
1077 | #define REM_STA_SUCCESS_MSK 0x1 | 1070 | #define REM_STA_SUCCESS_MSK 0x1 |
@@ -1086,9 +1079,9 @@ struct il_rem_sta_resp { | |||
1086 | * C_REM_STA = 0x19 (command) | 1079 | * C_REM_STA = 0x19 (command) |
1087 | */ | 1080 | */ |
1088 | struct il_rem_sta_cmd { | 1081 | struct il_rem_sta_cmd { |
1089 | u8 num_sta; /* number of removed stations */ | 1082 | u8 num_sta; /* number of removed stations */ |
1090 | u8 reserved[3]; | 1083 | u8 reserved[3]; |
1091 | u8 addr[ETH_ALEN]; /* MAC addr of the first station */ | 1084 | u8 addr[ETH_ALEN]; /* MAC addr of the first station */ |
1092 | u8 reserved2[2]; | 1085 | u8 reserved2[2]; |
1093 | } __packed; | 1086 | } __packed; |
1094 | 1087 | ||
@@ -1165,7 +1158,6 @@ struct il_wep_cmd { | |||
1165 | #define RX_MPDU_RES_STATUS_TTAK_OK (1 << 7) | 1158 | #define RX_MPDU_RES_STATUS_TTAK_OK (1 << 7) |
1166 | #define RX_MPDU_RES_STATUS_DEC_DONE_MSK (0x800) | 1159 | #define RX_MPDU_RES_STATUS_DEC_DONE_MSK (0x800) |
1167 | 1160 | ||
1168 | |||
1169 | struct il3945_rx_frame_stats { | 1161 | struct il3945_rx_frame_stats { |
1170 | u8 phy_count; | 1162 | u8 phy_count; |
1171 | u8 id; | 1163 | u8 id; |
@@ -1221,21 +1213,20 @@ struct il4965_rx_non_cfg_phy { | |||
1221 | u8 pad[0]; | 1213 | u8 pad[0]; |
1222 | } __packed; | 1214 | } __packed; |
1223 | 1215 | ||
1224 | |||
1225 | /* | 1216 | /* |
1226 | * N_RX = 0xc3 (response only, not a command) | 1217 | * N_RX = 0xc3 (response only, not a command) |
1227 | * Used only for legacy (non 11n) frames. | 1218 | * Used only for legacy (non 11n) frames. |
1228 | */ | 1219 | */ |
1229 | struct il_rx_phy_res { | 1220 | struct il_rx_phy_res { |
1230 | u8 non_cfg_phy_cnt; /* non configurable DSP phy data byte count */ | 1221 | u8 non_cfg_phy_cnt; /* non configurable DSP phy data byte count */ |
1231 | u8 cfg_phy_cnt; /* configurable DSP phy data byte count */ | 1222 | u8 cfg_phy_cnt; /* configurable DSP phy data byte count */ |
1232 | u8 stat_id; /* configurable DSP phy data set ID */ | 1223 | u8 stat_id; /* configurable DSP phy data set ID */ |
1233 | u8 reserved1; | 1224 | u8 reserved1; |
1234 | __le64 timestamp; /* TSF at on air rise */ | 1225 | __le64 timestamp; /* TSF at on air rise */ |
1235 | __le32 beacon_time_stamp; /* beacon at on-air rise */ | 1226 | __le32 beacon_time_stamp; /* beacon at on-air rise */ |
1236 | __le16 phy_flags; /* general phy flags: band, modulation, ... */ | 1227 | __le16 phy_flags; /* general phy flags: band, modulation, ... */ |
1237 | __le16 channel; /* channel number */ | 1228 | __le16 channel; /* channel number */ |
1238 | u8 non_cfg_phy_buf[32]; /* for various implementations of non_cfg_phy */ | 1229 | u8 non_cfg_phy_buf[32]; /* for various implementations of non_cfg_phy */ |
1239 | __le32 rate_n_flags; /* RATE_MCS_* */ | 1230 | __le32 rate_n_flags; /* RATE_MCS_* */ |
1240 | __le16 byte_count; /* frame's byte-count */ | 1231 | __le16 byte_count; /* frame's byte-count */ |
1241 | __le16 frame_time; /* frame's time on the air */ | 1232 | __le16 frame_time; /* frame's time on the air */ |
@@ -1246,7 +1237,6 @@ struct il_rx_mpdu_res_start { | |||
1246 | __le16 reserved; | 1237 | __le16 reserved; |
1247 | } __packed; | 1238 | } __packed; |
1248 | 1239 | ||
1249 | |||
1250 | /****************************************************************************** | 1240 | /****************************************************************************** |
1251 | * (5) | 1241 | * (5) |
1252 | * Tx Commands & Responses: | 1242 | * Tx Commands & Responses: |
@@ -1346,7 +1336,6 @@ struct il_rx_mpdu_res_start { | |||
1346 | /* HCCA-AP - disable duration overwriting. */ | 1336 | /* HCCA-AP - disable duration overwriting. */ |
1347 | #define TX_CMD_FLG_DUR_MSK cpu_to_le32(1 << 25) | 1337 | #define TX_CMD_FLG_DUR_MSK cpu_to_le32(1 << 25) |
1348 | 1338 | ||
1349 | |||
1350 | /* | 1339 | /* |
1351 | * TX command security control | 1340 | * TX command security control |
1352 | */ | 1341 | */ |
@@ -1442,7 +1431,6 @@ struct il3945_tx_resp { | |||
1442 | __le32 status; /* TX status */ | 1431 | __le32 status; /* TX status */ |
1443 | } __packed; | 1432 | } __packed; |
1444 | 1433 | ||
1445 | |||
1446 | /* | 1434 | /* |
1447 | * 4965 uCode updates these Tx attempt count values in host DRAM. | 1435 | * 4965 uCode updates these Tx attempt count values in host DRAM. |
1448 | * Used for managing Tx retries when expecting block-acks. | 1436 | * Used for managing Tx retries when expecting block-acks. |
@@ -1625,12 +1613,12 @@ enum { | |||
1625 | }; | 1613 | }; |
1626 | 1614 | ||
1627 | enum { | 1615 | enum { |
1628 | TX_STATUS_MSK = 0x000000ff, /* bits 0:7 */ | 1616 | TX_STATUS_MSK = 0x000000ff, /* bits 0:7 */ |
1629 | TX_STATUS_DELAY_MSK = 0x00000040, | 1617 | TX_STATUS_DELAY_MSK = 0x00000040, |
1630 | TX_STATUS_ABORT_MSK = 0x00000080, | 1618 | TX_STATUS_ABORT_MSK = 0x00000080, |
1631 | TX_PACKET_MODE_MSK = 0x0000ff00, /* bits 8:15 */ | 1619 | TX_PACKET_MODE_MSK = 0x0000ff00, /* bits 8:15 */ |
1632 | TX_FIFO_NUMBER_MSK = 0x00070000, /* bits 16:18 */ | 1620 | TX_FIFO_NUMBER_MSK = 0x00070000, /* bits 16:18 */ |
1633 | TX_RESERVED = 0x00780000, /* bits 19:22 */ | 1621 | TX_RESERVED = 0x00780000, /* bits 19:22 */ |
1634 | TX_POWER_PA_DETECT_MSK = 0x7f800000, /* bits 23:30 */ | 1622 | TX_POWER_PA_DETECT_MSK = 0x7f800000, /* bits 23:30 */ |
1635 | TX_ABORT_REQUIRED_MSK = 0x80000000, /* bits 31:31 */ | 1623 | TX_ABORT_REQUIRED_MSK = 0x80000000, /* bits 31:31 */ |
1636 | }; | 1624 | }; |
@@ -1727,7 +1715,7 @@ struct il4965_tx_resp { | |||
1727 | */ | 1715 | */ |
1728 | union { | 1716 | union { |
1729 | __le32 status; | 1717 | __le32 status; |
1730 | struct agg_tx_status agg_status[0]; /* for each agg frame */ | 1718 | struct agg_tx_status agg_status[0]; /* for each agg frame */ |
1731 | } u; | 1719 | } u; |
1732 | } __packed; | 1720 | } __packed; |
1733 | 1721 | ||
@@ -1770,7 +1758,6 @@ struct il4965_txpowertable_cmd { | |||
1770 | struct il4965_tx_power_db tx_power; | 1758 | struct il4965_tx_power_db tx_power; |
1771 | } __packed; | 1759 | } __packed; |
1772 | 1760 | ||
1773 | |||
1774 | /** | 1761 | /** |
1775 | * struct il3945_rate_scaling_cmd - Rate Scaling Command & Response | 1762 | * struct il3945_rate_scaling_cmd - Rate Scaling Command & Response |
1776 | * | 1763 | * |
@@ -1798,7 +1785,6 @@ struct il3945_rate_scaling_cmd { | |||
1798 | struct il3945_rate_scaling_info table[IL_MAX_RATES]; | 1785 | struct il3945_rate_scaling_info table[IL_MAX_RATES]; |
1799 | } __packed; | 1786 | } __packed; |
1800 | 1787 | ||
1801 | |||
1802 | /*RS_NEW_API: only TLC_RTS remains and moved to bit 0 */ | 1788 | /*RS_NEW_API: only TLC_RTS remains and moved to bit 0 */ |
1803 | #define LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK (1 << 0) | 1789 | #define LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK (1 << 0) |
1804 | 1790 | ||
@@ -1813,7 +1799,6 @@ struct il3945_rate_scaling_cmd { | |||
1813 | #define LINK_QUAL_ANT_B_MSK (1 << 1) | 1799 | #define LINK_QUAL_ANT_B_MSK (1 << 1) |
1814 | #define LINK_QUAL_ANT_MSK (LINK_QUAL_ANT_A_MSK|LINK_QUAL_ANT_B_MSK) | 1800 | #define LINK_QUAL_ANT_MSK (LINK_QUAL_ANT_A_MSK|LINK_QUAL_ANT_B_MSK) |
1815 | 1801 | ||
1816 | |||
1817 | /** | 1802 | /** |
1818 | * struct il_link_qual_general_params | 1803 | * struct il_link_qual_general_params |
1819 | * | 1804 | * |
@@ -1829,7 +1814,7 @@ struct il_link_qual_general_params { | |||
1829 | u8 single_stream_ant_msk; /* LINK_QUAL_ANT_* */ | 1814 | u8 single_stream_ant_msk; /* LINK_QUAL_ANT_* */ |
1830 | 1815 | ||
1831 | /* Best antennas to use for MIMO (unused for 4965, assumes both). */ | 1816 | /* Best antennas to use for MIMO (unused for 4965, assumes both). */ |
1832 | u8 dual_stream_ant_msk; /* LINK_QUAL_ANT_* */ | 1817 | u8 dual_stream_ant_msk; /* LINK_QUAL_ANT_* */ |
1833 | 1818 | ||
1834 | /* | 1819 | /* |
1835 | * If driver needs to use different initial rates for different | 1820 | * If driver needs to use different initial rates for different |
@@ -1845,7 +1830,7 @@ struct il_link_qual_general_params { | |||
1845 | u8 start_rate_idx[LINK_QUAL_AC_NUM]; | 1830 | u8 start_rate_idx[LINK_QUAL_AC_NUM]; |
1846 | } __packed; | 1831 | } __packed; |
1847 | 1832 | ||
1848 | #define LINK_QUAL_AGG_TIME_LIMIT_DEF (4000) /* 4 milliseconds */ | 1833 | #define LINK_QUAL_AGG_TIME_LIMIT_DEF (4000) /* 4 milliseconds */ |
1849 | #define LINK_QUAL_AGG_TIME_LIMIT_MAX (8000) | 1834 | #define LINK_QUAL_AGG_TIME_LIMIT_MAX (8000) |
1850 | #define LINK_QUAL_AGG_TIME_LIMIT_MIN (100) | 1835 | #define LINK_QUAL_AGG_TIME_LIMIT_MIN (100) |
1851 | 1836 | ||
@@ -2129,7 +2114,6 @@ struct il_bt_cmd { | |||
2129 | __le32 kill_cts_mask; | 2114 | __le32 kill_cts_mask; |
2130 | } __packed; | 2115 | } __packed; |
2131 | 2116 | ||
2132 | |||
2133 | /****************************************************************************** | 2117 | /****************************************************************************** |
2134 | * (6) | 2118 | * (6) |
2135 | * Spectrum Management (802.11h) Commands, Responses, Notifications: | 2119 | * Spectrum Management (802.11h) Commands, Responses, Notifications: |
@@ -2230,7 +2214,7 @@ enum il_measure_type { | |||
2230 | struct il_spectrum_notification { | 2214 | struct il_spectrum_notification { |
2231 | u8 id; /* measurement id -- 0 or 1 */ | 2215 | u8 id; /* measurement id -- 0 or 1 */ |
2232 | u8 token; | 2216 | u8 token; |
2233 | u8 channel_idx; /* idx in measurement channel list */ | 2217 | u8 channel_idx; /* idx in measurement channel list */ |
2234 | u8 state; /* 0 - start, 1 - stop */ | 2218 | u8 state; /* 0 - start, 1 - stop */ |
2235 | __le32 start_time; /* lower 32-bits of TSF */ | 2219 | __le32 start_time; /* lower 32-bits of TSF */ |
2236 | u8 band; /* 0 - 5.2GHz, 1 - 2.4GHz */ | 2220 | u8 band; /* 0 - 5.2GHz, 1 - 2.4GHz */ |
@@ -2306,8 +2290,8 @@ struct il3945_powertable_cmd { | |||
2306 | 2290 | ||
2307 | struct il_powertable_cmd { | 2291 | struct il_powertable_cmd { |
2308 | __le16 flags; | 2292 | __le16 flags; |
2309 | u8 keep_alive_seconds; /* 3945 reserved */ | 2293 | u8 keep_alive_seconds; /* 3945 reserved */ |
2310 | u8 debug_flags; /* 3945 reserved */ | 2294 | u8 debug_flags; /* 3945 reserved */ |
2311 | __le32 rx_data_timeout; | 2295 | __le32 rx_data_timeout; |
2312 | __le32 tx_data_timeout; | 2296 | __le32 tx_data_timeout; |
2313 | __le32 sleep_interval[IL_POWER_VEC_SIZE]; | 2297 | __le32 sleep_interval[IL_POWER_VEC_SIZE]; |
@@ -2355,10 +2339,10 @@ struct il_card_state_notif { | |||
2355 | #define RXON_CARD_DISABLED 0x10 | 2339 | #define RXON_CARD_DISABLED 0x10 |
2356 | 2340 | ||
2357 | struct il_ct_kill_config { | 2341 | struct il_ct_kill_config { |
2358 | __le32 reserved; | 2342 | __le32 reserved; |
2359 | __le32 critical_temperature_M; | 2343 | __le32 critical_temperature_M; |
2360 | __le32 critical_temperature_R; | 2344 | __le32 critical_temperature_R; |
2361 | } __packed; | 2345 | } __packed; |
2362 | 2346 | ||
2363 | /****************************************************************************** | 2347 | /****************************************************************************** |
2364 | * (8) | 2348 | * (8) |
@@ -2397,7 +2381,7 @@ struct il3945_scan_channel { | |||
2397 | * 5:7 reserved | 2381 | * 5:7 reserved |
2398 | */ | 2382 | */ |
2399 | u8 type; | 2383 | u8 type; |
2400 | u8 channel; /* band is selected by il3945_scan_cmd "flags" field */ | 2384 | u8 channel; /* band is selected by il3945_scan_cmd "flags" field */ |
2401 | struct il3945_tx_power tpc; | 2385 | struct il3945_tx_power tpc; |
2402 | __le16 active_dwell; /* in 1024-uSec TU (time units), typ 5-50 */ | 2386 | __le16 active_dwell; /* in 1024-uSec TU (time units), typ 5-50 */ |
2403 | __le16 passive_dwell; /* in 1024-uSec TU (time units), typ 20-500 */ | 2387 | __le16 passive_dwell; /* in 1024-uSec TU (time units), typ 20-500 */ |
@@ -2415,7 +2399,7 @@ struct il_scan_channel { | |||
2415 | * 21:31 reserved | 2399 | * 21:31 reserved |
2416 | */ | 2400 | */ |
2417 | __le32 type; | 2401 | __le32 type; |
2418 | __le16 channel; /* band is selected by il_scan_cmd "flags" field */ | 2402 | __le16 channel; /* band is selected by il_scan_cmd "flags" field */ |
2419 | u8 tx_gain; /* gain for analog radio */ | 2403 | u8 tx_gain; /* gain for analog radio */ |
2420 | u8 dsp_atten; /* gain for DSP */ | 2404 | u8 dsp_atten; /* gain for DSP */ |
2421 | __le16 active_dwell; /* in 1024-uSec TU (time units), typ 5-50 */ | 2405 | __le16 active_dwell; /* in 1024-uSec TU (time units), typ 5-50 */ |
@@ -2631,7 +2615,7 @@ struct il_scanresults_notification { | |||
2631 | u8 channel; | 2615 | u8 channel; |
2632 | u8 band; | 2616 | u8 band; |
2633 | u8 probe_status; | 2617 | u8 probe_status; |
2634 | u8 num_probe_not_sent; /* not enough time to send */ | 2618 | u8 num_probe_not_sent; /* not enough time to send */ |
2635 | __le32 tsf_low; | 2619 | __le32 tsf_low; |
2636 | __le32 tsf_high; | 2620 | __le32 tsf_high; |
2637 | __le32 stats[NUMBER_OF_STATS]; | 2621 | __le32 stats[NUMBER_OF_STATS]; |
@@ -2648,7 +2632,6 @@ struct il_scancomplete_notification { | |||
2648 | __le32 tsf_high; | 2632 | __le32 tsf_high; |
2649 | } __packed; | 2633 | } __packed; |
2650 | 2634 | ||
2651 | |||
2652 | /****************************************************************************** | 2635 | /****************************************************************************** |
2653 | * (9) | 2636 | * (9) |
2654 | * IBSS/AP Commands and Notifications: | 2637 | * IBSS/AP Commands and Notifications: |
@@ -2849,15 +2832,15 @@ struct stats_rx_non_phy { | |||
2849 | __le32 num_missed_bcon; /* number of missed beacons */ | 2832 | __le32 num_missed_bcon; /* number of missed beacons */ |
2850 | __le32 adc_rx_saturation_time; /* count in 0.8us units the time the | 2833 | __le32 adc_rx_saturation_time; /* count in 0.8us units the time the |
2851 | * ADC was in saturation */ | 2834 | * ADC was in saturation */ |
2852 | __le32 ina_detection_search_time;/* total time (in 0.8us) searched | 2835 | __le32 ina_detection_search_time; /* total time (in 0.8us) searched |
2853 | * for INA */ | 2836 | * for INA */ |
2854 | __le32 beacon_silence_rssi_a; /* RSSI silence after beacon frame */ | 2837 | __le32 beacon_silence_rssi_a; /* RSSI silence after beacon frame */ |
2855 | __le32 beacon_silence_rssi_b; /* RSSI silence after beacon frame */ | 2838 | __le32 beacon_silence_rssi_b; /* RSSI silence after beacon frame */ |
2856 | __le32 beacon_silence_rssi_c; /* RSSI silence after beacon frame */ | 2839 | __le32 beacon_silence_rssi_c; /* RSSI silence after beacon frame */ |
2857 | __le32 interference_data_flag; /* flag for interference data | 2840 | __le32 interference_data_flag; /* flag for interference data |
2858 | * availability. 1 when data is | 2841 | * availability. 1 when data is |
2859 | * available. */ | 2842 | * available. */ |
2860 | __le32 channel_load; /* counts RX Enable time in uSec */ | 2843 | __le32 channel_load; /* counts RX Enable time in uSec */ |
2861 | __le32 dsp_false_alarms; /* DSP false alarm (both OFDM | 2844 | __le32 dsp_false_alarms; /* DSP false alarm (both OFDM |
2862 | * and CCK) counter */ | 2845 | * and CCK) counter */ |
2863 | __le32 beacon_rssi_a; | 2846 | __le32 beacon_rssi_a; |
@@ -2922,7 +2905,6 @@ struct stats_tx { | |||
2922 | __le32 reserved1; | 2905 | __le32 reserved1; |
2923 | } __packed; | 2906 | } __packed; |
2924 | 2907 | ||
2925 | |||
2926 | struct stats_div { | 2908 | struct stats_div { |
2927 | __le32 tx_on_a; | 2909 | __le32 tx_on_a; |
2928 | __le32 tx_on_b; | 2910 | __le32 tx_on_b; |
@@ -2933,7 +2915,7 @@ struct stats_div { | |||
2933 | } __packed; | 2915 | } __packed; |
2934 | 2916 | ||
2935 | struct stats_general_common { | 2917 | struct stats_general_common { |
2936 | __le32 temperature; /* radio temperature */ | 2918 | __le32 temperature; /* radio temperature */ |
2937 | struct stats_dbg dbg; | 2919 | struct stats_dbg dbg; |
2938 | __le32 sleep_time; | 2920 | __le32 sleep_time; |
2939 | __le32 slots_out; | 2921 | __le32 slots_out; |
@@ -2975,7 +2957,7 @@ struct stats_general { | |||
2975 | * does not affect the response to the C_STATS 0x9c itself. | 2957 | * does not affect the response to the C_STATS 0x9c itself. |
2976 | */ | 2958 | */ |
2977 | #define IL_STATS_CONF_CLEAR_STATS cpu_to_le32(0x1) /* see above */ | 2959 | #define IL_STATS_CONF_CLEAR_STATS cpu_to_le32(0x1) /* see above */ |
2978 | #define IL_STATS_CONF_DISABLE_NOTIF cpu_to_le32(0x2)/* see above */ | 2960 | #define IL_STATS_CONF_DISABLE_NOTIF cpu_to_le32(0x2) /* see above */ |
2979 | struct il_stats_cmd { | 2961 | struct il_stats_cmd { |
2980 | __le32 configuration_flags; /* IL_STATS_CONF_* */ | 2962 | __le32 configuration_flags; /* IL_STATS_CONF_* */ |
2981 | } __packed; | 2963 | } __packed; |
@@ -3043,7 +3025,6 @@ struct il_missed_beacon_notif { | |||
3043 | __le32 num_recvd_beacons; | 3025 | __le32 num_recvd_beacons; |
3044 | } __packed; | 3026 | } __packed; |
3045 | 3027 | ||
3046 | |||
3047 | /****************************************************************************** | 3028 | /****************************************************************************** |
3048 | * (11) | 3029 | * (11) |
3049 | * Rx Calibration Commands: | 3030 | * Rx Calibration Commands: |
@@ -3241,11 +3222,10 @@ struct il_missed_beacon_notif { | |||
3241 | * Always use "1" in "control" to update uCode's working table and DSP. | 3222 | * Always use "1" in "control" to update uCode's working table and DSP. |
3242 | */ | 3223 | */ |
3243 | struct il_sensitivity_cmd { | 3224 | struct il_sensitivity_cmd { |
3244 | __le16 control; /* always use "1" */ | 3225 | __le16 control; /* always use "1" */ |
3245 | __le16 table[HD_TBL_SIZE]; /* use HD_* as idx */ | 3226 | __le16 table[HD_TBL_SIZE]; /* use HD_* as idx */ |
3246 | } __packed; | 3227 | } __packed; |
3247 | 3228 | ||
3248 | |||
3249 | /** | 3229 | /** |
3250 | * C_PHY_CALIBRATION = 0xb0 (command, has simple generic response) | 3230 | * C_PHY_CALIBRATION = 0xb0 (command, has simple generic response) |
3251 | * | 3231 | * |
@@ -3305,8 +3285,8 @@ struct il_sensitivity_cmd { | |||
3305 | /* The default calibrate table size if not specified by firmware */ | 3285 | /* The default calibrate table size if not specified by firmware */ |
3306 | #define IL_DEFAULT_STANDARD_PHY_CALIBRATE_TBL_SIZE 18 | 3286 | #define IL_DEFAULT_STANDARD_PHY_CALIBRATE_TBL_SIZE 18 |
3307 | enum { | 3287 | enum { |
3308 | IL_PHY_CALIBRATE_DIFF_GAIN_CMD = 7, | 3288 | IL_PHY_CALIBRATE_DIFF_GAIN_CMD = 7, |
3309 | IL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE = 19, | 3289 | IL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE = 19, |
3310 | }; | 3290 | }; |
3311 | 3291 | ||
3312 | #define IL_MAX_PHY_CALIBRATE_TBL_SIZE (253) | 3292 | #define IL_MAX_PHY_CALIBRATE_TBL_SIZE (253) |
@@ -3350,7 +3330,6 @@ struct il_led_cmd { | |||
3350 | u8 reserved; | 3330 | u8 reserved; |
3351 | } __packed; | 3331 | } __packed; |
3352 | 3332 | ||
3353 | |||
3354 | /****************************************************************************** | 3333 | /****************************************************************************** |
3355 | * (13) | 3334 | * (13) |
3356 | * Union of all expected notifications/responses: | 3335 | * Union of all expected notifications/responses: |
@@ -3394,4 +3373,4 @@ struct il_rx_pkt { | |||
3394 | } u; | 3373 | } u; |
3395 | } __packed; | 3374 | } __packed; |
3396 | 3375 | ||
3397 | #endif /* __il_commands_h__ */ | 3376 | #endif /* __il_commands_h__ */ |
diff --git a/drivers/net/wireless/iwlegacy/common.c b/drivers/net/wireless/iwlegacy/common.c index 627ac9b32012..2e1bbb2e8464 100644 --- a/drivers/net/wireless/iwlegacy/common.c +++ b/drivers/net/wireless/iwlegacy/common.c | |||
@@ -42,7 +42,8 @@ | |||
42 | 42 | ||
43 | #include "common.h" | 43 | #include "common.h" |
44 | 44 | ||
45 | const char *il_get_cmd_string(u8 cmd) | 45 | const char * |
46 | il_get_cmd_string(u8 cmd) | ||
46 | { | 47 | { |
47 | switch (cmd) { | 48 | switch (cmd) { |
48 | IL_CMD(N_ALIVE); | 49 | IL_CMD(N_ALIVE); |
@@ -91,30 +92,30 @@ const char *il_get_cmd_string(u8 cmd) | |||
91 | 92 | ||
92 | } | 93 | } |
93 | } | 94 | } |
95 | |||
94 | EXPORT_SYMBOL(il_get_cmd_string); | 96 | EXPORT_SYMBOL(il_get_cmd_string); |
95 | 97 | ||
96 | #define HOST_COMPLETE_TIMEOUT (HZ / 2) | 98 | #define HOST_COMPLETE_TIMEOUT (HZ / 2) |
97 | 99 | ||
98 | static void il_generic_cmd_callback(struct il_priv *il, | 100 | static void |
99 | struct il_device_cmd *cmd, | 101 | il_generic_cmd_callback(struct il_priv *il, struct il_device_cmd *cmd, |
100 | struct il_rx_pkt *pkt) | 102 | struct il_rx_pkt *pkt) |
101 | { | 103 | { |
102 | if (pkt->hdr.flags & IL_CMD_FAILED_MSK) { | 104 | if (pkt->hdr.flags & IL_CMD_FAILED_MSK) { |
103 | IL_ERR("Bad return from %s (0x%08X)\n", | 105 | IL_ERR("Bad return from %s (0x%08X)\n", |
104 | il_get_cmd_string(cmd->hdr.cmd), pkt->hdr.flags); | 106 | il_get_cmd_string(cmd->hdr.cmd), pkt->hdr.flags); |
105 | return; | 107 | return; |
106 | } | 108 | } |
107 | |||
108 | #ifdef CONFIG_IWLEGACY_DEBUG | 109 | #ifdef CONFIG_IWLEGACY_DEBUG |
109 | switch (cmd->hdr.cmd) { | 110 | switch (cmd->hdr.cmd) { |
110 | case C_TX_LINK_QUALITY_CMD: | 111 | case C_TX_LINK_QUALITY_CMD: |
111 | case C_SENSITIVITY: | 112 | case C_SENSITIVITY: |
112 | D_HC_DUMP("back from %s (0x%08X)\n", | 113 | D_HC_DUMP("back from %s (0x%08X)\n", |
113 | il_get_cmd_string(cmd->hdr.cmd), pkt->hdr.flags); | 114 | il_get_cmd_string(cmd->hdr.cmd), pkt->hdr.flags); |
114 | break; | 115 | break; |
115 | default: | 116 | default: |
116 | D_HC("back from %s (0x%08X)\n", | 117 | D_HC("back from %s (0x%08X)\n", il_get_cmd_string(cmd->hdr.cmd), |
117 | il_get_cmd_string(cmd->hdr.cmd), pkt->hdr.flags); | 118 | pkt->hdr.flags); |
118 | } | 119 | } |
119 | #endif | 120 | #endif |
120 | } | 121 | } |
@@ -139,13 +140,14 @@ il_send_cmd_async(struct il_priv *il, struct il_host_cmd *cmd) | |||
139 | ret = il_enqueue_hcmd(il, cmd); | 140 | ret = il_enqueue_hcmd(il, cmd); |
140 | if (ret < 0) { | 141 | if (ret < 0) { |
141 | IL_ERR("Error sending %s: enqueue_hcmd failed: %d\n", | 142 | IL_ERR("Error sending %s: enqueue_hcmd failed: %d\n", |
142 | il_get_cmd_string(cmd->id), ret); | 143 | il_get_cmd_string(cmd->id), ret); |
143 | return ret; | 144 | return ret; |
144 | } | 145 | } |
145 | return 0; | 146 | return 0; |
146 | } | 147 | } |
147 | 148 | ||
148 | int il_send_cmd_sync(struct il_priv *il, struct il_host_cmd *cmd) | 149 | int |
150 | il_send_cmd_sync(struct il_priv *il, struct il_host_cmd *cmd) | ||
149 | { | 151 | { |
150 | int cmd_idx; | 152 | int cmd_idx; |
151 | int ret; | 153 | int ret; |
@@ -154,38 +156,36 @@ int il_send_cmd_sync(struct il_priv *il, struct il_host_cmd *cmd) | |||
154 | 156 | ||
155 | BUG_ON(cmd->flags & CMD_ASYNC); | 157 | BUG_ON(cmd->flags & CMD_ASYNC); |
156 | 158 | ||
157 | /* A synchronous command can not have a callback set. */ | 159 | /* A synchronous command can not have a callback set. */ |
158 | BUG_ON(cmd->callback); | 160 | BUG_ON(cmd->callback); |
159 | 161 | ||
160 | D_INFO("Attempting to send sync command %s\n", | 162 | D_INFO("Attempting to send sync command %s\n", |
161 | il_get_cmd_string(cmd->id)); | 163 | il_get_cmd_string(cmd->id)); |
162 | 164 | ||
163 | set_bit(S_HCMD_ACTIVE, &il->status); | 165 | set_bit(S_HCMD_ACTIVE, &il->status); |
164 | D_INFO("Setting HCMD_ACTIVE for command %s\n", | 166 | D_INFO("Setting HCMD_ACTIVE for command %s\n", |
165 | il_get_cmd_string(cmd->id)); | 167 | il_get_cmd_string(cmd->id)); |
166 | 168 | ||
167 | cmd_idx = il_enqueue_hcmd(il, cmd); | 169 | cmd_idx = il_enqueue_hcmd(il, cmd); |
168 | if (cmd_idx < 0) { | 170 | if (cmd_idx < 0) { |
169 | ret = cmd_idx; | 171 | ret = cmd_idx; |
170 | IL_ERR("Error sending %s: enqueue_hcmd failed: %d\n", | 172 | IL_ERR("Error sending %s: enqueue_hcmd failed: %d\n", |
171 | il_get_cmd_string(cmd->id), ret); | 173 | il_get_cmd_string(cmd->id), ret); |
172 | goto out; | 174 | goto out; |
173 | } | 175 | } |
174 | 176 | ||
175 | ret = wait_event_timeout(il->wait_command_queue, | 177 | ret = wait_event_timeout(il->wait_command_queue, |
176 | !test_bit(S_HCMD_ACTIVE, &il->status), | 178 | !test_bit(S_HCMD_ACTIVE, &il->status), |
177 | HOST_COMPLETE_TIMEOUT); | 179 | HOST_COMPLETE_TIMEOUT); |
178 | if (!ret) { | 180 | if (!ret) { |
179 | if (test_bit(S_HCMD_ACTIVE, &il->status)) { | 181 | if (test_bit(S_HCMD_ACTIVE, &il->status)) { |
180 | IL_ERR( | 182 | IL_ERR("Error sending %s: time out after %dms.\n", |
181 | "Error sending %s: time out after %dms.\n", | 183 | il_get_cmd_string(cmd->id), |
182 | il_get_cmd_string(cmd->id), | 184 | jiffies_to_msecs(HOST_COMPLETE_TIMEOUT)); |
183 | jiffies_to_msecs(HOST_COMPLETE_TIMEOUT)); | ||
184 | 185 | ||
185 | clear_bit(S_HCMD_ACTIVE, &il->status); | 186 | clear_bit(S_HCMD_ACTIVE, &il->status); |
186 | D_INFO( | 187 | D_INFO("Clearing HCMD_ACTIVE for command %s\n", |
187 | "Clearing HCMD_ACTIVE for command %s\n", | 188 | il_get_cmd_string(cmd->id)); |
188 | il_get_cmd_string(cmd->id)); | ||
189 | ret = -ETIMEDOUT; | 189 | ret = -ETIMEDOUT; |
190 | goto cancel; | 190 | goto cancel; |
191 | } | 191 | } |
@@ -193,19 +193,19 @@ int il_send_cmd_sync(struct il_priv *il, struct il_host_cmd *cmd) | |||
193 | 193 | ||
194 | if (test_bit(S_RF_KILL_HW, &il->status)) { | 194 | if (test_bit(S_RF_KILL_HW, &il->status)) { |
195 | IL_ERR("Command %s aborted: RF KILL Switch\n", | 195 | IL_ERR("Command %s aborted: RF KILL Switch\n", |
196 | il_get_cmd_string(cmd->id)); | 196 | il_get_cmd_string(cmd->id)); |
197 | ret = -ECANCELED; | 197 | ret = -ECANCELED; |
198 | goto fail; | 198 | goto fail; |
199 | } | 199 | } |
200 | if (test_bit(S_FW_ERROR, &il->status)) { | 200 | if (test_bit(S_FW_ERROR, &il->status)) { |
201 | IL_ERR("Command %s failed: FW Error\n", | 201 | IL_ERR("Command %s failed: FW Error\n", |
202 | il_get_cmd_string(cmd->id)); | 202 | il_get_cmd_string(cmd->id)); |
203 | ret = -EIO; | 203 | ret = -EIO; |
204 | goto fail; | 204 | goto fail; |
205 | } | 205 | } |
206 | if ((cmd->flags & CMD_WANT_SKB) && !cmd->reply_page) { | 206 | if ((cmd->flags & CMD_WANT_SKB) && !cmd->reply_page) { |
207 | IL_ERR("Error: Response NULL in '%s'\n", | 207 | IL_ERR("Error: Response NULL in '%s'\n", |
208 | il_get_cmd_string(cmd->id)); | 208 | il_get_cmd_string(cmd->id)); |
209 | ret = -EIO; | 209 | ret = -EIO; |
210 | goto cancel; | 210 | goto cancel; |
211 | } | 211 | } |
@@ -221,8 +221,7 @@ cancel: | |||
221 | * in later, it will possibly set an invalid | 221 | * in later, it will possibly set an invalid |
222 | * address (cmd->meta.source). | 222 | * address (cmd->meta.source). |
223 | */ | 223 | */ |
224 | il->txq[il->cmd_queue].meta[cmd_idx].flags &= | 224 | il->txq[il->cmd_queue].meta[cmd_idx].flags &= ~CMD_WANT_SKB; |
225 | ~CMD_WANT_SKB; | ||
226 | } | 225 | } |
227 | fail: | 226 | fail: |
228 | if (cmd->reply_page) { | 227 | if (cmd->reply_page) { |
@@ -232,15 +231,18 @@ fail: | |||
232 | out: | 231 | out: |
233 | return ret; | 232 | return ret; |
234 | } | 233 | } |
234 | |||
235 | EXPORT_SYMBOL(il_send_cmd_sync); | 235 | EXPORT_SYMBOL(il_send_cmd_sync); |
236 | 236 | ||
237 | int il_send_cmd(struct il_priv *il, struct il_host_cmd *cmd) | 237 | int |
238 | il_send_cmd(struct il_priv *il, struct il_host_cmd *cmd) | ||
238 | { | 239 | { |
239 | if (cmd->flags & CMD_ASYNC) | 240 | if (cmd->flags & CMD_ASYNC) |
240 | return il_send_cmd_async(il, cmd); | 241 | return il_send_cmd_async(il, cmd); |
241 | 242 | ||
242 | return il_send_cmd_sync(il, cmd); | 243 | return il_send_cmd_sync(il, cmd); |
243 | } | 244 | } |
245 | |||
244 | EXPORT_SYMBOL(il_send_cmd); | 246 | EXPORT_SYMBOL(il_send_cmd); |
245 | 247 | ||
246 | int | 248 | int |
@@ -254,13 +256,14 @@ il_send_cmd_pdu(struct il_priv *il, u8 id, u16 len, const void *data) | |||
254 | 256 | ||
255 | return il_send_cmd_sync(il, &cmd); | 257 | return il_send_cmd_sync(il, &cmd); |
256 | } | 258 | } |
259 | |||
257 | EXPORT_SYMBOL(il_send_cmd_pdu); | 260 | EXPORT_SYMBOL(il_send_cmd_pdu); |
258 | 261 | ||
259 | int il_send_cmd_pdu_async(struct il_priv *il, | 262 | int |
260 | u8 id, u16 len, const void *data, | 263 | il_send_cmd_pdu_async(struct il_priv *il, u8 id, u16 len, const void *data, |
261 | void (*callback)(struct il_priv *il, | 264 | void (*callback) (struct il_priv * il, |
262 | struct il_device_cmd *cmd, | 265 | struct il_device_cmd * cmd, |
263 | struct il_rx_pkt *pkt)) | 266 | struct il_rx_pkt * pkt)) |
264 | { | 267 | { |
265 | struct il_host_cmd cmd = { | 268 | struct il_host_cmd cmd = { |
266 | .id = id, | 269 | .id = id, |
@@ -273,13 +276,14 @@ int il_send_cmd_pdu_async(struct il_priv *il, | |||
273 | 276 | ||
274 | return il_send_cmd_async(il, &cmd); | 277 | return il_send_cmd_async(il, &cmd); |
275 | } | 278 | } |
279 | |||
276 | EXPORT_SYMBOL(il_send_cmd_pdu_async); | 280 | EXPORT_SYMBOL(il_send_cmd_pdu_async); |
277 | 281 | ||
278 | /* default: IL_LED_BLINK(0) using blinking idx table */ | 282 | /* default: IL_LED_BLINK(0) using blinking idx table */ |
279 | static int led_mode; | 283 | static int led_mode; |
280 | module_param(led_mode, int, S_IRUGO); | 284 | module_param(led_mode, int, S_IRUGO); |
281 | MODULE_PARM_DESC(led_mode, "0=system default, " | 285 | MODULE_PARM_DESC(led_mode, |
282 | "1=On(RF On)/Off(RF Off), 2=blinking"); | 286 | "0=system default, " "1=On(RF On)/Off(RF Off), 2=blinking"); |
283 | 287 | ||
284 | /* Throughput OFF time(ms) ON time (ms) | 288 | /* Throughput OFF time(ms) ON time (ms) |
285 | * >300 25 25 | 289 | * >300 25 25 |
@@ -295,16 +299,16 @@ MODULE_PARM_DESC(led_mode, "0=system default, " | |||
295 | * <=0 SOLID ON | 299 | * <=0 SOLID ON |
296 | */ | 300 | */ |
297 | static const struct ieee80211_tpt_blink il_blink[] = { | 301 | static const struct ieee80211_tpt_blink il_blink[] = { |
298 | { .throughput = 0, .blink_time = 334 }, | 302 | {.throughput = 0,.blink_time = 334}, |
299 | { .throughput = 1 * 1024 - 1, .blink_time = 260 }, | 303 | {.throughput = 1 * 1024 - 1,.blink_time = 260}, |
300 | { .throughput = 5 * 1024 - 1, .blink_time = 220 }, | 304 | {.throughput = 5 * 1024 - 1,.blink_time = 220}, |
301 | { .throughput = 10 * 1024 - 1, .blink_time = 190 }, | 305 | {.throughput = 10 * 1024 - 1,.blink_time = 190}, |
302 | { .throughput = 20 * 1024 - 1, .blink_time = 170 }, | 306 | {.throughput = 20 * 1024 - 1,.blink_time = 170}, |
303 | { .throughput = 50 * 1024 - 1, .blink_time = 150 }, | 307 | {.throughput = 50 * 1024 - 1,.blink_time = 150}, |
304 | { .throughput = 70 * 1024 - 1, .blink_time = 130 }, | 308 | {.throughput = 70 * 1024 - 1,.blink_time = 130}, |
305 | { .throughput = 100 * 1024 - 1, .blink_time = 110 }, | 309 | {.throughput = 100 * 1024 - 1,.blink_time = 110}, |
306 | { .throughput = 200 * 1024 - 1, .blink_time = 80 }, | 310 | {.throughput = 200 * 1024 - 1,.blink_time = 80}, |
307 | { .throughput = 300 * 1024 - 1, .blink_time = 50 }, | 311 | {.throughput = 300 * 1024 - 1,.blink_time = 50}, |
308 | }; | 312 | }; |
309 | 313 | ||
310 | /* | 314 | /* |
@@ -318,22 +322,21 @@ static const struct ieee80211_tpt_blink il_blink[] = { | |||
318 | * compensation = (100 - averageDeviation) * 64 / 100 | 322 | * compensation = (100 - averageDeviation) * 64 / 100 |
319 | * NewBlinkTime = (compensation * BlinkTime) / 64 | 323 | * NewBlinkTime = (compensation * BlinkTime) / 64 |
320 | */ | 324 | */ |
321 | static inline u8 il_blink_compensation(struct il_priv *il, | 325 | static inline u8 |
322 | u8 time, u16 compensation) | 326 | il_blink_compensation(struct il_priv *il, u8 time, u16 compensation) |
323 | { | 327 | { |
324 | if (!compensation) { | 328 | if (!compensation) { |
325 | IL_ERR("undefined blink compensation: " | 329 | IL_ERR("undefined blink compensation: " |
326 | "use pre-defined blinking time\n"); | 330 | "use pre-defined blinking time\n"); |
327 | return time; | 331 | return time; |
328 | } | 332 | } |
329 | 333 | ||
330 | return (u8)((time * compensation) >> 6); | 334 | return (u8) ((time * compensation) >> 6); |
331 | } | 335 | } |
332 | 336 | ||
333 | /* Set led pattern command */ | 337 | /* Set led pattern command */ |
334 | static int il_led_cmd(struct il_priv *il, | 338 | static int |
335 | unsigned long on, | 339 | il_led_cmd(struct il_priv *il, unsigned long on, unsigned long off) |
336 | unsigned long off) | ||
337 | { | 340 | { |
338 | struct il_led_cmd led_cmd = { | 341 | struct il_led_cmd led_cmd = { |
339 | .id = IL_LED_LINK, | 342 | .id = IL_LED_LINK, |
@@ -353,11 +356,13 @@ static int il_led_cmd(struct il_priv *il, | |||
353 | } | 356 | } |
354 | 357 | ||
355 | D_LED("Led blink time compensation=%u\n", | 358 | D_LED("Led blink time compensation=%u\n", |
356 | il->cfg->base_params->led_compensation); | 359 | il->cfg->base_params->led_compensation); |
357 | led_cmd.on = il_blink_compensation(il, on, | 360 | led_cmd.on = |
358 | il->cfg->base_params->led_compensation); | 361 | il_blink_compensation(il, on, |
359 | led_cmd.off = il_blink_compensation(il, off, | 362 | il->cfg->base_params->led_compensation); |
360 | il->cfg->base_params->led_compensation); | 363 | led_cmd.off = |
364 | il_blink_compensation(il, off, | ||
365 | il->cfg->base_params->led_compensation); | ||
361 | 366 | ||
362 | ret = il->cfg->ops->led->cmd(il, &led_cmd); | 367 | ret = il->cfg->ops->led->cmd(il, &led_cmd); |
363 | if (!ret) { | 368 | if (!ret) { |
@@ -367,8 +372,9 @@ static int il_led_cmd(struct il_priv *il, | |||
367 | return ret; | 372 | return ret; |
368 | } | 373 | } |
369 | 374 | ||
370 | static void il_led_brightness_set(struct led_classdev *led_cdev, | 375 | static void |
371 | enum led_brightness brightness) | 376 | il_led_brightness_set(struct led_classdev *led_cdev, |
377 | enum led_brightness brightness) | ||
372 | { | 378 | { |
373 | struct il_priv *il = container_of(led_cdev, struct il_priv, led); | 379 | struct il_priv *il = container_of(led_cdev, struct il_priv, led); |
374 | unsigned long on = 0; | 380 | unsigned long on = 0; |
@@ -379,16 +385,17 @@ static void il_led_brightness_set(struct led_classdev *led_cdev, | |||
379 | il_led_cmd(il, on, 0); | 385 | il_led_cmd(il, on, 0); |
380 | } | 386 | } |
381 | 387 | ||
382 | static int il_led_blink_set(struct led_classdev *led_cdev, | 388 | static int |
383 | unsigned long *delay_on, | 389 | il_led_blink_set(struct led_classdev *led_cdev, unsigned long *delay_on, |
384 | unsigned long *delay_off) | 390 | unsigned long *delay_off) |
385 | { | 391 | { |
386 | struct il_priv *il = container_of(led_cdev, struct il_priv, led); | 392 | struct il_priv *il = container_of(led_cdev, struct il_priv, led); |
387 | 393 | ||
388 | return il_led_cmd(il, *delay_on, *delay_off); | 394 | return il_led_cmd(il, *delay_on, *delay_off); |
389 | } | 395 | } |
390 | 396 | ||
391 | void il_leds_init(struct il_priv *il) | 397 | void |
398 | il_leds_init(struct il_priv *il) | ||
392 | { | 399 | { |
393 | int mode = led_mode; | 400 | int mode = led_mode; |
394 | int ret; | 401 | int ret; |
@@ -396,8 +403,8 @@ void il_leds_init(struct il_priv *il) | |||
396 | if (mode == IL_LED_DEFAULT) | 403 | if (mode == IL_LED_DEFAULT) |
397 | mode = il->cfg->led_mode; | 404 | mode = il->cfg->led_mode; |
398 | 405 | ||
399 | il->led.name = kasprintf(GFP_KERNEL, "%s-led", | 406 | il->led.name = |
400 | wiphy_name(il->hw->wiphy)); | 407 | kasprintf(GFP_KERNEL, "%s-led", wiphy_name(il->hw->wiphy)); |
401 | il->led.brightness_set = il_led_brightness_set; | 408 | il->led.brightness_set = il_led_brightness_set; |
402 | il->led.blink_set = il_led_blink_set; | 409 | il->led.blink_set = il_led_blink_set; |
403 | il->led.max_brightness = 1; | 410 | il->led.max_brightness = 1; |
@@ -408,13 +415,13 @@ void il_leds_init(struct il_priv *il) | |||
408 | break; | 415 | break; |
409 | case IL_LED_BLINK: | 416 | case IL_LED_BLINK: |
410 | il->led.default_trigger = | 417 | il->led.default_trigger = |
411 | ieee80211_create_tpt_led_trigger(il->hw, | 418 | ieee80211_create_tpt_led_trigger(il->hw, |
412 | IEEE80211_TPT_LEDTRIG_FL_CONNECTED, | 419 | IEEE80211_TPT_LEDTRIG_FL_CONNECTED, |
413 | il_blink, ARRAY_SIZE(il_blink)); | 420 | il_blink, |
421 | ARRAY_SIZE(il_blink)); | ||
414 | break; | 422 | break; |
415 | case IL_LED_RF_STATE: | 423 | case IL_LED_RF_STATE: |
416 | il->led.default_trigger = | 424 | il->led.default_trigger = ieee80211_get_radio_led_name(il->hw); |
417 | ieee80211_get_radio_led_name(il->hw); | ||
418 | break; | 425 | break; |
419 | } | 426 | } |
420 | 427 | ||
@@ -426,9 +433,11 @@ void il_leds_init(struct il_priv *il) | |||
426 | 433 | ||
427 | il->led_registered = true; | 434 | il->led_registered = true; |
428 | } | 435 | } |
436 | |||
429 | EXPORT_SYMBOL(il_leds_init); | 437 | EXPORT_SYMBOL(il_leds_init); |
430 | 438 | ||
431 | void il_leds_exit(struct il_priv *il) | 439 | void |
440 | il_leds_exit(struct il_priv *il) | ||
432 | { | 441 | { |
433 | if (!il->led_registered) | 442 | if (!il->led_registered) |
434 | return; | 443 | return; |
@@ -436,6 +445,7 @@ void il_leds_exit(struct il_priv *il) | |||
436 | led_classdev_unregister(&il->led); | 445 | led_classdev_unregister(&il->led); |
437 | kfree(il->led.name); | 446 | kfree(il->led.name); |
438 | } | 447 | } |
448 | |||
439 | EXPORT_SYMBOL(il_leds_exit); | 449 | EXPORT_SYMBOL(il_leds_exit); |
440 | 450 | ||
441 | /************************** EEPROM BANDS **************************** | 451 | /************************** EEPROM BANDS **************************** |
@@ -491,11 +501,11 @@ static const u8 il_eeprom_band_5[] = { /* 5725-5825MHz */ | |||
491 | 145, 149, 153, 157, 161, 165 | 501 | 145, 149, 153, 157, 161, 165 |
492 | }; | 502 | }; |
493 | 503 | ||
494 | static const u8 il_eeprom_band_6[] = { /* 2.4 ht40 channel */ | 504 | static const u8 il_eeprom_band_6[] = { /* 2.4 ht40 channel */ |
495 | 1, 2, 3, 4, 5, 6, 7 | 505 | 1, 2, 3, 4, 5, 6, 7 |
496 | }; | 506 | }; |
497 | 507 | ||
498 | static const u8 il_eeprom_band_7[] = { /* 5.2 ht40 channel */ | 508 | static const u8 il_eeprom_band_7[] = { /* 5.2 ht40 channel */ |
499 | 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157 | 509 | 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157 |
500 | }; | 510 | }; |
501 | 511 | ||
@@ -505,7 +515,8 @@ static const u8 il_eeprom_band_7[] = { /* 5.2 ht40 channel */ | |||
505 | * | 515 | * |
506 | ******************************************************************************/ | 516 | ******************************************************************************/ |
507 | 517 | ||
508 | static int il_eeprom_verify_signature(struct il_priv *il) | 518 | static int |
519 | il_eeprom_verify_signature(struct il_priv *il) | ||
509 | { | 520 | { |
510 | u32 gp = _il_rd(il, CSR_EEPROM_GP) & CSR_EEPROM_GP_VALID_MSK; | 521 | u32 gp = _il_rd(il, CSR_EEPROM_GP) & CSR_EEPROM_GP_VALID_MSK; |
511 | int ret = 0; | 522 | int ret = 0; |
@@ -516,28 +527,30 @@ static int il_eeprom_verify_signature(struct il_priv *il) | |||
516 | case CSR_EEPROM_GP_GOOD_SIG_EEP_MORE_THAN_4K: | 527 | case CSR_EEPROM_GP_GOOD_SIG_EEP_MORE_THAN_4K: |
517 | break; | 528 | break; |
518 | default: | 529 | default: |
519 | IL_ERR("bad EEPROM signature," | 530 | IL_ERR("bad EEPROM signature," "EEPROM_GP=0x%08x\n", gp); |
520 | "EEPROM_GP=0x%08x\n", gp); | ||
521 | ret = -ENOENT; | 531 | ret = -ENOENT; |
522 | break; | 532 | break; |
523 | } | 533 | } |
524 | return ret; | 534 | return ret; |
525 | } | 535 | } |
526 | 536 | ||
527 | const u8 | 537 | const u8 * |
528 | *il_eeprom_query_addr(const struct il_priv *il, size_t offset) | 538 | il_eeprom_query_addr(const struct il_priv *il, size_t offset) |
529 | { | 539 | { |
530 | BUG_ON(offset >= il->cfg->base_params->eeprom_size); | 540 | BUG_ON(offset >= il->cfg->base_params->eeprom_size); |
531 | return &il->eeprom[offset]; | 541 | return &il->eeprom[offset]; |
532 | } | 542 | } |
543 | |||
533 | EXPORT_SYMBOL(il_eeprom_query_addr); | 544 | EXPORT_SYMBOL(il_eeprom_query_addr); |
534 | 545 | ||
535 | u16 il_eeprom_query16(const struct il_priv *il, size_t offset) | 546 | u16 |
547 | il_eeprom_query16(const struct il_priv * il, size_t offset) | ||
536 | { | 548 | { |
537 | if (!il->eeprom) | 549 | if (!il->eeprom) |
538 | return 0; | 550 | return 0; |
539 | return (u16)il->eeprom[offset] | ((u16)il->eeprom[offset + 1] << 8); | 551 | return (u16) il->eeprom[offset] | ((u16) il->eeprom[offset + 1] << 8); |
540 | } | 552 | } |
553 | |||
541 | EXPORT_SYMBOL(il_eeprom_query16); | 554 | EXPORT_SYMBOL(il_eeprom_query16); |
542 | 555 | ||
543 | /** | 556 | /** |
@@ -547,7 +560,8 @@ EXPORT_SYMBOL(il_eeprom_query16); | |||
547 | * | 560 | * |
548 | * NOTE: This routine uses the non-debug IO access functions. | 561 | * NOTE: This routine uses the non-debug IO access functions. |
549 | */ | 562 | */ |
550 | int il_eeprom_init(struct il_priv *il) | 563 | int |
564 | il_eeprom_init(struct il_priv *il) | ||
551 | { | 565 | { |
552 | __le16 *e; | 566 | __le16 *e; |
553 | u32 gp = _il_rd(il, CSR_EEPROM_GP); | 567 | u32 gp = _il_rd(il, CSR_EEPROM_GP); |
@@ -563,7 +577,7 @@ int il_eeprom_init(struct il_priv *il) | |||
563 | ret = -ENOMEM; | 577 | ret = -ENOMEM; |
564 | goto alloc_err; | 578 | goto alloc_err; |
565 | } | 579 | } |
566 | e = (__le16 *)il->eeprom; | 580 | e = (__le16 *) il->eeprom; |
567 | 581 | ||
568 | il->cfg->ops->lib->apm_ops.init(il); | 582 | il->cfg->ops->lib->apm_ops.init(il); |
569 | 583 | ||
@@ -587,24 +601,23 @@ int il_eeprom_init(struct il_priv *il) | |||
587 | u32 r; | 601 | u32 r; |
588 | 602 | ||
589 | _il_wr(il, CSR_EEPROM_REG, | 603 | _il_wr(il, CSR_EEPROM_REG, |
590 | CSR_EEPROM_REG_MSK_ADDR & (addr << 1)); | 604 | CSR_EEPROM_REG_MSK_ADDR & (addr << 1)); |
591 | 605 | ||
592 | ret = _il_poll_bit(il, CSR_EEPROM_REG, | 606 | ret = |
593 | CSR_EEPROM_REG_READ_VALID_MSK, | 607 | _il_poll_bit(il, CSR_EEPROM_REG, |
594 | CSR_EEPROM_REG_READ_VALID_MSK, | 608 | CSR_EEPROM_REG_READ_VALID_MSK, |
595 | IL_EEPROM_ACCESS_TIMEOUT); | 609 | CSR_EEPROM_REG_READ_VALID_MSK, |
610 | IL_EEPROM_ACCESS_TIMEOUT); | ||
596 | if (ret < 0) { | 611 | if (ret < 0) { |
597 | IL_ERR("Time out reading EEPROM[%d]\n", | 612 | IL_ERR("Time out reading EEPROM[%d]\n", addr); |
598 | addr); | ||
599 | goto done; | 613 | goto done; |
600 | } | 614 | } |
601 | r = _il_rd(il, CSR_EEPROM_REG); | 615 | r = _il_rd(il, CSR_EEPROM_REG); |
602 | e[addr / 2] = cpu_to_le16(r >> 16); | 616 | e[addr / 2] = cpu_to_le16(r >> 16); |
603 | } | 617 | } |
604 | 618 | ||
605 | D_EEPROM("NVM Type: %s, version: 0x%x\n", | 619 | D_EEPROM("NVM Type: %s, version: 0x%x\n", "EEPROM", |
606 | "EEPROM", | 620 | il_eeprom_query16(il, EEPROM_VERSION)); |
607 | il_eeprom_query16(il, EEPROM_VERSION)); | ||
608 | 621 | ||
609 | ret = 0; | 622 | ret = 0; |
610 | done: | 623 | done: |
@@ -618,63 +631,74 @@ err: | |||
618 | alloc_err: | 631 | alloc_err: |
619 | return ret; | 632 | return ret; |
620 | } | 633 | } |
634 | |||
621 | EXPORT_SYMBOL(il_eeprom_init); | 635 | EXPORT_SYMBOL(il_eeprom_init); |
622 | 636 | ||
623 | void il_eeprom_free(struct il_priv *il) | 637 | void |
638 | il_eeprom_free(struct il_priv *il) | ||
624 | { | 639 | { |
625 | kfree(il->eeprom); | 640 | kfree(il->eeprom); |
626 | il->eeprom = NULL; | 641 | il->eeprom = NULL; |
627 | } | 642 | } |
643 | |||
628 | EXPORT_SYMBOL(il_eeprom_free); | 644 | EXPORT_SYMBOL(il_eeprom_free); |
629 | 645 | ||
630 | static void il_init_band_reference(const struct il_priv *il, | 646 | static void |
631 | int eep_band, int *eeprom_ch_count, | 647 | il_init_band_reference(const struct il_priv *il, int eep_band, |
632 | const struct il_eeprom_channel **eeprom_ch_info, | 648 | int *eeprom_ch_count, |
633 | const u8 **eeprom_ch_idx) | 649 | const struct il_eeprom_channel **eeprom_ch_info, |
650 | const u8 ** eeprom_ch_idx) | ||
634 | { | 651 | { |
635 | u32 offset = il->cfg->ops->lib-> | 652 | u32 offset = |
636 | eeprom_ops.regulatory_bands[eep_band - 1]; | 653 | il->cfg->ops->lib->eeprom_ops.regulatory_bands[eep_band - 1]; |
637 | switch (eep_band) { | 654 | switch (eep_band) { |
638 | case 1: /* 2.4GHz band */ | 655 | case 1: /* 2.4GHz band */ |
639 | *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_1); | 656 | *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_1); |
640 | *eeprom_ch_info = (struct il_eeprom_channel *) | 657 | *eeprom_ch_info = |
641 | il_eeprom_query_addr(il, offset); | 658 | (struct il_eeprom_channel *)il_eeprom_query_addr(il, |
659 | offset); | ||
642 | *eeprom_ch_idx = il_eeprom_band_1; | 660 | *eeprom_ch_idx = il_eeprom_band_1; |
643 | break; | 661 | break; |
644 | case 2: /* 4.9GHz band */ | 662 | case 2: /* 4.9GHz band */ |
645 | *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_2); | 663 | *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_2); |
646 | *eeprom_ch_info = (struct il_eeprom_channel *) | 664 | *eeprom_ch_info = |
647 | il_eeprom_query_addr(il, offset); | 665 | (struct il_eeprom_channel *)il_eeprom_query_addr(il, |
666 | offset); | ||
648 | *eeprom_ch_idx = il_eeprom_band_2; | 667 | *eeprom_ch_idx = il_eeprom_band_2; |
649 | break; | 668 | break; |
650 | case 3: /* 5.2GHz band */ | 669 | case 3: /* 5.2GHz band */ |
651 | *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_3); | 670 | *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_3); |
652 | *eeprom_ch_info = (struct il_eeprom_channel *) | 671 | *eeprom_ch_info = |
653 | il_eeprom_query_addr(il, offset); | 672 | (struct il_eeprom_channel *)il_eeprom_query_addr(il, |
673 | offset); | ||
654 | *eeprom_ch_idx = il_eeprom_band_3; | 674 | *eeprom_ch_idx = il_eeprom_band_3; |
655 | break; | 675 | break; |
656 | case 4: /* 5.5GHz band */ | 676 | case 4: /* 5.5GHz band */ |
657 | *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_4); | 677 | *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_4); |
658 | *eeprom_ch_info = (struct il_eeprom_channel *) | 678 | *eeprom_ch_info = |
659 | il_eeprom_query_addr(il, offset); | 679 | (struct il_eeprom_channel *)il_eeprom_query_addr(il, |
680 | offset); | ||
660 | *eeprom_ch_idx = il_eeprom_band_4; | 681 | *eeprom_ch_idx = il_eeprom_band_4; |
661 | break; | 682 | break; |
662 | case 5: /* 5.7GHz band */ | 683 | case 5: /* 5.7GHz band */ |
663 | *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_5); | 684 | *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_5); |
664 | *eeprom_ch_info = (struct il_eeprom_channel *) | 685 | *eeprom_ch_info = |
665 | il_eeprom_query_addr(il, offset); | 686 | (struct il_eeprom_channel *)il_eeprom_query_addr(il, |
687 | offset); | ||
666 | *eeprom_ch_idx = il_eeprom_band_5; | 688 | *eeprom_ch_idx = il_eeprom_band_5; |
667 | break; | 689 | break; |
668 | case 6: /* 2.4GHz ht40 channels */ | 690 | case 6: /* 2.4GHz ht40 channels */ |
669 | *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_6); | 691 | *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_6); |
670 | *eeprom_ch_info = (struct il_eeprom_channel *) | 692 | *eeprom_ch_info = |
671 | il_eeprom_query_addr(il, offset); | 693 | (struct il_eeprom_channel *)il_eeprom_query_addr(il, |
694 | offset); | ||
672 | *eeprom_ch_idx = il_eeprom_band_6; | 695 | *eeprom_ch_idx = il_eeprom_band_6; |
673 | break; | 696 | break; |
674 | case 7: /* 5 GHz ht40 channels */ | 697 | case 7: /* 5 GHz ht40 channels */ |
675 | *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_7); | 698 | *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_7); |
676 | *eeprom_ch_info = (struct il_eeprom_channel *) | 699 | *eeprom_ch_info = |
677 | il_eeprom_query_addr(il, offset); | 700 | (struct il_eeprom_channel *)il_eeprom_query_addr(il, |
701 | offset); | ||
678 | *eeprom_ch_idx = il_eeprom_band_7; | 702 | *eeprom_ch_idx = il_eeprom_band_7; |
679 | break; | 703 | break; |
680 | default: | 704 | default: |
@@ -689,41 +713,35 @@ static void il_init_band_reference(const struct il_priv *il, | |||
689 | * | 713 | * |
690 | * Does not set up a command, or touch hardware. | 714 | * Does not set up a command, or touch hardware. |
691 | */ | 715 | */ |
692 | static int il_mod_ht40_chan_info(struct il_priv *il, | 716 | static int |
693 | enum ieee80211_band band, u16 channel, | 717 | il_mod_ht40_chan_info(struct il_priv *il, enum ieee80211_band band, u16 channel, |
694 | const struct il_eeprom_channel *eeprom_ch, | 718 | const struct il_eeprom_channel *eeprom_ch, |
695 | u8 clear_ht40_extension_channel) | 719 | u8 clear_ht40_extension_channel) |
696 | { | 720 | { |
697 | struct il_channel_info *ch_info; | 721 | struct il_channel_info *ch_info; |
698 | 722 | ||
699 | ch_info = (struct il_channel_info *) | 723 | ch_info = |
700 | il_get_channel_info(il, band, channel); | 724 | (struct il_channel_info *)il_get_channel_info(il, band, channel); |
701 | 725 | ||
702 | if (!il_is_channel_valid(ch_info)) | 726 | if (!il_is_channel_valid(ch_info)) |
703 | return -1; | 727 | return -1; |
704 | 728 | ||
705 | D_EEPROM("HT40 Ch. %d [%sGHz] %s%s%s%s%s(0x%02x %ddBm):" | 729 | D_EEPROM("HT40 Ch. %d [%sGHz] %s%s%s%s%s(0x%02x %ddBm):" |
706 | " Ad-Hoc %ssupported\n", | 730 | " Ad-Hoc %ssupported\n", ch_info->channel, |
707 | ch_info->channel, | 731 | il_is_channel_a_band(ch_info) ? "5.2" : "2.4", |
708 | il_is_channel_a_band(ch_info) ? | 732 | CHECK_AND_PRINT(IBSS), CHECK_AND_PRINT(ACTIVE), |
709 | "5.2" : "2.4", | 733 | CHECK_AND_PRINT(RADAR), CHECK_AND_PRINT(WIDE), |
710 | CHECK_AND_PRINT(IBSS), | 734 | CHECK_AND_PRINT(DFS), eeprom_ch->flags, |
711 | CHECK_AND_PRINT(ACTIVE), | 735 | eeprom_ch->max_power_avg, |
712 | CHECK_AND_PRINT(RADAR), | 736 | ((eeprom_ch->flags & EEPROM_CHANNEL_IBSS) && |
713 | CHECK_AND_PRINT(WIDE), | 737 | !(eeprom_ch->flags & EEPROM_CHANNEL_RADAR)) ? "" : "not "); |
714 | CHECK_AND_PRINT(DFS), | ||
715 | eeprom_ch->flags, | ||
716 | eeprom_ch->max_power_avg, | ||
717 | ((eeprom_ch->flags & EEPROM_CHANNEL_IBSS) | ||
718 | && !(eeprom_ch->flags & EEPROM_CHANNEL_RADAR)) ? | ||
719 | "" : "not "); | ||
720 | 738 | ||
721 | ch_info->ht40_eeprom = *eeprom_ch; | 739 | ch_info->ht40_eeprom = *eeprom_ch; |
722 | ch_info->ht40_max_power_avg = eeprom_ch->max_power_avg; | 740 | ch_info->ht40_max_power_avg = eeprom_ch->max_power_avg; |
723 | ch_info->ht40_flags = eeprom_ch->flags; | 741 | ch_info->ht40_flags = eeprom_ch->flags; |
724 | if (eeprom_ch->flags & EEPROM_CHANNEL_VALID) | 742 | if (eeprom_ch->flags & EEPROM_CHANNEL_VALID) |
725 | ch_info->ht40_extension_channel &= | 743 | ch_info->ht40_extension_channel &= |
726 | ~clear_ht40_extension_channel; | 744 | ~clear_ht40_extension_channel; |
727 | 745 | ||
728 | return 0; | 746 | return 0; |
729 | } | 747 | } |
@@ -734,7 +752,8 @@ static int il_mod_ht40_chan_info(struct il_priv *il, | |||
734 | /** | 752 | /** |
735 | * il_init_channel_map - Set up driver's info for all possible channels | 753 | * il_init_channel_map - Set up driver's info for all possible channels |
736 | */ | 754 | */ |
737 | int il_init_channel_map(struct il_priv *il) | 755 | int |
756 | il_init_channel_map(struct il_priv *il) | ||
738 | { | 757 | { |
739 | int eeprom_ch_count = 0; | 758 | int eeprom_ch_count = 0; |
740 | const u8 *eeprom_ch_idx = NULL; | 759 | const u8 *eeprom_ch_idx = NULL; |
@@ -750,17 +769,15 @@ int il_init_channel_map(struct il_priv *il) | |||
750 | D_EEPROM("Initializing regulatory info from EEPROM\n"); | 769 | D_EEPROM("Initializing regulatory info from EEPROM\n"); |
751 | 770 | ||
752 | il->channel_count = | 771 | il->channel_count = |
753 | ARRAY_SIZE(il_eeprom_band_1) + | 772 | ARRAY_SIZE(il_eeprom_band_1) + ARRAY_SIZE(il_eeprom_band_2) + |
754 | ARRAY_SIZE(il_eeprom_band_2) + | 773 | ARRAY_SIZE(il_eeprom_band_3) + ARRAY_SIZE(il_eeprom_band_4) + |
755 | ARRAY_SIZE(il_eeprom_band_3) + | ||
756 | ARRAY_SIZE(il_eeprom_band_4) + | ||
757 | ARRAY_SIZE(il_eeprom_band_5); | 774 | ARRAY_SIZE(il_eeprom_band_5); |
758 | 775 | ||
759 | D_EEPROM("Parsing data for %d channels.\n", | 776 | D_EEPROM("Parsing data for %d channels.\n", il->channel_count); |
760 | il->channel_count); | ||
761 | 777 | ||
762 | il->channel_info = kzalloc(sizeof(struct il_channel_info) * | 778 | il->channel_info = |
763 | il->channel_count, GFP_KERNEL); | 779 | kzalloc(sizeof(struct il_channel_info) * il->channel_count, |
780 | GFP_KERNEL); | ||
764 | if (!il->channel_info) { | 781 | if (!il->channel_info) { |
765 | IL_ERR("Could not allocate channel_info\n"); | 782 | IL_ERR("Could not allocate channel_info\n"); |
766 | il->channel_count = 0; | 783 | il->channel_count = 0; |
@@ -775,13 +792,14 @@ int il_init_channel_map(struct il_priv *il) | |||
775 | for (band = 1; band <= 5; band++) { | 792 | for (band = 1; band <= 5; band++) { |
776 | 793 | ||
777 | il_init_band_reference(il, band, &eeprom_ch_count, | 794 | il_init_band_reference(il, band, &eeprom_ch_count, |
778 | &eeprom_ch_info, &eeprom_ch_idx); | 795 | &eeprom_ch_info, &eeprom_ch_idx); |
779 | 796 | ||
780 | /* Loop through each band adding each of the channels */ | 797 | /* Loop through each band adding each of the channels */ |
781 | for (ch = 0; ch < eeprom_ch_count; ch++) { | 798 | for (ch = 0; ch < eeprom_ch_count; ch++) { |
782 | ch_info->channel = eeprom_ch_idx[ch]; | 799 | ch_info->channel = eeprom_ch_idx[ch]; |
783 | ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ : | 800 | ch_info->band = |
784 | IEEE80211_BAND_5GHZ; | 801 | (band == |
802 | 1) ? IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ; | ||
785 | 803 | ||
786 | /* permanently store EEPROM's channel regulatory flags | 804 | /* permanently store EEPROM's channel regulatory flags |
787 | * and max power in channel info database. */ | 805 | * and max power in channel info database. */ |
@@ -793,16 +811,14 @@ int il_init_channel_map(struct il_priv *il) | |||
793 | /* First write that ht40 is not enabled, and then enable | 811 | /* First write that ht40 is not enabled, and then enable |
794 | * one by one */ | 812 | * one by one */ |
795 | ch_info->ht40_extension_channel = | 813 | ch_info->ht40_extension_channel = |
796 | IEEE80211_CHAN_NO_HT40; | 814 | IEEE80211_CHAN_NO_HT40; |
797 | 815 | ||
798 | if (!(il_is_channel_valid(ch_info))) { | 816 | if (!(il_is_channel_valid(ch_info))) { |
799 | D_EEPROM( | 817 | D_EEPROM("Ch. %d Flags %x [%sGHz] - " |
800 | "Ch. %d Flags %x [%sGHz] - " | 818 | "No traffic\n", ch_info->channel, |
801 | "No traffic\n", | 819 | ch_info->flags, |
802 | ch_info->channel, | 820 | il_is_channel_a_band(ch_info) ? "5.2" : |
803 | ch_info->flags, | 821 | "2.4"); |
804 | il_is_channel_a_band(ch_info) ? | ||
805 | "5.2" : "2.4"); | ||
806 | ch_info++; | 822 | ch_info++; |
807 | continue; | 823 | continue; |
808 | } | 824 | } |
@@ -813,25 +829,22 @@ int il_init_channel_map(struct il_priv *il) | |||
813 | ch_info->scan_power = eeprom_ch_info[ch].max_power_avg; | 829 | ch_info->scan_power = eeprom_ch_info[ch].max_power_avg; |
814 | ch_info->min_power = 0; | 830 | ch_info->min_power = 0; |
815 | 831 | ||
816 | D_EEPROM("Ch. %d [%sGHz] " | 832 | D_EEPROM("Ch. %d [%sGHz] " "%s%s%s%s%s%s(0x%02x %ddBm):" |
817 | "%s%s%s%s%s%s(0x%02x %ddBm):" | 833 | " Ad-Hoc %ssupported\n", ch_info->channel, |
818 | " Ad-Hoc %ssupported\n", | 834 | il_is_channel_a_band(ch_info) ? "5.2" : "2.4", |
819 | ch_info->channel, | 835 | CHECK_AND_PRINT_I(VALID), |
820 | il_is_channel_a_band(ch_info) ? | 836 | CHECK_AND_PRINT_I(IBSS), |
821 | "5.2" : "2.4", | 837 | CHECK_AND_PRINT_I(ACTIVE), |
822 | CHECK_AND_PRINT_I(VALID), | 838 | CHECK_AND_PRINT_I(RADAR), |
823 | CHECK_AND_PRINT_I(IBSS), | 839 | CHECK_AND_PRINT_I(WIDE), |
824 | CHECK_AND_PRINT_I(ACTIVE), | 840 | CHECK_AND_PRINT_I(DFS), |
825 | CHECK_AND_PRINT_I(RADAR), | 841 | eeprom_ch_info[ch].flags, |
826 | CHECK_AND_PRINT_I(WIDE), | 842 | eeprom_ch_info[ch].max_power_avg, |
827 | CHECK_AND_PRINT_I(DFS), | 843 | ((eeprom_ch_info[ch]. |
828 | eeprom_ch_info[ch].flags, | 844 | flags & EEPROM_CHANNEL_IBSS) && |
829 | eeprom_ch_info[ch].max_power_avg, | 845 | !(eeprom_ch_info[ch]. |
830 | ((eeprom_ch_info[ch]. | 846 | flags & EEPROM_CHANNEL_RADAR)) ? "" : |
831 | flags & EEPROM_CHANNEL_IBSS) | 847 | "not "); |
832 | && !(eeprom_ch_info[ch]. | ||
833 | flags & EEPROM_CHANNEL_RADAR)) | ||
834 | ? "" : "not "); | ||
835 | 848 | ||
836 | ch_info++; | 849 | ch_info++; |
837 | } | 850 | } |
@@ -849,40 +862,42 @@ int il_init_channel_map(struct il_priv *il) | |||
849 | enum ieee80211_band ieeeband; | 862 | enum ieee80211_band ieeeband; |
850 | 863 | ||
851 | il_init_band_reference(il, band, &eeprom_ch_count, | 864 | il_init_band_reference(il, band, &eeprom_ch_count, |
852 | &eeprom_ch_info, &eeprom_ch_idx); | 865 | &eeprom_ch_info, &eeprom_ch_idx); |
853 | 866 | ||
854 | /* EEPROM band 6 is 2.4, band 7 is 5 GHz */ | 867 | /* EEPROM band 6 is 2.4, band 7 is 5 GHz */ |
855 | ieeeband = | 868 | ieeeband = |
856 | (band == 6) ? IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ; | 869 | (band == 6) ? IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ; |
857 | 870 | ||
858 | /* Loop through each band adding each of the channels */ | 871 | /* Loop through each band adding each of the channels */ |
859 | for (ch = 0; ch < eeprom_ch_count; ch++) { | 872 | for (ch = 0; ch < eeprom_ch_count; ch++) { |
860 | /* Set up driver's info for lower half */ | 873 | /* Set up driver's info for lower half */ |
861 | il_mod_ht40_chan_info(il, ieeeband, | 874 | il_mod_ht40_chan_info(il, ieeeband, eeprom_ch_idx[ch], |
862 | eeprom_ch_idx[ch], | 875 | &eeprom_ch_info[ch], |
863 | &eeprom_ch_info[ch], | 876 | IEEE80211_CHAN_NO_HT40PLUS); |
864 | IEEE80211_CHAN_NO_HT40PLUS); | ||
865 | 877 | ||
866 | /* Set up driver's info for upper half */ | 878 | /* Set up driver's info for upper half */ |
867 | il_mod_ht40_chan_info(il, ieeeband, | 879 | il_mod_ht40_chan_info(il, ieeeband, |
868 | eeprom_ch_idx[ch] + 4, | 880 | eeprom_ch_idx[ch] + 4, |
869 | &eeprom_ch_info[ch], | 881 | &eeprom_ch_info[ch], |
870 | IEEE80211_CHAN_NO_HT40MINUS); | 882 | IEEE80211_CHAN_NO_HT40MINUS); |
871 | } | 883 | } |
872 | } | 884 | } |
873 | 885 | ||
874 | return 0; | 886 | return 0; |
875 | } | 887 | } |
888 | |||
876 | EXPORT_SYMBOL(il_init_channel_map); | 889 | EXPORT_SYMBOL(il_init_channel_map); |
877 | 890 | ||
878 | /* | 891 | /* |
879 | * il_free_channel_map - undo allocations in il_init_channel_map | 892 | * il_free_channel_map - undo allocations in il_init_channel_map |
880 | */ | 893 | */ |
881 | void il_free_channel_map(struct il_priv *il) | 894 | void |
895 | il_free_channel_map(struct il_priv *il) | ||
882 | { | 896 | { |
883 | kfree(il->channel_info); | 897 | kfree(il->channel_info); |
884 | il->channel_count = 0; | 898 | il->channel_count = 0; |
885 | } | 899 | } |
900 | |||
886 | EXPORT_SYMBOL(il_free_channel_map); | 901 | EXPORT_SYMBOL(il_free_channel_map); |
887 | 902 | ||
888 | /** | 903 | /** |
@@ -890,9 +905,9 @@ EXPORT_SYMBOL(il_free_channel_map); | |||
890 | * | 905 | * |
891 | * Based on band and channel number. | 906 | * Based on band and channel number. |
892 | */ | 907 | */ |
893 | const struct | 908 | const struct il_channel_info * |
894 | il_channel_info *il_get_channel_info(const struct il_priv *il, | 909 | il_get_channel_info(const struct il_priv *il, enum ieee80211_band band, |
895 | enum ieee80211_band band, u16 channel) | 910 | u16 channel) |
896 | { | 911 | { |
897 | int i; | 912 | int i; |
898 | 913 | ||
@@ -913,6 +928,7 @@ il_channel_info *il_get_channel_info(const struct il_priv *il, | |||
913 | 928 | ||
914 | return NULL; | 929 | return NULL; |
915 | } | 930 | } |
931 | |||
916 | EXPORT_SYMBOL(il_get_channel_info); | 932 | EXPORT_SYMBOL(il_get_channel_info); |
917 | 933 | ||
918 | /* | 934 | /* |
@@ -930,11 +946,11 @@ EXPORT_SYMBOL(il_get_channel_info); | |||
930 | 946 | ||
931 | struct il_power_vec_entry { | 947 | struct il_power_vec_entry { |
932 | struct il_powertable_cmd cmd; | 948 | struct il_powertable_cmd cmd; |
933 | u8 no_dtim; /* number of skip dtim */ | 949 | u8 no_dtim; /* number of skip dtim */ |
934 | }; | 950 | }; |
935 | 951 | ||
936 | static void il_power_sleep_cam_cmd(struct il_priv *il, | 952 | static void |
937 | struct il_powertable_cmd *cmd) | 953 | il_power_sleep_cam_cmd(struct il_priv *il, struct il_powertable_cmd *cmd) |
938 | { | 954 | { |
939 | memset(cmd, 0, sizeof(*cmd)); | 955 | memset(cmd, 0, sizeof(*cmd)); |
940 | 956 | ||
@@ -949,25 +965,21 @@ il_set_power(struct il_priv *il, struct il_powertable_cmd *cmd) | |||
949 | { | 965 | { |
950 | D_POWER("Sending power/sleep command\n"); | 966 | D_POWER("Sending power/sleep command\n"); |
951 | D_POWER("Flags value = 0x%08X\n", cmd->flags); | 967 | D_POWER("Flags value = 0x%08X\n", cmd->flags); |
952 | D_POWER("Tx timeout = %u\n", | 968 | D_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout)); |
953 | le32_to_cpu(cmd->tx_data_timeout)); | 969 | D_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout)); |
954 | D_POWER("Rx timeout = %u\n", | 970 | D_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n", |
955 | le32_to_cpu(cmd->rx_data_timeout)); | 971 | le32_to_cpu(cmd->sleep_interval[0]), |
956 | D_POWER( | 972 | le32_to_cpu(cmd->sleep_interval[1]), |
957 | "Sleep interval vector = { %d , %d , %d , %d , %d }\n", | 973 | le32_to_cpu(cmd->sleep_interval[2]), |
958 | le32_to_cpu(cmd->sleep_interval[0]), | 974 | le32_to_cpu(cmd->sleep_interval[3]), |
959 | le32_to_cpu(cmd->sleep_interval[1]), | 975 | le32_to_cpu(cmd->sleep_interval[4])); |
960 | le32_to_cpu(cmd->sleep_interval[2]), | ||
961 | le32_to_cpu(cmd->sleep_interval[3]), | ||
962 | le32_to_cpu(cmd->sleep_interval[4])); | ||
963 | 976 | ||
964 | return il_send_cmd_pdu(il, C_POWER_TBL, | 977 | return il_send_cmd_pdu(il, C_POWER_TBL, |
965 | sizeof(struct il_powertable_cmd), cmd); | 978 | sizeof(struct il_powertable_cmd), cmd); |
966 | } | 979 | } |
967 | 980 | ||
968 | int | 981 | int |
969 | il_power_set_mode(struct il_priv *il, struct il_powertable_cmd *cmd, | 982 | il_power_set_mode(struct il_priv *il, struct il_powertable_cmd *cmd, bool force) |
970 | bool force) | ||
971 | { | 983 | { |
972 | int ret; | 984 | int ret; |
973 | bool update_chains; | 985 | bool update_chains; |
@@ -976,7 +988,7 @@ il_power_set_mode(struct il_priv *il, struct il_powertable_cmd *cmd, | |||
976 | 988 | ||
977 | /* Don't update the RX chain when chain noise calibration is running */ | 989 | /* Don't update the RX chain when chain noise calibration is running */ |
978 | update_chains = il->chain_noise_data.state == IL_CHAIN_NOISE_DONE || | 990 | update_chains = il->chain_noise_data.state == IL_CHAIN_NOISE_DONE || |
979 | il->chain_noise_data.state == IL_CHAIN_NOISE_ALIVE; | 991 | il->chain_noise_data.state == IL_CHAIN_NOISE_ALIVE; |
980 | 992 | ||
981 | if (!memcmp(&il->power_data.sleep_cmd, cmd, sizeof(*cmd)) && !force) | 993 | if (!memcmp(&il->power_data.sleep_cmd, cmd, sizeof(*cmd)) && !force) |
982 | return 0; | 994 | return 0; |
@@ -1002,10 +1014,9 @@ il_power_set_mode(struct il_priv *il, struct il_powertable_cmd *cmd, | |||
1002 | if (il->cfg->ops->lib->update_chain_flags && update_chains) | 1014 | if (il->cfg->ops->lib->update_chain_flags && update_chains) |
1003 | il->cfg->ops->lib->update_chain_flags(il); | 1015 | il->cfg->ops->lib->update_chain_flags(il); |
1004 | else if (il->cfg->ops->lib->update_chain_flags) | 1016 | else if (il->cfg->ops->lib->update_chain_flags) |
1005 | D_POWER( | 1017 | D_POWER("Cannot update the power, chain noise " |
1006 | "Cannot update the power, chain noise " | 1018 | "calibration running: %d\n", |
1007 | "calibration running: %d\n", | 1019 | il->chain_noise_data.state); |
1008 | il->chain_noise_data.state); | ||
1009 | 1020 | ||
1010 | memcpy(&il->power_data.sleep_cmd, cmd, sizeof(*cmd)); | 1021 | memcpy(&il->power_data.sleep_cmd, cmd, sizeof(*cmd)); |
1011 | } else | 1022 | } else |
@@ -1014,17 +1025,20 @@ il_power_set_mode(struct il_priv *il, struct il_powertable_cmd *cmd, | |||
1014 | return ret; | 1025 | return ret; |
1015 | } | 1026 | } |
1016 | 1027 | ||
1017 | int il_power_update_mode(struct il_priv *il, bool force) | 1028 | int |
1029 | il_power_update_mode(struct il_priv *il, bool force) | ||
1018 | { | 1030 | { |
1019 | struct il_powertable_cmd cmd; | 1031 | struct il_powertable_cmd cmd; |
1020 | 1032 | ||
1021 | il_power_sleep_cam_cmd(il, &cmd); | 1033 | il_power_sleep_cam_cmd(il, &cmd); |
1022 | return il_power_set_mode(il, &cmd, force); | 1034 | return il_power_set_mode(il, &cmd, force); |
1023 | } | 1035 | } |
1036 | |||
1024 | EXPORT_SYMBOL(il_power_update_mode); | 1037 | EXPORT_SYMBOL(il_power_update_mode); |
1025 | 1038 | ||
1026 | /* initialize to default */ | 1039 | /* initialize to default */ |
1027 | void il_power_initialize(struct il_priv *il) | 1040 | void |
1041 | il_power_initialize(struct il_priv *il) | ||
1028 | { | 1042 | { |
1029 | u16 lctl = il_pcie_link_ctl(il); | 1043 | u16 lctl = il_pcie_link_ctl(il); |
1030 | 1044 | ||
@@ -1032,15 +1046,14 @@ void il_power_initialize(struct il_priv *il) | |||
1032 | 1046 | ||
1033 | il->power_data.debug_sleep_level_override = -1; | 1047 | il->power_data.debug_sleep_level_override = -1; |
1034 | 1048 | ||
1035 | memset(&il->power_data.sleep_cmd, 0, | 1049 | memset(&il->power_data.sleep_cmd, 0, sizeof(il->power_data.sleep_cmd)); |
1036 | sizeof(il->power_data.sleep_cmd)); | ||
1037 | } | 1050 | } |
1038 | EXPORT_SYMBOL(il_power_initialize); | 1051 | EXPORT_SYMBOL(il_power_initialize); |
1039 | 1052 | ||
1040 | /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after | 1053 | /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after |
1041 | * sending probe req. This should be set long enough to hear probe responses | 1054 | * sending probe req. This should be set long enough to hear probe responses |
1042 | * from more than one AP. */ | 1055 | * from more than one AP. */ |
1043 | #define IL_ACTIVE_DWELL_TIME_24 (30) /* all times in msec */ | 1056 | #define IL_ACTIVE_DWELL_TIME_24 (30) /* all times in msec */ |
1044 | #define IL_ACTIVE_DWELL_TIME_52 (20) | 1057 | #define IL_ACTIVE_DWELL_TIME_52 (20) |
1045 | 1058 | ||
1046 | #define IL_ACTIVE_DWELL_FACTOR_24GHZ (3) | 1059 | #define IL_ACTIVE_DWELL_FACTOR_24GHZ (3) |
@@ -1049,12 +1062,13 @@ EXPORT_SYMBOL(il_power_initialize); | |||
1049 | /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel. | 1062 | /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel. |
1050 | * Must be set longer than active dwell time. | 1063 | * Must be set longer than active dwell time. |
1051 | * For the most reliable scan, set > AP beacon interval (typically 100msec). */ | 1064 | * For the most reliable scan, set > AP beacon interval (typically 100msec). */ |
1052 | #define IL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */ | 1065 | #define IL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */ |
1053 | #define IL_PASSIVE_DWELL_TIME_52 (10) | 1066 | #define IL_PASSIVE_DWELL_TIME_52 (10) |
1054 | #define IL_PASSIVE_DWELL_BASE (100) | 1067 | #define IL_PASSIVE_DWELL_BASE (100) |
1055 | #define IL_CHANNEL_TUNE_TIME 5 | 1068 | #define IL_CHANNEL_TUNE_TIME 5 |
1056 | 1069 | ||
1057 | static int il_send_scan_abort(struct il_priv *il) | 1070 | static int |
1071 | il_send_scan_abort(struct il_priv *il) | ||
1058 | { | 1072 | { |
1059 | int ret; | 1073 | int ret; |
1060 | struct il_rx_pkt *pkt; | 1074 | struct il_rx_pkt *pkt; |
@@ -1093,7 +1107,8 @@ static int il_send_scan_abort(struct il_priv *il) | |||
1093 | return ret; | 1107 | return ret; |
1094 | } | 1108 | } |
1095 | 1109 | ||
1096 | static void il_complete_scan(struct il_priv *il, bool aborted) | 1110 | static void |
1111 | il_complete_scan(struct il_priv *il, bool aborted) | ||
1097 | { | 1112 | { |
1098 | /* check if scan was requested from mac80211 */ | 1113 | /* check if scan was requested from mac80211 */ |
1099 | if (il->scan_request) { | 1114 | if (il->scan_request) { |
@@ -1105,7 +1120,8 @@ static void il_complete_scan(struct il_priv *il, bool aborted) | |||
1105 | il->scan_request = NULL; | 1120 | il->scan_request = NULL; |
1106 | } | 1121 | } |
1107 | 1122 | ||
1108 | void il_force_scan_end(struct il_priv *il) | 1123 | void |
1124 | il_force_scan_end(struct il_priv *il) | ||
1109 | { | 1125 | { |
1110 | lockdep_assert_held(&il->mutex); | 1126 | lockdep_assert_held(&il->mutex); |
1111 | 1127 | ||
@@ -1121,7 +1137,8 @@ void il_force_scan_end(struct il_priv *il) | |||
1121 | il_complete_scan(il, true); | 1137 | il_complete_scan(il, true); |
1122 | } | 1138 | } |
1123 | 1139 | ||
1124 | static void il_do_scan_abort(struct il_priv *il) | 1140 | static void |
1141 | il_do_scan_abort(struct il_priv *il) | ||
1125 | { | 1142 | { |
1126 | int ret; | 1143 | int ret; |
1127 | 1144 | ||
@@ -1148,12 +1165,14 @@ static void il_do_scan_abort(struct il_priv *il) | |||
1148 | /** | 1165 | /** |
1149 | * il_scan_cancel - Cancel any currently executing HW scan | 1166 | * il_scan_cancel - Cancel any currently executing HW scan |
1150 | */ | 1167 | */ |
1151 | int il_scan_cancel(struct il_priv *il) | 1168 | int |
1169 | il_scan_cancel(struct il_priv *il) | ||
1152 | { | 1170 | { |
1153 | D_SCAN("Queuing abort scan\n"); | 1171 | D_SCAN("Queuing abort scan\n"); |
1154 | queue_work(il->workqueue, &il->abort_scan); | 1172 | queue_work(il->workqueue, &il->abort_scan); |
1155 | return 0; | 1173 | return 0; |
1156 | } | 1174 | } |
1175 | |||
1157 | EXPORT_SYMBOL(il_scan_cancel); | 1176 | EXPORT_SYMBOL(il_scan_cancel); |
1158 | 1177 | ||
1159 | /** | 1178 | /** |
@@ -1161,7 +1180,8 @@ EXPORT_SYMBOL(il_scan_cancel); | |||
1161 | * @ms: amount of time to wait (in milliseconds) for scan to abort | 1180 | * @ms: amount of time to wait (in milliseconds) for scan to abort |
1162 | * | 1181 | * |
1163 | */ | 1182 | */ |
1164 | int il_scan_cancel_timeout(struct il_priv *il, unsigned long ms) | 1183 | int |
1184 | il_scan_cancel_timeout(struct il_priv *il, unsigned long ms) | ||
1165 | { | 1185 | { |
1166 | unsigned long timeout = jiffies + msecs_to_jiffies(ms); | 1186 | unsigned long timeout = jiffies + msecs_to_jiffies(ms); |
1167 | 1187 | ||
@@ -1179,11 +1199,12 @@ int il_scan_cancel_timeout(struct il_priv *il, unsigned long ms) | |||
1179 | 1199 | ||
1180 | return test_bit(S_SCAN_HW, &il->status); | 1200 | return test_bit(S_SCAN_HW, &il->status); |
1181 | } | 1201 | } |
1202 | |||
1182 | EXPORT_SYMBOL(il_scan_cancel_timeout); | 1203 | EXPORT_SYMBOL(il_scan_cancel_timeout); |
1183 | 1204 | ||
1184 | /* Service response to C_SCAN (0x80) */ | 1205 | /* Service response to C_SCAN (0x80) */ |
1185 | static void il_hdl_scan(struct il_priv *il, | 1206 | static void |
1186 | struct il_rx_buf *rxb) | 1207 | il_hdl_scan(struct il_priv *il, struct il_rx_buf *rxb) |
1187 | { | 1208 | { |
1188 | #ifdef CONFIG_IWLEGACY_DEBUG | 1209 | #ifdef CONFIG_IWLEGACY_DEBUG |
1189 | struct il_rx_pkt *pkt = rxb_addr(rxb); | 1210 | struct il_rx_pkt *pkt = rxb_addr(rxb); |
@@ -1195,48 +1216,39 @@ static void il_hdl_scan(struct il_priv *il, | |||
1195 | } | 1216 | } |
1196 | 1217 | ||
1197 | /* Service N_SCAN_START (0x82) */ | 1218 | /* Service N_SCAN_START (0x82) */ |
1198 | static void il_hdl_scan_start(struct il_priv *il, | 1219 | static void |
1199 | struct il_rx_buf *rxb) | 1220 | il_hdl_scan_start(struct il_priv *il, struct il_rx_buf *rxb) |
1200 | { | 1221 | { |
1201 | struct il_rx_pkt *pkt = rxb_addr(rxb); | 1222 | struct il_rx_pkt *pkt = rxb_addr(rxb); |
1202 | struct il_scanstart_notification *notif = | 1223 | struct il_scanstart_notification *notif = |
1203 | (struct il_scanstart_notification *)pkt->u.raw; | 1224 | (struct il_scanstart_notification *)pkt->u.raw; |
1204 | il->scan_start_tsf = le32_to_cpu(notif->tsf_low); | 1225 | il->scan_start_tsf = le32_to_cpu(notif->tsf_low); |
1205 | D_SCAN("Scan start: " | 1226 | D_SCAN("Scan start: " "%d [802.11%s] " |
1206 | "%d [802.11%s] " | 1227 | "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n", notif->channel, |
1207 | "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n", | 1228 | notif->band ? "bg" : "a", le32_to_cpu(notif->tsf_high), |
1208 | notif->channel, | 1229 | le32_to_cpu(notif->tsf_low), notif->status, notif->beacon_timer); |
1209 | notif->band ? "bg" : "a", | ||
1210 | le32_to_cpu(notif->tsf_high), | ||
1211 | le32_to_cpu(notif->tsf_low), | ||
1212 | notif->status, notif->beacon_timer); | ||
1213 | } | 1230 | } |
1214 | 1231 | ||
1215 | /* Service N_SCAN_RESULTS (0x83) */ | 1232 | /* Service N_SCAN_RESULTS (0x83) */ |
1216 | static void il_hdl_scan_results(struct il_priv *il, | 1233 | static void |
1217 | struct il_rx_buf *rxb) | 1234 | il_hdl_scan_results(struct il_priv *il, struct il_rx_buf *rxb) |
1218 | { | 1235 | { |
1219 | #ifdef CONFIG_IWLEGACY_DEBUG | 1236 | #ifdef CONFIG_IWLEGACY_DEBUG |
1220 | struct il_rx_pkt *pkt = rxb_addr(rxb); | 1237 | struct il_rx_pkt *pkt = rxb_addr(rxb); |
1221 | struct il_scanresults_notification *notif = | 1238 | struct il_scanresults_notification *notif = |
1222 | (struct il_scanresults_notification *)pkt->u.raw; | 1239 | (struct il_scanresults_notification *)pkt->u.raw; |
1223 | 1240 | ||
1224 | D_SCAN("Scan ch.res: " | 1241 | D_SCAN("Scan ch.res: " "%d [802.11%s] " "(TSF: 0x%08X:%08X) - %d " |
1225 | "%d [802.11%s] " | 1242 | "elapsed=%lu usec\n", notif->channel, notif->band ? "bg" : "a", |
1226 | "(TSF: 0x%08X:%08X) - %d " | 1243 | le32_to_cpu(notif->tsf_high), le32_to_cpu(notif->tsf_low), |
1227 | "elapsed=%lu usec\n", | 1244 | le32_to_cpu(notif->stats[0]), |
1228 | notif->channel, | 1245 | le32_to_cpu(notif->tsf_low) - il->scan_start_tsf); |
1229 | notif->band ? "bg" : "a", | ||
1230 | le32_to_cpu(notif->tsf_high), | ||
1231 | le32_to_cpu(notif->tsf_low), | ||
1232 | le32_to_cpu(notif->stats[0]), | ||
1233 | le32_to_cpu(notif->tsf_low) - il->scan_start_tsf); | ||
1234 | #endif | 1246 | #endif |
1235 | } | 1247 | } |
1236 | 1248 | ||
1237 | /* Service N_SCAN_COMPLETE (0x84) */ | 1249 | /* Service N_SCAN_COMPLETE (0x84) */ |
1238 | static void il_hdl_scan_complete(struct il_priv *il, | 1250 | static void |
1239 | struct il_rx_buf *rxb) | 1251 | il_hdl_scan_complete(struct il_priv *il, struct il_rx_buf *rxb) |
1240 | { | 1252 | { |
1241 | 1253 | ||
1242 | #ifdef CONFIG_IWLEGACY_DEBUG | 1254 | #ifdef CONFIG_IWLEGACY_DEBUG |
@@ -1244,58 +1256,58 @@ static void il_hdl_scan_complete(struct il_priv *il, | |||
1244 | struct il_scancomplete_notification *scan_notif = (void *)pkt->u.raw; | 1256 | struct il_scancomplete_notification *scan_notif = (void *)pkt->u.raw; |
1245 | #endif | 1257 | #endif |
1246 | 1258 | ||
1247 | D_SCAN( | 1259 | D_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n", |
1248 | "Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n", | 1260 | scan_notif->scanned_channels, scan_notif->tsf_low, |
1249 | scan_notif->scanned_channels, | 1261 | scan_notif->tsf_high, scan_notif->status); |
1250 | scan_notif->tsf_low, | ||
1251 | scan_notif->tsf_high, scan_notif->status); | ||
1252 | 1262 | ||
1253 | /* The HW is no longer scanning */ | 1263 | /* The HW is no longer scanning */ |
1254 | clear_bit(S_SCAN_HW, &il->status); | 1264 | clear_bit(S_SCAN_HW, &il->status); |
1255 | 1265 | ||
1256 | D_SCAN("Scan on %sGHz took %dms\n", | 1266 | D_SCAN("Scan on %sGHz took %dms\n", |
1257 | (il->scan_band == IEEE80211_BAND_2GHZ) ? "2.4" : "5.2", | 1267 | (il->scan_band == IEEE80211_BAND_2GHZ) ? "2.4" : "5.2", |
1258 | jiffies_to_msecs(jiffies - il->scan_start)); | 1268 | jiffies_to_msecs(jiffies - il->scan_start)); |
1259 | 1269 | ||
1260 | queue_work(il->workqueue, &il->scan_completed); | 1270 | queue_work(il->workqueue, &il->scan_completed); |
1261 | } | 1271 | } |
1262 | 1272 | ||
1263 | void il_setup_rx_scan_handlers(struct il_priv *il) | 1273 | void |
1274 | il_setup_rx_scan_handlers(struct il_priv *il) | ||
1264 | { | 1275 | { |
1265 | /* scan handlers */ | 1276 | /* scan handlers */ |
1266 | il->handlers[C_SCAN] = il_hdl_scan; | 1277 | il->handlers[C_SCAN] = il_hdl_scan; |
1267 | il->handlers[N_SCAN_START] = | 1278 | il->handlers[N_SCAN_START] = il_hdl_scan_start; |
1268 | il_hdl_scan_start; | 1279 | il->handlers[N_SCAN_RESULTS] = il_hdl_scan_results; |
1269 | il->handlers[N_SCAN_RESULTS] = | 1280 | il->handlers[N_SCAN_COMPLETE] = il_hdl_scan_complete; |
1270 | il_hdl_scan_results; | ||
1271 | il->handlers[N_SCAN_COMPLETE] = | ||
1272 | il_hdl_scan_complete; | ||
1273 | } | 1281 | } |
1282 | |||
1274 | EXPORT_SYMBOL(il_setup_rx_scan_handlers); | 1283 | EXPORT_SYMBOL(il_setup_rx_scan_handlers); |
1275 | 1284 | ||
1276 | inline u16 il_get_active_dwell_time(struct il_priv *il, | 1285 | inline u16 |
1277 | enum ieee80211_band band, | 1286 | il_get_active_dwell_time(struct il_priv *il, enum ieee80211_band band, |
1278 | u8 n_probes) | 1287 | u8 n_probes) |
1279 | { | 1288 | { |
1280 | if (band == IEEE80211_BAND_5GHZ) | 1289 | if (band == IEEE80211_BAND_5GHZ) |
1281 | return IL_ACTIVE_DWELL_TIME_52 + | 1290 | return IL_ACTIVE_DWELL_TIME_52 + |
1282 | IL_ACTIVE_DWELL_FACTOR_52GHZ * (n_probes + 1); | 1291 | IL_ACTIVE_DWELL_FACTOR_52GHZ * (n_probes + 1); |
1283 | else | 1292 | else |
1284 | return IL_ACTIVE_DWELL_TIME_24 + | 1293 | return IL_ACTIVE_DWELL_TIME_24 + |
1285 | IL_ACTIVE_DWELL_FACTOR_24GHZ * (n_probes + 1); | 1294 | IL_ACTIVE_DWELL_FACTOR_24GHZ * (n_probes + 1); |
1286 | } | 1295 | } |
1296 | |||
1287 | EXPORT_SYMBOL(il_get_active_dwell_time); | 1297 | EXPORT_SYMBOL(il_get_active_dwell_time); |
1288 | 1298 | ||
1289 | u16 il_get_passive_dwell_time(struct il_priv *il, | 1299 | u16 |
1290 | enum ieee80211_band band, | 1300 | il_get_passive_dwell_time(struct il_priv * il, enum ieee80211_band band, |
1291 | struct ieee80211_vif *vif) | 1301 | struct ieee80211_vif * vif) |
1292 | { | 1302 | { |
1293 | struct il_rxon_context *ctx = &il->ctx; | 1303 | struct il_rxon_context *ctx = &il->ctx; |
1294 | u16 value; | 1304 | u16 value; |
1295 | 1305 | ||
1296 | u16 passive = (band == IEEE80211_BAND_2GHZ) ? | 1306 | u16 passive = |
1297 | IL_PASSIVE_DWELL_BASE + IL_PASSIVE_DWELL_TIME_24 : | 1307 | (band == |
1298 | IL_PASSIVE_DWELL_BASE + IL_PASSIVE_DWELL_TIME_52; | 1308 | IEEE80211_BAND_2GHZ) ? IL_PASSIVE_DWELL_BASE + |
1309 | IL_PASSIVE_DWELL_TIME_24 : IL_PASSIVE_DWELL_BASE + | ||
1310 | IL_PASSIVE_DWELL_TIME_52; | ||
1299 | 1311 | ||
1300 | if (il_is_any_associated(il)) { | 1312 | if (il_is_any_associated(il)) { |
1301 | /* | 1313 | /* |
@@ -1312,9 +1324,11 @@ u16 il_get_passive_dwell_time(struct il_priv *il, | |||
1312 | 1324 | ||
1313 | return passive; | 1325 | return passive; |
1314 | } | 1326 | } |
1327 | |||
1315 | EXPORT_SYMBOL(il_get_passive_dwell_time); | 1328 | EXPORT_SYMBOL(il_get_passive_dwell_time); |
1316 | 1329 | ||
1317 | void il_init_scan_params(struct il_priv *il) | 1330 | void |
1331 | il_init_scan_params(struct il_priv *il) | ||
1318 | { | 1332 | { |
1319 | u8 ant_idx = fls(il->hw_params.valid_tx_ant) - 1; | 1333 | u8 ant_idx = fls(il->hw_params.valid_tx_ant) - 1; |
1320 | if (!il->scan_tx_ant[IEEE80211_BAND_5GHZ]) | 1334 | if (!il->scan_tx_ant[IEEE80211_BAND_5GHZ]) |
@@ -1322,10 +1336,11 @@ void il_init_scan_params(struct il_priv *il) | |||
1322 | if (!il->scan_tx_ant[IEEE80211_BAND_2GHZ]) | 1336 | if (!il->scan_tx_ant[IEEE80211_BAND_2GHZ]) |
1323 | il->scan_tx_ant[IEEE80211_BAND_2GHZ] = ant_idx; | 1337 | il->scan_tx_ant[IEEE80211_BAND_2GHZ] = ant_idx; |
1324 | } | 1338 | } |
1339 | |||
1325 | EXPORT_SYMBOL(il_init_scan_params); | 1340 | EXPORT_SYMBOL(il_init_scan_params); |
1326 | 1341 | ||
1327 | static int il_scan_initiate(struct il_priv *il, | 1342 | static int |
1328 | struct ieee80211_vif *vif) | 1343 | il_scan_initiate(struct il_priv *il, struct ieee80211_vif *vif) |
1329 | { | 1344 | { |
1330 | int ret; | 1345 | int ret; |
1331 | 1346 | ||
@@ -1342,8 +1357,7 @@ static int il_scan_initiate(struct il_priv *il, | |||
1342 | } | 1357 | } |
1343 | 1358 | ||
1344 | if (test_bit(S_SCAN_HW, &il->status)) { | 1359 | if (test_bit(S_SCAN_HW, &il->status)) { |
1345 | D_SCAN( | 1360 | D_SCAN("Multiple concurrent scan requests in parallel.\n"); |
1346 | "Multiple concurrent scan requests in parallel.\n"); | ||
1347 | return -EBUSY; | 1361 | return -EBUSY; |
1348 | } | 1362 | } |
1349 | 1363 | ||
@@ -1369,9 +1383,9 @@ static int il_scan_initiate(struct il_priv *il, | |||
1369 | return 0; | 1383 | return 0; |
1370 | } | 1384 | } |
1371 | 1385 | ||
1372 | int il_mac_hw_scan(struct ieee80211_hw *hw, | 1386 | int |
1373 | struct ieee80211_vif *vif, | 1387 | il_mac_hw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
1374 | struct cfg80211_scan_request *req) | 1388 | struct cfg80211_scan_request *req) |
1375 | { | 1389 | { |
1376 | struct il_priv *il = hw->priv; | 1390 | struct il_priv *il = hw->priv; |
1377 | int ret; | 1391 | int ret; |
@@ -1403,9 +1417,11 @@ out_unlock: | |||
1403 | 1417 | ||
1404 | return ret; | 1418 | return ret; |
1405 | } | 1419 | } |
1420 | |||
1406 | EXPORT_SYMBOL(il_mac_hw_scan); | 1421 | EXPORT_SYMBOL(il_mac_hw_scan); |
1407 | 1422 | ||
1408 | static void il_bg_scan_check(struct work_struct *data) | 1423 | static void |
1424 | il_bg_scan_check(struct work_struct *data) | ||
1409 | { | 1425 | { |
1410 | struct il_priv *il = | 1426 | struct il_priv *il = |
1411 | container_of(data, struct il_priv, scan_check.work); | 1427 | container_of(data, struct il_priv, scan_check.work); |
@@ -1426,7 +1442,7 @@ static void il_bg_scan_check(struct work_struct *data) | |||
1426 | 1442 | ||
1427 | u16 | 1443 | u16 |
1428 | il_fill_probe_req(struct il_priv *il, struct ieee80211_mgmt *frame, | 1444 | il_fill_probe_req(struct il_priv *il, struct ieee80211_mgmt *frame, |
1429 | const u8 *ta, const u8 *ies, int ie_len, int left) | 1445 | const u8 * ta, const u8 * ies, int ie_len, int left) |
1430 | { | 1446 | { |
1431 | int len = 0; | 1447 | int len = 0; |
1432 | u8 *pos = NULL; | 1448 | u8 *pos = NULL; |
@@ -1465,11 +1481,13 @@ il_fill_probe_req(struct il_priv *il, struct ieee80211_mgmt *frame, | |||
1465 | len += ie_len; | 1481 | len += ie_len; |
1466 | } | 1482 | } |
1467 | 1483 | ||
1468 | return (u16)len; | 1484 | return (u16) len; |
1469 | } | 1485 | } |
1486 | |||
1470 | EXPORT_SYMBOL(il_fill_probe_req); | 1487 | EXPORT_SYMBOL(il_fill_probe_req); |
1471 | 1488 | ||
1472 | static void il_bg_abort_scan(struct work_struct *work) | 1489 | static void |
1490 | il_bg_abort_scan(struct work_struct *work) | ||
1473 | { | 1491 | { |
1474 | struct il_priv *il = container_of(work, struct il_priv, abort_scan); | 1492 | struct il_priv *il = container_of(work, struct il_priv, abort_scan); |
1475 | 1493 | ||
@@ -1482,10 +1500,10 @@ static void il_bg_abort_scan(struct work_struct *work) | |||
1482 | mutex_unlock(&il->mutex); | 1500 | mutex_unlock(&il->mutex); |
1483 | } | 1501 | } |
1484 | 1502 | ||
1485 | static void il_bg_scan_completed(struct work_struct *work) | 1503 | static void |
1504 | il_bg_scan_completed(struct work_struct *work) | ||
1486 | { | 1505 | { |
1487 | struct il_priv *il = | 1506 | struct il_priv *il = container_of(work, struct il_priv, scan_completed); |
1488 | container_of(work, struct il_priv, scan_completed); | ||
1489 | bool aborted; | 1507 | bool aborted; |
1490 | 1508 | ||
1491 | D_SCAN("Completed scan.\n"); | 1509 | D_SCAN("Completed scan.\n"); |
@@ -1523,15 +1541,18 @@ out: | |||
1523 | mutex_unlock(&il->mutex); | 1541 | mutex_unlock(&il->mutex); |
1524 | } | 1542 | } |
1525 | 1543 | ||
1526 | void il_setup_scan_deferred_work(struct il_priv *il) | 1544 | void |
1545 | il_setup_scan_deferred_work(struct il_priv *il) | ||
1527 | { | 1546 | { |
1528 | INIT_WORK(&il->scan_completed, il_bg_scan_completed); | 1547 | INIT_WORK(&il->scan_completed, il_bg_scan_completed); |
1529 | INIT_WORK(&il->abort_scan, il_bg_abort_scan); | 1548 | INIT_WORK(&il->abort_scan, il_bg_abort_scan); |
1530 | INIT_DELAYED_WORK(&il->scan_check, il_bg_scan_check); | 1549 | INIT_DELAYED_WORK(&il->scan_check, il_bg_scan_check); |
1531 | } | 1550 | } |
1551 | |||
1532 | EXPORT_SYMBOL(il_setup_scan_deferred_work); | 1552 | EXPORT_SYMBOL(il_setup_scan_deferred_work); |
1533 | 1553 | ||
1534 | void il_cancel_scan_deferred_work(struct il_priv *il) | 1554 | void |
1555 | il_cancel_scan_deferred_work(struct il_priv *il) | ||
1535 | { | 1556 | { |
1536 | cancel_work_sync(&il->abort_scan); | 1557 | cancel_work_sync(&il->abort_scan); |
1537 | cancel_work_sync(&il->scan_completed); | 1558 | cancel_work_sync(&il->scan_completed); |
@@ -1542,46 +1563,43 @@ void il_cancel_scan_deferred_work(struct il_priv *il) | |||
1542 | mutex_unlock(&il->mutex); | 1563 | mutex_unlock(&il->mutex); |
1543 | } | 1564 | } |
1544 | } | 1565 | } |
1566 | |||
1545 | EXPORT_SYMBOL(il_cancel_scan_deferred_work); | 1567 | EXPORT_SYMBOL(il_cancel_scan_deferred_work); |
1546 | 1568 | ||
1547 | /* il->sta_lock must be held */ | 1569 | /* il->sta_lock must be held */ |
1548 | static void il_sta_ucode_activate(struct il_priv *il, u8 sta_id) | 1570 | static void |
1571 | il_sta_ucode_activate(struct il_priv *il, u8 sta_id) | ||
1549 | { | 1572 | { |
1550 | 1573 | ||
1551 | if (!(il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE)) | 1574 | if (!(il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE)) |
1552 | IL_ERR( | 1575 | IL_ERR("ACTIVATE a non DRIVER active station id %u addr %pM\n", |
1553 | "ACTIVATE a non DRIVER active station id %u addr %pM\n", | 1576 | sta_id, il->stations[sta_id].sta.sta.addr); |
1554 | sta_id, il->stations[sta_id].sta.sta.addr); | ||
1555 | 1577 | ||
1556 | if (il->stations[sta_id].used & IL_STA_UCODE_ACTIVE) { | 1578 | if (il->stations[sta_id].used & IL_STA_UCODE_ACTIVE) { |
1557 | D_ASSOC( | 1579 | D_ASSOC("STA id %u addr %pM already present" |
1558 | "STA id %u addr %pM already present" | 1580 | " in uCode (according to driver)\n", sta_id, |
1559 | " in uCode (according to driver)\n", | 1581 | il->stations[sta_id].sta.sta.addr); |
1560 | sta_id, il->stations[sta_id].sta.sta.addr); | ||
1561 | } else { | 1582 | } else { |
1562 | il->stations[sta_id].used |= IL_STA_UCODE_ACTIVE; | 1583 | il->stations[sta_id].used |= IL_STA_UCODE_ACTIVE; |
1563 | D_ASSOC("Added STA id %u addr %pM to uCode\n", | 1584 | D_ASSOC("Added STA id %u addr %pM to uCode\n", sta_id, |
1564 | sta_id, il->stations[sta_id].sta.sta.addr); | 1585 | il->stations[sta_id].sta.sta.addr); |
1565 | } | 1586 | } |
1566 | } | 1587 | } |
1567 | 1588 | ||
1568 | static int il_process_add_sta_resp(struct il_priv *il, | 1589 | static int |
1569 | struct il_addsta_cmd *addsta, | 1590 | il_process_add_sta_resp(struct il_priv *il, struct il_addsta_cmd *addsta, |
1570 | struct il_rx_pkt *pkt, | 1591 | struct il_rx_pkt *pkt, bool sync) |
1571 | bool sync) | ||
1572 | { | 1592 | { |
1573 | u8 sta_id = addsta->sta.sta_id; | 1593 | u8 sta_id = addsta->sta.sta_id; |
1574 | unsigned long flags; | 1594 | unsigned long flags; |
1575 | int ret = -EIO; | 1595 | int ret = -EIO; |
1576 | 1596 | ||
1577 | if (pkt->hdr.flags & IL_CMD_FAILED_MSK) { | 1597 | if (pkt->hdr.flags & IL_CMD_FAILED_MSK) { |
1578 | IL_ERR("Bad return from C_ADD_STA (0x%08X)\n", | 1598 | IL_ERR("Bad return from C_ADD_STA (0x%08X)\n", pkt->hdr.flags); |
1579 | pkt->hdr.flags); | ||
1580 | return ret; | 1599 | return ret; |
1581 | } | 1600 | } |
1582 | 1601 | ||
1583 | D_INFO("Processing response for adding station %u\n", | 1602 | D_INFO("Processing response for adding station %u\n", sta_id); |
1584 | sta_id); | ||
1585 | 1603 | ||
1586 | spin_lock_irqsave(&il->sta_lock, flags); | 1604 | spin_lock_irqsave(&il->sta_lock, flags); |
1587 | 1605 | ||
@@ -1592,28 +1610,25 @@ static int il_process_add_sta_resp(struct il_priv *il, | |||
1592 | ret = 0; | 1610 | ret = 0; |
1593 | break; | 1611 | break; |
1594 | case ADD_STA_NO_ROOM_IN_TBL: | 1612 | case ADD_STA_NO_ROOM_IN_TBL: |
1595 | IL_ERR("Adding station %d failed, no room in table.\n", | 1613 | IL_ERR("Adding station %d failed, no room in table.\n", sta_id); |
1596 | sta_id); | ||
1597 | break; | 1614 | break; |
1598 | case ADD_STA_NO_BLOCK_ACK_RESOURCE: | 1615 | case ADD_STA_NO_BLOCK_ACK_RESOURCE: |
1599 | IL_ERR( | 1616 | IL_ERR("Adding station %d failed, no block ack resource.\n", |
1600 | "Adding station %d failed, no block ack resource.\n", | 1617 | sta_id); |
1601 | sta_id); | ||
1602 | break; | 1618 | break; |
1603 | case ADD_STA_MODIFY_NON_EXIST_STA: | 1619 | case ADD_STA_MODIFY_NON_EXIST_STA: |
1604 | IL_ERR("Attempting to modify non-existing station %d\n", | 1620 | IL_ERR("Attempting to modify non-existing station %d\n", |
1605 | sta_id); | 1621 | sta_id); |
1606 | break; | 1622 | break; |
1607 | default: | 1623 | default: |
1608 | D_ASSOC("Received C_ADD_STA:(0x%08X)\n", | 1624 | D_ASSOC("Received C_ADD_STA:(0x%08X)\n", pkt->u.add_sta.status); |
1609 | pkt->u.add_sta.status); | ||
1610 | break; | 1625 | break; |
1611 | } | 1626 | } |
1612 | 1627 | ||
1613 | D_INFO("%s station id %u addr %pM\n", | 1628 | D_INFO("%s station id %u addr %pM\n", |
1614 | il->stations[sta_id].sta.mode == | 1629 | il->stations[sta_id].sta.mode == |
1615 | STA_CONTROL_MODIFY_MSK ? "Modified" : "Added", | 1630 | STA_CONTROL_MODIFY_MSK ? "Modified" : "Added", sta_id, |
1616 | sta_id, il->stations[sta_id].sta.sta.addr); | 1631 | il->stations[sta_id].sta.sta.addr); |
1617 | 1632 | ||
1618 | /* | 1633 | /* |
1619 | * XXX: The MAC address in the command buffer is often changed from | 1634 | * XXX: The MAC address in the command buffer is often changed from |
@@ -1624,27 +1639,25 @@ static int il_process_add_sta_resp(struct il_priv *il, | |||
1624 | * observe the problem. | 1639 | * observe the problem. |
1625 | */ | 1640 | */ |
1626 | D_INFO("%s station according to cmd buffer %pM\n", | 1641 | D_INFO("%s station according to cmd buffer %pM\n", |
1627 | il->stations[sta_id].sta.mode == | 1642 | il->stations[sta_id].sta.mode == |
1628 | STA_CONTROL_MODIFY_MSK ? "Modified" : "Added", | 1643 | STA_CONTROL_MODIFY_MSK ? "Modified" : "Added", addsta->sta.addr); |
1629 | addsta->sta.addr); | ||
1630 | spin_unlock_irqrestore(&il->sta_lock, flags); | 1644 | spin_unlock_irqrestore(&il->sta_lock, flags); |
1631 | 1645 | ||
1632 | return ret; | 1646 | return ret; |
1633 | } | 1647 | } |
1634 | 1648 | ||
1635 | static void il_add_sta_callback(struct il_priv *il, | 1649 | static void |
1636 | struct il_device_cmd *cmd, | 1650 | il_add_sta_callback(struct il_priv *il, struct il_device_cmd *cmd, |
1637 | struct il_rx_pkt *pkt) | 1651 | struct il_rx_pkt *pkt) |
1638 | { | 1652 | { |
1639 | struct il_addsta_cmd *addsta = | 1653 | struct il_addsta_cmd *addsta = (struct il_addsta_cmd *)cmd->cmd.payload; |
1640 | (struct il_addsta_cmd *)cmd->cmd.payload; | ||
1641 | 1654 | ||
1642 | il_process_add_sta_resp(il, addsta, pkt, false); | 1655 | il_process_add_sta_resp(il, addsta, pkt, false); |
1643 | 1656 | ||
1644 | } | 1657 | } |
1645 | 1658 | ||
1646 | int il_send_add_sta(struct il_priv *il, | 1659 | int |
1647 | struct il_addsta_cmd *sta, u8 flags) | 1660 | il_send_add_sta(struct il_priv *il, struct il_addsta_cmd *sta, u8 flags) |
1648 | { | 1661 | { |
1649 | struct il_rx_pkt *pkt = NULL; | 1662 | struct il_rx_pkt *pkt = NULL; |
1650 | int ret = 0; | 1663 | int ret = 0; |
@@ -1656,8 +1669,8 @@ int il_send_add_sta(struct il_priv *il, | |||
1656 | }; | 1669 | }; |
1657 | u8 sta_id __maybe_unused = sta->sta.sta_id; | 1670 | u8 sta_id __maybe_unused = sta->sta.sta_id; |
1658 | 1671 | ||
1659 | D_INFO("Adding sta %u (%pM) %ssynchronously\n", | 1672 | D_INFO("Adding sta %u (%pM) %ssynchronously\n", sta_id, sta->sta.addr, |
1660 | sta_id, sta->sta.addr, flags & CMD_ASYNC ? "a" : ""); | 1673 | flags & CMD_ASYNC ? "a" : ""); |
1661 | 1674 | ||
1662 | if (flags & CMD_ASYNC) | 1675 | if (flags & CMD_ASYNC) |
1663 | cmd.callback = il_add_sta_callback; | 1676 | cmd.callback = il_add_sta_callback; |
@@ -1680,11 +1693,12 @@ int il_send_add_sta(struct il_priv *il, | |||
1680 | 1693 | ||
1681 | return ret; | 1694 | return ret; |
1682 | } | 1695 | } |
1696 | |||
1683 | EXPORT_SYMBOL(il_send_add_sta); | 1697 | EXPORT_SYMBOL(il_send_add_sta); |
1684 | 1698 | ||
1685 | static void il_set_ht_add_station(struct il_priv *il, u8 idx, | 1699 | static void |
1686 | struct ieee80211_sta *sta, | 1700 | il_set_ht_add_station(struct il_priv *il, u8 idx, struct ieee80211_sta *sta, |
1687 | struct il_rxon_context *ctx) | 1701 | struct il_rxon_context *ctx) |
1688 | { | 1702 | { |
1689 | struct ieee80211_sta_ht_cap *sta_ht_inf = &sta->ht_cap; | 1703 | struct ieee80211_sta_ht_cap *sta_ht_inf = &sta->ht_cap; |
1690 | __le32 sta_flags; | 1704 | __le32 sta_flags; |
@@ -1695,10 +1709,10 @@ static void il_set_ht_add_station(struct il_priv *il, u8 idx, | |||
1695 | 1709 | ||
1696 | mimo_ps_mode = (sta_ht_inf->cap & IEEE80211_HT_CAP_SM_PS) >> 2; | 1710 | mimo_ps_mode = (sta_ht_inf->cap & IEEE80211_HT_CAP_SM_PS) >> 2; |
1697 | D_ASSOC("spatial multiplexing power save mode: %s\n", | 1711 | D_ASSOC("spatial multiplexing power save mode: %s\n", |
1698 | (mimo_ps_mode == WLAN_HT_CAP_SM_PS_STATIC) ? | 1712 | (mimo_ps_mode == |
1699 | "static" : | 1713 | WLAN_HT_CAP_SM_PS_STATIC) ? "static" : (mimo_ps_mode == |
1700 | (mimo_ps_mode == WLAN_HT_CAP_SM_PS_DYNAMIC) ? | 1714 | WLAN_HT_CAP_SM_PS_DYNAMIC) |
1701 | "dynamic" : "disabled"); | 1715 | ? "dynamic" : "disabled"); |
1702 | 1716 | ||
1703 | sta_flags = il->stations[idx].sta.station_flags; | 1717 | sta_flags = il->stations[idx].sta.station_flags; |
1704 | 1718 | ||
@@ -1718,11 +1732,13 @@ static void il_set_ht_add_station(struct il_priv *il, u8 idx, | |||
1718 | break; | 1732 | break; |
1719 | } | 1733 | } |
1720 | 1734 | ||
1721 | sta_flags |= cpu_to_le32( | 1735 | sta_flags |= |
1722 | (u32)sta_ht_inf->ampdu_factor << STA_FLG_MAX_AGG_SIZE_POS); | 1736 | cpu_to_le32((u32) sta_ht_inf-> |
1737 | ampdu_factor << STA_FLG_MAX_AGG_SIZE_POS); | ||
1723 | 1738 | ||
1724 | sta_flags |= cpu_to_le32( | 1739 | sta_flags |= |
1725 | (u32)sta_ht_inf->ampdu_density << STA_FLG_AGG_MPDU_DENSITY_POS); | 1740 | cpu_to_le32((u32) sta_ht_inf-> |
1741 | ampdu_density << STA_FLG_AGG_MPDU_DENSITY_POS); | ||
1726 | 1742 | ||
1727 | if (il_is_ht40_tx_allowed(il, ctx, &sta->ht_cap)) | 1743 | if (il_is_ht40_tx_allowed(il, ctx, &sta->ht_cap)) |
1728 | sta_flags |= STA_FLG_HT40_EN_MSK; | 1744 | sta_flags |= STA_FLG_HT40_EN_MSK; |
@@ -1730,7 +1746,7 @@ static void il_set_ht_add_station(struct il_priv *il, u8 idx, | |||
1730 | sta_flags &= ~STA_FLG_HT40_EN_MSK; | 1746 | sta_flags &= ~STA_FLG_HT40_EN_MSK; |
1731 | 1747 | ||
1732 | il->stations[idx].sta.station_flags = sta_flags; | 1748 | il->stations[idx].sta.station_flags = sta_flags; |
1733 | done: | 1749 | done: |
1734 | return; | 1750 | return; |
1735 | } | 1751 | } |
1736 | 1752 | ||
@@ -1739,8 +1755,9 @@ static void il_set_ht_add_station(struct il_priv *il, u8 idx, | |||
1739 | * | 1755 | * |
1740 | * should be called with sta_lock held | 1756 | * should be called with sta_lock held |
1741 | */ | 1757 | */ |
1742 | u8 il_prep_station(struct il_priv *il, struct il_rxon_context *ctx, | 1758 | u8 |
1743 | const u8 *addr, bool is_ap, struct ieee80211_sta *sta) | 1759 | il_prep_station(struct il_priv * il, struct il_rxon_context * ctx, |
1760 | const u8 * addr, bool is_ap, struct ieee80211_sta * sta) | ||
1744 | { | 1761 | { |
1745 | struct il_station_entry *station; | 1762 | struct il_station_entry *station; |
1746 | int i; | 1763 | int i; |
@@ -1753,8 +1770,8 @@ u8 il_prep_station(struct il_priv *il, struct il_rxon_context *ctx, | |||
1753 | sta_id = ctx->bcast_sta_id; | 1770 | sta_id = ctx->bcast_sta_id; |
1754 | else | 1771 | else |
1755 | for (i = IL_STA_ID; i < il->hw_params.max_stations; i++) { | 1772 | for (i = IL_STA_ID; i < il->hw_params.max_stations; i++) { |
1756 | if (!compare_ether_addr(il->stations[i].sta.sta.addr, | 1773 | if (!compare_ether_addr |
1757 | addr)) { | 1774 | (il->stations[i].sta.sta.addr, addr)) { |
1758 | sta_id = i; | 1775 | sta_id = i; |
1759 | break; | 1776 | break; |
1760 | } | 1777 | } |
@@ -1777,25 +1794,21 @@ u8 il_prep_station(struct il_priv *il, struct il_rxon_context *ctx, | |||
1777 | * another. | 1794 | * another. |
1778 | */ | 1795 | */ |
1779 | if (il->stations[sta_id].used & IL_STA_UCODE_INPROGRESS) { | 1796 | if (il->stations[sta_id].used & IL_STA_UCODE_INPROGRESS) { |
1780 | D_INFO( | 1797 | D_INFO("STA %d already in process of being added.\n", sta_id); |
1781 | "STA %d already in process of being added.\n", | ||
1782 | sta_id); | ||
1783 | return sta_id; | 1798 | return sta_id; |
1784 | } | 1799 | } |
1785 | 1800 | ||
1786 | if ((il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE) && | 1801 | if ((il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE) && |
1787 | (il->stations[sta_id].used & IL_STA_UCODE_ACTIVE) && | 1802 | (il->stations[sta_id].used & IL_STA_UCODE_ACTIVE) && |
1788 | !compare_ether_addr(il->stations[sta_id].sta.sta.addr, addr)) { | 1803 | !compare_ether_addr(il->stations[sta_id].sta.sta.addr, addr)) { |
1789 | D_ASSOC( | 1804 | D_ASSOC("STA %d (%pM) already added, not adding again.\n", |
1790 | "STA %d (%pM) already added, not adding again.\n", | 1805 | sta_id, addr); |
1791 | sta_id, addr); | ||
1792 | return sta_id; | 1806 | return sta_id; |
1793 | } | 1807 | } |
1794 | 1808 | ||
1795 | station = &il->stations[sta_id]; | 1809 | station = &il->stations[sta_id]; |
1796 | station->used = IL_STA_DRIVER_ACTIVE; | 1810 | station->used = IL_STA_DRIVER_ACTIVE; |
1797 | D_ASSOC("Add STA to driver ID %d: %pM\n", | 1811 | D_ASSOC("Add STA to driver ID %d: %pM\n", sta_id, addr); |
1798 | sta_id, addr); | ||
1799 | il->num_stations++; | 1812 | il->num_stations++; |
1800 | 1813 | ||
1801 | /* Set up the C_ADD_STA command to send to device */ | 1814 | /* Set up the C_ADD_STA command to send to device */ |
@@ -1821,14 +1834,14 @@ u8 il_prep_station(struct il_priv *il, struct il_rxon_context *ctx, | |||
1821 | il_set_ht_add_station(il, sta_id, sta, ctx); | 1834 | il_set_ht_add_station(il, sta_id, sta, ctx); |
1822 | 1835 | ||
1823 | /* 3945 only */ | 1836 | /* 3945 only */ |
1824 | rate = (il->band == IEEE80211_BAND_5GHZ) ? | 1837 | rate = (il->band == IEEE80211_BAND_5GHZ) ? RATE_6M_PLCP : RATE_1M_PLCP; |
1825 | RATE_6M_PLCP : RATE_1M_PLCP; | ||
1826 | /* Turn on both antennas for the station... */ | 1838 | /* Turn on both antennas for the station... */ |
1827 | station->sta.rate_n_flags = cpu_to_le16(rate | RATE_MCS_ANT_AB_MSK); | 1839 | station->sta.rate_n_flags = cpu_to_le16(rate | RATE_MCS_ANT_AB_MSK); |
1828 | 1840 | ||
1829 | return sta_id; | 1841 | return sta_id; |
1830 | 1842 | ||
1831 | } | 1843 | } |
1844 | |||
1832 | EXPORT_SYMBOL_GPL(il_prep_station); | 1845 | EXPORT_SYMBOL_GPL(il_prep_station); |
1833 | 1846 | ||
1834 | #define STA_WAIT_TIMEOUT (HZ/2) | 1847 | #define STA_WAIT_TIMEOUT (HZ/2) |
@@ -1837,10 +1850,9 @@ EXPORT_SYMBOL_GPL(il_prep_station); | |||
1837 | * il_add_station_common - | 1850 | * il_add_station_common - |
1838 | */ | 1851 | */ |
1839 | int | 1852 | int |
1840 | il_add_station_common(struct il_priv *il, | 1853 | il_add_station_common(struct il_priv *il, struct il_rxon_context *ctx, |
1841 | struct il_rxon_context *ctx, | 1854 | const u8 * addr, bool is_ap, struct ieee80211_sta *sta, |
1842 | const u8 *addr, bool is_ap, | 1855 | u8 * sta_id_r) |
1843 | struct ieee80211_sta *sta, u8 *sta_id_r) | ||
1844 | { | 1856 | { |
1845 | unsigned long flags_spin; | 1857 | unsigned long flags_spin; |
1846 | int ret = 0; | 1858 | int ret = 0; |
@@ -1851,8 +1863,7 @@ il_add_station_common(struct il_priv *il, | |||
1851 | spin_lock_irqsave(&il->sta_lock, flags_spin); | 1863 | spin_lock_irqsave(&il->sta_lock, flags_spin); |
1852 | sta_id = il_prep_station(il, ctx, addr, is_ap, sta); | 1864 | sta_id = il_prep_station(il, ctx, addr, is_ap, sta); |
1853 | if (sta_id == IL_INVALID_STATION) { | 1865 | if (sta_id == IL_INVALID_STATION) { |
1854 | IL_ERR("Unable to prepare station %pM for addition\n", | 1866 | IL_ERR("Unable to prepare station %pM for addition\n", addr); |
1855 | addr); | ||
1856 | spin_unlock_irqrestore(&il->sta_lock, flags_spin); | 1867 | spin_unlock_irqrestore(&il->sta_lock, flags_spin); |
1857 | return -EINVAL; | 1868 | return -EINVAL; |
1858 | } | 1869 | } |
@@ -1863,17 +1874,14 @@ il_add_station_common(struct il_priv *il, | |||
1863 | * another. | 1874 | * another. |
1864 | */ | 1875 | */ |
1865 | if (il->stations[sta_id].used & IL_STA_UCODE_INPROGRESS) { | 1876 | if (il->stations[sta_id].used & IL_STA_UCODE_INPROGRESS) { |
1866 | D_INFO( | 1877 | D_INFO("STA %d already in process of being added.\n", sta_id); |
1867 | "STA %d already in process of being added.\n", | ||
1868 | sta_id); | ||
1869 | spin_unlock_irqrestore(&il->sta_lock, flags_spin); | 1878 | spin_unlock_irqrestore(&il->sta_lock, flags_spin); |
1870 | return -EEXIST; | 1879 | return -EEXIST; |
1871 | } | 1880 | } |
1872 | 1881 | ||
1873 | if ((il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE) && | 1882 | if ((il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE) && |
1874 | (il->stations[sta_id].used & IL_STA_UCODE_ACTIVE)) { | 1883 | (il->stations[sta_id].used & IL_STA_UCODE_ACTIVE)) { |
1875 | D_ASSOC( | 1884 | D_ASSOC("STA %d (%pM) already added, not adding again.\n", |
1876 | "STA %d (%pM) already added, not adding again.\n", | ||
1877 | sta_id, addr); | 1885 | sta_id, addr); |
1878 | spin_unlock_irqrestore(&il->sta_lock, flags_spin); | 1886 | spin_unlock_irqrestore(&il->sta_lock, flags_spin); |
1879 | return -EEXIST; | 1887 | return -EEXIST; |
@@ -1881,7 +1889,7 @@ il_add_station_common(struct il_priv *il, | |||
1881 | 1889 | ||
1882 | il->stations[sta_id].used |= IL_STA_UCODE_INPROGRESS; | 1890 | il->stations[sta_id].used |= IL_STA_UCODE_INPROGRESS; |
1883 | memcpy(&sta_cmd, &il->stations[sta_id].sta, | 1891 | memcpy(&sta_cmd, &il->stations[sta_id].sta, |
1884 | sizeof(struct il_addsta_cmd)); | 1892 | sizeof(struct il_addsta_cmd)); |
1885 | spin_unlock_irqrestore(&il->sta_lock, flags_spin); | 1893 | spin_unlock_irqrestore(&il->sta_lock, flags_spin); |
1886 | 1894 | ||
1887 | /* Add station to device's station table */ | 1895 | /* Add station to device's station table */ |
@@ -1889,7 +1897,7 @@ il_add_station_common(struct il_priv *il, | |||
1889 | if (ret) { | 1897 | if (ret) { |
1890 | spin_lock_irqsave(&il->sta_lock, flags_spin); | 1898 | spin_lock_irqsave(&il->sta_lock, flags_spin); |
1891 | IL_ERR("Adding station %pM failed.\n", | 1899 | IL_ERR("Adding station %pM failed.\n", |
1892 | il->stations[sta_id].sta.sta.addr); | 1900 | il->stations[sta_id].sta.sta.addr); |
1893 | il->stations[sta_id].used &= ~IL_STA_DRIVER_ACTIVE; | 1901 | il->stations[sta_id].used &= ~IL_STA_DRIVER_ACTIVE; |
1894 | il->stations[sta_id].used &= ~IL_STA_UCODE_INPROGRESS; | 1902 | il->stations[sta_id].used &= ~IL_STA_UCODE_INPROGRESS; |
1895 | spin_unlock_irqrestore(&il->sta_lock, flags_spin); | 1903 | spin_unlock_irqrestore(&il->sta_lock, flags_spin); |
@@ -1897,6 +1905,7 @@ il_add_station_common(struct il_priv *il, | |||
1897 | *sta_id_r = sta_id; | 1905 | *sta_id_r = sta_id; |
1898 | return ret; | 1906 | return ret; |
1899 | } | 1907 | } |
1908 | |||
1900 | EXPORT_SYMBOL(il_add_station_common); | 1909 | EXPORT_SYMBOL(il_add_station_common); |
1901 | 1910 | ||
1902 | /** | 1911 | /** |
@@ -1904,12 +1913,13 @@ EXPORT_SYMBOL(il_add_station_common); | |||
1904 | * | 1913 | * |
1905 | * il->sta_lock must be held | 1914 | * il->sta_lock must be held |
1906 | */ | 1915 | */ |
1907 | static void il_sta_ucode_deactivate(struct il_priv *il, u8 sta_id) | 1916 | static void |
1917 | il_sta_ucode_deactivate(struct il_priv *il, u8 sta_id) | ||
1908 | { | 1918 | { |
1909 | /* Ucode must be active and driver must be non active */ | 1919 | /* Ucode must be active and driver must be non active */ |
1910 | if ((il->stations[sta_id].used & | 1920 | if ((il->stations[sta_id]. |
1911 | (IL_STA_UCODE_ACTIVE | IL_STA_DRIVER_ACTIVE)) != | 1921 | used & (IL_STA_UCODE_ACTIVE | IL_STA_DRIVER_ACTIVE)) != |
1912 | IL_STA_UCODE_ACTIVE) | 1922 | IL_STA_UCODE_ACTIVE) |
1913 | IL_ERR("removed non active STA %u\n", sta_id); | 1923 | IL_ERR("removed non active STA %u\n", sta_id); |
1914 | 1924 | ||
1915 | il->stations[sta_id].used &= ~IL_STA_UCODE_ACTIVE; | 1925 | il->stations[sta_id].used &= ~IL_STA_UCODE_ACTIVE; |
@@ -1918,9 +1928,9 @@ static void il_sta_ucode_deactivate(struct il_priv *il, u8 sta_id) | |||
1918 | D_ASSOC("Removed STA %u\n", sta_id); | 1928 | D_ASSOC("Removed STA %u\n", sta_id); |
1919 | } | 1929 | } |
1920 | 1930 | ||
1921 | static int il_send_remove_station(struct il_priv *il, | 1931 | static int |
1922 | const u8 *addr, int sta_id, | 1932 | il_send_remove_station(struct il_priv *il, const u8 * addr, int sta_id, |
1923 | bool temporary) | 1933 | bool temporary) |
1924 | { | 1934 | { |
1925 | struct il_rx_pkt *pkt; | 1935 | struct il_rx_pkt *pkt; |
1926 | int ret; | 1936 | int ret; |
@@ -1948,8 +1958,7 @@ static int il_send_remove_station(struct il_priv *il, | |||
1948 | 1958 | ||
1949 | pkt = (struct il_rx_pkt *)cmd.reply_page; | 1959 | pkt = (struct il_rx_pkt *)cmd.reply_page; |
1950 | if (pkt->hdr.flags & IL_CMD_FAILED_MSK) { | 1960 | if (pkt->hdr.flags & IL_CMD_FAILED_MSK) { |
1951 | IL_ERR("Bad return from C_REM_STA (0x%08X)\n", | 1961 | IL_ERR("Bad return from C_REM_STA (0x%08X)\n", pkt->hdr.flags); |
1952 | pkt->hdr.flags); | ||
1953 | ret = -EIO; | 1962 | ret = -EIO; |
1954 | } | 1963 | } |
1955 | 1964 | ||
@@ -1960,7 +1969,7 @@ static int il_send_remove_station(struct il_priv *il, | |||
1960 | spin_lock_irqsave(&il->sta_lock, flags_spin); | 1969 | spin_lock_irqsave(&il->sta_lock, flags_spin); |
1961 | il_sta_ucode_deactivate(il, sta_id); | 1970 | il_sta_ucode_deactivate(il, sta_id); |
1962 | spin_unlock_irqrestore(&il->sta_lock, | 1971 | spin_unlock_irqrestore(&il->sta_lock, |
1963 | flags_spin); | 1972 | flags_spin); |
1964 | } | 1973 | } |
1965 | D_ASSOC("C_REM_STA PASSED\n"); | 1974 | D_ASSOC("C_REM_STA PASSED\n"); |
1966 | break; | 1975 | break; |
@@ -1978,15 +1987,14 @@ static int il_send_remove_station(struct il_priv *il, | |||
1978 | /** | 1987 | /** |
1979 | * il_remove_station - Remove driver's knowledge of station. | 1988 | * il_remove_station - Remove driver's knowledge of station. |
1980 | */ | 1989 | */ |
1981 | int il_remove_station(struct il_priv *il, const u8 sta_id, | 1990 | int |
1982 | const u8 *addr) | 1991 | il_remove_station(struct il_priv *il, const u8 sta_id, const u8 * addr) |
1983 | { | 1992 | { |
1984 | unsigned long flags; | 1993 | unsigned long flags; |
1985 | 1994 | ||
1986 | if (!il_is_ready(il)) { | 1995 | if (!il_is_ready(il)) { |
1987 | D_INFO( | 1996 | D_INFO("Unable to remove station %pM, device not ready.\n", |
1988 | "Unable to remove station %pM, device not ready.\n", | 1997 | addr); |
1989 | addr); | ||
1990 | /* | 1998 | /* |
1991 | * It is typical for stations to be removed when we are | 1999 | * It is typical for stations to be removed when we are |
1992 | * going down. Return success since device will be down | 2000 | * going down. Return success since device will be down |
@@ -1995,8 +2003,7 @@ int il_remove_station(struct il_priv *il, const u8 sta_id, | |||
1995 | return 0; | 2003 | return 0; |
1996 | } | 2004 | } |
1997 | 2005 | ||
1998 | D_ASSOC("Removing STA from driver:%d %pM\n", | 2006 | D_ASSOC("Removing STA from driver:%d %pM\n", sta_id, addr); |
1999 | sta_id, addr); | ||
2000 | 2007 | ||
2001 | if (WARN_ON(sta_id == IL_INVALID_STATION)) | 2008 | if (WARN_ON(sta_id == IL_INVALID_STATION)) |
2002 | return -EINVAL; | 2009 | return -EINVAL; |
@@ -2004,14 +2011,12 @@ int il_remove_station(struct il_priv *il, const u8 sta_id, | |||
2004 | spin_lock_irqsave(&il->sta_lock, flags); | 2011 | spin_lock_irqsave(&il->sta_lock, flags); |
2005 | 2012 | ||
2006 | if (!(il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE)) { | 2013 | if (!(il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE)) { |
2007 | D_INFO("Removing %pM but non DRIVER active\n", | 2014 | D_INFO("Removing %pM but non DRIVER active\n", addr); |
2008 | addr); | ||
2009 | goto out_err; | 2015 | goto out_err; |
2010 | } | 2016 | } |
2011 | 2017 | ||
2012 | if (!(il->stations[sta_id].used & IL_STA_UCODE_ACTIVE)) { | 2018 | if (!(il->stations[sta_id].used & IL_STA_UCODE_ACTIVE)) { |
2013 | D_INFO("Removing %pM but non UCODE active\n", | 2019 | D_INFO("Removing %pM but non UCODE active\n", addr); |
2014 | addr); | ||
2015 | goto out_err; | 2020 | goto out_err; |
2016 | } | 2021 | } |
2017 | 2022 | ||
@@ -2033,6 +2038,7 @@ out_err: | |||
2033 | spin_unlock_irqrestore(&il->sta_lock, flags); | 2038 | spin_unlock_irqrestore(&il->sta_lock, flags); |
2034 | return -EINVAL; | 2039 | return -EINVAL; |
2035 | } | 2040 | } |
2041 | |||
2036 | EXPORT_SYMBOL_GPL(il_remove_station); | 2042 | EXPORT_SYMBOL_GPL(il_remove_station); |
2037 | 2043 | ||
2038 | /** | 2044 | /** |
@@ -2043,8 +2049,8 @@ EXPORT_SYMBOL_GPL(il_remove_station); | |||
2043 | * other than explicit station management would cause this in | 2049 | * other than explicit station management would cause this in |
2044 | * the ucode, e.g. unassociated RXON. | 2050 | * the ucode, e.g. unassociated RXON. |
2045 | */ | 2051 | */ |
2046 | void il_clear_ucode_stations(struct il_priv *il, | 2052 | void |
2047 | struct il_rxon_context *ctx) | 2053 | il_clear_ucode_stations(struct il_priv *il, struct il_rxon_context *ctx) |
2048 | { | 2054 | { |
2049 | int i; | 2055 | int i; |
2050 | unsigned long flags_spin; | 2056 | unsigned long flags_spin; |
@@ -2058,8 +2064,7 @@ void il_clear_ucode_stations(struct il_priv *il, | |||
2058 | continue; | 2064 | continue; |
2059 | 2065 | ||
2060 | if (il->stations[i].used & IL_STA_UCODE_ACTIVE) { | 2066 | if (il->stations[i].used & IL_STA_UCODE_ACTIVE) { |
2061 | D_INFO( | 2067 | D_INFO("Clearing ucode active for station %d\n", i); |
2062 | "Clearing ucode active for station %d\n", i); | ||
2063 | il->stations[i].used &= ~IL_STA_UCODE_ACTIVE; | 2068 | il->stations[i].used &= ~IL_STA_UCODE_ACTIVE; |
2064 | cleared = true; | 2069 | cleared = true; |
2065 | } | 2070 | } |
@@ -2067,9 +2072,9 @@ void il_clear_ucode_stations(struct il_priv *il, | |||
2067 | spin_unlock_irqrestore(&il->sta_lock, flags_spin); | 2072 | spin_unlock_irqrestore(&il->sta_lock, flags_spin); |
2068 | 2073 | ||
2069 | if (!cleared) | 2074 | if (!cleared) |
2070 | D_INFO( | 2075 | D_INFO("No active stations found to be cleared\n"); |
2071 | "No active stations found to be cleared\n"); | ||
2072 | } | 2076 | } |
2077 | |||
2073 | EXPORT_SYMBOL(il_clear_ucode_stations); | 2078 | EXPORT_SYMBOL(il_clear_ucode_stations); |
2074 | 2079 | ||
2075 | /** | 2080 | /** |
@@ -2092,8 +2097,7 @@ il_restore_stations(struct il_priv *il, struct il_rxon_context *ctx) | |||
2092 | bool send_lq; | 2097 | bool send_lq; |
2093 | 2098 | ||
2094 | if (!il_is_ready(il)) { | 2099 | if (!il_is_ready(il)) { |
2095 | D_INFO( | 2100 | D_INFO("Not ready yet, not restoring any stations.\n"); |
2096 | "Not ready yet, not restoring any stations.\n"); | ||
2097 | return; | 2101 | return; |
2098 | } | 2102 | } |
2099 | 2103 | ||
@@ -2105,7 +2109,7 @@ il_restore_stations(struct il_priv *il, struct il_rxon_context *ctx) | |||
2105 | if ((il->stations[i].used & IL_STA_DRIVER_ACTIVE) && | 2109 | if ((il->stations[i].used & IL_STA_DRIVER_ACTIVE) && |
2106 | !(il->stations[i].used & IL_STA_UCODE_ACTIVE)) { | 2110 | !(il->stations[i].used & IL_STA_UCODE_ACTIVE)) { |
2107 | D_ASSOC("Restoring sta %pM\n", | 2111 | D_ASSOC("Restoring sta %pM\n", |
2108 | il->stations[i].sta.sta.addr); | 2112 | il->stations[i].sta.sta.addr); |
2109 | il->stations[i].sta.mode = 0; | 2113 | il->stations[i].sta.mode = 0; |
2110 | il->stations[i].used |= IL_STA_UCODE_INPROGRESS; | 2114 | il->stations[i].used |= IL_STA_UCODE_INPROGRESS; |
2111 | found = true; | 2115 | found = true; |
@@ -2127,21 +2131,19 @@ il_restore_stations(struct il_priv *il, struct il_rxon_context *ctx) | |||
2127 | if (ret) { | 2131 | if (ret) { |
2128 | spin_lock_irqsave(&il->sta_lock, flags_spin); | 2132 | spin_lock_irqsave(&il->sta_lock, flags_spin); |
2129 | IL_ERR("Adding station %pM failed.\n", | 2133 | IL_ERR("Adding station %pM failed.\n", |
2130 | il->stations[i].sta.sta.addr); | 2134 | il->stations[i].sta.sta.addr); |
2131 | il->stations[i].used &= | 2135 | il->stations[i].used &= ~IL_STA_DRIVER_ACTIVE; |
2132 | ~IL_STA_DRIVER_ACTIVE; | ||
2133 | il->stations[i].used &= | 2136 | il->stations[i].used &= |
2134 | ~IL_STA_UCODE_INPROGRESS; | 2137 | ~IL_STA_UCODE_INPROGRESS; |
2135 | spin_unlock_irqrestore(&il->sta_lock, | 2138 | spin_unlock_irqrestore(&il->sta_lock, |
2136 | flags_spin); | 2139 | flags_spin); |
2137 | } | 2140 | } |
2138 | /* | 2141 | /* |
2139 | * Rate scaling has already been initialized, send | 2142 | * Rate scaling has already been initialized, send |
2140 | * current LQ command | 2143 | * current LQ command |
2141 | */ | 2144 | */ |
2142 | if (send_lq) | 2145 | if (send_lq) |
2143 | il_send_lq_cmd(il, ctx, &lq, | 2146 | il_send_lq_cmd(il, ctx, &lq, CMD_SYNC, true); |
2144 | CMD_SYNC, true); | ||
2145 | spin_lock_irqsave(&il->sta_lock, flags_spin); | 2147 | spin_lock_irqsave(&il->sta_lock, flags_spin); |
2146 | il->stations[i].used &= ~IL_STA_UCODE_INPROGRESS; | 2148 | il->stations[i].used &= ~IL_STA_UCODE_INPROGRESS; |
2147 | } | 2149 | } |
@@ -2150,14 +2152,15 @@ il_restore_stations(struct il_priv *il, struct il_rxon_context *ctx) | |||
2150 | spin_unlock_irqrestore(&il->sta_lock, flags_spin); | 2152 | spin_unlock_irqrestore(&il->sta_lock, flags_spin); |
2151 | if (!found) | 2153 | if (!found) |
2152 | D_INFO("Restoring all known stations" | 2154 | D_INFO("Restoring all known stations" |
2153 | " .... no stations to be restored.\n"); | 2155 | " .... no stations to be restored.\n"); |
2154 | else | 2156 | else |
2155 | D_INFO("Restoring all known stations" | 2157 | D_INFO("Restoring all known stations" " .... complete.\n"); |
2156 | " .... complete.\n"); | ||
2157 | } | 2158 | } |
2159 | |||
2158 | EXPORT_SYMBOL(il_restore_stations); | 2160 | EXPORT_SYMBOL(il_restore_stations); |
2159 | 2161 | ||
2160 | int il_get_free_ucode_key_idx(struct il_priv *il) | 2162 | int |
2163 | il_get_free_ucode_key_idx(struct il_priv *il) | ||
2161 | { | 2164 | { |
2162 | int i; | 2165 | int i; |
2163 | 2166 | ||
@@ -2167,9 +2170,11 @@ int il_get_free_ucode_key_idx(struct il_priv *il) | |||
2167 | 2170 | ||
2168 | return WEP_INVALID_OFFSET; | 2171 | return WEP_INVALID_OFFSET; |
2169 | } | 2172 | } |
2173 | |||
2170 | EXPORT_SYMBOL(il_get_free_ucode_key_idx); | 2174 | EXPORT_SYMBOL(il_get_free_ucode_key_idx); |
2171 | 2175 | ||
2172 | void il_dealloc_bcast_stations(struct il_priv *il) | 2176 | void |
2177 | il_dealloc_bcast_stations(struct il_priv *il) | ||
2173 | { | 2178 | { |
2174 | unsigned long flags; | 2179 | unsigned long flags; |
2175 | int i; | 2180 | int i; |
@@ -2187,25 +2192,24 @@ void il_dealloc_bcast_stations(struct il_priv *il) | |||
2187 | } | 2192 | } |
2188 | spin_unlock_irqrestore(&il->sta_lock, flags); | 2193 | spin_unlock_irqrestore(&il->sta_lock, flags); |
2189 | } | 2194 | } |
2195 | |||
2190 | EXPORT_SYMBOL_GPL(il_dealloc_bcast_stations); | 2196 | EXPORT_SYMBOL_GPL(il_dealloc_bcast_stations); |
2191 | 2197 | ||
2192 | #ifdef CONFIG_IWLEGACY_DEBUG | 2198 | #ifdef CONFIG_IWLEGACY_DEBUG |
2193 | static void il_dump_lq_cmd(struct il_priv *il, | 2199 | static void |
2194 | struct il_link_quality_cmd *lq) | 2200 | il_dump_lq_cmd(struct il_priv *il, struct il_link_quality_cmd *lq) |
2195 | { | 2201 | { |
2196 | int i; | 2202 | int i; |
2197 | D_RATE("lq station id 0x%x\n", lq->sta_id); | 2203 | D_RATE("lq station id 0x%x\n", lq->sta_id); |
2198 | D_RATE("lq ant 0x%X 0x%X\n", | 2204 | D_RATE("lq ant 0x%X 0x%X\n", lq->general_params.single_stream_ant_msk, |
2199 | lq->general_params.single_stream_ant_msk, | 2205 | lq->general_params.dual_stream_ant_msk); |
2200 | lq->general_params.dual_stream_ant_msk); | ||
2201 | 2206 | ||
2202 | for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++) | 2207 | for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++) |
2203 | D_RATE("lq idx %d 0x%X\n", | 2208 | D_RATE("lq idx %d 0x%X\n", i, lq->rs_table[i].rate_n_flags); |
2204 | i, lq->rs_table[i].rate_n_flags); | ||
2205 | } | 2209 | } |
2206 | #else | 2210 | #else |
2207 | static inline void il_dump_lq_cmd(struct il_priv *il, | 2211 | static inline void |
2208 | struct il_link_quality_cmd *lq) | 2212 | il_dump_lq_cmd(struct il_priv *il, struct il_link_quality_cmd *lq) |
2209 | { | 2213 | { |
2210 | } | 2214 | } |
2211 | #endif | 2215 | #endif |
@@ -2221,23 +2225,19 @@ static inline void il_dump_lq_cmd(struct il_priv *il, | |||
2221 | * Test for this to prevent driver from sending LQ command between the time | 2225 | * Test for this to prevent driver from sending LQ command between the time |
2222 | * RXON flags are updated and when LQ command is updated. | 2226 | * RXON flags are updated and when LQ command is updated. |
2223 | */ | 2227 | */ |
2224 | static bool il_is_lq_table_valid(struct il_priv *il, | 2228 | static bool |
2225 | struct il_rxon_context *ctx, | 2229 | il_is_lq_table_valid(struct il_priv *il, struct il_rxon_context *ctx, |
2226 | struct il_link_quality_cmd *lq) | 2230 | struct il_link_quality_cmd *lq) |
2227 | { | 2231 | { |
2228 | int i; | 2232 | int i; |
2229 | 2233 | ||
2230 | if (ctx->ht.enabled) | 2234 | if (ctx->ht.enabled) |
2231 | return true; | 2235 | return true; |
2232 | 2236 | ||
2233 | D_INFO("Channel %u is not an HT channel\n", | 2237 | D_INFO("Channel %u is not an HT channel\n", ctx->active.channel); |
2234 | ctx->active.channel); | ||
2235 | for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++) { | 2238 | for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++) { |
2236 | if (le32_to_cpu(lq->rs_table[i].rate_n_flags) & | 2239 | if (le32_to_cpu(lq->rs_table[i].rate_n_flags) & RATE_MCS_HT_MSK) { |
2237 | RATE_MCS_HT_MSK) { | 2240 | D_INFO("idx %d of LQ expects HT channel\n", i); |
2238 | D_INFO( | ||
2239 | "idx %d of LQ expects HT channel\n", | ||
2240 | i); | ||
2241 | return false; | 2241 | return false; |
2242 | } | 2242 | } |
2243 | } | 2243 | } |
@@ -2254,8 +2254,9 @@ static bool il_is_lq_table_valid(struct il_priv *il, | |||
2254 | * this case to clear the state indicating that station creation is in | 2254 | * this case to clear the state indicating that station creation is in |
2255 | * progress. | 2255 | * progress. |
2256 | */ | 2256 | */ |
2257 | int il_send_lq_cmd(struct il_priv *il, struct il_rxon_context *ctx, | 2257 | int |
2258 | struct il_link_quality_cmd *lq, u8 flags, bool init) | 2258 | il_send_lq_cmd(struct il_priv *il, struct il_rxon_context *ctx, |
2259 | struct il_link_quality_cmd *lq, u8 flags, bool init) | ||
2259 | { | 2260 | { |
2260 | int ret = 0; | 2261 | int ret = 0; |
2261 | unsigned long flags_spin; | 2262 | unsigned long flags_spin; |
@@ -2270,7 +2271,6 @@ int il_send_lq_cmd(struct il_priv *il, struct il_rxon_context *ctx, | |||
2270 | if (WARN_ON(lq->sta_id == IL_INVALID_STATION)) | 2271 | if (WARN_ON(lq->sta_id == IL_INVALID_STATION)) |
2271 | return -EINVAL; | 2272 | return -EINVAL; |
2272 | 2273 | ||
2273 | |||
2274 | spin_lock_irqsave(&il->sta_lock, flags_spin); | 2274 | spin_lock_irqsave(&il->sta_lock, flags_spin); |
2275 | if (!(il->stations[lq->sta_id].used & IL_STA_DRIVER_ACTIVE)) { | 2275 | if (!(il->stations[lq->sta_id].used & IL_STA_DRIVER_ACTIVE)) { |
2276 | spin_unlock_irqrestore(&il->sta_lock, flags_spin); | 2276 | spin_unlock_irqrestore(&il->sta_lock, flags_spin); |
@@ -2291,36 +2291,35 @@ int il_send_lq_cmd(struct il_priv *il, struct il_rxon_context *ctx, | |||
2291 | 2291 | ||
2292 | if (init) { | 2292 | if (init) { |
2293 | D_INFO("init LQ command complete," | 2293 | D_INFO("init LQ command complete," |
2294 | " clearing sta addition status for sta %d\n", | 2294 | " clearing sta addition status for sta %d\n", |
2295 | lq->sta_id); | 2295 | lq->sta_id); |
2296 | spin_lock_irqsave(&il->sta_lock, flags_spin); | 2296 | spin_lock_irqsave(&il->sta_lock, flags_spin); |
2297 | il->stations[lq->sta_id].used &= ~IL_STA_UCODE_INPROGRESS; | 2297 | il->stations[lq->sta_id].used &= ~IL_STA_UCODE_INPROGRESS; |
2298 | spin_unlock_irqrestore(&il->sta_lock, flags_spin); | 2298 | spin_unlock_irqrestore(&il->sta_lock, flags_spin); |
2299 | } | 2299 | } |
2300 | return ret; | 2300 | return ret; |
2301 | } | 2301 | } |
2302 | |||
2302 | EXPORT_SYMBOL(il_send_lq_cmd); | 2303 | EXPORT_SYMBOL(il_send_lq_cmd); |
2303 | 2304 | ||
2304 | int il_mac_sta_remove(struct ieee80211_hw *hw, | 2305 | int |
2305 | struct ieee80211_vif *vif, | 2306 | il_mac_sta_remove(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
2306 | struct ieee80211_sta *sta) | 2307 | struct ieee80211_sta *sta) |
2307 | { | 2308 | { |
2308 | struct il_priv *il = hw->priv; | 2309 | struct il_priv *il = hw->priv; |
2309 | struct il_station_priv_common *sta_common = (void *)sta->drv_priv; | 2310 | struct il_station_priv_common *sta_common = (void *)sta->drv_priv; |
2310 | int ret; | 2311 | int ret; |
2311 | 2312 | ||
2312 | D_INFO("received request to remove station %pM\n", | 2313 | D_INFO("received request to remove station %pM\n", sta->addr); |
2313 | sta->addr); | ||
2314 | mutex_lock(&il->mutex); | 2314 | mutex_lock(&il->mutex); |
2315 | D_INFO("proceeding to remove station %pM\n", | 2315 | D_INFO("proceeding to remove station %pM\n", sta->addr); |
2316 | sta->addr); | ||
2317 | ret = il_remove_station(il, sta_common->sta_id, sta->addr); | 2316 | ret = il_remove_station(il, sta_common->sta_id, sta->addr); |
2318 | if (ret) | 2317 | if (ret) |
2319 | IL_ERR("Error removing station %pM\n", | 2318 | IL_ERR("Error removing station %pM\n", sta->addr); |
2320 | sta->addr); | ||
2321 | mutex_unlock(&il->mutex); | 2319 | mutex_unlock(&il->mutex); |
2322 | return ret; | 2320 | return ret; |
2323 | } | 2321 | } |
2322 | |||
2324 | EXPORT_SYMBOL(il_mac_sta_remove); | 2323 | EXPORT_SYMBOL(il_mac_sta_remove); |
2325 | 2324 | ||
2326 | /************************** RX-FUNCTIONS ****************************/ | 2325 | /************************** RX-FUNCTIONS ****************************/ |
@@ -2393,7 +2392,8 @@ EXPORT_SYMBOL(il_mac_sta_remove); | |||
2393 | /** | 2392 | /** |
2394 | * il_rx_queue_space - Return number of free slots available in queue. | 2393 | * il_rx_queue_space - Return number of free slots available in queue. |
2395 | */ | 2394 | */ |
2396 | int il_rx_queue_space(const struct il_rx_queue *q) | 2395 | int |
2396 | il_rx_queue_space(const struct il_rx_queue *q) | ||
2397 | { | 2397 | { |
2398 | int s = q->read - q->write; | 2398 | int s = q->read - q->write; |
2399 | if (s <= 0) | 2399 | if (s <= 0) |
@@ -2404,14 +2404,14 @@ int il_rx_queue_space(const struct il_rx_queue *q) | |||
2404 | s = 0; | 2404 | s = 0; |
2405 | return s; | 2405 | return s; |
2406 | } | 2406 | } |
2407 | |||
2407 | EXPORT_SYMBOL(il_rx_queue_space); | 2408 | EXPORT_SYMBOL(il_rx_queue_space); |
2408 | 2409 | ||
2409 | /** | 2410 | /** |
2410 | * il_rx_queue_update_write_ptr - Update the write pointer for the RX queue | 2411 | * il_rx_queue_update_write_ptr - Update the write pointer for the RX queue |
2411 | */ | 2412 | */ |
2412 | void | 2413 | void |
2413 | il_rx_queue_update_write_ptr(struct il_priv *il, | 2414 | il_rx_queue_update_write_ptr(struct il_priv *il, struct il_rx_queue *q) |
2414 | struct il_rx_queue *q) | ||
2415 | { | 2415 | { |
2416 | unsigned long flags; | 2416 | unsigned long flags; |
2417 | u32 rx_wrt_ptr_reg = il->hw_params.rx_wrt_ptr_reg; | 2417 | u32 rx_wrt_ptr_reg = il->hw_params.rx_wrt_ptr_reg; |
@@ -2427,34 +2427,33 @@ il_rx_queue_update_write_ptr(struct il_priv *il, | |||
2427 | reg = _il_rd(il, CSR_UCODE_DRV_GP1); | 2427 | reg = _il_rd(il, CSR_UCODE_DRV_GP1); |
2428 | 2428 | ||
2429 | if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) { | 2429 | if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) { |
2430 | D_INFO( | 2430 | D_INFO("Rx queue requesting wakeup," " GP1 = 0x%x\n", |
2431 | "Rx queue requesting wakeup," | 2431 | reg); |
2432 | " GP1 = 0x%x\n", reg); | ||
2433 | il_set_bit(il, CSR_GP_CNTRL, | 2432 | il_set_bit(il, CSR_GP_CNTRL, |
2434 | CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); | 2433 | CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); |
2435 | goto exit_unlock; | 2434 | goto exit_unlock; |
2436 | } | 2435 | } |
2437 | 2436 | ||
2438 | q->write_actual = (q->write & ~0x7); | 2437 | q->write_actual = (q->write & ~0x7); |
2439 | il_wr(il, rx_wrt_ptr_reg, | 2438 | il_wr(il, rx_wrt_ptr_reg, q->write_actual); |
2440 | q->write_actual); | ||
2441 | 2439 | ||
2442 | /* Else device is assumed to be awake */ | 2440 | /* Else device is assumed to be awake */ |
2443 | } else { | 2441 | } else { |
2444 | /* Device expects a multiple of 8 */ | 2442 | /* Device expects a multiple of 8 */ |
2445 | q->write_actual = (q->write & ~0x7); | 2443 | q->write_actual = (q->write & ~0x7); |
2446 | il_wr(il, rx_wrt_ptr_reg, | 2444 | il_wr(il, rx_wrt_ptr_reg, q->write_actual); |
2447 | q->write_actual); | ||
2448 | } | 2445 | } |
2449 | 2446 | ||
2450 | q->need_update = 0; | 2447 | q->need_update = 0; |
2451 | 2448 | ||
2452 | exit_unlock: | 2449 | exit_unlock: |
2453 | spin_unlock_irqrestore(&q->lock, flags); | 2450 | spin_unlock_irqrestore(&q->lock, flags); |
2454 | } | 2451 | } |
2452 | |||
2455 | EXPORT_SYMBOL(il_rx_queue_update_write_ptr); | 2453 | EXPORT_SYMBOL(il_rx_queue_update_write_ptr); |
2456 | 2454 | ||
2457 | int il_rx_queue_alloc(struct il_priv *il) | 2455 | int |
2456 | il_rx_queue_alloc(struct il_priv *il) | ||
2458 | { | 2457 | { |
2459 | struct il_rx_queue *rxq = &il->rxq; | 2458 | struct il_rx_queue *rxq = &il->rxq; |
2460 | struct device *dev = &il->pci_dev->dev; | 2459 | struct device *dev = &il->pci_dev->dev; |
@@ -2465,13 +2464,15 @@ int il_rx_queue_alloc(struct il_priv *il) | |||
2465 | INIT_LIST_HEAD(&rxq->rx_used); | 2464 | INIT_LIST_HEAD(&rxq->rx_used); |
2466 | 2465 | ||
2467 | /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */ | 2466 | /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */ |
2468 | rxq->bd = dma_alloc_coherent(dev, 4 * RX_QUEUE_SIZE, &rxq->bd_dma, | 2467 | rxq->bd = |
2469 | GFP_KERNEL); | 2468 | dma_alloc_coherent(dev, 4 * RX_QUEUE_SIZE, &rxq->bd_dma, |
2469 | GFP_KERNEL); | ||
2470 | if (!rxq->bd) | 2470 | if (!rxq->bd) |
2471 | goto err_bd; | 2471 | goto err_bd; |
2472 | 2472 | ||
2473 | rxq->rb_stts = dma_alloc_coherent(dev, sizeof(struct il_rb_status), | 2473 | rxq->rb_stts = |
2474 | &rxq->rb_stts_dma, GFP_KERNEL); | 2474 | dma_alloc_coherent(dev, sizeof(struct il_rb_status), |
2475 | &rxq->rb_stts_dma, GFP_KERNEL); | ||
2475 | if (!rxq->rb_stts) | 2476 | if (!rxq->rb_stts) |
2476 | goto err_rb; | 2477 | goto err_rb; |
2477 | 2478 | ||
@@ -2493,33 +2494,32 @@ err_rb: | |||
2493 | err_bd: | 2494 | err_bd: |
2494 | return -ENOMEM; | 2495 | return -ENOMEM; |
2495 | } | 2496 | } |
2496 | EXPORT_SYMBOL(il_rx_queue_alloc); | ||
2497 | 2497 | ||
2498 | EXPORT_SYMBOL(il_rx_queue_alloc); | ||
2498 | 2499 | ||
2499 | void il_hdl_spectrum_measurement(struct il_priv *il, | 2500 | void |
2500 | struct il_rx_buf *rxb) | 2501 | il_hdl_spectrum_measurement(struct il_priv *il, struct il_rx_buf *rxb) |
2501 | { | 2502 | { |
2502 | struct il_rx_pkt *pkt = rxb_addr(rxb); | 2503 | struct il_rx_pkt *pkt = rxb_addr(rxb); |
2503 | struct il_spectrum_notification *report = &(pkt->u.spectrum_notif); | 2504 | struct il_spectrum_notification *report = &(pkt->u.spectrum_notif); |
2504 | 2505 | ||
2505 | if (!report->state) { | 2506 | if (!report->state) { |
2506 | D_11H( | 2507 | D_11H("Spectrum Measure Notification: Start\n"); |
2507 | "Spectrum Measure Notification: Start\n"); | ||
2508 | return; | 2508 | return; |
2509 | } | 2509 | } |
2510 | 2510 | ||
2511 | memcpy(&il->measure_report, report, sizeof(*report)); | 2511 | memcpy(&il->measure_report, report, sizeof(*report)); |
2512 | il->measurement_status |= MEASUREMENT_READY; | 2512 | il->measurement_status |= MEASUREMENT_READY; |
2513 | } | 2513 | } |
2514 | |||
2514 | EXPORT_SYMBOL(il_hdl_spectrum_measurement); | 2515 | EXPORT_SYMBOL(il_hdl_spectrum_measurement); |
2515 | 2516 | ||
2516 | /* | 2517 | /* |
2517 | * returns non-zero if packet should be dropped | 2518 | * returns non-zero if packet should be dropped |
2518 | */ | 2519 | */ |
2519 | int il_set_decrypted_flag(struct il_priv *il, | 2520 | int |
2520 | struct ieee80211_hdr *hdr, | 2521 | il_set_decrypted_flag(struct il_priv *il, struct ieee80211_hdr *hdr, |
2521 | u32 decrypt_res, | 2522 | u32 decrypt_res, struct ieee80211_rx_status *stats) |
2522 | struct ieee80211_rx_status *stats) | ||
2523 | { | 2523 | { |
2524 | u16 fc = le16_to_cpu(hdr->frame_control); | 2524 | u16 fc = le16_to_cpu(hdr->frame_control); |
2525 | 2525 | ||
@@ -2527,8 +2527,7 @@ int il_set_decrypted_flag(struct il_priv *il, | |||
2527 | * All contexts have the same setting here due to it being | 2527 | * All contexts have the same setting here due to it being |
2528 | * a module parameter, so OK to check any context. | 2528 | * a module parameter, so OK to check any context. |
2529 | */ | 2529 | */ |
2530 | if (il->ctx.active.filter_flags & | 2530 | if (il->ctx.active.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK) |
2531 | RXON_FILTER_DIS_DECRYPT_MSK) | ||
2532 | return 0; | 2531 | return 0; |
2533 | 2532 | ||
2534 | if (!(fc & IEEE80211_FCTL_PROTECTED)) | 2533 | if (!(fc & IEEE80211_FCTL_PROTECTED)) |
@@ -2564,6 +2563,7 @@ int il_set_decrypted_flag(struct il_priv *il, | |||
2564 | } | 2563 | } |
2565 | return 0; | 2564 | return 0; |
2566 | } | 2565 | } |
2566 | |||
2567 | EXPORT_SYMBOL(il_set_decrypted_flag); | 2567 | EXPORT_SYMBOL(il_set_decrypted_flag); |
2568 | 2568 | ||
2569 | /** | 2569 | /** |
@@ -2586,16 +2586,14 @@ il_txq_update_write_ptr(struct il_priv *il, struct il_tx_queue *txq) | |||
2586 | reg = _il_rd(il, CSR_UCODE_DRV_GP1); | 2586 | reg = _il_rd(il, CSR_UCODE_DRV_GP1); |
2587 | 2587 | ||
2588 | if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) { | 2588 | if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) { |
2589 | D_INFO( | 2589 | D_INFO("Tx queue %d requesting wakeup," " GP1 = 0x%x\n", |
2590 | "Tx queue %d requesting wakeup," | 2590 | txq_id, reg); |
2591 | " GP1 = 0x%x\n", txq_id, reg); | ||
2592 | il_set_bit(il, CSR_GP_CNTRL, | 2591 | il_set_bit(il, CSR_GP_CNTRL, |
2593 | CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); | 2592 | CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); |
2594 | return; | 2593 | return; |
2595 | } | 2594 | } |
2596 | 2595 | ||
2597 | il_wr(il, HBUS_TARG_WRPTR, | 2596 | il_wr(il, HBUS_TARG_WRPTR, txq->q.write_ptr | (txq_id << 8)); |
2598 | txq->q.write_ptr | (txq_id << 8)); | ||
2599 | 2597 | ||
2600 | /* | 2598 | /* |
2601 | * else not in power-save mode, | 2599 | * else not in power-save mode, |
@@ -2603,16 +2601,17 @@ il_txq_update_write_ptr(struct il_priv *il, struct il_tx_queue *txq) | |||
2603 | * trying to tx (during RFKILL, we're not trying to tx). | 2601 | * trying to tx (during RFKILL, we're not trying to tx). |
2604 | */ | 2602 | */ |
2605 | } else | 2603 | } else |
2606 | _il_wr(il, HBUS_TARG_WRPTR, | 2604 | _il_wr(il, HBUS_TARG_WRPTR, txq->q.write_ptr | (txq_id << 8)); |
2607 | txq->q.write_ptr | (txq_id << 8)); | ||
2608 | txq->need_update = 0; | 2605 | txq->need_update = 0; |
2609 | } | 2606 | } |
2607 | |||
2610 | EXPORT_SYMBOL(il_txq_update_write_ptr); | 2608 | EXPORT_SYMBOL(il_txq_update_write_ptr); |
2611 | 2609 | ||
2612 | /** | 2610 | /** |
2613 | * il_tx_queue_unmap - Unmap any remaining DMA mappings and free skb's | 2611 | * il_tx_queue_unmap - Unmap any remaining DMA mappings and free skb's |
2614 | */ | 2612 | */ |
2615 | void il_tx_queue_unmap(struct il_priv *il, int txq_id) | 2613 | void |
2614 | il_tx_queue_unmap(struct il_priv *il, int txq_id) | ||
2616 | { | 2615 | { |
2617 | struct il_tx_queue *txq = &il->txq[txq_id]; | 2616 | struct il_tx_queue *txq = &il->txq[txq_id]; |
2618 | struct il_queue *q = &txq->q; | 2617 | struct il_queue *q = &txq->q; |
@@ -2625,6 +2624,7 @@ void il_tx_queue_unmap(struct il_priv *il, int txq_id) | |||
2625 | q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd); | 2624 | q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd); |
2626 | } | 2625 | } |
2627 | } | 2626 | } |
2627 | |||
2628 | EXPORT_SYMBOL(il_tx_queue_unmap); | 2628 | EXPORT_SYMBOL(il_tx_queue_unmap); |
2629 | 2629 | ||
2630 | /** | 2630 | /** |
@@ -2635,7 +2635,8 @@ EXPORT_SYMBOL(il_tx_queue_unmap); | |||
2635 | * Free all buffers. | 2635 | * Free all buffers. |
2636 | * 0-fill, but do not free "txq" descriptor structure. | 2636 | * 0-fill, but do not free "txq" descriptor structure. |
2637 | */ | 2637 | */ |
2638 | void il_tx_queue_free(struct il_priv *il, int txq_id) | 2638 | void |
2639 | il_tx_queue_free(struct il_priv *il, int txq_id) | ||
2639 | { | 2640 | { |
2640 | struct il_tx_queue *txq = &il->txq[txq_id]; | 2641 | struct il_tx_queue *txq = &il->txq[txq_id]; |
2641 | struct device *dev = &il->pci_dev->dev; | 2642 | struct device *dev = &il->pci_dev->dev; |
@@ -2649,8 +2650,8 @@ void il_tx_queue_free(struct il_priv *il, int txq_id) | |||
2649 | 2650 | ||
2650 | /* De-alloc circular buffer of TFDs */ | 2651 | /* De-alloc circular buffer of TFDs */ |
2651 | if (txq->q.n_bd) | 2652 | if (txq->q.n_bd) |
2652 | dma_free_coherent(dev, il->hw_params.tfd_size * | 2653 | dma_free_coherent(dev, il->hw_params.tfd_size * txq->q.n_bd, |
2653 | txq->q.n_bd, txq->tfds, txq->q.dma_addr); | 2654 | txq->tfds, txq->q.dma_addr); |
2654 | 2655 | ||
2655 | /* De-alloc array of per-TFD driver data */ | 2656 | /* De-alloc array of per-TFD driver data */ |
2656 | kfree(txq->txb); | 2657 | kfree(txq->txb); |
@@ -2665,12 +2666,14 @@ void il_tx_queue_free(struct il_priv *il, int txq_id) | |||
2665 | /* 0-fill queue descriptor structure */ | 2666 | /* 0-fill queue descriptor structure */ |
2666 | memset(txq, 0, sizeof(*txq)); | 2667 | memset(txq, 0, sizeof(*txq)); |
2667 | } | 2668 | } |
2669 | |||
2668 | EXPORT_SYMBOL(il_tx_queue_free); | 2670 | EXPORT_SYMBOL(il_tx_queue_free); |
2669 | 2671 | ||
2670 | /** | 2672 | /** |
2671 | * il_cmd_queue_unmap - Unmap any remaining DMA mappings from command queue | 2673 | * il_cmd_queue_unmap - Unmap any remaining DMA mappings from command queue |
2672 | */ | 2674 | */ |
2673 | void il_cmd_queue_unmap(struct il_priv *il) | 2675 | void |
2676 | il_cmd_queue_unmap(struct il_priv *il) | ||
2674 | { | 2677 | { |
2675 | struct il_tx_queue *txq = &il->txq[il->cmd_queue]; | 2678 | struct il_tx_queue *txq = &il->txq[il->cmd_queue]; |
2676 | struct il_queue *q = &txq->q; | 2679 | struct il_queue *q = &txq->q; |
@@ -2702,6 +2705,7 @@ void il_cmd_queue_unmap(struct il_priv *il) | |||
2702 | txq->meta[i].flags = 0; | 2705 | txq->meta[i].flags = 0; |
2703 | } | 2706 | } |
2704 | } | 2707 | } |
2708 | |||
2705 | EXPORT_SYMBOL(il_cmd_queue_unmap); | 2709 | EXPORT_SYMBOL(il_cmd_queue_unmap); |
2706 | 2710 | ||
2707 | /** | 2711 | /** |
@@ -2712,7 +2716,8 @@ EXPORT_SYMBOL(il_cmd_queue_unmap); | |||
2712 | * Free all buffers. | 2716 | * Free all buffers. |
2713 | * 0-fill, but do not free "txq" descriptor structure. | 2717 | * 0-fill, but do not free "txq" descriptor structure. |
2714 | */ | 2718 | */ |
2715 | void il_cmd_queue_free(struct il_priv *il) | 2719 | void |
2720 | il_cmd_queue_free(struct il_priv *il) | ||
2716 | { | 2721 | { |
2717 | struct il_tx_queue *txq = &il->txq[il->cmd_queue]; | 2722 | struct il_tx_queue *txq = &il->txq[il->cmd_queue]; |
2718 | struct device *dev = &il->pci_dev->dev; | 2723 | struct device *dev = &il->pci_dev->dev; |
@@ -2738,6 +2743,7 @@ void il_cmd_queue_free(struct il_priv *il) | |||
2738 | /* 0-fill queue descriptor structure */ | 2743 | /* 0-fill queue descriptor structure */ |
2739 | memset(txq, 0, sizeof(*txq)); | 2744 | memset(txq, 0, sizeof(*txq)); |
2740 | } | 2745 | } |
2746 | |||
2741 | EXPORT_SYMBOL(il_cmd_queue_free); | 2747 | EXPORT_SYMBOL(il_cmd_queue_free); |
2742 | 2748 | ||
2743 | /*************** DMA-QUEUE-GENERAL-FUNCTIONS ***** | 2749 | /*************** DMA-QUEUE-GENERAL-FUNCTIONS ***** |
@@ -2763,7 +2769,8 @@ EXPORT_SYMBOL(il_cmd_queue_free); | |||
2763 | * See more detailed info in 4965.h. | 2769 | * See more detailed info in 4965.h. |
2764 | ***************************************************/ | 2770 | ***************************************************/ |
2765 | 2771 | ||
2766 | int il_queue_space(const struct il_queue *q) | 2772 | int |
2773 | il_queue_space(const struct il_queue *q) | ||
2767 | { | 2774 | { |
2768 | int s = q->read_ptr - q->write_ptr; | 2775 | int s = q->read_ptr - q->write_ptr; |
2769 | 2776 | ||
@@ -2778,14 +2785,16 @@ int il_queue_space(const struct il_queue *q) | |||
2778 | s = 0; | 2785 | s = 0; |
2779 | return s; | 2786 | return s; |
2780 | } | 2787 | } |
2788 | |||
2781 | EXPORT_SYMBOL(il_queue_space); | 2789 | EXPORT_SYMBOL(il_queue_space); |
2782 | 2790 | ||
2783 | 2791 | ||
2784 | /** | 2792 | /** |
2785 | * il_queue_init - Initialize queue's high/low-water and read/write idxes | 2793 | * il_queue_init - Initialize queue's high/low-water and read/write idxes |
2786 | */ | 2794 | */ |
2787 | static int il_queue_init(struct il_priv *il, struct il_queue *q, | 2795 | static int |
2788 | int count, int slots_num, u32 id) | 2796 | il_queue_init(struct il_priv *il, struct il_queue *q, int count, int slots_num, |
2797 | u32 id) | ||
2789 | { | 2798 | { |
2790 | q->n_bd = count; | 2799 | q->n_bd = count; |
2791 | q->n_win = slots_num; | 2800 | q->n_win = slots_num; |
@@ -2815,8 +2824,8 @@ static int il_queue_init(struct il_priv *il, struct il_queue *q, | |||
2815 | /** | 2824 | /** |
2816 | * il_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue | 2825 | * il_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue |
2817 | */ | 2826 | */ |
2818 | static int il_tx_queue_alloc(struct il_priv *il, | 2827 | static int |
2819 | struct il_tx_queue *txq, u32 id) | 2828 | il_tx_queue_alloc(struct il_priv *il, struct il_tx_queue *txq, u32 id) |
2820 | { | 2829 | { |
2821 | struct device *dev = &il->pci_dev->dev; | 2830 | struct device *dev = &il->pci_dev->dev; |
2822 | size_t tfd_sz = il->hw_params.tfd_size * TFD_QUEUE_SIZE_MAX; | 2831 | size_t tfd_sz = il->hw_params.tfd_size * TFD_QUEUE_SIZE_MAX; |
@@ -2824,11 +2833,12 @@ static int il_tx_queue_alloc(struct il_priv *il, | |||
2824 | /* Driver ilate data, only for Tx (not command) queues, | 2833 | /* Driver ilate data, only for Tx (not command) queues, |
2825 | * not shared with device. */ | 2834 | * not shared with device. */ |
2826 | if (id != il->cmd_queue) { | 2835 | if (id != il->cmd_queue) { |
2827 | txq->txb = kzalloc(sizeof(txq->txb[0]) * | 2836 | txq->txb = |
2828 | TFD_QUEUE_SIZE_MAX, GFP_KERNEL); | 2837 | kzalloc(sizeof(txq->txb[0]) * TFD_QUEUE_SIZE_MAX, |
2838 | GFP_KERNEL); | ||
2829 | if (!txq->txb) { | 2839 | if (!txq->txb) { |
2830 | IL_ERR("kmalloc for auxiliary BD " | 2840 | IL_ERR("kmalloc for auxiliary BD " |
2831 | "structures failed\n"); | 2841 | "structures failed\n"); |
2832 | goto error; | 2842 | goto error; |
2833 | } | 2843 | } |
2834 | } else { | 2844 | } else { |
@@ -2837,8 +2847,8 @@ static int il_tx_queue_alloc(struct il_priv *il, | |||
2837 | 2847 | ||
2838 | /* Circular buffer of transmit frame descriptors (TFDs), | 2848 | /* Circular buffer of transmit frame descriptors (TFDs), |
2839 | * shared with device */ | 2849 | * shared with device */ |
2840 | txq->tfds = dma_alloc_coherent(dev, tfd_sz, &txq->q.dma_addr, | 2850 | txq->tfds = |
2841 | GFP_KERNEL); | 2851 | dma_alloc_coherent(dev, tfd_sz, &txq->q.dma_addr, GFP_KERNEL); |
2842 | if (!txq->tfds) { | 2852 | if (!txq->tfds) { |
2843 | IL_ERR("pci_alloc_consistent(%zd) failed\n", tfd_sz); | 2853 | IL_ERR("pci_alloc_consistent(%zd) failed\n", tfd_sz); |
2844 | goto error; | 2854 | goto error; |
@@ -2847,7 +2857,7 @@ static int il_tx_queue_alloc(struct il_priv *il, | |||
2847 | 2857 | ||
2848 | return 0; | 2858 | return 0; |
2849 | 2859 | ||
2850 | error: | 2860 | error: |
2851 | kfree(txq->txb); | 2861 | kfree(txq->txb); |
2852 | txq->txb = NULL; | 2862 | txq->txb = NULL; |
2853 | 2863 | ||
@@ -2857,8 +2867,9 @@ static int il_tx_queue_alloc(struct il_priv *il, | |||
2857 | /** | 2867 | /** |
2858 | * il_tx_queue_init - Allocate and initialize one tx/cmd queue | 2868 | * il_tx_queue_init - Allocate and initialize one tx/cmd queue |
2859 | */ | 2869 | */ |
2860 | int il_tx_queue_init(struct il_priv *il, struct il_tx_queue *txq, | 2870 | int |
2861 | int slots_num, u32 txq_id) | 2871 | il_tx_queue_init(struct il_priv *il, struct il_tx_queue *txq, int slots_num, |
2872 | u32 txq_id) | ||
2862 | { | 2873 | { |
2863 | int i, len; | 2874 | int i, len; |
2864 | int ret; | 2875 | int ret; |
@@ -2875,10 +2886,10 @@ int il_tx_queue_init(struct il_priv *il, struct il_tx_queue *txq, | |||
2875 | if (txq_id == il->cmd_queue) | 2886 | if (txq_id == il->cmd_queue) |
2876 | actual_slots++; | 2887 | actual_slots++; |
2877 | 2888 | ||
2878 | txq->meta = kzalloc(sizeof(struct il_cmd_meta) * actual_slots, | 2889 | txq->meta = |
2879 | GFP_KERNEL); | 2890 | kzalloc(sizeof(struct il_cmd_meta) * actual_slots, GFP_KERNEL); |
2880 | txq->cmd = kzalloc(sizeof(struct il_device_cmd *) * actual_slots, | 2891 | txq->cmd = |
2881 | GFP_KERNEL); | 2892 | kzalloc(sizeof(struct il_device_cmd *) * actual_slots, GFP_KERNEL); |
2882 | 2893 | ||
2883 | if (!txq->meta || !txq->cmd) | 2894 | if (!txq->meta || !txq->cmd) |
2884 | goto out_free_arrays; | 2895 | goto out_free_arrays; |
@@ -2914,8 +2925,7 @@ int il_tx_queue_init(struct il_priv *il, struct il_tx_queue *txq, | |||
2914 | BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1)); | 2925 | BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1)); |
2915 | 2926 | ||
2916 | /* Initialize queue's high/low-water marks, and head/tail idxes */ | 2927 | /* Initialize queue's high/low-water marks, and head/tail idxes */ |
2917 | il_queue_init(il, &txq->q, | 2928 | il_queue_init(il, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id); |
2918 | TFD_QUEUE_SIZE_MAX, slots_num, txq_id); | ||
2919 | 2929 | ||
2920 | /* Tell device where to find queue */ | 2930 | /* Tell device where to find queue */ |
2921 | il->cfg->ops->lib->txq_init(il, txq); | 2931 | il->cfg->ops->lib->txq_init(il, txq); |
@@ -2930,10 +2940,12 @@ out_free_arrays: | |||
2930 | 2940 | ||
2931 | return -ENOMEM; | 2941 | return -ENOMEM; |
2932 | } | 2942 | } |
2943 | |||
2933 | EXPORT_SYMBOL(il_tx_queue_init); | 2944 | EXPORT_SYMBOL(il_tx_queue_init); |
2934 | 2945 | ||
2935 | void il_tx_queue_reset(struct il_priv *il, struct il_tx_queue *txq, | 2946 | void |
2936 | int slots_num, u32 txq_id) | 2947 | il_tx_queue_reset(struct il_priv *il, struct il_tx_queue *txq, int slots_num, |
2948 | u32 txq_id) | ||
2937 | { | 2949 | { |
2938 | int actual_slots = slots_num; | 2950 | int actual_slots = slots_num; |
2939 | 2951 | ||
@@ -2945,12 +2957,12 @@ void il_tx_queue_reset(struct il_priv *il, struct il_tx_queue *txq, | |||
2945 | txq->need_update = 0; | 2957 | txq->need_update = 0; |
2946 | 2958 | ||
2947 | /* Initialize queue's high/low-water marks, and head/tail idxes */ | 2959 | /* Initialize queue's high/low-water marks, and head/tail idxes */ |
2948 | il_queue_init(il, &txq->q, | 2960 | il_queue_init(il, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id); |
2949 | TFD_QUEUE_SIZE_MAX, slots_num, txq_id); | ||
2950 | 2961 | ||
2951 | /* Tell device where to find queue */ | 2962 | /* Tell device where to find queue */ |
2952 | il->cfg->ops->lib->txq_init(il, txq); | 2963 | il->cfg->ops->lib->txq_init(il, txq); |
2953 | } | 2964 | } |
2965 | |||
2954 | EXPORT_SYMBOL(il_tx_queue_reset); | 2966 | EXPORT_SYMBOL(il_tx_queue_reset); |
2955 | 2967 | ||
2956 | /*************** HOST COMMAND QUEUE FUNCTIONS *****/ | 2968 | /*************** HOST COMMAND QUEUE FUNCTIONS *****/ |
@@ -2964,7 +2976,8 @@ EXPORT_SYMBOL(il_tx_queue_reset); | |||
2964 | * failed. On success, it turns the idx (> 0) of command in the | 2976 | * failed. On success, it turns the idx (> 0) of command in the |
2965 | * command queue. | 2977 | * command queue. |
2966 | */ | 2978 | */ |
2967 | int il_enqueue_hcmd(struct il_priv *il, struct il_host_cmd *cmd) | 2979 | int |
2980 | il_enqueue_hcmd(struct il_priv *il, struct il_host_cmd *cmd) | ||
2968 | { | 2981 | { |
2969 | struct il_tx_queue *txq = &il->txq[il->cmd_queue]; | 2982 | struct il_tx_queue *txq = &il->txq[il->cmd_queue]; |
2970 | struct il_queue *q = &txq->q; | 2983 | struct il_queue *q = &txq->q; |
@@ -2977,7 +2990,7 @@ int il_enqueue_hcmd(struct il_priv *il, struct il_host_cmd *cmd) | |||
2977 | u16 fix_size; | 2990 | u16 fix_size; |
2978 | 2991 | ||
2979 | cmd->len = il->cfg->ops->utils->get_hcmd_size(cmd->id, cmd->len); | 2992 | cmd->len = il->cfg->ops->utils->get_hcmd_size(cmd->id, cmd->len); |
2980 | fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr)); | 2993 | fix_size = (u16) (cmd->len + sizeof(out_cmd->hdr)); |
2981 | 2994 | ||
2982 | /* If any of the command structures end up being larger than | 2995 | /* If any of the command structures end up being larger than |
2983 | * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then | 2996 | * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then |
@@ -2990,7 +3003,7 @@ int il_enqueue_hcmd(struct il_priv *il, struct il_host_cmd *cmd) | |||
2990 | 3003 | ||
2991 | if (il_is_rfkill(il) || il_is_ctkill(il)) { | 3004 | if (il_is_rfkill(il) || il_is_ctkill(il)) { |
2992 | IL_WARN("Not sending command - %s KILL\n", | 3005 | IL_WARN("Not sending command - %s KILL\n", |
2993 | il_is_rfkill(il) ? "RF" : "CT"); | 3006 | il_is_rfkill(il) ? "RF" : "CT"); |
2994 | return -EIO; | 3007 | return -EIO; |
2995 | } | 3008 | } |
2996 | 3009 | ||
@@ -3027,8 +3040,8 @@ int il_enqueue_hcmd(struct il_priv *il, struct il_host_cmd *cmd) | |||
3027 | * information */ | 3040 | * information */ |
3028 | 3041 | ||
3029 | out_cmd->hdr.flags = 0; | 3042 | out_cmd->hdr.flags = 0; |
3030 | out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(il->cmd_queue) | | 3043 | out_cmd->hdr.sequence = |
3031 | IDX_TO_SEQ(q->write_ptr)); | 3044 | cpu_to_le16(QUEUE_TO_SEQ(il->cmd_queue) | IDX_TO_SEQ(q->write_ptr)); |
3032 | if (cmd->flags & CMD_SIZE_HUGE) | 3045 | if (cmd->flags & CMD_SIZE_HUGE) |
3033 | out_cmd->hdr.sequence |= SEQ_HUGE_FRAME; | 3046 | out_cmd->hdr.sequence |= SEQ_HUGE_FRAME; |
3034 | len = sizeof(struct il_device_cmd); | 3047 | len = sizeof(struct il_device_cmd); |
@@ -3039,21 +3052,18 @@ int il_enqueue_hcmd(struct il_priv *il, struct il_host_cmd *cmd) | |||
3039 | switch (out_cmd->hdr.cmd) { | 3052 | switch (out_cmd->hdr.cmd) { |
3040 | case C_TX_LINK_QUALITY_CMD: | 3053 | case C_TX_LINK_QUALITY_CMD: |
3041 | case C_SENSITIVITY: | 3054 | case C_SENSITIVITY: |
3042 | D_HC_DUMP( | 3055 | D_HC_DUMP("Sending command %s (#%x), seq: 0x%04X, " |
3043 | "Sending command %s (#%x), seq: 0x%04X, " | 3056 | "%d bytes at %d[%d]:%d\n", |
3044 | "%d bytes at %d[%d]:%d\n", | 3057 | il_get_cmd_string(out_cmd->hdr.cmd), out_cmd->hdr.cmd, |
3045 | il_get_cmd_string(out_cmd->hdr.cmd), | 3058 | le16_to_cpu(out_cmd->hdr.sequence), fix_size, |
3046 | out_cmd->hdr.cmd, | 3059 | q->write_ptr, idx, il->cmd_queue); |
3047 | le16_to_cpu(out_cmd->hdr.sequence), fix_size, | ||
3048 | q->write_ptr, idx, il->cmd_queue); | ||
3049 | break; | 3060 | break; |
3050 | default: | 3061 | default: |
3051 | D_HC("Sending command %s (#%x), seq: 0x%04X, " | 3062 | D_HC("Sending command %s (#%x), seq: 0x%04X, " |
3052 | "%d bytes at %d[%d]:%d\n", | 3063 | "%d bytes at %d[%d]:%d\n", |
3053 | il_get_cmd_string(out_cmd->hdr.cmd), | 3064 | il_get_cmd_string(out_cmd->hdr.cmd), out_cmd->hdr.cmd, |
3054 | out_cmd->hdr.cmd, | 3065 | le16_to_cpu(out_cmd->hdr.sequence), fix_size, q->write_ptr, |
3055 | le16_to_cpu(out_cmd->hdr.sequence), fix_size, | 3066 | idx, il->cmd_queue); |
3056 | q->write_ptr, idx, il->cmd_queue); | ||
3057 | } | 3067 | } |
3058 | #endif | 3068 | #endif |
3059 | txq->need_update = 1; | 3069 | txq->need_update = 1; |
@@ -3062,14 +3072,14 @@ int il_enqueue_hcmd(struct il_priv *il, struct il_host_cmd *cmd) | |||
3062 | /* Set up entry in queue's byte count circular buffer */ | 3072 | /* Set up entry in queue's byte count circular buffer */ |
3063 | il->cfg->ops->lib->txq_update_byte_cnt_tbl(il, txq, 0); | 3073 | il->cfg->ops->lib->txq_update_byte_cnt_tbl(il, txq, 0); |
3064 | 3074 | ||
3065 | phys_addr = pci_map_single(il->pci_dev, &out_cmd->hdr, | 3075 | phys_addr = |
3066 | fix_size, PCI_DMA_BIDIRECTIONAL); | 3076 | pci_map_single(il->pci_dev, &out_cmd->hdr, fix_size, |
3077 | PCI_DMA_BIDIRECTIONAL); | ||
3067 | dma_unmap_addr_set(out_meta, mapping, phys_addr); | 3078 | dma_unmap_addr_set(out_meta, mapping, phys_addr); |
3068 | dma_unmap_len_set(out_meta, len, fix_size); | 3079 | dma_unmap_len_set(out_meta, len, fix_size); |
3069 | 3080 | ||
3070 | il->cfg->ops->lib->txq_attach_buf_to_tfd(il, txq, | 3081 | il->cfg->ops->lib->txq_attach_buf_to_tfd(il, txq, phys_addr, fix_size, |
3071 | phys_addr, fix_size, 1, | 3082 | 1, U32_PAD(cmd->len)); |
3072 | U32_PAD(cmd->len)); | ||
3073 | 3083 | ||
3074 | /* Increment and update queue's write idx */ | 3084 | /* Increment and update queue's write idx */ |
3075 | q->write_ptr = il_queue_inc_wrap(q->write_ptr, q->n_bd); | 3085 | q->write_ptr = il_queue_inc_wrap(q->write_ptr, q->n_bd); |
@@ -3086,8 +3096,8 @@ int il_enqueue_hcmd(struct il_priv *il, struct il_host_cmd *cmd) | |||
3086 | * need to be reclaimed. As result, some free space forms. If there is | 3096 | * need to be reclaimed. As result, some free space forms. If there is |
3087 | * enough free space (> low mark), wake the stack that feeds us. | 3097 | * enough free space (> low mark), wake the stack that feeds us. |
3088 | */ | 3098 | */ |
3089 | static void il_hcmd_queue_reclaim(struct il_priv *il, int txq_id, | 3099 | static void |
3090 | int idx, int cmd_idx) | 3100 | il_hcmd_queue_reclaim(struct il_priv *il, int txq_id, int idx, int cmd_idx) |
3091 | { | 3101 | { |
3092 | struct il_tx_queue *txq = &il->txq[txq_id]; | 3102 | struct il_tx_queue *txq = &il->txq[txq_id]; |
3093 | struct il_queue *q = &txq->q; | 3103 | struct il_queue *q = &txq->q; |
@@ -3095,8 +3105,8 @@ static void il_hcmd_queue_reclaim(struct il_priv *il, int txq_id, | |||
3095 | 3105 | ||
3096 | if (idx >= q->n_bd || il_queue_used(q, idx) == 0) { | 3106 | if (idx >= q->n_bd || il_queue_used(q, idx) == 0) { |
3097 | IL_ERR("Read idx for DMA queue txq id (%d), idx %d, " | 3107 | IL_ERR("Read idx for DMA queue txq id (%d), idx %d, " |
3098 | "is out of range [0-%d] %d %d.\n", txq_id, | 3108 | "is out of range [0-%d] %d %d.\n", txq_id, idx, q->n_bd, |
3099 | idx, q->n_bd, q->write_ptr, q->read_ptr); | 3109 | q->write_ptr, q->read_ptr); |
3100 | return; | 3110 | return; |
3101 | } | 3111 | } |
3102 | 3112 | ||
@@ -3105,7 +3115,7 @@ static void il_hcmd_queue_reclaim(struct il_priv *il, int txq_id, | |||
3105 | 3115 | ||
3106 | if (nfreed++ > 0) { | 3116 | if (nfreed++ > 0) { |
3107 | IL_ERR("HCMD skipped: idx (%d) %d %d\n", idx, | 3117 | IL_ERR("HCMD skipped: idx (%d) %d %d\n", idx, |
3108 | q->write_ptr, q->read_ptr); | 3118 | q->write_ptr, q->read_ptr); |
3109 | queue_work(il->workqueue, &il->restart); | 3119 | queue_work(il->workqueue, &il->restart); |
3110 | } | 3120 | } |
3111 | 3121 | ||
@@ -3137,11 +3147,11 @@ il_tx_cmd_complete(struct il_priv *il, struct il_rx_buf *rxb) | |||
3137 | /* If a Tx command is being handled and it isn't in the actual | 3147 | /* If a Tx command is being handled and it isn't in the actual |
3138 | * command queue then there a command routing bug has been introduced | 3148 | * command queue then there a command routing bug has been introduced |
3139 | * in the queue management code. */ | 3149 | * in the queue management code. */ |
3140 | if (WARN(txq_id != il->cmd_queue, | 3150 | if (WARN |
3141 | "wrong command queue %d (should be %d), sequence 0x%X readp=%d writep=%d\n", | 3151 | (txq_id != il->cmd_queue, |
3142 | txq_id, il->cmd_queue, sequence, | 3152 | "wrong command queue %d (should be %d), sequence 0x%X readp=%d writep=%d\n", |
3143 | il->txq[il->cmd_queue].q.read_ptr, | 3153 | txq_id, il->cmd_queue, sequence, il->txq[il->cmd_queue].q.read_ptr, |
3144 | il->txq[il->cmd_queue].q.write_ptr)) { | 3154 | il->txq[il->cmd_queue].q.write_ptr)) { |
3145 | il_print_hex_error(il, pkt, 32); | 3155 | il_print_hex_error(il, pkt, 32); |
3146 | return; | 3156 | return; |
3147 | } | 3157 | } |
@@ -3152,10 +3162,8 @@ il_tx_cmd_complete(struct il_priv *il, struct il_rx_buf *rxb) | |||
3152 | 3162 | ||
3153 | txq->time_stamp = jiffies; | 3163 | txq->time_stamp = jiffies; |
3154 | 3164 | ||
3155 | pci_unmap_single(il->pci_dev, | 3165 | pci_unmap_single(il->pci_dev, dma_unmap_addr(meta, mapping), |
3156 | dma_unmap_addr(meta, mapping), | 3166 | dma_unmap_len(meta, len), PCI_DMA_BIDIRECTIONAL); |
3157 | dma_unmap_len(meta, len), | ||
3158 | PCI_DMA_BIDIRECTIONAL); | ||
3159 | 3167 | ||
3160 | /* Input error checking is done when commands are added to queue. */ | 3168 | /* Input error checking is done when commands are added to queue. */ |
3161 | if (meta->flags & CMD_WANT_SKB) { | 3169 | if (meta->flags & CMD_WANT_SKB) { |
@@ -3171,7 +3179,7 @@ il_tx_cmd_complete(struct il_priv *il, struct il_rx_buf *rxb) | |||
3171 | if (!(meta->flags & CMD_ASYNC)) { | 3179 | if (!(meta->flags & CMD_ASYNC)) { |
3172 | clear_bit(S_HCMD_ACTIVE, &il->status); | 3180 | clear_bit(S_HCMD_ACTIVE, &il->status); |
3173 | D_INFO("Clearing HCMD_ACTIVE for command %s\n", | 3181 | D_INFO("Clearing HCMD_ACTIVE for command %s\n", |
3174 | il_get_cmd_string(cmd->hdr.cmd)); | 3182 | il_get_cmd_string(cmd->hdr.cmd)); |
3175 | wake_up(&il->wait_command_queue); | 3183 | wake_up(&il->wait_command_queue); |
3176 | } | 3184 | } |
3177 | 3185 | ||
@@ -3211,11 +3219,12 @@ u32 il_debug_level; | |||
3211 | EXPORT_SYMBOL(il_debug_level); | 3219 | EXPORT_SYMBOL(il_debug_level); |
3212 | 3220 | ||
3213 | const u8 il_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF }; | 3221 | const u8 il_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF }; |
3214 | EXPORT_SYMBOL(il_bcast_addr); | ||
3215 | 3222 | ||
3223 | EXPORT_SYMBOL(il_bcast_addr); | ||
3216 | 3224 | ||
3217 | /* This function both allocates and initializes hw and il. */ | 3225 | /* This function both allocates and initializes hw and il. */ |
3218 | struct ieee80211_hw *il_alloc_all(struct il_cfg *cfg) | 3226 | struct ieee80211_hw * |
3227 | il_alloc_all(struct il_cfg *cfg) | ||
3219 | { | 3228 | { |
3220 | struct il_priv *il; | 3229 | struct il_priv *il; |
3221 | /* mac80211 allocates memory for this device instance, including | 3230 | /* mac80211 allocates memory for this device instance, including |
@@ -3225,8 +3234,7 @@ struct ieee80211_hw *il_alloc_all(struct il_cfg *cfg) | |||
3225 | hw = ieee80211_alloc_hw(sizeof(struct il_priv), | 3234 | hw = ieee80211_alloc_hw(sizeof(struct il_priv), |
3226 | cfg->ops->ieee80211_ops); | 3235 | cfg->ops->ieee80211_ops); |
3227 | if (hw == NULL) { | 3236 | if (hw == NULL) { |
3228 | pr_err("%s: Can not allocate network device\n", | 3237 | pr_err("%s: Can not allocate network device\n", cfg->name); |
3229 | cfg->name); | ||
3230 | goto out; | 3238 | goto out; |
3231 | } | 3239 | } |
3232 | 3240 | ||
@@ -3236,13 +3244,15 @@ struct ieee80211_hw *il_alloc_all(struct il_cfg *cfg) | |||
3236 | out: | 3244 | out: |
3237 | return hw; | 3245 | return hw; |
3238 | } | 3246 | } |
3247 | |||
3239 | EXPORT_SYMBOL(il_alloc_all); | 3248 | EXPORT_SYMBOL(il_alloc_all); |
3240 | 3249 | ||
3241 | #define MAX_BIT_RATE_40_MHZ 150 /* Mbps */ | 3250 | #define MAX_BIT_RATE_40_MHZ 150 /* Mbps */ |
3242 | #define MAX_BIT_RATE_20_MHZ 72 /* Mbps */ | 3251 | #define MAX_BIT_RATE_20_MHZ 72 /* Mbps */ |
3243 | static void il_init_ht_hw_capab(const struct il_priv *il, | 3252 | static void |
3244 | struct ieee80211_sta_ht_cap *ht_info, | 3253 | il_init_ht_hw_capab(const struct il_priv *il, |
3245 | enum ieee80211_band band) | 3254 | struct ieee80211_sta_ht_cap *ht_info, |
3255 | enum ieee80211_band band) | ||
3246 | { | 3256 | { |
3247 | u16 max_bit_rate = 0; | 3257 | u16 max_bit_rate = 0; |
3248 | u8 rx_chains_num = il->hw_params.rx_chains_num; | 3258 | u8 rx_chains_num = il->hw_params.rx_chains_num; |
@@ -3283,15 +3293,17 @@ static void il_init_ht_hw_capab(const struct il_priv *il, | |||
3283 | ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED; | 3293 | ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED; |
3284 | if (tx_chains_num != rx_chains_num) { | 3294 | if (tx_chains_num != rx_chains_num) { |
3285 | ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF; | 3295 | ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF; |
3286 | ht_info->mcs.tx_params |= ((tx_chains_num - 1) << | 3296 | ht_info->mcs.tx_params |= |
3287 | IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT); | 3297 | ((tx_chains_num - |
3298 | 1) << IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT); | ||
3288 | } | 3299 | } |
3289 | } | 3300 | } |
3290 | 3301 | ||
3291 | /** | 3302 | /** |
3292 | * il_init_geos - Initialize mac80211's geo/channel info based from eeprom | 3303 | * il_init_geos - Initialize mac80211's geo/channel info based from eeprom |
3293 | */ | 3304 | */ |
3294 | int il_init_geos(struct il_priv *il) | 3305 | int |
3306 | il_init_geos(struct il_priv *il) | ||
3295 | { | 3307 | { |
3296 | struct il_channel_info *ch; | 3308 | struct il_channel_info *ch; |
3297 | struct ieee80211_supported_band *sband; | 3309 | struct ieee80211_supported_band *sband; |
@@ -3308,13 +3320,15 @@ int il_init_geos(struct il_priv *il) | |||
3308 | return 0; | 3320 | return 0; |
3309 | } | 3321 | } |
3310 | 3322 | ||
3311 | channels = kzalloc(sizeof(struct ieee80211_channel) * | 3323 | channels = |
3312 | il->channel_count, GFP_KERNEL); | 3324 | kzalloc(sizeof(struct ieee80211_channel) * il->channel_count, |
3325 | GFP_KERNEL); | ||
3313 | if (!channels) | 3326 | if (!channels) |
3314 | return -ENOMEM; | 3327 | return -ENOMEM; |
3315 | 3328 | ||
3316 | rates = kzalloc((sizeof(struct ieee80211_rate) * RATE_COUNT_LEGACY), | 3329 | rates = |
3317 | GFP_KERNEL); | 3330 | kzalloc((sizeof(struct ieee80211_rate) * RATE_COUNT_LEGACY), |
3331 | GFP_KERNEL); | ||
3318 | if (!rates) { | 3332 | if (!rates) { |
3319 | kfree(channels); | 3333 | kfree(channels); |
3320 | return -ENOMEM; | 3334 | return -ENOMEM; |
@@ -3328,8 +3342,7 @@ int il_init_geos(struct il_priv *il) | |||
3328 | sband->n_bitrates = RATE_COUNT_LEGACY - IL_FIRST_OFDM_RATE; | 3342 | sband->n_bitrates = RATE_COUNT_LEGACY - IL_FIRST_OFDM_RATE; |
3329 | 3343 | ||
3330 | if (il->cfg->sku & IL_SKU_N) | 3344 | if (il->cfg->sku & IL_SKU_N) |
3331 | il_init_ht_hw_capab(il, &sband->ht_cap, | 3345 | il_init_ht_hw_capab(il, &sband->ht_cap, IEEE80211_BAND_5GHZ); |
3332 | IEEE80211_BAND_5GHZ); | ||
3333 | 3346 | ||
3334 | sband = &il->bands[IEEE80211_BAND_2GHZ]; | 3347 | sband = &il->bands[IEEE80211_BAND_2GHZ]; |
3335 | sband->channels = channels; | 3348 | sband->channels = channels; |
@@ -3338,13 +3351,12 @@ int il_init_geos(struct il_priv *il) | |||
3338 | sband->n_bitrates = RATE_COUNT_LEGACY; | 3351 | sband->n_bitrates = RATE_COUNT_LEGACY; |
3339 | 3352 | ||
3340 | if (il->cfg->sku & IL_SKU_N) | 3353 | if (il->cfg->sku & IL_SKU_N) |
3341 | il_init_ht_hw_capab(il, &sband->ht_cap, | 3354 | il_init_ht_hw_capab(il, &sband->ht_cap, IEEE80211_BAND_2GHZ); |
3342 | IEEE80211_BAND_2GHZ); | ||
3343 | 3355 | ||
3344 | il->ieee_channels = channels; | 3356 | il->ieee_channels = channels; |
3345 | il->ieee_rates = rates; | 3357 | il->ieee_rates = rates; |
3346 | 3358 | ||
3347 | for (i = 0; i < il->channel_count; i++) { | 3359 | for (i = 0; i < il->channel_count; i++) { |
3348 | ch = &il->channel_info[i]; | 3360 | ch = &il->channel_info[i]; |
3349 | 3361 | ||
3350 | if (!il_is_channel_valid(ch)) | 3362 | if (!il_is_channel_valid(ch)) |
@@ -3355,7 +3367,7 @@ int il_init_geos(struct il_priv *il) | |||
3355 | geo_ch = &sband->channels[sband->n_channels++]; | 3367 | geo_ch = &sband->channels[sband->n_channels++]; |
3356 | 3368 | ||
3357 | geo_ch->center_freq = | 3369 | geo_ch->center_freq = |
3358 | ieee80211_channel_to_frequency(ch->channel, ch->band); | 3370 | ieee80211_channel_to_frequency(ch->channel, ch->band); |
3359 | geo_ch->max_power = ch->max_power_avg; | 3371 | geo_ch->max_power = ch->max_power_avg; |
3360 | geo_ch->max_antenna_gain = 0xff; | 3372 | geo_ch->max_antenna_gain = 0xff; |
3361 | geo_ch->hw_value = ch->channel; | 3373 | geo_ch->hw_value = ch->channel; |
@@ -3378,12 +3390,12 @@ int il_init_geos(struct il_priv *il) | |||
3378 | geo_ch->flags |= IEEE80211_CHAN_DISABLED; | 3390 | geo_ch->flags |= IEEE80211_CHAN_DISABLED; |
3379 | } | 3391 | } |
3380 | 3392 | ||
3381 | D_INFO("Channel %d Freq=%d[%sGHz] %s flag=0x%X\n", | 3393 | D_INFO("Channel %d Freq=%d[%sGHz] %s flag=0x%X\n", ch->channel, |
3382 | ch->channel, geo_ch->center_freq, | 3394 | geo_ch->center_freq, |
3383 | il_is_channel_a_band(ch) ? "5.2" : "2.4", | 3395 | il_is_channel_a_band(ch) ? "5.2" : "2.4", |
3384 | geo_ch->flags & IEEE80211_CHAN_DISABLED ? | 3396 | geo_ch-> |
3385 | "restricted" : "valid", | 3397 | flags & IEEE80211_CHAN_DISABLED ? "restricted" : "valid", |
3386 | geo_ch->flags); | 3398 | geo_ch->flags); |
3387 | } | 3399 | } |
3388 | 3400 | ||
3389 | il->tx_power_device_lmt = max_tx_power; | 3401 | il->tx_power_device_lmt = max_tx_power; |
@@ -3394,35 +3406,37 @@ int il_init_geos(struct il_priv *il) | |||
3394 | (il->cfg->sku & IL_SKU_A)) { | 3406 | (il->cfg->sku & IL_SKU_A)) { |
3395 | IL_INFO("Incorrectly detected BG card as ABG. " | 3407 | IL_INFO("Incorrectly detected BG card as ABG. " |
3396 | "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n", | 3408 | "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n", |
3397 | il->pci_dev->device, | 3409 | il->pci_dev->device, il->pci_dev->subsystem_device); |
3398 | il->pci_dev->subsystem_device); | ||
3399 | il->cfg->sku &= ~IL_SKU_A; | 3410 | il->cfg->sku &= ~IL_SKU_A; |
3400 | } | 3411 | } |
3401 | 3412 | ||
3402 | IL_INFO("Tunable channels: %d 802.11bg, %d 802.11a channels\n", | 3413 | IL_INFO("Tunable channels: %d 802.11bg, %d 802.11a channels\n", |
3403 | il->bands[IEEE80211_BAND_2GHZ].n_channels, | 3414 | il->bands[IEEE80211_BAND_2GHZ].n_channels, |
3404 | il->bands[IEEE80211_BAND_5GHZ].n_channels); | 3415 | il->bands[IEEE80211_BAND_5GHZ].n_channels); |
3405 | 3416 | ||
3406 | set_bit(S_GEO_CONFIGURED, &il->status); | 3417 | set_bit(S_GEO_CONFIGURED, &il->status); |
3407 | 3418 | ||
3408 | return 0; | 3419 | return 0; |
3409 | } | 3420 | } |
3421 | |||
3410 | EXPORT_SYMBOL(il_init_geos); | 3422 | EXPORT_SYMBOL(il_init_geos); |
3411 | 3423 | ||
3412 | /* | 3424 | /* |
3413 | * il_free_geos - undo allocations in il_init_geos | 3425 | * il_free_geos - undo allocations in il_init_geos |
3414 | */ | 3426 | */ |
3415 | void il_free_geos(struct il_priv *il) | 3427 | void |
3428 | il_free_geos(struct il_priv *il) | ||
3416 | { | 3429 | { |
3417 | kfree(il->ieee_channels); | 3430 | kfree(il->ieee_channels); |
3418 | kfree(il->ieee_rates); | 3431 | kfree(il->ieee_rates); |
3419 | clear_bit(S_GEO_CONFIGURED, &il->status); | 3432 | clear_bit(S_GEO_CONFIGURED, &il->status); |
3420 | } | 3433 | } |
3434 | |||
3421 | EXPORT_SYMBOL(il_free_geos); | 3435 | EXPORT_SYMBOL(il_free_geos); |
3422 | 3436 | ||
3423 | static bool il_is_channel_extension(struct il_priv *il, | 3437 | static bool |
3424 | enum ieee80211_band band, | 3438 | il_is_channel_extension(struct il_priv *il, enum ieee80211_band band, |
3425 | u16 channel, u8 extension_chan_offset) | 3439 | u16 channel, u8 extension_chan_offset) |
3426 | { | 3440 | { |
3427 | const struct il_channel_info *ch_info; | 3441 | const struct il_channel_info *ch_info; |
3428 | 3442 | ||
@@ -3431,18 +3445,18 @@ static bool il_is_channel_extension(struct il_priv *il, | |||
3431 | return false; | 3445 | return false; |
3432 | 3446 | ||
3433 | if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE) | 3447 | if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE) |
3434 | return !(ch_info->ht40_extension_channel & | 3448 | return !(ch_info-> |
3435 | IEEE80211_CHAN_NO_HT40PLUS); | 3449 | ht40_extension_channel & IEEE80211_CHAN_NO_HT40PLUS); |
3436 | else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW) | 3450 | else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW) |
3437 | return !(ch_info->ht40_extension_channel & | 3451 | return !(ch_info-> |
3438 | IEEE80211_CHAN_NO_HT40MINUS); | 3452 | ht40_extension_channel & IEEE80211_CHAN_NO_HT40MINUS); |
3439 | 3453 | ||
3440 | return false; | 3454 | return false; |
3441 | } | 3455 | } |
3442 | 3456 | ||
3443 | bool il_is_ht40_tx_allowed(struct il_priv *il, | 3457 | bool |
3444 | struct il_rxon_context *ctx, | 3458 | il_is_ht40_tx_allowed(struct il_priv * il, struct il_rxon_context * ctx, |
3445 | struct ieee80211_sta_ht_cap *ht_cap) | 3459 | struct ieee80211_sta_ht_cap * ht_cap) |
3446 | { | 3460 | { |
3447 | if (!ctx->ht.enabled || !ctx->ht.is_40mhz) | 3461 | if (!ctx->ht.enabled || !ctx->ht.is_40mhz) |
3448 | return false; | 3462 | return false; |
@@ -3460,12 +3474,14 @@ bool il_is_ht40_tx_allowed(struct il_priv *il, | |||
3460 | #endif | 3474 | #endif |
3461 | 3475 | ||
3462 | return il_is_channel_extension(il, il->band, | 3476 | return il_is_channel_extension(il, il->band, |
3463 | le16_to_cpu(ctx->staging.channel), | 3477 | le16_to_cpu(ctx->staging.channel), |
3464 | ctx->ht.extension_chan_offset); | 3478 | ctx->ht.extension_chan_offset); |
3465 | } | 3479 | } |
3480 | |||
3466 | EXPORT_SYMBOL(il_is_ht40_tx_allowed); | 3481 | EXPORT_SYMBOL(il_is_ht40_tx_allowed); |
3467 | 3482 | ||
3468 | static u16 il_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val) | 3483 | static u16 |
3484 | il_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val) | ||
3469 | { | 3485 | { |
3470 | u16 new_val; | 3486 | u16 new_val; |
3471 | u16 beacon_factor; | 3487 | u16 beacon_factor; |
@@ -3520,36 +3536,37 @@ il_send_rxon_timing(struct il_priv *il, struct il_rxon_context *ctx) | |||
3520 | 3536 | ||
3521 | /* | 3537 | /* |
3522 | * TODO: For IBSS we need to get atim_win from mac80211, | 3538 | * TODO: For IBSS we need to get atim_win from mac80211, |
3523 | * for now just always use 0 | 3539 | * for now just always use 0 |
3524 | */ | 3540 | */ |
3525 | ctx->timing.atim_win = 0; | 3541 | ctx->timing.atim_win = 0; |
3526 | 3542 | ||
3527 | beacon_int = il_adjust_beacon_interval(beacon_int, | 3543 | beacon_int = |
3528 | il->hw_params.max_beacon_itrvl * TIME_UNIT); | 3544 | il_adjust_beacon_interval(beacon_int, |
3545 | il->hw_params.max_beacon_itrvl * | ||
3546 | TIME_UNIT); | ||
3529 | ctx->timing.beacon_interval = cpu_to_le16(beacon_int); | 3547 | ctx->timing.beacon_interval = cpu_to_le16(beacon_int); |
3530 | 3548 | ||
3531 | tsf = il->timestamp; /* tsf is modifed by do_div: copy it */ | 3549 | tsf = il->timestamp; /* tsf is modifed by do_div: copy it */ |
3532 | interval_tm = beacon_int * TIME_UNIT; | 3550 | interval_tm = beacon_int * TIME_UNIT; |
3533 | rem = do_div(tsf, interval_tm); | 3551 | rem = do_div(tsf, interval_tm); |
3534 | ctx->timing.beacon_init_val = cpu_to_le32(interval_tm - rem); | 3552 | ctx->timing.beacon_init_val = cpu_to_le32(interval_tm - rem); |
3535 | 3553 | ||
3536 | ctx->timing.dtim_period = vif ? (vif->bss_conf.dtim_period ?: 1) : 1; | 3554 | ctx->timing.dtim_period = vif ? (vif->bss_conf.dtim_period ? : 1) : 1; |
3537 | 3555 | ||
3538 | D_ASSOC( | 3556 | D_ASSOC("beacon interval %d beacon timer %d beacon tim %d\n", |
3539 | "beacon interval %d beacon timer %d beacon tim %d\n", | 3557 | le16_to_cpu(ctx->timing.beacon_interval), |
3540 | le16_to_cpu(ctx->timing.beacon_interval), | 3558 | le32_to_cpu(ctx->timing.beacon_init_val), |
3541 | le32_to_cpu(ctx->timing.beacon_init_val), | 3559 | le16_to_cpu(ctx->timing.atim_win)); |
3542 | le16_to_cpu(ctx->timing.atim_win)); | ||
3543 | 3560 | ||
3544 | return il_send_cmd_pdu(il, ctx->rxon_timing_cmd, | 3561 | return il_send_cmd_pdu(il, ctx->rxon_timing_cmd, sizeof(ctx->timing), |
3545 | sizeof(ctx->timing), &ctx->timing); | 3562 | &ctx->timing); |
3546 | } | 3563 | } |
3564 | |||
3547 | EXPORT_SYMBOL(il_send_rxon_timing); | 3565 | EXPORT_SYMBOL(il_send_rxon_timing); |
3548 | 3566 | ||
3549 | void | 3567 | void |
3550 | il_set_rxon_hwcrypto(struct il_priv *il, | 3568 | il_set_rxon_hwcrypto(struct il_priv *il, struct il_rxon_context *ctx, |
3551 | struct il_rxon_context *ctx, | 3569 | int hw_decrypt) |
3552 | int hw_decrypt) | ||
3553 | { | 3570 | { |
3554 | struct il_rxon_cmd *rxon = &ctx->staging; | 3571 | struct il_rxon_cmd *rxon = &ctx->staging; |
3555 | 3572 | ||
@@ -3559,6 +3576,7 @@ il_set_rxon_hwcrypto(struct il_priv *il, | |||
3559 | rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK; | 3576 | rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK; |
3560 | 3577 | ||
3561 | } | 3578 | } |
3579 | |||
3562 | EXPORT_SYMBOL(il_set_rxon_hwcrypto); | 3580 | EXPORT_SYMBOL(il_set_rxon_hwcrypto); |
3563 | 3581 | ||
3564 | /* validate RXON structure is valid */ | 3582 | /* validate RXON structure is valid */ |
@@ -3604,28 +3622,27 @@ il_check_rxon_cmd(struct il_priv *il, struct il_rxon_context *ctx) | |||
3604 | error = true; | 3622 | error = true; |
3605 | } | 3623 | } |
3606 | 3624 | ||
3607 | if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) | 3625 | if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) == |
3608 | == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) { | 3626 | (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) { |
3609 | IL_WARN("CCK and short slot\n"); | 3627 | IL_WARN("CCK and short slot\n"); |
3610 | error = true; | 3628 | error = true; |
3611 | } | 3629 | } |
3612 | 3630 | ||
3613 | if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) | 3631 | if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) == |
3614 | == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) { | 3632 | (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) { |
3615 | IL_WARN("CCK and auto detect"); | 3633 | IL_WARN("CCK and auto detect"); |
3616 | error = true; | 3634 | error = true; |
3617 | } | 3635 | } |
3618 | 3636 | ||
3619 | if ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK | | 3637 | if ((rxon-> |
3620 | RXON_FLG_TGG_PROTECT_MSK)) == | 3638 | flags & (RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK)) == |
3621 | RXON_FLG_TGG_PROTECT_MSK) { | 3639 | RXON_FLG_TGG_PROTECT_MSK) { |
3622 | IL_WARN("TGg but no auto-detect\n"); | 3640 | IL_WARN("TGg but no auto-detect\n"); |
3623 | error = true; | 3641 | error = true; |
3624 | } | 3642 | } |
3625 | 3643 | ||
3626 | if (error) | 3644 | if (error) |
3627 | IL_WARN("Tuning to channel %d\n", | 3645 | IL_WARN("Tuning to channel %d\n", le16_to_cpu(rxon->channel)); |
3628 | le16_to_cpu(rxon->channel)); | ||
3629 | 3646 | ||
3630 | if (error) { | 3647 | if (error) { |
3631 | IL_ERR("Invalid RXON\n"); | 3648 | IL_ERR("Invalid RXON\n"); |
@@ -3633,6 +3650,7 @@ il_check_rxon_cmd(struct il_priv *il, struct il_rxon_context *ctx) | |||
3633 | } | 3650 | } |
3634 | return 0; | 3651 | return 0; |
3635 | } | 3652 | } |
3653 | |||
3636 | EXPORT_SYMBOL(il_check_rxon_cmd); | 3654 | EXPORT_SYMBOL(il_check_rxon_cmd); |
3637 | 3655 | ||
3638 | /** | 3656 | /** |
@@ -3643,8 +3661,8 @@ EXPORT_SYMBOL(il_check_rxon_cmd); | |||
3643 | * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that | 3661 | * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that |
3644 | * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required. | 3662 | * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required. |
3645 | */ | 3663 | */ |
3646 | int il_full_rxon_required(struct il_priv *il, | 3664 | int |
3647 | struct il_rxon_context *ctx) | 3665 | il_full_rxon_required(struct il_priv *il, struct il_rxon_context *ctx) |
3648 | { | 3666 | { |
3649 | const struct il_rxon_cmd *staging = &ctx->staging; | 3667 | const struct il_rxon_cmd *staging = &ctx->staging; |
3650 | const struct il_rxon_cmd *active = &ctx->active; | 3668 | const struct il_rxon_cmd *active = &ctx->active; |
@@ -3667,8 +3685,8 @@ int il_full_rxon_required(struct il_priv *il, | |||
3667 | CHK(!il_is_associated_ctx(ctx)); | 3685 | CHK(!il_is_associated_ctx(ctx)); |
3668 | CHK(compare_ether_addr(staging->bssid_addr, active->bssid_addr)); | 3686 | CHK(compare_ether_addr(staging->bssid_addr, active->bssid_addr)); |
3669 | CHK(compare_ether_addr(staging->node_addr, active->node_addr)); | 3687 | CHK(compare_ether_addr(staging->node_addr, active->node_addr)); |
3670 | CHK(compare_ether_addr(staging->wlap_bssid_addr, | 3688 | CHK(compare_ether_addr |
3671 | active->wlap_bssid_addr)); | 3689 | (staging->wlap_bssid_addr, active->wlap_bssid_addr)); |
3672 | CHK_NEQ(staging->dev_type, active->dev_type); | 3690 | CHK_NEQ(staging->dev_type, active->dev_type); |
3673 | CHK_NEQ(staging->channel, active->channel); | 3691 | CHK_NEQ(staging->channel, active->channel); |
3674 | CHK_NEQ(staging->air_propagation, active->air_propagation); | 3692 | CHK_NEQ(staging->air_propagation, active->air_propagation); |
@@ -3695,10 +3713,11 @@ int il_full_rxon_required(struct il_priv *il, | |||
3695 | 3713 | ||
3696 | return 0; | 3714 | return 0; |
3697 | } | 3715 | } |
3716 | |||
3698 | EXPORT_SYMBOL(il_full_rxon_required); | 3717 | EXPORT_SYMBOL(il_full_rxon_required); |
3699 | 3718 | ||
3700 | u8 il_get_lowest_plcp(struct il_priv *il, | 3719 | u8 |
3701 | struct il_rxon_context *ctx) | 3720 | il_get_lowest_plcp(struct il_priv * il, struct il_rxon_context * ctx) |
3702 | { | 3721 | { |
3703 | /* | 3722 | /* |
3704 | * Assign the lowest rate -- should really get this from | 3723 | * Assign the lowest rate -- should really get this from |
@@ -3709,44 +3728,43 @@ u8 il_get_lowest_plcp(struct il_priv *il, | |||
3709 | else | 3728 | else |
3710 | return RATE_6M_PLCP; | 3729 | return RATE_6M_PLCP; |
3711 | } | 3730 | } |
3731 | |||
3712 | EXPORT_SYMBOL(il_get_lowest_plcp); | 3732 | EXPORT_SYMBOL(il_get_lowest_plcp); |
3713 | 3733 | ||
3714 | static void _il_set_rxon_ht(struct il_priv *il, | 3734 | static void |
3715 | struct il_ht_config *ht_conf, | 3735 | _il_set_rxon_ht(struct il_priv *il, struct il_ht_config *ht_conf, |
3716 | struct il_rxon_context *ctx) | 3736 | struct il_rxon_context *ctx) |
3717 | { | 3737 | { |
3718 | struct il_rxon_cmd *rxon = &ctx->staging; | 3738 | struct il_rxon_cmd *rxon = &ctx->staging; |
3719 | 3739 | ||
3720 | if (!ctx->ht.enabled) { | 3740 | if (!ctx->ht.enabled) { |
3721 | rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK | | 3741 | rxon->flags &= |
3722 | RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK | | 3742 | ~(RXON_FLG_CHANNEL_MODE_MSK | |
3723 | RXON_FLG_HT40_PROT_MSK | | 3743 | RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK | RXON_FLG_HT40_PROT_MSK |
3724 | RXON_FLG_HT_PROT_MSK); | 3744 | | RXON_FLG_HT_PROT_MSK); |
3725 | return; | 3745 | return; |
3726 | } | 3746 | } |
3727 | 3747 | ||
3728 | rxon->flags |= cpu_to_le32(ctx->ht.protection << | 3748 | rxon->flags |= |
3729 | RXON_FLG_HT_OPERATING_MODE_POS); | 3749 | cpu_to_le32(ctx->ht.protection << RXON_FLG_HT_OPERATING_MODE_POS); |
3730 | 3750 | ||
3731 | /* Set up channel bandwidth: | 3751 | /* Set up channel bandwidth: |
3732 | * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */ | 3752 | * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */ |
3733 | /* clear the HT channel mode before set the mode */ | 3753 | /* clear the HT channel mode before set the mode */ |
3734 | rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK | | 3754 | rxon->flags &= |
3735 | RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK); | 3755 | ~(RXON_FLG_CHANNEL_MODE_MSK | RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK); |
3736 | if (il_is_ht40_tx_allowed(il, ctx, NULL)) { | 3756 | if (il_is_ht40_tx_allowed(il, ctx, NULL)) { |
3737 | /* pure ht40 */ | 3757 | /* pure ht40 */ |
3738 | if (ctx->ht.protection == | 3758 | if (ctx->ht.protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) { |
3739 | IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) { | ||
3740 | rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40; | 3759 | rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40; |
3741 | /* Note: control channel is opposite of extension channel */ | 3760 | /* Note: control channel is opposite of extension channel */ |
3742 | switch (ctx->ht.extension_chan_offset) { | 3761 | switch (ctx->ht.extension_chan_offset) { |
3743 | case IEEE80211_HT_PARAM_CHA_SEC_ABOVE: | 3762 | case IEEE80211_HT_PARAM_CHA_SEC_ABOVE: |
3744 | rxon->flags &= | 3763 | rxon->flags &= |
3745 | ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK; | 3764 | ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK; |
3746 | break; | 3765 | break; |
3747 | case IEEE80211_HT_PARAM_CHA_SEC_BELOW: | 3766 | case IEEE80211_HT_PARAM_CHA_SEC_BELOW: |
3748 | rxon->flags |= | 3767 | rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK; |
3749 | RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK; | ||
3750 | break; | 3768 | break; |
3751 | } | 3769 | } |
3752 | } else { | 3770 | } else { |
@@ -3754,19 +3772,17 @@ static void _il_set_rxon_ht(struct il_priv *il, | |||
3754 | switch (ctx->ht.extension_chan_offset) { | 3772 | switch (ctx->ht.extension_chan_offset) { |
3755 | case IEEE80211_HT_PARAM_CHA_SEC_ABOVE: | 3773 | case IEEE80211_HT_PARAM_CHA_SEC_ABOVE: |
3756 | rxon->flags &= | 3774 | rxon->flags &= |
3757 | ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK); | 3775 | ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK); |
3758 | rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED; | 3776 | rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED; |
3759 | break; | 3777 | break; |
3760 | case IEEE80211_HT_PARAM_CHA_SEC_BELOW: | 3778 | case IEEE80211_HT_PARAM_CHA_SEC_BELOW: |
3761 | rxon->flags |= | 3779 | rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK; |
3762 | RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK; | ||
3763 | rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED; | 3780 | rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED; |
3764 | break; | 3781 | break; |
3765 | case IEEE80211_HT_PARAM_CHA_SEC_NONE: | 3782 | case IEEE80211_HT_PARAM_CHA_SEC_NONE: |
3766 | default: | 3783 | default: |
3767 | /* channel location only valid if in Mixed mode */ | 3784 | /* channel location only valid if in Mixed mode */ |
3768 | IL_ERR( | 3785 | IL_ERR("invalid extension channel offset\n"); |
3769 | "invalid extension channel offset\n"); | ||
3770 | break; | 3786 | break; |
3771 | } | 3787 | } |
3772 | } | 3788 | } |
@@ -3778,20 +3794,21 @@ static void _il_set_rxon_ht(struct il_priv *il, | |||
3778 | il->cfg->ops->hcmd->set_rxon_chain(il, ctx); | 3794 | il->cfg->ops->hcmd->set_rxon_chain(il, ctx); |
3779 | 3795 | ||
3780 | D_ASSOC("rxon flags 0x%X operation mode :0x%X " | 3796 | D_ASSOC("rxon flags 0x%X operation mode :0x%X " |
3781 | "extension channel offset 0x%x\n", | 3797 | "extension channel offset 0x%x\n", le32_to_cpu(rxon->flags), |
3782 | le32_to_cpu(rxon->flags), ctx->ht.protection, | 3798 | ctx->ht.protection, ctx->ht.extension_chan_offset); |
3783 | ctx->ht.extension_chan_offset); | ||
3784 | } | 3799 | } |
3785 | 3800 | ||
3786 | void il_set_rxon_ht(struct il_priv *il, struct il_ht_config *ht_conf) | 3801 | void |
3802 | il_set_rxon_ht(struct il_priv *il, struct il_ht_config *ht_conf) | ||
3787 | { | 3803 | { |
3788 | _il_set_rxon_ht(il, ht_conf, &il->ctx); | 3804 | _il_set_rxon_ht(il, ht_conf, &il->ctx); |
3789 | } | 3805 | } |
3806 | |||
3790 | EXPORT_SYMBOL(il_set_rxon_ht); | 3807 | EXPORT_SYMBOL(il_set_rxon_ht); |
3791 | 3808 | ||
3792 | /* Return valid, unused, channel for a passive scan to reset the RF */ | 3809 | /* Return valid, unused, channel for a passive scan to reset the RF */ |
3793 | u8 il_get_single_channel_number(struct il_priv *il, | 3810 | u8 |
3794 | enum ieee80211_band band) | 3811 | il_get_single_channel_number(struct il_priv *il, enum ieee80211_band band) |
3795 | { | 3812 | { |
3796 | const struct il_channel_info *ch_info; | 3813 | const struct il_channel_info *ch_info; |
3797 | int i; | 3814 | int i; |
@@ -3818,6 +3835,7 @@ u8 il_get_single_channel_number(struct il_priv *il, | |||
3818 | 3835 | ||
3819 | return channel; | 3836 | return channel; |
3820 | } | 3837 | } |
3838 | |||
3821 | EXPORT_SYMBOL(il_get_single_channel_number); | 3839 | EXPORT_SYMBOL(il_get_single_channel_number); |
3822 | 3840 | ||
3823 | /** | 3841 | /** |
@@ -3829,7 +3847,7 @@ EXPORT_SYMBOL(il_get_single_channel_number); | |||
3829 | */ | 3847 | */ |
3830 | int | 3848 | int |
3831 | il_set_rxon_channel(struct il_priv *il, struct ieee80211_channel *ch, | 3849 | il_set_rxon_channel(struct il_priv *il, struct ieee80211_channel *ch, |
3832 | struct il_rxon_context *ctx) | 3850 | struct il_rxon_context *ctx) |
3833 | { | 3851 | { |
3834 | enum ieee80211_band band = ch->band; | 3852 | enum ieee80211_band band = ch->band; |
3835 | u16 channel = ch->hw_value; | 3853 | u16 channel = ch->hw_value; |
@@ -3849,17 +3867,17 @@ il_set_rxon_channel(struct il_priv *il, struct ieee80211_channel *ch, | |||
3849 | 3867 | ||
3850 | return 0; | 3868 | return 0; |
3851 | } | 3869 | } |
3870 | |||
3852 | EXPORT_SYMBOL(il_set_rxon_channel); | 3871 | EXPORT_SYMBOL(il_set_rxon_channel); |
3853 | 3872 | ||
3854 | void il_set_flags_for_band(struct il_priv *il, | 3873 | void |
3855 | struct il_rxon_context *ctx, | 3874 | il_set_flags_for_band(struct il_priv *il, struct il_rxon_context *ctx, |
3856 | enum ieee80211_band band, | 3875 | enum ieee80211_band band, struct ieee80211_vif *vif) |
3857 | struct ieee80211_vif *vif) | ||
3858 | { | 3876 | { |
3859 | if (band == IEEE80211_BAND_5GHZ) { | 3877 | if (band == IEEE80211_BAND_5GHZ) { |
3860 | ctx->staging.flags &= | 3878 | ctx->staging.flags &= |
3861 | ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK | 3879 | ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK | |
3862 | | RXON_FLG_CCK_MSK); | 3880 | RXON_FLG_CCK_MSK); |
3863 | ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK; | 3881 | ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK; |
3864 | } else { | 3882 | } else { |
3865 | /* Copied from il_post_associate() */ | 3883 | /* Copied from il_post_associate() */ |
@@ -3873,13 +3891,14 @@ void il_set_flags_for_band(struct il_priv *il, | |||
3873 | ctx->staging.flags &= ~RXON_FLG_CCK_MSK; | 3891 | ctx->staging.flags &= ~RXON_FLG_CCK_MSK; |
3874 | } | 3892 | } |
3875 | } | 3893 | } |
3894 | |||
3876 | EXPORT_SYMBOL(il_set_flags_for_band); | 3895 | EXPORT_SYMBOL(il_set_flags_for_band); |
3877 | 3896 | ||
3878 | /* | 3897 | /* |
3879 | * initialize rxon structure with default values from eeprom | 3898 | * initialize rxon structure with default values from eeprom |
3880 | */ | 3899 | */ |
3881 | void il_connection_init_rx_config(struct il_priv *il, | 3900 | void |
3882 | struct il_rxon_context *ctx) | 3901 | il_connection_init_rx_config(struct il_priv *il, struct il_rxon_context *ctx) |
3883 | { | 3902 | { |
3884 | const struct il_channel_info *ch_info; | 3903 | const struct il_channel_info *ch_info; |
3885 | 3904 | ||
@@ -3888,25 +3907,26 @@ void il_connection_init_rx_config(struct il_priv *il, | |||
3888 | if (!ctx->vif) { | 3907 | if (!ctx->vif) { |
3889 | ctx->staging.dev_type = ctx->unused_devtype; | 3908 | ctx->staging.dev_type = ctx->unused_devtype; |
3890 | } else | 3909 | } else |
3891 | switch (ctx->vif->type) { | 3910 | switch (ctx->vif->type) { |
3892 | 3911 | ||
3893 | case NL80211_IFTYPE_STATION: | 3912 | case NL80211_IFTYPE_STATION: |
3894 | ctx->staging.dev_type = ctx->station_devtype; | 3913 | ctx->staging.dev_type = ctx->station_devtype; |
3895 | ctx->staging.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK; | 3914 | ctx->staging.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK; |
3896 | break; | 3915 | break; |
3897 | 3916 | ||
3898 | case NL80211_IFTYPE_ADHOC: | 3917 | case NL80211_IFTYPE_ADHOC: |
3899 | ctx->staging.dev_type = ctx->ibss_devtype; | 3918 | ctx->staging.dev_type = ctx->ibss_devtype; |
3900 | ctx->staging.flags = RXON_FLG_SHORT_PREAMBLE_MSK; | 3919 | ctx->staging.flags = RXON_FLG_SHORT_PREAMBLE_MSK; |
3901 | ctx->staging.filter_flags = RXON_FILTER_BCON_AWARE_MSK | | 3920 | ctx->staging.filter_flags = |
3902 | RXON_FILTER_ACCEPT_GRP_MSK; | 3921 | RXON_FILTER_BCON_AWARE_MSK | |
3903 | break; | 3922 | RXON_FILTER_ACCEPT_GRP_MSK; |
3923 | break; | ||
3904 | 3924 | ||
3905 | default: | 3925 | default: |
3906 | IL_ERR("Unsupported interface type %d\n", | 3926 | IL_ERR("Unsupported interface type %d\n", |
3907 | ctx->vif->type); | 3927 | ctx->vif->type); |
3908 | break; | 3928 | break; |
3909 | } | 3929 | } |
3910 | 3930 | ||
3911 | #if 0 | 3931 | #if 0 |
3912 | /* TODO: Figure out when short_preamble would be set and cache from | 3932 | /* TODO: Figure out when short_preamble would be set and cache from |
@@ -3917,8 +3937,8 @@ void il_connection_init_rx_config(struct il_priv *il, | |||
3917 | ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; | 3937 | ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; |
3918 | #endif | 3938 | #endif |
3919 | 3939 | ||
3920 | ch_info = il_get_channel_info(il, il->band, | 3940 | ch_info = |
3921 | le16_to_cpu(ctx->active.channel)); | 3941 | il_get_channel_info(il, il->band, le16_to_cpu(ctx->active.channel)); |
3922 | 3942 | ||
3923 | if (!ch_info) | 3943 | if (!ch_info) |
3924 | ch_info = &il->channel_info[0]; | 3944 | ch_info = &il->channel_info[0]; |
@@ -3934,17 +3954,19 @@ void il_connection_init_rx_config(struct il_priv *il, | |||
3934 | (IL_CCK_RATES_MASK >> IL_FIRST_CCK_RATE) & 0xF; | 3954 | (IL_CCK_RATES_MASK >> IL_FIRST_CCK_RATE) & 0xF; |
3935 | 3955 | ||
3936 | /* clear both MIX and PURE40 mode flag */ | 3956 | /* clear both MIX and PURE40 mode flag */ |
3937 | ctx->staging.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED | | 3957 | ctx->staging.flags &= |
3938 | RXON_FLG_CHANNEL_MODE_PURE_40); | 3958 | ~(RXON_FLG_CHANNEL_MODE_MIXED | RXON_FLG_CHANNEL_MODE_PURE_40); |
3939 | if (ctx->vif) | 3959 | if (ctx->vif) |
3940 | memcpy(ctx->staging.node_addr, ctx->vif->addr, ETH_ALEN); | 3960 | memcpy(ctx->staging.node_addr, ctx->vif->addr, ETH_ALEN); |
3941 | 3961 | ||
3942 | ctx->staging.ofdm_ht_single_stream_basic_rates = 0xff; | 3962 | ctx->staging.ofdm_ht_single_stream_basic_rates = 0xff; |
3943 | ctx->staging.ofdm_ht_dual_stream_basic_rates = 0xff; | 3963 | ctx->staging.ofdm_ht_dual_stream_basic_rates = 0xff; |
3944 | } | 3964 | } |
3965 | |||
3945 | EXPORT_SYMBOL(il_connection_init_rx_config); | 3966 | EXPORT_SYMBOL(il_connection_init_rx_config); |
3946 | 3967 | ||
3947 | void il_set_rate(struct il_priv *il) | 3968 | void |
3969 | il_set_rate(struct il_priv *il) | ||
3948 | { | 3970 | { |
3949 | const struct ieee80211_supported_band *hw = NULL; | 3971 | const struct ieee80211_supported_band *hw = NULL; |
3950 | struct ieee80211_rate *rate; | 3972 | struct ieee80211_rate *rate; |
@@ -3967,14 +3989,16 @@ void il_set_rate(struct il_priv *il) | |||
3967 | D_RATE("Set active_rate = %0x\n", il->active_rate); | 3989 | D_RATE("Set active_rate = %0x\n", il->active_rate); |
3968 | 3990 | ||
3969 | il->ctx.staging.cck_basic_rates = | 3991 | il->ctx.staging.cck_basic_rates = |
3970 | (IL_CCK_BASIC_RATES_MASK >> IL_FIRST_CCK_RATE) & 0xF; | 3992 | (IL_CCK_BASIC_RATES_MASK >> IL_FIRST_CCK_RATE) & 0xF; |
3971 | 3993 | ||
3972 | il->ctx.staging.ofdm_basic_rates = | 3994 | il->ctx.staging.ofdm_basic_rates = |
3973 | (IL_OFDM_BASIC_RATES_MASK >> IL_FIRST_OFDM_RATE) & 0xFF; | 3995 | (IL_OFDM_BASIC_RATES_MASK >> IL_FIRST_OFDM_RATE) & 0xFF; |
3974 | } | 3996 | } |
3997 | |||
3975 | EXPORT_SYMBOL(il_set_rate); | 3998 | EXPORT_SYMBOL(il_set_rate); |
3976 | 3999 | ||
3977 | void il_chswitch_done(struct il_priv *il, bool is_success) | 4000 | void |
4001 | il_chswitch_done(struct il_priv *il, bool is_success) | ||
3978 | { | 4002 | { |
3979 | struct il_rxon_context *ctx = &il->ctx; | 4003 | struct il_rxon_context *ctx = &il->ctx; |
3980 | 4004 | ||
@@ -3984,9 +4008,11 @@ void il_chswitch_done(struct il_priv *il, bool is_success) | |||
3984 | if (test_and_clear_bit(S_CHANNEL_SWITCH_PENDING, &il->status)) | 4008 | if (test_and_clear_bit(S_CHANNEL_SWITCH_PENDING, &il->status)) |
3985 | ieee80211_chswitch_done(ctx->vif, is_success); | 4009 | ieee80211_chswitch_done(ctx->vif, is_success); |
3986 | } | 4010 | } |
4011 | |||
3987 | EXPORT_SYMBOL(il_chswitch_done); | 4012 | EXPORT_SYMBOL(il_chswitch_done); |
3988 | 4013 | ||
3989 | void il_hdl_csa(struct il_priv *il, struct il_rx_buf *rxb) | 4014 | void |
4015 | il_hdl_csa(struct il_priv *il, struct il_rx_buf *rxb) | ||
3990 | { | 4016 | { |
3991 | struct il_rx_pkt *pkt = rxb_addr(rxb); | 4017 | struct il_rx_pkt *pkt = rxb_addr(rxb); |
3992 | struct il_csa_notification *csa = &(pkt->u.csa_notif); | 4018 | struct il_csa_notification *csa = &(pkt->u.csa_notif); |
@@ -4000,46 +4026,43 @@ void il_hdl_csa(struct il_priv *il, struct il_rx_buf *rxb) | |||
4000 | if (!le32_to_cpu(csa->status) && csa->channel == il->switch_channel) { | 4026 | if (!le32_to_cpu(csa->status) && csa->channel == il->switch_channel) { |
4001 | rxon->channel = csa->channel; | 4027 | rxon->channel = csa->channel; |
4002 | ctx->staging.channel = csa->channel; | 4028 | ctx->staging.channel = csa->channel; |
4003 | D_11H("CSA notif: channel %d\n", | 4029 | D_11H("CSA notif: channel %d\n", le16_to_cpu(csa->channel)); |
4004 | le16_to_cpu(csa->channel)); | ||
4005 | il_chswitch_done(il, true); | 4030 | il_chswitch_done(il, true); |
4006 | } else { | 4031 | } else { |
4007 | IL_ERR("CSA notif (fail) : channel %d\n", | 4032 | IL_ERR("CSA notif (fail) : channel %d\n", |
4008 | le16_to_cpu(csa->channel)); | 4033 | le16_to_cpu(csa->channel)); |
4009 | il_chswitch_done(il, false); | 4034 | il_chswitch_done(il, false); |
4010 | } | 4035 | } |
4011 | } | 4036 | } |
4037 | |||
4012 | EXPORT_SYMBOL(il_hdl_csa); | 4038 | EXPORT_SYMBOL(il_hdl_csa); |
4013 | 4039 | ||
4014 | #ifdef CONFIG_IWLEGACY_DEBUG | 4040 | #ifdef CONFIG_IWLEGACY_DEBUG |
4015 | void il_print_rx_config_cmd(struct il_priv *il, | 4041 | void |
4016 | struct il_rxon_context *ctx) | 4042 | il_print_rx_config_cmd(struct il_priv *il, struct il_rxon_context *ctx) |
4017 | { | 4043 | { |
4018 | struct il_rxon_cmd *rxon = &ctx->staging; | 4044 | struct il_rxon_cmd *rxon = &ctx->staging; |
4019 | 4045 | ||
4020 | D_RADIO("RX CONFIG:\n"); | 4046 | D_RADIO("RX CONFIG:\n"); |
4021 | il_print_hex_dump(il, IL_DL_RADIO, (u8 *) rxon, sizeof(*rxon)); | 4047 | il_print_hex_dump(il, IL_DL_RADIO, (u8 *) rxon, sizeof(*rxon)); |
4022 | D_RADIO("u16 channel: 0x%x\n", | 4048 | D_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel)); |
4023 | le16_to_cpu(rxon->channel)); | ||
4024 | D_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags)); | 4049 | D_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags)); |
4025 | D_RADIO("u32 filter_flags: 0x%08x\n", | 4050 | D_RADIO("u32 filter_flags: 0x%08x\n", le32_to_cpu(rxon->filter_flags)); |
4026 | le32_to_cpu(rxon->filter_flags)); | ||
4027 | D_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type); | 4051 | D_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type); |
4028 | D_RADIO("u8 ofdm_basic_rates: 0x%02x\n", | 4052 | D_RADIO("u8 ofdm_basic_rates: 0x%02x\n", rxon->ofdm_basic_rates); |
4029 | rxon->ofdm_basic_rates); | 4053 | D_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates); |
4030 | D_RADIO("u8 cck_basic_rates: 0x%02x\n", | ||
4031 | rxon->cck_basic_rates); | ||
4032 | D_RADIO("u8[6] node_addr: %pM\n", rxon->node_addr); | 4054 | D_RADIO("u8[6] node_addr: %pM\n", rxon->node_addr); |
4033 | D_RADIO("u8[6] bssid_addr: %pM\n", rxon->bssid_addr); | 4055 | D_RADIO("u8[6] bssid_addr: %pM\n", rxon->bssid_addr); |
4034 | D_RADIO("u16 assoc_id: 0x%x\n", | 4056 | D_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id)); |
4035 | le16_to_cpu(rxon->assoc_id)); | ||
4036 | } | 4057 | } |
4058 | |||
4037 | EXPORT_SYMBOL(il_print_rx_config_cmd); | 4059 | EXPORT_SYMBOL(il_print_rx_config_cmd); |
4038 | #endif | 4060 | #endif |
4039 | /** | 4061 | /** |
4040 | * il_irq_handle_error - called for HW or SW error interrupt from card | 4062 | * il_irq_handle_error - called for HW or SW error interrupt from card |
4041 | */ | 4063 | */ |
4042 | void il_irq_handle_error(struct il_priv *il) | 4064 | void |
4065 | il_irq_handle_error(struct il_priv *il) | ||
4043 | { | 4066 | { |
4044 | /* Set the FW error flag -- cleared on il_down */ | 4067 | /* Set the FW error flag -- cleared on il_down */ |
4045 | set_bit(S_FW_ERROR, &il->status); | 4068 | set_bit(S_FW_ERROR, &il->status); |
@@ -4047,16 +4070,14 @@ void il_irq_handle_error(struct il_priv *il) | |||
4047 | /* Cancel currently queued command. */ | 4070 | /* Cancel currently queued command. */ |
4048 | clear_bit(S_HCMD_ACTIVE, &il->status); | 4071 | clear_bit(S_HCMD_ACTIVE, &il->status); |
4049 | 4072 | ||
4050 | IL_ERR("Loaded firmware version: %s\n", | 4073 | IL_ERR("Loaded firmware version: %s\n", il->hw->wiphy->fw_version); |
4051 | il->hw->wiphy->fw_version); | ||
4052 | 4074 | ||
4053 | il->cfg->ops->lib->dump_nic_error_log(il); | 4075 | il->cfg->ops->lib->dump_nic_error_log(il); |
4054 | if (il->cfg->ops->lib->dump_fh) | 4076 | if (il->cfg->ops->lib->dump_fh) |
4055 | il->cfg->ops->lib->dump_fh(il, NULL, false); | 4077 | il->cfg->ops->lib->dump_fh(il, NULL, false); |
4056 | #ifdef CONFIG_IWLEGACY_DEBUG | 4078 | #ifdef CONFIG_IWLEGACY_DEBUG |
4057 | if (il_get_debug_level(il) & IL_DL_FW_ERRORS) | 4079 | if (il_get_debug_level(il) & IL_DL_FW_ERRORS) |
4058 | il_print_rx_config_cmd(il, | 4080 | il_print_rx_config_cmd(il, &il->ctx); |
4059 | &il->ctx); | ||
4060 | #endif | 4081 | #endif |
4061 | 4082 | ||
4062 | wake_up(&il->wait_command_queue); | 4083 | wake_up(&il->wait_command_queue); |
@@ -4067,23 +4088,26 @@ void il_irq_handle_error(struct il_priv *il) | |||
4067 | 4088 | ||
4068 | if (!test_bit(S_EXIT_PENDING, &il->status)) { | 4089 | if (!test_bit(S_EXIT_PENDING, &il->status)) { |
4069 | IL_DBG(IL_DL_FW_ERRORS, | 4090 | IL_DBG(IL_DL_FW_ERRORS, |
4070 | "Restarting adapter due to uCode error.\n"); | 4091 | "Restarting adapter due to uCode error.\n"); |
4071 | 4092 | ||
4072 | if (il->cfg->mod_params->restart_fw) | 4093 | if (il->cfg->mod_params->restart_fw) |
4073 | queue_work(il->workqueue, &il->restart); | 4094 | queue_work(il->workqueue, &il->restart); |
4074 | } | 4095 | } |
4075 | } | 4096 | } |
4097 | |||
4076 | EXPORT_SYMBOL(il_irq_handle_error); | 4098 | EXPORT_SYMBOL(il_irq_handle_error); |
4077 | 4099 | ||
4078 | static int il_apm_stop_master(struct il_priv *il) | 4100 | static int |
4101 | il_apm_stop_master(struct il_priv *il) | ||
4079 | { | 4102 | { |
4080 | int ret = 0; | 4103 | int ret = 0; |
4081 | 4104 | ||
4082 | /* stop device's busmaster DMA activity */ | 4105 | /* stop device's busmaster DMA activity */ |
4083 | il_set_bit(il, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER); | 4106 | il_set_bit(il, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER); |
4084 | 4107 | ||
4085 | ret = _il_poll_bit(il, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED, | 4108 | ret = |
4086 | CSR_RESET_REG_FLAG_MASTER_DISABLED, 100); | 4109 | _il_poll_bit(il, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED, |
4110 | CSR_RESET_REG_FLAG_MASTER_DISABLED, 100); | ||
4087 | if (ret) | 4111 | if (ret) |
4088 | IL_WARN("Master Disable Timed Out, 100 usec\n"); | 4112 | IL_WARN("Master Disable Timed Out, 100 usec\n"); |
4089 | 4113 | ||
@@ -4092,7 +4116,8 @@ static int il_apm_stop_master(struct il_priv *il) | |||
4092 | return ret; | 4116 | return ret; |
4093 | } | 4117 | } |
4094 | 4118 | ||
4095 | void il_apm_stop(struct il_priv *il) | 4119 | void |
4120 | il_apm_stop(struct il_priv *il) | ||
4096 | { | 4121 | { |
4097 | D_INFO("Stop card, put in low power state\n"); | 4122 | D_INFO("Stop card, put in low power state\n"); |
4098 | 4123 | ||
@@ -4108,18 +4133,18 @@ void il_apm_stop(struct il_priv *il) | |||
4108 | * Clear "initialization complete" bit to move adapter from | 4133 | * Clear "initialization complete" bit to move adapter from |
4109 | * D0A* (powered-up Active) --> D0U* (Uninitialized) state. | 4134 | * D0A* (powered-up Active) --> D0U* (Uninitialized) state. |
4110 | */ | 4135 | */ |
4111 | il_clear_bit(il, CSR_GP_CNTRL, | 4136 | il_clear_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE); |
4112 | CSR_GP_CNTRL_REG_FLAG_INIT_DONE); | ||
4113 | } | 4137 | } |
4114 | EXPORT_SYMBOL(il_apm_stop); | ||
4115 | 4138 | ||
4139 | EXPORT_SYMBOL(il_apm_stop); | ||
4116 | 4140 | ||
4117 | /* | 4141 | /* |
4118 | * Start up NIC's basic functionality after it has been reset | 4142 | * Start up NIC's basic functionality after it has been reset |
4119 | * (e.g. after platform boot, or shutdown via il_apm_stop()) | 4143 | * (e.g. after platform boot, or shutdown via il_apm_stop()) |
4120 | * NOTE: This does not load uCode nor start the embedded processor | 4144 | * NOTE: This does not load uCode nor start the embedded processor |
4121 | */ | 4145 | */ |
4122 | int il_apm_init(struct il_priv *il) | 4146 | int |
4147 | il_apm_init(struct il_priv *il) | ||
4123 | { | 4148 | { |
4124 | int ret = 0; | 4149 | int ret = 0; |
4125 | u16 lctl; | 4150 | u16 lctl; |
@@ -4133,18 +4158,17 @@ int il_apm_init(struct il_priv *il) | |||
4133 | 4158 | ||
4134 | /* Disable L0S exit timer (platform NMI Work/Around) */ | 4159 | /* Disable L0S exit timer (platform NMI Work/Around) */ |
4135 | il_set_bit(il, CSR_GIO_CHICKEN_BITS, | 4160 | il_set_bit(il, CSR_GIO_CHICKEN_BITS, |
4136 | CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER); | 4161 | CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER); |
4137 | 4162 | ||
4138 | /* | 4163 | /* |
4139 | * Disable L0s without affecting L1; | 4164 | * Disable L0s without affecting L1; |
4140 | * don't wait for ICH L0s (ICH bug W/A) | 4165 | * don't wait for ICH L0s (ICH bug W/A) |
4141 | */ | 4166 | */ |
4142 | il_set_bit(il, CSR_GIO_CHICKEN_BITS, | 4167 | il_set_bit(il, CSR_GIO_CHICKEN_BITS, |
4143 | CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX); | 4168 | CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX); |
4144 | 4169 | ||
4145 | /* Set FH wait threshold to maximum (HW error during stress W/A) */ | 4170 | /* Set FH wait threshold to maximum (HW error during stress W/A) */ |
4146 | il_set_bit(il, CSR_DBG_HPET_MEM_REG, | 4171 | il_set_bit(il, CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL); |
4147 | CSR_DBG_HPET_MEM_REG_VAL); | ||
4148 | 4172 | ||
4149 | /* | 4173 | /* |
4150 | * Enable HAP INTA (interrupt from management bus) to | 4174 | * Enable HAP INTA (interrupt from management bus) to |
@@ -4152,7 +4176,7 @@ int il_apm_init(struct il_priv *il) | |||
4152 | * NOTE: This is no-op for 3945 (non-existent bit) | 4176 | * NOTE: This is no-op for 3945 (non-existent bit) |
4153 | */ | 4177 | */ |
4154 | il_set_bit(il, CSR_HW_IF_CONFIG_REG, | 4178 | il_set_bit(il, CSR_HW_IF_CONFIG_REG, |
4155 | CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A); | 4179 | CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A); |
4156 | 4180 | ||
4157 | /* | 4181 | /* |
4158 | * HW bug W/A for instability in PCIe bus L0->L0S->L1 transition. | 4182 | * HW bug W/A for instability in PCIe bus L0->L0S->L1 transition. |
@@ -4165,15 +4189,15 @@ int il_apm_init(struct il_priv *il) | |||
4165 | if (il->cfg->base_params->set_l0s) { | 4189 | if (il->cfg->base_params->set_l0s) { |
4166 | lctl = il_pcie_link_ctl(il); | 4190 | lctl = il_pcie_link_ctl(il); |
4167 | if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) == | 4191 | if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) == |
4168 | PCI_CFG_LINK_CTRL_VAL_L1_EN) { | 4192 | PCI_CFG_LINK_CTRL_VAL_L1_EN) { |
4169 | /* L1-ASPM enabled; disable(!) L0S */ | 4193 | /* L1-ASPM enabled; disable(!) L0S */ |
4170 | il_set_bit(il, CSR_GIO_REG, | 4194 | il_set_bit(il, CSR_GIO_REG, |
4171 | CSR_GIO_REG_VAL_L0S_ENABLED); | 4195 | CSR_GIO_REG_VAL_L0S_ENABLED); |
4172 | D_POWER("L1 Enabled; Disabling L0S\n"); | 4196 | D_POWER("L1 Enabled; Disabling L0S\n"); |
4173 | } else { | 4197 | } else { |
4174 | /* L1-ASPM disabled; enable(!) L0S */ | 4198 | /* L1-ASPM disabled; enable(!) L0S */ |
4175 | il_clear_bit(il, CSR_GIO_REG, | 4199 | il_clear_bit(il, CSR_GIO_REG, |
4176 | CSR_GIO_REG_VAL_L0S_ENABLED); | 4200 | CSR_GIO_REG_VAL_L0S_ENABLED); |
4177 | D_POWER("L1 Disabled; Enabling L0S\n"); | 4201 | D_POWER("L1 Disabled; Enabling L0S\n"); |
4178 | } | 4202 | } |
4179 | } | 4203 | } |
@@ -4181,7 +4205,7 @@ int il_apm_init(struct il_priv *il) | |||
4181 | /* Configure analog phase-lock-loop before activating to D0A */ | 4205 | /* Configure analog phase-lock-loop before activating to D0A */ |
4182 | if (il->cfg->base_params->pll_cfg_val) | 4206 | if (il->cfg->base_params->pll_cfg_val) |
4183 | il_set_bit(il, CSR_ANA_PLL_CFG, | 4207 | il_set_bit(il, CSR_ANA_PLL_CFG, |
4184 | il->cfg->base_params->pll_cfg_val); | 4208 | il->cfg->base_params->pll_cfg_val); |
4185 | 4209 | ||
4186 | /* | 4210 | /* |
4187 | * Set "initialization complete" bit to move adapter from | 4211 | * Set "initialization complete" bit to move adapter from |
@@ -4194,9 +4218,10 @@ int il_apm_init(struct il_priv *il) | |||
4194 | * device-internal resources is supported, e.g. il_wr_prph() | 4218 | * device-internal resources is supported, e.g. il_wr_prph() |
4195 | * and accesses to uCode SRAM. | 4219 | * and accesses to uCode SRAM. |
4196 | */ | 4220 | */ |
4197 | ret = _il_poll_bit(il, CSR_GP_CNTRL, | 4221 | ret = |
4198 | CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, | 4222 | _il_poll_bit(il, CSR_GP_CNTRL, |
4199 | CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000); | 4223 | CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, |
4224 | CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000); | ||
4200 | if (ret < 0) { | 4225 | if (ret < 0) { |
4201 | D_INFO("Failed to init the card\n"); | 4226 | D_INFO("Failed to init the card\n"); |
4202 | goto out; | 4227 | goto out; |
@@ -4212,23 +4237,23 @@ int il_apm_init(struct il_priv *il) | |||
4212 | */ | 4237 | */ |
4213 | if (il->cfg->base_params->use_bsm) | 4238 | if (il->cfg->base_params->use_bsm) |
4214 | il_wr_prph(il, APMG_CLK_EN_REG, | 4239 | il_wr_prph(il, APMG_CLK_EN_REG, |
4215 | APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT); | 4240 | APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT); |
4216 | else | 4241 | else |
4217 | il_wr_prph(il, APMG_CLK_EN_REG, | 4242 | il_wr_prph(il, APMG_CLK_EN_REG, APMG_CLK_VAL_DMA_CLK_RQT); |
4218 | APMG_CLK_VAL_DMA_CLK_RQT); | ||
4219 | udelay(20); | 4243 | udelay(20); |
4220 | 4244 | ||
4221 | /* Disable L1-Active */ | 4245 | /* Disable L1-Active */ |
4222 | il_set_bits_prph(il, APMG_PCIDEV_STT_REG, | 4246 | il_set_bits_prph(il, APMG_PCIDEV_STT_REG, |
4223 | APMG_PCIDEV_STT_VAL_L1_ACT_DIS); | 4247 | APMG_PCIDEV_STT_VAL_L1_ACT_DIS); |
4224 | 4248 | ||
4225 | out: | 4249 | out: |
4226 | return ret; | 4250 | return ret; |
4227 | } | 4251 | } |
4228 | EXPORT_SYMBOL(il_apm_init); | ||
4229 | 4252 | ||
4253 | EXPORT_SYMBOL(il_apm_init); | ||
4230 | 4254 | ||
4231 | int il_set_tx_power(struct il_priv *il, s8 tx_power, bool force) | 4255 | int |
4256 | il_set_tx_power(struct il_priv *il, s8 tx_power, bool force) | ||
4232 | { | 4257 | { |
4233 | int ret; | 4258 | int ret; |
4234 | s8 prev_tx_power; | 4259 | s8 prev_tx_power; |
@@ -4245,16 +4270,13 @@ int il_set_tx_power(struct il_priv *il, s8 tx_power, bool force) | |||
4245 | 4270 | ||
4246 | /* 0 dBm mean 1 milliwatt */ | 4271 | /* 0 dBm mean 1 milliwatt */ |
4247 | if (tx_power < 0) { | 4272 | if (tx_power < 0) { |
4248 | IL_WARN( | 4273 | IL_WARN("Requested user TXPOWER %d below 1 mW.\n", tx_power); |
4249 | "Requested user TXPOWER %d below 1 mW.\n", | ||
4250 | tx_power); | ||
4251 | return -EINVAL; | 4274 | return -EINVAL; |
4252 | } | 4275 | } |
4253 | 4276 | ||
4254 | if (tx_power > il->tx_power_device_lmt) { | 4277 | if (tx_power > il->tx_power_device_lmt) { |
4255 | IL_WARN( | 4278 | IL_WARN("Requested user TXPOWER %d above upper limit %d.\n", |
4256 | "Requested user TXPOWER %d above upper limit %d.\n", | 4279 | tx_power, il->tx_power_device_lmt); |
4257 | tx_power, il->tx_power_device_lmt); | ||
4258 | return -EINVAL; | 4280 | return -EINVAL; |
4259 | } | 4281 | } |
4260 | 4282 | ||
@@ -4267,7 +4289,7 @@ int il_set_tx_power(struct il_priv *il, s8 tx_power, bool force) | |||
4267 | 4289 | ||
4268 | /* do not set tx power when scanning or channel changing */ | 4290 | /* do not set tx power when scanning or channel changing */ |
4269 | defer = test_bit(S_SCANNING, &il->status) || | 4291 | defer = test_bit(S_SCANNING, &il->status) || |
4270 | memcmp(&ctx->active, &ctx->staging, sizeof(ctx->staging)); | 4292 | memcmp(&ctx->active, &ctx->staging, sizeof(ctx->staging)); |
4271 | if (defer && !force) { | 4293 | if (defer && !force) { |
4272 | D_INFO("Deferring tx power set\n"); | 4294 | D_INFO("Deferring tx power set\n"); |
4273 | return 0; | 4295 | return 0; |
@@ -4285,9 +4307,11 @@ int il_set_tx_power(struct il_priv *il, s8 tx_power, bool force) | |||
4285 | } | 4307 | } |
4286 | return ret; | 4308 | return ret; |
4287 | } | 4309 | } |
4310 | |||
4288 | EXPORT_SYMBOL(il_set_tx_power); | 4311 | EXPORT_SYMBOL(il_set_tx_power); |
4289 | 4312 | ||
4290 | void il_send_bt_config(struct il_priv *il) | 4313 | void |
4314 | il_send_bt_config(struct il_priv *il) | ||
4291 | { | 4315 | { |
4292 | struct il_bt_cmd bt_cmd = { | 4316 | struct il_bt_cmd bt_cmd = { |
4293 | .lead_time = BT_LEAD_TIME_DEF, | 4317 | .lead_time = BT_LEAD_TIME_DEF, |
@@ -4302,34 +4326,31 @@ void il_send_bt_config(struct il_priv *il) | |||
4302 | bt_cmd.flags = BT_COEX_ENABLE; | 4326 | bt_cmd.flags = BT_COEX_ENABLE; |
4303 | 4327 | ||
4304 | D_INFO("BT coex %s\n", | 4328 | D_INFO("BT coex %s\n", |
4305 | (bt_cmd.flags == BT_COEX_DISABLE) ? "disable" : "active"); | 4329 | (bt_cmd.flags == BT_COEX_DISABLE) ? "disable" : "active"); |
4306 | 4330 | ||
4307 | if (il_send_cmd_pdu(il, C_BT_CONFIG, | 4331 | if (il_send_cmd_pdu(il, C_BT_CONFIG, sizeof(struct il_bt_cmd), &bt_cmd)) |
4308 | sizeof(struct il_bt_cmd), &bt_cmd)) | ||
4309 | IL_ERR("failed to send BT Coex Config\n"); | 4332 | IL_ERR("failed to send BT Coex Config\n"); |
4310 | } | 4333 | } |
4311 | EXPORT_SYMBOL(il_send_bt_config); | 4334 | EXPORT_SYMBOL(il_send_bt_config); |
4312 | 4335 | ||
4313 | int il_send_stats_request(struct il_priv *il, u8 flags, bool clear) | 4336 | int |
4337 | il_send_stats_request(struct il_priv *il, u8 flags, bool clear) | ||
4314 | { | 4338 | { |
4315 | struct il_stats_cmd stats_cmd = { | 4339 | struct il_stats_cmd stats_cmd = { |
4316 | .configuration_flags = | 4340 | .configuration_flags = clear ? IL_STATS_CONF_CLEAR_STATS : 0, |
4317 | clear ? IL_STATS_CONF_CLEAR_STATS : 0, | ||
4318 | }; | 4341 | }; |
4319 | 4342 | ||
4320 | if (flags & CMD_ASYNC) | 4343 | if (flags & CMD_ASYNC) |
4321 | return il_send_cmd_pdu_async(il, C_STATS, | 4344 | return il_send_cmd_pdu_async(il, C_STATS, sizeof(struct il_stats_cmd), |
4322 | sizeof(struct il_stats_cmd), | 4345 | &stats_cmd, NULL); |
4323 | &stats_cmd, NULL); | ||
4324 | else | 4346 | else |
4325 | return il_send_cmd_pdu(il, C_STATS, | 4347 | return il_send_cmd_pdu(il, C_STATS, sizeof(struct il_stats_cmd), |
4326 | sizeof(struct il_stats_cmd), | 4348 | &stats_cmd); |
4327 | &stats_cmd); | ||
4328 | } | 4349 | } |
4329 | EXPORT_SYMBOL(il_send_stats_request); | 4350 | EXPORT_SYMBOL(il_send_stats_request); |
4330 | 4351 | ||
4331 | void il_hdl_pm_sleep(struct il_priv *il, | 4352 | void |
4332 | struct il_rx_buf *rxb) | 4353 | il_hdl_pm_sleep(struct il_priv *il, struct il_rx_buf *rxb) |
4333 | { | 4354 | { |
4334 | #ifdef CONFIG_IWLEGACY_DEBUG | 4355 | #ifdef CONFIG_IWLEGACY_DEBUG |
4335 | struct il_rx_pkt *pkt = rxb_addr(rxb); | 4356 | struct il_rx_pkt *pkt = rxb_addr(rxb); |
@@ -4340,41 +4361,41 @@ void il_hdl_pm_sleep(struct il_priv *il, | |||
4340 | } | 4361 | } |
4341 | EXPORT_SYMBOL(il_hdl_pm_sleep); | 4362 | EXPORT_SYMBOL(il_hdl_pm_sleep); |
4342 | 4363 | ||
4343 | void il_hdl_pm_debug_stats(struct il_priv *il, | 4364 | void |
4344 | struct il_rx_buf *rxb) | 4365 | il_hdl_pm_debug_stats(struct il_priv *il, struct il_rx_buf *rxb) |
4345 | { | 4366 | { |
4346 | struct il_rx_pkt *pkt = rxb_addr(rxb); | 4367 | struct il_rx_pkt *pkt = rxb_addr(rxb); |
4347 | u32 len = le32_to_cpu(pkt->len_n_flags) & IL_RX_FRAME_SIZE_MSK; | 4368 | u32 len = le32_to_cpu(pkt->len_n_flags) & IL_RX_FRAME_SIZE_MSK; |
4348 | D_RADIO("Dumping %d bytes of unhandled " | 4369 | D_RADIO("Dumping %d bytes of unhandled notification for %s:\n", len, |
4349 | "notification for %s:\n", len, | 4370 | il_get_cmd_string(pkt->hdr.cmd)); |
4350 | il_get_cmd_string(pkt->hdr.cmd)); | ||
4351 | il_print_hex_dump(il, IL_DL_RADIO, pkt->u.raw, len); | 4371 | il_print_hex_dump(il, IL_DL_RADIO, pkt->u.raw, len); |
4352 | } | 4372 | } |
4353 | EXPORT_SYMBOL(il_hdl_pm_debug_stats); | 4373 | EXPORT_SYMBOL(il_hdl_pm_debug_stats); |
4354 | 4374 | ||
4355 | void il_hdl_error(struct il_priv *il, | 4375 | void |
4356 | struct il_rx_buf *rxb) | 4376 | il_hdl_error(struct il_priv *il, struct il_rx_buf *rxb) |
4357 | { | 4377 | { |
4358 | struct il_rx_pkt *pkt = rxb_addr(rxb); | 4378 | struct il_rx_pkt *pkt = rxb_addr(rxb); |
4359 | 4379 | ||
4360 | IL_ERR("Error Reply type 0x%08X cmd %s (0x%02X) " | 4380 | IL_ERR("Error Reply type 0x%08X cmd %s (0x%02X) " |
4361 | "seq 0x%04X ser 0x%08X\n", | 4381 | "seq 0x%04X ser 0x%08X\n", |
4362 | le32_to_cpu(pkt->u.err_resp.error_type), | 4382 | le32_to_cpu(pkt->u.err_resp.error_type), |
4363 | il_get_cmd_string(pkt->u.err_resp.cmd_id), | 4383 | il_get_cmd_string(pkt->u.err_resp.cmd_id), |
4364 | pkt->u.err_resp.cmd_id, | 4384 | pkt->u.err_resp.cmd_id, |
4365 | le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num), | 4385 | le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num), |
4366 | le32_to_cpu(pkt->u.err_resp.error_info)); | 4386 | le32_to_cpu(pkt->u.err_resp.error_info)); |
4367 | } | 4387 | } |
4368 | EXPORT_SYMBOL(il_hdl_error); | 4388 | EXPORT_SYMBOL(il_hdl_error); |
4369 | 4389 | ||
4370 | void il_clear_isr_stats(struct il_priv *il) | 4390 | void |
4391 | il_clear_isr_stats(struct il_priv *il) | ||
4371 | { | 4392 | { |
4372 | memset(&il->isr_stats, 0, sizeof(il->isr_stats)); | 4393 | memset(&il->isr_stats, 0, sizeof(il->isr_stats)); |
4373 | } | 4394 | } |
4374 | 4395 | ||
4375 | int il_mac_conf_tx(struct ieee80211_hw *hw, | 4396 | int |
4376 | struct ieee80211_vif *vif, u16 queue, | 4397 | il_mac_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif, u16 queue, |
4377 | const struct ieee80211_tx_queue_params *params) | 4398 | const struct ieee80211_tx_queue_params *params) |
4378 | { | 4399 | { |
4379 | struct il_priv *il = hw->priv; | 4400 | struct il_priv *il = hw->priv; |
4380 | unsigned long flags; | 4401 | unsigned long flags; |
@@ -4397,12 +4418,12 @@ int il_mac_conf_tx(struct ieee80211_hw *hw, | |||
4397 | spin_lock_irqsave(&il->lock, flags); | 4418 | spin_lock_irqsave(&il->lock, flags); |
4398 | 4419 | ||
4399 | il->ctx.qos_data.def_qos_parm.ac[q].cw_min = | 4420 | il->ctx.qos_data.def_qos_parm.ac[q].cw_min = |
4400 | cpu_to_le16(params->cw_min); | 4421 | cpu_to_le16(params->cw_min); |
4401 | il->ctx.qos_data.def_qos_parm.ac[q].cw_max = | 4422 | il->ctx.qos_data.def_qos_parm.ac[q].cw_max = |
4402 | cpu_to_le16(params->cw_max); | 4423 | cpu_to_le16(params->cw_max); |
4403 | il->ctx.qos_data.def_qos_parm.ac[q].aifsn = params->aifs; | 4424 | il->ctx.qos_data.def_qos_parm.ac[q].aifsn = params->aifs; |
4404 | il->ctx.qos_data.def_qos_parm.ac[q].edca_txop = | 4425 | il->ctx.qos_data.def_qos_parm.ac[q].edca_txop = |
4405 | cpu_to_le16((params->txop * 32)); | 4426 | cpu_to_le16((params->txop * 32)); |
4406 | 4427 | ||
4407 | il->ctx.qos_data.def_qos_parm.ac[q].reserved1 = 0; | 4428 | il->ctx.qos_data.def_qos_parm.ac[q].reserved1 = 0; |
4408 | 4429 | ||
@@ -4411,14 +4432,17 @@ int il_mac_conf_tx(struct ieee80211_hw *hw, | |||
4411 | D_MAC80211("leave\n"); | 4432 | D_MAC80211("leave\n"); |
4412 | return 0; | 4433 | return 0; |
4413 | } | 4434 | } |
4435 | |||
4414 | EXPORT_SYMBOL(il_mac_conf_tx); | 4436 | EXPORT_SYMBOL(il_mac_conf_tx); |
4415 | 4437 | ||
4416 | int il_mac_tx_last_beacon(struct ieee80211_hw *hw) | 4438 | int |
4439 | il_mac_tx_last_beacon(struct ieee80211_hw *hw) | ||
4417 | { | 4440 | { |
4418 | struct il_priv *il = hw->priv; | 4441 | struct il_priv *il = hw->priv; |
4419 | 4442 | ||
4420 | return il->ibss_manager == IL_IBSS_MANAGER; | 4443 | return il->ibss_manager == IL_IBSS_MANAGER; |
4421 | } | 4444 | } |
4445 | |||
4422 | EXPORT_SYMBOL_GPL(il_mac_tx_last_beacon); | 4446 | EXPORT_SYMBOL_GPL(il_mac_tx_last_beacon); |
4423 | 4447 | ||
4424 | static int | 4448 | static int |
@@ -4432,8 +4456,8 @@ il_set_mode(struct il_priv *il, struct il_rxon_context *ctx) | |||
4432 | return il_commit_rxon(il, ctx); | 4456 | return il_commit_rxon(il, ctx); |
4433 | } | 4457 | } |
4434 | 4458 | ||
4435 | static int il_setup_interface(struct il_priv *il, | 4459 | static int |
4436 | struct il_rxon_context *ctx) | 4460 | il_setup_interface(struct il_priv *il, struct il_rxon_context *ctx) |
4437 | { | 4461 | { |
4438 | struct ieee80211_vif *vif = ctx->vif; | 4462 | struct ieee80211_vif *vif = ctx->vif; |
4439 | int err; | 4463 | int err; |
@@ -4467,8 +4491,7 @@ il_mac_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif) | |||
4467 | int err; | 4491 | int err; |
4468 | u32 modes; | 4492 | u32 modes; |
4469 | 4493 | ||
4470 | D_MAC80211("enter: type %d, addr %pM\n", | 4494 | D_MAC80211("enter: type %d, addr %pM\n", vif->type, vif->addr); |
4471 | vif->type, vif->addr); | ||
4472 | 4495 | ||
4473 | mutex_lock(&il->mutex); | 4496 | mutex_lock(&il->mutex); |
4474 | 4497 | ||
@@ -4478,7 +4501,6 @@ il_mac_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif) | |||
4478 | goto out; | 4501 | goto out; |
4479 | } | 4502 | } |
4480 | 4503 | ||
4481 | |||
4482 | /* check if busy context is exclusive */ | 4504 | /* check if busy context is exclusive */ |
4483 | if (il->ctx.vif && | 4505 | if (il->ctx.vif && |
4484 | (il->ctx.exclusive_interface_modes & BIT(il->ctx.vif->type))) { | 4506 | (il->ctx.exclusive_interface_modes & BIT(il->ctx.vif->type))) { |
@@ -4501,17 +4523,18 @@ il_mac_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif) | |||
4501 | il->iw_mode = NL80211_IFTYPE_STATION; | 4523 | il->iw_mode = NL80211_IFTYPE_STATION; |
4502 | } | 4524 | } |
4503 | 4525 | ||
4504 | out: | 4526 | out: |
4505 | mutex_unlock(&il->mutex); | 4527 | mutex_unlock(&il->mutex); |
4506 | 4528 | ||
4507 | D_MAC80211("leave\n"); | 4529 | D_MAC80211("leave\n"); |
4508 | return err; | 4530 | return err; |
4509 | } | 4531 | } |
4532 | |||
4510 | EXPORT_SYMBOL(il_mac_add_interface); | 4533 | EXPORT_SYMBOL(il_mac_add_interface); |
4511 | 4534 | ||
4512 | static void il_teardown_interface(struct il_priv *il, | 4535 | static void |
4513 | struct ieee80211_vif *vif, | 4536 | il_teardown_interface(struct il_priv *il, struct ieee80211_vif *vif, |
4514 | bool mode_change) | 4537 | bool mode_change) |
4515 | { | 4538 | { |
4516 | struct il_rxon_context *ctx = il_rxon_ctx_from_vif(vif); | 4539 | struct il_rxon_context *ctx = il_rxon_ctx_from_vif(vif); |
4517 | 4540 | ||
@@ -4529,8 +4552,8 @@ static void il_teardown_interface(struct il_priv *il, | |||
4529 | } | 4552 | } |
4530 | } | 4553 | } |
4531 | 4554 | ||
4532 | void il_mac_remove_interface(struct ieee80211_hw *hw, | 4555 | void |
4533 | struct ieee80211_vif *vif) | 4556 | il_mac_remove_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif) |
4534 | { | 4557 | { |
4535 | struct il_priv *il = hw->priv; | 4558 | struct il_priv *il = hw->priv; |
4536 | struct il_rxon_context *ctx = il_rxon_ctx_from_vif(vif); | 4559 | struct il_rxon_context *ctx = il_rxon_ctx_from_vif(vif); |
@@ -4550,35 +4573,40 @@ void il_mac_remove_interface(struct ieee80211_hw *hw, | |||
4550 | D_MAC80211("leave\n"); | 4573 | D_MAC80211("leave\n"); |
4551 | 4574 | ||
4552 | } | 4575 | } |
4576 | |||
4553 | EXPORT_SYMBOL(il_mac_remove_interface); | 4577 | EXPORT_SYMBOL(il_mac_remove_interface); |
4554 | 4578 | ||
4555 | int il_alloc_txq_mem(struct il_priv *il) | 4579 | int |
4580 | il_alloc_txq_mem(struct il_priv *il) | ||
4556 | { | 4581 | { |
4557 | if (!il->txq) | 4582 | if (!il->txq) |
4558 | il->txq = kzalloc( | 4583 | il->txq = |
4559 | sizeof(struct il_tx_queue) * | 4584 | kzalloc(sizeof(struct il_tx_queue) * |
4560 | il->cfg->base_params->num_of_queues, | 4585 | il->cfg->base_params->num_of_queues, GFP_KERNEL); |
4561 | GFP_KERNEL); | ||
4562 | if (!il->txq) { | 4586 | if (!il->txq) { |
4563 | IL_ERR("Not enough memory for txq\n"); | 4587 | IL_ERR("Not enough memory for txq\n"); |
4564 | return -ENOMEM; | 4588 | return -ENOMEM; |
4565 | } | 4589 | } |
4566 | return 0; | 4590 | return 0; |
4567 | } | 4591 | } |
4592 | |||
4568 | EXPORT_SYMBOL(il_alloc_txq_mem); | 4593 | EXPORT_SYMBOL(il_alloc_txq_mem); |
4569 | 4594 | ||
4570 | void il_txq_mem(struct il_priv *il) | 4595 | void |
4596 | il_txq_mem(struct il_priv *il) | ||
4571 | { | 4597 | { |
4572 | kfree(il->txq); | 4598 | kfree(il->txq); |
4573 | il->txq = NULL; | 4599 | il->txq = NULL; |
4574 | } | 4600 | } |
4601 | |||
4575 | EXPORT_SYMBOL(il_txq_mem); | 4602 | EXPORT_SYMBOL(il_txq_mem); |
4576 | 4603 | ||
4577 | #ifdef CONFIG_IWLEGACY_DEBUGFS | 4604 | #ifdef CONFIG_IWLEGACY_DEBUGFS |
4578 | 4605 | ||
4579 | #define IL_TRAFFIC_DUMP_SIZE (IL_TRAFFIC_ENTRY_SIZE * IL_TRAFFIC_ENTRIES) | 4606 | #define IL_TRAFFIC_DUMP_SIZE (IL_TRAFFIC_ENTRY_SIZE * IL_TRAFFIC_ENTRIES) |
4580 | 4607 | ||
4581 | void il_reset_traffic_log(struct il_priv *il) | 4608 | void |
4609 | il_reset_traffic_log(struct il_priv *il) | ||
4582 | { | 4610 | { |
4583 | il->tx_traffic_idx = 0; | 4611 | il->tx_traffic_idx = 0; |
4584 | il->rx_traffic_idx = 0; | 4612 | il->rx_traffic_idx = 0; |
@@ -4588,22 +4616,21 @@ void il_reset_traffic_log(struct il_priv *il) | |||
4588 | memset(il->rx_traffic, 0, IL_TRAFFIC_DUMP_SIZE); | 4616 | memset(il->rx_traffic, 0, IL_TRAFFIC_DUMP_SIZE); |
4589 | } | 4617 | } |
4590 | 4618 | ||
4591 | int il_alloc_traffic_mem(struct il_priv *il) | 4619 | int |
4620 | il_alloc_traffic_mem(struct il_priv *il) | ||
4592 | { | 4621 | { |
4593 | u32 traffic_size = IL_TRAFFIC_DUMP_SIZE; | 4622 | u32 traffic_size = IL_TRAFFIC_DUMP_SIZE; |
4594 | 4623 | ||
4595 | if (il_debug_level & IL_DL_TX) { | 4624 | if (il_debug_level & IL_DL_TX) { |
4596 | if (!il->tx_traffic) { | 4625 | if (!il->tx_traffic) { |
4597 | il->tx_traffic = | 4626 | il->tx_traffic = kzalloc(traffic_size, GFP_KERNEL); |
4598 | kzalloc(traffic_size, GFP_KERNEL); | ||
4599 | if (!il->tx_traffic) | 4627 | if (!il->tx_traffic) |
4600 | return -ENOMEM; | 4628 | return -ENOMEM; |
4601 | } | 4629 | } |
4602 | } | 4630 | } |
4603 | if (il_debug_level & IL_DL_RX) { | 4631 | if (il_debug_level & IL_DL_RX) { |
4604 | if (!il->rx_traffic) { | 4632 | if (!il->rx_traffic) { |
4605 | il->rx_traffic = | 4633 | il->rx_traffic = kzalloc(traffic_size, GFP_KERNEL); |
4606 | kzalloc(traffic_size, GFP_KERNEL); | ||
4607 | if (!il->rx_traffic) | 4634 | if (!il->rx_traffic) |
4608 | return -ENOMEM; | 4635 | return -ENOMEM; |
4609 | } | 4636 | } |
@@ -4611,9 +4638,11 @@ int il_alloc_traffic_mem(struct il_priv *il) | |||
4611 | il_reset_traffic_log(il); | 4638 | il_reset_traffic_log(il); |
4612 | return 0; | 4639 | return 0; |
4613 | } | 4640 | } |
4641 | |||
4614 | EXPORT_SYMBOL(il_alloc_traffic_mem); | 4642 | EXPORT_SYMBOL(il_alloc_traffic_mem); |
4615 | 4643 | ||
4616 | void il_free_traffic_mem(struct il_priv *il) | 4644 | void |
4645 | il_free_traffic_mem(struct il_priv *il) | ||
4617 | { | 4646 | { |
4618 | kfree(il->tx_traffic); | 4647 | kfree(il->tx_traffic); |
4619 | il->tx_traffic = NULL; | 4648 | il->tx_traffic = NULL; |
@@ -4621,10 +4650,12 @@ void il_free_traffic_mem(struct il_priv *il) | |||
4621 | kfree(il->rx_traffic); | 4650 | kfree(il->rx_traffic); |
4622 | il->rx_traffic = NULL; | 4651 | il->rx_traffic = NULL; |
4623 | } | 4652 | } |
4653 | |||
4624 | EXPORT_SYMBOL(il_free_traffic_mem); | 4654 | EXPORT_SYMBOL(il_free_traffic_mem); |
4625 | 4655 | ||
4626 | void il_dbg_log_tx_data_frame(struct il_priv *il, | 4656 | void |
4627 | u16 length, struct ieee80211_hdr *header) | 4657 | il_dbg_log_tx_data_frame(struct il_priv *il, u16 length, |
4658 | struct ieee80211_hdr *header) | ||
4628 | { | 4659 | { |
4629 | __le16 fc; | 4660 | __le16 fc; |
4630 | u16 len; | 4661 | u16 len; |
@@ -4637,19 +4668,22 @@ void il_dbg_log_tx_data_frame(struct il_priv *il, | |||
4637 | 4668 | ||
4638 | fc = header->frame_control; | 4669 | fc = header->frame_control; |
4639 | if (ieee80211_is_data(fc)) { | 4670 | if (ieee80211_is_data(fc)) { |
4640 | len = (length > IL_TRAFFIC_ENTRY_SIZE) | 4671 | len = |
4641 | ? IL_TRAFFIC_ENTRY_SIZE : length; | 4672 | (length > |
4673 | IL_TRAFFIC_ENTRY_SIZE) ? IL_TRAFFIC_ENTRY_SIZE : length; | ||
4642 | memcpy((il->tx_traffic + | 4674 | memcpy((il->tx_traffic + |
4643 | (il->tx_traffic_idx * IL_TRAFFIC_ENTRY_SIZE)), | 4675 | (il->tx_traffic_idx * IL_TRAFFIC_ENTRY_SIZE)), header, |
4644 | header, len); | 4676 | len); |
4645 | il->tx_traffic_idx = | 4677 | il->tx_traffic_idx = |
4646 | (il->tx_traffic_idx + 1) % IL_TRAFFIC_ENTRIES; | 4678 | (il->tx_traffic_idx + 1) % IL_TRAFFIC_ENTRIES; |
4647 | } | 4679 | } |
4648 | } | 4680 | } |
4681 | |||
4649 | EXPORT_SYMBOL(il_dbg_log_tx_data_frame); | 4682 | EXPORT_SYMBOL(il_dbg_log_tx_data_frame); |
4650 | 4683 | ||
4651 | void il_dbg_log_rx_data_frame(struct il_priv *il, | 4684 | void |
4652 | u16 length, struct ieee80211_hdr *header) | 4685 | il_dbg_log_rx_data_frame(struct il_priv *il, u16 length, |
4686 | struct ieee80211_hdr *header) | ||
4653 | { | 4687 | { |
4654 | __le16 fc; | 4688 | __le16 fc; |
4655 | u16 len; | 4689 | u16 len; |
@@ -4662,18 +4696,21 @@ void il_dbg_log_rx_data_frame(struct il_priv *il, | |||
4662 | 4696 | ||
4663 | fc = header->frame_control; | 4697 | fc = header->frame_control; |
4664 | if (ieee80211_is_data(fc)) { | 4698 | if (ieee80211_is_data(fc)) { |
4665 | len = (length > IL_TRAFFIC_ENTRY_SIZE) | 4699 | len = |
4666 | ? IL_TRAFFIC_ENTRY_SIZE : length; | 4700 | (length > |
4701 | IL_TRAFFIC_ENTRY_SIZE) ? IL_TRAFFIC_ENTRY_SIZE : length; | ||
4667 | memcpy((il->rx_traffic + | 4702 | memcpy((il->rx_traffic + |
4668 | (il->rx_traffic_idx * IL_TRAFFIC_ENTRY_SIZE)), | 4703 | (il->rx_traffic_idx * IL_TRAFFIC_ENTRY_SIZE)), header, |
4669 | header, len); | 4704 | len); |
4670 | il->rx_traffic_idx = | 4705 | il->rx_traffic_idx = |
4671 | (il->rx_traffic_idx + 1) % IL_TRAFFIC_ENTRIES; | 4706 | (il->rx_traffic_idx + 1) % IL_TRAFFIC_ENTRIES; |
4672 | } | 4707 | } |
4673 | } | 4708 | } |
4709 | |||
4674 | EXPORT_SYMBOL(il_dbg_log_rx_data_frame); | 4710 | EXPORT_SYMBOL(il_dbg_log_rx_data_frame); |
4675 | 4711 | ||
4676 | const char *il_get_mgmt_string(int cmd) | 4712 | const char * |
4713 | il_get_mgmt_string(int cmd) | ||
4677 | { | 4714 | { |
4678 | switch (cmd) { | 4715 | switch (cmd) { |
4679 | IL_CMD(MANAGEMENT_ASSOC_REQ); | 4716 | IL_CMD(MANAGEMENT_ASSOC_REQ); |
@@ -4694,7 +4731,8 @@ const char *il_get_mgmt_string(int cmd) | |||
4694 | } | 4731 | } |
4695 | } | 4732 | } |
4696 | 4733 | ||
4697 | const char *il_get_ctrl_string(int cmd) | 4734 | const char * |
4735 | il_get_ctrl_string(int cmd) | ||
4698 | { | 4736 | { |
4699 | switch (cmd) { | 4737 | switch (cmd) { |
4700 | IL_CMD(CONTROL_BACK_REQ); | 4738 | IL_CMD(CONTROL_BACK_REQ); |
@@ -4711,7 +4749,8 @@ const char *il_get_ctrl_string(int cmd) | |||
4711 | } | 4749 | } |
4712 | } | 4750 | } |
4713 | 4751 | ||
4714 | void il_clear_traffic_stats(struct il_priv *il) | 4752 | void |
4753 | il_clear_traffic_stats(struct il_priv *il) | ||
4715 | { | 4754 | { |
4716 | memset(&il->tx_stats, 0, sizeof(struct traffic_stats)); | 4755 | memset(&il->tx_stats, 0, sizeof(struct traffic_stats)); |
4717 | memset(&il->rx_stats, 0, sizeof(struct traffic_stats)); | 4756 | memset(&il->rx_stats, 0, sizeof(struct traffic_stats)); |
@@ -4731,7 +4770,7 @@ void il_clear_traffic_stats(struct il_priv *il) | |||
4731 | void | 4770 | void |
4732 | il_update_stats(struct il_priv *il, bool is_tx, __le16 fc, u16 len) | 4771 | il_update_stats(struct il_priv *il, bool is_tx, __le16 fc, u16 len) |
4733 | { | 4772 | { |
4734 | struct traffic_stats *stats; | 4773 | struct traffic_stats *stats; |
4735 | 4774 | ||
4736 | if (is_tx) | 4775 | if (is_tx) |
4737 | stats = &il->tx_stats; | 4776 | stats = &il->tx_stats; |
@@ -4810,10 +4849,12 @@ il_update_stats(struct il_priv *il, bool is_tx, __le16 fc, u16 len) | |||
4810 | stats->data_bytes += len; | 4849 | stats->data_bytes += len; |
4811 | } | 4850 | } |
4812 | } | 4851 | } |
4852 | |||
4813 | EXPORT_SYMBOL(il_update_stats); | 4853 | EXPORT_SYMBOL(il_update_stats); |
4814 | #endif | 4854 | #endif |
4815 | 4855 | ||
4816 | int il_force_reset(struct il_priv *il, bool external) | 4856 | int |
4857 | il_force_reset(struct il_priv *il, bool external) | ||
4817 | { | 4858 | { |
4818 | struct il_force_reset *force_reset; | 4859 | struct il_force_reset *force_reset; |
4819 | 4860 | ||
@@ -4825,7 +4866,7 @@ int il_force_reset(struct il_priv *il, bool external) | |||
4825 | if (!external) { | 4866 | if (!external) { |
4826 | if (force_reset->last_force_reset_jiffies && | 4867 | if (force_reset->last_force_reset_jiffies && |
4827 | time_after(force_reset->last_force_reset_jiffies + | 4868 | time_after(force_reset->last_force_reset_jiffies + |
4828 | force_reset->reset_duration, jiffies)) { | 4869 | force_reset->reset_duration, jiffies)) { |
4829 | D_INFO("force reset rejected\n"); | 4870 | D_INFO("force reset rejected\n"); |
4830 | force_reset->reset_reject_count++; | 4871 | force_reset->reset_reject_count++; |
4831 | return -EAGAIN; | 4872 | return -EAGAIN; |
@@ -4845,7 +4886,7 @@ int il_force_reset(struct il_priv *il, bool external) | |||
4845 | 4886 | ||
4846 | if (!external && !il->cfg->mod_params->restart_fw) { | 4887 | if (!external && !il->cfg->mod_params->restart_fw) { |
4847 | D_INFO("Cancel firmware reload based on " | 4888 | D_INFO("Cancel firmware reload based on " |
4848 | "module parameter setting\n"); | 4889 | "module parameter setting\n"); |
4849 | return 0; | 4890 | return 0; |
4850 | } | 4891 | } |
4851 | 4892 | ||
@@ -4865,8 +4906,7 @@ int il_force_reset(struct il_priv *il, bool external) | |||
4865 | } | 4906 | } |
4866 | 4907 | ||
4867 | int | 4908 | int |
4868 | il_mac_change_interface(struct ieee80211_hw *hw, | 4909 | il_mac_change_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
4869 | struct ieee80211_vif *vif, | ||
4870 | enum nl80211_iftype newtype, bool newp2p) | 4910 | enum nl80211_iftype newtype, bool newp2p) |
4871 | { | 4911 | { |
4872 | struct il_priv *il = hw->priv; | 4912 | struct il_priv *il = hw->priv; |
@@ -4914,17 +4954,19 @@ il_mac_change_interface(struct ieee80211_hw *hw, | |||
4914 | */ | 4954 | */ |
4915 | err = 0; | 4955 | err = 0; |
4916 | 4956 | ||
4917 | out: | 4957 | out: |
4918 | mutex_unlock(&il->mutex); | 4958 | mutex_unlock(&il->mutex); |
4919 | return err; | 4959 | return err; |
4920 | } | 4960 | } |
4961 | |||
4921 | EXPORT_SYMBOL(il_mac_change_interface); | 4962 | EXPORT_SYMBOL(il_mac_change_interface); |
4922 | 4963 | ||
4923 | /* | 4964 | /* |
4924 | * On every watchdog tick we check (latest) time stamp. If it does not | 4965 | * On every watchdog tick we check (latest) time stamp. If it does not |
4925 | * change during timeout period and queue is not empty we reset firmware. | 4966 | * change during timeout period and queue is not empty we reset firmware. |
4926 | */ | 4967 | */ |
4927 | static int il_check_stuck_queue(struct il_priv *il, int cnt) | 4968 | static int |
4969 | il_check_stuck_queue(struct il_priv *il, int cnt) | ||
4928 | { | 4970 | { |
4929 | struct il_tx_queue *txq = &il->txq[cnt]; | 4971 | struct il_tx_queue *txq = &il->txq[cnt]; |
4930 | struct il_queue *q = &txq->q; | 4972 | struct il_queue *q = &txq->q; |
@@ -4936,12 +4978,13 @@ static int il_check_stuck_queue(struct il_priv *il, int cnt) | |||
4936 | return 0; | 4978 | return 0; |
4937 | } | 4979 | } |
4938 | 4980 | ||
4939 | timeout = txq->time_stamp + | 4981 | timeout = |
4940 | msecs_to_jiffies(il->cfg->base_params->wd_timeout); | 4982 | txq->time_stamp + |
4983 | msecs_to_jiffies(il->cfg->base_params->wd_timeout); | ||
4941 | 4984 | ||
4942 | if (time_after(jiffies, timeout)) { | 4985 | if (time_after(jiffies, timeout)) { |
4943 | IL_ERR("Queue %d stuck for %u ms.\n", | 4986 | IL_ERR("Queue %d stuck for %u ms.\n", q->id, |
4944 | q->id, il->cfg->base_params->wd_timeout); | 4987 | il->cfg->base_params->wd_timeout); |
4945 | ret = il_force_reset(il, false); | 4988 | ret = il_force_reset(il, false); |
4946 | return (ret == -EAGAIN) ? 0 : 1; | 4989 | return (ret == -EAGAIN) ? 0 : 1; |
4947 | } | 4990 | } |
@@ -4959,7 +5002,8 @@ static int il_check_stuck_queue(struct il_priv *il, int cnt) | |||
4959 | * Watchdog timer callback, we check each tx queue for stuck, if if hung | 5002 | * Watchdog timer callback, we check each tx queue for stuck, if if hung |
4960 | * we reset the firmware. If everything is fine just rearm the timer. | 5003 | * we reset the firmware. If everything is fine just rearm the timer. |
4961 | */ | 5004 | */ |
4962 | void il_bg_watchdog(unsigned long data) | 5005 | void |
5006 | il_bg_watchdog(unsigned long data) | ||
4963 | { | 5007 | { |
4964 | struct il_priv *il = (struct il_priv *)data; | 5008 | struct il_priv *il = (struct il_priv *)data; |
4965 | int cnt; | 5009 | int cnt; |
@@ -4987,12 +5031,14 @@ void il_bg_watchdog(unsigned long data) | |||
4987 | } | 5031 | } |
4988 | } | 5032 | } |
4989 | 5033 | ||
4990 | mod_timer(&il->watchdog, jiffies + | 5034 | mod_timer(&il->watchdog, |
4991 | msecs_to_jiffies(IL_WD_TICK(timeout))); | 5035 | jiffies + msecs_to_jiffies(IL_WD_TICK(timeout))); |
4992 | } | 5036 | } |
5037 | |||
4993 | EXPORT_SYMBOL(il_bg_watchdog); | 5038 | EXPORT_SYMBOL(il_bg_watchdog); |
4994 | 5039 | ||
4995 | void il_setup_watchdog(struct il_priv *il) | 5040 | void |
5041 | il_setup_watchdog(struct il_priv *il) | ||
4996 | { | 5042 | { |
4997 | unsigned int timeout = il->cfg->base_params->wd_timeout; | 5043 | unsigned int timeout = il->cfg->base_params->wd_timeout; |
4998 | 5044 | ||
@@ -5002,6 +5048,7 @@ void il_setup_watchdog(struct il_priv *il) | |||
5002 | else | 5048 | else |
5003 | del_timer(&il->watchdog); | 5049 | del_timer(&il->watchdog); |
5004 | } | 5050 | } |
5051 | |||
5005 | EXPORT_SYMBOL(il_setup_watchdog); | 5052 | EXPORT_SYMBOL(il_setup_watchdog); |
5006 | 5053 | ||
5007 | /* | 5054 | /* |
@@ -5011,8 +5058,7 @@ EXPORT_SYMBOL(il_setup_watchdog); | |||
5011 | * the internal part is the time in usec within one beacon interval | 5058 | * the internal part is the time in usec within one beacon interval |
5012 | */ | 5059 | */ |
5013 | u32 | 5060 | u32 |
5014 | il_usecs_to_beacons(struct il_priv *il, | 5061 | il_usecs_to_beacons(struct il_priv *il, u32 usec, u32 beacon_interval) |
5015 | u32 usec, u32 beacon_interval) | ||
5016 | { | 5062 | { |
5017 | u32 quot; | 5063 | u32 quot; |
5018 | u32 rem; | 5064 | u32 rem; |
@@ -5021,32 +5067,42 @@ il_usecs_to_beacons(struct il_priv *il, | |||
5021 | if (!interval || !usec) | 5067 | if (!interval || !usec) |
5022 | return 0; | 5068 | return 0; |
5023 | 5069 | ||
5024 | quot = (usec / interval) & | 5070 | quot = |
5025 | (il_beacon_time_mask_high(il, | 5071 | (usec / |
5026 | il->hw_params.beacon_time_tsf_bits) >> | 5072 | interval) & (il_beacon_time_mask_high(il, |
5027 | il->hw_params.beacon_time_tsf_bits); | 5073 | il->hw_params. |
5028 | rem = (usec % interval) & il_beacon_time_mask_low(il, | 5074 | beacon_time_tsf_bits) >> il-> |
5029 | il->hw_params.beacon_time_tsf_bits); | 5075 | hw_params.beacon_time_tsf_bits); |
5076 | rem = | ||
5077 | (usec % interval) & il_beacon_time_mask_low(il, | ||
5078 | il->hw_params. | ||
5079 | beacon_time_tsf_bits); | ||
5030 | 5080 | ||
5031 | return (quot << il->hw_params.beacon_time_tsf_bits) + rem; | 5081 | return (quot << il->hw_params.beacon_time_tsf_bits) + rem; |
5032 | } | 5082 | } |
5083 | |||
5033 | EXPORT_SYMBOL(il_usecs_to_beacons); | 5084 | EXPORT_SYMBOL(il_usecs_to_beacons); |
5034 | 5085 | ||
5035 | /* base is usually what we get from ucode with each received frame, | 5086 | /* base is usually what we get from ucode with each received frame, |
5036 | * the same as HW timer counter counting down | 5087 | * the same as HW timer counter counting down |
5037 | */ | 5088 | */ |
5038 | __le32 il_add_beacon_time(struct il_priv *il, u32 base, | 5089 | __le32 |
5039 | u32 addon, u32 beacon_interval) | 5090 | il_add_beacon_time(struct il_priv * il, u32 base, u32 addon, |
5091 | u32 beacon_interval) | ||
5040 | { | 5092 | { |
5041 | u32 base_low = base & il_beacon_time_mask_low(il, | 5093 | u32 base_low = base & il_beacon_time_mask_low(il, |
5042 | il->hw_params.beacon_time_tsf_bits); | 5094 | il->hw_params. |
5095 | beacon_time_tsf_bits); | ||
5043 | u32 addon_low = addon & il_beacon_time_mask_low(il, | 5096 | u32 addon_low = addon & il_beacon_time_mask_low(il, |
5044 | il->hw_params.beacon_time_tsf_bits); | 5097 | il->hw_params. |
5098 | beacon_time_tsf_bits); | ||
5045 | u32 interval = beacon_interval * TIME_UNIT; | 5099 | u32 interval = beacon_interval * TIME_UNIT; |
5046 | u32 res = (base & il_beacon_time_mask_high(il, | 5100 | u32 res = (base & il_beacon_time_mask_high(il, |
5047 | il->hw_params.beacon_time_tsf_bits)) + | 5101 | il->hw_params. |
5048 | (addon & il_beacon_time_mask_high(il, | 5102 | beacon_time_tsf_bits)) + |
5049 | il->hw_params.beacon_time_tsf_bits)); | 5103 | (addon & il_beacon_time_mask_high(il, |
5104 | il->hw_params. | ||
5105 | beacon_time_tsf_bits)); | ||
5050 | 5106 | ||
5051 | if (base_low > addon_low) | 5107 | if (base_low > addon_low) |
5052 | res += base_low - addon_low; | 5108 | res += base_low - addon_low; |
@@ -5058,11 +5114,13 @@ __le32 il_add_beacon_time(struct il_priv *il, u32 base, | |||
5058 | 5114 | ||
5059 | return cpu_to_le32(res); | 5115 | return cpu_to_le32(res); |
5060 | } | 5116 | } |
5117 | |||
5061 | EXPORT_SYMBOL(il_add_beacon_time); | 5118 | EXPORT_SYMBOL(il_add_beacon_time); |
5062 | 5119 | ||
5063 | #ifdef CONFIG_PM | 5120 | #ifdef CONFIG_PM |
5064 | 5121 | ||
5065 | int il_pci_suspend(struct device *device) | 5122 | int |
5123 | il_pci_suspend(struct device *device) | ||
5066 | { | 5124 | { |
5067 | struct pci_dev *pdev = to_pci_dev(device); | 5125 | struct pci_dev *pdev = to_pci_dev(device); |
5068 | struct il_priv *il = pci_get_drvdata(pdev); | 5126 | struct il_priv *il = pci_get_drvdata(pdev); |
@@ -5078,9 +5136,11 @@ int il_pci_suspend(struct device *device) | |||
5078 | 5136 | ||
5079 | return 0; | 5137 | return 0; |
5080 | } | 5138 | } |
5139 | |||
5081 | EXPORT_SYMBOL(il_pci_suspend); | 5140 | EXPORT_SYMBOL(il_pci_suspend); |
5082 | 5141 | ||
5083 | int il_pci_resume(struct device *device) | 5142 | int |
5143 | il_pci_resume(struct device *device) | ||
5084 | { | 5144 | { |
5085 | struct pci_dev *pdev = to_pci_dev(device); | 5145 | struct pci_dev *pdev = to_pci_dev(device); |
5086 | struct il_priv *il = pci_get_drvdata(pdev); | 5146 | struct il_priv *il = pci_get_drvdata(pdev); |
@@ -5094,8 +5154,7 @@ int il_pci_resume(struct device *device) | |||
5094 | 5154 | ||
5095 | il_enable_interrupts(il); | 5155 | il_enable_interrupts(il); |
5096 | 5156 | ||
5097 | if (!(_il_rd(il, CSR_GP_CNTRL) & | 5157 | if (!(_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)) |
5098 | CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)) | ||
5099 | hw_rfkill = true; | 5158 | hw_rfkill = true; |
5100 | 5159 | ||
5101 | if (hw_rfkill) | 5160 | if (hw_rfkill) |
@@ -5107,6 +5166,7 @@ int il_pci_resume(struct device *device) | |||
5107 | 5166 | ||
5108 | return 0; | 5167 | return 0; |
5109 | } | 5168 | } |
5169 | |||
5110 | EXPORT_SYMBOL(il_pci_resume); | 5170 | EXPORT_SYMBOL(il_pci_resume); |
5111 | 5171 | ||
5112 | const struct dev_pm_ops il_pm_ops = { | 5172 | const struct dev_pm_ops il_pm_ops = { |
@@ -5117,6 +5177,7 @@ const struct dev_pm_ops il_pm_ops = { | |||
5117 | .poweroff = il_pci_suspend, | 5177 | .poweroff = il_pci_suspend, |
5118 | .restore = il_pci_resume, | 5178 | .restore = il_pci_resume, |
5119 | }; | 5179 | }; |
5180 | |||
5120 | EXPORT_SYMBOL(il_pm_ops); | 5181 | EXPORT_SYMBOL(il_pm_ops); |
5121 | 5182 | ||
5122 | #endif /* CONFIG_PM */ | 5183 | #endif /* CONFIG_PM */ |
@@ -5134,24 +5195,23 @@ il_update_qos(struct il_priv *il, struct il_rxon_context *ctx) | |||
5134 | 5195 | ||
5135 | if (ctx->qos_data.qos_active) | 5196 | if (ctx->qos_data.qos_active) |
5136 | ctx->qos_data.def_qos_parm.qos_flags |= | 5197 | ctx->qos_data.def_qos_parm.qos_flags |= |
5137 | QOS_PARAM_FLG_UPDATE_EDCA_MSK; | 5198 | QOS_PARAM_FLG_UPDATE_EDCA_MSK; |
5138 | 5199 | ||
5139 | if (ctx->ht.enabled) | 5200 | if (ctx->ht.enabled) |
5140 | ctx->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK; | 5201 | ctx->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK; |
5141 | 5202 | ||
5142 | D_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n", | 5203 | D_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n", |
5143 | ctx->qos_data.qos_active, | 5204 | ctx->qos_data.qos_active, ctx->qos_data.def_qos_parm.qos_flags); |
5144 | ctx->qos_data.def_qos_parm.qos_flags); | ||
5145 | 5205 | ||
5146 | il_send_cmd_pdu_async(il, ctx->qos_cmd, | 5206 | il_send_cmd_pdu_async(il, ctx->qos_cmd, sizeof(struct il_qosparam_cmd), |
5147 | sizeof(struct il_qosparam_cmd), | 5207 | &ctx->qos_data.def_qos_parm, NULL); |
5148 | &ctx->qos_data.def_qos_parm, NULL); | ||
5149 | } | 5208 | } |
5150 | 5209 | ||
5151 | /** | 5210 | /** |
5152 | * il_mac_config - mac80211 config callback | 5211 | * il_mac_config - mac80211 config callback |
5153 | */ | 5212 | */ |
5154 | int il_mac_config(struct ieee80211_hw *hw, u32 changed) | 5213 | int |
5214 | il_mac_config(struct ieee80211_hw *hw, u32 changed) | ||
5155 | { | 5215 | { |
5156 | struct il_priv *il = hw->priv; | 5216 | struct il_priv *il = hw->priv; |
5157 | const struct il_channel_info *ch_info; | 5217 | const struct il_channel_info *ch_info; |
@@ -5170,16 +5230,16 @@ int il_mac_config(struct ieee80211_hw *hw, u32 changed) | |||
5170 | 5230 | ||
5171 | mutex_lock(&il->mutex); | 5231 | mutex_lock(&il->mutex); |
5172 | 5232 | ||
5173 | D_MAC80211("enter to channel %d changed 0x%X\n", | 5233 | D_MAC80211("enter to channel %d changed 0x%X\n", channel->hw_value, |
5174 | channel->hw_value, changed); | 5234 | changed); |
5175 | 5235 | ||
5176 | if (unlikely(test_bit(S_SCANNING, &il->status))) { | 5236 | if (unlikely(test_bit(S_SCANNING, &il->status))) { |
5177 | scan_active = 1; | 5237 | scan_active = 1; |
5178 | D_MAC80211("scan active\n"); | 5238 | D_MAC80211("scan active\n"); |
5179 | } | 5239 | } |
5180 | 5240 | ||
5181 | if (changed & (IEEE80211_CONF_CHANGE_SMPS | | 5241 | if (changed & |
5182 | IEEE80211_CONF_CHANGE_CHANNEL)) { | 5242 | (IEEE80211_CONF_CHANGE_SMPS | IEEE80211_CONF_CHANGE_CHANNEL)) { |
5183 | /* mac80211 uses static for non-HT which is what we want */ | 5243 | /* mac80211 uses static for non-HT which is what we want */ |
5184 | il->current_ht_config.smps = conf->smps_mode; | 5244 | il->current_ht_config.smps = conf->smps_mode; |
5185 | 5245 | ||
@@ -5227,15 +5287,15 @@ int il_mac_config(struct ieee80211_hw *hw, u32 changed) | |||
5227 | if (ctx->ht.enabled) { | 5287 | if (ctx->ht.enabled) { |
5228 | if (conf_is_ht40_minus(conf)) { | 5288 | if (conf_is_ht40_minus(conf)) { |
5229 | ctx->ht.extension_chan_offset = | 5289 | ctx->ht.extension_chan_offset = |
5230 | IEEE80211_HT_PARAM_CHA_SEC_BELOW; | 5290 | IEEE80211_HT_PARAM_CHA_SEC_BELOW; |
5231 | ctx->ht.is_40mhz = true; | 5291 | ctx->ht.is_40mhz = true; |
5232 | } else if (conf_is_ht40_plus(conf)) { | 5292 | } else if (conf_is_ht40_plus(conf)) { |
5233 | ctx->ht.extension_chan_offset = | 5293 | ctx->ht.extension_chan_offset = |
5234 | IEEE80211_HT_PARAM_CHA_SEC_ABOVE; | 5294 | IEEE80211_HT_PARAM_CHA_SEC_ABOVE; |
5235 | ctx->ht.is_40mhz = true; | 5295 | ctx->ht.is_40mhz = true; |
5236 | } else { | 5296 | } else { |
5237 | ctx->ht.extension_chan_offset = | 5297 | ctx->ht.extension_chan_offset = |
5238 | IEEE80211_HT_PARAM_CHA_SEC_NONE; | 5298 | IEEE80211_HT_PARAM_CHA_SEC_NONE; |
5239 | ctx->ht.is_40mhz = false; | 5299 | ctx->ht.is_40mhz = false; |
5240 | } | 5300 | } |
5241 | } else | 5301 | } else |
@@ -5245,8 +5305,7 @@ int il_mac_config(struct ieee80211_hw *hw, u32 changed) | |||
5245 | * Default to no protection. Protection mode will | 5305 | * Default to no protection. Protection mode will |
5246 | * later be set from BSS config in il_ht_conf | 5306 | * later be set from BSS config in il_ht_conf |
5247 | */ | 5307 | */ |
5248 | ctx->ht.protection = | 5308 | ctx->ht.protection = IEEE80211_HT_OP_MODE_PROTECTION_NONE; |
5249 | IEEE80211_HT_OP_MODE_PROTECTION_NONE; | ||
5250 | 5309 | ||
5251 | /* if we are switching from ht to 2.4 clear flags | 5310 | /* if we are switching from ht to 2.4 clear flags |
5252 | * from any ht related info since 2.4 does not | 5311 | * from any ht related info since 2.4 does not |
@@ -5257,32 +5316,29 @@ int il_mac_config(struct ieee80211_hw *hw, u32 changed) | |||
5257 | il_set_rxon_channel(il, channel, ctx); | 5316 | il_set_rxon_channel(il, channel, ctx); |
5258 | il_set_rxon_ht(il, ht_conf); | 5317 | il_set_rxon_ht(il, ht_conf); |
5259 | 5318 | ||
5260 | il_set_flags_for_band(il, ctx, channel->band, | 5319 | il_set_flags_for_band(il, ctx, channel->band, ctx->vif); |
5261 | ctx->vif); | ||
5262 | 5320 | ||
5263 | spin_unlock_irqrestore(&il->lock, flags); | 5321 | spin_unlock_irqrestore(&il->lock, flags); |
5264 | 5322 | ||
5265 | if (il->cfg->ops->legacy->update_bcast_stations) | 5323 | if (il->cfg->ops->legacy->update_bcast_stations) |
5266 | ret = | 5324 | ret = il->cfg->ops->legacy->update_bcast_stations(il); |
5267 | il->cfg->ops->legacy->update_bcast_stations(il); | ||
5268 | 5325 | ||
5269 | set_ch_out: | 5326 | set_ch_out: |
5270 | /* The list of supported rates and rate mask can be different | 5327 | /* The list of supported rates and rate mask can be different |
5271 | * for each band; since the band may have changed, reset | 5328 | * for each band; since the band may have changed, reset |
5272 | * the rate mask to what mac80211 lists */ | 5329 | * the rate mask to what mac80211 lists */ |
5273 | il_set_rate(il); | 5330 | il_set_rate(il); |
5274 | } | 5331 | } |
5275 | 5332 | ||
5276 | if (changed & (IEEE80211_CONF_CHANGE_PS | | 5333 | if (changed & (IEEE80211_CONF_CHANGE_PS | IEEE80211_CONF_CHANGE_IDLE)) { |
5277 | IEEE80211_CONF_CHANGE_IDLE)) { | ||
5278 | ret = il_power_update_mode(il, false); | 5334 | ret = il_power_update_mode(il, false); |
5279 | if (ret) | 5335 | if (ret) |
5280 | D_MAC80211("Error setting sleep level\n"); | 5336 | D_MAC80211("Error setting sleep level\n"); |
5281 | } | 5337 | } |
5282 | 5338 | ||
5283 | if (changed & IEEE80211_CONF_CHANGE_POWER) { | 5339 | if (changed & IEEE80211_CONF_CHANGE_POWER) { |
5284 | D_MAC80211("TX Power old=%d new=%d\n", | 5340 | D_MAC80211("TX Power old=%d new=%d\n", il->tx_power_user_lmt, |
5285 | il->tx_power_user_lmt, conf->power_level); | 5341 | conf->power_level); |
5286 | 5342 | ||
5287 | il_set_tx_power(il, conf->power_level, false); | 5343 | il_set_tx_power(il, conf->power_level, false); |
5288 | } | 5344 | } |
@@ -5309,8 +5365,8 @@ out: | |||
5309 | } | 5365 | } |
5310 | EXPORT_SYMBOL(il_mac_config); | 5366 | EXPORT_SYMBOL(il_mac_config); |
5311 | 5367 | ||
5312 | void il_mac_reset_tsf(struct ieee80211_hw *hw, | 5368 | void |
5313 | struct ieee80211_vif *vif) | 5369 | il_mac_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif) |
5314 | { | 5370 | { |
5315 | struct il_priv *il = hw->priv; | 5371 | struct il_priv *il = hw->priv; |
5316 | unsigned long flags; | 5372 | unsigned long flags; |
@@ -5357,10 +5413,11 @@ void il_mac_reset_tsf(struct ieee80211_hw *hw, | |||
5357 | 5413 | ||
5358 | D_MAC80211("leave\n"); | 5414 | D_MAC80211("leave\n"); |
5359 | } | 5415 | } |
5416 | |||
5360 | EXPORT_SYMBOL(il_mac_reset_tsf); | 5417 | EXPORT_SYMBOL(il_mac_reset_tsf); |
5361 | 5418 | ||
5362 | static void il_ht_conf(struct il_priv *il, | 5419 | static void |
5363 | struct ieee80211_vif *vif) | 5420 | il_ht_conf(struct il_priv *il, struct ieee80211_vif *vif) |
5364 | { | 5421 | { |
5365 | struct il_ht_config *ht_conf = &il->current_ht_config; | 5422 | struct il_ht_config *ht_conf = &il->current_ht_config; |
5366 | struct ieee80211_sta *sta; | 5423 | struct ieee80211_sta *sta; |
@@ -5373,10 +5430,10 @@ static void il_ht_conf(struct il_priv *il, | |||
5373 | return; | 5430 | return; |
5374 | 5431 | ||
5375 | ctx->ht.protection = | 5432 | ctx->ht.protection = |
5376 | bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION; | 5433 | bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION; |
5377 | ctx->ht.non_gf_sta_present = | 5434 | ctx->ht.non_gf_sta_present = |
5378 | !!(bss_conf->ht_operation_mode & | 5435 | !!(bss_conf-> |
5379 | IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT); | 5436 | ht_operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT); |
5380 | 5437 | ||
5381 | ht_conf->single_chain_sufficient = false; | 5438 | ht_conf->single_chain_sufficient = false; |
5382 | 5439 | ||
@@ -5388,9 +5445,10 @@ static void il_ht_conf(struct il_priv *il, | |||
5388 | struct ieee80211_sta_ht_cap *ht_cap = &sta->ht_cap; | 5445 | struct ieee80211_sta_ht_cap *ht_cap = &sta->ht_cap; |
5389 | int maxstreams; | 5446 | int maxstreams; |
5390 | 5447 | ||
5391 | maxstreams = (ht_cap->mcs.tx_params & | 5448 | maxstreams = |
5392 | IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK) | 5449 | (ht_cap->mcs. |
5393 | >> IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT; | 5450 | tx_params & IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK) |
5451 | >> IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT; | ||
5394 | maxstreams += 1; | 5452 | maxstreams += 1; |
5395 | 5453 | ||
5396 | if (ht_cap->mcs.rx_mask[1] == 0 && | 5454 | if (ht_cap->mcs.rx_mask[1] == 0 && |
@@ -5419,8 +5477,8 @@ static void il_ht_conf(struct il_priv *il, | |||
5419 | D_ASSOC("leave\n"); | 5477 | D_ASSOC("leave\n"); |
5420 | } | 5478 | } |
5421 | 5479 | ||
5422 | static inline void il_set_no_assoc(struct il_priv *il, | 5480 | static inline void |
5423 | struct ieee80211_vif *vif) | 5481 | il_set_no_assoc(struct il_priv *il, struct ieee80211_vif *vif) |
5424 | { | 5482 | { |
5425 | struct il_rxon_context *ctx = il_rxon_ctx_from_vif(vif); | 5483 | struct il_rxon_context *ctx = il_rxon_ctx_from_vif(vif); |
5426 | 5484 | ||
@@ -5434,8 +5492,8 @@ static inline void il_set_no_assoc(struct il_priv *il, | |||
5434 | il_commit_rxon(il, ctx); | 5492 | il_commit_rxon(il, ctx); |
5435 | } | 5493 | } |
5436 | 5494 | ||
5437 | static void il_beacon_update(struct ieee80211_hw *hw, | 5495 | static void |
5438 | struct ieee80211_vif *vif) | 5496 | il_beacon_update(struct ieee80211_hw *hw, struct ieee80211_vif *vif) |
5439 | { | 5497 | { |
5440 | struct il_priv *il = hw->priv; | 5498 | struct il_priv *il = hw->priv; |
5441 | unsigned long flags; | 5499 | unsigned long flags; |
@@ -5476,10 +5534,9 @@ static void il_beacon_update(struct ieee80211_hw *hw, | |||
5476 | il->cfg->ops->legacy->post_associate(il); | 5534 | il->cfg->ops->legacy->post_associate(il); |
5477 | } | 5535 | } |
5478 | 5536 | ||
5479 | void il_mac_bss_info_changed(struct ieee80211_hw *hw, | 5537 | void |
5480 | struct ieee80211_vif *vif, | 5538 | il_mac_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
5481 | struct ieee80211_bss_conf *bss_conf, | 5539 | struct ieee80211_bss_conf *bss_conf, u32 changes) |
5482 | u32 changes) | ||
5483 | { | 5540 | { |
5484 | struct il_priv *il = hw->priv; | 5541 | struct il_priv *il = hw->priv; |
5485 | struct il_rxon_context *ctx = il_rxon_ctx_from_vif(vif); | 5542 | struct il_rxon_context *ctx = il_rxon_ctx_from_vif(vif); |
@@ -5527,24 +5584,21 @@ void il_mac_bss_info_changed(struct ieee80211_hw *hw, | |||
5527 | * below/in post_associate will fail. | 5584 | * below/in post_associate will fail. |
5528 | */ | 5585 | */ |
5529 | if (il_scan_cancel_timeout(il, 100)) { | 5586 | if (il_scan_cancel_timeout(il, 100)) { |
5530 | IL_WARN( | 5587 | IL_WARN("Aborted scan still in progress after 100ms\n"); |
5531 | "Aborted scan still in progress after 100ms\n"); | 5588 | D_MAC80211("leaving - scan abort failed.\n"); |
5532 | D_MAC80211( | ||
5533 | "leaving - scan abort failed.\n"); | ||
5534 | mutex_unlock(&il->mutex); | 5589 | mutex_unlock(&il->mutex); |
5535 | return; | 5590 | return; |
5536 | } | 5591 | } |
5537 | 5592 | ||
5538 | /* mac80211 only sets assoc when in STATION mode */ | 5593 | /* mac80211 only sets assoc when in STATION mode */ |
5539 | if (vif->type == NL80211_IFTYPE_ADHOC || bss_conf->assoc) { | 5594 | if (vif->type == NL80211_IFTYPE_ADHOC || bss_conf->assoc) { |
5540 | memcpy(ctx->staging.bssid_addr, | 5595 | memcpy(ctx->staging.bssid_addr, bss_conf->bssid, |
5541 | bss_conf->bssid, ETH_ALEN); | 5596 | ETH_ALEN); |
5542 | 5597 | ||
5543 | /* currently needed in a few places */ | 5598 | /* currently needed in a few places */ |
5544 | memcpy(il->bssid, bss_conf->bssid, ETH_ALEN); | 5599 | memcpy(il->bssid, bss_conf->bssid, ETH_ALEN); |
5545 | } else { | 5600 | } else { |
5546 | ctx->staging.filter_flags &= | 5601 | ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK; |
5547 | ~RXON_FILTER_ASSOC_MSK; | ||
5548 | } | 5602 | } |
5549 | 5603 | ||
5550 | } | 5604 | } |
@@ -5558,8 +5612,7 @@ void il_mac_bss_info_changed(struct ieee80211_hw *hw, | |||
5558 | il_beacon_update(hw, vif); | 5612 | il_beacon_update(hw, vif); |
5559 | 5613 | ||
5560 | if (changes & BSS_CHANGED_ERP_PREAMBLE) { | 5614 | if (changes & BSS_CHANGED_ERP_PREAMBLE) { |
5561 | D_MAC80211("ERP_PREAMBLE %d\n", | 5615 | D_MAC80211("ERP_PREAMBLE %d\n", bss_conf->use_short_preamble); |
5562 | bss_conf->use_short_preamble); | ||
5563 | if (bss_conf->use_short_preamble) | 5616 | if (bss_conf->use_short_preamble) |
5564 | ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; | 5617 | ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; |
5565 | else | 5618 | else |
@@ -5567,8 +5620,7 @@ void il_mac_bss_info_changed(struct ieee80211_hw *hw, | |||
5567 | } | 5620 | } |
5568 | 5621 | ||
5569 | if (changes & BSS_CHANGED_ERP_CTS_PROT) { | 5622 | if (changes & BSS_CHANGED_ERP_CTS_PROT) { |
5570 | D_MAC80211( | 5623 | D_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot); |
5571 | "ERP_CTS %d\n", bss_conf->use_cts_prot); | ||
5572 | if (bss_conf->use_cts_prot && il->band != IEEE80211_BAND_5GHZ) | 5624 | if (bss_conf->use_cts_prot && il->band != IEEE80211_BAND_5GHZ) |
5573 | ctx->staging.flags |= RXON_FLG_TGG_PROTECT_MSK; | 5625 | ctx->staging.flags |= RXON_FLG_TGG_PROTECT_MSK; |
5574 | else | 5626 | else |
@@ -5585,14 +5637,14 @@ void il_mac_bss_info_changed(struct ieee80211_hw *hw, | |||
5585 | * To do that, remove code from il_set_rate() and put something | 5637 | * To do that, remove code from il_set_rate() and put something |
5586 | * like this here: | 5638 | * like this here: |
5587 | * | 5639 | * |
5588 | if (A-band) | 5640 | if (A-band) |
5589 | ctx->staging.ofdm_basic_rates = | 5641 | ctx->staging.ofdm_basic_rates = |
5590 | bss_conf->basic_rates; | 5642 | bss_conf->basic_rates; |
5591 | else | 5643 | else |
5592 | ctx->staging.ofdm_basic_rates = | 5644 | ctx->staging.ofdm_basic_rates = |
5593 | bss_conf->basic_rates >> 4; | 5645 | bss_conf->basic_rates >> 4; |
5594 | ctx->staging.cck_basic_rates = | 5646 | ctx->staging.cck_basic_rates = |
5595 | bss_conf->basic_rates & 0xF; | 5647 | bss_conf->basic_rates & 0xF; |
5596 | */ | 5648 | */ |
5597 | } | 5649 | } |
5598 | 5650 | ||
@@ -5615,21 +5667,19 @@ void il_mac_bss_info_changed(struct ieee80211_hw *hw, | |||
5615 | } | 5667 | } |
5616 | 5668 | ||
5617 | if (changes && il_is_associated_ctx(ctx) && bss_conf->aid) { | 5669 | if (changes && il_is_associated_ctx(ctx) && bss_conf->aid) { |
5618 | D_MAC80211("Changes (%#x) while associated\n", | 5670 | D_MAC80211("Changes (%#x) while associated\n", changes); |
5619 | changes); | ||
5620 | ret = il_send_rxon_assoc(il, ctx); | 5671 | ret = il_send_rxon_assoc(il, ctx); |
5621 | if (!ret) { | 5672 | if (!ret) { |
5622 | /* Sync active_rxon with latest change. */ | 5673 | /* Sync active_rxon with latest change. */ |
5623 | memcpy((void *)&ctx->active, | 5674 | memcpy((void *)&ctx->active, &ctx->staging, |
5624 | &ctx->staging, | 5675 | sizeof(struct il_rxon_cmd)); |
5625 | sizeof(struct il_rxon_cmd)); | ||
5626 | } | 5676 | } |
5627 | } | 5677 | } |
5628 | 5678 | ||
5629 | if (changes & BSS_CHANGED_BEACON_ENABLED) { | 5679 | if (changes & BSS_CHANGED_BEACON_ENABLED) { |
5630 | if (vif->bss_conf.enable_beacon) { | 5680 | if (vif->bss_conf.enable_beacon) { |
5631 | memcpy(ctx->staging.bssid_addr, | 5681 | memcpy(ctx->staging.bssid_addr, bss_conf->bssid, |
5632 | bss_conf->bssid, ETH_ALEN); | 5682 | ETH_ALEN); |
5633 | memcpy(il->bssid, bss_conf->bssid, ETH_ALEN); | 5683 | memcpy(il->bssid, bss_conf->bssid, ETH_ALEN); |
5634 | il->cfg->ops->legacy->config_ap(il); | 5684 | il->cfg->ops->legacy->config_ap(il); |
5635 | } else | 5685 | } else |
@@ -5637,21 +5687,25 @@ void il_mac_bss_info_changed(struct ieee80211_hw *hw, | |||
5637 | } | 5687 | } |
5638 | 5688 | ||
5639 | if (changes & BSS_CHANGED_IBSS) { | 5689 | if (changes & BSS_CHANGED_IBSS) { |
5640 | ret = il->cfg->ops->legacy->manage_ibss_station(il, vif, | 5690 | ret = |
5641 | bss_conf->ibss_joined); | 5691 | il->cfg->ops->legacy->manage_ibss_station(il, vif, |
5692 | bss_conf-> | ||
5693 | ibss_joined); | ||
5642 | if (ret) | 5694 | if (ret) |
5643 | IL_ERR("failed to %s IBSS station %pM\n", | 5695 | IL_ERR("failed to %s IBSS station %pM\n", |
5644 | bss_conf->ibss_joined ? "add" : "remove", | 5696 | bss_conf->ibss_joined ? "add" : "remove", |
5645 | bss_conf->bssid); | 5697 | bss_conf->bssid); |
5646 | } | 5698 | } |
5647 | 5699 | ||
5648 | mutex_unlock(&il->mutex); | 5700 | mutex_unlock(&il->mutex); |
5649 | 5701 | ||
5650 | D_MAC80211("leave\n"); | 5702 | D_MAC80211("leave\n"); |
5651 | } | 5703 | } |
5704 | |||
5652 | EXPORT_SYMBOL(il_mac_bss_info_changed); | 5705 | EXPORT_SYMBOL(il_mac_bss_info_changed); |
5653 | 5706 | ||
5654 | irqreturn_t il_isr(int irq, void *data) | 5707 | irqreturn_t |
5708 | il_isr(int irq, void *data) | ||
5655 | { | 5709 | { |
5656 | struct il_priv *il = data; | 5710 | struct il_priv *il = data; |
5657 | u32 inta, inta_mask; | 5711 | u32 inta, inta_mask; |
@@ -5666,7 +5720,7 @@ irqreturn_t il_isr(int irq, void *data) | |||
5666 | * back-to-back ISRs and sporadic interrupts from our NIC. | 5720 | * back-to-back ISRs and sporadic interrupts from our NIC. |
5667 | * If we have something to service, the tasklet will re-enable ints. | 5721 | * If we have something to service, the tasklet will re-enable ints. |
5668 | * If we *don't* have something, we'll re-enable before leaving here. */ | 5722 | * If we *don't* have something, we'll re-enable before leaving here. */ |
5669 | inta_mask = _il_rd(il, CSR_INT_MASK); /* just for debug */ | 5723 | inta_mask = _il_rd(il, CSR_INT_MASK); /* just for debug */ |
5670 | _il_wr(il, CSR_INT_MASK, 0x00000000); | 5724 | _il_wr(il, CSR_INT_MASK, 0x00000000); |
5671 | 5725 | ||
5672 | /* Discover which interrupts are active/pending */ | 5726 | /* Discover which interrupts are active/pending */ |
@@ -5677,8 +5731,7 @@ irqreturn_t il_isr(int irq, void *data) | |||
5677 | * This may be due to IRQ shared with another device, | 5731 | * This may be due to IRQ shared with another device, |
5678 | * or due to sporadic interrupts thrown from our NIC. */ | 5732 | * or due to sporadic interrupts thrown from our NIC. */ |
5679 | if (!inta && !inta_fh) { | 5733 | if (!inta && !inta_fh) { |
5680 | D_ISR( | 5734 | D_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n"); |
5681 | "Ignore interrupt, inta == 0, inta_fh == 0\n"); | ||
5682 | goto none; | 5735 | goto none; |
5683 | } | 5736 | } |
5684 | 5737 | ||
@@ -5689,8 +5742,8 @@ irqreturn_t il_isr(int irq, void *data) | |||
5689 | goto unplugged; | 5742 | goto unplugged; |
5690 | } | 5743 | } |
5691 | 5744 | ||
5692 | D_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", | 5745 | D_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", inta, inta_mask, |
5693 | inta, inta_mask, inta_fh); | 5746 | inta_fh); |
5694 | 5747 | ||
5695 | inta &= ~CSR_INT_BIT_SCD; | 5748 | inta &= ~CSR_INT_BIT_SCD; |
5696 | 5749 | ||
@@ -5710,15 +5763,16 @@ none: | |||
5710 | spin_unlock_irqrestore(&il->lock, flags); | 5763 | spin_unlock_irqrestore(&il->lock, flags); |
5711 | return IRQ_NONE; | 5764 | return IRQ_NONE; |
5712 | } | 5765 | } |
5766 | |||
5713 | EXPORT_SYMBOL(il_isr); | 5767 | EXPORT_SYMBOL(il_isr); |
5714 | 5768 | ||
5715 | /* | 5769 | /* |
5716 | * il_tx_cmd_protection: Set rts/cts. 3945 and 4965 only share this | 5770 | * il_tx_cmd_protection: Set rts/cts. 3945 and 4965 only share this |
5717 | * function. | 5771 | * function. |
5718 | */ | 5772 | */ |
5719 | void il_tx_cmd_protection(struct il_priv *il, | 5773 | void |
5720 | struct ieee80211_tx_info *info, | 5774 | il_tx_cmd_protection(struct il_priv *il, struct ieee80211_tx_info *info, |
5721 | __le16 fc, __le32 *tx_flags) | 5775 | __le16 fc, __le32 * tx_flags) |
5722 | { | 5776 | { |
5723 | if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) { | 5777 | if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) { |
5724 | *tx_flags |= TX_CMD_FLG_RTS_MSK; | 5778 | *tx_flags |= TX_CMD_FLG_RTS_MSK; |
@@ -5737,11 +5791,12 @@ void il_tx_cmd_protection(struct il_priv *il, | |||
5737 | *tx_flags |= TX_CMD_FLG_CTS_MSK; | 5791 | *tx_flags |= TX_CMD_FLG_CTS_MSK; |
5738 | break; | 5792 | break; |
5739 | } | 5793 | } |
5740 | } else if (info->control.rates[0].flags & | 5794 | } else if (info->control.rates[0]. |
5741 | IEEE80211_TX_RC_USE_CTS_PROTECT) { | 5795 | flags & IEEE80211_TX_RC_USE_CTS_PROTECT) { |
5742 | *tx_flags &= ~TX_CMD_FLG_RTS_MSK; | 5796 | *tx_flags &= ~TX_CMD_FLG_RTS_MSK; |
5743 | *tx_flags |= TX_CMD_FLG_CTS_MSK; | 5797 | *tx_flags |= TX_CMD_FLG_CTS_MSK; |
5744 | *tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK; | 5798 | *tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK; |
5745 | } | 5799 | } |
5746 | } | 5800 | } |
5801 | |||
5747 | EXPORT_SYMBOL(il_tx_cmd_protection); | 5802 | EXPORT_SYMBOL(il_tx_cmd_protection); |
diff --git a/drivers/net/wireless/iwlegacy/common.h b/drivers/net/wireless/iwlegacy/common.h index b1d237fc5fb7..38ff3d66c745 100644 --- a/drivers/net/wireless/iwlegacy/common.h +++ b/drivers/net/wireless/iwlegacy/common.h | |||
@@ -27,7 +27,7 @@ | |||
27 | #define __il_core_h__ | 27 | #define __il_core_h__ |
28 | 28 | ||
29 | #include <linux/interrupt.h> | 29 | #include <linux/interrupt.h> |
30 | #include <linux/pci.h> /* for struct pci_device_id */ | 30 | #include <linux/pci.h> /* for struct pci_device_id */ |
31 | #include <linux/kernel.h> | 31 | #include <linux/kernel.h> |
32 | #include <linux/leds.h> | 32 | #include <linux/leds.h> |
33 | #include <linux/wait.h> | 33 | #include <linux/wait.h> |
@@ -59,7 +59,7 @@ struct il_tx_queue; | |||
59 | #define U32_PAD(n) ((4-(n))&0x3) | 59 | #define U32_PAD(n) ((4-(n))&0x3) |
60 | 60 | ||
61 | /* CT-KILL constants */ | 61 | /* CT-KILL constants */ |
62 | #define CT_KILL_THRESHOLD_LEGACY 110 /* in Celsius */ | 62 | #define CT_KILL_THRESHOLD_LEGACY 110 /* in Celsius */ |
63 | 63 | ||
64 | /* Default noise level to report when noise measurement is not available. | 64 | /* Default noise level to report when noise measurement is not available. |
65 | * This may be because we're: | 65 | * This may be because we're: |
@@ -112,16 +112,15 @@ struct il_cmd_meta { | |||
112 | * invoked for SYNC commands, if it were and its result passed | 112 | * invoked for SYNC commands, if it were and its result passed |
113 | * through it would be simpler...) | 113 | * through it would be simpler...) |
114 | */ | 114 | */ |
115 | void (*callback)(struct il_priv *il, | 115 | void (*callback) (struct il_priv * il, struct il_device_cmd * cmd, |
116 | struct il_device_cmd *cmd, | 116 | struct il_rx_pkt * pkt); |
117 | struct il_rx_pkt *pkt); | ||
118 | 117 | ||
119 | /* The CMD_SIZE_HUGE flag bit indicates that the command | 118 | /* The CMD_SIZE_HUGE flag bit indicates that the command |
120 | * structure is stored at the end of the shared queue memory. */ | 119 | * structure is stored at the end of the shared queue memory. */ |
121 | u32 flags; | 120 | u32 flags; |
122 | 121 | ||
123 | DEFINE_DMA_UNMAP_ADDR(mapping); | 122 | DEFINE_DMA_UNMAP_ADDR(mapping); |
124 | DEFINE_DMA_UNMAP_LEN(len); | 123 | DEFINE_DMA_UNMAP_LEN(len); |
125 | }; | 124 | }; |
126 | 125 | ||
127 | /* | 126 | /* |
@@ -130,17 +129,17 @@ struct il_cmd_meta { | |||
130 | * Contains common data for Rx and Tx queues | 129 | * Contains common data for Rx and Tx queues |
131 | */ | 130 | */ |
132 | struct il_queue { | 131 | struct il_queue { |
133 | int n_bd; /* number of BDs in this queue */ | 132 | int n_bd; /* number of BDs in this queue */ |
134 | int write_ptr; /* 1-st empty entry (idx) host_w*/ | 133 | int write_ptr; /* 1-st empty entry (idx) host_w */ |
135 | int read_ptr; /* last used entry (idx) host_r*/ | 134 | int read_ptr; /* last used entry (idx) host_r */ |
136 | /* use for monitoring and recovering the stuck queue */ | 135 | /* use for monitoring and recovering the stuck queue */ |
137 | dma_addr_t dma_addr; /* physical addr for BD's */ | 136 | dma_addr_t dma_addr; /* physical addr for BD's */ |
138 | int n_win; /* safe queue win */ | 137 | int n_win; /* safe queue win */ |
139 | u32 id; | 138 | u32 id; |
140 | int low_mark; /* low watermark, resume queue if free | 139 | int low_mark; /* low watermark, resume queue if free |
141 | * space more than this */ | 140 | * space more than this */ |
142 | int high_mark; /* high watermark, stop queue if free | 141 | int high_mark; /* high watermark, stop queue if free |
143 | * space less than this */ | 142 | * space less than this */ |
144 | }; | 143 | }; |
145 | 144 | ||
146 | /* One for each TFD */ | 145 | /* One for each TFD */ |
@@ -188,11 +187,10 @@ struct il_tx_queue { | |||
188 | * When polling, wait 10 uSec between polling loops, up to a maximum 5000 uSec. | 187 | * When polling, wait 10 uSec between polling loops, up to a maximum 5000 uSec. |
189 | * Driver reads 16-bit value from bits 31-16 of CSR_EEPROM_REG. | 188 | * Driver reads 16-bit value from bits 31-16 of CSR_EEPROM_REG. |
190 | */ | 189 | */ |
191 | #define IL_EEPROM_ACCESS_TIMEOUT 5000 /* uSec */ | 190 | #define IL_EEPROM_ACCESS_TIMEOUT 5000 /* uSec */ |
192 | |||
193 | #define IL_EEPROM_SEM_TIMEOUT 10 /* microseconds */ | ||
194 | #define IL_EEPROM_SEM_RETRY_LIMIT 1000 /* number of attempts (not time) */ | ||
195 | 191 | ||
192 | #define IL_EEPROM_SEM_TIMEOUT 10 /* microseconds */ | ||
193 | #define IL_EEPROM_SEM_RETRY_LIMIT 1000 /* number of attempts (not time) */ | ||
196 | 194 | ||
197 | /* | 195 | /* |
198 | * Regulatory channel usage flags in EEPROM struct il4965_eeprom_channel.flags. | 196 | * Regulatory channel usage flags in EEPROM struct il4965_eeprom_channel.flags. |
@@ -213,11 +211,11 @@ struct il_tx_queue { | |||
213 | #define IL_NUM_TX_CALIB_GROUPS 5 | 211 | #define IL_NUM_TX_CALIB_GROUPS 5 |
214 | enum { | 212 | enum { |
215 | EEPROM_CHANNEL_VALID = (1 << 0), /* usable for this SKU/geo */ | 213 | EEPROM_CHANNEL_VALID = (1 << 0), /* usable for this SKU/geo */ |
216 | EEPROM_CHANNEL_IBSS = (1 << 1), /* usable as an IBSS channel */ | 214 | EEPROM_CHANNEL_IBSS = (1 << 1), /* usable as an IBSS channel */ |
217 | /* Bit 2 Reserved */ | 215 | /* Bit 2 Reserved */ |
218 | EEPROM_CHANNEL_ACTIVE = (1 << 3), /* active scanning allowed */ | 216 | EEPROM_CHANNEL_ACTIVE = (1 << 3), /* active scanning allowed */ |
219 | EEPROM_CHANNEL_RADAR = (1 << 4), /* radar detection required */ | 217 | EEPROM_CHANNEL_RADAR = (1 << 4), /* radar detection required */ |
220 | EEPROM_CHANNEL_WIDE = (1 << 5), /* 20 MHz channel okay */ | 218 | EEPROM_CHANNEL_WIDE = (1 << 5), /* 20 MHz channel okay */ |
221 | /* Bit 6 Reserved (was Narrow Channel) */ | 219 | /* Bit 6 Reserved (was Narrow Channel) */ |
222 | EEPROM_CHANNEL_DFS = (1 << 7), /* dynamic freq selection candidate */ | 220 | EEPROM_CHANNEL_DFS = (1 << 7), /* dynamic freq selection candidate */ |
223 | }; | 221 | }; |
@@ -251,10 +249,10 @@ struct il_eeprom_channel { | |||
251 | /* 4965 driver does not work with txpower calibration version < 5 */ | 249 | /* 4965 driver does not work with txpower calibration version < 5 */ |
252 | #define EEPROM_4965_TX_POWER_VERSION (5) | 250 | #define EEPROM_4965_TX_POWER_VERSION (5) |
253 | #define EEPROM_4965_EEPROM_VERSION (0x2f) | 251 | #define EEPROM_4965_EEPROM_VERSION (0x2f) |
254 | #define EEPROM_4965_CALIB_VERSION_OFFSET (2*0xB6) /* 2 bytes */ | 252 | #define EEPROM_4965_CALIB_VERSION_OFFSET (2*0xB6) /* 2 bytes */ |
255 | #define EEPROM_4965_CALIB_TXPOWER_OFFSET (2*0xE8) /* 48 bytes */ | 253 | #define EEPROM_4965_CALIB_TXPOWER_OFFSET (2*0xE8) /* 48 bytes */ |
256 | #define EEPROM_4965_BOARD_REVISION (2*0x4F) /* 2 bytes */ | 254 | #define EEPROM_4965_BOARD_REVISION (2*0x4F) /* 2 bytes */ |
257 | #define EEPROM_4965_BOARD_PBA (2*0x56+1) /* 9 bytes */ | 255 | #define EEPROM_4965_BOARD_PBA (2*0x56+1) /* 9 bytes */ |
258 | 256 | ||
259 | /* 2.4 GHz */ | 257 | /* 2.4 GHz */ |
260 | extern const u8 il_eeprom_band_1[14]; | 258 | extern const u8 il_eeprom_band_1[14]; |
@@ -280,7 +278,6 @@ struct il_eeprom_calib_measure { | |||
280 | s8 pa_det; /* Power amp detector level (not used) */ | 278 | s8 pa_det; /* Power amp detector level (not used) */ |
281 | } __packed; | 279 | } __packed; |
282 | 280 | ||
283 | |||
284 | /* | 281 | /* |
285 | * measurement set for one channel. EEPROM contains: | 282 | * measurement set for one channel. EEPROM contains: |
286 | * | 283 | * |
@@ -292,8 +289,8 @@ struct il_eeprom_calib_measure { | |||
292 | struct il_eeprom_calib_ch_info { | 289 | struct il_eeprom_calib_ch_info { |
293 | u8 ch_num; | 290 | u8 ch_num; |
294 | struct il_eeprom_calib_measure | 291 | struct il_eeprom_calib_measure |
295 | measurements[EEPROM_TX_POWER_TX_CHAINS] | 292 | measurements[EEPROM_TX_POWER_TX_CHAINS] |
296 | [EEPROM_TX_POWER_MEASUREMENTS]; | 293 | [EEPROM_TX_POWER_MEASUREMENTS]; |
297 | } __packed; | 294 | } __packed; |
298 | 295 | ||
299 | /* | 296 | /* |
@@ -307,13 +304,12 @@ struct il_eeprom_calib_ch_info { | |||
307 | * 2) Sample measurement sets for 2 channels close to the range endpoints. | 304 | * 2) Sample measurement sets for 2 channels close to the range endpoints. |
308 | */ | 305 | */ |
309 | struct il_eeprom_calib_subband_info { | 306 | struct il_eeprom_calib_subband_info { |
310 | u8 ch_from; /* channel number of lowest channel in subband */ | 307 | u8 ch_from; /* channel number of lowest channel in subband */ |
311 | u8 ch_to; /* channel number of highest channel in subband */ | 308 | u8 ch_to; /* channel number of highest channel in subband */ |
312 | struct il_eeprom_calib_ch_info ch1; | 309 | struct il_eeprom_calib_ch_info ch1; |
313 | struct il_eeprom_calib_ch_info ch2; | 310 | struct il_eeprom_calib_ch_info ch2; |
314 | } __packed; | 311 | } __packed; |
315 | 312 | ||
316 | |||
317 | /* | 313 | /* |
318 | * txpower calibration info. EEPROM contains: | 314 | * txpower calibration info. EEPROM contains: |
319 | * | 315 | * |
@@ -338,11 +334,9 @@ struct il_eeprom_calib_info { | |||
338 | u8 saturation_power24; /* half-dBm (e.g. "34" = 17 dBm) */ | 334 | u8 saturation_power24; /* half-dBm (e.g. "34" = 17 dBm) */ |
339 | u8 saturation_power52; /* half-dBm */ | 335 | u8 saturation_power52; /* half-dBm */ |
340 | __le16 voltage; /* signed */ | 336 | __le16 voltage; /* signed */ |
341 | struct il_eeprom_calib_subband_info | 337 | struct il_eeprom_calib_subband_info band_info[EEPROM_TX_POWER_BANDS]; |
342 | band_info[EEPROM_TX_POWER_BANDS]; | ||
343 | } __packed; | 338 | } __packed; |
344 | 339 | ||
345 | |||
346 | /* General */ | 340 | /* General */ |
347 | #define EEPROM_DEVICE_ID (2*0x08) /* 2 bytes */ | 341 | #define EEPROM_DEVICE_ID (2*0x08) /* 2 bytes */ |
348 | #define EEPROM_MAC_ADDRESS (2*0x15) /* 6 bytes */ | 342 | #define EEPROM_MAC_ADDRESS (2*0x15) /* 6 bytes */ |
@@ -356,12 +350,12 @@ struct il_eeprom_calib_info { | |||
356 | #define EEPROM_NUM_MAC_ADDRESS (2*0x4C) /* 2 bytes */ | 350 | #define EEPROM_NUM_MAC_ADDRESS (2*0x4C) /* 2 bytes */ |
357 | 351 | ||
358 | /* The following masks are to be applied on EEPROM_RADIO_CONFIG */ | 352 | /* The following masks are to be applied on EEPROM_RADIO_CONFIG */ |
359 | #define EEPROM_RF_CFG_TYPE_MSK(x) (x & 0x3) /* bits 0-1 */ | 353 | #define EEPROM_RF_CFG_TYPE_MSK(x) (x & 0x3) /* bits 0-1 */ |
360 | #define EEPROM_RF_CFG_STEP_MSK(x) ((x >> 2) & 0x3) /* bits 2-3 */ | 354 | #define EEPROM_RF_CFG_STEP_MSK(x) ((x >> 2) & 0x3) /* bits 2-3 */ |
361 | #define EEPROM_RF_CFG_DASH_MSK(x) ((x >> 4) & 0x3) /* bits 4-5 */ | 355 | #define EEPROM_RF_CFG_DASH_MSK(x) ((x >> 4) & 0x3) /* bits 4-5 */ |
362 | #define EEPROM_RF_CFG_PNUM_MSK(x) ((x >> 6) & 0x3) /* bits 6-7 */ | 356 | #define EEPROM_RF_CFG_PNUM_MSK(x) ((x >> 6) & 0x3) /* bits 6-7 */ |
363 | #define EEPROM_RF_CFG_TX_ANT_MSK(x) ((x >> 8) & 0xF) /* bits 8-11 */ | 357 | #define EEPROM_RF_CFG_TX_ANT_MSK(x) ((x >> 8) & 0xF) /* bits 8-11 */ |
364 | #define EEPROM_RF_CFG_RX_ANT_MSK(x) ((x >> 12) & 0xF) /* bits 12-15 */ | 358 | #define EEPROM_RF_CFG_RX_ANT_MSK(x) ((x >> 12) & 0xF) /* bits 12-15 */ |
365 | 359 | ||
366 | #define EEPROM_3945_RF_CFG_TYPE_MAX 0x0 | 360 | #define EEPROM_3945_RF_CFG_TYPE_MAX 0x0 |
367 | #define EEPROM_4965_RF_CFG_TYPE_MAX 0x1 | 361 | #define EEPROM_4965_RF_CFG_TYPE_MAX 0x1 |
@@ -378,7 +372,7 @@ struct il_eeprom_calib_info { | |||
378 | * | 372 | * |
379 | * 2.4 GHz channels 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14 | 373 | * 2.4 GHz channels 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14 |
380 | */ | 374 | */ |
381 | #define EEPROM_REGULATORY_SKU_ID (2*0x60) /* 4 bytes */ | 375 | #define EEPROM_REGULATORY_SKU_ID (2*0x60) /* 4 bytes */ |
382 | #define EEPROM_REGULATORY_BAND_1 (2*0x62) /* 2 bytes */ | 376 | #define EEPROM_REGULATORY_BAND_1 (2*0x62) /* 2 bytes */ |
383 | #define EEPROM_REGULATORY_BAND_1_CHANNELS (2*0x63) /* 28 bytes */ | 377 | #define EEPROM_REGULATORY_BAND_1_CHANNELS (2*0x63) /* 28 bytes */ |
384 | 378 | ||
@@ -438,22 +432,19 @@ struct il_eeprom_calib_info { | |||
438 | 432 | ||
439 | struct il_eeprom_ops { | 433 | struct il_eeprom_ops { |
440 | const u32 regulatory_bands[7]; | 434 | const u32 regulatory_bands[7]; |
441 | int (*acquire_semaphore) (struct il_priv *il); | 435 | int (*acquire_semaphore) (struct il_priv * il); |
442 | void (*release_semaphore) (struct il_priv *il); | 436 | void (*release_semaphore) (struct il_priv * il); |
443 | }; | 437 | }; |
444 | 438 | ||
445 | |||
446 | int il_eeprom_init(struct il_priv *il); | 439 | int il_eeprom_init(struct il_priv *il); |
447 | void il_eeprom_free(struct il_priv *il); | 440 | void il_eeprom_free(struct il_priv *il); |
448 | const u8 *il_eeprom_query_addr(const struct il_priv *il, | 441 | const u8 *il_eeprom_query_addr(const struct il_priv *il, size_t offset); |
449 | size_t offset); | ||
450 | u16 il_eeprom_query16(const struct il_priv *il, size_t offset); | 442 | u16 il_eeprom_query16(const struct il_priv *il, size_t offset); |
451 | int il_init_channel_map(struct il_priv *il); | 443 | int il_init_channel_map(struct il_priv *il); |
452 | void il_free_channel_map(struct il_priv *il); | 444 | void il_free_channel_map(struct il_priv *il); |
453 | const struct il_channel_info *il_get_channel_info( | 445 | const struct il_channel_info *il_get_channel_info(const struct il_priv *il, |
454 | const struct il_priv *il, | 446 | enum ieee80211_band band, |
455 | enum ieee80211_band band, u16 channel); | 447 | u16 channel); |
456 | |||
457 | 448 | ||
458 | #define IL_NUM_SCAN_RATES (2) | 449 | #define IL_NUM_SCAN_RATES (2) |
459 | 450 | ||
@@ -508,21 +499,21 @@ struct il_channel_info { | |||
508 | struct il_eeprom_channel ht40_eeprom; /* EEPROM regulatory limit for | 499 | struct il_eeprom_channel ht40_eeprom; /* EEPROM regulatory limit for |
509 | * HT40 channel */ | 500 | * HT40 channel */ |
510 | 501 | ||
511 | u8 channel; /* channel number */ | 502 | u8 channel; /* channel number */ |
512 | u8 flags; /* flags copied from EEPROM */ | 503 | u8 flags; /* flags copied from EEPROM */ |
513 | s8 max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */ | 504 | s8 max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */ |
514 | s8 curr_txpow; /* (dBm) regulatory/spectrum/user (not h/w) limit */ | 505 | s8 curr_txpow; /* (dBm) regulatory/spectrum/user (not h/w) limit */ |
515 | s8 min_power; /* always 0 */ | 506 | s8 min_power; /* always 0 */ |
516 | s8 scan_power; /* (dBm) regul. eeprom, direct scans, any rate */ | 507 | s8 scan_power; /* (dBm) regul. eeprom, direct scans, any rate */ |
517 | 508 | ||
518 | u8 group_idx; /* 0-4, maps channel to group1/2/3/4/5 */ | 509 | u8 group_idx; /* 0-4, maps channel to group1/2/3/4/5 */ |
519 | u8 band_idx; /* 0-4, maps channel to band1/2/3/4/5 */ | 510 | u8 band_idx; /* 0-4, maps channel to band1/2/3/4/5 */ |
520 | enum ieee80211_band band; | 511 | enum ieee80211_band band; |
521 | 512 | ||
522 | /* HT40 channel info */ | 513 | /* HT40 channel info */ |
523 | s8 ht40_max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */ | 514 | s8 ht40_max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */ |
524 | u8 ht40_flags; /* flags copied from EEPROM */ | 515 | u8 ht40_flags; /* flags copied from EEPROM */ |
525 | u8 ht40_extension_channel; /* HT_IE_EXT_CHANNEL_* */ | 516 | u8 ht40_extension_channel; /* HT_IE_EXT_CHANNEL_* */ |
526 | 517 | ||
527 | /* Radio/DSP gain settings for each "normal" data Tx rate. | 518 | /* Radio/DSP gain settings for each "normal" data Tx rate. |
528 | * These include, in addition to RF and DSP gain, a few fields for | 519 | * These include, in addition to RF and DSP gain, a few fields for |
@@ -598,13 +589,11 @@ struct il_device_cmd { | |||
598 | 589 | ||
599 | #define TFD_MAX_PAYLOAD_SIZE (sizeof(struct il_device_cmd)) | 590 | #define TFD_MAX_PAYLOAD_SIZE (sizeof(struct il_device_cmd)) |
600 | 591 | ||
601 | |||
602 | struct il_host_cmd { | 592 | struct il_host_cmd { |
603 | const void *data; | 593 | const void *data; |
604 | unsigned long reply_page; | 594 | unsigned long reply_page; |
605 | void (*callback)(struct il_priv *il, | 595 | void (*callback) (struct il_priv * il, struct il_device_cmd * cmd, |
606 | struct il_device_cmd *cmd, | 596 | struct il_rx_pkt * pkt); |
607 | struct il_rx_pkt *pkt); | ||
608 | u32 flags; | 597 | u32 flags; |
609 | u16 len; | 598 | u16 len; |
610 | u8 id; | 599 | u8 id; |
@@ -681,9 +670,8 @@ struct il_ht_agg { | |||
681 | u8 state; | 670 | u8 state; |
682 | }; | 671 | }; |
683 | 672 | ||
684 | |||
685 | struct il_tid_data { | 673 | struct il_tid_data { |
686 | u16 seq_number; /* 4965 only */ | 674 | u16 seq_number; /* 4965 only */ |
687 | u16 tfds_in_queue; | 675 | u16 tfds_in_queue; |
688 | struct il_ht_agg agg; | 676 | struct il_ht_agg agg; |
689 | }; | 677 | }; |
@@ -728,7 +716,7 @@ union il_ht_rate_supp { | |||
728 | 716 | ||
729 | struct il_ht_config { | 717 | struct il_ht_config { |
730 | bool single_chain_sufficient; | 718 | bool single_chain_sufficient; |
731 | enum ieee80211_smps_mode smps; /* current smps mode */ | 719 | enum ieee80211_smps_mode smps; /* current smps mode */ |
732 | }; | 720 | }; |
733 | 721 | ||
734 | /* QoS structures */ | 722 | /* QoS structures */ |
@@ -776,14 +764,14 @@ struct fw_desc { | |||
776 | 764 | ||
777 | /* uCode file layout */ | 765 | /* uCode file layout */ |
778 | struct il_ucode_header { | 766 | struct il_ucode_header { |
779 | __le32 ver; /* major/minor/API/serial */ | 767 | __le32 ver; /* major/minor/API/serial */ |
780 | struct { | 768 | struct { |
781 | __le32 inst_size; /* bytes of runtime code */ | 769 | __le32 inst_size; /* bytes of runtime code */ |
782 | __le32 data_size; /* bytes of runtime data */ | 770 | __le32 data_size; /* bytes of runtime data */ |
783 | __le32 init_size; /* bytes of init code */ | 771 | __le32 init_size; /* bytes of init code */ |
784 | __le32 init_data_size; /* bytes of init data */ | 772 | __le32 init_data_size; /* bytes of init data */ |
785 | __le32 boot_size; /* bytes of bootstrap code */ | 773 | __le32 boot_size; /* bytes of bootstrap code */ |
786 | u8 data[0]; /* in same order as sizes */ | 774 | u8 data[0]; /* in same order as sizes */ |
787 | } v1; | 775 | } v1; |
788 | }; | 776 | }; |
789 | 777 | ||
@@ -822,11 +810,9 @@ struct il_sensitivity_ranges { | |||
822 | u16 nrg_th_cca; | 810 | u16 nrg_th_cca; |
823 | }; | 811 | }; |
824 | 812 | ||
825 | |||
826 | #define KELVIN_TO_CELSIUS(x) ((x)-273) | 813 | #define KELVIN_TO_CELSIUS(x) ((x)-273) |
827 | #define CELSIUS_TO_KELVIN(x) ((x)+273) | 814 | #define CELSIUS_TO_KELVIN(x) ((x)+273) |
828 | 815 | ||
829 | |||
830 | /** | 816 | /** |
831 | * struct il_hw_params | 817 | * struct il_hw_params |
832 | * @max_txq_num: Max # Tx queues supported | 818 | * @max_txq_num: Max # Tx queues supported |
@@ -853,26 +839,25 @@ struct il_hw_params { | |||
853 | u8 dma_chnl_num; | 839 | u8 dma_chnl_num; |
854 | u16 scd_bc_tbls_size; | 840 | u16 scd_bc_tbls_size; |
855 | u32 tfd_size; | 841 | u32 tfd_size; |
856 | u8 tx_chains_num; | 842 | u8 tx_chains_num; |
857 | u8 rx_chains_num; | 843 | u8 rx_chains_num; |
858 | u8 valid_tx_ant; | 844 | u8 valid_tx_ant; |
859 | u8 valid_rx_ant; | 845 | u8 valid_rx_ant; |
860 | u16 max_rxq_size; | 846 | u16 max_rxq_size; |
861 | u16 max_rxq_log; | 847 | u16 max_rxq_log; |
862 | u32 rx_page_order; | 848 | u32 rx_page_order; |
863 | u32 rx_wrt_ptr_reg; | 849 | u32 rx_wrt_ptr_reg; |
864 | u8 max_stations; | 850 | u8 max_stations; |
865 | u8 ht40_channel; | 851 | u8 ht40_channel; |
866 | u8 max_beacon_itrvl; /* in 1024 ms */ | 852 | u8 max_beacon_itrvl; /* in 1024 ms */ |
867 | u32 max_inst_size; | 853 | u32 max_inst_size; |
868 | u32 max_data_size; | 854 | u32 max_data_size; |
869 | u32 max_bsm_size; | 855 | u32 max_bsm_size; |
870 | u32 ct_kill_threshold; /* value in hw-dependent units */ | 856 | u32 ct_kill_threshold; /* value in hw-dependent units */ |
871 | u16 beacon_time_tsf_bits; | 857 | u16 beacon_time_tsf_bits; |
872 | const struct il_sensitivity_ranges *sens; | 858 | const struct il_sensitivity_ranges *sens; |
873 | }; | 859 | }; |
874 | 860 | ||
875 | |||
876 | /****************************************************************************** | 861 | /****************************************************************************** |
877 | * | 862 | * |
878 | * Functions implemented in core module which are forward declared here | 863 | * Functions implemented in core module which are forward declared here |
@@ -891,16 +876,19 @@ struct il_hw_params { | |||
891 | extern void il4965_update_chain_flags(struct il_priv *il); | 876 | extern void il4965_update_chain_flags(struct il_priv *il); |
892 | extern const u8 il_bcast_addr[ETH_ALEN]; | 877 | extern const u8 il_bcast_addr[ETH_ALEN]; |
893 | extern int il_queue_space(const struct il_queue *q); | 878 | extern int il_queue_space(const struct il_queue *q); |
894 | static inline int il_queue_used(const struct il_queue *q, int i) | 879 | static inline int |
880 | il_queue_used(const struct il_queue *q, int i) | ||
895 | { | 881 | { |
896 | return q->write_ptr >= q->read_ptr ? | 882 | return q->write_ptr >= q->read_ptr ? (i >= q->read_ptr && |
897 | (i >= q->read_ptr && i < q->write_ptr) : | 883 | i < q->write_ptr) : !(i < |
898 | !(i < q->read_ptr && i >= q->write_ptr); | 884 | q->read_ptr |
885 | && i >= | ||
886 | q-> | ||
887 | write_ptr); | ||
899 | } | 888 | } |
900 | 889 | ||
901 | 890 | static inline u8 | |
902 | static inline u8 il_get_cmd_idx(struct il_queue *q, u32 idx, | 891 | il_get_cmd_idx(struct il_queue *q, u32 idx, int is_huge) |
903 | int is_huge) | ||
904 | { | 892 | { |
905 | /* | 893 | /* |
906 | * This is for init calibration result and scan command which | 894 | * This is for init calibration result and scan command which |
@@ -914,7 +902,6 @@ static inline u8 il_get_cmd_idx(struct il_queue *q, u32 idx, | |||
914 | return idx & (q->n_win - 1); | 902 | return idx & (q->n_win - 1); |
915 | } | 903 | } |
916 | 904 | ||
917 | |||
918 | struct il_dma_ptr { | 905 | struct il_dma_ptr { |
919 | dma_addr_t dma; | 906 | dma_addr_t dma; |
920 | void *addr; | 907 | void *addr; |
@@ -974,14 +961,14 @@ enum il4965_false_alarm_state { | |||
974 | }; | 961 | }; |
975 | 962 | ||
976 | enum il4965_chain_noise_state { | 963 | enum il4965_chain_noise_state { |
977 | IL_CHAIN_NOISE_ALIVE = 0, /* must be 0 */ | 964 | IL_CHAIN_NOISE_ALIVE = 0, /* must be 0 */ |
978 | IL_CHAIN_NOISE_ACCUMULATE, | 965 | IL_CHAIN_NOISE_ACCUMULATE, |
979 | IL_CHAIN_NOISE_CALIBRATED, | 966 | IL_CHAIN_NOISE_CALIBRATED, |
980 | IL_CHAIN_NOISE_DONE, | 967 | IL_CHAIN_NOISE_DONE, |
981 | }; | 968 | }; |
982 | 969 | ||
983 | enum il4965_calib_enabled_state { | 970 | enum il4965_calib_enabled_state { |
984 | IL_CALIB_DISABLED = 0, /* must be 0 */ | 971 | IL_CALIB_DISABLED = 0, /* must be 0 */ |
985 | IL_CALIB_ENABLED = 1, | 972 | IL_CALIB_ENABLED = 1, |
986 | }; | 973 | }; |
987 | 974 | ||
@@ -1023,7 +1010,7 @@ struct il_sensitivity_data { | |||
1023 | u32 nrg_curr_state; | 1010 | u32 nrg_curr_state; |
1024 | u32 nrg_prev_state; | 1011 | u32 nrg_prev_state; |
1025 | u32 nrg_value[10]; | 1012 | u32 nrg_value[10]; |
1026 | u8 nrg_silence_rssi[NRG_NUM_PREV_STAT_L]; | 1013 | u8 nrg_silence_rssi[NRG_NUM_PREV_STAT_L]; |
1027 | u32 nrg_silence_ref; | 1014 | u32 nrg_silence_ref; |
1028 | u32 nrg_energy_idx; | 1015 | u32 nrg_energy_idx; |
1029 | u32 nrg_silence_idx; | 1016 | u32 nrg_silence_idx; |
@@ -1053,7 +1040,7 @@ struct il_chain_noise_data { | |||
1053 | u8 state; | 1040 | u8 state; |
1054 | }; | 1041 | }; |
1055 | 1042 | ||
1056 | #define EEPROM_SEM_TIMEOUT 10 /* milliseconds */ | 1043 | #define EEPROM_SEM_TIMEOUT 10 /* milliseconds */ |
1057 | #define EEPROM_SEM_RETRY_LIMIT 1000 /* number of attempts (not time) */ | 1044 | #define EEPROM_SEM_RETRY_LIMIT 1000 /* number of attempts (not time) */ |
1058 | 1045 | ||
1059 | #define IL_TRAFFIC_ENTRIES (256) | 1046 | #define IL_TRAFFIC_ENTRIES (256) |
@@ -1098,7 +1085,7 @@ enum il_mgmt_stats { | |||
1098 | }; | 1085 | }; |
1099 | /* control stats */ | 1086 | /* control stats */ |
1100 | enum il_ctrl_stats { | 1087 | enum il_ctrl_stats { |
1101 | CONTROL_BACK_REQ = 0, | 1088 | CONTROL_BACK_REQ = 0, |
1102 | CONTROL_BACK, | 1089 | CONTROL_BACK, |
1103 | CONTROL_PSPOLL, | 1090 | CONTROL_PSPOLL, |
1104 | CONTROL_RTS, | 1091 | CONTROL_RTS, |
@@ -1237,8 +1224,8 @@ struct il_priv { | |||
1237 | enum ieee80211_band band; | 1224 | enum ieee80211_band band; |
1238 | int alloc_rxb_page; | 1225 | int alloc_rxb_page; |
1239 | 1226 | ||
1240 | void (*handlers[IL_CN_MAX])(struct il_priv *il, | 1227 | void (*handlers[IL_CN_MAX]) (struct il_priv * il, |
1241 | struct il_rx_buf *rxb); | 1228 | struct il_rx_buf * rxb); |
1242 | 1229 | ||
1243 | struct ieee80211_supported_band bands[IEEE80211_NUM_BANDS]; | 1230 | struct ieee80211_supported_band bands[IEEE80211_NUM_BANDS]; |
1244 | 1231 | ||
@@ -1289,9 +1276,9 @@ struct il_priv { | |||
1289 | 1276 | ||
1290 | /* pci hardware address support */ | 1277 | /* pci hardware address support */ |
1291 | void __iomem *hw_base; | 1278 | void __iomem *hw_base; |
1292 | u32 hw_rev; | 1279 | u32 hw_rev; |
1293 | u32 hw_wa_rev; | 1280 | u32 hw_wa_rev; |
1294 | u8 rev_id; | 1281 | u8 rev_id; |
1295 | 1282 | ||
1296 | /* command queue number */ | 1283 | /* command queue number */ |
1297 | u8 cmd_queue; | 1284 | u8 cmd_queue; |
@@ -1303,9 +1290,9 @@ struct il_priv { | |||
1303 | struct mac_address addresses[1]; | 1290 | struct mac_address addresses[1]; |
1304 | 1291 | ||
1305 | /* uCode images, save to reload in case of failure */ | 1292 | /* uCode images, save to reload in case of failure */ |
1306 | int fw_idx; /* firmware we're trying to load */ | 1293 | int fw_idx; /* firmware we're trying to load */ |
1307 | u32 ucode_ver; /* version of ucode, copy of | 1294 | u32 ucode_ver; /* version of ucode, copy of |
1308 | il_ucode.ver */ | 1295 | il_ucode.ver */ |
1309 | struct fw_desc ucode_code; /* runtime inst */ | 1296 | struct fw_desc ucode_code; /* runtime inst */ |
1310 | struct fw_desc ucode_data; /* runtime data original */ | 1297 | struct fw_desc ucode_data; /* runtime data original */ |
1311 | struct fw_desc ucode_data_backup; /* runtime data save/restore */ | 1298 | struct fw_desc ucode_data_backup; /* runtime data save/restore */ |
@@ -1345,8 +1332,8 @@ struct il_priv { | |||
1345 | struct il_rx_queue rxq; | 1332 | struct il_rx_queue rxq; |
1346 | struct il_tx_queue *txq; | 1333 | struct il_tx_queue *txq; |
1347 | unsigned long txq_ctx_active_msk; | 1334 | unsigned long txq_ctx_active_msk; |
1348 | struct il_dma_ptr kw; /* keep warm address */ | 1335 | struct il_dma_ptr kw; /* keep warm address */ |
1349 | struct il_dma_ptr scd_bc_tbls; | 1336 | struct il_dma_ptr scd_bc_tbls; |
1350 | 1337 | ||
1351 | u32 scd_base_addr; /* scheduler sram base address */ | 1338 | u32 scd_base_addr; /* scheduler sram base address */ |
1352 | 1339 | ||
@@ -1362,7 +1349,7 @@ struct il_priv { | |||
1362 | struct il_power_mgr power_data; | 1349 | struct il_power_mgr power_data; |
1363 | 1350 | ||
1364 | /* context information */ | 1351 | /* context information */ |
1365 | u8 bssid[ETH_ALEN]; /* used only on 3945 but filled by core */ | 1352 | u8 bssid[ETH_ALEN]; /* used only on 3945 but filled by core */ |
1366 | 1353 | ||
1367 | /* station table variables */ | 1354 | /* station table variables */ |
1368 | 1355 | ||
@@ -1477,12 +1464,11 @@ struct il_priv { | |||
1477 | s8 tx_power_device_lmt; | 1464 | s8 tx_power_device_lmt; |
1478 | s8 tx_power_next; | 1465 | s8 tx_power_next; |
1479 | 1466 | ||
1480 | |||
1481 | #ifdef CONFIG_IWLEGACY_DEBUG | 1467 | #ifdef CONFIG_IWLEGACY_DEBUG |
1482 | /* debugging info */ | 1468 | /* debugging info */ |
1483 | u32 debug_level; /* per device debugging will override global | 1469 | u32 debug_level; /* per device debugging will override global |
1484 | il_debug_level if set */ | 1470 | il_debug_level if set */ |
1485 | #endif /* CONFIG_IWLEGACY_DEBUG */ | 1471 | #endif /* CONFIG_IWLEGACY_DEBUG */ |
1486 | #ifdef CONFIG_IWLEGACY_DEBUGFS | 1472 | #ifdef CONFIG_IWLEGACY_DEBUGFS |
1487 | /* debugfs */ | 1473 | /* debugfs */ |
1488 | u16 tx_traffic_idx; | 1474 | u16 tx_traffic_idx; |
@@ -1492,7 +1478,7 @@ struct il_priv { | |||
1492 | struct dentry *debugfs_dir; | 1478 | struct dentry *debugfs_dir; |
1493 | u32 dbgfs_sram_offset, dbgfs_sram_len; | 1479 | u32 dbgfs_sram_offset, dbgfs_sram_len; |
1494 | bool disable_ht40; | 1480 | bool disable_ht40; |
1495 | #endif /* CONFIG_IWLEGACY_DEBUGFS */ | 1481 | #endif /* CONFIG_IWLEGACY_DEBUGFS */ |
1496 | 1482 | ||
1497 | struct work_struct txpower_work; | 1483 | struct work_struct txpower_work; |
1498 | u32 disable_sens_cal; | 1484 | u32 disable_sens_cal; |
@@ -1506,25 +1492,26 @@ struct il_priv { | |||
1506 | struct led_classdev led; | 1492 | struct led_classdev led; |
1507 | unsigned long blink_on, blink_off; | 1493 | unsigned long blink_on, blink_off; |
1508 | bool led_registered; | 1494 | bool led_registered; |
1509 | }; /*il_priv */ | 1495 | }; /*il_priv */ |
1510 | 1496 | ||
1511 | static inline void il_txq_ctx_activate(struct il_priv *il, int txq_id) | 1497 | static inline void |
1498 | il_txq_ctx_activate(struct il_priv *il, int txq_id) | ||
1512 | { | 1499 | { |
1513 | set_bit(txq_id, &il->txq_ctx_active_msk); | 1500 | set_bit(txq_id, &il->txq_ctx_active_msk); |
1514 | } | 1501 | } |
1515 | 1502 | ||
1516 | static inline void il_txq_ctx_deactivate(struct il_priv *il, int txq_id) | 1503 | static inline void |
1504 | il_txq_ctx_deactivate(struct il_priv *il, int txq_id) | ||
1517 | { | 1505 | { |
1518 | clear_bit(txq_id, &il->txq_ctx_active_msk); | 1506 | clear_bit(txq_id, &il->txq_ctx_active_msk); |
1519 | } | 1507 | } |
1520 | 1508 | ||
1521 | static inline struct ieee80211_hdr * | 1509 | static inline struct ieee80211_hdr * |
1522 | il_tx_queue_get_hdr(struct il_priv *il, | 1510 | il_tx_queue_get_hdr(struct il_priv *il, int txq_id, int idx) |
1523 | int txq_id, int idx) | ||
1524 | { | 1511 | { |
1525 | if (il->txq[txq_id].txb[idx].skb) | 1512 | if (il->txq[txq_id].txb[idx].skb) |
1526 | return (struct ieee80211_hdr *)il->txq[txq_id]. | 1513 | return (struct ieee80211_hdr *)il->txq[txq_id].txb[idx].skb-> |
1527 | txb[idx].skb->data; | 1514 | data; |
1528 | return NULL; | 1515 | return NULL; |
1529 | } | 1516 | } |
1530 | 1517 | ||
@@ -1539,34 +1526,40 @@ il_rxon_ctx_from_vif(struct ieee80211_vif *vif) | |||
1539 | #define for_each_context(il, _ctx) \ | 1526 | #define for_each_context(il, _ctx) \ |
1540 | for (_ctx = &il->ctx; _ctx == &il->ctx; _ctx++) | 1527 | for (_ctx = &il->ctx; _ctx == &il->ctx; _ctx++) |
1541 | 1528 | ||
1542 | static inline int il_is_associated(struct il_priv *il) | 1529 | static inline int |
1530 | il_is_associated(struct il_priv *il) | ||
1543 | { | 1531 | { |
1544 | return (il->ctx.active.filter_flags & RXON_FILTER_ASSOC_MSK) ? 1 : 0; | 1532 | return (il->ctx.active.filter_flags & RXON_FILTER_ASSOC_MSK) ? 1 : 0; |
1545 | } | 1533 | } |
1546 | 1534 | ||
1547 | static inline int il_is_any_associated(struct il_priv *il) | 1535 | static inline int |
1536 | il_is_any_associated(struct il_priv *il) | ||
1548 | { | 1537 | { |
1549 | return il_is_associated(il); | 1538 | return il_is_associated(il); |
1550 | } | 1539 | } |
1551 | 1540 | ||
1552 | static inline int il_is_associated_ctx(struct il_rxon_context *ctx) | 1541 | static inline int |
1542 | il_is_associated_ctx(struct il_rxon_context *ctx) | ||
1553 | { | 1543 | { |
1554 | return (ctx->active.filter_flags & RXON_FILTER_ASSOC_MSK) ? 1 : 0; | 1544 | return (ctx->active.filter_flags & RXON_FILTER_ASSOC_MSK) ? 1 : 0; |
1555 | } | 1545 | } |
1556 | 1546 | ||
1557 | static inline int il_is_channel_valid(const struct il_channel_info *ch_info) | 1547 | static inline int |
1548 | il_is_channel_valid(const struct il_channel_info *ch_info) | ||
1558 | { | 1549 | { |
1559 | if (ch_info == NULL) | 1550 | if (ch_info == NULL) |
1560 | return 0; | 1551 | return 0; |
1561 | return (ch_info->flags & EEPROM_CHANNEL_VALID) ? 1 : 0; | 1552 | return (ch_info->flags & EEPROM_CHANNEL_VALID) ? 1 : 0; |
1562 | } | 1553 | } |
1563 | 1554 | ||
1564 | static inline int il_is_channel_radar(const struct il_channel_info *ch_info) | 1555 | static inline int |
1556 | il_is_channel_radar(const struct il_channel_info *ch_info) | ||
1565 | { | 1557 | { |
1566 | return (ch_info->flags & EEPROM_CHANNEL_RADAR) ? 1 : 0; | 1558 | return (ch_info->flags & EEPROM_CHANNEL_RADAR) ? 1 : 0; |
1567 | } | 1559 | } |
1568 | 1560 | ||
1569 | static inline u8 il_is_channel_a_band(const struct il_channel_info *ch_info) | 1561 | static inline u8 |
1562 | il_is_channel_a_band(const struct il_channel_info *ch_info) | ||
1570 | { | 1563 | { |
1571 | return ch_info->band == IEEE80211_BAND_5GHZ; | 1564 | return ch_info->band == IEEE80211_BAND_5GHZ; |
1572 | } | 1565 | } |
@@ -1583,7 +1576,6 @@ il_is_channel_ibss(const struct il_channel_info *ch) | |||
1583 | return (ch->flags & EEPROM_CHANNEL_IBSS) ? 1 : 0; | 1576 | return (ch->flags & EEPROM_CHANNEL_IBSS) ? 1 : 0; |
1584 | } | 1577 | } |
1585 | 1578 | ||
1586 | |||
1587 | static inline void | 1579 | static inline void |
1588 | __il_free_pages(struct il_priv *il, struct page *page) | 1580 | __il_free_pages(struct il_priv *il, struct page *page) |
1589 | { | 1581 | { |
@@ -1591,7 +1583,8 @@ __il_free_pages(struct il_priv *il, struct page *page) | |||
1591 | il->alloc_rxb_page--; | 1583 | il->alloc_rxb_page--; |
1592 | } | 1584 | } |
1593 | 1585 | ||
1594 | static inline void il_free_pages(struct il_priv *il, unsigned long page) | 1586 | static inline void |
1587 | il_free_pages(struct il_priv *il, unsigned long page) | ||
1595 | { | 1588 | { |
1596 | free_pages(page, il->hw_params.rx_page_order); | 1589 | free_pages(page, il->hw_params.rx_page_order); |
1597 | il->alloc_rxb_page--; | 1590 | il->alloc_rxb_page--; |
@@ -1615,77 +1608,74 @@ static inline void il_free_pages(struct il_priv *il, unsigned long page) | |||
1615 | #define IL_CMD(x) case x: return #x | 1608 | #define IL_CMD(x) case x: return #x |
1616 | 1609 | ||
1617 | /* Size of one Rx buffer in host DRAM */ | 1610 | /* Size of one Rx buffer in host DRAM */ |
1618 | #define IL_RX_BUF_SIZE_3K (3 * 1000) /* 3945 only */ | 1611 | #define IL_RX_BUF_SIZE_3K (3 * 1000) /* 3945 only */ |
1619 | #define IL_RX_BUF_SIZE_4K (4 * 1024) | 1612 | #define IL_RX_BUF_SIZE_4K (4 * 1024) |
1620 | #define IL_RX_BUF_SIZE_8K (8 * 1024) | 1613 | #define IL_RX_BUF_SIZE_8K (8 * 1024) |
1621 | 1614 | ||
1622 | struct il_hcmd_ops { | 1615 | struct il_hcmd_ops { |
1623 | int (*rxon_assoc)(struct il_priv *il, struct il_rxon_context *ctx); | 1616 | int (*rxon_assoc) (struct il_priv * il, struct il_rxon_context * ctx); |
1624 | int (*commit_rxon)(struct il_priv *il, struct il_rxon_context *ctx); | 1617 | int (*commit_rxon) (struct il_priv * il, struct il_rxon_context * ctx); |
1625 | void (*set_rxon_chain)(struct il_priv *il, | 1618 | void (*set_rxon_chain) (struct il_priv * il, |
1626 | struct il_rxon_context *ctx); | 1619 | struct il_rxon_context * ctx); |
1627 | }; | 1620 | }; |
1628 | 1621 | ||
1629 | struct il_hcmd_utils_ops { | 1622 | struct il_hcmd_utils_ops { |
1630 | u16 (*get_hcmd_size)(u8 cmd_id, u16 len); | 1623 | u16(*get_hcmd_size) (u8 cmd_id, u16 len); |
1631 | u16 (*build_addsta_hcmd)(const struct il_addsta_cmd *cmd, | 1624 | u16(*build_addsta_hcmd) (const struct il_addsta_cmd * cmd, u8 * data); |
1632 | u8 *data); | 1625 | int (*request_scan) (struct il_priv * il, struct ieee80211_vif * vif); |
1633 | int (*request_scan)(struct il_priv *il, struct ieee80211_vif *vif); | 1626 | void (*post_scan) (struct il_priv * il); |
1634 | void (*post_scan)(struct il_priv *il); | ||
1635 | }; | 1627 | }; |
1636 | 1628 | ||
1637 | struct il_apm_ops { | 1629 | struct il_apm_ops { |
1638 | int (*init)(struct il_priv *il); | 1630 | int (*init) (struct il_priv * il); |
1639 | void (*config)(struct il_priv *il); | 1631 | void (*config) (struct il_priv * il); |
1640 | }; | 1632 | }; |
1641 | 1633 | ||
1642 | struct il_debugfs_ops { | 1634 | struct il_debugfs_ops { |
1643 | ssize_t (*rx_stats_read)(struct file *file, char __user *user_buf, | 1635 | ssize_t(*rx_stats_read) (struct file * file, char __user * user_buf, |
1644 | size_t count, loff_t *ppos); | 1636 | size_t count, loff_t * ppos); |
1645 | ssize_t (*tx_stats_read)(struct file *file, char __user *user_buf, | 1637 | ssize_t(*tx_stats_read) (struct file * file, char __user * user_buf, |
1646 | size_t count, loff_t *ppos); | 1638 | size_t count, loff_t * ppos); |
1647 | ssize_t (*general_stats_read)(struct file *file, char __user *user_buf, | 1639 | ssize_t(*general_stats_read) (struct file * file, |
1648 | size_t count, loff_t *ppos); | 1640 | char __user * user_buf, size_t count, |
1641 | loff_t * ppos); | ||
1649 | }; | 1642 | }; |
1650 | 1643 | ||
1651 | struct il_temp_ops { | 1644 | struct il_temp_ops { |
1652 | void (*temperature)(struct il_priv *il); | 1645 | void (*temperature) (struct il_priv * il); |
1653 | }; | 1646 | }; |
1654 | 1647 | ||
1655 | struct il_lib_ops { | 1648 | struct il_lib_ops { |
1656 | /* set hw dependent parameters */ | 1649 | /* set hw dependent parameters */ |
1657 | int (*set_hw_params)(struct il_priv *il); | 1650 | int (*set_hw_params) (struct il_priv * il); |
1658 | /* Handling TX */ | 1651 | /* Handling TX */ |
1659 | void (*txq_update_byte_cnt_tbl)(struct il_priv *il, | 1652 | void (*txq_update_byte_cnt_tbl) (struct il_priv * il, |
1660 | struct il_tx_queue *txq, | 1653 | struct il_tx_queue * txq, |
1661 | u16 byte_cnt); | 1654 | u16 byte_cnt); |
1662 | int (*txq_attach_buf_to_tfd)(struct il_priv *il, | 1655 | int (*txq_attach_buf_to_tfd) (struct il_priv * il, |
1663 | struct il_tx_queue *txq, | 1656 | struct il_tx_queue * txq, dma_addr_t addr, |
1664 | dma_addr_t addr, | 1657 | u16 len, u8 reset, u8 pad); |
1665 | u16 len, u8 reset, u8 pad); | 1658 | void (*txq_free_tfd) (struct il_priv * il, struct il_tx_queue * txq); |
1666 | void (*txq_free_tfd)(struct il_priv *il, | 1659 | int (*txq_init) (struct il_priv * il, struct il_tx_queue * txq); |
1667 | struct il_tx_queue *txq); | ||
1668 | int (*txq_init)(struct il_priv *il, | ||
1669 | struct il_tx_queue *txq); | ||
1670 | /* setup Rx handler */ | 1660 | /* setup Rx handler */ |
1671 | void (*handler_setup)(struct il_priv *il); | 1661 | void (*handler_setup) (struct il_priv * il); |
1672 | /* alive notification after init uCode load */ | 1662 | /* alive notification after init uCode load */ |
1673 | void (*init_alive_start)(struct il_priv *il); | 1663 | void (*init_alive_start) (struct il_priv * il); |
1674 | /* check validity of rtc data address */ | 1664 | /* check validity of rtc data address */ |
1675 | int (*is_valid_rtc_data_addr)(u32 addr); | 1665 | int (*is_valid_rtc_data_addr) (u32 addr); |
1676 | /* 1st ucode load */ | 1666 | /* 1st ucode load */ |
1677 | int (*load_ucode)(struct il_priv *il); | 1667 | int (*load_ucode) (struct il_priv * il); |
1678 | 1668 | ||
1679 | void (*dump_nic_error_log)(struct il_priv *il); | 1669 | void (*dump_nic_error_log) (struct il_priv * il); |
1680 | int (*dump_fh)(struct il_priv *il, char **buf, bool display); | 1670 | int (*dump_fh) (struct il_priv * il, char **buf, bool display); |
1681 | int (*set_channel_switch)(struct il_priv *il, | 1671 | int (*set_channel_switch) (struct il_priv * il, |
1682 | struct ieee80211_channel_switch *ch_switch); | 1672 | struct ieee80211_channel_switch * ch_switch); |
1683 | /* power management */ | 1673 | /* power management */ |
1684 | struct il_apm_ops apm_ops; | 1674 | struct il_apm_ops apm_ops; |
1685 | 1675 | ||
1686 | /* power */ | 1676 | /* power */ |
1687 | int (*send_tx_power) (struct il_priv *il); | 1677 | int (*send_tx_power) (struct il_priv * il); |
1688 | void (*update_chain_flags)(struct il_priv *il); | 1678 | void (*update_chain_flags) (struct il_priv * il); |
1689 | 1679 | ||
1690 | /* eeprom operations */ | 1680 | /* eeprom operations */ |
1691 | struct il_eeprom_ops eeprom_ops; | 1681 | struct il_eeprom_ops eeprom_ops; |
@@ -1698,16 +1688,16 @@ struct il_lib_ops { | |||
1698 | }; | 1688 | }; |
1699 | 1689 | ||
1700 | struct il_led_ops { | 1690 | struct il_led_ops { |
1701 | int (*cmd)(struct il_priv *il, struct il_led_cmd *led_cmd); | 1691 | int (*cmd) (struct il_priv * il, struct il_led_cmd * led_cmd); |
1702 | }; | 1692 | }; |
1703 | 1693 | ||
1704 | struct il_legacy_ops { | 1694 | struct il_legacy_ops { |
1705 | void (*post_associate)(struct il_priv *il); | 1695 | void (*post_associate) (struct il_priv * il); |
1706 | void (*config_ap)(struct il_priv *il); | 1696 | void (*config_ap) (struct il_priv * il); |
1707 | /* station management */ | 1697 | /* station management */ |
1708 | int (*update_bcast_stations)(struct il_priv *il); | 1698 | int (*update_bcast_stations) (struct il_priv * il); |
1709 | int (*manage_ibss_station)(struct il_priv *il, | 1699 | int (*manage_ibss_station) (struct il_priv * il, |
1710 | struct ieee80211_vif *vif, bool add); | 1700 | struct ieee80211_vif * vif, bool add); |
1711 | }; | 1701 | }; |
1712 | 1702 | ||
1713 | struct il_ops { | 1703 | struct il_ops { |
@@ -1726,7 +1716,7 @@ struct il_mod_params { | |||
1726 | int num_of_queues; /* def: HW dependent */ | 1716 | int num_of_queues; /* def: HW dependent */ |
1727 | int disable_11n; /* def: 0 = 11n capabilities enabled */ | 1717 | int disable_11n; /* def: 0 = 11n capabilities enabled */ |
1728 | int amsdu_size_8K; /* def: 1 = enable 8K amsdu size */ | 1718 | int amsdu_size_8K; /* def: 1 = enable 8K amsdu size */ |
1729 | int antenna; /* def: 0 = both antennas (use diversity) */ | 1719 | int antenna; /* def: 0 = both antennas (use diversity) */ |
1730 | int restart_fw; /* def: 1 = restart firmware */ | 1720 | int restart_fw; /* def: 1 = restart firmware */ |
1731 | }; | 1721 | }; |
1732 | 1722 | ||
@@ -1746,7 +1736,7 @@ struct il_mod_params { | |||
1746 | struct il_base_params { | 1736 | struct il_base_params { |
1747 | int eeprom_size; | 1737 | int eeprom_size; |
1748 | int num_of_queues; /* def: HW dependent */ | 1738 | int num_of_queues; /* def: HW dependent */ |
1749 | int num_of_ampdu_queues;/* def: HW dependent */ | 1739 | int num_of_ampdu_queues; /* def: HW dependent */ |
1750 | /* for il_apm_init() */ | 1740 | /* for il_apm_init() */ |
1751 | u32 pll_cfg_val; | 1741 | u32 pll_cfg_val; |
1752 | bool set_l0s; | 1742 | bool set_l0s; |
@@ -1821,11 +1811,11 @@ struct il_cfg { | |||
1821 | const char *fw_name_pre; | 1811 | const char *fw_name_pre; |
1822 | const unsigned int ucode_api_max; | 1812 | const unsigned int ucode_api_max; |
1823 | const unsigned int ucode_api_min; | 1813 | const unsigned int ucode_api_min; |
1824 | u8 valid_tx_ant; | 1814 | u8 valid_tx_ant; |
1825 | u8 valid_rx_ant; | 1815 | u8 valid_rx_ant; |
1826 | unsigned int sku; | 1816 | unsigned int sku; |
1827 | u16 eeprom_ver; | 1817 | u16 eeprom_ver; |
1828 | u16 eeprom_calib_ver; | 1818 | u16 eeprom_calib_ver; |
1829 | const struct il_ops *ops; | 1819 | const struct il_ops *ops; |
1830 | /* module based parameters which can be set from modprobe cmd */ | 1820 | /* module based parameters which can be set from modprobe cmd */ |
1831 | const struct il_mod_params *mod_params; | 1821 | const struct il_mod_params *mod_params; |
@@ -1841,46 +1831,33 @@ struct il_cfg { | |||
1841 | ***************************/ | 1831 | ***************************/ |
1842 | 1832 | ||
1843 | struct ieee80211_hw *il_alloc_all(struct il_cfg *cfg); | 1833 | struct ieee80211_hw *il_alloc_all(struct il_cfg *cfg); |
1844 | int il_mac_conf_tx(struct ieee80211_hw *hw, | 1834 | int il_mac_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
1845 | struct ieee80211_vif *vif, u16 queue, | 1835 | u16 queue, const struct ieee80211_tx_queue_params *params); |
1846 | const struct ieee80211_tx_queue_params *params); | ||
1847 | int il_mac_tx_last_beacon(struct ieee80211_hw *hw); | 1836 | int il_mac_tx_last_beacon(struct ieee80211_hw *hw); |
1848 | void il_set_rxon_hwcrypto(struct il_priv *il, | 1837 | |
1849 | struct il_rxon_context *ctx, | 1838 | void il_set_rxon_hwcrypto(struct il_priv *il, struct il_rxon_context *ctx, |
1850 | int hw_decrypt); | 1839 | int hw_decrypt); |
1851 | int il_check_rxon_cmd(struct il_priv *il, | 1840 | int il_check_rxon_cmd(struct il_priv *il, struct il_rxon_context *ctx); |
1852 | struct il_rxon_context *ctx); | 1841 | int il_full_rxon_required(struct il_priv *il, struct il_rxon_context *ctx); |
1853 | int il_full_rxon_required(struct il_priv *il, | 1842 | int il_set_rxon_channel(struct il_priv *il, struct ieee80211_channel *ch, |
1854 | struct il_rxon_context *ctx); | ||
1855 | int il_set_rxon_channel(struct il_priv *il, | ||
1856 | struct ieee80211_channel *ch, | ||
1857 | struct il_rxon_context *ctx); | 1843 | struct il_rxon_context *ctx); |
1858 | void il_set_flags_for_band(struct il_priv *il, | 1844 | void il_set_flags_for_band(struct il_priv *il, struct il_rxon_context *ctx, |
1859 | struct il_rxon_context *ctx, | 1845 | enum ieee80211_band band, struct ieee80211_vif *vif); |
1860 | enum ieee80211_band band, | 1846 | u8 il_get_single_channel_number(struct il_priv *il, enum ieee80211_band band); |
1861 | struct ieee80211_vif *vif); | 1847 | void il_set_rxon_ht(struct il_priv *il, struct il_ht_config *ht_conf); |
1862 | u8 il_get_single_channel_number(struct il_priv *il, | 1848 | bool il_is_ht40_tx_allowed(struct il_priv *il, struct il_rxon_context *ctx, |
1863 | enum ieee80211_band band); | 1849 | struct ieee80211_sta_ht_cap *ht_cap); |
1864 | void il_set_rxon_ht(struct il_priv *il, | ||
1865 | struct il_ht_config *ht_conf); | ||
1866 | bool il_is_ht40_tx_allowed(struct il_priv *il, | ||
1867 | struct il_rxon_context *ctx, | ||
1868 | struct ieee80211_sta_ht_cap *ht_cap); | ||
1869 | void il_connection_init_rx_config(struct il_priv *il, | 1850 | void il_connection_init_rx_config(struct il_priv *il, |
1870 | struct il_rxon_context *ctx); | 1851 | struct il_rxon_context *ctx); |
1871 | void il_set_rate(struct il_priv *il); | 1852 | void il_set_rate(struct il_priv *il); |
1872 | int il_set_decrypted_flag(struct il_priv *il, | 1853 | int il_set_decrypted_flag(struct il_priv *il, struct ieee80211_hdr *hdr, |
1873 | struct ieee80211_hdr *hdr, | 1854 | u32 decrypt_res, struct ieee80211_rx_status *stats); |
1874 | u32 decrypt_res, | ||
1875 | struct ieee80211_rx_status *stats); | ||
1876 | void il_irq_handle_error(struct il_priv *il); | 1855 | void il_irq_handle_error(struct il_priv *il); |
1877 | int il_mac_add_interface(struct ieee80211_hw *hw, | 1856 | int il_mac_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif); |
1878 | struct ieee80211_vif *vif); | ||
1879 | void il_mac_remove_interface(struct ieee80211_hw *hw, | 1857 | void il_mac_remove_interface(struct ieee80211_hw *hw, |
1880 | struct ieee80211_vif *vif); | 1858 | struct ieee80211_vif *vif); |
1881 | int il_mac_change_interface(struct ieee80211_hw *hw, | 1859 | int il_mac_change_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
1882 | struct ieee80211_vif *vif, | 1860 | enum nl80211_iftype newtype, bool newp2p); |
1883 | enum nl80211_iftype newtype, bool newp2p); | ||
1884 | int il_alloc_txq_mem(struct il_priv *il); | 1861 | int il_alloc_txq_mem(struct il_priv *il); |
1885 | void il_txq_mem(struct il_priv *il); | 1862 | void il_txq_mem(struct il_priv *il); |
1886 | 1863 | ||
@@ -1888,48 +1865,54 @@ void il_txq_mem(struct il_priv *il); | |||
1888 | int il_alloc_traffic_mem(struct il_priv *il); | 1865 | int il_alloc_traffic_mem(struct il_priv *il); |
1889 | void il_free_traffic_mem(struct il_priv *il); | 1866 | void il_free_traffic_mem(struct il_priv *il); |
1890 | void il_reset_traffic_log(struct il_priv *il); | 1867 | void il_reset_traffic_log(struct il_priv *il); |
1891 | void il_dbg_log_tx_data_frame(struct il_priv *il, | 1868 | void il_dbg_log_tx_data_frame(struct il_priv *il, u16 length, |
1892 | u16 length, struct ieee80211_hdr *header); | 1869 | struct ieee80211_hdr *header); |
1893 | void il_dbg_log_rx_data_frame(struct il_priv *il, | 1870 | void il_dbg_log_rx_data_frame(struct il_priv *il, u16 length, |
1894 | u16 length, struct ieee80211_hdr *header); | 1871 | struct ieee80211_hdr *header); |
1895 | const char *il_get_mgmt_string(int cmd); | 1872 | const char *il_get_mgmt_string(int cmd); |
1896 | const char *il_get_ctrl_string(int cmd); | 1873 | const char *il_get_ctrl_string(int cmd); |
1897 | void il_clear_traffic_stats(struct il_priv *il); | 1874 | void il_clear_traffic_stats(struct il_priv *il); |
1898 | void il_update_stats(struct il_priv *il, bool is_tx, __le16 fc, | 1875 | void il_update_stats(struct il_priv *il, bool is_tx, __le16 fc, u16 len); |
1899 | u16 len); | ||
1900 | #else | 1876 | #else |
1901 | static inline int il_alloc_traffic_mem(struct il_priv *il) | 1877 | static inline int |
1878 | il_alloc_traffic_mem(struct il_priv *il) | ||
1902 | { | 1879 | { |
1903 | return 0; | 1880 | return 0; |
1904 | } | 1881 | } |
1905 | static inline void il_free_traffic_mem(struct il_priv *il) | 1882 | |
1883 | static inline void | ||
1884 | il_free_traffic_mem(struct il_priv *il) | ||
1906 | { | 1885 | { |
1907 | } | 1886 | } |
1908 | static inline void il_reset_traffic_log(struct il_priv *il) | 1887 | |
1888 | static inline void | ||
1889 | il_reset_traffic_log(struct il_priv *il) | ||
1909 | { | 1890 | { |
1910 | } | 1891 | } |
1911 | static inline void il_dbg_log_tx_data_frame(struct il_priv *il, | 1892 | |
1912 | u16 length, struct ieee80211_hdr *header) | 1893 | static inline void |
1894 | il_dbg_log_tx_data_frame(struct il_priv *il, u16 length, | ||
1895 | struct ieee80211_hdr *header) | ||
1913 | { | 1896 | { |
1914 | } | 1897 | } |
1915 | static inline void il_dbg_log_rx_data_frame(struct il_priv *il, | 1898 | |
1916 | u16 length, struct ieee80211_hdr *header) | 1899 | static inline void |
1900 | il_dbg_log_rx_data_frame(struct il_priv *il, u16 length, | ||
1901 | struct ieee80211_hdr *header) | ||
1917 | { | 1902 | { |
1918 | } | 1903 | } |
1919 | static inline void il_update_stats(struct il_priv *il, bool is_tx, | 1904 | |
1920 | __le16 fc, u16 len) | 1905 | static inline void |
1906 | il_update_stats(struct il_priv *il, bool is_tx, __le16 fc, u16 len) | ||
1921 | { | 1907 | { |
1922 | } | 1908 | } |
1923 | #endif | 1909 | #endif |
1924 | /***************************************************** | 1910 | /***************************************************** |
1925 | * RX handlers. | 1911 | * RX handlers. |
1926 | * **************************************************/ | 1912 | * **************************************************/ |
1927 | void il_hdl_pm_sleep(struct il_priv *il, | 1913 | void il_hdl_pm_sleep(struct il_priv *il, struct il_rx_buf *rxb); |
1928 | struct il_rx_buf *rxb); | 1914 | void il_hdl_pm_debug_stats(struct il_priv *il, struct il_rx_buf *rxb); |
1929 | void il_hdl_pm_debug_stats(struct il_priv *il, | 1915 | void il_hdl_error(struct il_priv *il, struct il_rx_buf *rxb); |
1930 | struct il_rx_buf *rxb); | ||
1931 | void il_hdl_error(struct il_priv *il, | ||
1932 | struct il_rx_buf *rxb); | ||
1933 | 1916 | ||
1934 | /***************************************************** | 1917 | /***************************************************** |
1935 | * RX | 1918 | * RX |
@@ -1937,16 +1920,12 @@ void il_hdl_error(struct il_priv *il, | |||
1937 | void il_cmd_queue_unmap(struct il_priv *il); | 1920 | void il_cmd_queue_unmap(struct il_priv *il); |
1938 | void il_cmd_queue_free(struct il_priv *il); | 1921 | void il_cmd_queue_free(struct il_priv *il); |
1939 | int il_rx_queue_alloc(struct il_priv *il); | 1922 | int il_rx_queue_alloc(struct il_priv *il); |
1940 | void il_rx_queue_update_write_ptr(struct il_priv *il, | 1923 | void il_rx_queue_update_write_ptr(struct il_priv *il, struct il_rx_queue *q); |
1941 | struct il_rx_queue *q); | ||
1942 | int il_rx_queue_space(const struct il_rx_queue *q); | 1924 | int il_rx_queue_space(const struct il_rx_queue *q); |
1943 | void il_tx_cmd_complete(struct il_priv *il, | 1925 | void il_tx_cmd_complete(struct il_priv *il, struct il_rx_buf *rxb); |
1944 | struct il_rx_buf *rxb); | ||
1945 | /* Handlers */ | 1926 | /* Handlers */ |
1946 | void il_hdl_spectrum_measurement(struct il_priv *il, | 1927 | void il_hdl_spectrum_measurement(struct il_priv *il, struct il_rx_buf *rxb); |
1947 | struct il_rx_buf *rxb); | 1928 | void il_recover_from_stats(struct il_priv *il, struct il_rx_pkt *pkt); |
1948 | void il_recover_from_stats(struct il_priv *il, | ||
1949 | struct il_rx_pkt *pkt); | ||
1950 | void il_chswitch_done(struct il_priv *il, bool is_success); | 1929 | void il_chswitch_done(struct il_priv *il, bool is_success); |
1951 | void il_hdl_csa(struct il_priv *il, struct il_rx_buf *rxb); | 1930 | void il_hdl_csa(struct il_priv *il, struct il_rx_buf *rxb); |
1952 | 1931 | ||
@@ -1955,13 +1934,11 @@ void il_hdl_csa(struct il_priv *il, struct il_rx_buf *rxb); | |||
1955 | /***************************************************** | 1934 | /***************************************************** |
1956 | * TX | 1935 | * TX |
1957 | ******************************************************/ | 1936 | ******************************************************/ |
1958 | void il_txq_update_write_ptr(struct il_priv *il, | 1937 | void il_txq_update_write_ptr(struct il_priv *il, struct il_tx_queue *txq); |
1959 | struct il_tx_queue *txq); | 1938 | int il_tx_queue_init(struct il_priv *il, struct il_tx_queue *txq, int slots_num, |
1960 | int il_tx_queue_init(struct il_priv *il, struct il_tx_queue *txq, | 1939 | u32 txq_id); |
1961 | int slots_num, u32 txq_id); | 1940 | void il_tx_queue_reset(struct il_priv *il, struct il_tx_queue *txq, |
1962 | void il_tx_queue_reset(struct il_priv *il, | 1941 | int slots_num, u32 txq_id); |
1963 | struct il_tx_queue *txq, | ||
1964 | int slots_num, u32 txq_id); | ||
1965 | void il_tx_queue_unmap(struct il_priv *il, int txq_id); | 1942 | void il_tx_queue_unmap(struct il_priv *il, int txq_id); |
1966 | void il_tx_queue_free(struct il_priv *il, int txq_id); | 1943 | void il_tx_queue_free(struct il_priv *il, int txq_id); |
1967 | void il_setup_watchdog(struct il_priv *il); | 1944 | void il_setup_watchdog(struct il_priv *il); |
@@ -1974,8 +1951,7 @@ int il_set_tx_power(struct il_priv *il, s8 tx_power, bool force); | |||
1974 | * Rate | 1951 | * Rate |
1975 | ******************************************************************************/ | 1952 | ******************************************************************************/ |
1976 | 1953 | ||
1977 | u8 il_get_lowest_plcp(struct il_priv *il, | 1954 | u8 il_get_lowest_plcp(struct il_priv *il, struct il_rxon_context *ctx); |
1978 | struct il_rxon_context *ctx); | ||
1979 | 1955 | ||
1980 | /******************************************************************************* | 1956 | /******************************************************************************* |
1981 | * Scanning | 1957 | * Scanning |
@@ -1984,21 +1960,17 @@ void il_init_scan_params(struct il_priv *il); | |||
1984 | int il_scan_cancel(struct il_priv *il); | 1960 | int il_scan_cancel(struct il_priv *il); |
1985 | int il_scan_cancel_timeout(struct il_priv *il, unsigned long ms); | 1961 | int il_scan_cancel_timeout(struct il_priv *il, unsigned long ms); |
1986 | void il_force_scan_end(struct il_priv *il); | 1962 | void il_force_scan_end(struct il_priv *il); |
1987 | int il_mac_hw_scan(struct ieee80211_hw *hw, | 1963 | int il_mac_hw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
1988 | struct ieee80211_vif *vif, | 1964 | struct cfg80211_scan_request *req); |
1989 | struct cfg80211_scan_request *req); | ||
1990 | void il_internal_short_hw_scan(struct il_priv *il); | 1965 | void il_internal_short_hw_scan(struct il_priv *il); |
1991 | int il_force_reset(struct il_priv *il, bool external); | 1966 | int il_force_reset(struct il_priv *il, bool external); |
1992 | u16 il_fill_probe_req(struct il_priv *il, | 1967 | u16 il_fill_probe_req(struct il_priv *il, struct ieee80211_mgmt *frame, |
1993 | struct ieee80211_mgmt *frame, | 1968 | const u8 * ta, const u8 * ie, int ie_len, int left); |
1994 | const u8 *ta, const u8 *ie, int ie_len, int left); | ||
1995 | void il_setup_rx_scan_handlers(struct il_priv *il); | 1969 | void il_setup_rx_scan_handlers(struct il_priv *il); |
1996 | u16 il_get_active_dwell_time(struct il_priv *il, | 1970 | u16 il_get_active_dwell_time(struct il_priv *il, enum ieee80211_band band, |
1997 | enum ieee80211_band band, | 1971 | u8 n_probes); |
1998 | u8 n_probes); | 1972 | u16 il_get_passive_dwell_time(struct il_priv *il, enum ieee80211_band band, |
1999 | u16 il_get_passive_dwell_time(struct il_priv *il, | 1973 | struct ieee80211_vif *vif); |
2000 | enum ieee80211_band band, | ||
2001 | struct ieee80211_vif *vif); | ||
2002 | void il_setup_scan_deferred_work(struct il_priv *il); | 1974 | void il_setup_scan_deferred_work(struct il_priv *il); |
2003 | void il_cancel_scan_deferred_work(struct il_priv *il); | 1975 | void il_cancel_scan_deferred_work(struct il_priv *il); |
2004 | 1976 | ||
@@ -2008,8 +1980,8 @@ void il_cancel_scan_deferred_work(struct il_priv *il); | |||
2008 | * time if it's a quiet channel (nothing responded to our probe, and there's | 1980 | * time if it's a quiet channel (nothing responded to our probe, and there's |
2009 | * no other traffic). | 1981 | * no other traffic). |
2010 | * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */ | 1982 | * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */ |
2011 | #define IL_ACTIVE_QUIET_TIME cpu_to_le16(10) /* msec */ | 1983 | #define IL_ACTIVE_QUIET_TIME cpu_to_le16(10) /* msec */ |
2012 | #define IL_PLCP_QUIET_THRESH cpu_to_le16(1) /* packets */ | 1984 | #define IL_PLCP_QUIET_THRESH cpu_to_le16(1) /* packets */ |
2013 | 1985 | ||
2014 | #define IL_SCAN_CHECK_WATCHDOG (HZ * 7) | 1986 | #define IL_SCAN_CHECK_WATCHDOG (HZ * 7) |
2015 | 1987 | ||
@@ -2018,25 +1990,23 @@ void il_cancel_scan_deferred_work(struct il_priv *il); | |||
2018 | *****************************************************/ | 1990 | *****************************************************/ |
2019 | 1991 | ||
2020 | const char *il_get_cmd_string(u8 cmd); | 1992 | const char *il_get_cmd_string(u8 cmd); |
2021 | int __must_check il_send_cmd_sync(struct il_priv *il, | 1993 | int __must_check il_send_cmd_sync(struct il_priv *il, struct il_host_cmd *cmd); |
2022 | struct il_host_cmd *cmd); | ||
2023 | int il_send_cmd(struct il_priv *il, struct il_host_cmd *cmd); | 1994 | int il_send_cmd(struct il_priv *il, struct il_host_cmd *cmd); |
2024 | int __must_check il_send_cmd_pdu(struct il_priv *il, u8 id, | 1995 | int __must_check il_send_cmd_pdu(struct il_priv *il, u8 id, u16 len, |
2025 | u16 len, const void *data); | 1996 | const void *data); |
2026 | int il_send_cmd_pdu_async(struct il_priv *il, u8 id, u16 len, | 1997 | int il_send_cmd_pdu_async(struct il_priv *il, u8 id, u16 len, const void *data, |
2027 | const void *data, | 1998 | void (*callback) (struct il_priv * il, |
2028 | void (*callback)(struct il_priv *il, | 1999 | struct il_device_cmd * cmd, |
2029 | struct il_device_cmd *cmd, | 2000 | struct il_rx_pkt * pkt)); |
2030 | struct il_rx_pkt *pkt)); | ||
2031 | 2001 | ||
2032 | int il_enqueue_hcmd(struct il_priv *il, struct il_host_cmd *cmd); | 2002 | int il_enqueue_hcmd(struct il_priv *il, struct il_host_cmd *cmd); |
2033 | 2003 | ||
2034 | |||
2035 | /***************************************************** | 2004 | /***************************************************** |
2036 | * PCI * | 2005 | * PCI * |
2037 | *****************************************************/ | 2006 | *****************************************************/ |
2038 | 2007 | ||
2039 | static inline u16 il_pcie_link_ctl(struct il_priv *il) | 2008 | static inline u16 |
2009 | il_pcie_link_ctl(struct il_priv *il) | ||
2040 | { | 2010 | { |
2041 | int pos; | 2011 | int pos; |
2042 | u16 pci_lnk_ctl; | 2012 | u16 pci_lnk_ctl; |
@@ -2046,10 +2016,9 @@ static inline u16 il_pcie_link_ctl(struct il_priv *il) | |||
2046 | } | 2016 | } |
2047 | 2017 | ||
2048 | void il_bg_watchdog(unsigned long data); | 2018 | void il_bg_watchdog(unsigned long data); |
2049 | u32 il_usecs_to_beacons(struct il_priv *il, | 2019 | u32 il_usecs_to_beacons(struct il_priv *il, u32 usec, u32 beacon_interval); |
2050 | u32 usec, u32 beacon_interval); | 2020 | __le32 il_add_beacon_time(struct il_priv *il, u32 base, u32 addon, |
2051 | __le32 il_add_beacon_time(struct il_priv *il, u32 base, | 2021 | u32 beacon_interval); |
2052 | u32 addon, u32 beacon_interval); | ||
2053 | 2022 | ||
2054 | #ifdef CONFIG_PM | 2023 | #ifdef CONFIG_PM |
2055 | int il_pci_suspend(struct device *device); | 2024 | int il_pci_suspend(struct device *device); |
@@ -2069,11 +2038,10 @@ extern const struct dev_pm_ops il_pm_ops; | |||
2069 | ******************************************************/ | 2038 | ******************************************************/ |
2070 | void il4965_dump_nic_error_log(struct il_priv *il); | 2039 | void il4965_dump_nic_error_log(struct il_priv *il); |
2071 | #ifdef CONFIG_IWLEGACY_DEBUG | 2040 | #ifdef CONFIG_IWLEGACY_DEBUG |
2072 | void il_print_rx_config_cmd(struct il_priv *il, | 2041 | void il_print_rx_config_cmd(struct il_priv *il, struct il_rxon_context *ctx); |
2073 | struct il_rxon_context *ctx); | ||
2074 | #else | 2042 | #else |
2075 | static inline void il_print_rx_config_cmd(struct il_priv *il, | 2043 | static inline void |
2076 | struct il_rxon_context *ctx) | 2044 | il_print_rx_config_cmd(struct il_priv *il, struct il_rxon_context *ctx) |
2077 | { | 2045 | { |
2078 | } | 2046 | } |
2079 | #endif | 2047 | #endif |
@@ -2107,41 +2075,48 @@ void il_free_geos(struct il_priv *il); | |||
2107 | #define S_FW_ERROR 17 | 2075 | #define S_FW_ERROR 17 |
2108 | #define S_CHANNEL_SWITCH_PENDING 18 | 2076 | #define S_CHANNEL_SWITCH_PENDING 18 |
2109 | 2077 | ||
2110 | static inline int il_is_ready(struct il_priv *il) | 2078 | static inline int |
2079 | il_is_ready(struct il_priv *il) | ||
2111 | { | 2080 | { |
2112 | /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are | 2081 | /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are |
2113 | * set but EXIT_PENDING is not */ | 2082 | * set but EXIT_PENDING is not */ |
2114 | return test_bit(S_READY, &il->status) && | 2083 | return test_bit(S_READY, &il->status) && |
2115 | test_bit(S_GEO_CONFIGURED, &il->status) && | 2084 | test_bit(S_GEO_CONFIGURED, &il->status) && |
2116 | !test_bit(S_EXIT_PENDING, &il->status); | 2085 | !test_bit(S_EXIT_PENDING, &il->status); |
2117 | } | 2086 | } |
2118 | 2087 | ||
2119 | static inline int il_is_alive(struct il_priv *il) | 2088 | static inline int |
2089 | il_is_alive(struct il_priv *il) | ||
2120 | { | 2090 | { |
2121 | return test_bit(S_ALIVE, &il->status); | 2091 | return test_bit(S_ALIVE, &il->status); |
2122 | } | 2092 | } |
2123 | 2093 | ||
2124 | static inline int il_is_init(struct il_priv *il) | 2094 | static inline int |
2095 | il_is_init(struct il_priv *il) | ||
2125 | { | 2096 | { |
2126 | return test_bit(S_INIT, &il->status); | 2097 | return test_bit(S_INIT, &il->status); |
2127 | } | 2098 | } |
2128 | 2099 | ||
2129 | static inline int il_is_rfkill_hw(struct il_priv *il) | 2100 | static inline int |
2101 | il_is_rfkill_hw(struct il_priv *il) | ||
2130 | { | 2102 | { |
2131 | return test_bit(S_RF_KILL_HW, &il->status); | 2103 | return test_bit(S_RF_KILL_HW, &il->status); |
2132 | } | 2104 | } |
2133 | 2105 | ||
2134 | static inline int il_is_rfkill(struct il_priv *il) | 2106 | static inline int |
2107 | il_is_rfkill(struct il_priv *il) | ||
2135 | { | 2108 | { |
2136 | return il_is_rfkill_hw(il); | 2109 | return il_is_rfkill_hw(il); |
2137 | } | 2110 | } |
2138 | 2111 | ||
2139 | static inline int il_is_ctkill(struct il_priv *il) | 2112 | static inline int |
2113 | il_is_ctkill(struct il_priv *il) | ||
2140 | { | 2114 | { |
2141 | return test_bit(S_CT_KILL, &il->status); | 2115 | return test_bit(S_CT_KILL, &il->status); |
2142 | } | 2116 | } |
2143 | 2117 | ||
2144 | static inline int il_is_ready_rf(struct il_priv *il) | 2118 | static inline int |
2119 | il_is_ready_rf(struct il_priv *il) | ||
2145 | { | 2120 | { |
2146 | 2121 | ||
2147 | if (il_is_rfkill(il)) | 2122 | if (il_is_rfkill(il)) |
@@ -2151,66 +2126,63 @@ static inline int il_is_ready_rf(struct il_priv *il) | |||
2151 | } | 2126 | } |
2152 | 2127 | ||
2153 | extern void il_send_bt_config(struct il_priv *il); | 2128 | extern void il_send_bt_config(struct il_priv *il); |
2154 | extern int il_send_stats_request(struct il_priv *il, | 2129 | extern int il_send_stats_request(struct il_priv *il, u8 flags, bool clear); |
2155 | u8 flags, bool clear); | ||
2156 | void il_apm_stop(struct il_priv *il); | 2130 | void il_apm_stop(struct il_priv *il); |
2157 | int il_apm_init(struct il_priv *il); | 2131 | int il_apm_init(struct il_priv *il); |
2158 | 2132 | ||
2159 | int il_send_rxon_timing(struct il_priv *il, | 2133 | int il_send_rxon_timing(struct il_priv *il, struct il_rxon_context *ctx); |
2160 | struct il_rxon_context *ctx); | 2134 | static inline int |
2161 | static inline int il_send_rxon_assoc(struct il_priv *il, | 2135 | il_send_rxon_assoc(struct il_priv *il, struct il_rxon_context *ctx) |
2162 | struct il_rxon_context *ctx) | ||
2163 | { | 2136 | { |
2164 | return il->cfg->ops->hcmd->rxon_assoc(il, ctx); | 2137 | return il->cfg->ops->hcmd->rxon_assoc(il, ctx); |
2165 | } | 2138 | } |
2166 | static inline int il_commit_rxon(struct il_priv *il, | 2139 | |
2167 | struct il_rxon_context *ctx) | 2140 | static inline int |
2141 | il_commit_rxon(struct il_priv *il, struct il_rxon_context *ctx) | ||
2168 | { | 2142 | { |
2169 | return il->cfg->ops->hcmd->commit_rxon(il, ctx); | 2143 | return il->cfg->ops->hcmd->commit_rxon(il, ctx); |
2170 | } | 2144 | } |
2171 | static inline const struct ieee80211_supported_band *il_get_hw_mode( | 2145 | |
2172 | struct il_priv *il, enum ieee80211_band band) | 2146 | static inline const struct ieee80211_supported_band * |
2147 | il_get_hw_mode(struct il_priv *il, enum ieee80211_band band) | ||
2173 | { | 2148 | { |
2174 | return il->hw->wiphy->bands[band]; | 2149 | return il->hw->wiphy->bands[band]; |
2175 | } | 2150 | } |
2176 | 2151 | ||
2177 | /* mac80211 handlers */ | 2152 | /* mac80211 handlers */ |
2178 | int il_mac_config(struct ieee80211_hw *hw, u32 changed); | 2153 | int il_mac_config(struct ieee80211_hw *hw, u32 changed); |
2179 | void il_mac_reset_tsf(struct ieee80211_hw *hw, | 2154 | void il_mac_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif); |
2180 | struct ieee80211_vif *vif); | 2155 | void il_mac_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
2181 | void il_mac_bss_info_changed(struct ieee80211_hw *hw, | 2156 | struct ieee80211_bss_conf *bss_conf, u32 changes); |
2182 | struct ieee80211_vif *vif, | 2157 | void il_tx_cmd_protection(struct il_priv *il, struct ieee80211_tx_info *info, |
2183 | struct ieee80211_bss_conf *bss_conf, | 2158 | __le16 fc, __le32 * tx_flags); |
2184 | u32 changes); | ||
2185 | void il_tx_cmd_protection(struct il_priv *il, | ||
2186 | struct ieee80211_tx_info *info, | ||
2187 | __le16 fc, __le32 *tx_flags); | ||
2188 | 2159 | ||
2189 | irqreturn_t il_isr(int irq, void *data); | 2160 | irqreturn_t il_isr(int irq, void *data); |
2190 | 2161 | ||
2191 | |||
2192 | #include <linux/io.h> | 2162 | #include <linux/io.h> |
2193 | 2163 | ||
2194 | static inline void _il_write8(struct il_priv *il, u32 ofs, u8 val) | 2164 | static inline void |
2165 | _il_write8(struct il_priv *il, u32 ofs, u8 val) | ||
2195 | { | 2166 | { |
2196 | iowrite8(val, il->hw_base + ofs); | 2167 | iowrite8(val, il->hw_base + ofs); |
2197 | } | 2168 | } |
2198 | #define il_write8(il, ofs, val) _il_write8(il, ofs, val) | 2169 | #define il_write8(il, ofs, val) _il_write8(il, ofs, val) |
2199 | 2170 | ||
2200 | static inline void _il_wr(struct il_priv *il, u32 ofs, u32 val) | 2171 | static inline void |
2172 | _il_wr(struct il_priv *il, u32 ofs, u32 val) | ||
2201 | { | 2173 | { |
2202 | iowrite32(val, il->hw_base + ofs); | 2174 | iowrite32(val, il->hw_base + ofs); |
2203 | } | 2175 | } |
2204 | 2176 | ||
2205 | static inline u32 _il_rd(struct il_priv *il, u32 ofs) | 2177 | static inline u32 |
2178 | _il_rd(struct il_priv *il, u32 ofs) | ||
2206 | { | 2179 | { |
2207 | return ioread32(il->hw_base + ofs); | 2180 | return ioread32(il->hw_base + ofs); |
2208 | } | 2181 | } |
2209 | 2182 | ||
2210 | #define IL_POLL_INTERVAL 10 /* microseconds */ | 2183 | #define IL_POLL_INTERVAL 10 /* microseconds */ |
2211 | static inline int | 2184 | static inline int |
2212 | _il_poll_bit(struct il_priv *il, u32 addr, | 2185 | _il_poll_bit(struct il_priv *il, u32 addr, u32 bits, u32 mask, int timeout) |
2213 | u32 bits, u32 mask, int timeout) | ||
2214 | { | 2186 | { |
2215 | int t = 0; | 2187 | int t = 0; |
2216 | 2188 | ||
@@ -2219,17 +2191,20 @@ _il_poll_bit(struct il_priv *il, u32 addr, | |||
2219 | return t; | 2191 | return t; |
2220 | udelay(IL_POLL_INTERVAL); | 2192 | udelay(IL_POLL_INTERVAL); |
2221 | t += IL_POLL_INTERVAL; | 2193 | t += IL_POLL_INTERVAL; |
2222 | } while (t < timeout); | 2194 | } |
2195 | while (t < timeout); | ||
2223 | 2196 | ||
2224 | return -ETIMEDOUT; | 2197 | return -ETIMEDOUT; |
2225 | } | 2198 | } |
2226 | 2199 | ||
2227 | static inline void _il_set_bit(struct il_priv *il, u32 reg, u32 mask) | 2200 | static inline void |
2201 | _il_set_bit(struct il_priv *il, u32 reg, u32 mask) | ||
2228 | { | 2202 | { |
2229 | _il_wr(il, reg, _il_rd(il, reg) | mask); | 2203 | _il_wr(il, reg, _il_rd(il, reg) | mask); |
2230 | } | 2204 | } |
2231 | 2205 | ||
2232 | static inline void il_set_bit(struct il_priv *p, u32 r, u32 m) | 2206 | static inline void |
2207 | il_set_bit(struct il_priv *p, u32 r, u32 m) | ||
2233 | { | 2208 | { |
2234 | unsigned long reg_flags; | 2209 | unsigned long reg_flags; |
2235 | 2210 | ||
@@ -2244,7 +2219,8 @@ _il_clear_bit(struct il_priv *il, u32 reg, u32 mask) | |||
2244 | _il_wr(il, reg, _il_rd(il, reg) & ~mask); | 2219 | _il_wr(il, reg, _il_rd(il, reg) & ~mask); |
2245 | } | 2220 | } |
2246 | 2221 | ||
2247 | static inline void il_clear_bit(struct il_priv *p, u32 r, u32 m) | 2222 | static inline void |
2223 | il_clear_bit(struct il_priv *p, u32 r, u32 m) | ||
2248 | { | 2224 | { |
2249 | unsigned long reg_flags; | 2225 | unsigned long reg_flags; |
2250 | 2226 | ||
@@ -2253,14 +2229,14 @@ static inline void il_clear_bit(struct il_priv *p, u32 r, u32 m) | |||
2253 | spin_unlock_irqrestore(&p->reg_lock, reg_flags); | 2229 | spin_unlock_irqrestore(&p->reg_lock, reg_flags); |
2254 | } | 2230 | } |
2255 | 2231 | ||
2256 | static inline int _il_grab_nic_access(struct il_priv *il) | 2232 | static inline int |
2233 | _il_grab_nic_access(struct il_priv *il) | ||
2257 | { | 2234 | { |
2258 | int ret; | 2235 | int ret; |
2259 | u32 val; | 2236 | u32 val; |
2260 | 2237 | ||
2261 | /* this bit wakes up the NIC */ | 2238 | /* this bit wakes up the NIC */ |
2262 | _il_set_bit(il, CSR_GP_CNTRL, | 2239 | _il_set_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); |
2263 | CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); | ||
2264 | 2240 | ||
2265 | /* | 2241 | /* |
2266 | * These bits say the device is running, and should keep running for | 2242 | * These bits say the device is running, and should keep running for |
@@ -2279,29 +2255,28 @@ static inline int _il_grab_nic_access(struct il_priv *il) | |||
2279 | * good idea before accessing 3945/4965 SRAM (e.g. reading Event Log). | 2255 | * good idea before accessing 3945/4965 SRAM (e.g. reading Event Log). |
2280 | * | 2256 | * |
2281 | */ | 2257 | */ |
2282 | ret = _il_poll_bit(il, CSR_GP_CNTRL, | 2258 | ret = |
2283 | CSR_GP_CNTRL_REG_VAL_MAC_ACCESS_EN, | 2259 | _il_poll_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_VAL_MAC_ACCESS_EN, |
2284 | (CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY | | 2260 | (CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY | |
2285 | CSR_GP_CNTRL_REG_FLAG_GOING_TO_SLEEP), 15000); | 2261 | CSR_GP_CNTRL_REG_FLAG_GOING_TO_SLEEP), 15000); |
2286 | if (ret < 0) { | 2262 | if (ret < 0) { |
2287 | val = _il_rd(il, CSR_GP_CNTRL); | 2263 | val = _il_rd(il, CSR_GP_CNTRL); |
2288 | IL_ERR( | 2264 | IL_ERR("MAC is in deep sleep!. CSR_GP_CNTRL = 0x%08X\n", val); |
2289 | "MAC is in deep sleep!. CSR_GP_CNTRL = 0x%08X\n", val); | 2265 | _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_FORCE_NMI); |
2290 | _il_wr(il, CSR_RESET, | ||
2291 | CSR_RESET_REG_FLAG_FORCE_NMI); | ||
2292 | return -EIO; | 2266 | return -EIO; |
2293 | } | 2267 | } |
2294 | 2268 | ||
2295 | return 0; | 2269 | return 0; |
2296 | } | 2270 | } |
2297 | 2271 | ||
2298 | static inline void _il_release_nic_access(struct il_priv *il) | 2272 | static inline void |
2273 | _il_release_nic_access(struct il_priv *il) | ||
2299 | { | 2274 | { |
2300 | _il_clear_bit(il, CSR_GP_CNTRL, | 2275 | _il_clear_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); |
2301 | CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); | ||
2302 | } | 2276 | } |
2303 | 2277 | ||
2304 | static inline u32 il_rd(struct il_priv *il, u32 reg) | 2278 | static inline u32 |
2279 | il_rd(struct il_priv *il, u32 reg) | ||
2305 | { | 2280 | { |
2306 | u32 value; | 2281 | u32 value; |
2307 | unsigned long reg_flags; | 2282 | unsigned long reg_flags; |
@@ -2328,8 +2303,8 @@ il_wr(struct il_priv *il, u32 reg, u32 value) | |||
2328 | spin_unlock_irqrestore(&il->reg_lock, reg_flags); | 2303 | spin_unlock_irqrestore(&il->reg_lock, reg_flags); |
2329 | } | 2304 | } |
2330 | 2305 | ||
2331 | static inline void il_write_reg_buf(struct il_priv *il, | 2306 | static inline void |
2332 | u32 reg, u32 len, u32 *values) | 2307 | il_write_reg_buf(struct il_priv *il, u32 reg, u32 len, u32 * values) |
2333 | { | 2308 | { |
2334 | u32 count = sizeof(u32); | 2309 | u32 count = sizeof(u32); |
2335 | 2310 | ||
@@ -2339,8 +2314,8 @@ static inline void il_write_reg_buf(struct il_priv *il, | |||
2339 | } | 2314 | } |
2340 | } | 2315 | } |
2341 | 2316 | ||
2342 | static inline int il_poll_bit(struct il_priv *il, u32 addr, | 2317 | static inline int |
2343 | u32 mask, int timeout) | 2318 | il_poll_bit(struct il_priv *il, u32 addr, u32 mask, int timeout) |
2344 | { | 2319 | { |
2345 | int t = 0; | 2320 | int t = 0; |
2346 | 2321 | ||
@@ -2349,19 +2324,22 @@ static inline int il_poll_bit(struct il_priv *il, u32 addr, | |||
2349 | return t; | 2324 | return t; |
2350 | udelay(IL_POLL_INTERVAL); | 2325 | udelay(IL_POLL_INTERVAL); |
2351 | t += IL_POLL_INTERVAL; | 2326 | t += IL_POLL_INTERVAL; |
2352 | } while (t < timeout); | 2327 | } |
2328 | while (t < timeout); | ||
2353 | 2329 | ||
2354 | return -ETIMEDOUT; | 2330 | return -ETIMEDOUT; |
2355 | } | 2331 | } |
2356 | 2332 | ||
2357 | static inline u32 _il_rd_prph(struct il_priv *il, u32 reg) | 2333 | static inline u32 |
2334 | _il_rd_prph(struct il_priv *il, u32 reg) | ||
2358 | { | 2335 | { |
2359 | _il_wr(il, HBUS_TARG_PRPH_RADDR, reg | (3 << 24)); | 2336 | _il_wr(il, HBUS_TARG_PRPH_RADDR, reg | (3 << 24)); |
2360 | rmb(); | 2337 | rmb(); |
2361 | return _il_rd(il, HBUS_TARG_PRPH_RDAT); | 2338 | return _il_rd(il, HBUS_TARG_PRPH_RDAT); |
2362 | } | 2339 | } |
2363 | 2340 | ||
2364 | static inline u32 il_rd_prph(struct il_priv *il, u32 reg) | 2341 | static inline u32 |
2342 | il_rd_prph(struct il_priv *il, u32 reg) | ||
2365 | { | 2343 | { |
2366 | unsigned long reg_flags; | 2344 | unsigned long reg_flags; |
2367 | u32 val; | 2345 | u32 val; |
@@ -2374,11 +2352,10 @@ static inline u32 il_rd_prph(struct il_priv *il, u32 reg) | |||
2374 | return val; | 2352 | return val; |
2375 | } | 2353 | } |
2376 | 2354 | ||
2377 | static inline void _il_wr_prph(struct il_priv *il, | 2355 | static inline void |
2378 | u32 addr, u32 val) | 2356 | _il_wr_prph(struct il_priv *il, u32 addr, u32 val) |
2379 | { | 2357 | { |
2380 | _il_wr(il, HBUS_TARG_PRPH_WADDR, | 2358 | _il_wr(il, HBUS_TARG_PRPH_WADDR, ((addr & 0x0000FFFF) | (3 << 24))); |
2381 | ((addr & 0x0000FFFF) | (3 << 24))); | ||
2382 | wmb(); | 2359 | wmb(); |
2383 | _il_wr(il, HBUS_TARG_PRPH_WDAT, val); | 2360 | _il_wr(il, HBUS_TARG_PRPH_WDAT, val); |
2384 | } | 2361 | } |
@@ -2415,8 +2392,8 @@ il_set_bits_prph(struct il_priv *il, u32 reg, u32 mask) | |||
2415 | _il_wr_prph(il, reg, \ | 2392 | _il_wr_prph(il, reg, \ |
2416 | ((_il_rd_prph(il, reg) & mask) | bits)) | 2393 | ((_il_rd_prph(il, reg) & mask) | bits)) |
2417 | 2394 | ||
2418 | static inline void il_set_bits_mask_prph(struct il_priv *il, u32 reg, | 2395 | static inline void |
2419 | u32 bits, u32 mask) | 2396 | il_set_bits_mask_prph(struct il_priv *il, u32 reg, u32 bits, u32 mask) |
2420 | { | 2397 | { |
2421 | unsigned long reg_flags; | 2398 | unsigned long reg_flags; |
2422 | 2399 | ||
@@ -2427,8 +2404,8 @@ static inline void il_set_bits_mask_prph(struct il_priv *il, u32 reg, | |||
2427 | spin_unlock_irqrestore(&il->reg_lock, reg_flags); | 2404 | spin_unlock_irqrestore(&il->reg_lock, reg_flags); |
2428 | } | 2405 | } |
2429 | 2406 | ||
2430 | static inline void il_clear_bits_prph(struct il_priv | 2407 | static inline void |
2431 | *il, u32 reg, u32 mask) | 2408 | il_clear_bits_prph(struct il_priv *il, u32 reg, u32 mask) |
2432 | { | 2409 | { |
2433 | unsigned long reg_flags; | 2410 | unsigned long reg_flags; |
2434 | u32 val; | 2411 | u32 val; |
@@ -2441,7 +2418,8 @@ static inline void il_clear_bits_prph(struct il_priv | |||
2441 | spin_unlock_irqrestore(&il->reg_lock, reg_flags); | 2418 | spin_unlock_irqrestore(&il->reg_lock, reg_flags); |
2442 | } | 2419 | } |
2443 | 2420 | ||
2444 | static inline u32 il_read_targ_mem(struct il_priv *il, u32 addr) | 2421 | static inline u32 |
2422 | il_read_targ_mem(struct il_priv *il, u32 addr) | ||
2445 | { | 2423 | { |
2446 | unsigned long reg_flags; | 2424 | unsigned long reg_flags; |
2447 | u32 value; | 2425 | u32 value; |
@@ -2474,8 +2452,7 @@ il_write_targ_mem(struct il_priv *il, u32 addr, u32 val) | |||
2474 | } | 2452 | } |
2475 | 2453 | ||
2476 | static inline void | 2454 | static inline void |
2477 | il_write_targ_mem_buf(struct il_priv *il, u32 addr, | 2455 | il_write_targ_mem_buf(struct il_priv *il, u32 addr, u32 len, u32 * values) |
2478 | u32 len, u32 *values) | ||
2479 | { | 2456 | { |
2480 | unsigned long reg_flags; | 2457 | unsigned long reg_flags; |
2481 | 2458 | ||
@@ -2484,8 +2461,7 @@ il_write_targ_mem_buf(struct il_priv *il, u32 addr, | |||
2484 | _il_wr(il, HBUS_TARG_MEM_WADDR, addr); | 2461 | _il_wr(il, HBUS_TARG_MEM_WADDR, addr); |
2485 | wmb(); | 2462 | wmb(); |
2486 | for (; 0 < len; len -= sizeof(u32), values++) | 2463 | for (; 0 < len; len -= sizeof(u32), values++) |
2487 | _il_wr(il, | 2464 | _il_wr(il, HBUS_TARG_MEM_WDAT, *values); |
2488 | HBUS_TARG_MEM_WDAT, *values); | ||
2489 | 2465 | ||
2490 | _il_release_nic_access(il); | 2466 | _il_release_nic_access(il); |
2491 | } | 2467 | } |
@@ -2495,43 +2471,31 @@ il_write_targ_mem_buf(struct il_priv *il, u32 addr, | |||
2495 | #define HW_KEY_DYNAMIC 0 | 2471 | #define HW_KEY_DYNAMIC 0 |
2496 | #define HW_KEY_DEFAULT 1 | 2472 | #define HW_KEY_DEFAULT 1 |
2497 | 2473 | ||
2498 | #define IL_STA_DRIVER_ACTIVE BIT(0) /* driver entry is active */ | 2474 | #define IL_STA_DRIVER_ACTIVE BIT(0) /* driver entry is active */ |
2499 | #define IL_STA_UCODE_ACTIVE BIT(1) /* ucode entry is active */ | 2475 | #define IL_STA_UCODE_ACTIVE BIT(1) /* ucode entry is active */ |
2500 | #define IL_STA_UCODE_INPROGRESS BIT(2) /* ucode entry is in process of | 2476 | #define IL_STA_UCODE_INPROGRESS BIT(2) /* ucode entry is in process of |
2501 | being activated */ | 2477 | being activated */ |
2502 | #define IL_STA_LOCAL BIT(3) /* station state not directed by mac80211; | 2478 | #define IL_STA_LOCAL BIT(3) /* station state not directed by mac80211; |
2503 | (this is for the IBSS BSSID stations) */ | 2479 | (this is for the IBSS BSSID stations) */ |
2504 | #define IL_STA_BCAST BIT(4) /* this station is the special bcast station */ | 2480 | #define IL_STA_BCAST BIT(4) /* this station is the special bcast station */ |
2505 | 2481 | ||
2506 | 2482 | void il_restore_stations(struct il_priv *il, struct il_rxon_context *ctx); | |
2507 | void il_restore_stations(struct il_priv *il, | 2483 | void il_clear_ucode_stations(struct il_priv *il, struct il_rxon_context *ctx); |
2508 | struct il_rxon_context *ctx); | ||
2509 | void il_clear_ucode_stations(struct il_priv *il, | ||
2510 | struct il_rxon_context *ctx); | ||
2511 | void il_dealloc_bcast_stations(struct il_priv *il); | 2484 | void il_dealloc_bcast_stations(struct il_priv *il); |
2512 | int il_get_free_ucode_key_idx(struct il_priv *il); | 2485 | int il_get_free_ucode_key_idx(struct il_priv *il); |
2513 | int il_send_add_sta(struct il_priv *il, | 2486 | int il_send_add_sta(struct il_priv *il, struct il_addsta_cmd *sta, u8 flags); |
2514 | struct il_addsta_cmd *sta, u8 flags); | 2487 | int il_add_station_common(struct il_priv *il, struct il_rxon_context *ctx, |
2515 | int il_add_station_common(struct il_priv *il, | 2488 | const u8 * addr, bool is_ap, |
2516 | struct il_rxon_context *ctx, | 2489 | struct ieee80211_sta *sta, u8 * sta_id_r); |
2517 | const u8 *addr, bool is_ap, | 2490 | int il_remove_station(struct il_priv *il, const u8 sta_id, const u8 * addr); |
2518 | struct ieee80211_sta *sta, u8 *sta_id_r); | 2491 | int il_mac_sta_remove(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
2519 | int il_remove_station(struct il_priv *il, | 2492 | struct ieee80211_sta *sta); |
2520 | const u8 sta_id, | 2493 | |
2521 | const u8 *addr); | 2494 | u8 il_prep_station(struct il_priv *il, struct il_rxon_context *ctx, |
2522 | int il_mac_sta_remove(struct ieee80211_hw *hw, | 2495 | const u8 * addr, bool is_ap, struct ieee80211_sta *sta); |
2523 | struct ieee80211_vif *vif, | 2496 | |
2524 | struct ieee80211_sta *sta); | 2497 | int il_send_lq_cmd(struct il_priv *il, struct il_rxon_context *ctx, |
2525 | 2498 | struct il_link_quality_cmd *lq, u8 flags, bool init); | |
2526 | u8 il_prep_station(struct il_priv *il, | ||
2527 | struct il_rxon_context *ctx, | ||
2528 | const u8 *addr, bool is_ap, | ||
2529 | struct ieee80211_sta *sta); | ||
2530 | |||
2531 | int il_send_lq_cmd(struct il_priv *il, | ||
2532 | struct il_rxon_context *ctx, | ||
2533 | struct il_link_quality_cmd *lq, | ||
2534 | u8 flags, bool init); | ||
2535 | 2499 | ||
2536 | /** | 2500 | /** |
2537 | * il_clear_driver_stations - clear knowledge of all stations from driver | 2501 | * il_clear_driver_stations - clear knowledge of all stations from driver |
@@ -2542,7 +2506,8 @@ int il_send_lq_cmd(struct il_priv *il, | |||
2542 | * able to reconfigure stations -- if we're getting there in the | 2506 | * able to reconfigure stations -- if we're getting there in the |
2543 | * normal down flow then the stations will already be cleared. | 2507 | * normal down flow then the stations will already be cleared. |
2544 | */ | 2508 | */ |
2545 | static inline void il_clear_driver_stations(struct il_priv *il) | 2509 | static inline void |
2510 | il_clear_driver_stations(struct il_priv *il) | ||
2546 | { | 2511 | { |
2547 | unsigned long flags; | 2512 | unsigned long flags; |
2548 | struct il_rxon_context *ctx = &il->ctx; | 2513 | struct il_rxon_context *ctx = &il->ctx; |
@@ -2566,7 +2531,8 @@ static inline void il_clear_driver_stations(struct il_priv *il) | |||
2566 | spin_unlock_irqrestore(&il->sta_lock, flags); | 2531 | spin_unlock_irqrestore(&il->sta_lock, flags); |
2567 | } | 2532 | } |
2568 | 2533 | ||
2569 | static inline int il_sta_id(struct ieee80211_sta *sta) | 2534 | static inline int |
2535 | il_sta_id(struct ieee80211_sta *sta) | ||
2570 | { | 2536 | { |
2571 | if (WARN_ON(!sta)) | 2537 | if (WARN_ON(!sta)) |
2572 | return IL_INVALID_STATION; | 2538 | return IL_INVALID_STATION; |
@@ -2585,9 +2551,9 @@ static inline int il_sta_id(struct ieee80211_sta *sta) | |||
2585 | * that case, we need to use the broadcast station, so this | 2551 | * that case, we need to use the broadcast station, so this |
2586 | * inline wraps that pattern. | 2552 | * inline wraps that pattern. |
2587 | */ | 2553 | */ |
2588 | static inline int il_sta_id_or_broadcast(struct il_priv *il, | 2554 | static inline int |
2589 | struct il_rxon_context *context, | 2555 | il_sta_id_or_broadcast(struct il_priv *il, struct il_rxon_context *context, |
2590 | struct ieee80211_sta *sta) | 2556 | struct ieee80211_sta *sta) |
2591 | { | 2557 | { |
2592 | int sta_id; | 2558 | int sta_id; |
2593 | 2559 | ||
@@ -2610,7 +2576,8 @@ static inline int il_sta_id_or_broadcast(struct il_priv *il, | |||
2610 | * @idx -- current idx | 2576 | * @idx -- current idx |
2611 | * @n_bd -- total number of entries in queue (must be power of 2) | 2577 | * @n_bd -- total number of entries in queue (must be power of 2) |
2612 | */ | 2578 | */ |
2613 | static inline int il_queue_inc_wrap(int idx, int n_bd) | 2579 | static inline int |
2580 | il_queue_inc_wrap(int idx, int n_bd) | ||
2614 | { | 2581 | { |
2615 | return ++idx & (n_bd - 1); | 2582 | return ++idx & (n_bd - 1); |
2616 | } | 2583 | } |
@@ -2620,32 +2587,34 @@ static inline int il_queue_inc_wrap(int idx, int n_bd) | |||
2620 | * @idx -- current idx | 2587 | * @idx -- current idx |
2621 | * @n_bd -- total number of entries in queue (must be power of 2) | 2588 | * @n_bd -- total number of entries in queue (must be power of 2) |
2622 | */ | 2589 | */ |
2623 | static inline int il_queue_dec_wrap(int idx, int n_bd) | 2590 | static inline int |
2591 | il_queue_dec_wrap(int idx, int n_bd) | ||
2624 | { | 2592 | { |
2625 | return --idx & (n_bd - 1); | 2593 | return --idx & (n_bd - 1); |
2626 | } | 2594 | } |
2627 | 2595 | ||
2628 | /* TODO: Move fw_desc functions to iwl-pci.ko */ | 2596 | /* TODO: Move fw_desc functions to iwl-pci.ko */ |
2629 | static inline void il_free_fw_desc(struct pci_dev *pci_dev, | 2597 | static inline void |
2630 | struct fw_desc *desc) | 2598 | il_free_fw_desc(struct pci_dev *pci_dev, struct fw_desc *desc) |
2631 | { | 2599 | { |
2632 | if (desc->v_addr) | 2600 | if (desc->v_addr) |
2633 | dma_free_coherent(&pci_dev->dev, desc->len, | 2601 | dma_free_coherent(&pci_dev->dev, desc->len, desc->v_addr, |
2634 | desc->v_addr, desc->p_addr); | 2602 | desc->p_addr); |
2635 | desc->v_addr = NULL; | 2603 | desc->v_addr = NULL; |
2636 | desc->len = 0; | 2604 | desc->len = 0; |
2637 | } | 2605 | } |
2638 | 2606 | ||
2639 | static inline int il_alloc_fw_desc(struct pci_dev *pci_dev, | 2607 | static inline int |
2640 | struct fw_desc *desc) | 2608 | il_alloc_fw_desc(struct pci_dev *pci_dev, struct fw_desc *desc) |
2641 | { | 2609 | { |
2642 | if (!desc->len) { | 2610 | if (!desc->len) { |
2643 | desc->v_addr = NULL; | 2611 | desc->v_addr = NULL; |
2644 | return -EINVAL; | 2612 | return -EINVAL; |
2645 | } | 2613 | } |
2646 | 2614 | ||
2647 | desc->v_addr = dma_alloc_coherent(&pci_dev->dev, desc->len, | 2615 | desc->v_addr = |
2648 | &desc->p_addr, GFP_KERNEL); | 2616 | dma_alloc_coherent(&pci_dev->dev, desc->len, &desc->p_addr, |
2617 | GFP_KERNEL); | ||
2649 | return (desc->v_addr != NULL) ? 0 : -ENOMEM; | 2618 | return (desc->v_addr != NULL) ? 0 : -ENOMEM; |
2650 | } | 2619 | } |
2651 | 2620 | ||
@@ -2663,14 +2632,14 @@ static inline int il_alloc_fw_desc(struct pci_dev *pci_dev, | |||
2663 | static inline void | 2632 | static inline void |
2664 | il_set_swq_id(struct il_tx_queue *txq, u8 ac, u8 hwq) | 2633 | il_set_swq_id(struct il_tx_queue *txq, u8 ac, u8 hwq) |
2665 | { | 2634 | { |
2666 | BUG_ON(ac > 3); /* only have 2 bits */ | 2635 | BUG_ON(ac > 3); /* only have 2 bits */ |
2667 | BUG_ON(hwq > 31); /* only use 5 bits */ | 2636 | BUG_ON(hwq > 31); /* only use 5 bits */ |
2668 | 2637 | ||
2669 | txq->swq_id = (hwq << 2) | ac; | 2638 | txq->swq_id = (hwq << 2) | ac; |
2670 | } | 2639 | } |
2671 | 2640 | ||
2672 | static inline void il_wake_queue(struct il_priv *il, | 2641 | static inline void |
2673 | struct il_tx_queue *txq) | 2642 | il_wake_queue(struct il_priv *il, struct il_tx_queue *txq) |
2674 | { | 2643 | { |
2675 | u8 queue = txq->swq_id; | 2644 | u8 queue = txq->swq_id; |
2676 | u8 ac = queue & 3; | 2645 | u8 ac = queue & 3; |
@@ -2681,8 +2650,8 @@ static inline void il_wake_queue(struct il_priv *il, | |||
2681 | ieee80211_wake_queue(il->hw, ac); | 2650 | ieee80211_wake_queue(il->hw, ac); |
2682 | } | 2651 | } |
2683 | 2652 | ||
2684 | static inline void il_stop_queue(struct il_priv *il, | 2653 | static inline void |
2685 | struct il_tx_queue *txq) | 2654 | il_stop_queue(struct il_priv *il, struct il_tx_queue *txq) |
2686 | { | 2655 | { |
2687 | u8 queue = txq->swq_id; | 2656 | u8 queue = txq->swq_id; |
2688 | u8 ac = queue & 3; | 2657 | u8 ac = queue & 3; |
@@ -2705,7 +2674,8 @@ static inline void il_stop_queue(struct il_priv *il, | |||
2705 | 2674 | ||
2706 | #define ieee80211_wake_queue DO_NOT_USE_ieee80211_wake_queue | 2675 | #define ieee80211_wake_queue DO_NOT_USE_ieee80211_wake_queue |
2707 | 2676 | ||
2708 | static inline void il_disable_interrupts(struct il_priv *il) | 2677 | static inline void |
2678 | il_disable_interrupts(struct il_priv *il) | ||
2709 | { | 2679 | { |
2710 | clear_bit(S_INT_ENABLED, &il->status); | 2680 | clear_bit(S_INT_ENABLED, &il->status); |
2711 | 2681 | ||
@@ -2718,12 +2688,14 @@ static inline void il_disable_interrupts(struct il_priv *il) | |||
2718 | _il_wr(il, CSR_FH_INT_STATUS, 0xffffffff); | 2688 | _il_wr(il, CSR_FH_INT_STATUS, 0xffffffff); |
2719 | } | 2689 | } |
2720 | 2690 | ||
2721 | static inline void il_enable_rfkill_int(struct il_priv *il) | 2691 | static inline void |
2692 | il_enable_rfkill_int(struct il_priv *il) | ||
2722 | { | 2693 | { |
2723 | _il_wr(il, CSR_INT_MASK, CSR_INT_BIT_RF_KILL); | 2694 | _il_wr(il, CSR_INT_MASK, CSR_INT_BIT_RF_KILL); |
2724 | } | 2695 | } |
2725 | 2696 | ||
2726 | static inline void il_enable_interrupts(struct il_priv *il) | 2697 | static inline void |
2698 | il_enable_interrupts(struct il_priv *il) | ||
2727 | { | 2699 | { |
2728 | set_bit(S_INT_ENABLED, &il->status); | 2700 | set_bit(S_INT_ENABLED, &il->status); |
2729 | _il_wr(il, CSR_INT_MASK, il->inta_mask); | 2701 | _il_wr(il, CSR_INT_MASK, il->inta_mask); |
@@ -2734,8 +2706,8 @@ static inline void il_enable_interrupts(struct il_priv *il) | |||
2734 | * @il -- pointer to il_priv data structure | 2706 | * @il -- pointer to il_priv data structure |
2735 | * @tsf_bits -- number of bits need to shift for masking) | 2707 | * @tsf_bits -- number of bits need to shift for masking) |
2736 | */ | 2708 | */ |
2737 | static inline u32 il_beacon_time_mask_low(struct il_priv *il, | 2709 | static inline u32 |
2738 | u16 tsf_bits) | 2710 | il_beacon_time_mask_low(struct il_priv *il, u16 tsf_bits) |
2739 | { | 2711 | { |
2740 | return (1 << tsf_bits) - 1; | 2712 | return (1 << tsf_bits) - 1; |
2741 | } | 2713 | } |
@@ -2745,8 +2717,8 @@ static inline u32 il_beacon_time_mask_low(struct il_priv *il, | |||
2745 | * @il -- pointer to il_priv data structure | 2717 | * @il -- pointer to il_priv data structure |
2746 | * @tsf_bits -- number of bits need to shift for masking) | 2718 | * @tsf_bits -- number of bits need to shift for masking) |
2747 | */ | 2719 | */ |
2748 | static inline u32 il_beacon_time_mask_high(struct il_priv *il, | 2720 | static inline u32 |
2749 | u16 tsf_bits) | 2721 | il_beacon_time_mask_high(struct il_priv *il, u16 tsf_bits) |
2750 | { | 2722 | { |
2751 | return ((1 << (32 - tsf_bits)) - 1) << tsf_bits; | 2723 | return ((1 << (32 - tsf_bits)) - 1) << tsf_bits; |
2752 | } | 2724 | } |
@@ -2766,20 +2738,21 @@ struct il_rb_status { | |||
2766 | __le16 closed_fr_num; | 2738 | __le16 closed_fr_num; |
2767 | __le16 finished_rb_num; | 2739 | __le16 finished_rb_num; |
2768 | __le16 finished_fr_nam; | 2740 | __le16 finished_fr_nam; |
2769 | __le32 __unused; /* 3945 only */ | 2741 | __le32 __unused; /* 3945 only */ |
2770 | } __packed; | 2742 | } __packed; |
2771 | 2743 | ||
2772 | |||
2773 | #define TFD_QUEUE_SIZE_MAX (256) | 2744 | #define TFD_QUEUE_SIZE_MAX (256) |
2774 | #define TFD_QUEUE_SIZE_BC_DUP (64) | 2745 | #define TFD_QUEUE_SIZE_BC_DUP (64) |
2775 | #define TFD_QUEUE_BC_SIZE (TFD_QUEUE_SIZE_MAX + TFD_QUEUE_SIZE_BC_DUP) | 2746 | #define TFD_QUEUE_BC_SIZE (TFD_QUEUE_SIZE_MAX + TFD_QUEUE_SIZE_BC_DUP) |
2776 | #define IL_TX_DMA_MASK DMA_BIT_MASK(36) | 2747 | #define IL_TX_DMA_MASK DMA_BIT_MASK(36) |
2777 | #define IL_NUM_OF_TBS 20 | 2748 | #define IL_NUM_OF_TBS 20 |
2778 | 2749 | ||
2779 | static inline u8 il_get_dma_hi_addr(dma_addr_t addr) | 2750 | static inline u8 |
2751 | il_get_dma_hi_addr(dma_addr_t addr) | ||
2780 | { | 2752 | { |
2781 | return (sizeof(addr) > sizeof(u32) ? (addr >> 16) >> 16 : 0) & 0xF; | 2753 | return (sizeof(addr) > sizeof(u32) ? (addr >> 16) >> 16 : 0) & 0xF; |
2782 | } | 2754 | } |
2755 | |||
2783 | /** | 2756 | /** |
2784 | * struct il_tfd_tb transmit buffer descriptor within transmit frame descriptor | 2757 | * struct il_tfd_tb transmit buffer descriptor within transmit frame descriptor |
2785 | * | 2758 | * |
@@ -2837,16 +2810,16 @@ struct il_tfd { | |||
2837 | #define PCI_CFG_LINK_CTRL_VAL_L1_EN 0x02 | 2810 | #define PCI_CFG_LINK_CTRL_VAL_L1_EN 0x02 |
2838 | 2811 | ||
2839 | struct il_rate_info { | 2812 | struct il_rate_info { |
2840 | u8 plcp; /* uCode API: RATE_6M_PLCP, etc. */ | 2813 | u8 plcp; /* uCode API: RATE_6M_PLCP, etc. */ |
2841 | u8 plcp_siso; /* uCode API: RATE_SISO_6M_PLCP, etc. */ | 2814 | u8 plcp_siso; /* uCode API: RATE_SISO_6M_PLCP, etc. */ |
2842 | u8 plcp_mimo2; /* uCode API: RATE_MIMO2_6M_PLCP, etc. */ | 2815 | u8 plcp_mimo2; /* uCode API: RATE_MIMO2_6M_PLCP, etc. */ |
2843 | u8 ieee; /* MAC header: RATE_6M_IEEE, etc. */ | 2816 | u8 ieee; /* MAC header: RATE_6M_IEEE, etc. */ |
2844 | u8 prev_ieee; /* previous rate in IEEE speeds */ | 2817 | u8 prev_ieee; /* previous rate in IEEE speeds */ |
2845 | u8 next_ieee; /* next rate in IEEE speeds */ | 2818 | u8 next_ieee; /* next rate in IEEE speeds */ |
2846 | u8 prev_rs; /* previous rate used in rs algo */ | 2819 | u8 prev_rs; /* previous rate used in rs algo */ |
2847 | u8 next_rs; /* next rate used in rs algo */ | 2820 | u8 next_rs; /* next rate used in rs algo */ |
2848 | u8 prev_rs_tgg; /* previous rate used in TGG rs algo */ | 2821 | u8 prev_rs_tgg; /* previous rate used in TGG rs algo */ |
2849 | u8 next_rs_tgg; /* next rate used in TGG rs algo */ | 2822 | u8 next_rs_tgg; /* next rate used in TGG rs algo */ |
2850 | }; | 2823 | }; |
2851 | 2824 | ||
2852 | struct il3945_rate_info { | 2825 | struct il3945_rate_info { |
@@ -2862,7 +2835,6 @@ struct il3945_rate_info { | |||
2862 | u8 prev_table_rs; /* prev in rate table cmd */ | 2835 | u8 prev_table_rs; /* prev in rate table cmd */ |
2863 | }; | 2836 | }; |
2864 | 2837 | ||
2865 | |||
2866 | /* | 2838 | /* |
2867 | * These serve as idxes into | 2839 | * These serve as idxes into |
2868 | * struct il_rate_info il_rates[RATE_COUNT]; | 2840 | * struct il_rate_info il_rates[RATE_COUNT]; |
@@ -2929,20 +2901,20 @@ enum { | |||
2929 | 2901 | ||
2930 | /* uCode API values for legacy bit rates, both OFDM and CCK */ | 2902 | /* uCode API values for legacy bit rates, both OFDM and CCK */ |
2931 | enum { | 2903 | enum { |
2932 | RATE_6M_PLCP = 13, | 2904 | RATE_6M_PLCP = 13, |
2933 | RATE_9M_PLCP = 15, | 2905 | RATE_9M_PLCP = 15, |
2934 | RATE_12M_PLCP = 5, | 2906 | RATE_12M_PLCP = 5, |
2935 | RATE_18M_PLCP = 7, | 2907 | RATE_18M_PLCP = 7, |
2936 | RATE_24M_PLCP = 9, | 2908 | RATE_24M_PLCP = 9, |
2937 | RATE_36M_PLCP = 11, | 2909 | RATE_36M_PLCP = 11, |
2938 | RATE_48M_PLCP = 1, | 2910 | RATE_48M_PLCP = 1, |
2939 | RATE_54M_PLCP = 3, | 2911 | RATE_54M_PLCP = 3, |
2940 | RATE_60M_PLCP = 3,/*FIXME:RS:should be removed*/ | 2912 | RATE_60M_PLCP = 3, /*FIXME:RS:should be removed */ |
2941 | RATE_1M_PLCP = 10, | 2913 | RATE_1M_PLCP = 10, |
2942 | RATE_2M_PLCP = 20, | 2914 | RATE_2M_PLCP = 20, |
2943 | RATE_5M_PLCP = 55, | 2915 | RATE_5M_PLCP = 55, |
2944 | RATE_11M_PLCP = 110, | 2916 | RATE_11M_PLCP = 110, |
2945 | /*FIXME:RS:add RATE_LEGACY_INVM_PLCP = 0,*/ | 2917 | /*FIXME:RS:add RATE_LEGACY_INVM_PLCP = 0, */ |
2946 | }; | 2918 | }; |
2947 | 2919 | ||
2948 | /* uCode API values for OFDM high-throughput (HT) bit rates */ | 2920 | /* uCode API values for OFDM high-throughput (HT) bit rates */ |
@@ -2955,7 +2927,7 @@ enum { | |||
2955 | RATE_SISO_48M_PLCP = 5, | 2927 | RATE_SISO_48M_PLCP = 5, |
2956 | RATE_SISO_54M_PLCP = 6, | 2928 | RATE_SISO_54M_PLCP = 6, |
2957 | RATE_SISO_60M_PLCP = 7, | 2929 | RATE_SISO_60M_PLCP = 7, |
2958 | RATE_MIMO2_6M_PLCP = 0x8, | 2930 | RATE_MIMO2_6M_PLCP = 0x8, |
2959 | RATE_MIMO2_12M_PLCP = 0x9, | 2931 | RATE_MIMO2_12M_PLCP = 0x9, |
2960 | RATE_MIMO2_18M_PLCP = 0xa, | 2932 | RATE_MIMO2_18M_PLCP = 0xa, |
2961 | RATE_MIMO2_24M_PLCP = 0xb, | 2933 | RATE_MIMO2_24M_PLCP = 0xb, |
@@ -2969,8 +2941,8 @@ enum { | |||
2969 | 2941 | ||
2970 | /* MAC header values for bit rates */ | 2942 | /* MAC header values for bit rates */ |
2971 | enum { | 2943 | enum { |
2972 | RATE_6M_IEEE = 12, | 2944 | RATE_6M_IEEE = 12, |
2973 | RATE_9M_IEEE = 18, | 2945 | RATE_9M_IEEE = 18, |
2974 | RATE_12M_IEEE = 24, | 2946 | RATE_12M_IEEE = 24, |
2975 | RATE_18M_IEEE = 36, | 2947 | RATE_18M_IEEE = 36, |
2976 | RATE_24M_IEEE = 48, | 2948 | RATE_24M_IEEE = 48, |
@@ -2978,9 +2950,9 @@ enum { | |||
2978 | RATE_48M_IEEE = 96, | 2950 | RATE_48M_IEEE = 96, |
2979 | RATE_54M_IEEE = 108, | 2951 | RATE_54M_IEEE = 108, |
2980 | RATE_60M_IEEE = 120, | 2952 | RATE_60M_IEEE = 120, |
2981 | RATE_1M_IEEE = 2, | 2953 | RATE_1M_IEEE = 2, |
2982 | RATE_2M_IEEE = 4, | 2954 | RATE_2M_IEEE = 4, |
2983 | RATE_5M_IEEE = 11, | 2955 | RATE_5M_IEEE = 11, |
2984 | RATE_11M_IEEE = 22, | 2956 | RATE_11M_IEEE = 22, |
2985 | }; | 2957 | }; |
2986 | 2958 | ||
@@ -3081,9 +3053,9 @@ extern const struct il_rate_info il_rates[RATE_COUNT]; | |||
3081 | 3053 | ||
3082 | enum il_table_type { | 3054 | enum il_table_type { |
3083 | LQ_NONE, | 3055 | LQ_NONE, |
3084 | LQ_G, /* legacy types */ | 3056 | LQ_G, /* legacy types */ |
3085 | LQ_A, | 3057 | LQ_A, |
3086 | LQ_SISO, /* high-throughput types */ | 3058 | LQ_SISO, /* high-throughput types */ |
3087 | LQ_MIMO2, | 3059 | LQ_MIMO2, |
3088 | LQ_MAX, | 3060 | LQ_MAX, |
3089 | }; | 3061 | }; |
@@ -3108,8 +3080,8 @@ enum il_table_type { | |||
3108 | #define IL_MAX_MCS_DISPLAY_SIZE 12 | 3080 | #define IL_MAX_MCS_DISPLAY_SIZE 12 |
3109 | 3081 | ||
3110 | struct il_rate_mcs_info { | 3082 | struct il_rate_mcs_info { |
3111 | char mbps[IL_MAX_MCS_DISPLAY_SIZE]; | 3083 | char mbps[IL_MAX_MCS_DISPLAY_SIZE]; |
3112 | char mcs[IL_MAX_MCS_DISPLAY_SIZE]; | 3084 | char mcs[IL_MAX_MCS_DISPLAY_SIZE]; |
3113 | }; | 3085 | }; |
3114 | 3086 | ||
3115 | /** | 3087 | /** |
@@ -3133,25 +3105,25 @@ struct il_rate_scale_data { | |||
3133 | struct il_scale_tbl_info { | 3105 | struct il_scale_tbl_info { |
3134 | enum il_table_type lq_type; | 3106 | enum il_table_type lq_type; |
3135 | u8 ant_type; | 3107 | u8 ant_type; |
3136 | u8 is_SGI; /* 1 = short guard interval */ | 3108 | u8 is_SGI; /* 1 = short guard interval */ |
3137 | u8 is_ht40; /* 1 = 40 MHz channel width */ | 3109 | u8 is_ht40; /* 1 = 40 MHz channel width */ |
3138 | u8 is_dup; /* 1 = duplicated data streams */ | 3110 | u8 is_dup; /* 1 = duplicated data streams */ |
3139 | u8 action; /* change modulation; IL_[LEGACY/SISO/MIMO]_SWITCH_* */ | 3111 | u8 action; /* change modulation; IL_[LEGACY/SISO/MIMO]_SWITCH_* */ |
3140 | u8 max_search; /* maximun number of tables we can search */ | 3112 | u8 max_search; /* maximun number of tables we can search */ |
3141 | s32 *expected_tpt; /* throughput metrics; expected_tpt_G, etc. */ | 3113 | s32 *expected_tpt; /* throughput metrics; expected_tpt_G, etc. */ |
3142 | u32 current_rate; /* rate_n_flags, uCode API format */ | 3114 | u32 current_rate; /* rate_n_flags, uCode API format */ |
3143 | struct il_rate_scale_data win[RATE_COUNT]; /* rate histories */ | 3115 | struct il_rate_scale_data win[RATE_COUNT]; /* rate histories */ |
3144 | }; | 3116 | }; |
3145 | 3117 | ||
3146 | struct il_traffic_load { | 3118 | struct il_traffic_load { |
3147 | unsigned long time_stamp; /* age of the oldest stats */ | 3119 | unsigned long time_stamp; /* age of the oldest stats */ |
3148 | u32 packet_count[TID_QUEUE_MAX_SIZE]; /* packet count in this time | 3120 | u32 packet_count[TID_QUEUE_MAX_SIZE]; /* packet count in this time |
3149 | * slice */ | 3121 | * slice */ |
3150 | u32 total; /* total num of packets during the | 3122 | u32 total; /* total num of packets during the |
3151 | * last TID_MAX_TIME_DIFF */ | 3123 | * last TID_MAX_TIME_DIFF */ |
3152 | u8 queue_count; /* number of queues that has | 3124 | u8 queue_count; /* number of queues that has |
3153 | * been used since the last cleanup */ | 3125 | * been used since the last cleanup */ |
3154 | u8 head; /* start of the circular buffer */ | 3126 | u8 head; /* start of the circular buffer */ |
3155 | }; | 3127 | }; |
3156 | 3128 | ||
3157 | /** | 3129 | /** |
@@ -3185,11 +3157,11 @@ struct il_lq_sta { | |||
3185 | u16 active_legacy_rate; | 3157 | u16 active_legacy_rate; |
3186 | u16 active_siso_rate; | 3158 | u16 active_siso_rate; |
3187 | u16 active_mimo2_rate; | 3159 | u16 active_mimo2_rate; |
3188 | s8 max_rate_idx; /* Max rate set by user */ | 3160 | s8 max_rate_idx; /* Max rate set by user */ |
3189 | u8 missed_rate_counter; | 3161 | u8 missed_rate_counter; |
3190 | 3162 | ||
3191 | struct il_link_quality_cmd lq; | 3163 | struct il_link_quality_cmd lq; |
3192 | struct il_scale_tbl_info lq_info[LQ_SIZE]; /* "active", "search" */ | 3164 | struct il_scale_tbl_info lq_info[LQ_SIZE]; /* "active", "search" */ |
3193 | struct il_traffic_load load[TID_MAX_LOAD_COUNT]; | 3165 | struct il_traffic_load load[TID_MAX_LOAD_COUNT]; |
3194 | u8 tx_agg_tid_en; | 3166 | u8 tx_agg_tid_en; |
3195 | #ifdef CONFIG_MAC80211_DEBUGFS | 3167 | #ifdef CONFIG_MAC80211_DEBUGFS |
@@ -3227,12 +3199,14 @@ struct il_station_priv { | |||
3227 | bool asleep; | 3199 | bool asleep; |
3228 | }; | 3200 | }; |
3229 | 3201 | ||
3230 | static inline u8 il4965_num_of_ant(u8 m) | 3202 | static inline u8 |
3203 | il4965_num_of_ant(u8 m) | ||
3231 | { | 3204 | { |
3232 | return !!(m & ANT_A) + !!(m & ANT_B) + !!(m & ANT_C); | 3205 | return !!(m & ANT_A) + !!(m & ANT_B) + !!(m & ANT_C); |
3233 | } | 3206 | } |
3234 | 3207 | ||
3235 | static inline u8 il4965_first_antenna(u8 mask) | 3208 | static inline u8 |
3209 | il4965_first_antenna(u8 mask) | ||
3236 | { | 3210 | { |
3237 | if (mask & ANT_A) | 3211 | if (mask & ANT_A) |
3238 | return ANT_A; | 3212 | return ANT_A; |
@@ -3241,7 +3215,6 @@ static inline u8 il4965_first_antenna(u8 mask) | |||
3241 | return ANT_C; | 3215 | return ANT_C; |
3242 | } | 3216 | } |
3243 | 3217 | ||
3244 | |||
3245 | /** | 3218 | /** |
3246 | * il3945_rate_scale_init - Initialize the rate scale table based on assoc info | 3219 | * il3945_rate_scale_init - Initialize the rate scale table based on assoc info |
3247 | * | 3220 | * |
@@ -3251,10 +3224,10 @@ static inline u8 il4965_first_antenna(u8 mask) | |||
3251 | extern void il3945_rate_scale_init(struct ieee80211_hw *hw, s32 sta_id); | 3224 | extern void il3945_rate_scale_init(struct ieee80211_hw *hw, s32 sta_id); |
3252 | 3225 | ||
3253 | /* Initialize station's rate scaling information after adding station */ | 3226 | /* Initialize station's rate scaling information after adding station */ |
3254 | extern void il4965_rs_rate_init(struct il_priv *il, | 3227 | extern void il4965_rs_rate_init(struct il_priv *il, struct ieee80211_sta *sta, |
3255 | struct ieee80211_sta *sta, u8 sta_id); | 3228 | u8 sta_id); |
3256 | extern void il3945_rs_rate_init(struct il_priv *il, | 3229 | extern void il3945_rs_rate_init(struct il_priv *il, struct ieee80211_sta *sta, |
3257 | struct ieee80211_sta *sta, u8 sta_id); | 3230 | u8 sta_id); |
3258 | 3231 | ||
3259 | /** | 3232 | /** |
3260 | * il_rate_control_register - Register the rate control algorithm callbacks | 3233 | * il_rate_control_register - Register the rate control algorithm callbacks |
@@ -3291,7 +3264,8 @@ extern u32 il_debug_level; | |||
3291 | * level will be used if set, otherwise the global debug level which can be | 3264 | * level will be used if set, otherwise the global debug level which can be |
3292 | * set via module parameter is used. | 3265 | * set via module parameter is used. |
3293 | */ | 3266 | */ |
3294 | static inline u32 il_get_debug_level(struct il_priv *il) | 3267 | static inline u32 |
3268 | il_get_debug_level(struct il_priv *il) | ||
3295 | { | 3269 | { |
3296 | if (il->debug_level) | 3270 | if (il->debug_level) |
3297 | return il->debug_level; | 3271 | return il->debug_level; |
@@ -3299,7 +3273,8 @@ static inline u32 il_get_debug_level(struct il_priv *il) | |||
3299 | return il_debug_level; | 3273 | return il_debug_level; |
3300 | } | 3274 | } |
3301 | #else | 3275 | #else |
3302 | static inline u32 il_get_debug_level(struct il_priv *il) | 3276 | static inline u32 |
3277 | il_get_debug_level(struct il_priv *il) | ||
3303 | { | 3278 | { |
3304 | return il_debug_level; | 3279 | return il_debug_level; |
3305 | } | 3280 | } |
@@ -3329,10 +3304,11 @@ do { \ | |||
3329 | 3304 | ||
3330 | #else | 3305 | #else |
3331 | #define IL_DBG(level, fmt, args...) | 3306 | #define IL_DBG(level, fmt, args...) |
3332 | static inline void il_print_hex_dump(struct il_priv *il, int level, | 3307 | static inline void |
3333 | const void *p, u32 len) | 3308 | il_print_hex_dump(struct il_priv *il, int level, const void *p, u32 len) |
3334 | {} | 3309 | { |
3335 | #endif /* CONFIG_IWLEGACY_DEBUG */ | 3310 | } |
3311 | #endif /* CONFIG_IWLEGACY_DEBUG */ | ||
3336 | 3312 | ||
3337 | #ifdef CONFIG_IWLEGACY_DEBUGFS | 3313 | #ifdef CONFIG_IWLEGACY_DEBUGFS |
3338 | int il_dbgfs_register(struct il_priv *il, const char *name); | 3314 | int il_dbgfs_register(struct il_priv *il, const char *name); |
@@ -3343,10 +3319,12 @@ il_dbgfs_register(struct il_priv *il, const char *name) | |||
3343 | { | 3319 | { |
3344 | return 0; | 3320 | return 0; |
3345 | } | 3321 | } |
3346 | static inline void il_dbgfs_unregister(struct il_priv *il) | 3322 | |
3323 | static inline void | ||
3324 | il_dbgfs_unregister(struct il_priv *il) | ||
3347 | { | 3325 | { |
3348 | } | 3326 | } |
3349 | #endif /* CONFIG_IWLEGACY_DEBUGFS */ | 3327 | #endif /* CONFIG_IWLEGACY_DEBUGFS */ |
3350 | 3328 | ||
3351 | /* | 3329 | /* |
3352 | * To use the debug system: | 3330 | * To use the debug system: |
diff --git a/drivers/net/wireless/iwlegacy/csr.h b/drivers/net/wireless/iwlegacy/csr.h index 4db04297560c..9138e15004fa 100644 --- a/drivers/net/wireless/iwlegacy/csr.h +++ b/drivers/net/wireless/iwlegacy/csr.h | |||
@@ -82,13 +82,13 @@ | |||
82 | */ | 82 | */ |
83 | #define CSR_BASE (0x000) | 83 | #define CSR_BASE (0x000) |
84 | 84 | ||
85 | #define CSR_HW_IF_CONFIG_REG (CSR_BASE+0x000) /* hardware interface config */ | 85 | #define CSR_HW_IF_CONFIG_REG (CSR_BASE+0x000) /* hardware interface config */ |
86 | #define CSR_INT_COALESCING (CSR_BASE+0x004) /* accum ints, 32-usec units */ | 86 | #define CSR_INT_COALESCING (CSR_BASE+0x004) /* accum ints, 32-usec units */ |
87 | #define CSR_INT (CSR_BASE+0x008) /* host interrupt status/ack */ | 87 | #define CSR_INT (CSR_BASE+0x008) /* host interrupt status/ack */ |
88 | #define CSR_INT_MASK (CSR_BASE+0x00c) /* host interrupt enable */ | 88 | #define CSR_INT_MASK (CSR_BASE+0x00c) /* host interrupt enable */ |
89 | #define CSR_FH_INT_STATUS (CSR_BASE+0x010) /* busmaster int status/ack*/ | 89 | #define CSR_FH_INT_STATUS (CSR_BASE+0x010) /* busmaster int status/ack */ |
90 | #define CSR_GPIO_IN (CSR_BASE+0x018) /* read external chip pins */ | 90 | #define CSR_GPIO_IN (CSR_BASE+0x018) /* read external chip pins */ |
91 | #define CSR_RESET (CSR_BASE+0x020) /* busmaster enable, NMI, etc*/ | 91 | #define CSR_RESET (CSR_BASE+0x020) /* busmaster enable, NMI, etc */ |
92 | #define CSR_GP_CNTRL (CSR_BASE+0x024) | 92 | #define CSR_GP_CNTRL (CSR_BASE+0x024) |
93 | 93 | ||
94 | /* 2nd byte of CSR_INT_COALESCING, not accessible via _il_wr()! */ | 94 | /* 2nd byte of CSR_INT_COALESCING, not accessible via _il_wr()! */ |
@@ -166,26 +166,26 @@ | |||
166 | 166 | ||
167 | #define CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A (0x00080000) | 167 | #define CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A (0x00080000) |
168 | #define CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM (0x00200000) | 168 | #define CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM (0x00200000) |
169 | #define CSR_HW_IF_CONFIG_REG_BIT_NIC_READY (0x00400000) /* PCI_OWN_SEM */ | 169 | #define CSR_HW_IF_CONFIG_REG_BIT_NIC_READY (0x00400000) /* PCI_OWN_SEM */ |
170 | #define CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE (0x02000000) /* ME_OWN */ | 170 | #define CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE (0x02000000) /* ME_OWN */ |
171 | #define CSR_HW_IF_CONFIG_REG_PREPARE (0x08000000) /* WAKE_ME */ | 171 | #define CSR_HW_IF_CONFIG_REG_PREPARE (0x08000000) /* WAKE_ME */ |
172 | 172 | ||
173 | #define CSR_INT_PERIODIC_DIS (0x00) /* disable periodic int*/ | 173 | #define CSR_INT_PERIODIC_DIS (0x00) /* disable periodic int */ |
174 | #define CSR_INT_PERIODIC_ENA (0xFF) /* 255*32 usec ~ 8 msec*/ | 174 | #define CSR_INT_PERIODIC_ENA (0xFF) /* 255*32 usec ~ 8 msec */ |
175 | 175 | ||
176 | /* interrupt flags in INTA, set by uCode or hardware (e.g. dma), | 176 | /* interrupt flags in INTA, set by uCode or hardware (e.g. dma), |
177 | * acknowledged (reset) by host writing "1" to flagged bits. */ | 177 | * acknowledged (reset) by host writing "1" to flagged bits. */ |
178 | #define CSR_INT_BIT_FH_RX (1 << 31) /* Rx DMA, cmd responses, FH_INT[17:16] */ | 178 | #define CSR_INT_BIT_FH_RX (1 << 31) /* Rx DMA, cmd responses, FH_INT[17:16] */ |
179 | #define CSR_INT_BIT_HW_ERR (1 << 29) /* DMA hardware error FH_INT[31] */ | 179 | #define CSR_INT_BIT_HW_ERR (1 << 29) /* DMA hardware error FH_INT[31] */ |
180 | #define CSR_INT_BIT_RX_PERIODIC (1 << 28) /* Rx periodic */ | 180 | #define CSR_INT_BIT_RX_PERIODIC (1 << 28) /* Rx periodic */ |
181 | #define CSR_INT_BIT_FH_TX (1 << 27) /* Tx DMA FH_INT[1:0] */ | 181 | #define CSR_INT_BIT_FH_TX (1 << 27) /* Tx DMA FH_INT[1:0] */ |
182 | #define CSR_INT_BIT_SCD (1 << 26) /* TXQ pointer advanced */ | 182 | #define CSR_INT_BIT_SCD (1 << 26) /* TXQ pointer advanced */ |
183 | #define CSR_INT_BIT_SW_ERR (1 << 25) /* uCode error */ | 183 | #define CSR_INT_BIT_SW_ERR (1 << 25) /* uCode error */ |
184 | #define CSR_INT_BIT_RF_KILL (1 << 7) /* HW RFKILL switch GP_CNTRL[27] toggled */ | 184 | #define CSR_INT_BIT_RF_KILL (1 << 7) /* HW RFKILL switch GP_CNTRL[27] toggled */ |
185 | #define CSR_INT_BIT_CT_KILL (1 << 6) /* Critical temp (chip too hot) rfkill */ | 185 | #define CSR_INT_BIT_CT_KILL (1 << 6) /* Critical temp (chip too hot) rfkill */ |
186 | #define CSR_INT_BIT_SW_RX (1 << 3) /* Rx, command responses, 3945 */ | 186 | #define CSR_INT_BIT_SW_RX (1 << 3) /* Rx, command responses, 3945 */ |
187 | #define CSR_INT_BIT_WAKEUP (1 << 1) /* NIC controller waking up (pwr mgmt) */ | 187 | #define CSR_INT_BIT_WAKEUP (1 << 1) /* NIC controller waking up (pwr mgmt) */ |
188 | #define CSR_INT_BIT_ALIVE (1 << 0) /* uCode interrupts once it initializes */ | 188 | #define CSR_INT_BIT_ALIVE (1 << 0) /* uCode interrupts once it initializes */ |
189 | 189 | ||
190 | #define CSR_INI_SET_MASK (CSR_INT_BIT_FH_RX | \ | 190 | #define CSR_INI_SET_MASK (CSR_INT_BIT_FH_RX | \ |
191 | CSR_INT_BIT_HW_ERR | \ | 191 | CSR_INT_BIT_HW_ERR | \ |
@@ -197,21 +197,20 @@ | |||
197 | CSR_INT_BIT_ALIVE) | 197 | CSR_INT_BIT_ALIVE) |
198 | 198 | ||
199 | /* interrupt flags in FH (flow handler) (PCI busmaster DMA) */ | 199 | /* interrupt flags in FH (flow handler) (PCI busmaster DMA) */ |
200 | #define CSR_FH_INT_BIT_ERR (1 << 31) /* Error */ | 200 | #define CSR_FH_INT_BIT_ERR (1 << 31) /* Error */ |
201 | #define CSR_FH_INT_BIT_HI_PRIOR (1 << 30) /* High priority Rx, bypass coalescing */ | 201 | #define CSR_FH_INT_BIT_HI_PRIOR (1 << 30) /* High priority Rx, bypass coalescing */ |
202 | #define CSR39_FH_INT_BIT_RX_CHNL2 (1 << 18) /* Rx channel 2 (3945 only) */ | 202 | #define CSR39_FH_INT_BIT_RX_CHNL2 (1 << 18) /* Rx channel 2 (3945 only) */ |
203 | #define CSR_FH_INT_BIT_RX_CHNL1 (1 << 17) /* Rx channel 1 */ | 203 | #define CSR_FH_INT_BIT_RX_CHNL1 (1 << 17) /* Rx channel 1 */ |
204 | #define CSR_FH_INT_BIT_RX_CHNL0 (1 << 16) /* Rx channel 0 */ | 204 | #define CSR_FH_INT_BIT_RX_CHNL0 (1 << 16) /* Rx channel 0 */ |
205 | #define CSR39_FH_INT_BIT_TX_CHNL6 (1 << 6) /* Tx channel 6 (3945 only) */ | 205 | #define CSR39_FH_INT_BIT_TX_CHNL6 (1 << 6) /* Tx channel 6 (3945 only) */ |
206 | #define CSR_FH_INT_BIT_TX_CHNL1 (1 << 1) /* Tx channel 1 */ | 206 | #define CSR_FH_INT_BIT_TX_CHNL1 (1 << 1) /* Tx channel 1 */ |
207 | #define CSR_FH_INT_BIT_TX_CHNL0 (1 << 0) /* Tx channel 0 */ | 207 | #define CSR_FH_INT_BIT_TX_CHNL0 (1 << 0) /* Tx channel 0 */ |
208 | 208 | ||
209 | #define CSR39_FH_INT_RX_MASK (CSR_FH_INT_BIT_HI_PRIOR | \ | 209 | #define CSR39_FH_INT_RX_MASK (CSR_FH_INT_BIT_HI_PRIOR | \ |
210 | CSR39_FH_INT_BIT_RX_CHNL2 | \ | 210 | CSR39_FH_INT_BIT_RX_CHNL2 | \ |
211 | CSR_FH_INT_BIT_RX_CHNL1 | \ | 211 | CSR_FH_INT_BIT_RX_CHNL1 | \ |
212 | CSR_FH_INT_BIT_RX_CHNL0) | 212 | CSR_FH_INT_BIT_RX_CHNL0) |
213 | 213 | ||
214 | |||
215 | #define CSR39_FH_INT_TX_MASK (CSR39_FH_INT_BIT_TX_CHNL6 | \ | 214 | #define CSR39_FH_INT_TX_MASK (CSR39_FH_INT_BIT_TX_CHNL6 | \ |
216 | CSR_FH_INT_BIT_TX_CHNL1 | \ | 215 | CSR_FH_INT_BIT_TX_CHNL1 | \ |
217 | CSR_FH_INT_BIT_TX_CHNL0) | 216 | CSR_FH_INT_BIT_TX_CHNL0) |
@@ -285,7 +284,6 @@ | |||
285 | #define CSR_GP_CNTRL_REG_FLAG_MAC_POWER_SAVE (0x04000000) | 284 | #define CSR_GP_CNTRL_REG_FLAG_MAC_POWER_SAVE (0x04000000) |
286 | #define CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW (0x08000000) | 285 | #define CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW (0x08000000) |
287 | 286 | ||
288 | |||
289 | /* EEPROM REG */ | 287 | /* EEPROM REG */ |
290 | #define CSR_EEPROM_REG_READ_VALID_MSK (0x00000001) | 288 | #define CSR_EEPROM_REG_READ_VALID_MSK (0x00000001) |
291 | #define CSR_EEPROM_REG_BIT_CMD (0x00000002) | 289 | #define CSR_EEPROM_REG_BIT_CMD (0x00000002) |
@@ -293,19 +291,18 @@ | |||
293 | #define CSR_EEPROM_REG_MSK_DATA (0xFFFF0000) | 291 | #define CSR_EEPROM_REG_MSK_DATA (0xFFFF0000) |
294 | 292 | ||
295 | /* EEPROM GP */ | 293 | /* EEPROM GP */ |
296 | #define CSR_EEPROM_GP_VALID_MSK (0x00000007) /* signature */ | 294 | #define CSR_EEPROM_GP_VALID_MSK (0x00000007) /* signature */ |
297 | #define CSR_EEPROM_GP_IF_OWNER_MSK (0x00000180) | 295 | #define CSR_EEPROM_GP_IF_OWNER_MSK (0x00000180) |
298 | #define CSR_EEPROM_GP_GOOD_SIG_EEP_LESS_THAN_4K (0x00000002) | 296 | #define CSR_EEPROM_GP_GOOD_SIG_EEP_LESS_THAN_4K (0x00000002) |
299 | #define CSR_EEPROM_GP_GOOD_SIG_EEP_MORE_THAN_4K (0x00000004) | 297 | #define CSR_EEPROM_GP_GOOD_SIG_EEP_MORE_THAN_4K (0x00000004) |
300 | 298 | ||
301 | /* GP REG */ | 299 | /* GP REG */ |
302 | #define CSR_GP_REG_POWER_SAVE_STATUS_MSK (0x03000000) /* bit 24/25 */ | 300 | #define CSR_GP_REG_POWER_SAVE_STATUS_MSK (0x03000000) /* bit 24/25 */ |
303 | #define CSR_GP_REG_NO_POWER_SAVE (0x00000000) | 301 | #define CSR_GP_REG_NO_POWER_SAVE (0x00000000) |
304 | #define CSR_GP_REG_MAC_POWER_SAVE (0x01000000) | 302 | #define CSR_GP_REG_MAC_POWER_SAVE (0x01000000) |
305 | #define CSR_GP_REG_PHY_POWER_SAVE (0x02000000) | 303 | #define CSR_GP_REG_PHY_POWER_SAVE (0x02000000) |
306 | #define CSR_GP_REG_POWER_SAVE_ERROR (0x03000000) | 304 | #define CSR_GP_REG_POWER_SAVE_ERROR (0x03000000) |
307 | 305 | ||
308 | |||
309 | /* CSR GIO */ | 306 | /* CSR GIO */ |
310 | #define CSR_GIO_REG_VAL_L0S_ENABLED (0x00000002) | 307 | #define CSR_GIO_REG_VAL_L0S_ENABLED (0x00000002) |
311 | 308 | ||
diff --git a/drivers/net/wireless/iwlegacy/debug.c b/drivers/net/wireless/iwlegacy/debug.c index 4e2b6c80849e..e79794a7e326 100644 --- a/drivers/net/wireless/iwlegacy/debug.c +++ b/drivers/net/wireless/iwlegacy/debug.c | |||
@@ -64,7 +64,6 @@ static ssize_t il_dbgfs_##name##_write(struct file *file, \ | |||
64 | const char __user *user_buf, \ | 64 | const char __user *user_buf, \ |
65 | size_t count, loff_t *ppos); | 65 | size_t count, loff_t *ppos); |
66 | 66 | ||
67 | |||
68 | static int | 67 | static int |
69 | il_dbgfs_open_file_generic(struct inode *inode, struct file *file) | 68 | il_dbgfs_open_file_generic(struct inode *inode, struct file *file) |
70 | { | 69 | { |
@@ -98,9 +97,10 @@ static const struct file_operations il_dbgfs_##name##_ops = { \ | |||
98 | .llseek = generic_file_llseek, \ | 97 | .llseek = generic_file_llseek, \ |
99 | }; | 98 | }; |
100 | 99 | ||
101 | static ssize_t il_dbgfs_tx_stats_read(struct file *file, | 100 | static ssize_t |
102 | char __user *user_buf, | 101 | il_dbgfs_tx_stats_read(struct file *file, char __user * user_buf, size_t count, |
103 | size_t count, loff_t *ppos) { | 102 | loff_t * ppos) |
103 | { | ||
104 | 104 | ||
105 | struct il_priv *il = file->private_data; | 105 | struct il_priv *il = file->private_data; |
106 | char *buf; | 106 | char *buf; |
@@ -108,30 +108,30 @@ static ssize_t il_dbgfs_tx_stats_read(struct file *file, | |||
108 | 108 | ||
109 | int cnt; | 109 | int cnt; |
110 | ssize_t ret; | 110 | ssize_t ret; |
111 | const size_t bufsz = 100 + | 111 | const size_t bufsz = |
112 | sizeof(char) * 50 * (MANAGEMENT_MAX + CONTROL_MAX); | 112 | 100 + sizeof(char) * 50 * (MANAGEMENT_MAX + CONTROL_MAX); |
113 | buf = kzalloc(bufsz, GFP_KERNEL); | 113 | buf = kzalloc(bufsz, GFP_KERNEL); |
114 | if (!buf) | 114 | if (!buf) |
115 | return -ENOMEM; | 115 | return -ENOMEM; |
116 | pos += scnprintf(buf + pos, bufsz - pos, "Management:\n"); | 116 | pos += scnprintf(buf + pos, bufsz - pos, "Management:\n"); |
117 | for (cnt = 0; cnt < MANAGEMENT_MAX; cnt++) { | 117 | for (cnt = 0; cnt < MANAGEMENT_MAX; cnt++) { |
118 | pos += scnprintf(buf + pos, bufsz - pos, | 118 | pos += |
119 | "\t%25s\t\t: %u\n", | 119 | scnprintf(buf + pos, bufsz - pos, "\t%25s\t\t: %u\n", |
120 | il_get_mgmt_string(cnt), | 120 | il_get_mgmt_string(cnt), il->tx_stats.mgmt[cnt]); |
121 | il->tx_stats.mgmt[cnt]); | ||
122 | } | 121 | } |
123 | pos += scnprintf(buf + pos, bufsz - pos, "Control\n"); | 122 | pos += scnprintf(buf + pos, bufsz - pos, "Control\n"); |
124 | for (cnt = 0; cnt < CONTROL_MAX; cnt++) { | 123 | for (cnt = 0; cnt < CONTROL_MAX; cnt++) { |
125 | pos += scnprintf(buf + pos, bufsz - pos, | 124 | pos += |
126 | "\t%25s\t\t: %u\n", | 125 | scnprintf(buf + pos, bufsz - pos, "\t%25s\t\t: %u\n", |
127 | il_get_ctrl_string(cnt), | 126 | il_get_ctrl_string(cnt), il->tx_stats.ctrl[cnt]); |
128 | il->tx_stats.ctrl[cnt]); | ||
129 | } | 127 | } |
130 | pos += scnprintf(buf + pos, bufsz - pos, "Data:\n"); | 128 | pos += scnprintf(buf + pos, bufsz - pos, "Data:\n"); |
131 | pos += scnprintf(buf + pos, bufsz - pos, "\tcnt: %u\n", | 129 | pos += |
132 | il->tx_stats.data_cnt); | 130 | scnprintf(buf + pos, bufsz - pos, "\tcnt: %u\n", |
133 | pos += scnprintf(buf + pos, bufsz - pos, "\tbytes: %llu\n", | 131 | il->tx_stats.data_cnt); |
134 | il->tx_stats.data_bytes); | 132 | pos += |
133 | scnprintf(buf + pos, bufsz - pos, "\tbytes: %llu\n", | ||
134 | il->tx_stats.data_bytes); | ||
135 | ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos); | 135 | ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos); |
136 | kfree(buf); | 136 | kfree(buf); |
137 | return ret; | 137 | return ret; |
@@ -139,8 +139,8 @@ static ssize_t il_dbgfs_tx_stats_read(struct file *file, | |||
139 | 139 | ||
140 | static ssize_t | 140 | static ssize_t |
141 | il_dbgfs_clear_traffic_stats_write(struct file *file, | 141 | il_dbgfs_clear_traffic_stats_write(struct file *file, |
142 | const char __user *user_buf, | 142 | const char __user * user_buf, size_t count, |
143 | size_t count, loff_t *ppos) | 143 | loff_t * ppos) |
144 | { | 144 | { |
145 | struct il_priv *il = file->private_data; | 145 | struct il_priv *il = file->private_data; |
146 | u32 clear_flag; | 146 | u32 clear_flag; |
@@ -148,7 +148,7 @@ il_dbgfs_clear_traffic_stats_write(struct file *file, | |||
148 | int buf_size; | 148 | int buf_size; |
149 | 149 | ||
150 | memset(buf, 0, sizeof(buf)); | 150 | memset(buf, 0, sizeof(buf)); |
151 | buf_size = min(count, sizeof(buf) - 1); | 151 | buf_size = min(count, sizeof(buf) - 1); |
152 | if (copy_from_user(buf, user_buf, buf_size)) | 152 | if (copy_from_user(buf, user_buf, buf_size)) |
153 | return -EFAULT; | 153 | return -EFAULT; |
154 | if (sscanf(buf, "%x", &clear_flag) != 1) | 154 | if (sscanf(buf, "%x", &clear_flag) != 1) |
@@ -158,40 +158,41 @@ il_dbgfs_clear_traffic_stats_write(struct file *file, | |||
158 | return count; | 158 | return count; |
159 | } | 159 | } |
160 | 160 | ||
161 | static ssize_t il_dbgfs_rx_stats_read(struct file *file, | 161 | static ssize_t |
162 | char __user *user_buf, | 162 | il_dbgfs_rx_stats_read(struct file *file, char __user * user_buf, size_t count, |
163 | size_t count, loff_t *ppos) { | 163 | loff_t * ppos) |
164 | { | ||
164 | 165 | ||
165 | struct il_priv *il = file->private_data; | 166 | struct il_priv *il = file->private_data; |
166 | char *buf; | 167 | char *buf; |
167 | int pos = 0; | 168 | int pos = 0; |
168 | int cnt; | 169 | int cnt; |
169 | ssize_t ret; | 170 | ssize_t ret; |
170 | const size_t bufsz = 100 + | 171 | const size_t bufsz = |
171 | sizeof(char) * 50 * (MANAGEMENT_MAX + CONTROL_MAX); | 172 | 100 + sizeof(char) * 50 * (MANAGEMENT_MAX + CONTROL_MAX); |
172 | buf = kzalloc(bufsz, GFP_KERNEL); | 173 | buf = kzalloc(bufsz, GFP_KERNEL); |
173 | if (!buf) | 174 | if (!buf) |
174 | return -ENOMEM; | 175 | return -ENOMEM; |
175 | 176 | ||
176 | pos += scnprintf(buf + pos, bufsz - pos, "Management:\n"); | 177 | pos += scnprintf(buf + pos, bufsz - pos, "Management:\n"); |
177 | for (cnt = 0; cnt < MANAGEMENT_MAX; cnt++) { | 178 | for (cnt = 0; cnt < MANAGEMENT_MAX; cnt++) { |
178 | pos += scnprintf(buf + pos, bufsz - pos, | 179 | pos += |
179 | "\t%25s\t\t: %u\n", | 180 | scnprintf(buf + pos, bufsz - pos, "\t%25s\t\t: %u\n", |
180 | il_get_mgmt_string(cnt), | 181 | il_get_mgmt_string(cnt), il->rx_stats.mgmt[cnt]); |
181 | il->rx_stats.mgmt[cnt]); | ||
182 | } | 182 | } |
183 | pos += scnprintf(buf + pos, bufsz - pos, "Control:\n"); | 183 | pos += scnprintf(buf + pos, bufsz - pos, "Control:\n"); |
184 | for (cnt = 0; cnt < CONTROL_MAX; cnt++) { | 184 | for (cnt = 0; cnt < CONTROL_MAX; cnt++) { |
185 | pos += scnprintf(buf + pos, bufsz - pos, | 185 | pos += |
186 | "\t%25s\t\t: %u\n", | 186 | scnprintf(buf + pos, bufsz - pos, "\t%25s\t\t: %u\n", |
187 | il_get_ctrl_string(cnt), | 187 | il_get_ctrl_string(cnt), il->rx_stats.ctrl[cnt]); |
188 | il->rx_stats.ctrl[cnt]); | ||
189 | } | 188 | } |
190 | pos += scnprintf(buf + pos, bufsz - pos, "Data:\n"); | 189 | pos += scnprintf(buf + pos, bufsz - pos, "Data:\n"); |
191 | pos += scnprintf(buf + pos, bufsz - pos, "\tcnt: %u\n", | 190 | pos += |
192 | il->rx_stats.data_cnt); | 191 | scnprintf(buf + pos, bufsz - pos, "\tcnt: %u\n", |
193 | pos += scnprintf(buf + pos, bufsz - pos, "\tbytes: %llu\n", | 192 | il->rx_stats.data_cnt); |
194 | il->rx_stats.data_bytes); | 193 | pos += |
194 | scnprintf(buf + pos, bufsz - pos, "\tbytes: %llu\n", | ||
195 | il->rx_stats.data_bytes); | ||
195 | 196 | ||
196 | ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos); | 197 | ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos); |
197 | kfree(buf); | 198 | kfree(buf); |
@@ -201,9 +202,9 @@ static ssize_t il_dbgfs_rx_stats_read(struct file *file, | |||
201 | #define BYTE1_MASK 0x000000ff; | 202 | #define BYTE1_MASK 0x000000ff; |
202 | #define BYTE2_MASK 0x0000ffff; | 203 | #define BYTE2_MASK 0x0000ffff; |
203 | #define BYTE3_MASK 0x00ffffff; | 204 | #define BYTE3_MASK 0x00ffffff; |
204 | static ssize_t il_dbgfs_sram_read(struct file *file, | 205 | static ssize_t |
205 | char __user *user_buf, | 206 | il_dbgfs_sram_read(struct file *file, char __user * user_buf, size_t count, |
206 | size_t count, loff_t *ppos) | 207 | loff_t * ppos) |
207 | { | 208 | { |
208 | u32 val; | 209 | u32 val; |
209 | char *buf; | 210 | char *buf; |
@@ -221,17 +222,21 @@ static ssize_t il_dbgfs_sram_read(struct file *file, | |||
221 | else | 222 | else |
222 | il->dbgfs_sram_len = il->ucode_data.len; | 223 | il->dbgfs_sram_len = il->ucode_data.len; |
223 | } | 224 | } |
224 | bufsz = 30 + il->dbgfs_sram_len * sizeof(char) * 10; | 225 | bufsz = 30 + il->dbgfs_sram_len * sizeof(char) * 10; |
225 | buf = kmalloc(bufsz, GFP_KERNEL); | 226 | buf = kmalloc(bufsz, GFP_KERNEL); |
226 | if (!buf) | 227 | if (!buf) |
227 | return -ENOMEM; | 228 | return -ENOMEM; |
228 | pos += scnprintf(buf + pos, bufsz - pos, "sram_len: 0x%x\n", | 229 | pos += |
229 | il->dbgfs_sram_len); | 230 | scnprintf(buf + pos, bufsz - pos, "sram_len: 0x%x\n", |
230 | pos += scnprintf(buf + pos, bufsz - pos, "sram_offset: 0x%x\n", | 231 | il->dbgfs_sram_len); |
231 | il->dbgfs_sram_offset); | 232 | pos += |
233 | scnprintf(buf + pos, bufsz - pos, "sram_offset: 0x%x\n", | ||
234 | il->dbgfs_sram_offset); | ||
232 | for (i = il->dbgfs_sram_len; i > 0; i -= 4) { | 235 | for (i = il->dbgfs_sram_len; i > 0; i -= 4) { |
233 | val = il_read_targ_mem(il, il->dbgfs_sram_offset + \ | 236 | val = |
234 | il->dbgfs_sram_len - i); | 237 | il_read_targ_mem(il, |
238 | il->dbgfs_sram_offset + | ||
239 | il->dbgfs_sram_len - i); | ||
235 | if (i < 4) { | 240 | if (i < 4) { |
236 | switch (i) { | 241 | switch (i) { |
237 | case 1: | 242 | case 1: |
@@ -256,9 +261,9 @@ static ssize_t il_dbgfs_sram_read(struct file *file, | |||
256 | return ret; | 261 | return ret; |
257 | } | 262 | } |
258 | 263 | ||
259 | static ssize_t il_dbgfs_sram_write(struct file *file, | 264 | static ssize_t |
260 | const char __user *user_buf, | 265 | il_dbgfs_sram_write(struct file *file, const char __user * user_buf, |
261 | size_t count, loff_t *ppos) | 266 | size_t count, loff_t * ppos) |
262 | { | 267 | { |
263 | struct il_priv *il = file->private_data; | 268 | struct il_priv *il = file->private_data; |
264 | char buf[64]; | 269 | char buf[64]; |
@@ -266,7 +271,7 @@ static ssize_t il_dbgfs_sram_write(struct file *file, | |||
266 | u32 offset, len; | 271 | u32 offset, len; |
267 | 272 | ||
268 | memset(buf, 0, sizeof(buf)); | 273 | memset(buf, 0, sizeof(buf)); |
269 | buf_size = min(count, sizeof(buf) - 1); | 274 | buf_size = min(count, sizeof(buf) - 1); |
270 | if (copy_from_user(buf, user_buf, buf_size)) | 275 | if (copy_from_user(buf, user_buf, buf_size)) |
271 | return -EFAULT; | 276 | return -EFAULT; |
272 | 277 | ||
@@ -282,8 +287,8 @@ static ssize_t il_dbgfs_sram_write(struct file *file, | |||
282 | } | 287 | } |
283 | 288 | ||
284 | static ssize_t | 289 | static ssize_t |
285 | il_dbgfs_stations_read(struct file *file, char __user *user_buf, | 290 | il_dbgfs_stations_read(struct file *file, char __user * user_buf, size_t count, |
286 | size_t count, loff_t *ppos) | 291 | loff_t * ppos) |
287 | { | 292 | { |
288 | struct il_priv *il = file->private_data; | 293 | struct il_priv *il = file->private_data; |
289 | struct il_station_entry *station; | 294 | struct il_station_entry *station; |
@@ -298,36 +303,42 @@ il_dbgfs_stations_read(struct file *file, char __user *user_buf, | |||
298 | if (!buf) | 303 | if (!buf) |
299 | return -ENOMEM; | 304 | return -ENOMEM; |
300 | 305 | ||
301 | pos += scnprintf(buf + pos, bufsz - pos, "num of stations: %d\n\n", | 306 | pos += |
302 | il->num_stations); | 307 | scnprintf(buf + pos, bufsz - pos, "num of stations: %d\n\n", |
308 | il->num_stations); | ||
303 | 309 | ||
304 | for (i = 0; i < max_sta; i++) { | 310 | for (i = 0; i < max_sta; i++) { |
305 | station = &il->stations[i]; | 311 | station = &il->stations[i]; |
306 | if (!station->used) | 312 | if (!station->used) |
307 | continue; | 313 | continue; |
308 | pos += scnprintf(buf + pos, bufsz - pos, | 314 | pos += |
309 | "station %d - addr: %pM, flags: %#x\n", | 315 | scnprintf(buf + pos, bufsz - pos, |
310 | i, station->sta.sta.addr, | 316 | "station %d - addr: %pM, flags: %#x\n", i, |
311 | station->sta.station_flags_msk); | 317 | station->sta.sta.addr, |
312 | pos += scnprintf(buf + pos, bufsz - pos, | 318 | station->sta.station_flags_msk); |
313 | "TID\tseq_num\ttxq_id\tframes\ttfds\t"); | 319 | pos += |
314 | pos += scnprintf(buf + pos, bufsz - pos, | 320 | scnprintf(buf + pos, bufsz - pos, |
315 | "start_idx\tbitmap\t\t\trate_n_flags\n"); | 321 | "TID\tseq_num\ttxq_id\tframes\ttfds\t"); |
322 | pos += | ||
323 | scnprintf(buf + pos, bufsz - pos, | ||
324 | "start_idx\tbitmap\t\t\trate_n_flags\n"); | ||
316 | 325 | ||
317 | for (j = 0; j < MAX_TID_COUNT; j++) { | 326 | for (j = 0; j < MAX_TID_COUNT; j++) { |
318 | pos += scnprintf(buf + pos, bufsz - pos, | 327 | pos += |
319 | "%d:\t%#x\t%#x\t%u\t%u\t%u\t\t%#.16llx\t%#x", | 328 | scnprintf(buf + pos, bufsz - pos, |
320 | j, station->tid[j].seq_number, | 329 | "%d:\t%#x\t%#x\t%u\t%u\t%u\t\t%#.16llx\t%#x", |
321 | station->tid[j].agg.txq_id, | 330 | j, station->tid[j].seq_number, |
322 | station->tid[j].agg.frame_count, | 331 | station->tid[j].agg.txq_id, |
323 | station->tid[j].tfds_in_queue, | 332 | station->tid[j].agg.frame_count, |
324 | station->tid[j].agg.start_idx, | 333 | station->tid[j].tfds_in_queue, |
325 | station->tid[j].agg.bitmap, | 334 | station->tid[j].agg.start_idx, |
326 | station->tid[j].agg.rate_n_flags); | 335 | station->tid[j].agg.bitmap, |
336 | station->tid[j].agg.rate_n_flags); | ||
327 | 337 | ||
328 | if (station->tid[j].agg.wait_for_ba) | 338 | if (station->tid[j].agg.wait_for_ba) |
329 | pos += scnprintf(buf + pos, bufsz - pos, | 339 | pos += |
330 | " - waitforba"); | 340 | scnprintf(buf + pos, bufsz - pos, |
341 | " - waitforba"); | ||
331 | pos += scnprintf(buf + pos, bufsz - pos, "\n"); | 342 | pos += scnprintf(buf + pos, bufsz - pos, "\n"); |
332 | } | 343 | } |
333 | 344 | ||
@@ -339,10 +350,9 @@ il_dbgfs_stations_read(struct file *file, char __user *user_buf, | |||
339 | return ret; | 350 | return ret; |
340 | } | 351 | } |
341 | 352 | ||
342 | static ssize_t il_dbgfs_nvm_read(struct file *file, | 353 | static ssize_t |
343 | char __user *user_buf, | 354 | il_dbgfs_nvm_read(struct file *file, char __user * user_buf, size_t count, |
344 | size_t count, | 355 | loff_t * ppos) |
345 | loff_t *ppos) | ||
346 | { | 356 | { |
347 | ssize_t ret; | 357 | ssize_t ret; |
348 | struct il_priv *il = file->private_data; | 358 | struct il_priv *il = file->private_data; |
@@ -371,11 +381,12 @@ static ssize_t il_dbgfs_nvm_read(struct file *file, | |||
371 | return -ENOMEM; | 381 | return -ENOMEM; |
372 | } | 382 | } |
373 | eeprom_ver = il_eeprom_query16(il, EEPROM_VERSION); | 383 | eeprom_ver = il_eeprom_query16(il, EEPROM_VERSION); |
374 | pos += scnprintf(buf + pos, buf_size - pos, "EEPROM " | 384 | pos += |
375 | "version: 0x%x\n", eeprom_ver); | 385 | scnprintf(buf + pos, buf_size - pos, "EEPROM " "version: 0x%x\n", |
376 | for (ofs = 0 ; ofs < eeprom_len ; ofs += 16) { | 386 | eeprom_ver); |
387 | for (ofs = 0; ofs < eeprom_len; ofs += 16) { | ||
377 | pos += scnprintf(buf + pos, buf_size - pos, "0x%.4x ", ofs); | 388 | pos += scnprintf(buf + pos, buf_size - pos, "0x%.4x ", ofs); |
378 | hex_dump_to_buffer(ptr + ofs, 16 , 16, 2, buf + pos, | 389 | hex_dump_to_buffer(ptr + ofs, 16, 16, 2, buf + pos, |
379 | buf_size - pos, 0); | 390 | buf_size - pos, 0); |
380 | pos += strlen(buf + pos); | 391 | pos += strlen(buf + pos); |
381 | if (buf_size - pos > 0) | 392 | if (buf_size - pos > 0) |
@@ -388,8 +399,8 @@ static ssize_t il_dbgfs_nvm_read(struct file *file, | |||
388 | } | 399 | } |
389 | 400 | ||
390 | static ssize_t | 401 | static ssize_t |
391 | il_dbgfs_channels_read(struct file *file, char __user *user_buf, | 402 | il_dbgfs_channels_read(struct file *file, char __user * user_buf, size_t count, |
392 | size_t count, loff_t *ppos) | 403 | loff_t * ppos) |
393 | { | 404 | { |
394 | struct il_priv *il = file->private_data; | 405 | struct il_priv *il = file->private_data; |
395 | struct ieee80211_channel *channels = NULL; | 406 | struct ieee80211_channel *channels = NULL; |
@@ -411,106 +422,132 @@ il_dbgfs_channels_read(struct file *file, char __user *user_buf, | |||
411 | if (supp_band) { | 422 | if (supp_band) { |
412 | channels = supp_band->channels; | 423 | channels = supp_band->channels; |
413 | 424 | ||
414 | pos += scnprintf(buf + pos, bufsz - pos, | 425 | pos += |
415 | "Displaying %d channels in 2.4GHz band 802.11bg):\n", | 426 | scnprintf(buf + pos, bufsz - pos, |
416 | supp_band->n_channels); | 427 | "Displaying %d channels in 2.4GHz band 802.11bg):\n", |
428 | supp_band->n_channels); | ||
417 | 429 | ||
418 | for (i = 0; i < supp_band->n_channels; i++) | 430 | for (i = 0; i < supp_band->n_channels; i++) |
419 | pos += scnprintf(buf + pos, bufsz - pos, | 431 | pos += |
420 | "%d: %ddBm: BSS%s%s, %s.\n", | 432 | scnprintf(buf + pos, bufsz - pos, |
421 | channels[i].hw_value, | 433 | "%d: %ddBm: BSS%s%s, %s.\n", |
422 | channels[i].max_power, | 434 | channels[i].hw_value, |
423 | channels[i].flags & IEEE80211_CHAN_RADAR ? | 435 | channels[i].max_power, |
424 | " (IEEE 802.11h required)" : "", | 436 | channels[i]. |
425 | ((channels[i].flags & IEEE80211_CHAN_NO_IBSS) | 437 | flags & IEEE80211_CHAN_RADAR ? |
426 | || (channels[i].flags & | 438 | " (IEEE 802.11h required)" : "", |
427 | IEEE80211_CHAN_RADAR)) ? "" : | 439 | ((channels[i]. |
428 | ", IBSS", | 440 | flags & IEEE80211_CHAN_NO_IBSS) || |
429 | channels[i].flags & | 441 | (channels[i]. |
430 | IEEE80211_CHAN_PASSIVE_SCAN ? | 442 | flags & IEEE80211_CHAN_RADAR)) ? "" : |
431 | "passive only" : "active/passive"); | 443 | ", IBSS", |
444 | channels[i]. | ||
445 | flags & IEEE80211_CHAN_PASSIVE_SCAN ? | ||
446 | "passive only" : "active/passive"); | ||
432 | } | 447 | } |
433 | supp_band = il_get_hw_mode(il, IEEE80211_BAND_5GHZ); | 448 | supp_band = il_get_hw_mode(il, IEEE80211_BAND_5GHZ); |
434 | if (supp_band) { | 449 | if (supp_band) { |
435 | channels = supp_band->channels; | 450 | channels = supp_band->channels; |
436 | 451 | ||
437 | pos += scnprintf(buf + pos, bufsz - pos, | 452 | pos += |
438 | "Displaying %d channels in 5.2GHz band (802.11a)\n", | 453 | scnprintf(buf + pos, bufsz - pos, |
439 | supp_band->n_channels); | 454 | "Displaying %d channels in 5.2GHz band (802.11a)\n", |
455 | supp_band->n_channels); | ||
440 | 456 | ||
441 | for (i = 0; i < supp_band->n_channels; i++) | 457 | for (i = 0; i < supp_band->n_channels; i++) |
442 | pos += scnprintf(buf + pos, bufsz - pos, | 458 | pos += |
443 | "%d: %ddBm: BSS%s%s, %s.\n", | 459 | scnprintf(buf + pos, bufsz - pos, |
444 | channels[i].hw_value, | 460 | "%d: %ddBm: BSS%s%s, %s.\n", |
445 | channels[i].max_power, | 461 | channels[i].hw_value, |
446 | channels[i].flags & IEEE80211_CHAN_RADAR ? | 462 | channels[i].max_power, |
447 | " (IEEE 802.11h required)" : "", | 463 | channels[i]. |
448 | ((channels[i].flags & IEEE80211_CHAN_NO_IBSS) | 464 | flags & IEEE80211_CHAN_RADAR ? |
449 | || (channels[i].flags & | 465 | " (IEEE 802.11h required)" : "", |
450 | IEEE80211_CHAN_RADAR)) ? "" : | 466 | ((channels[i]. |
451 | ", IBSS", | 467 | flags & IEEE80211_CHAN_NO_IBSS) || |
452 | channels[i].flags & | 468 | (channels[i]. |
453 | IEEE80211_CHAN_PASSIVE_SCAN ? | 469 | flags & IEEE80211_CHAN_RADAR)) ? "" : |
454 | "passive only" : "active/passive"); | 470 | ", IBSS", |
471 | channels[i]. | ||
472 | flags & IEEE80211_CHAN_PASSIVE_SCAN ? | ||
473 | "passive only" : "active/passive"); | ||
455 | } | 474 | } |
456 | ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos); | 475 | ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos); |
457 | kfree(buf); | 476 | kfree(buf); |
458 | return ret; | 477 | return ret; |
459 | } | 478 | } |
460 | 479 | ||
461 | static ssize_t il_dbgfs_status_read(struct file *file, | 480 | static ssize_t |
462 | char __user *user_buf, | 481 | il_dbgfs_status_read(struct file *file, char __user * user_buf, size_t count, |
463 | size_t count, loff_t *ppos) { | 482 | loff_t * ppos) |
483 | { | ||
464 | 484 | ||
465 | struct il_priv *il = file->private_data; | 485 | struct il_priv *il = file->private_data; |
466 | char buf[512]; | 486 | char buf[512]; |
467 | int pos = 0; | 487 | int pos = 0; |
468 | const size_t bufsz = sizeof(buf); | 488 | const size_t bufsz = sizeof(buf); |
469 | 489 | ||
470 | pos += scnprintf(buf + pos, bufsz - pos, "S_HCMD_ACTIVE:\t %d\n", | 490 | pos += |
471 | test_bit(S_HCMD_ACTIVE, &il->status)); | 491 | scnprintf(buf + pos, bufsz - pos, "S_HCMD_ACTIVE:\t %d\n", |
472 | pos += scnprintf(buf + pos, bufsz - pos, "S_INT_ENABLED:\t %d\n", | 492 | test_bit(S_HCMD_ACTIVE, &il->status)); |
473 | test_bit(S_INT_ENABLED, &il->status)); | 493 | pos += |
474 | pos += scnprintf(buf + pos, bufsz - pos, "S_RF_KILL_HW:\t %d\n", | 494 | scnprintf(buf + pos, bufsz - pos, "S_INT_ENABLED:\t %d\n", |
475 | test_bit(S_RF_KILL_HW, &il->status)); | 495 | test_bit(S_INT_ENABLED, &il->status)); |
476 | pos += scnprintf(buf + pos, bufsz - pos, "S_CT_KILL:\t\t %d\n", | 496 | pos += |
477 | test_bit(S_CT_KILL, &il->status)); | 497 | scnprintf(buf + pos, bufsz - pos, "S_RF_KILL_HW:\t %d\n", |
478 | pos += scnprintf(buf + pos, bufsz - pos, "S_INIT:\t\t %d\n", | 498 | test_bit(S_RF_KILL_HW, &il->status)); |
479 | test_bit(S_INIT, &il->status)); | 499 | pos += |
480 | pos += scnprintf(buf + pos, bufsz - pos, "S_ALIVE:\t\t %d\n", | 500 | scnprintf(buf + pos, bufsz - pos, "S_CT_KILL:\t\t %d\n", |
481 | test_bit(S_ALIVE, &il->status)); | 501 | test_bit(S_CT_KILL, &il->status)); |
482 | pos += scnprintf(buf + pos, bufsz - pos, "S_READY:\t\t %d\n", | 502 | pos += |
483 | test_bit(S_READY, &il->status)); | 503 | scnprintf(buf + pos, bufsz - pos, "S_INIT:\t\t %d\n", |
484 | pos += scnprintf(buf + pos, bufsz - pos, "S_TEMPERATURE:\t %d\n", | 504 | test_bit(S_INIT, &il->status)); |
485 | test_bit(S_TEMPERATURE, &il->status)); | 505 | pos += |
486 | pos += scnprintf(buf + pos, bufsz - pos, "S_GEO_CONFIGURED:\t %d\n", | 506 | scnprintf(buf + pos, bufsz - pos, "S_ALIVE:\t\t %d\n", |
487 | test_bit(S_GEO_CONFIGURED, &il->status)); | 507 | test_bit(S_ALIVE, &il->status)); |
488 | pos += scnprintf(buf + pos, bufsz - pos, "S_EXIT_PENDING:\t %d\n", | 508 | pos += |
489 | test_bit(S_EXIT_PENDING, &il->status)); | 509 | scnprintf(buf + pos, bufsz - pos, "S_READY:\t\t %d\n", |
490 | pos += scnprintf(buf + pos, bufsz - pos, "S_STATS:\t %d\n", | 510 | test_bit(S_READY, &il->status)); |
491 | test_bit(S_STATS, &il->status)); | 511 | pos += |
492 | pos += scnprintf(buf + pos, bufsz - pos, "S_SCANNING:\t %d\n", | 512 | scnprintf(buf + pos, bufsz - pos, "S_TEMPERATURE:\t %d\n", |
493 | test_bit(S_SCANNING, &il->status)); | 513 | test_bit(S_TEMPERATURE, &il->status)); |
494 | pos += scnprintf(buf + pos, bufsz - pos, "S_SCAN_ABORTING:\t %d\n", | 514 | pos += |
495 | test_bit(S_SCAN_ABORTING, &il->status)); | 515 | scnprintf(buf + pos, bufsz - pos, "S_GEO_CONFIGURED:\t %d\n", |
496 | pos += scnprintf(buf + pos, bufsz - pos, "S_SCAN_HW:\t\t %d\n", | 516 | test_bit(S_GEO_CONFIGURED, &il->status)); |
497 | test_bit(S_SCAN_HW, &il->status)); | 517 | pos += |
498 | pos += scnprintf(buf + pos, bufsz - pos, "S_POWER_PMI:\t %d\n", | 518 | scnprintf(buf + pos, bufsz - pos, "S_EXIT_PENDING:\t %d\n", |
499 | test_bit(S_POWER_PMI, &il->status)); | 519 | test_bit(S_EXIT_PENDING, &il->status)); |
500 | pos += scnprintf(buf + pos, bufsz - pos, "S_FW_ERROR:\t %d\n", | 520 | pos += |
501 | test_bit(S_FW_ERROR, &il->status)); | 521 | scnprintf(buf + pos, bufsz - pos, "S_STATS:\t %d\n", |
522 | test_bit(S_STATS, &il->status)); | ||
523 | pos += | ||
524 | scnprintf(buf + pos, bufsz - pos, "S_SCANNING:\t %d\n", | ||
525 | test_bit(S_SCANNING, &il->status)); | ||
526 | pos += | ||
527 | scnprintf(buf + pos, bufsz - pos, "S_SCAN_ABORTING:\t %d\n", | ||
528 | test_bit(S_SCAN_ABORTING, &il->status)); | ||
529 | pos += | ||
530 | scnprintf(buf + pos, bufsz - pos, "S_SCAN_HW:\t\t %d\n", | ||
531 | test_bit(S_SCAN_HW, &il->status)); | ||
532 | pos += | ||
533 | scnprintf(buf + pos, bufsz - pos, "S_POWER_PMI:\t %d\n", | ||
534 | test_bit(S_POWER_PMI, &il->status)); | ||
535 | pos += | ||
536 | scnprintf(buf + pos, bufsz - pos, "S_FW_ERROR:\t %d\n", | ||
537 | test_bit(S_FW_ERROR, &il->status)); | ||
502 | return simple_read_from_buffer(user_buf, count, ppos, buf, pos); | 538 | return simple_read_from_buffer(user_buf, count, ppos, buf, pos); |
503 | } | 539 | } |
504 | 540 | ||
505 | static ssize_t il_dbgfs_interrupt_read(struct file *file, | 541 | static ssize_t |
506 | char __user *user_buf, | 542 | il_dbgfs_interrupt_read(struct file *file, char __user * user_buf, size_t count, |
507 | size_t count, loff_t *ppos) { | 543 | loff_t * ppos) |
544 | { | ||
508 | 545 | ||
509 | struct il_priv *il = file->private_data; | 546 | struct il_priv *il = file->private_data; |
510 | int pos = 0; | 547 | int pos = 0; |
511 | int cnt = 0; | 548 | int cnt = 0; |
512 | char *buf; | 549 | char *buf; |
513 | int bufsz = 24 * 64; /* 24 items * 64 char per item */ | 550 | int bufsz = 24 * 64; /* 24 items * 64 char per item */ |
514 | ssize_t ret; | 551 | ssize_t ret; |
515 | 552 | ||
516 | buf = kzalloc(bufsz, GFP_KERNEL); | 553 | buf = kzalloc(bufsz, GFP_KERNEL); |
@@ -519,59 +556,70 @@ static ssize_t il_dbgfs_interrupt_read(struct file *file, | |||
519 | return -ENOMEM; | 556 | return -ENOMEM; |
520 | } | 557 | } |
521 | 558 | ||
522 | pos += scnprintf(buf + pos, bufsz - pos, | 559 | pos += |
523 | "Interrupt Statistics Report:\n"); | 560 | scnprintf(buf + pos, bufsz - pos, "Interrupt Statistics Report:\n"); |
524 | 561 | ||
525 | pos += scnprintf(buf + pos, bufsz - pos, "HW Error:\t\t\t %u\n", | 562 | pos += |
526 | il->isr_stats.hw); | 563 | scnprintf(buf + pos, bufsz - pos, "HW Error:\t\t\t %u\n", |
527 | pos += scnprintf(buf + pos, bufsz - pos, "SW Error:\t\t\t %u\n", | 564 | il->isr_stats.hw); |
528 | il->isr_stats.sw); | 565 | pos += |
566 | scnprintf(buf + pos, bufsz - pos, "SW Error:\t\t\t %u\n", | ||
567 | il->isr_stats.sw); | ||
529 | if (il->isr_stats.sw || il->isr_stats.hw) { | 568 | if (il->isr_stats.sw || il->isr_stats.hw) { |
530 | pos += scnprintf(buf + pos, bufsz - pos, | 569 | pos += |
531 | "\tLast Restarting Code: 0x%X\n", | 570 | scnprintf(buf + pos, bufsz - pos, |
532 | il->isr_stats.err_code); | 571 | "\tLast Restarting Code: 0x%X\n", |
572 | il->isr_stats.err_code); | ||
533 | } | 573 | } |
534 | #ifdef CONFIG_IWLEGACY_DEBUG | 574 | #ifdef CONFIG_IWLEGACY_DEBUG |
535 | pos += scnprintf(buf + pos, bufsz - pos, "Frame transmitted:\t\t %u\n", | 575 | pos += |
536 | il->isr_stats.sch); | 576 | scnprintf(buf + pos, bufsz - pos, "Frame transmitted:\t\t %u\n", |
537 | pos += scnprintf(buf + pos, bufsz - pos, "Alive interrupt:\t\t %u\n", | 577 | il->isr_stats.sch); |
538 | il->isr_stats.alive); | 578 | pos += |
579 | scnprintf(buf + pos, bufsz - pos, "Alive interrupt:\t\t %u\n", | ||
580 | il->isr_stats.alive); | ||
539 | #endif | 581 | #endif |
540 | pos += scnprintf(buf + pos, bufsz - pos, | 582 | pos += |
541 | "HW RF KILL switch toggled:\t %u\n", | 583 | scnprintf(buf + pos, bufsz - pos, |
542 | il->isr_stats.rfkill); | 584 | "HW RF KILL switch toggled:\t %u\n", |
543 | 585 | il->isr_stats.rfkill); | |
544 | pos += scnprintf(buf + pos, bufsz - pos, "CT KILL:\t\t\t %u\n", | 586 | |
545 | il->isr_stats.ctkill); | 587 | pos += |
546 | 588 | scnprintf(buf + pos, bufsz - pos, "CT KILL:\t\t\t %u\n", | |
547 | pos += scnprintf(buf + pos, bufsz - pos, "Wakeup Interrupt:\t\t %u\n", | 589 | il->isr_stats.ctkill); |
548 | il->isr_stats.wakeup); | 590 | |
549 | 591 | pos += | |
550 | pos += scnprintf(buf + pos, bufsz - pos, | 592 | scnprintf(buf + pos, bufsz - pos, "Wakeup Interrupt:\t\t %u\n", |
551 | "Rx command responses:\t\t %u\n", | 593 | il->isr_stats.wakeup); |
552 | il->isr_stats.rx); | 594 | |
595 | pos += | ||
596 | scnprintf(buf + pos, bufsz - pos, "Rx command responses:\t\t %u\n", | ||
597 | il->isr_stats.rx); | ||
553 | for (cnt = 0; cnt < IL_CN_MAX; cnt++) { | 598 | for (cnt = 0; cnt < IL_CN_MAX; cnt++) { |
554 | if (il->isr_stats.handlers[cnt] > 0) | 599 | if (il->isr_stats.handlers[cnt] > 0) |
555 | pos += scnprintf(buf + pos, bufsz - pos, | 600 | pos += |
556 | "\tRx handler[%36s]:\t\t %u\n", | 601 | scnprintf(buf + pos, bufsz - pos, |
557 | il_get_cmd_string(cnt), | 602 | "\tRx handler[%36s]:\t\t %u\n", |
558 | il->isr_stats.handlers[cnt]); | 603 | il_get_cmd_string(cnt), |
604 | il->isr_stats.handlers[cnt]); | ||
559 | } | 605 | } |
560 | 606 | ||
561 | pos += scnprintf(buf + pos, bufsz - pos, "Tx/FH interrupt:\t\t %u\n", | 607 | pos += |
562 | il->isr_stats.tx); | 608 | scnprintf(buf + pos, bufsz - pos, "Tx/FH interrupt:\t\t %u\n", |
609 | il->isr_stats.tx); | ||
563 | 610 | ||
564 | pos += scnprintf(buf + pos, bufsz - pos, "Unexpected INTA:\t\t %u\n", | 611 | pos += |
565 | il->isr_stats.unhandled); | 612 | scnprintf(buf + pos, bufsz - pos, "Unexpected INTA:\t\t %u\n", |
613 | il->isr_stats.unhandled); | ||
566 | 614 | ||
567 | ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos); | 615 | ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos); |
568 | kfree(buf); | 616 | kfree(buf); |
569 | return ret; | 617 | return ret; |
570 | } | 618 | } |
571 | 619 | ||
572 | static ssize_t il_dbgfs_interrupt_write(struct file *file, | 620 | static ssize_t |
573 | const char __user *user_buf, | 621 | il_dbgfs_interrupt_write(struct file *file, const char __user * user_buf, |
574 | size_t count, loff_t *ppos) | 622 | size_t count, loff_t * ppos) |
575 | { | 623 | { |
576 | struct il_priv *il = file->private_data; | 624 | struct il_priv *il = file->private_data; |
577 | char buf[8]; | 625 | char buf[8]; |
@@ -579,7 +627,7 @@ static ssize_t il_dbgfs_interrupt_write(struct file *file, | |||
579 | u32 reset_flag; | 627 | u32 reset_flag; |
580 | 628 | ||
581 | memset(buf, 0, sizeof(buf)); | 629 | memset(buf, 0, sizeof(buf)); |
582 | buf_size = min(count, sizeof(buf) - 1); | 630 | buf_size = min(count, sizeof(buf) - 1); |
583 | if (copy_from_user(buf, user_buf, buf_size)) | 631 | if (copy_from_user(buf, user_buf, buf_size)) |
584 | return -EFAULT; | 632 | return -EFAULT; |
585 | if (sscanf(buf, "%x", &reset_flag) != 1) | 633 | if (sscanf(buf, "%x", &reset_flag) != 1) |
@@ -591,8 +639,8 @@ static ssize_t il_dbgfs_interrupt_write(struct file *file, | |||
591 | } | 639 | } |
592 | 640 | ||
593 | static ssize_t | 641 | static ssize_t |
594 | il_dbgfs_qos_read(struct file *file, char __user *user_buf, | 642 | il_dbgfs_qos_read(struct file *file, char __user * user_buf, size_t count, |
595 | size_t count, loff_t *ppos) | 643 | loff_t * ppos) |
596 | { | 644 | { |
597 | struct il_priv *il = file->private_data; | 645 | struct il_priv *il = file->private_data; |
598 | struct il_rxon_context *ctx = &il->ctx; | 646 | struct il_rxon_context *ctx = &il->ctx; |
@@ -600,25 +648,26 @@ il_dbgfs_qos_read(struct file *file, char __user *user_buf, | |||
600 | char buf[256]; | 648 | char buf[256]; |
601 | const size_t bufsz = sizeof(buf); | 649 | const size_t bufsz = sizeof(buf); |
602 | 650 | ||
603 | pos += scnprintf(buf + pos, bufsz - pos, "context %d:\n", | 651 | pos += scnprintf(buf + pos, bufsz - pos, "context %d:\n", ctx->ctxid); |
604 | ctx->ctxid); | ||
605 | for (i = 0; i < AC_NUM; i++) { | 652 | for (i = 0; i < AC_NUM; i++) { |
606 | pos += scnprintf(buf + pos, bufsz - pos, | 653 | pos += |
607 | "\tcw_min\tcw_max\taifsn\ttxop\n"); | 654 | scnprintf(buf + pos, bufsz - pos, |
608 | pos += scnprintf(buf + pos, bufsz - pos, | 655 | "\tcw_min\tcw_max\taifsn\ttxop\n"); |
609 | "AC[%d]\t%u\t%u\t%u\t%u\n", i, | 656 | pos += |
610 | ctx->qos_data.def_qos_parm.ac[i].cw_min, | 657 | scnprintf(buf + pos, bufsz - pos, |
611 | ctx->qos_data.def_qos_parm.ac[i].cw_max, | 658 | "AC[%d]\t%u\t%u\t%u\t%u\n", i, |
612 | ctx->qos_data.def_qos_parm.ac[i].aifsn, | 659 | ctx->qos_data.def_qos_parm.ac[i].cw_min, |
613 | ctx->qos_data.def_qos_parm.ac[i].edca_txop); | 660 | ctx->qos_data.def_qos_parm.ac[i].cw_max, |
661 | ctx->qos_data.def_qos_parm.ac[i].aifsn, | ||
662 | ctx->qos_data.def_qos_parm.ac[i].edca_txop); | ||
614 | } | 663 | } |
615 | 664 | ||
616 | return simple_read_from_buffer(user_buf, count, ppos, buf, pos); | 665 | return simple_read_from_buffer(user_buf, count, ppos, buf, pos); |
617 | } | 666 | } |
618 | 667 | ||
619 | static ssize_t il_dbgfs_disable_ht40_write(struct file *file, | 668 | static ssize_t |
620 | const char __user *user_buf, | 669 | il_dbgfs_disable_ht40_write(struct file *file, const char __user * user_buf, |
621 | size_t count, loff_t *ppos) | 670 | size_t count, loff_t * ppos) |
622 | { | 671 | { |
623 | struct il_priv *il = file->private_data; | 672 | struct il_priv *il = file->private_data; |
624 | char buf[8]; | 673 | char buf[8]; |
@@ -626,7 +675,7 @@ static ssize_t il_dbgfs_disable_ht40_write(struct file *file, | |||
626 | int ht40; | 675 | int ht40; |
627 | 676 | ||
628 | memset(buf, 0, sizeof(buf)); | 677 | memset(buf, 0, sizeof(buf)); |
629 | buf_size = min(count, sizeof(buf) - 1); | 678 | buf_size = min(count, sizeof(buf) - 1); |
630 | if (copy_from_user(buf, user_buf, buf_size)) | 679 | if (copy_from_user(buf, user_buf, buf_size)) |
631 | return -EFAULT; | 680 | return -EFAULT; |
632 | if (sscanf(buf, "%d", &ht40) != 1) | 681 | if (sscanf(buf, "%d", &ht40) != 1) |
@@ -635,25 +684,25 @@ static ssize_t il_dbgfs_disable_ht40_write(struct file *file, | |||
635 | il->disable_ht40 = ht40 ? true : false; | 684 | il->disable_ht40 = ht40 ? true : false; |
636 | else { | 685 | else { |
637 | IL_ERR("Sta associated with AP - " | 686 | IL_ERR("Sta associated with AP - " |
638 | "Change to 40MHz channel support is not allowed\n"); | 687 | "Change to 40MHz channel support is not allowed\n"); |
639 | return -EINVAL; | 688 | return -EINVAL; |
640 | } | 689 | } |
641 | 690 | ||
642 | return count; | 691 | return count; |
643 | } | 692 | } |
644 | 693 | ||
645 | static ssize_t il_dbgfs_disable_ht40_read(struct file *file, | 694 | static ssize_t |
646 | char __user *user_buf, | 695 | il_dbgfs_disable_ht40_read(struct file *file, char __user * user_buf, |
647 | size_t count, loff_t *ppos) | 696 | size_t count, loff_t * ppos) |
648 | { | 697 | { |
649 | struct il_priv *il = file->private_data; | 698 | struct il_priv *il = file->private_data; |
650 | char buf[100]; | 699 | char buf[100]; |
651 | int pos = 0; | 700 | int pos = 0; |
652 | const size_t bufsz = sizeof(buf); | 701 | const size_t bufsz = sizeof(buf); |
653 | 702 | ||
654 | pos += scnprintf(buf + pos, bufsz - pos, | 703 | pos += |
655 | "11n 40MHz Mode: %s\n", | 704 | scnprintf(buf + pos, bufsz - pos, "11n 40MHz Mode: %s\n", |
656 | il->disable_ht40 ? "Disabled" : "Enabled"); | 705 | il->disable_ht40 ? "Disabled" : "Enabled"); |
657 | return simple_read_from_buffer(user_buf, count, ppos, buf, pos); | 706 | return simple_read_from_buffer(user_buf, count, ppos, buf, pos); |
658 | } | 707 | } |
659 | 708 | ||
@@ -666,9 +715,9 @@ DEBUGFS_READ_WRITE_FILE_OPS(interrupt); | |||
666 | DEBUGFS_READ_FILE_OPS(qos); | 715 | DEBUGFS_READ_FILE_OPS(qos); |
667 | DEBUGFS_READ_WRITE_FILE_OPS(disable_ht40); | 716 | DEBUGFS_READ_WRITE_FILE_OPS(disable_ht40); |
668 | 717 | ||
669 | static ssize_t il_dbgfs_traffic_log_read(struct file *file, | 718 | static ssize_t |
670 | char __user *user_buf, | 719 | il_dbgfs_traffic_log_read(struct file *file, char __user * user_buf, |
671 | size_t count, loff_t *ppos) | 720 | size_t count, loff_t * ppos) |
672 | { | 721 | { |
673 | struct il_priv *il = file->private_data; | 722 | struct il_priv *il = file->private_data; |
674 | int pos = 0, ofs = 0; | 723 | int pos = 0, ofs = 0; |
@@ -677,8 +726,9 @@ static ssize_t il_dbgfs_traffic_log_read(struct file *file, | |||
677 | struct il_queue *q; | 726 | struct il_queue *q; |
678 | struct il_rx_queue *rxq = &il->rxq; | 727 | struct il_rx_queue *rxq = &il->rxq; |
679 | char *buf; | 728 | char *buf; |
680 | int bufsz = ((IL_TRAFFIC_ENTRIES * IL_TRAFFIC_ENTRY_SIZE * 64) * 2) + | 729 | int bufsz = |
681 | (il->cfg->base_params->num_of_queues * 32 * 8) + 400; | 730 | ((IL_TRAFFIC_ENTRIES * IL_TRAFFIC_ENTRY_SIZE * 64) * 2) + |
731 | (il->cfg->base_params->num_of_queues * 32 * 8) + 400; | ||
682 | const u8 *ptr; | 732 | const u8 *ptr; |
683 | ssize_t ret; | 733 | ssize_t ret; |
684 | 734 | ||
@@ -695,19 +745,22 @@ static ssize_t il_dbgfs_traffic_log_read(struct file *file, | |||
695 | for (cnt = 0; cnt < il->hw_params.max_txq_num; cnt++) { | 745 | for (cnt = 0; cnt < il->hw_params.max_txq_num; cnt++) { |
696 | txq = &il->txq[cnt]; | 746 | txq = &il->txq[cnt]; |
697 | q = &txq->q; | 747 | q = &txq->q; |
698 | pos += scnprintf(buf + pos, bufsz - pos, | 748 | pos += |
699 | "q[%d]: read_ptr: %u, write_ptr: %u\n", | 749 | scnprintf(buf + pos, bufsz - pos, |
700 | cnt, q->read_ptr, q->write_ptr); | 750 | "q[%d]: read_ptr: %u, write_ptr: %u\n", cnt, |
751 | q->read_ptr, q->write_ptr); | ||
701 | } | 752 | } |
702 | if (il->tx_traffic && (il_debug_level & IL_DL_TX)) { | 753 | if (il->tx_traffic && (il_debug_level & IL_DL_TX)) { |
703 | ptr = il->tx_traffic; | 754 | ptr = il->tx_traffic; |
704 | pos += scnprintf(buf + pos, bufsz - pos, | 755 | pos += |
705 | "Tx Traffic idx: %u\n", il->tx_traffic_idx); | 756 | scnprintf(buf + pos, bufsz - pos, "Tx Traffic idx: %u\n", |
757 | il->tx_traffic_idx); | ||
706 | for (cnt = 0, ofs = 0; cnt < IL_TRAFFIC_ENTRIES; cnt++) { | 758 | for (cnt = 0, ofs = 0; cnt < IL_TRAFFIC_ENTRIES; cnt++) { |
707 | for (entry = 0; entry < IL_TRAFFIC_ENTRY_SIZE / 16; | 759 | for (entry = 0; entry < IL_TRAFFIC_ENTRY_SIZE / 16; |
708 | entry++, ofs += 16) { | 760 | entry++, ofs += 16) { |
709 | pos += scnprintf(buf + pos, bufsz - pos, | 761 | pos += |
710 | "0x%.4x ", ofs); | 762 | scnprintf(buf + pos, bufsz - pos, "0x%.4x ", |
763 | ofs); | ||
711 | hex_dump_to_buffer(ptr + ofs, 16, 16, 2, | 764 | hex_dump_to_buffer(ptr + ofs, 16, 16, 2, |
712 | buf + pos, bufsz - pos, 0); | 765 | buf + pos, bufsz - pos, 0); |
713 | pos += strlen(buf + pos); | 766 | pos += strlen(buf + pos); |
@@ -718,19 +771,21 @@ static ssize_t il_dbgfs_traffic_log_read(struct file *file, | |||
718 | } | 771 | } |
719 | 772 | ||
720 | pos += scnprintf(buf + pos, bufsz - pos, "Rx Queue\n"); | 773 | pos += scnprintf(buf + pos, bufsz - pos, "Rx Queue\n"); |
721 | pos += scnprintf(buf + pos, bufsz - pos, | 774 | pos += |
722 | "read: %u, write: %u\n", | 775 | scnprintf(buf + pos, bufsz - pos, "read: %u, write: %u\n", |
723 | rxq->read, rxq->write); | 776 | rxq->read, rxq->write); |
724 | 777 | ||
725 | if (il->rx_traffic && (il_debug_level & IL_DL_RX)) { | 778 | if (il->rx_traffic && (il_debug_level & IL_DL_RX)) { |
726 | ptr = il->rx_traffic; | 779 | ptr = il->rx_traffic; |
727 | pos += scnprintf(buf + pos, bufsz - pos, | 780 | pos += |
728 | "Rx Traffic idx: %u\n", il->rx_traffic_idx); | 781 | scnprintf(buf + pos, bufsz - pos, "Rx Traffic idx: %u\n", |
782 | il->rx_traffic_idx); | ||
729 | for (cnt = 0, ofs = 0; cnt < IL_TRAFFIC_ENTRIES; cnt++) { | 783 | for (cnt = 0, ofs = 0; cnt < IL_TRAFFIC_ENTRIES; cnt++) { |
730 | for (entry = 0; entry < IL_TRAFFIC_ENTRY_SIZE / 16; | 784 | for (entry = 0; entry < IL_TRAFFIC_ENTRY_SIZE / 16; |
731 | entry++, ofs += 16) { | 785 | entry++, ofs += 16) { |
732 | pos += scnprintf(buf + pos, bufsz - pos, | 786 | pos += |
733 | "0x%.4x ", ofs); | 787 | scnprintf(buf + pos, bufsz - pos, "0x%.4x ", |
788 | ofs); | ||
734 | hex_dump_to_buffer(ptr + ofs, 16, 16, 2, | 789 | hex_dump_to_buffer(ptr + ofs, 16, 16, 2, |
735 | buf + pos, bufsz - pos, 0); | 790 | buf + pos, bufsz - pos, 0); |
736 | pos += strlen(buf + pos); | 791 | pos += strlen(buf + pos); |
@@ -745,9 +800,9 @@ static ssize_t il_dbgfs_traffic_log_read(struct file *file, | |||
745 | return ret; | 800 | return ret; |
746 | } | 801 | } |
747 | 802 | ||
748 | static ssize_t il_dbgfs_traffic_log_write(struct file *file, | 803 | static ssize_t |
749 | const char __user *user_buf, | 804 | il_dbgfs_traffic_log_write(struct file *file, const char __user * user_buf, |
750 | size_t count, loff_t *ppos) | 805 | size_t count, loff_t * ppos) |
751 | { | 806 | { |
752 | struct il_priv *il = file->private_data; | 807 | struct il_priv *il = file->private_data; |
753 | char buf[8]; | 808 | char buf[8]; |
@@ -755,7 +810,7 @@ static ssize_t il_dbgfs_traffic_log_write(struct file *file, | |||
755 | int traffic_log; | 810 | int traffic_log; |
756 | 811 | ||
757 | memset(buf, 0, sizeof(buf)); | 812 | memset(buf, 0, sizeof(buf)); |
758 | buf_size = min(count, sizeof(buf) - 1); | 813 | buf_size = min(count, sizeof(buf) - 1); |
759 | if (copy_from_user(buf, user_buf, buf_size)) | 814 | if (copy_from_user(buf, user_buf, buf_size)) |
760 | return -EFAULT; | 815 | return -EFAULT; |
761 | if (sscanf(buf, "%d", &traffic_log) != 1) | 816 | if (sscanf(buf, "%d", &traffic_log) != 1) |
@@ -766,9 +821,10 @@ static ssize_t il_dbgfs_traffic_log_write(struct file *file, | |||
766 | return count; | 821 | return count; |
767 | } | 822 | } |
768 | 823 | ||
769 | static ssize_t il_dbgfs_tx_queue_read(struct file *file, | 824 | static ssize_t |
770 | char __user *user_buf, | 825 | il_dbgfs_tx_queue_read(struct file *file, char __user * user_buf, size_t count, |
771 | size_t count, loff_t *ppos) { | 826 | loff_t * ppos) |
827 | { | ||
772 | 828 | ||
773 | struct il_priv *il = file->private_data; | 829 | struct il_priv *il = file->private_data; |
774 | struct il_tx_queue *txq; | 830 | struct il_tx_queue *txq; |
@@ -777,8 +833,8 @@ static ssize_t il_dbgfs_tx_queue_read(struct file *file, | |||
777 | int pos = 0; | 833 | int pos = 0; |
778 | int cnt; | 834 | int cnt; |
779 | int ret; | 835 | int ret; |
780 | const size_t bufsz = sizeof(char) * 64 * | 836 | const size_t bufsz = |
781 | il->cfg->base_params->num_of_queues; | 837 | sizeof(char) * 64 * il->cfg->base_params->num_of_queues; |
782 | 838 | ||
783 | if (!il->txq) { | 839 | if (!il->txq) { |
784 | IL_ERR("txq not ready\n"); | 840 | IL_ERR("txq not ready\n"); |
@@ -791,28 +847,32 @@ static ssize_t il_dbgfs_tx_queue_read(struct file *file, | |||
791 | for (cnt = 0; cnt < il->hw_params.max_txq_num; cnt++) { | 847 | for (cnt = 0; cnt < il->hw_params.max_txq_num; cnt++) { |
792 | txq = &il->txq[cnt]; | 848 | txq = &il->txq[cnt]; |
793 | q = &txq->q; | 849 | q = &txq->q; |
794 | pos += scnprintf(buf + pos, bufsz - pos, | 850 | pos += |
795 | "hwq %.2d: read=%u write=%u stop=%d" | 851 | scnprintf(buf + pos, bufsz - pos, |
796 | " swq_id=%#.2x (ac %d/hwq %d)\n", | 852 | "hwq %.2d: read=%u write=%u stop=%d" |
797 | cnt, q->read_ptr, q->write_ptr, | 853 | " swq_id=%#.2x (ac %d/hwq %d)\n", cnt, |
798 | !!test_bit(cnt, il->queue_stopped), | 854 | q->read_ptr, q->write_ptr, !!test_bit(cnt, |
799 | txq->swq_id, txq->swq_id & 3, | 855 | il-> |
800 | (txq->swq_id >> 2) & 0x1f); | 856 | queue_stopped), |
857 | txq->swq_id, txq->swq_id & 3, | ||
858 | (txq->swq_id >> 2) & 0x1f); | ||
801 | if (cnt >= 4) | 859 | if (cnt >= 4) |
802 | continue; | 860 | continue; |
803 | /* for the ACs, display the stop count too */ | 861 | /* for the ACs, display the stop count too */ |
804 | pos += scnprintf(buf + pos, bufsz - pos, | 862 | pos += |
805 | " stop-count: %d\n", | 863 | scnprintf(buf + pos, bufsz - pos, |
806 | atomic_read(&il->queue_stop_count[cnt])); | 864 | " stop-count: %d\n", |
865 | atomic_read(&il->queue_stop_count[cnt])); | ||
807 | } | 866 | } |
808 | ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos); | 867 | ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos); |
809 | kfree(buf); | 868 | kfree(buf); |
810 | return ret; | 869 | return ret; |
811 | } | 870 | } |
812 | 871 | ||
813 | static ssize_t il_dbgfs_rx_queue_read(struct file *file, | 872 | static ssize_t |
814 | char __user *user_buf, | 873 | il_dbgfs_rx_queue_read(struct file *file, char __user * user_buf, size_t count, |
815 | size_t count, loff_t *ppos) { | 874 | loff_t * ppos) |
875 | { | ||
816 | 876 | ||
817 | struct il_priv *il = file->private_data; | 877 | struct il_priv *il = file->private_data; |
818 | struct il_rx_queue *rxq = &il->rxq; | 878 | struct il_rx_queue *rxq = &il->rxq; |
@@ -820,52 +880,55 @@ static ssize_t il_dbgfs_rx_queue_read(struct file *file, | |||
820 | int pos = 0; | 880 | int pos = 0; |
821 | const size_t bufsz = sizeof(buf); | 881 | const size_t bufsz = sizeof(buf); |
822 | 882 | ||
823 | pos += scnprintf(buf + pos, bufsz - pos, "read: %u\n", | 883 | pos += scnprintf(buf + pos, bufsz - pos, "read: %u\n", rxq->read); |
824 | rxq->read); | 884 | pos += scnprintf(buf + pos, bufsz - pos, "write: %u\n", rxq->write); |
825 | pos += scnprintf(buf + pos, bufsz - pos, "write: %u\n", | 885 | pos += |
826 | rxq->write); | 886 | scnprintf(buf + pos, bufsz - pos, "free_count: %u\n", |
827 | pos += scnprintf(buf + pos, bufsz - pos, "free_count: %u\n", | 887 | rxq->free_count); |
828 | rxq->free_count); | ||
829 | if (rxq->rb_stts) { | 888 | if (rxq->rb_stts) { |
830 | pos += scnprintf(buf + pos, bufsz - pos, "closed_rb_num: %u\n", | 889 | pos += |
831 | le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF); | 890 | scnprintf(buf + pos, bufsz - pos, "closed_rb_num: %u\n", |
891 | le16_to_cpu(rxq->rb_stts-> | ||
892 | closed_rb_num) & 0x0FFF); | ||
832 | } else { | 893 | } else { |
833 | pos += scnprintf(buf + pos, bufsz - pos, | 894 | pos += |
834 | "closed_rb_num: Not Allocated\n"); | 895 | scnprintf(buf + pos, bufsz - pos, |
896 | "closed_rb_num: Not Allocated\n"); | ||
835 | } | 897 | } |
836 | return simple_read_from_buffer(user_buf, count, ppos, buf, pos); | 898 | return simple_read_from_buffer(user_buf, count, ppos, buf, pos); |
837 | } | 899 | } |
838 | 900 | ||
839 | static ssize_t il_dbgfs_ucode_rx_stats_read(struct file *file, | 901 | static ssize_t |
840 | char __user *user_buf, | 902 | il_dbgfs_ucode_rx_stats_read(struct file *file, char __user * user_buf, |
841 | size_t count, loff_t *ppos) | 903 | size_t count, loff_t * ppos) |
842 | { | 904 | { |
843 | struct il_priv *il = file->private_data; | 905 | struct il_priv *il = file->private_data; |
844 | return il->cfg->ops->lib->debugfs_ops.rx_stats_read(file, | 906 | return il->cfg->ops->lib->debugfs_ops.rx_stats_read(file, user_buf, |
845 | user_buf, count, ppos); | 907 | count, ppos); |
846 | } | 908 | } |
847 | 909 | ||
848 | static ssize_t il_dbgfs_ucode_tx_stats_read(struct file *file, | 910 | static ssize_t |
849 | char __user *user_buf, | 911 | il_dbgfs_ucode_tx_stats_read(struct file *file, char __user * user_buf, |
850 | size_t count, loff_t *ppos) | 912 | size_t count, loff_t * ppos) |
851 | { | 913 | { |
852 | struct il_priv *il = file->private_data; | 914 | struct il_priv *il = file->private_data; |
853 | return il->cfg->ops->lib->debugfs_ops.tx_stats_read(file, | 915 | return il->cfg->ops->lib->debugfs_ops.tx_stats_read(file, user_buf, |
854 | user_buf, count, ppos); | 916 | count, ppos); |
855 | } | 917 | } |
856 | 918 | ||
857 | static ssize_t il_dbgfs_ucode_general_stats_read(struct file *file, | 919 | static ssize_t |
858 | char __user *user_buf, | 920 | il_dbgfs_ucode_general_stats_read(struct file *file, char __user * user_buf, |
859 | size_t count, loff_t *ppos) | 921 | size_t count, loff_t * ppos) |
860 | { | 922 | { |
861 | struct il_priv *il = file->private_data; | 923 | struct il_priv *il = file->private_data; |
862 | return il->cfg->ops->lib->debugfs_ops.general_stats_read(file, | 924 | return il->cfg->ops->lib->debugfs_ops.general_stats_read(file, user_buf, |
863 | user_buf, count, ppos); | 925 | count, ppos); |
864 | } | 926 | } |
865 | 927 | ||
866 | static ssize_t il_dbgfs_sensitivity_read(struct file *file, | 928 | static ssize_t |
867 | char __user *user_buf, | 929 | il_dbgfs_sensitivity_read(struct file *file, char __user * user_buf, |
868 | size_t count, loff_t *ppos) { | 930 | size_t count, loff_t * ppos) |
931 | { | ||
869 | 932 | ||
870 | struct il_priv *il = file->private_data; | 933 | struct il_priv *il = file->private_data; |
871 | int pos = 0; | 934 | int pos = 0; |
@@ -882,71 +945,89 @@ static ssize_t il_dbgfs_sensitivity_read(struct file *file, | |||
882 | return -ENOMEM; | 945 | return -ENOMEM; |
883 | } | 946 | } |
884 | 947 | ||
885 | pos += scnprintf(buf + pos, bufsz - pos, "auto_corr_ofdm:\t\t\t %u\n", | 948 | pos += |
886 | data->auto_corr_ofdm); | 949 | scnprintf(buf + pos, bufsz - pos, "auto_corr_ofdm:\t\t\t %u\n", |
887 | pos += scnprintf(buf + pos, bufsz - pos, | 950 | data->auto_corr_ofdm); |
888 | "auto_corr_ofdm_mrc:\t\t %u\n", | 951 | pos += |
889 | data->auto_corr_ofdm_mrc); | 952 | scnprintf(buf + pos, bufsz - pos, "auto_corr_ofdm_mrc:\t\t %u\n", |
890 | pos += scnprintf(buf + pos, bufsz - pos, "auto_corr_ofdm_x1:\t\t %u\n", | 953 | data->auto_corr_ofdm_mrc); |
891 | data->auto_corr_ofdm_x1); | 954 | pos += |
892 | pos += scnprintf(buf + pos, bufsz - pos, | 955 | scnprintf(buf + pos, bufsz - pos, "auto_corr_ofdm_x1:\t\t %u\n", |
893 | "auto_corr_ofdm_mrc_x1:\t\t %u\n", | 956 | data->auto_corr_ofdm_x1); |
894 | data->auto_corr_ofdm_mrc_x1); | 957 | pos += |
895 | pos += scnprintf(buf + pos, bufsz - pos, "auto_corr_cck:\t\t\t %u\n", | 958 | scnprintf(buf + pos, bufsz - pos, "auto_corr_ofdm_mrc_x1:\t\t %u\n", |
896 | data->auto_corr_cck); | 959 | data->auto_corr_ofdm_mrc_x1); |
897 | pos += scnprintf(buf + pos, bufsz - pos, "auto_corr_cck_mrc:\t\t %u\n", | 960 | pos += |
898 | data->auto_corr_cck_mrc); | 961 | scnprintf(buf + pos, bufsz - pos, "auto_corr_cck:\t\t\t %u\n", |
899 | pos += scnprintf(buf + pos, bufsz - pos, | 962 | data->auto_corr_cck); |
900 | "last_bad_plcp_cnt_ofdm:\t\t %u\n", | 963 | pos += |
901 | data->last_bad_plcp_cnt_ofdm); | 964 | scnprintf(buf + pos, bufsz - pos, "auto_corr_cck_mrc:\t\t %u\n", |
902 | pos += scnprintf(buf + pos, bufsz - pos, "last_fa_cnt_ofdm:\t\t %u\n", | 965 | data->auto_corr_cck_mrc); |
903 | data->last_fa_cnt_ofdm); | 966 | pos += |
904 | pos += scnprintf(buf + pos, bufsz - pos, | 967 | scnprintf(buf + pos, bufsz - pos, |
905 | "last_bad_plcp_cnt_cck:\t\t %u\n", | 968 | "last_bad_plcp_cnt_ofdm:\t\t %u\n", |
906 | data->last_bad_plcp_cnt_cck); | 969 | data->last_bad_plcp_cnt_ofdm); |
907 | pos += scnprintf(buf + pos, bufsz - pos, "last_fa_cnt_cck:\t\t %u\n", | 970 | pos += |
908 | data->last_fa_cnt_cck); | 971 | scnprintf(buf + pos, bufsz - pos, "last_fa_cnt_ofdm:\t\t %u\n", |
909 | pos += scnprintf(buf + pos, bufsz - pos, "nrg_curr_state:\t\t\t %u\n", | 972 | data->last_fa_cnt_ofdm); |
910 | data->nrg_curr_state); | 973 | pos += |
911 | pos += scnprintf(buf + pos, bufsz - pos, "nrg_prev_state:\t\t\t %u\n", | 974 | scnprintf(buf + pos, bufsz - pos, "last_bad_plcp_cnt_cck:\t\t %u\n", |
912 | data->nrg_prev_state); | 975 | data->last_bad_plcp_cnt_cck); |
976 | pos += | ||
977 | scnprintf(buf + pos, bufsz - pos, "last_fa_cnt_cck:\t\t %u\n", | ||
978 | data->last_fa_cnt_cck); | ||
979 | pos += | ||
980 | scnprintf(buf + pos, bufsz - pos, "nrg_curr_state:\t\t\t %u\n", | ||
981 | data->nrg_curr_state); | ||
982 | pos += | ||
983 | scnprintf(buf + pos, bufsz - pos, "nrg_prev_state:\t\t\t %u\n", | ||
984 | data->nrg_prev_state); | ||
913 | pos += scnprintf(buf + pos, bufsz - pos, "nrg_value:\t\t\t"); | 985 | pos += scnprintf(buf + pos, bufsz - pos, "nrg_value:\t\t\t"); |
914 | for (cnt = 0; cnt < 10; cnt++) { | 986 | for (cnt = 0; cnt < 10; cnt++) { |
915 | pos += scnprintf(buf + pos, bufsz - pos, " %u", | 987 | pos += |
916 | data->nrg_value[cnt]); | 988 | scnprintf(buf + pos, bufsz - pos, " %u", |
989 | data->nrg_value[cnt]); | ||
917 | } | 990 | } |
918 | pos += scnprintf(buf + pos, bufsz - pos, "\n"); | 991 | pos += scnprintf(buf + pos, bufsz - pos, "\n"); |
919 | pos += scnprintf(buf + pos, bufsz - pos, "nrg_silence_rssi:\t\t"); | 992 | pos += scnprintf(buf + pos, bufsz - pos, "nrg_silence_rssi:\t\t"); |
920 | for (cnt = 0; cnt < NRG_NUM_PREV_STAT_L; cnt++) { | 993 | for (cnt = 0; cnt < NRG_NUM_PREV_STAT_L; cnt++) { |
921 | pos += scnprintf(buf + pos, bufsz - pos, " %u", | 994 | pos += |
922 | data->nrg_silence_rssi[cnt]); | 995 | scnprintf(buf + pos, bufsz - pos, " %u", |
996 | data->nrg_silence_rssi[cnt]); | ||
923 | } | 997 | } |
924 | pos += scnprintf(buf + pos, bufsz - pos, "\n"); | 998 | pos += scnprintf(buf + pos, bufsz - pos, "\n"); |
925 | pos += scnprintf(buf + pos, bufsz - pos, "nrg_silence_ref:\t\t %u\n", | 999 | pos += |
926 | data->nrg_silence_ref); | 1000 | scnprintf(buf + pos, bufsz - pos, "nrg_silence_ref:\t\t %u\n", |
927 | pos += scnprintf(buf + pos, bufsz - pos, "nrg_energy_idx:\t\t\t %u\n", | 1001 | data->nrg_silence_ref); |
928 | data->nrg_energy_idx); | 1002 | pos += |
929 | pos += scnprintf(buf + pos, bufsz - pos, "nrg_silence_idx:\t\t %u\n", | 1003 | scnprintf(buf + pos, bufsz - pos, "nrg_energy_idx:\t\t\t %u\n", |
930 | data->nrg_silence_idx); | 1004 | data->nrg_energy_idx); |
931 | pos += scnprintf(buf + pos, bufsz - pos, "nrg_th_cck:\t\t\t %u\n", | 1005 | pos += |
932 | data->nrg_th_cck); | 1006 | scnprintf(buf + pos, bufsz - pos, "nrg_silence_idx:\t\t %u\n", |
933 | pos += scnprintf(buf + pos, bufsz - pos, | 1007 | data->nrg_silence_idx); |
934 | "nrg_auto_corr_silence_diff:\t %u\n", | 1008 | pos += |
935 | data->nrg_auto_corr_silence_diff); | 1009 | scnprintf(buf + pos, bufsz - pos, "nrg_th_cck:\t\t\t %u\n", |
936 | pos += scnprintf(buf + pos, bufsz - pos, "num_in_cck_no_fa:\t\t %u\n", | 1010 | data->nrg_th_cck); |
937 | data->num_in_cck_no_fa); | 1011 | pos += |
938 | pos += scnprintf(buf + pos, bufsz - pos, "nrg_th_ofdm:\t\t\t %u\n", | 1012 | scnprintf(buf + pos, bufsz - pos, |
939 | data->nrg_th_ofdm); | 1013 | "nrg_auto_corr_silence_diff:\t %u\n", |
1014 | data->nrg_auto_corr_silence_diff); | ||
1015 | pos += | ||
1016 | scnprintf(buf + pos, bufsz - pos, "num_in_cck_no_fa:\t\t %u\n", | ||
1017 | data->num_in_cck_no_fa); | ||
1018 | pos += | ||
1019 | scnprintf(buf + pos, bufsz - pos, "nrg_th_ofdm:\t\t\t %u\n", | ||
1020 | data->nrg_th_ofdm); | ||
940 | 1021 | ||
941 | ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos); | 1022 | ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos); |
942 | kfree(buf); | 1023 | kfree(buf); |
943 | return ret; | 1024 | return ret; |
944 | } | 1025 | } |
945 | 1026 | ||
946 | 1027 | static ssize_t | |
947 | static ssize_t il_dbgfs_chain_noise_read(struct file *file, | 1028 | il_dbgfs_chain_noise_read(struct file *file, char __user * user_buf, |
948 | char __user *user_buf, | 1029 | size_t count, loff_t * ppos) |
949 | size_t count, loff_t *ppos) { | 1030 | { |
950 | 1031 | ||
951 | struct il_priv *il = file->private_data; | 1032 | struct il_priv *il = file->private_data; |
952 | int pos = 0; | 1033 | int pos = 0; |
@@ -963,48 +1044,60 @@ static ssize_t il_dbgfs_chain_noise_read(struct file *file, | |||
963 | return -ENOMEM; | 1044 | return -ENOMEM; |
964 | } | 1045 | } |
965 | 1046 | ||
966 | pos += scnprintf(buf + pos, bufsz - pos, "active_chains:\t\t\t %u\n", | 1047 | pos += |
967 | data->active_chains); | 1048 | scnprintf(buf + pos, bufsz - pos, "active_chains:\t\t\t %u\n", |
968 | pos += scnprintf(buf + pos, bufsz - pos, "chain_noise_a:\t\t\t %u\n", | 1049 | data->active_chains); |
969 | data->chain_noise_a); | 1050 | pos += |
970 | pos += scnprintf(buf + pos, bufsz - pos, "chain_noise_b:\t\t\t %u\n", | 1051 | scnprintf(buf + pos, bufsz - pos, "chain_noise_a:\t\t\t %u\n", |
971 | data->chain_noise_b); | 1052 | data->chain_noise_a); |
972 | pos += scnprintf(buf + pos, bufsz - pos, "chain_noise_c:\t\t\t %u\n", | 1053 | pos += |
973 | data->chain_noise_c); | 1054 | scnprintf(buf + pos, bufsz - pos, "chain_noise_b:\t\t\t %u\n", |
974 | pos += scnprintf(buf + pos, bufsz - pos, "chain_signal_a:\t\t\t %u\n", | 1055 | data->chain_noise_b); |
975 | data->chain_signal_a); | 1056 | pos += |
976 | pos += scnprintf(buf + pos, bufsz - pos, "chain_signal_b:\t\t\t %u\n", | 1057 | scnprintf(buf + pos, bufsz - pos, "chain_noise_c:\t\t\t %u\n", |
977 | data->chain_signal_b); | 1058 | data->chain_noise_c); |
978 | pos += scnprintf(buf + pos, bufsz - pos, "chain_signal_c:\t\t\t %u\n", | 1059 | pos += |
979 | data->chain_signal_c); | 1060 | scnprintf(buf + pos, bufsz - pos, "chain_signal_a:\t\t\t %u\n", |
980 | pos += scnprintf(buf + pos, bufsz - pos, "beacon_count:\t\t\t %u\n", | 1061 | data->chain_signal_a); |
981 | data->beacon_count); | 1062 | pos += |
1063 | scnprintf(buf + pos, bufsz - pos, "chain_signal_b:\t\t\t %u\n", | ||
1064 | data->chain_signal_b); | ||
1065 | pos += | ||
1066 | scnprintf(buf + pos, bufsz - pos, "chain_signal_c:\t\t\t %u\n", | ||
1067 | data->chain_signal_c); | ||
1068 | pos += | ||
1069 | scnprintf(buf + pos, bufsz - pos, "beacon_count:\t\t\t %u\n", | ||
1070 | data->beacon_count); | ||
982 | 1071 | ||
983 | pos += scnprintf(buf + pos, bufsz - pos, "disconn_array:\t\t\t"); | 1072 | pos += scnprintf(buf + pos, bufsz - pos, "disconn_array:\t\t\t"); |
984 | for (cnt = 0; cnt < NUM_RX_CHAINS; cnt++) { | 1073 | for (cnt = 0; cnt < NUM_RX_CHAINS; cnt++) { |
985 | pos += scnprintf(buf + pos, bufsz - pos, " %u", | 1074 | pos += |
986 | data->disconn_array[cnt]); | 1075 | scnprintf(buf + pos, bufsz - pos, " %u", |
1076 | data->disconn_array[cnt]); | ||
987 | } | 1077 | } |
988 | pos += scnprintf(buf + pos, bufsz - pos, "\n"); | 1078 | pos += scnprintf(buf + pos, bufsz - pos, "\n"); |
989 | pos += scnprintf(buf + pos, bufsz - pos, "delta_gain_code:\t\t"); | 1079 | pos += scnprintf(buf + pos, bufsz - pos, "delta_gain_code:\t\t"); |
990 | for (cnt = 0; cnt < NUM_RX_CHAINS; cnt++) { | 1080 | for (cnt = 0; cnt < NUM_RX_CHAINS; cnt++) { |
991 | pos += scnprintf(buf + pos, bufsz - pos, " %u", | 1081 | pos += |
992 | data->delta_gain_code[cnt]); | 1082 | scnprintf(buf + pos, bufsz - pos, " %u", |
1083 | data->delta_gain_code[cnt]); | ||
993 | } | 1084 | } |
994 | pos += scnprintf(buf + pos, bufsz - pos, "\n"); | 1085 | pos += scnprintf(buf + pos, bufsz - pos, "\n"); |
995 | pos += scnprintf(buf + pos, bufsz - pos, "radio_write:\t\t\t %u\n", | 1086 | pos += |
996 | data->radio_write); | 1087 | scnprintf(buf + pos, bufsz - pos, "radio_write:\t\t\t %u\n", |
997 | pos += scnprintf(buf + pos, bufsz - pos, "state:\t\t\t\t %u\n", | 1088 | data->radio_write); |
998 | data->state); | 1089 | pos += |
1090 | scnprintf(buf + pos, bufsz - pos, "state:\t\t\t\t %u\n", | ||
1091 | data->state); | ||
999 | 1092 | ||
1000 | ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos); | 1093 | ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos); |
1001 | kfree(buf); | 1094 | kfree(buf); |
1002 | return ret; | 1095 | return ret; |
1003 | } | 1096 | } |
1004 | 1097 | ||
1005 | static ssize_t il_dbgfs_power_save_status_read(struct file *file, | 1098 | static ssize_t |
1006 | char __user *user_buf, | 1099 | il_dbgfs_power_save_status_read(struct file *file, char __user * user_buf, |
1007 | size_t count, loff_t *ppos) | 1100 | size_t count, loff_t * ppos) |
1008 | { | 1101 | { |
1009 | struct il_priv *il = file->private_data; | 1102 | struct il_priv *il = file->private_data; |
1010 | char buf[60]; | 1103 | char buf[60]; |
@@ -1012,22 +1105,25 @@ static ssize_t il_dbgfs_power_save_status_read(struct file *file, | |||
1012 | const size_t bufsz = sizeof(buf); | 1105 | const size_t bufsz = sizeof(buf); |
1013 | u32 pwrsave_status; | 1106 | u32 pwrsave_status; |
1014 | 1107 | ||
1015 | pwrsave_status = _il_rd(il, CSR_GP_CNTRL) & | 1108 | pwrsave_status = |
1016 | CSR_GP_REG_POWER_SAVE_STATUS_MSK; | 1109 | _il_rd(il, CSR_GP_CNTRL) & CSR_GP_REG_POWER_SAVE_STATUS_MSK; |
1017 | 1110 | ||
1018 | pos += scnprintf(buf + pos, bufsz - pos, "Power Save Status: "); | 1111 | pos += scnprintf(buf + pos, bufsz - pos, "Power Save Status: "); |
1019 | pos += scnprintf(buf + pos, bufsz - pos, "%s\n", | 1112 | pos += |
1020 | (pwrsave_status == CSR_GP_REG_NO_POWER_SAVE) ? "none" : | 1113 | scnprintf(buf + pos, bufsz - pos, "%s\n", |
1021 | (pwrsave_status == CSR_GP_REG_MAC_POWER_SAVE) ? "MAC" : | 1114 | (pwrsave_status == |
1022 | (pwrsave_status == CSR_GP_REG_PHY_POWER_SAVE) ? "PHY" : | 1115 | CSR_GP_REG_NO_POWER_SAVE) ? "none" : (pwrsave_status == |
1023 | "error"); | 1116 | CSR_GP_REG_MAC_POWER_SAVE) |
1117 | ? "MAC" : (pwrsave_status == | ||
1118 | CSR_GP_REG_PHY_POWER_SAVE) ? "PHY" : "error"); | ||
1024 | 1119 | ||
1025 | return simple_read_from_buffer(user_buf, count, ppos, buf, pos); | 1120 | return simple_read_from_buffer(user_buf, count, ppos, buf, pos); |
1026 | } | 1121 | } |
1027 | 1122 | ||
1028 | static ssize_t il_dbgfs_clear_ucode_stats_write(struct file *file, | 1123 | static ssize_t |
1029 | const char __user *user_buf, | 1124 | il_dbgfs_clear_ucode_stats_write(struct file *file, |
1030 | size_t count, loff_t *ppos) | 1125 | const char __user * user_buf, size_t count, |
1126 | loff_t * ppos) | ||
1031 | { | 1127 | { |
1032 | struct il_priv *il = file->private_data; | 1128 | struct il_priv *il = file->private_data; |
1033 | char buf[8]; | 1129 | char buf[8]; |
@@ -1035,7 +1131,7 @@ static ssize_t il_dbgfs_clear_ucode_stats_write(struct file *file, | |||
1035 | int clear; | 1131 | int clear; |
1036 | 1132 | ||
1037 | memset(buf, 0, sizeof(buf)); | 1133 | memset(buf, 0, sizeof(buf)); |
1038 | buf_size = min(count, sizeof(buf) - 1); | 1134 | buf_size = min(count, sizeof(buf) - 1); |
1039 | if (copy_from_user(buf, user_buf, buf_size)) | 1135 | if (copy_from_user(buf, user_buf, buf_size)) |
1040 | return -EFAULT; | 1136 | return -EFAULT; |
1041 | if (sscanf(buf, "%d", &clear) != 1) | 1137 | if (sscanf(buf, "%d", &clear) != 1) |
@@ -1049,35 +1145,36 @@ static ssize_t il_dbgfs_clear_ucode_stats_write(struct file *file, | |||
1049 | return count; | 1145 | return count; |
1050 | } | 1146 | } |
1051 | 1147 | ||
1052 | static ssize_t il_dbgfs_rxon_flags_read(struct file *file, | 1148 | static ssize_t |
1053 | char __user *user_buf, | 1149 | il_dbgfs_rxon_flags_read(struct file *file, char __user * user_buf, |
1054 | size_t count, loff_t *ppos) { | 1150 | size_t count, loff_t * ppos) |
1151 | { | ||
1055 | 1152 | ||
1056 | struct il_priv *il = file->private_data; | 1153 | struct il_priv *il = file->private_data; |
1057 | int len = 0; | 1154 | int len = 0; |
1058 | char buf[20]; | 1155 | char buf[20]; |
1059 | 1156 | ||
1060 | len = sprintf(buf, "0x%04X\n", | 1157 | len = sprintf(buf, "0x%04X\n", le32_to_cpu(il->ctx.active.flags)); |
1061 | le32_to_cpu(il->ctx.active.flags)); | ||
1062 | return simple_read_from_buffer(user_buf, count, ppos, buf, len); | 1158 | return simple_read_from_buffer(user_buf, count, ppos, buf, len); |
1063 | } | 1159 | } |
1064 | 1160 | ||
1065 | static ssize_t il_dbgfs_rxon_filter_flags_read(struct file *file, | 1161 | static ssize_t |
1066 | char __user *user_buf, | 1162 | il_dbgfs_rxon_filter_flags_read(struct file *file, char __user * user_buf, |
1067 | size_t count, loff_t *ppos) { | 1163 | size_t count, loff_t * ppos) |
1164 | { | ||
1068 | 1165 | ||
1069 | struct il_priv *il = file->private_data; | 1166 | struct il_priv *il = file->private_data; |
1070 | int len = 0; | 1167 | int len = 0; |
1071 | char buf[20]; | 1168 | char buf[20]; |
1072 | 1169 | ||
1073 | len = sprintf(buf, "0x%04X\n", | 1170 | len = |
1074 | le32_to_cpu(il->ctx.active.filter_flags)); | 1171 | sprintf(buf, "0x%04X\n", le32_to_cpu(il->ctx.active.filter_flags)); |
1075 | return simple_read_from_buffer(user_buf, count, ppos, buf, len); | 1172 | return simple_read_from_buffer(user_buf, count, ppos, buf, len); |
1076 | } | 1173 | } |
1077 | 1174 | ||
1078 | static ssize_t il_dbgfs_fh_reg_read(struct file *file, | 1175 | static ssize_t |
1079 | char __user *user_buf, | 1176 | il_dbgfs_fh_reg_read(struct file *file, char __user * user_buf, size_t count, |
1080 | size_t count, loff_t *ppos) | 1177 | loff_t * ppos) |
1081 | { | 1178 | { |
1082 | struct il_priv *il = file->private_data; | 1179 | struct il_priv *il = file->private_data; |
1083 | char *buf; | 1180 | char *buf; |
@@ -1087,8 +1184,9 @@ static ssize_t il_dbgfs_fh_reg_read(struct file *file, | |||
1087 | if (il->cfg->ops->lib->dump_fh) { | 1184 | if (il->cfg->ops->lib->dump_fh) { |
1088 | ret = pos = il->cfg->ops->lib->dump_fh(il, &buf, true); | 1185 | ret = pos = il->cfg->ops->lib->dump_fh(il, &buf, true); |
1089 | if (buf) { | 1186 | if (buf) { |
1090 | ret = simple_read_from_buffer(user_buf, | 1187 | ret = |
1091 | count, ppos, buf, pos); | 1188 | simple_read_from_buffer(user_buf, count, ppos, buf, |
1189 | pos); | ||
1092 | kfree(buf); | 1190 | kfree(buf); |
1093 | } | 1191 | } |
1094 | } | 1192 | } |
@@ -1096,24 +1194,26 @@ static ssize_t il_dbgfs_fh_reg_read(struct file *file, | |||
1096 | return ret; | 1194 | return ret; |
1097 | } | 1195 | } |
1098 | 1196 | ||
1099 | static ssize_t il_dbgfs_missed_beacon_read(struct file *file, | 1197 | static ssize_t |
1100 | char __user *user_buf, | 1198 | il_dbgfs_missed_beacon_read(struct file *file, char __user * user_buf, |
1101 | size_t count, loff_t *ppos) { | 1199 | size_t count, loff_t * ppos) |
1200 | { | ||
1102 | 1201 | ||
1103 | struct il_priv *il = file->private_data; | 1202 | struct il_priv *il = file->private_data; |
1104 | int pos = 0; | 1203 | int pos = 0; |
1105 | char buf[12]; | 1204 | char buf[12]; |
1106 | const size_t bufsz = sizeof(buf); | 1205 | const size_t bufsz = sizeof(buf); |
1107 | 1206 | ||
1108 | pos += scnprintf(buf + pos, bufsz - pos, "%d\n", | 1207 | pos += |
1109 | il->missed_beacon_threshold); | 1208 | scnprintf(buf + pos, bufsz - pos, "%d\n", |
1209 | il->missed_beacon_threshold); | ||
1110 | 1210 | ||
1111 | return simple_read_from_buffer(user_buf, count, ppos, buf, pos); | 1211 | return simple_read_from_buffer(user_buf, count, ppos, buf, pos); |
1112 | } | 1212 | } |
1113 | 1213 | ||
1114 | static ssize_t il_dbgfs_missed_beacon_write(struct file *file, | 1214 | static ssize_t |
1115 | const char __user *user_buf, | 1215 | il_dbgfs_missed_beacon_write(struct file *file, const char __user * user_buf, |
1116 | size_t count, loff_t *ppos) | 1216 | size_t count, loff_t * ppos) |
1117 | { | 1217 | { |
1118 | struct il_priv *il = file->private_data; | 1218 | struct il_priv *il = file->private_data; |
1119 | char buf[8]; | 1219 | char buf[8]; |
@@ -1121,7 +1221,7 @@ static ssize_t il_dbgfs_missed_beacon_write(struct file *file, | |||
1121 | int missed; | 1221 | int missed; |
1122 | 1222 | ||
1123 | memset(buf, 0, sizeof(buf)); | 1223 | memset(buf, 0, sizeof(buf)); |
1124 | buf_size = min(count, sizeof(buf) - 1); | 1224 | buf_size = min(count, sizeof(buf) - 1); |
1125 | if (copy_from_user(buf, user_buf, buf_size)) | 1225 | if (copy_from_user(buf, user_buf, buf_size)) |
1126 | return -EFAULT; | 1226 | return -EFAULT; |
1127 | if (sscanf(buf, "%d", &missed) != 1) | 1227 | if (sscanf(buf, "%d", &missed) != 1) |
@@ -1129,17 +1229,17 @@ static ssize_t il_dbgfs_missed_beacon_write(struct file *file, | |||
1129 | 1229 | ||
1130 | if (missed < IL_MISSED_BEACON_THRESHOLD_MIN || | 1230 | if (missed < IL_MISSED_BEACON_THRESHOLD_MIN || |
1131 | missed > IL_MISSED_BEACON_THRESHOLD_MAX) | 1231 | missed > IL_MISSED_BEACON_THRESHOLD_MAX) |
1132 | il->missed_beacon_threshold = | 1232 | il->missed_beacon_threshold = IL_MISSED_BEACON_THRESHOLD_DEF; |
1133 | IL_MISSED_BEACON_THRESHOLD_DEF; | ||
1134 | else | 1233 | else |
1135 | il->missed_beacon_threshold = missed; | 1234 | il->missed_beacon_threshold = missed; |
1136 | 1235 | ||
1137 | return count; | 1236 | return count; |
1138 | } | 1237 | } |
1139 | 1238 | ||
1140 | static ssize_t il_dbgfs_force_reset_read(struct file *file, | 1239 | static ssize_t |
1141 | char __user *user_buf, | 1240 | il_dbgfs_force_reset_read(struct file *file, char __user * user_buf, |
1142 | size_t count, loff_t *ppos) { | 1241 | size_t count, loff_t * ppos) |
1242 | { | ||
1143 | 1243 | ||
1144 | struct il_priv *il = file->private_data; | 1244 | struct il_priv *il = file->private_data; |
1145 | int pos = 0; | 1245 | int pos = 0; |
@@ -1149,25 +1249,28 @@ static ssize_t il_dbgfs_force_reset_read(struct file *file, | |||
1149 | 1249 | ||
1150 | force_reset = &il->force_reset; | 1250 | force_reset = &il->force_reset; |
1151 | 1251 | ||
1152 | pos += scnprintf(buf + pos, bufsz - pos, | 1252 | pos += |
1153 | "\tnumber of reset request: %d\n", | 1253 | scnprintf(buf + pos, bufsz - pos, "\tnumber of reset request: %d\n", |
1154 | force_reset->reset_request_count); | 1254 | force_reset->reset_request_count); |
1155 | pos += scnprintf(buf + pos, bufsz - pos, | 1255 | pos += |
1156 | "\tnumber of reset request success: %d\n", | 1256 | scnprintf(buf + pos, bufsz - pos, |
1157 | force_reset->reset_success_count); | 1257 | "\tnumber of reset request success: %d\n", |
1158 | pos += scnprintf(buf + pos, bufsz - pos, | 1258 | force_reset->reset_success_count); |
1159 | "\tnumber of reset request reject: %d\n", | 1259 | pos += |
1160 | force_reset->reset_reject_count); | 1260 | scnprintf(buf + pos, bufsz - pos, |
1161 | pos += scnprintf(buf + pos, bufsz - pos, | 1261 | "\tnumber of reset request reject: %d\n", |
1162 | "\treset duration: %lu\n", | 1262 | force_reset->reset_reject_count); |
1163 | force_reset->reset_duration); | 1263 | pos += |
1264 | scnprintf(buf + pos, bufsz - pos, "\treset duration: %lu\n", | ||
1265 | force_reset->reset_duration); | ||
1164 | 1266 | ||
1165 | return simple_read_from_buffer(user_buf, count, ppos, buf, pos); | 1267 | return simple_read_from_buffer(user_buf, count, ppos, buf, pos); |
1166 | } | 1268 | } |
1167 | 1269 | ||
1168 | static ssize_t il_dbgfs_force_reset_write(struct file *file, | 1270 | static ssize_t |
1169 | const char __user *user_buf, | 1271 | il_dbgfs_force_reset_write(struct file *file, const char __user * user_buf, |
1170 | size_t count, loff_t *ppos) { | 1272 | size_t count, loff_t * ppos) |
1273 | { | ||
1171 | 1274 | ||
1172 | int ret; | 1275 | int ret; |
1173 | struct il_priv *il = file->private_data; | 1276 | struct il_priv *il = file->private_data; |
@@ -1177,9 +1280,10 @@ static ssize_t il_dbgfs_force_reset_write(struct file *file, | |||
1177 | return ret ? ret : count; | 1280 | return ret ? ret : count; |
1178 | } | 1281 | } |
1179 | 1282 | ||
1180 | static ssize_t il_dbgfs_wd_timeout_write(struct file *file, | 1283 | static ssize_t |
1181 | const char __user *user_buf, | 1284 | il_dbgfs_wd_timeout_write(struct file *file, const char __user * user_buf, |
1182 | size_t count, loff_t *ppos) { | 1285 | size_t count, loff_t * ppos) |
1286 | { | ||
1183 | 1287 | ||
1184 | struct il_priv *il = file->private_data; | 1288 | struct il_priv *il = file->private_data; |
1185 | char buf[8]; | 1289 | char buf[8]; |
@@ -1187,7 +1291,7 @@ static ssize_t il_dbgfs_wd_timeout_write(struct file *file, | |||
1187 | int timeout; | 1291 | int timeout; |
1188 | 1292 | ||
1189 | memset(buf, 0, sizeof(buf)); | 1293 | memset(buf, 0, sizeof(buf)); |
1190 | buf_size = min(count, sizeof(buf) - 1); | 1294 | buf_size = min(count, sizeof(buf) - 1); |
1191 | if (copy_from_user(buf, user_buf, buf_size)) | 1295 | if (copy_from_user(buf, user_buf, buf_size)) |
1192 | return -EFAULT; | 1296 | return -EFAULT; |
1193 | if (sscanf(buf, "%d", &timeout) != 1) | 1297 | if (sscanf(buf, "%d", &timeout) != 1) |
@@ -1224,7 +1328,8 @@ DEBUGFS_WRITE_FILE_OPS(wd_timeout); | |||
1224 | * Create the debugfs files and directories | 1328 | * Create the debugfs files and directories |
1225 | * | 1329 | * |
1226 | */ | 1330 | */ |
1227 | int il_dbgfs_register(struct il_priv *il, const char *name) | 1331 | int |
1332 | il_dbgfs_register(struct il_priv *il, const char *name) | ||
1228 | { | 1333 | { |
1229 | struct dentry *phyd = il->hw->wiphy->debugfsdir; | 1334 | struct dentry *phyd = il->hw->wiphy->debugfsdir; |
1230 | struct dentry *dir_drv, *dir_data, *dir_rf, *dir_debug; | 1335 | struct dentry *dir_drv, *dir_data, *dir_rf, *dir_debug; |
@@ -1281,8 +1386,7 @@ int il_dbgfs_register(struct il_priv *il, const char *name) | |||
1281 | if (il->cfg->base_params->chain_noise_calib_by_driver) | 1386 | if (il->cfg->base_params->chain_noise_calib_by_driver) |
1282 | DEBUGFS_ADD_BOOL(disable_chain_noise, dir_rf, | 1387 | DEBUGFS_ADD_BOOL(disable_chain_noise, dir_rf, |
1283 | &il->disable_chain_noise_cal); | 1388 | &il->disable_chain_noise_cal); |
1284 | DEBUGFS_ADD_BOOL(disable_tx_power, dir_rf, | 1389 | DEBUGFS_ADD_BOOL(disable_tx_power, dir_rf, &il->disable_tx_power_cal); |
1285 | &il->disable_tx_power_cal); | ||
1286 | return 0; | 1390 | return 0; |
1287 | 1391 | ||
1288 | err: | 1392 | err: |
@@ -1290,13 +1394,15 @@ err: | |||
1290 | il_dbgfs_unregister(il); | 1394 | il_dbgfs_unregister(il); |
1291 | return -ENOMEM; | 1395 | return -ENOMEM; |
1292 | } | 1396 | } |
1397 | |||
1293 | EXPORT_SYMBOL(il_dbgfs_register); | 1398 | EXPORT_SYMBOL(il_dbgfs_register); |
1294 | 1399 | ||
1295 | /** | 1400 | /** |
1296 | * Remove the debugfs files and directories | 1401 | * Remove the debugfs files and directories |
1297 | * | 1402 | * |
1298 | */ | 1403 | */ |
1299 | void il_dbgfs_unregister(struct il_priv *il) | 1404 | void |
1405 | il_dbgfs_unregister(struct il_priv *il) | ||
1300 | { | 1406 | { |
1301 | if (!il->debugfs_dir) | 1407 | if (!il->debugfs_dir) |
1302 | return; | 1408 | return; |
@@ -1304,4 +1410,5 @@ void il_dbgfs_unregister(struct il_priv *il) | |||
1304 | debugfs_remove_recursive(il->debugfs_dir); | 1410 | debugfs_remove_recursive(il->debugfs_dir); |
1305 | il->debugfs_dir = NULL; | 1411 | il->debugfs_dir = NULL; |
1306 | } | 1412 | } |
1413 | |||
1307 | EXPORT_SYMBOL(il_dbgfs_unregister); | 1414 | EXPORT_SYMBOL(il_dbgfs_unregister); |
diff --git a/drivers/net/wireless/iwlegacy/prph.h b/drivers/net/wireless/iwlegacy/prph.h index 029ea8a83dff..ffec4b4a248a 100644 --- a/drivers/net/wireless/iwlegacy/prph.h +++ b/drivers/net/wireless/iwlegacy/prph.h | |||
@@ -91,9 +91,9 @@ | |||
91 | #define APMG_PS_CTRL_VAL_RESET_REQ (0x04000000) | 91 | #define APMG_PS_CTRL_VAL_RESET_REQ (0x04000000) |
92 | #define APMG_PS_CTRL_MSK_PWR_SRC (0x03000000) | 92 | #define APMG_PS_CTRL_MSK_PWR_SRC (0x03000000) |
93 | #define APMG_PS_CTRL_VAL_PWR_SRC_VMAIN (0x00000000) | 93 | #define APMG_PS_CTRL_VAL_PWR_SRC_VMAIN (0x00000000) |
94 | #define APMG_PS_CTRL_VAL_PWR_SRC_MAX (0x01000000) /* 3945 only */ | 94 | #define APMG_PS_CTRL_VAL_PWR_SRC_MAX (0x01000000) /* 3945 only */ |
95 | #define APMG_PS_CTRL_VAL_PWR_SRC_VAUX (0x02000000) | 95 | #define APMG_PS_CTRL_VAL_PWR_SRC_VAUX (0x02000000) |
96 | #define APMG_SVR_VOLTAGE_CONFIG_BIT_MSK (0x000001E0) /* bit 8:5 */ | 96 | #define APMG_SVR_VOLTAGE_CONFIG_BIT_MSK (0x000001E0) /* bit 8:5 */ |
97 | #define APMG_SVR_DIGITAL_VOLTAGE_1_32 (0x00000060) | 97 | #define APMG_SVR_DIGITAL_VOLTAGE_1_32 (0x00000060) |
98 | 98 | ||
99 | #define APMG_PCIDEV_STT_VAL_L1_ACT_DIS (0x00000800) | 99 | #define APMG_PCIDEV_STT_VAL_L1_ACT_DIS (0x00000800) |
@@ -202,19 +202,19 @@ | |||
202 | */ | 202 | */ |
203 | 203 | ||
204 | /* BSM bit fields */ | 204 | /* BSM bit fields */ |
205 | #define BSM_WR_CTRL_REG_BIT_START (0x80000000) /* start boot load now */ | 205 | #define BSM_WR_CTRL_REG_BIT_START (0x80000000) /* start boot load now */ |
206 | #define BSM_WR_CTRL_REG_BIT_START_EN (0x40000000) /* enable boot after pwrup*/ | 206 | #define BSM_WR_CTRL_REG_BIT_START_EN (0x40000000) /* enable boot after pwrup */ |
207 | #define BSM_DRAM_INST_LOAD (0x80000000) /* start program load now */ | 207 | #define BSM_DRAM_INST_LOAD (0x80000000) /* start program load now */ |
208 | 208 | ||
209 | /* BSM addresses */ | 209 | /* BSM addresses */ |
210 | #define BSM_BASE (PRPH_BASE + 0x3400) | 210 | #define BSM_BASE (PRPH_BASE + 0x3400) |
211 | #define BSM_END (PRPH_BASE + 0x3800) | 211 | #define BSM_END (PRPH_BASE + 0x3800) |
212 | 212 | ||
213 | #define BSM_WR_CTRL_REG (BSM_BASE + 0x000) /* ctl and status */ | 213 | #define BSM_WR_CTRL_REG (BSM_BASE + 0x000) /* ctl and status */ |
214 | #define BSM_WR_MEM_SRC_REG (BSM_BASE + 0x004) /* source in BSM mem */ | 214 | #define BSM_WR_MEM_SRC_REG (BSM_BASE + 0x004) /* source in BSM mem */ |
215 | #define BSM_WR_MEM_DST_REG (BSM_BASE + 0x008) /* dest in SRAM mem */ | 215 | #define BSM_WR_MEM_DST_REG (BSM_BASE + 0x008) /* dest in SRAM mem */ |
216 | #define BSM_WR_DWCOUNT_REG (BSM_BASE + 0x00C) /* bytes */ | 216 | #define BSM_WR_DWCOUNT_REG (BSM_BASE + 0x00C) /* bytes */ |
217 | #define BSM_WR_STATUS_REG (BSM_BASE + 0x010) /* bit 0: 1 == done */ | 217 | #define BSM_WR_STATUS_REG (BSM_BASE + 0x010) /* bit 0: 1 == done */ |
218 | 218 | ||
219 | /* | 219 | /* |
220 | * Pointers and size regs for bootstrap load and data SRAM save/restore. | 220 | * Pointers and size regs for bootstrap load and data SRAM save/restore. |
@@ -231,8 +231,7 @@ | |||
231 | * Read/write, address range from LOWER_BOUND to (LOWER_BOUND + SIZE -1) | 231 | * Read/write, address range from LOWER_BOUND to (LOWER_BOUND + SIZE -1) |
232 | */ | 232 | */ |
233 | #define BSM_SRAM_LOWER_BOUND (PRPH_BASE + 0x3800) | 233 | #define BSM_SRAM_LOWER_BOUND (PRPH_BASE + 0x3800) |
234 | #define BSM_SRAM_SIZE (1024) /* bytes */ | 234 | #define BSM_SRAM_SIZE (1024) /* bytes */ |
235 | |||
236 | 235 | ||
237 | /* 3945 Tx scheduler registers */ | 236 | /* 3945 Tx scheduler registers */ |
238 | #define ALM_SCD_BASE (PRPH_BASE + 0x2E00) | 237 | #define ALM_SCD_BASE (PRPH_BASE + 0x2E00) |
@@ -520,4 +519,4 @@ | |||
520 | 519 | ||
521 | /*********************** END TX SCHEDULER *************************************/ | 520 | /*********************** END TX SCHEDULER *************************************/ |
522 | 521 | ||
523 | #endif /* __il_prph_h__ */ | 522 | #endif /* __il_prph_h__ */ |