aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/net/wireless/iwlegacy/iwl4965-base.c
diff options
context:
space:
mode:
authorStanislaw Gruszka <sgruszka@redhat.com>2011-10-24 10:49:25 -0400
committerStanislaw Gruszka <sgruszka@redhat.com>2011-11-15 05:17:00 -0500
commit46bc8d4b0e73ac75de323646d75a2333f47b84c3 (patch)
treea11a89b1a3480135e1510aacd5909485ab2e5be7 /drivers/net/wireless/iwlegacy/iwl4965-base.c
parente2ebc8337d116acdc25469ec8547ae665f50a4c1 (diff)
iwlegacy: rename priv to il
Make code shorter. Signed-off-by: Stanislaw Gruszka <sgruszka@redhat.com>
Diffstat (limited to 'drivers/net/wireless/iwlegacy/iwl4965-base.c')
-rw-r--r--drivers/net/wireless/iwlegacy/iwl4965-base.c1750
1 files changed, 875 insertions, 875 deletions
diff --git a/drivers/net/wireless/iwlegacy/iwl4965-base.c b/drivers/net/wireless/iwlegacy/iwl4965-base.c
index bd37c9226e65..ae8a93751561 100644
--- a/drivers/net/wireless/iwlegacy/iwl4965-base.c
+++ b/drivers/net/wireless/iwlegacy/iwl4965-base.c
@@ -87,85 +87,85 @@ MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
87MODULE_LICENSE("GPL"); 87MODULE_LICENSE("GPL");
88MODULE_ALIAS("iwl4965"); 88MODULE_ALIAS("iwl4965");
89 89
90void il4965_update_chain_flags(struct il_priv *priv) 90void il4965_update_chain_flags(struct il_priv *il)
91{ 91{
92 struct il_rxon_context *ctx; 92 struct il_rxon_context *ctx;
93 93
94 if (priv->cfg->ops->hcmd->set_rxon_chain) { 94 if (il->cfg->ops->hcmd->set_rxon_chain) {
95 for_each_context(priv, ctx) { 95 for_each_context(il, ctx) {
96 priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx); 96 il->cfg->ops->hcmd->set_rxon_chain(il, ctx);
97 if (ctx->active.rx_chain != ctx->staging.rx_chain) 97 if (ctx->active.rx_chain != ctx->staging.rx_chain)
98 il_commit_rxon(priv, ctx); 98 il_commit_rxon(il, ctx);
99 } 99 }
100 } 100 }
101} 101}
102 102
103static void il4965_clear_free_frames(struct il_priv *priv) 103static void il4965_clear_free_frames(struct il_priv *il)
104{ 104{
105 struct list_head *element; 105 struct list_head *element;
106 106
107 IL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n", 107 IL_DEBUG_INFO(il, "%d frames on pre-allocated heap on clear.\n",
108 priv->frames_count); 108 il->frames_count);
109 109
110 while (!list_empty(&priv->free_frames)) { 110 while (!list_empty(&il->free_frames)) {
111 element = priv->free_frames.next; 111 element = il->free_frames.next;
112 list_del(element); 112 list_del(element);
113 kfree(list_entry(element, struct il_frame, list)); 113 kfree(list_entry(element, struct il_frame, list));
114 priv->frames_count--; 114 il->frames_count--;
115 } 115 }
116 116
117 if (priv->frames_count) { 117 if (il->frames_count) {
118 IL_WARN(priv, "%d frames still in use. Did we lose one?\n", 118 IL_WARN(il, "%d frames still in use. Did we lose one?\n",
119 priv->frames_count); 119 il->frames_count);
120 priv->frames_count = 0; 120 il->frames_count = 0;
121 } 121 }
122} 122}
123 123
124static struct il_frame *il4965_get_free_frame(struct il_priv *priv) 124static struct il_frame *il4965_get_free_frame(struct il_priv *il)
125{ 125{
126 struct il_frame *frame; 126 struct il_frame *frame;
127 struct list_head *element; 127 struct list_head *element;
128 if (list_empty(&priv->free_frames)) { 128 if (list_empty(&il->free_frames)) {
129 frame = kzalloc(sizeof(*frame), GFP_KERNEL); 129 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
130 if (!frame) { 130 if (!frame) {
131 IL_ERR(priv, "Could not allocate frame!\n"); 131 IL_ERR(il, "Could not allocate frame!\n");
132 return NULL; 132 return NULL;
133 } 133 }
134 134
135 priv->frames_count++; 135 il->frames_count++;
136 return frame; 136 return frame;
137 } 137 }
138 138
139 element = priv->free_frames.next; 139 element = il->free_frames.next;
140 list_del(element); 140 list_del(element);
141 return list_entry(element, struct il_frame, list); 141 return list_entry(element, struct il_frame, list);
142} 142}
143 143
144static void il4965_free_frame(struct il_priv *priv, struct il_frame *frame) 144static void il4965_free_frame(struct il_priv *il, struct il_frame *frame)
145{ 145{
146 memset(frame, 0, sizeof(*frame)); 146 memset(frame, 0, sizeof(*frame));
147 list_add(&frame->list, &priv->free_frames); 147 list_add(&frame->list, &il->free_frames);
148} 148}
149 149
150static u32 il4965_fill_beacon_frame(struct il_priv *priv, 150static u32 il4965_fill_beacon_frame(struct il_priv *il,
151 struct ieee80211_hdr *hdr, 151 struct ieee80211_hdr *hdr,
152 int left) 152 int left)
153{ 153{
154 lockdep_assert_held(&priv->mutex); 154 lockdep_assert_held(&il->mutex);
155 155
156 if (!priv->beacon_skb) 156 if (!il->beacon_skb)
157 return 0; 157 return 0;
158 158
159 if (priv->beacon_skb->len > left) 159 if (il->beacon_skb->len > left)
160 return 0; 160 return 0;
161 161
162 memcpy(hdr, priv->beacon_skb->data, priv->beacon_skb->len); 162 memcpy(hdr, il->beacon_skb->data, il->beacon_skb->len);
163 163
164 return priv->beacon_skb->len; 164 return il->beacon_skb->len;
165} 165}
166 166
167/* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */ 167/* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */
168static void il4965_set_beacon_tim(struct il_priv *priv, 168static void il4965_set_beacon_tim(struct il_priv *il,
169 struct il_tx_beacon_cmd *tx_beacon_cmd, 169 struct il_tx_beacon_cmd *tx_beacon_cmd,
170 u8 *beacon, u32 frame_size) 170 u8 *beacon, u32 frame_size)
171{ 171{
@@ -188,10 +188,10 @@ static void il4965_set_beacon_tim(struct il_priv *priv,
188 tx_beacon_cmd->tim_idx = cpu_to_le16(tim_idx); 188 tx_beacon_cmd->tim_idx = cpu_to_le16(tim_idx);
189 tx_beacon_cmd->tim_size = beacon[tim_idx+1]; 189 tx_beacon_cmd->tim_size = beacon[tim_idx+1];
190 } else 190 } else
191 IL_WARN(priv, "Unable to find TIM Element in beacon\n"); 191 IL_WARN(il, "Unable to find TIM Element in beacon\n");
192} 192}
193 193
194static unsigned int il4965_hw_get_beacon_cmd(struct il_priv *priv, 194static unsigned int il4965_hw_get_beacon_cmd(struct il_priv *il,
195 struct il_frame *frame) 195 struct il_frame *frame)
196{ 196{
197 struct il_tx_beacon_cmd *tx_beacon_cmd; 197 struct il_tx_beacon_cmd *tx_beacon_cmd;
@@ -203,10 +203,10 @@ static unsigned int il4965_hw_get_beacon_cmd(struct il_priv *priv,
203 * beacon contents. 203 * beacon contents.
204 */ 204 */
205 205
206 lockdep_assert_held(&priv->mutex); 206 lockdep_assert_held(&il->mutex);
207 207
208 if (!priv->beacon_ctx) { 208 if (!il->beacon_ctx) {
209 IL_ERR(priv, "trying to build beacon w/o beacon context!\n"); 209 IL_ERR(il, "trying to build beacon w/o beacon context!\n");
210 return 0; 210 return 0;
211 } 211 }
212 212
@@ -215,7 +215,7 @@ static unsigned int il4965_hw_get_beacon_cmd(struct il_priv *priv,
215 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd)); 215 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
216 216
217 /* Set up TX beacon contents */ 217 /* Set up TX beacon contents */
218 frame_size = il4965_fill_beacon_frame(priv, tx_beacon_cmd->frame, 218 frame_size = il4965_fill_beacon_frame(il, tx_beacon_cmd->frame,
219 sizeof(frame->u) - sizeof(*tx_beacon_cmd)); 219 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
220 if (WARN_ON_ONCE(frame_size > MAX_MPDU_SIZE)) 220 if (WARN_ON_ONCE(frame_size > MAX_MPDU_SIZE))
221 return 0; 221 return 0;
@@ -224,20 +224,20 @@ static unsigned int il4965_hw_get_beacon_cmd(struct il_priv *priv,
224 224
225 /* Set up TX command fields */ 225 /* Set up TX command fields */
226 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size); 226 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
227 tx_beacon_cmd->tx.sta_id = priv->beacon_ctx->bcast_sta_id; 227 tx_beacon_cmd->tx.sta_id = il->beacon_ctx->bcast_sta_id;
228 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE; 228 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
229 tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK | 229 tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
230 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK; 230 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK;
231 231
232 /* Set up TX beacon command fields */ 232 /* Set up TX beacon command fields */
233 il4965_set_beacon_tim(priv, tx_beacon_cmd, (u8 *)tx_beacon_cmd->frame, 233 il4965_set_beacon_tim(il, tx_beacon_cmd, (u8 *)tx_beacon_cmd->frame,
234 frame_size); 234 frame_size);
235 235
236 /* Set up packet rate and flags */ 236 /* Set up packet rate and flags */
237 rate = il_get_lowest_plcp(priv, priv->beacon_ctx); 237 rate = il_get_lowest_plcp(il, il->beacon_ctx);
238 priv->mgmt_tx_ant = il4965_toggle_tx_ant(priv, priv->mgmt_tx_ant, 238 il->mgmt_tx_ant = il4965_toggle_tx_ant(il, il->mgmt_tx_ant,
239 priv->hw_params.valid_tx_ant); 239 il->hw_params.valid_tx_ant);
240 rate_flags = il4965_ant_idx_to_flags(priv->mgmt_tx_ant); 240 rate_flags = il4965_ant_idx_to_flags(il->mgmt_tx_ant);
241 if ((rate >= IL_FIRST_CCK_RATE) && (rate <= IL_LAST_CCK_RATE)) 241 if ((rate >= IL_FIRST_CCK_RATE) && (rate <= IL_LAST_CCK_RATE))
242 rate_flags |= RATE_MCS_CCK_MSK; 242 rate_flags |= RATE_MCS_CCK_MSK;
243 tx_beacon_cmd->tx.rate_n_flags = il4965_hw_set_rate_n_flags(rate, 243 tx_beacon_cmd->tx.rate_n_flags = il4965_hw_set_rate_n_flags(rate,
@@ -246,30 +246,30 @@ static unsigned int il4965_hw_get_beacon_cmd(struct il_priv *priv,
246 return sizeof(*tx_beacon_cmd) + frame_size; 246 return sizeof(*tx_beacon_cmd) + frame_size;
247} 247}
248 248
249int il4965_send_beacon_cmd(struct il_priv *priv) 249int il4965_send_beacon_cmd(struct il_priv *il)
250{ 250{
251 struct il_frame *frame; 251 struct il_frame *frame;
252 unsigned int frame_size; 252 unsigned int frame_size;
253 int rc; 253 int rc;
254 254
255 frame = il4965_get_free_frame(priv); 255 frame = il4965_get_free_frame(il);
256 if (!frame) { 256 if (!frame) {
257 IL_ERR(priv, "Could not obtain free frame buffer for beacon " 257 IL_ERR(il, "Could not obtain free frame buffer for beacon "
258 "command.\n"); 258 "command.\n");
259 return -ENOMEM; 259 return -ENOMEM;
260 } 260 }
261 261
262 frame_size = il4965_hw_get_beacon_cmd(priv, frame); 262 frame_size = il4965_hw_get_beacon_cmd(il, frame);
263 if (!frame_size) { 263 if (!frame_size) {
264 IL_ERR(priv, "Error configuring the beacon command\n"); 264 IL_ERR(il, "Error configuring the beacon command\n");
265 il4965_free_frame(priv, frame); 265 il4965_free_frame(il, frame);
266 return -EINVAL; 266 return -EINVAL;
267 } 267 }
268 268
269 rc = il_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size, 269 rc = il_send_cmd_pdu(il, REPLY_TX_BEACON, frame_size,
270 &frame->u.cmd[0]); 270 &frame->u.cmd[0]);
271 271
272 il4965_free_frame(priv, frame); 272 il4965_free_frame(il, frame);
273 273
274 return rc; 274 return rc;
275} 275}
@@ -315,17 +315,17 @@ static inline u8 il4965_tfd_get_num_tbs(struct il_tfd *tfd)
315 315
316/** 316/**
317 * il4965_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr] 317 * il4965_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
318 * @priv - driver private data 318 * @il - driver ilate data
319 * @txq - tx queue 319 * @txq - tx queue
320 * 320 *
321 * Does NOT advance any TFD circular buffer read/write indexes 321 * Does NOT advance any TFD circular buffer read/write indexes
322 * Does NOT free the TFD itself (which is within circular buffer) 322 * Does NOT free the TFD itself (which is within circular buffer)
323 */ 323 */
324void il4965_hw_txq_free_tfd(struct il_priv *priv, struct il_tx_queue *txq) 324void il4965_hw_txq_free_tfd(struct il_priv *il, struct il_tx_queue *txq)
325{ 325{
326 struct il_tfd *tfd_tmp = (struct il_tfd *)txq->tfds; 326 struct il_tfd *tfd_tmp = (struct il_tfd *)txq->tfds;
327 struct il_tfd *tfd; 327 struct il_tfd *tfd;
328 struct pci_dev *dev = priv->pci_dev; 328 struct pci_dev *dev = il->pci_dev;
329 int index = txq->q.read_ptr; 329 int index = txq->q.read_ptr;
330 int i; 330 int i;
331 int num_tbs; 331 int num_tbs;
@@ -336,7 +336,7 @@ void il4965_hw_txq_free_tfd(struct il_priv *priv, struct il_tx_queue *txq)
336 num_tbs = il4965_tfd_get_num_tbs(tfd); 336 num_tbs = il4965_tfd_get_num_tbs(tfd);
337 337
338 if (num_tbs >= IL_NUM_OF_TBS) { 338 if (num_tbs >= IL_NUM_OF_TBS) {
339 IL_ERR(priv, "Too many chunks: %i\n", num_tbs); 339 IL_ERR(il, "Too many chunks: %i\n", num_tbs);
340 /* @todo issue fatal error, it is quite serious situation */ 340 /* @todo issue fatal error, it is quite serious situation */
341 return; 341 return;
342 } 342 }
@@ -368,7 +368,7 @@ void il4965_hw_txq_free_tfd(struct il_priv *priv, struct il_tx_queue *txq)
368 } 368 }
369} 369}
370 370
371int il4965_hw_txq_attach_buf_to_tfd(struct il_priv *priv, 371int il4965_hw_txq_attach_buf_to_tfd(struct il_priv *il,
372 struct il_tx_queue *txq, 372 struct il_tx_queue *txq,
373 dma_addr_t addr, u16 len, 373 dma_addr_t addr, u16 len,
374 u8 reset, u8 pad) 374 u8 reset, u8 pad)
@@ -388,14 +388,14 @@ int il4965_hw_txq_attach_buf_to_tfd(struct il_priv *priv,
388 388
389 /* Each TFD can point to a maximum 20 Tx buffers */ 389 /* Each TFD can point to a maximum 20 Tx buffers */
390 if (num_tbs >= IL_NUM_OF_TBS) { 390 if (num_tbs >= IL_NUM_OF_TBS) {
391 IL_ERR(priv, "Error can not send more than %d chunks\n", 391 IL_ERR(il, "Error can not send more than %d chunks\n",
392 IL_NUM_OF_TBS); 392 IL_NUM_OF_TBS);
393 return -EINVAL; 393 return -EINVAL;
394 } 394 }
395 395
396 BUG_ON(addr & ~DMA_BIT_MASK(36)); 396 BUG_ON(addr & ~DMA_BIT_MASK(36));
397 if (unlikely(addr & ~IL_TX_DMA_MASK)) 397 if (unlikely(addr & ~IL_TX_DMA_MASK))
398 IL_ERR(priv, "Unaligned address = %llx\n", 398 IL_ERR(il, "Unaligned address = %llx\n",
399 (unsigned long long)addr); 399 (unsigned long long)addr);
400 400
401 il4965_tfd_set_tb(tfd, num_tbs, addr, len); 401 il4965_tfd_set_tb(tfd, num_tbs, addr, len);
@@ -410,13 +410,13 @@ int il4965_hw_txq_attach_buf_to_tfd(struct il_priv *priv,
410 * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA 410 * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
411 * channels supported in hardware. 411 * channels supported in hardware.
412 */ 412 */
413int il4965_hw_tx_queue_init(struct il_priv *priv, 413int il4965_hw_tx_queue_init(struct il_priv *il,
414 struct il_tx_queue *txq) 414 struct il_tx_queue *txq)
415{ 415{
416 int txq_id = txq->q.id; 416 int txq_id = txq->q.id;
417 417
418 /* Circular buffer (TFD queue in DRAM) physical base address */ 418 /* Circular buffer (TFD queue in DRAM) physical base address */
419 il_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id), 419 il_write_direct32(il, FH_MEM_CBBC_QUEUE(txq_id),
420 txq->q.dma_addr >> 8); 420 txq->q.dma_addr >> 8);
421 421
422 return 0; 422 return 0;
@@ -427,7 +427,7 @@ int il4965_hw_tx_queue_init(struct il_priv *priv,
427 * Generic RX handler implementations 427 * Generic RX handler implementations
428 * 428 *
429 ******************************************************************************/ 429 ******************************************************************************/
430static void il4965_rx_reply_alive(struct il_priv *priv, 430static void il4965_rx_reply_alive(struct il_priv *il,
431 struct il_rx_mem_buffer *rxb) 431 struct il_rx_mem_buffer *rxb)
432{ 432{
433 struct il_rx_packet *pkt = rxb_addr(rxb); 433 struct il_rx_packet *pkt = rxb_addr(rxb);
@@ -436,31 +436,31 @@ static void il4965_rx_reply_alive(struct il_priv *priv,
436 436
437 palive = &pkt->u.alive_frame; 437 palive = &pkt->u.alive_frame;
438 438
439 IL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision " 439 IL_DEBUG_INFO(il, "Alive ucode status 0x%08X revision "
440 "0x%01X 0x%01X\n", 440 "0x%01X 0x%01X\n",
441 palive->is_valid, palive->ver_type, 441 palive->is_valid, palive->ver_type,
442 palive->ver_subtype); 442 palive->ver_subtype);
443 443
444 if (palive->ver_subtype == INITIALIZE_SUBTYPE) { 444 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
445 IL_DEBUG_INFO(priv, "Initialization Alive received.\n"); 445 IL_DEBUG_INFO(il, "Initialization Alive received.\n");
446 memcpy(&priv->card_alive_init, 446 memcpy(&il->card_alive_init,
447 &pkt->u.alive_frame, 447 &pkt->u.alive_frame,
448 sizeof(struct il_init_alive_resp)); 448 sizeof(struct il_init_alive_resp));
449 pwork = &priv->init_alive_start; 449 pwork = &il->init_alive_start;
450 } else { 450 } else {
451 IL_DEBUG_INFO(priv, "Runtime Alive received.\n"); 451 IL_DEBUG_INFO(il, "Runtime Alive received.\n");
452 memcpy(&priv->card_alive, &pkt->u.alive_frame, 452 memcpy(&il->card_alive, &pkt->u.alive_frame,
453 sizeof(struct il_alive_resp)); 453 sizeof(struct il_alive_resp));
454 pwork = &priv->alive_start; 454 pwork = &il->alive_start;
455 } 455 }
456 456
457 /* We delay the ALIVE response by 5ms to 457 /* We delay the ALIVE response by 5ms to
458 * give the HW RF Kill time to activate... */ 458 * give the HW RF Kill time to activate... */
459 if (palive->is_valid == UCODE_VALID_OK) 459 if (palive->is_valid == UCODE_VALID_OK)
460 queue_delayed_work(priv->workqueue, pwork, 460 queue_delayed_work(il->workqueue, pwork,
461 msecs_to_jiffies(5)); 461 msecs_to_jiffies(5));
462 else 462 else
463 IL_WARN(priv, "uCode did not respond OK.\n"); 463 IL_WARN(il, "uCode did not respond OK.\n");
464} 464}
465 465
466/** 466/**
@@ -475,19 +475,19 @@ static void il4965_rx_reply_alive(struct il_priv *priv,
475 */ 475 */
476static void il4965_bg_statistics_periodic(unsigned long data) 476static void il4965_bg_statistics_periodic(unsigned long data)
477{ 477{
478 struct il_priv *priv = (struct il_priv *)data; 478 struct il_priv *il = (struct il_priv *)data;
479 479
480 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) 480 if (test_bit(STATUS_EXIT_PENDING, &il->status))
481 return; 481 return;
482 482
483 /* dont send host command if rf-kill is on */ 483 /* dont send host command if rf-kill is on */
484 if (!il_is_ready_rf(priv)) 484 if (!il_is_ready_rf(il))
485 return; 485 return;
486 486
487 il_send_statistics_request(priv, CMD_ASYNC, false); 487 il_send_statistics_request(il, CMD_ASYNC, false);
488} 488}
489 489
490static void il4965_rx_beacon_notif(struct il_priv *priv, 490static void il4965_rx_beacon_notif(struct il_priv *il,
491 struct il_rx_mem_buffer *rxb) 491 struct il_rx_mem_buffer *rxb)
492{ 492{
493 struct il_rx_packet *pkt = rxb_addr(rxb); 493 struct il_rx_packet *pkt = rxb_addr(rxb);
@@ -496,7 +496,7 @@ static void il4965_rx_beacon_notif(struct il_priv *priv,
496#ifdef CONFIG_IWLWIFI_LEGACY_DEBUG 496#ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
497 u8 rate = il4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags); 497 u8 rate = il4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
498 498
499 IL_DEBUG_RX(priv, "beacon status %x retries %d iss %d " 499 IL_DEBUG_RX(il, "beacon status %x retries %d iss %d "
500 "tsf %d %d rate %d\n", 500 "tsf %d %d rate %d\n",
501 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK, 501 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
502 beacon->beacon_notify_hdr.failure_frame, 502 beacon->beacon_notify_hdr.failure_frame,
@@ -505,38 +505,38 @@ static void il4965_rx_beacon_notif(struct il_priv *priv,
505 le32_to_cpu(beacon->low_tsf), rate); 505 le32_to_cpu(beacon->low_tsf), rate);
506#endif 506#endif
507 507
508 priv->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status); 508 il->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status);
509} 509}
510 510
511static void il4965_perform_ct_kill_task(struct il_priv *priv) 511static void il4965_perform_ct_kill_task(struct il_priv *il)
512{ 512{
513 unsigned long flags; 513 unsigned long flags;
514 514
515 IL_DEBUG_POWER(priv, "Stop all queues\n"); 515 IL_DEBUG_POWER(il, "Stop all queues\n");
516 516
517 if (priv->mac80211_registered) 517 if (il->mac80211_registered)
518 ieee80211_stop_queues(priv->hw); 518 ieee80211_stop_queues(il->hw);
519 519
520 il_write32(priv, CSR_UCODE_DRV_GP1_SET, 520 il_write32(il, CSR_UCODE_DRV_GP1_SET,
521 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT); 521 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
522 il_read32(priv, CSR_UCODE_DRV_GP1); 522 il_read32(il, CSR_UCODE_DRV_GP1);
523 523
524 spin_lock_irqsave(&priv->reg_lock, flags); 524 spin_lock_irqsave(&il->reg_lock, flags);
525 if (!il_grab_nic_access(priv)) 525 if (!il_grab_nic_access(il))
526 il_release_nic_access(priv); 526 il_release_nic_access(il);
527 spin_unlock_irqrestore(&priv->reg_lock, flags); 527 spin_unlock_irqrestore(&il->reg_lock, flags);
528} 528}
529 529
530/* Handle notification from uCode that card's power state is changing 530/* Handle notification from uCode that card's power state is changing
531 * due to software, hardware, or critical temperature RFKILL */ 531 * due to software, hardware, or critical temperature RFKILL */
532static void il4965_rx_card_state_notif(struct il_priv *priv, 532static void il4965_rx_card_state_notif(struct il_priv *il,
533 struct il_rx_mem_buffer *rxb) 533 struct il_rx_mem_buffer *rxb)
534{ 534{
535 struct il_rx_packet *pkt = rxb_addr(rxb); 535 struct il_rx_packet *pkt = rxb_addr(rxb);
536 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags); 536 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
537 unsigned long status = priv->status; 537 unsigned long status = il->status;
538 538
539 IL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s CT:%s\n", 539 IL_DEBUG_RF_KILL(il, "Card state received: HW:%s SW:%s CT:%s\n",
540 (flags & HW_CARD_DISABLED) ? "Kill" : "On", 540 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
541 (flags & SW_CARD_DISABLED) ? "Kill" : "On", 541 (flags & SW_CARD_DISABLED) ? "Kill" : "On",
542 (flags & CT_CARD_DISABLED) ? 542 (flags & CT_CARD_DISABLED) ?
@@ -545,37 +545,37 @@ static void il4965_rx_card_state_notif(struct il_priv *priv,
545 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED | 545 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
546 CT_CARD_DISABLED)) { 546 CT_CARD_DISABLED)) {
547 547
548 il_write32(priv, CSR_UCODE_DRV_GP1_SET, 548 il_write32(il, CSR_UCODE_DRV_GP1_SET,
549 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); 549 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
550 550
551 il_write_direct32(priv, HBUS_TARG_MBX_C, 551 il_write_direct32(il, HBUS_TARG_MBX_C,
552 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED); 552 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
553 553
554 if (!(flags & RXON_CARD_DISABLED)) { 554 if (!(flags & RXON_CARD_DISABLED)) {
555 il_write32(priv, CSR_UCODE_DRV_GP1_CLR, 555 il_write32(il, CSR_UCODE_DRV_GP1_CLR,
556 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); 556 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
557 il_write_direct32(priv, HBUS_TARG_MBX_C, 557 il_write_direct32(il, HBUS_TARG_MBX_C,
558 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED); 558 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
559 } 559 }
560 } 560 }
561 561
562 if (flags & CT_CARD_DISABLED) 562 if (flags & CT_CARD_DISABLED)
563 il4965_perform_ct_kill_task(priv); 563 il4965_perform_ct_kill_task(il);
564 564
565 if (flags & HW_CARD_DISABLED) 565 if (flags & HW_CARD_DISABLED)
566 set_bit(STATUS_RF_KILL_HW, &priv->status); 566 set_bit(STATUS_RF_KILL_HW, &il->status);
567 else 567 else
568 clear_bit(STATUS_RF_KILL_HW, &priv->status); 568 clear_bit(STATUS_RF_KILL_HW, &il->status);
569 569
570 if (!(flags & RXON_CARD_DISABLED)) 570 if (!(flags & RXON_CARD_DISABLED))
571 il_scan_cancel(priv); 571 il_scan_cancel(il);
572 572
573 if ((test_bit(STATUS_RF_KILL_HW, &status) != 573 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
574 test_bit(STATUS_RF_KILL_HW, &priv->status))) 574 test_bit(STATUS_RF_KILL_HW, &il->status)))
575 wiphy_rfkill_set_hw_state(priv->hw->wiphy, 575 wiphy_rfkill_set_hw_state(il->hw->wiphy,
576 test_bit(STATUS_RF_KILL_HW, &priv->status)); 576 test_bit(STATUS_RF_KILL_HW, &il->status));
577 else 577 else
578 wake_up(&priv->wait_command_queue); 578 wake_up(&il->wait_command_queue);
579} 579}
580 580
581/** 581/**
@@ -587,55 +587,55 @@ static void il4965_rx_card_state_notif(struct il_priv *priv,
587 * This function chains into the hardware specific files for them to setup 587 * This function chains into the hardware specific files for them to setup
588 * any hardware specific handlers as well. 588 * any hardware specific handlers as well.
589 */ 589 */
590static void il4965_setup_rx_handlers(struct il_priv *priv) 590static void il4965_setup_rx_handlers(struct il_priv *il)
591{ 591{
592 priv->rx_handlers[REPLY_ALIVE] = il4965_rx_reply_alive; 592 il->rx_handlers[REPLY_ALIVE] = il4965_rx_reply_alive;
593 priv->rx_handlers[REPLY_ERROR] = il_rx_reply_error; 593 il->rx_handlers[REPLY_ERROR] = il_rx_reply_error;
594 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = il_rx_csa; 594 il->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = il_rx_csa;
595 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] = 595 il->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
596 il_rx_spectrum_measure_notif; 596 il_rx_spectrum_measure_notif;
597 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = il_rx_pm_sleep_notif; 597 il->rx_handlers[PM_SLEEP_NOTIFICATION] = il_rx_pm_sleep_notif;
598 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] = 598 il->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
599 il_rx_pm_debug_statistics_notif; 599 il_rx_pm_debug_statistics_notif;
600 priv->rx_handlers[BEACON_NOTIFICATION] = il4965_rx_beacon_notif; 600 il->rx_handlers[BEACON_NOTIFICATION] = il4965_rx_beacon_notif;
601 601
602 /* 602 /*
603 * The same handler is used for both the REPLY to a discrete 603 * The same handler is used for both the REPLY to a discrete
604 * statistics request from the host as well as for the periodic 604 * statistics request from the host as well as for the periodic
605 * statistics notifications (after received beacons) from the uCode. 605 * statistics notifications (after received beacons) from the uCode.
606 */ 606 */
607 priv->rx_handlers[REPLY_STATISTICS_CMD] = il4965_reply_statistics; 607 il->rx_handlers[REPLY_STATISTICS_CMD] = il4965_reply_statistics;
608 priv->rx_handlers[STATISTICS_NOTIFICATION] = il4965_rx_statistics; 608 il->rx_handlers[STATISTICS_NOTIFICATION] = il4965_rx_statistics;
609 609
610 il_setup_rx_scan_handlers(priv); 610 il_setup_rx_scan_handlers(il);
611 611
612 /* status change handler */ 612 /* status change handler */
613 priv->rx_handlers[CARD_STATE_NOTIFICATION] = 613 il->rx_handlers[CARD_STATE_NOTIFICATION] =
614 il4965_rx_card_state_notif; 614 il4965_rx_card_state_notif;
615 615
616 priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] = 616 il->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
617 il4965_rx_missed_beacon_notif; 617 il4965_rx_missed_beacon_notif;
618 /* Rx handlers */ 618 /* Rx handlers */
619 priv->rx_handlers[REPLY_RX_PHY_CMD] = il4965_rx_reply_rx_phy; 619 il->rx_handlers[REPLY_RX_PHY_CMD] = il4965_rx_reply_rx_phy;
620 priv->rx_handlers[REPLY_RX_MPDU_CMD] = il4965_rx_reply_rx; 620 il->rx_handlers[REPLY_RX_MPDU_CMD] = il4965_rx_reply_rx;
621 /* block ack */ 621 /* block ack */
622 priv->rx_handlers[REPLY_COMPRESSED_BA] = il4965_rx_reply_compressed_ba; 622 il->rx_handlers[REPLY_COMPRESSED_BA] = il4965_rx_reply_compressed_ba;
623 /* Set up hardware specific Rx handlers */ 623 /* Set up hardware specific Rx handlers */
624 priv->cfg->ops->lib->rx_handler_setup(priv); 624 il->cfg->ops->lib->rx_handler_setup(il);
625} 625}
626 626
627/** 627/**
628 * il4965_rx_handle - Main entry function for receiving responses from uCode 628 * il4965_rx_handle - Main entry function for receiving responses from uCode
629 * 629 *
630 * Uses the priv->rx_handlers callback function array to invoke 630 * Uses the il->rx_handlers callback function array to invoke
631 * the appropriate handlers, including command responses, 631 * the appropriate handlers, including command responses,
632 * frame-received notifications, and other notifications. 632 * frame-received notifications, and other notifications.
633 */ 633 */
634void il4965_rx_handle(struct il_priv *priv) 634void il4965_rx_handle(struct il_priv *il)
635{ 635{
636 struct il_rx_mem_buffer *rxb; 636 struct il_rx_mem_buffer *rxb;
637 struct il_rx_packet *pkt; 637 struct il_rx_packet *pkt;
638 struct il_rx_queue *rxq = &priv->rxq; 638 struct il_rx_queue *rxq = &il->rxq;
639 u32 r, i; 639 u32 r, i;
640 int reclaim; 640 int reclaim;
641 unsigned long flags; 641 unsigned long flags;
@@ -650,7 +650,7 @@ void il4965_rx_handle(struct il_priv *priv)
650 650
651 /* Rx interrupt, but nothing sent from uCode */ 651 /* Rx interrupt, but nothing sent from uCode */
652 if (i == r) 652 if (i == r)
653 IL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i); 653 IL_DEBUG_RX(il, "r = %d, i = %d\n", r, i);
654 654
655 /* calculate total frames need to be restock after handling RX */ 655 /* calculate total frames need to be restock after handling RX */
656 total_empty = r - rxq->write_actual; 656 total_empty = r - rxq->write_actual;
@@ -672,8 +672,8 @@ void il4965_rx_handle(struct il_priv *priv)
672 672
673 rxq->queue[i] = NULL; 673 rxq->queue[i] = NULL;
674 674
675 pci_unmap_page(priv->pci_dev, rxb->page_dma, 675 pci_unmap_page(il->pci_dev, rxb->page_dma,
676 PAGE_SIZE << priv->hw_params.rx_page_order, 676 PAGE_SIZE << il->hw_params.rx_page_order,
677 PCI_DMA_FROMDEVICE); 677 PCI_DMA_FROMDEVICE);
678 pkt = rxb_addr(rxb); 678 pkt = rxb_addr(rxb);
679 679
@@ -697,15 +697,15 @@ void il4965_rx_handle(struct il_priv *priv)
697 /* Based on type of command response or notification, 697 /* Based on type of command response or notification,
698 * handle those that need handling via function in 698 * handle those that need handling via function in
699 * rx_handlers table. See il4965_setup_rx_handlers() */ 699 * rx_handlers table. See il4965_setup_rx_handlers() */
700 if (priv->rx_handlers[pkt->hdr.cmd]) { 700 if (il->rx_handlers[pkt->hdr.cmd]) {
701 IL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r, 701 IL_DEBUG_RX(il, "r = %d, i = %d, %s, 0x%02x\n", r,
702 i, il_get_cmd_string(pkt->hdr.cmd), 702 i, il_get_cmd_string(pkt->hdr.cmd),
703 pkt->hdr.cmd); 703 pkt->hdr.cmd);
704 priv->isr_stats.rx_handlers[pkt->hdr.cmd]++; 704 il->isr_stats.rx_handlers[pkt->hdr.cmd]++;
705 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb); 705 il->rx_handlers[pkt->hdr.cmd] (il, rxb);
706 } else { 706 } else {
707 /* No handling needed */ 707 /* No handling needed */
708 IL_DEBUG_RX(priv, 708 IL_DEBUG_RX(il,
709 "r %d i %d No handler needed for %s, 0x%02x\n", 709 "r %d i %d No handler needed for %s, 0x%02x\n",
710 r, i, il_get_cmd_string(pkt->hdr.cmd), 710 r, i, il_get_cmd_string(pkt->hdr.cmd),
711 pkt->hdr.cmd); 711 pkt->hdr.cmd);
@@ -723,9 +723,9 @@ void il4965_rx_handle(struct il_priv *priv)
723 * and fire off the (possibly) blocking il_send_cmd() 723 * and fire off the (possibly) blocking il_send_cmd()
724 * as we reclaim the driver command queue */ 724 * as we reclaim the driver command queue */
725 if (rxb->page) 725 if (rxb->page)
726 il_tx_cmd_complete(priv, rxb); 726 il_tx_cmd_complete(il, rxb);
727 else 727 else
728 IL_WARN(priv, "Claim null rxb?\n"); 728 IL_WARN(il, "Claim null rxb?\n");
729 } 729 }
730 730
731 /* Reuse the page if possible. For notification packets and 731 /* Reuse the page if possible. For notification packets and
@@ -733,8 +733,8 @@ void il4965_rx_handle(struct il_priv *priv)
733 * rx_free list for reuse later. */ 733 * rx_free list for reuse later. */
734 spin_lock_irqsave(&rxq->lock, flags); 734 spin_lock_irqsave(&rxq->lock, flags);
735 if (rxb->page != NULL) { 735 if (rxb->page != NULL) {
736 rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page, 736 rxb->page_dma = pci_map_page(il->pci_dev, rxb->page,
737 0, PAGE_SIZE << priv->hw_params.rx_page_order, 737 0, PAGE_SIZE << il->hw_params.rx_page_order,
738 PCI_DMA_FROMDEVICE); 738 PCI_DMA_FROMDEVICE);
739 list_add_tail(&rxb->list, &rxq->rx_free); 739 list_add_tail(&rxb->list, &rxq->rx_free);
740 rxq->free_count++; 740 rxq->free_count++;
@@ -750,7 +750,7 @@ void il4965_rx_handle(struct il_priv *priv)
750 count++; 750 count++;
751 if (count >= 8) { 751 if (count >= 8) {
752 rxq->read = i; 752 rxq->read = i;
753 il4965_rx_replenish_now(priv); 753 il4965_rx_replenish_now(il);
754 count = 0; 754 count = 0;
755 } 755 }
756 } 756 }
@@ -759,20 +759,20 @@ void il4965_rx_handle(struct il_priv *priv)
759 /* Backtrack one entry */ 759 /* Backtrack one entry */
760 rxq->read = i; 760 rxq->read = i;
761 if (fill_rx) 761 if (fill_rx)
762 il4965_rx_replenish_now(priv); 762 il4965_rx_replenish_now(il);
763 else 763 else
764 il4965_rx_queue_restock(priv); 764 il4965_rx_queue_restock(il);
765} 765}
766 766
767/* call this function to flush any scheduled tasklet */ 767/* call this function to flush any scheduled tasklet */
768static inline void il4965_synchronize_irq(struct il_priv *priv) 768static inline void il4965_synchronize_irq(struct il_priv *il)
769{ 769{
770 /* wait to make sure we flush pending tasklet*/ 770 /* wait to make sure we flush pending tasklet*/
771 synchronize_irq(priv->pci_dev->irq); 771 synchronize_irq(il->pci_dev->irq);
772 tasklet_kill(&priv->irq_tasklet); 772 tasklet_kill(&il->irq_tasklet);
773} 773}
774 774
775static void il4965_irq_tasklet(struct il_priv *priv) 775static void il4965_irq_tasklet(struct il_priv *il)
776{ 776{
777 u32 inta, handled = 0; 777 u32 inta, handled = 0;
778 u32 inta_fh; 778 u32 inta_fh;
@@ -782,30 +782,30 @@ static void il4965_irq_tasklet(struct il_priv *priv)
782 u32 inta_mask; 782 u32 inta_mask;
783#endif 783#endif
784 784
785 spin_lock_irqsave(&priv->lock, flags); 785 spin_lock_irqsave(&il->lock, flags);
786 786
787 /* Ack/clear/reset pending uCode interrupts. 787 /* Ack/clear/reset pending uCode interrupts.
788 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS, 788 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
789 * and will clear only when CSR_FH_INT_STATUS gets cleared. */ 789 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
790 inta = il_read32(priv, CSR_INT); 790 inta = il_read32(il, CSR_INT);
791 il_write32(priv, CSR_INT, inta); 791 il_write32(il, CSR_INT, inta);
792 792
793 /* Ack/clear/reset pending flow-handler (DMA) interrupts. 793 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
794 * Any new interrupts that happen after this, either while we're 794 * Any new interrupts that happen after this, either while we're
795 * in this tasklet, or later, will show up in next ISR/tasklet. */ 795 * in this tasklet, or later, will show up in next ISR/tasklet. */
796 inta_fh = il_read32(priv, CSR_FH_INT_STATUS); 796 inta_fh = il_read32(il, CSR_FH_INT_STATUS);
797 il_write32(priv, CSR_FH_INT_STATUS, inta_fh); 797 il_write32(il, CSR_FH_INT_STATUS, inta_fh);
798 798
799#ifdef CONFIG_IWLWIFI_LEGACY_DEBUG 799#ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
800 if (il_get_debug_level(priv) & IL_DL_ISR) { 800 if (il_get_debug_level(il) & IL_DL_ISR) {
801 /* just for debug */ 801 /* just for debug */
802 inta_mask = il_read32(priv, CSR_INT_MASK); 802 inta_mask = il_read32(il, CSR_INT_MASK);
803 IL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", 803 IL_DEBUG_ISR(il, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
804 inta, inta_mask, inta_fh); 804 inta, inta_mask, inta_fh);
805 } 805 }
806#endif 806#endif
807 807
808 spin_unlock_irqrestore(&priv->lock, flags); 808 spin_unlock_irqrestore(&il->lock, flags);
809 809
810 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not 810 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
811 * atomic, make sure that inta covers all the interrupts that 811 * atomic, make sure that inta covers all the interrupts that
@@ -818,13 +818,13 @@ static void il4965_irq_tasklet(struct il_priv *priv)
818 818
819 /* Now service all interrupt bits discovered above. */ 819 /* Now service all interrupt bits discovered above. */
820 if (inta & CSR_INT_BIT_HW_ERR) { 820 if (inta & CSR_INT_BIT_HW_ERR) {
821 IL_ERR(priv, "Hardware error detected. Restarting.\n"); 821 IL_ERR(il, "Hardware error detected. Restarting.\n");
822 822
823 /* Tell the device to stop sending interrupts */ 823 /* Tell the device to stop sending interrupts */
824 il_disable_interrupts(priv); 824 il_disable_interrupts(il);
825 825
826 priv->isr_stats.hw++; 826 il->isr_stats.hw++;
827 il_irq_handle_error(priv); 827 il_irq_handle_error(il);
828 828
829 handled |= CSR_INT_BIT_HW_ERR; 829 handled |= CSR_INT_BIT_HW_ERR;
830 830
@@ -832,18 +832,18 @@ static void il4965_irq_tasklet(struct il_priv *priv)
832 } 832 }
833 833
834#ifdef CONFIG_IWLWIFI_LEGACY_DEBUG 834#ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
835 if (il_get_debug_level(priv) & (IL_DL_ISR)) { 835 if (il_get_debug_level(il) & (IL_DL_ISR)) {
836 /* NIC fires this, but we don't use it, redundant with WAKEUP */ 836 /* NIC fires this, but we don't use it, redundant with WAKEUP */
837 if (inta & CSR_INT_BIT_SCD) { 837 if (inta & CSR_INT_BIT_SCD) {
838 IL_DEBUG_ISR(priv, "Scheduler finished to transmit " 838 IL_DEBUG_ISR(il, "Scheduler finished to transmit "
839 "the frame/frames.\n"); 839 "the frame/frames.\n");
840 priv->isr_stats.sch++; 840 il->isr_stats.sch++;
841 } 841 }
842 842
843 /* Alive notification via Rx interrupt will do the real work */ 843 /* Alive notification via Rx interrupt will do the real work */
844 if (inta & CSR_INT_BIT_ALIVE) { 844 if (inta & CSR_INT_BIT_ALIVE) {
845 IL_DEBUG_ISR(priv, "Alive interrupt\n"); 845 IL_DEBUG_ISR(il, "Alive interrupt\n");
846 priv->isr_stats.alive++; 846 il->isr_stats.alive++;
847 } 847 }
848 } 848 }
849#endif 849#endif
@@ -853,26 +853,26 @@ static void il4965_irq_tasklet(struct il_priv *priv)
853 /* HW RF KILL switch toggled */ 853 /* HW RF KILL switch toggled */
854 if (inta & CSR_INT_BIT_RF_KILL) { 854 if (inta & CSR_INT_BIT_RF_KILL) {
855 int hw_rf_kill = 0; 855 int hw_rf_kill = 0;
856 if (!(il_read32(priv, CSR_GP_CNTRL) & 856 if (!(il_read32(il, CSR_GP_CNTRL) &
857 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)) 857 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
858 hw_rf_kill = 1; 858 hw_rf_kill = 1;
859 859
860 IL_WARN(priv, "RF_KILL bit toggled to %s.\n", 860 IL_WARN(il, "RF_KILL bit toggled to %s.\n",
861 hw_rf_kill ? "disable radio" : "enable radio"); 861 hw_rf_kill ? "disable radio" : "enable radio");
862 862
863 priv->isr_stats.rfkill++; 863 il->isr_stats.rfkill++;
864 864
865 /* driver only loads ucode once setting the interface up. 865 /* driver only loads ucode once setting the interface up.
866 * the driver allows loading the ucode even if the radio 866 * the driver allows loading the ucode even if the radio
867 * is killed. Hence update the killswitch state here. The 867 * is killed. Hence update the killswitch state here. The
868 * rfkill handler will care about restarting if needed. 868 * rfkill handler will care about restarting if needed.
869 */ 869 */
870 if (!test_bit(STATUS_ALIVE, &priv->status)) { 870 if (!test_bit(STATUS_ALIVE, &il->status)) {
871 if (hw_rf_kill) 871 if (hw_rf_kill)
872 set_bit(STATUS_RF_KILL_HW, &priv->status); 872 set_bit(STATUS_RF_KILL_HW, &il->status);
873 else 873 else
874 clear_bit(STATUS_RF_KILL_HW, &priv->status); 874 clear_bit(STATUS_RF_KILL_HW, &il->status);
875 wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill); 875 wiphy_rfkill_set_hw_state(il->hw->wiphy, hw_rf_kill);
876 } 876 }
877 877
878 handled |= CSR_INT_BIT_RF_KILL; 878 handled |= CSR_INT_BIT_RF_KILL;
@@ -880,17 +880,17 @@ static void il4965_irq_tasklet(struct il_priv *priv)
880 880
881 /* Chip got too hot and stopped itself */ 881 /* Chip got too hot and stopped itself */
882 if (inta & CSR_INT_BIT_CT_KILL) { 882 if (inta & CSR_INT_BIT_CT_KILL) {
883 IL_ERR(priv, "Microcode CT kill error detected.\n"); 883 IL_ERR(il, "Microcode CT kill error detected.\n");
884 priv->isr_stats.ctkill++; 884 il->isr_stats.ctkill++;
885 handled |= CSR_INT_BIT_CT_KILL; 885 handled |= CSR_INT_BIT_CT_KILL;
886 } 886 }
887 887
888 /* Error detected by uCode */ 888 /* Error detected by uCode */
889 if (inta & CSR_INT_BIT_SW_ERR) { 889 if (inta & CSR_INT_BIT_SW_ERR) {
890 IL_ERR(priv, "Microcode SW error detected. " 890 IL_ERR(il, "Microcode SW error detected. "
891 " Restarting 0x%X.\n", inta); 891 " Restarting 0x%X.\n", inta);
892 priv->isr_stats.sw++; 892 il->isr_stats.sw++;
893 il_irq_handle_error(priv); 893 il_irq_handle_error(il);
894 handled |= CSR_INT_BIT_SW_ERR; 894 handled |= CSR_INT_BIT_SW_ERR;
895 } 895 }
896 896
@@ -900,11 +900,11 @@ static void il4965_irq_tasklet(struct il_priv *priv)
900 * and about any Rx buffers made available while asleep. 900 * and about any Rx buffers made available while asleep.
901 */ 901 */
902 if (inta & CSR_INT_BIT_WAKEUP) { 902 if (inta & CSR_INT_BIT_WAKEUP) {
903 IL_DEBUG_ISR(priv, "Wakeup interrupt\n"); 903 IL_DEBUG_ISR(il, "Wakeup interrupt\n");
904 il_rx_queue_update_write_ptr(priv, &priv->rxq); 904 il_rx_queue_update_write_ptr(il, &il->rxq);
905 for (i = 0; i < priv->hw_params.max_txq_num; i++) 905 for (i = 0; i < il->hw_params.max_txq_num; i++)
906 il_txq_update_write_ptr(priv, &priv->txq[i]); 906 il_txq_update_write_ptr(il, &il->txq[i]);
907 priv->isr_stats.wakeup++; 907 il->isr_stats.wakeup++;
908 handled |= CSR_INT_BIT_WAKEUP; 908 handled |= CSR_INT_BIT_WAKEUP;
909 } 909 }
910 910
@@ -912,46 +912,46 @@ static void il4965_irq_tasklet(struct il_priv *priv)
912 * Rx "responses" (frame-received notification), and other 912 * Rx "responses" (frame-received notification), and other
913 * notifications from uCode come through here*/ 913 * notifications from uCode come through here*/
914 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) { 914 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
915 il4965_rx_handle(priv); 915 il4965_rx_handle(il);
916 priv->isr_stats.rx++; 916 il->isr_stats.rx++;
917 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX); 917 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
918 } 918 }
919 919
920 /* This "Tx" DMA channel is used only for loading uCode */ 920 /* This "Tx" DMA channel is used only for loading uCode */
921 if (inta & CSR_INT_BIT_FH_TX) { 921 if (inta & CSR_INT_BIT_FH_TX) {
922 IL_DEBUG_ISR(priv, "uCode load interrupt\n"); 922 IL_DEBUG_ISR(il, "uCode load interrupt\n");
923 priv->isr_stats.tx++; 923 il->isr_stats.tx++;
924 handled |= CSR_INT_BIT_FH_TX; 924 handled |= CSR_INT_BIT_FH_TX;
925 /* Wake up uCode load routine, now that load is complete */ 925 /* Wake up uCode load routine, now that load is complete */
926 priv->ucode_write_complete = 1; 926 il->ucode_write_complete = 1;
927 wake_up(&priv->wait_command_queue); 927 wake_up(&il->wait_command_queue);
928 } 928 }
929 929
930 if (inta & ~handled) { 930 if (inta & ~handled) {
931 IL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled); 931 IL_ERR(il, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
932 priv->isr_stats.unhandled++; 932 il->isr_stats.unhandled++;
933 } 933 }
934 934
935 if (inta & ~(priv->inta_mask)) { 935 if (inta & ~(il->inta_mask)) {
936 IL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n", 936 IL_WARN(il, "Disabled INTA bits 0x%08x were pending\n",
937 inta & ~priv->inta_mask); 937 inta & ~il->inta_mask);
938 IL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh); 938 IL_WARN(il, " with FH_INT = 0x%08x\n", inta_fh);
939 } 939 }
940 940
941 /* Re-enable all interrupts */ 941 /* Re-enable all interrupts */
942 /* only Re-enable if disabled by irq */ 942 /* only Re-enable if disabled by irq */
943 if (test_bit(STATUS_INT_ENABLED, &priv->status)) 943 if (test_bit(STATUS_INT_ENABLED, &il->status))
944 il_enable_interrupts(priv); 944 il_enable_interrupts(il);
945 /* Re-enable RF_KILL if it occurred */ 945 /* Re-enable RF_KILL if it occurred */
946 else if (handled & CSR_INT_BIT_RF_KILL) 946 else if (handled & CSR_INT_BIT_RF_KILL)
947 il_enable_rfkill_int(priv); 947 il_enable_rfkill_int(il);
948 948
949#ifdef CONFIG_IWLWIFI_LEGACY_DEBUG 949#ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
950 if (il_get_debug_level(priv) & (IL_DL_ISR)) { 950 if (il_get_debug_level(il) & (IL_DL_ISR)) {
951 inta = il_read32(priv, CSR_INT); 951 inta = il_read32(il, CSR_INT);
952 inta_mask = il_read32(priv, CSR_INT_MASK); 952 inta_mask = il_read32(il, CSR_INT_MASK);
953 inta_fh = il_read32(priv, CSR_FH_INT_STATUS); 953 inta_fh = il_read32(il, CSR_FH_INT_STATUS);
954 IL_DEBUG_ISR(priv, 954 IL_DEBUG_ISR(il,
955 "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, " 955 "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
956 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags); 956 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
957 } 957 }
@@ -980,24 +980,24 @@ static void il4965_irq_tasklet(struct il_priv *priv)
980static ssize_t il4965_show_debug_level(struct device *d, 980static ssize_t il4965_show_debug_level(struct device *d,
981 struct device_attribute *attr, char *buf) 981 struct device_attribute *attr, char *buf)
982{ 982{
983 struct il_priv *priv = dev_get_drvdata(d); 983 struct il_priv *il = dev_get_drvdata(d);
984 return sprintf(buf, "0x%08X\n", il_get_debug_level(priv)); 984 return sprintf(buf, "0x%08X\n", il_get_debug_level(il));
985} 985}
986static ssize_t il4965_store_debug_level(struct device *d, 986static ssize_t il4965_store_debug_level(struct device *d,
987 struct device_attribute *attr, 987 struct device_attribute *attr,
988 const char *buf, size_t count) 988 const char *buf, size_t count)
989{ 989{
990 struct il_priv *priv = dev_get_drvdata(d); 990 struct il_priv *il = dev_get_drvdata(d);
991 unsigned long val; 991 unsigned long val;
992 int ret; 992 int ret;
993 993
994 ret = strict_strtoul(buf, 0, &val); 994 ret = strict_strtoul(buf, 0, &val);
995 if (ret) 995 if (ret)
996 IL_ERR(priv, "%s is not in hex or decimal form.\n", buf); 996 IL_ERR(il, "%s is not in hex or decimal form.\n", buf);
997 else { 997 else {
998 priv->debug_level = val; 998 il->debug_level = val;
999 if (il_alloc_traffic_mem(priv)) 999 if (il_alloc_traffic_mem(il))
1000 IL_ERR(priv, 1000 IL_ERR(il,
1001 "Not enough memory to generate traffic log\n"); 1001 "Not enough memory to generate traffic log\n");
1002 } 1002 }
1003 return strnlen(buf, count); 1003 return strnlen(buf, count);
@@ -1013,12 +1013,12 @@ static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
1013static ssize_t il4965_show_temperature(struct device *d, 1013static ssize_t il4965_show_temperature(struct device *d,
1014 struct device_attribute *attr, char *buf) 1014 struct device_attribute *attr, char *buf)
1015{ 1015{
1016 struct il_priv *priv = dev_get_drvdata(d); 1016 struct il_priv *il = dev_get_drvdata(d);
1017 1017
1018 if (!il_is_alive(priv)) 1018 if (!il_is_alive(il))
1019 return -EAGAIN; 1019 return -EAGAIN;
1020 1020
1021 return sprintf(buf, "%d\n", priv->temperature); 1021 return sprintf(buf, "%d\n", il->temperature);
1022} 1022}
1023 1023
1024static DEVICE_ATTR(temperature, S_IRUGO, il4965_show_temperature, NULL); 1024static DEVICE_ATTR(temperature, S_IRUGO, il4965_show_temperature, NULL);
@@ -1026,29 +1026,29 @@ static DEVICE_ATTR(temperature, S_IRUGO, il4965_show_temperature, NULL);
1026static ssize_t il4965_show_tx_power(struct device *d, 1026static ssize_t il4965_show_tx_power(struct device *d,
1027 struct device_attribute *attr, char *buf) 1027 struct device_attribute *attr, char *buf)
1028{ 1028{
1029 struct il_priv *priv = dev_get_drvdata(d); 1029 struct il_priv *il = dev_get_drvdata(d);
1030 1030
1031 if (!il_is_ready_rf(priv)) 1031 if (!il_is_ready_rf(il))
1032 return sprintf(buf, "off\n"); 1032 return sprintf(buf, "off\n");
1033 else 1033 else
1034 return sprintf(buf, "%d\n", priv->tx_power_user_lmt); 1034 return sprintf(buf, "%d\n", il->tx_power_user_lmt);
1035} 1035}
1036 1036
1037static ssize_t il4965_store_tx_power(struct device *d, 1037static ssize_t il4965_store_tx_power(struct device *d,
1038 struct device_attribute *attr, 1038 struct device_attribute *attr,
1039 const char *buf, size_t count) 1039 const char *buf, size_t count)
1040{ 1040{
1041 struct il_priv *priv = dev_get_drvdata(d); 1041 struct il_priv *il = dev_get_drvdata(d);
1042 unsigned long val; 1042 unsigned long val;
1043 int ret; 1043 int ret;
1044 1044
1045 ret = strict_strtoul(buf, 10, &val); 1045 ret = strict_strtoul(buf, 10, &val);
1046 if (ret) 1046 if (ret)
1047 IL_INFO(priv, "%s is not in decimal form.\n", buf); 1047 IL_INFO(il, "%s is not in decimal form.\n", buf);
1048 else { 1048 else {
1049 ret = il_set_tx_power(priv, val, false); 1049 ret = il_set_tx_power(il, val, false);
1050 if (ret) 1050 if (ret)
1051 IL_ERR(priv, "failed setting tx power (0x%d).\n", 1051 IL_ERR(il, "failed setting tx power (0x%d).\n",
1052 ret); 1052 ret);
1053 else 1053 else
1054 ret = count; 1054 ret = count;
@@ -1079,52 +1079,52 @@ static struct attribute_group il_attribute_group = {
1079 * 1079 *
1080 ******************************************************************************/ 1080 ******************************************************************************/
1081 1081
1082static void il4965_dealloc_ucode_pci(struct il_priv *priv) 1082static void il4965_dealloc_ucode_pci(struct il_priv *il)
1083{ 1083{
1084 il_free_fw_desc(priv->pci_dev, &priv->ucode_code); 1084 il_free_fw_desc(il->pci_dev, &il->ucode_code);
1085 il_free_fw_desc(priv->pci_dev, &priv->ucode_data); 1085 il_free_fw_desc(il->pci_dev, &il->ucode_data);
1086 il_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup); 1086 il_free_fw_desc(il->pci_dev, &il->ucode_data_backup);
1087 il_free_fw_desc(priv->pci_dev, &priv->ucode_init); 1087 il_free_fw_desc(il->pci_dev, &il->ucode_init);
1088 il_free_fw_desc(priv->pci_dev, &priv->ucode_init_data); 1088 il_free_fw_desc(il->pci_dev, &il->ucode_init_data);
1089 il_free_fw_desc(priv->pci_dev, &priv->ucode_boot); 1089 il_free_fw_desc(il->pci_dev, &il->ucode_boot);
1090} 1090}
1091 1091
1092static void il4965_nic_start(struct il_priv *priv) 1092static void il4965_nic_start(struct il_priv *il)
1093{ 1093{
1094 /* Remove all resets to allow NIC to operate */ 1094 /* Remove all resets to allow NIC to operate */
1095 il_write32(priv, CSR_RESET, 0); 1095 il_write32(il, CSR_RESET, 0);
1096} 1096}
1097 1097
1098static void il4965_ucode_callback(const struct firmware *ucode_raw, 1098static void il4965_ucode_callback(const struct firmware *ucode_raw,
1099 void *context); 1099 void *context);
1100static int il4965_mac_setup_register(struct il_priv *priv, 1100static int il4965_mac_setup_register(struct il_priv *il,
1101 u32 max_probe_length); 1101 u32 max_probe_length);
1102 1102
1103static int __must_check il4965_request_firmware(struct il_priv *priv, bool first) 1103static int __must_check il4965_request_firmware(struct il_priv *il, bool first)
1104{ 1104{
1105 const char *name_pre = priv->cfg->fw_name_pre; 1105 const char *name_pre = il->cfg->fw_name_pre;
1106 char tag[8]; 1106 char tag[8];
1107 1107
1108 if (first) { 1108 if (first) {
1109 priv->fw_index = priv->cfg->ucode_api_max; 1109 il->fw_index = il->cfg->ucode_api_max;
1110 sprintf(tag, "%d", priv->fw_index); 1110 sprintf(tag, "%d", il->fw_index);
1111 } else { 1111 } else {
1112 priv->fw_index--; 1112 il->fw_index--;
1113 sprintf(tag, "%d", priv->fw_index); 1113 sprintf(tag, "%d", il->fw_index);
1114 } 1114 }
1115 1115
1116 if (priv->fw_index < priv->cfg->ucode_api_min) { 1116 if (il->fw_index < il->cfg->ucode_api_min) {
1117 IL_ERR(priv, "no suitable firmware found!\n"); 1117 IL_ERR(il, "no suitable firmware found!\n");
1118 return -ENOENT; 1118 return -ENOENT;
1119 } 1119 }
1120 1120
1121 sprintf(priv->firmware_name, "%s%s%s", name_pre, tag, ".ucode"); 1121 sprintf(il->firmware_name, "%s%s%s", name_pre, tag, ".ucode");
1122 1122
1123 IL_DEBUG_INFO(priv, "attempting to load firmware '%s'\n", 1123 IL_DEBUG_INFO(il, "attempting to load firmware '%s'\n",
1124 priv->firmware_name); 1124 il->firmware_name);
1125 1125
1126 return request_firmware_nowait(THIS_MODULE, 1, priv->firmware_name, 1126 return request_firmware_nowait(THIS_MODULE, 1, il->firmware_name,
1127 &priv->pci_dev->dev, GFP_KERNEL, priv, 1127 &il->pci_dev->dev, GFP_KERNEL, il,
1128 il4965_ucode_callback); 1128 il4965_ucode_callback);
1129} 1129}
1130 1130
@@ -1133,7 +1133,7 @@ struct il4965_firmware_pieces {
1133 size_t inst_size, data_size, init_size, init_data_size, boot_size; 1133 size_t inst_size, data_size, init_size, init_data_size, boot_size;
1134}; 1134};
1135 1135
1136static int il4965_load_firmware(struct il_priv *priv, 1136static int il4965_load_firmware(struct il_priv *il,
1137 const struct firmware *ucode_raw, 1137 const struct firmware *ucode_raw,
1138 struct il4965_firmware_pieces *pieces) 1138 struct il4965_firmware_pieces *pieces)
1139{ 1139{
@@ -1141,8 +1141,8 @@ static int il4965_load_firmware(struct il_priv *priv,
1141 u32 api_ver, hdr_size; 1141 u32 api_ver, hdr_size;
1142 const u8 *src; 1142 const u8 *src;
1143 1143
1144 priv->ucode_ver = le32_to_cpu(ucode->ver); 1144 il->ucode_ver = le32_to_cpu(ucode->ver);
1145 api_ver = IL_UCODE_API(priv->ucode_ver); 1145 api_ver = IL_UCODE_API(il->ucode_ver);
1146 1146
1147 switch (api_ver) { 1147 switch (api_ver) {
1148 default: 1148 default:
@@ -1151,7 +1151,7 @@ static int il4965_load_firmware(struct il_priv *priv,
1151 case 2: 1151 case 2:
1152 hdr_size = 24; 1152 hdr_size = 24;
1153 if (ucode_raw->size < hdr_size) { 1153 if (ucode_raw->size < hdr_size) {
1154 IL_ERR(priv, "File size too small!\n"); 1154 IL_ERR(il, "File size too small!\n");
1155 return -EINVAL; 1155 return -EINVAL;
1156 } 1156 }
1157 pieces->inst_size = le32_to_cpu(ucode->v1.inst_size); 1157 pieces->inst_size = le32_to_cpu(ucode->v1.inst_size);
@@ -1169,7 +1169,7 @@ static int il4965_load_firmware(struct il_priv *priv,
1169 pieces->data_size + pieces->init_size + 1169 pieces->data_size + pieces->init_size +
1170 pieces->init_data_size + pieces->boot_size) { 1170 pieces->init_data_size + pieces->boot_size) {
1171 1171
1172 IL_ERR(priv, 1172 IL_ERR(il,
1173 "uCode file size %d does not match expected size\n", 1173 "uCode file size %d does not match expected size\n",
1174 (int)ucode_raw->size); 1174 (int)ucode_raw->size);
1175 return -EINVAL; 1175 return -EINVAL;
@@ -1198,12 +1198,12 @@ static int il4965_load_firmware(struct il_priv *priv,
1198static void 1198static void
1199il4965_ucode_callback(const struct firmware *ucode_raw, void *context) 1199il4965_ucode_callback(const struct firmware *ucode_raw, void *context)
1200{ 1200{
1201 struct il_priv *priv = context; 1201 struct il_priv *il = context;
1202 struct il_ucode_header *ucode; 1202 struct il_ucode_header *ucode;
1203 int err; 1203 int err;
1204 struct il4965_firmware_pieces pieces; 1204 struct il4965_firmware_pieces pieces;
1205 const unsigned int api_max = priv->cfg->ucode_api_max; 1205 const unsigned int api_max = il->cfg->ucode_api_max;
1206 const unsigned int api_min = priv->cfg->ucode_api_min; 1206 const unsigned int api_min = il->cfg->ucode_api_min;
1207 u32 api_ver; 1207 u32 api_ver;
1208 1208
1209 u32 max_probe_length = 200; 1209 u32 max_probe_length = 200;
@@ -1213,31 +1213,31 @@ il4965_ucode_callback(const struct firmware *ucode_raw, void *context)
1213 memset(&pieces, 0, sizeof(pieces)); 1213 memset(&pieces, 0, sizeof(pieces));
1214 1214
1215 if (!ucode_raw) { 1215 if (!ucode_raw) {
1216 if (priv->fw_index <= priv->cfg->ucode_api_max) 1216 if (il->fw_index <= il->cfg->ucode_api_max)
1217 IL_ERR(priv, 1217 IL_ERR(il,
1218 "request for firmware file '%s' failed.\n", 1218 "request for firmware file '%s' failed.\n",
1219 priv->firmware_name); 1219 il->firmware_name);
1220 goto try_again; 1220 goto try_again;
1221 } 1221 }
1222 1222
1223 IL_DEBUG_INFO(priv, "Loaded firmware file '%s' (%zd bytes).\n", 1223 IL_DEBUG_INFO(il, "Loaded firmware file '%s' (%zd bytes).\n",
1224 priv->firmware_name, ucode_raw->size); 1224 il->firmware_name, ucode_raw->size);
1225 1225
1226 /* Make sure that we got at least the API version number */ 1226 /* Make sure that we got at least the API version number */
1227 if (ucode_raw->size < 4) { 1227 if (ucode_raw->size < 4) {
1228 IL_ERR(priv, "File size way too small!\n"); 1228 IL_ERR(il, "File size way too small!\n");
1229 goto try_again; 1229 goto try_again;
1230 } 1230 }
1231 1231
1232 /* Data from ucode file: header followed by uCode images */ 1232 /* Data from ucode file: header followed by uCode images */
1233 ucode = (struct il_ucode_header *)ucode_raw->data; 1233 ucode = (struct il_ucode_header *)ucode_raw->data;
1234 1234
1235 err = il4965_load_firmware(priv, ucode_raw, &pieces); 1235 err = il4965_load_firmware(il, ucode_raw, &pieces);
1236 1236
1237 if (err) 1237 if (err)
1238 goto try_again; 1238 goto try_again;
1239 1239
1240 api_ver = IL_UCODE_API(priv->ucode_ver); 1240 api_ver = IL_UCODE_API(il->ucode_ver);
1241 1241
1242 /* 1242 /*
1243 * api_ver should match the api version forming part of the 1243 * api_ver should match the api version forming part of the
@@ -1245,7 +1245,7 @@ il4965_ucode_callback(const struct firmware *ucode_raw, void *context)
1245 * on the API version read from firmware header from here on forward 1245 * on the API version read from firmware header from here on forward
1246 */ 1246 */
1247 if (api_ver < api_min || api_ver > api_max) { 1247 if (api_ver < api_min || api_ver > api_max) {
1248 IL_ERR(priv, 1248 IL_ERR(il,
1249 "Driver unable to support your firmware API. " 1249 "Driver unable to support your firmware API. "
1250 "Driver supports v%u, firmware is v%u.\n", 1250 "Driver supports v%u, firmware is v%u.\n",
1251 api_max, api_ver); 1251 api_max, api_ver);
@@ -1253,25 +1253,25 @@ il4965_ucode_callback(const struct firmware *ucode_raw, void *context)
1253 } 1253 }
1254 1254
1255 if (api_ver != api_max) 1255 if (api_ver != api_max)
1256 IL_ERR(priv, 1256 IL_ERR(il,
1257 "Firmware has old API version. Expected v%u, " 1257 "Firmware has old API version. Expected v%u, "
1258 "got v%u. New firmware can be obtained " 1258 "got v%u. New firmware can be obtained "
1259 "from http://www.intellinuxwireless.org.\n", 1259 "from http://www.intellinuxwireless.org.\n",
1260 api_max, api_ver); 1260 api_max, api_ver);
1261 1261
1262 IL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n", 1262 IL_INFO(il, "loaded firmware version %u.%u.%u.%u\n",
1263 IL_UCODE_MAJOR(priv->ucode_ver), 1263 IL_UCODE_MAJOR(il->ucode_ver),
1264 IL_UCODE_MINOR(priv->ucode_ver), 1264 IL_UCODE_MINOR(il->ucode_ver),
1265 IL_UCODE_API(priv->ucode_ver), 1265 IL_UCODE_API(il->ucode_ver),
1266 IL_UCODE_SERIAL(priv->ucode_ver)); 1266 IL_UCODE_SERIAL(il->ucode_ver));
1267 1267
1268 snprintf(priv->hw->wiphy->fw_version, 1268 snprintf(il->hw->wiphy->fw_version,
1269 sizeof(priv->hw->wiphy->fw_version), 1269 sizeof(il->hw->wiphy->fw_version),
1270 "%u.%u.%u.%u", 1270 "%u.%u.%u.%u",
1271 IL_UCODE_MAJOR(priv->ucode_ver), 1271 IL_UCODE_MAJOR(il->ucode_ver),
1272 IL_UCODE_MINOR(priv->ucode_ver), 1272 IL_UCODE_MINOR(il->ucode_ver),
1273 IL_UCODE_API(priv->ucode_ver), 1273 IL_UCODE_API(il->ucode_ver),
1274 IL_UCODE_SERIAL(priv->ucode_ver)); 1274 IL_UCODE_SERIAL(il->ucode_ver));
1275 1275
1276 /* 1276 /*
1277 * For any of the failures below (before allocating pci memory) 1277 * For any of the failures below (before allocating pci memory)
@@ -1279,46 +1279,46 @@ il4965_ucode_callback(const struct firmware *ucode_raw, void *context)
1279 * user just got a corrupted version of the latest API. 1279 * user just got a corrupted version of the latest API.
1280 */ 1280 */
1281 1281
1282 IL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n", 1282 IL_DEBUG_INFO(il, "f/w package hdr ucode version raw = 0x%x\n",
1283 priv->ucode_ver); 1283 il->ucode_ver);
1284 IL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %Zd\n", 1284 IL_DEBUG_INFO(il, "f/w package hdr runtime inst size = %Zd\n",
1285 pieces.inst_size); 1285 pieces.inst_size);
1286 IL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %Zd\n", 1286 IL_DEBUG_INFO(il, "f/w package hdr runtime data size = %Zd\n",
1287 pieces.data_size); 1287 pieces.data_size);
1288 IL_DEBUG_INFO(priv, "f/w package hdr init inst size = %Zd\n", 1288 IL_DEBUG_INFO(il, "f/w package hdr init inst size = %Zd\n",
1289 pieces.init_size); 1289 pieces.init_size);
1290 IL_DEBUG_INFO(priv, "f/w package hdr init data size = %Zd\n", 1290 IL_DEBUG_INFO(il, "f/w package hdr init data size = %Zd\n",
1291 pieces.init_data_size); 1291 pieces.init_data_size);
1292 IL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %Zd\n", 1292 IL_DEBUG_INFO(il, "f/w package hdr boot inst size = %Zd\n",
1293 pieces.boot_size); 1293 pieces.boot_size);
1294 1294
1295 /* Verify that uCode images will fit in card's SRAM */ 1295 /* Verify that uCode images will fit in card's SRAM */
1296 if (pieces.inst_size > priv->hw_params.max_inst_size) { 1296 if (pieces.inst_size > il->hw_params.max_inst_size) {
1297 IL_ERR(priv, "uCode instr len %Zd too large to fit in\n", 1297 IL_ERR(il, "uCode instr len %Zd too large to fit in\n",
1298 pieces.inst_size); 1298 pieces.inst_size);
1299 goto try_again; 1299 goto try_again;
1300 } 1300 }
1301 1301
1302 if (pieces.data_size > priv->hw_params.max_data_size) { 1302 if (pieces.data_size > il->hw_params.max_data_size) {
1303 IL_ERR(priv, "uCode data len %Zd too large to fit in\n", 1303 IL_ERR(il, "uCode data len %Zd too large to fit in\n",
1304 pieces.data_size); 1304 pieces.data_size);
1305 goto try_again; 1305 goto try_again;
1306 } 1306 }
1307 1307
1308 if (pieces.init_size > priv->hw_params.max_inst_size) { 1308 if (pieces.init_size > il->hw_params.max_inst_size) {
1309 IL_ERR(priv, "uCode init instr len %Zd too large to fit in\n", 1309 IL_ERR(il, "uCode init instr len %Zd too large to fit in\n",
1310 pieces.init_size); 1310 pieces.init_size);
1311 goto try_again; 1311 goto try_again;
1312 } 1312 }
1313 1313
1314 if (pieces.init_data_size > priv->hw_params.max_data_size) { 1314 if (pieces.init_data_size > il->hw_params.max_data_size) {
1315 IL_ERR(priv, "uCode init data len %Zd too large to fit in\n", 1315 IL_ERR(il, "uCode init data len %Zd too large to fit in\n",
1316 pieces.init_data_size); 1316 pieces.init_data_size);
1317 goto try_again; 1317 goto try_again;
1318 } 1318 }
1319 1319
1320 if (pieces.boot_size > priv->hw_params.max_bsm_size) { 1320 if (pieces.boot_size > il->hw_params.max_bsm_size) {
1321 IL_ERR(priv, "uCode boot instr len %Zd too large to fit in\n", 1321 IL_ERR(il, "uCode boot instr len %Zd too large to fit in\n",
1322 pieces.boot_size); 1322 pieces.boot_size);
1323 goto try_again; 1323 goto try_again;
1324 } 1324 }
@@ -1328,92 +1328,92 @@ il4965_ucode_callback(const struct firmware *ucode_raw, void *context)
1328 /* Runtime instructions and 2 copies of data: 1328 /* Runtime instructions and 2 copies of data:
1329 * 1) unmodified from disk 1329 * 1) unmodified from disk
1330 * 2) backup cache for save/restore during power-downs */ 1330 * 2) backup cache for save/restore during power-downs */
1331 priv->ucode_code.len = pieces.inst_size; 1331 il->ucode_code.len = pieces.inst_size;
1332 il_alloc_fw_desc(priv->pci_dev, &priv->ucode_code); 1332 il_alloc_fw_desc(il->pci_dev, &il->ucode_code);
1333 1333
1334 priv->ucode_data.len = pieces.data_size; 1334 il->ucode_data.len = pieces.data_size;
1335 il_alloc_fw_desc(priv->pci_dev, &priv->ucode_data); 1335 il_alloc_fw_desc(il->pci_dev, &il->ucode_data);
1336 1336
1337 priv->ucode_data_backup.len = pieces.data_size; 1337 il->ucode_data_backup.len = pieces.data_size;
1338 il_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup); 1338 il_alloc_fw_desc(il->pci_dev, &il->ucode_data_backup);
1339 1339
1340 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr || 1340 if (!il->ucode_code.v_addr || !il->ucode_data.v_addr ||
1341 !priv->ucode_data_backup.v_addr) 1341 !il->ucode_data_backup.v_addr)
1342 goto err_pci_alloc; 1342 goto err_pci_alloc;
1343 1343
1344 /* Initialization instructions and data */ 1344 /* Initialization instructions and data */
1345 if (pieces.init_size && pieces.init_data_size) { 1345 if (pieces.init_size && pieces.init_data_size) {
1346 priv->ucode_init.len = pieces.init_size; 1346 il->ucode_init.len = pieces.init_size;
1347 il_alloc_fw_desc(priv->pci_dev, &priv->ucode_init); 1347 il_alloc_fw_desc(il->pci_dev, &il->ucode_init);
1348 1348
1349 priv->ucode_init_data.len = pieces.init_data_size; 1349 il->ucode_init_data.len = pieces.init_data_size;
1350 il_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data); 1350 il_alloc_fw_desc(il->pci_dev, &il->ucode_init_data);
1351 1351
1352 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr) 1352 if (!il->ucode_init.v_addr || !il->ucode_init_data.v_addr)
1353 goto err_pci_alloc; 1353 goto err_pci_alloc;
1354 } 1354 }
1355 1355
1356 /* Bootstrap (instructions only, no data) */ 1356 /* Bootstrap (instructions only, no data) */
1357 if (pieces.boot_size) { 1357 if (pieces.boot_size) {
1358 priv->ucode_boot.len = pieces.boot_size; 1358 il->ucode_boot.len = pieces.boot_size;
1359 il_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot); 1359 il_alloc_fw_desc(il->pci_dev, &il->ucode_boot);
1360 1360
1361 if (!priv->ucode_boot.v_addr) 1361 if (!il->ucode_boot.v_addr)
1362 goto err_pci_alloc; 1362 goto err_pci_alloc;
1363 } 1363 }
1364 1364
1365 /* Now that we can no longer fail, copy information */ 1365 /* Now that we can no longer fail, copy information */
1366 1366
1367 priv->sta_key_max_num = STA_KEY_MAX_NUM; 1367 il->sta_key_max_num = STA_KEY_MAX_NUM;
1368 1368
1369 /* Copy images into buffers for card's bus-master reads ... */ 1369 /* Copy images into buffers for card's bus-master reads ... */
1370 1370
1371 /* Runtime instructions (first block of data in file) */ 1371 /* Runtime instructions (first block of data in file) */
1372 IL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n", 1372 IL_DEBUG_INFO(il, "Copying (but not loading) uCode instr len %Zd\n",
1373 pieces.inst_size); 1373 pieces.inst_size);
1374 memcpy(priv->ucode_code.v_addr, pieces.inst, pieces.inst_size); 1374 memcpy(il->ucode_code.v_addr, pieces.inst, pieces.inst_size);
1375 1375
1376 IL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n", 1376 IL_DEBUG_INFO(il, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
1377 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr); 1377 il->ucode_code.v_addr, (u32)il->ucode_code.p_addr);
1378 1378
1379 /* 1379 /*
1380 * Runtime data 1380 * Runtime data
1381 * NOTE: Copy into backup buffer will be done in il_up() 1381 * NOTE: Copy into backup buffer will be done in il_up()
1382 */ 1382 */
1383 IL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n", 1383 IL_DEBUG_INFO(il, "Copying (but not loading) uCode data len %Zd\n",
1384 pieces.data_size); 1384 pieces.data_size);
1385 memcpy(priv->ucode_data.v_addr, pieces.data, pieces.data_size); 1385 memcpy(il->ucode_data.v_addr, pieces.data, pieces.data_size);
1386 memcpy(priv->ucode_data_backup.v_addr, pieces.data, pieces.data_size); 1386 memcpy(il->ucode_data_backup.v_addr, pieces.data, pieces.data_size);
1387 1387
1388 /* Initialization instructions */ 1388 /* Initialization instructions */
1389 if (pieces.init_size) { 1389 if (pieces.init_size) {
1390 IL_DEBUG_INFO(priv, 1390 IL_DEBUG_INFO(il,
1391 "Copying (but not loading) init instr len %Zd\n", 1391 "Copying (but not loading) init instr len %Zd\n",
1392 pieces.init_size); 1392 pieces.init_size);
1393 memcpy(priv->ucode_init.v_addr, pieces.init, pieces.init_size); 1393 memcpy(il->ucode_init.v_addr, pieces.init, pieces.init_size);
1394 } 1394 }
1395 1395
1396 /* Initialization data */ 1396 /* Initialization data */
1397 if (pieces.init_data_size) { 1397 if (pieces.init_data_size) {
1398 IL_DEBUG_INFO(priv, 1398 IL_DEBUG_INFO(il,
1399 "Copying (but not loading) init data len %Zd\n", 1399 "Copying (but not loading) init data len %Zd\n",
1400 pieces.init_data_size); 1400 pieces.init_data_size);
1401 memcpy(priv->ucode_init_data.v_addr, pieces.init_data, 1401 memcpy(il->ucode_init_data.v_addr, pieces.init_data,
1402 pieces.init_data_size); 1402 pieces.init_data_size);
1403 } 1403 }
1404 1404
1405 /* Bootstrap instructions */ 1405 /* Bootstrap instructions */
1406 IL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n", 1406 IL_DEBUG_INFO(il, "Copying (but not loading) boot instr len %Zd\n",
1407 pieces.boot_size); 1407 pieces.boot_size);
1408 memcpy(priv->ucode_boot.v_addr, pieces.boot, pieces.boot_size); 1408 memcpy(il->ucode_boot.v_addr, pieces.boot, pieces.boot_size);
1409 1409
1410 /* 1410 /*
1411 * figure out the offset of chain noise reset and gain commands 1411 * figure out the offset of chain noise reset and gain commands
1412 * base on the size of standard phy calibration commands table size 1412 * base on the size of standard phy calibration commands table size
1413 */ 1413 */
1414 priv->_4965.phy_calib_chain_noise_reset_cmd = 1414 il->_4965.phy_calib_chain_noise_reset_cmd =
1415 standard_phy_calibration_size; 1415 standard_phy_calibration_size;
1416 priv->_4965.phy_calib_chain_noise_gain_cmd = 1416 il->_4965.phy_calib_chain_noise_gain_cmd =
1417 standard_phy_calibration_size + 1; 1417 standard_phy_calibration_size + 1;
1418 1418
1419 /************************************************** 1419 /**************************************************
@@ -1421,40 +1421,40 @@ il4965_ucode_callback(const struct firmware *ucode_raw, void *context)
1421 * 1421 *
1422 * 9. Setup and register with mac80211 and debugfs 1422 * 9. Setup and register with mac80211 and debugfs
1423 **************************************************/ 1423 **************************************************/
1424 err = il4965_mac_setup_register(priv, max_probe_length); 1424 err = il4965_mac_setup_register(il, max_probe_length);
1425 if (err) 1425 if (err)
1426 goto out_unbind; 1426 goto out_unbind;
1427 1427
1428 err = il_dbgfs_register(priv, DRV_NAME); 1428 err = il_dbgfs_register(il, DRV_NAME);
1429 if (err) 1429 if (err)
1430 IL_ERR(priv, 1430 IL_ERR(il,
1431 "failed to create debugfs files. Ignoring error: %d\n", err); 1431 "failed to create debugfs files. Ignoring error: %d\n", err);
1432 1432
1433 err = sysfs_create_group(&priv->pci_dev->dev.kobj, 1433 err = sysfs_create_group(&il->pci_dev->dev.kobj,
1434 &il_attribute_group); 1434 &il_attribute_group);
1435 if (err) { 1435 if (err) {
1436 IL_ERR(priv, "failed to create sysfs device attributes\n"); 1436 IL_ERR(il, "failed to create sysfs device attributes\n");
1437 goto out_unbind; 1437 goto out_unbind;
1438 } 1438 }
1439 1439
1440 /* We have our copies now, allow OS release its copies */ 1440 /* We have our copies now, allow OS release its copies */
1441 release_firmware(ucode_raw); 1441 release_firmware(ucode_raw);
1442 complete(&priv->_4965.firmware_loading_complete); 1442 complete(&il->_4965.firmware_loading_complete);
1443 return; 1443 return;
1444 1444
1445 try_again: 1445 try_again:
1446 /* try next, if any */ 1446 /* try next, if any */
1447 if (il4965_request_firmware(priv, false)) 1447 if (il4965_request_firmware(il, false))
1448 goto out_unbind; 1448 goto out_unbind;
1449 release_firmware(ucode_raw); 1449 release_firmware(ucode_raw);
1450 return; 1450 return;
1451 1451
1452 err_pci_alloc: 1452 err_pci_alloc:
1453 IL_ERR(priv, "failed to allocate pci memory\n"); 1453 IL_ERR(il, "failed to allocate pci memory\n");
1454 il4965_dealloc_ucode_pci(priv); 1454 il4965_dealloc_ucode_pci(il);
1455 out_unbind: 1455 out_unbind:
1456 complete(&priv->_4965.firmware_loading_complete); 1456 complete(&il->_4965.firmware_loading_complete);
1457 device_release_driver(&priv->pci_dev->dev); 1457 device_release_driver(&il->pci_dev->dev);
1458 release_firmware(ucode_raw); 1458 release_firmware(ucode_raw);
1459} 1459}
1460 1460
@@ -1527,79 +1527,79 @@ static const char *il4965_desc_lookup(u32 num)
1527#define ERROR_START_OFFSET (1 * sizeof(u32)) 1527#define ERROR_START_OFFSET (1 * sizeof(u32))
1528#define ERROR_ELEM_SIZE (7 * sizeof(u32)) 1528#define ERROR_ELEM_SIZE (7 * sizeof(u32))
1529 1529
1530void il4965_dump_nic_error_log(struct il_priv *priv) 1530void il4965_dump_nic_error_log(struct il_priv *il)
1531{ 1531{
1532 u32 data2, line; 1532 u32 data2, line;
1533 u32 desc, time, count, base, data1; 1533 u32 desc, time, count, base, data1;
1534 u32 blink1, blink2, ilink1, ilink2; 1534 u32 blink1, blink2, ilink1, ilink2;
1535 u32 pc, hcmd; 1535 u32 pc, hcmd;
1536 1536
1537 if (priv->ucode_type == UCODE_INIT) { 1537 if (il->ucode_type == UCODE_INIT) {
1538 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr); 1538 base = le32_to_cpu(il->card_alive_init.error_event_table_ptr);
1539 } else { 1539 } else {
1540 base = le32_to_cpu(priv->card_alive.error_event_table_ptr); 1540 base = le32_to_cpu(il->card_alive.error_event_table_ptr);
1541 } 1541 }
1542 1542
1543 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) { 1543 if (!il->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1544 IL_ERR(priv, 1544 IL_ERR(il,
1545 "Not valid error log pointer 0x%08X for %s uCode\n", 1545 "Not valid error log pointer 0x%08X for %s uCode\n",
1546 base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT"); 1546 base, (il->ucode_type == UCODE_INIT) ? "Init" : "RT");
1547 return; 1547 return;
1548 } 1548 }
1549 1549
1550 count = il_read_targ_mem(priv, base); 1550 count = il_read_targ_mem(il, base);
1551 1551
1552 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) { 1552 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1553 IL_ERR(priv, "Start IWL Error Log Dump:\n"); 1553 IL_ERR(il, "Start IWL Error Log Dump:\n");
1554 IL_ERR(priv, "Status: 0x%08lX, count: %d\n", 1554 IL_ERR(il, "Status: 0x%08lX, count: %d\n",
1555 priv->status, count); 1555 il->status, count);
1556 } 1556 }
1557 1557
1558 desc = il_read_targ_mem(priv, base + 1 * sizeof(u32)); 1558 desc = il_read_targ_mem(il, base + 1 * sizeof(u32));
1559 priv->isr_stats.err_code = desc; 1559 il->isr_stats.err_code = desc;
1560 pc = il_read_targ_mem(priv, base + 2 * sizeof(u32)); 1560 pc = il_read_targ_mem(il, base + 2 * sizeof(u32));
1561 blink1 = il_read_targ_mem(priv, base + 3 * sizeof(u32)); 1561 blink1 = il_read_targ_mem(il, base + 3 * sizeof(u32));
1562 blink2 = il_read_targ_mem(priv, base + 4 * sizeof(u32)); 1562 blink2 = il_read_targ_mem(il, base + 4 * sizeof(u32));
1563 ilink1 = il_read_targ_mem(priv, base + 5 * sizeof(u32)); 1563 ilink1 = il_read_targ_mem(il, base + 5 * sizeof(u32));
1564 ilink2 = il_read_targ_mem(priv, base + 6 * sizeof(u32)); 1564 ilink2 = il_read_targ_mem(il, base + 6 * sizeof(u32));
1565 data1 = il_read_targ_mem(priv, base + 7 * sizeof(u32)); 1565 data1 = il_read_targ_mem(il, base + 7 * sizeof(u32));
1566 data2 = il_read_targ_mem(priv, base + 8 * sizeof(u32)); 1566 data2 = il_read_targ_mem(il, base + 8 * sizeof(u32));
1567 line = il_read_targ_mem(priv, base + 9 * sizeof(u32)); 1567 line = il_read_targ_mem(il, base + 9 * sizeof(u32));
1568 time = il_read_targ_mem(priv, base + 11 * sizeof(u32)); 1568 time = il_read_targ_mem(il, base + 11 * sizeof(u32));
1569 hcmd = il_read_targ_mem(priv, base + 22 * sizeof(u32)); 1569 hcmd = il_read_targ_mem(il, base + 22 * sizeof(u32));
1570 1570
1571 IL_ERR(priv, "Desc Time " 1571 IL_ERR(il, "Desc Time "
1572 "data1 data2 line\n"); 1572 "data1 data2 line\n");
1573 IL_ERR(priv, "%-28s (0x%04X) %010u 0x%08X 0x%08X %u\n", 1573 IL_ERR(il, "%-28s (0x%04X) %010u 0x%08X 0x%08X %u\n",
1574 il4965_desc_lookup(desc), desc, time, data1, data2, line); 1574 il4965_desc_lookup(desc), desc, time, data1, data2, line);
1575 IL_ERR(priv, "pc blink1 blink2 ilink1 ilink2 hcmd\n"); 1575 IL_ERR(il, "pc blink1 blink2 ilink1 ilink2 hcmd\n");
1576 IL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X 0x%05X 0x%05X\n", 1576 IL_ERR(il, "0x%05X 0x%05X 0x%05X 0x%05X 0x%05X 0x%05X\n",
1577 pc, blink1, blink2, ilink1, ilink2, hcmd); 1577 pc, blink1, blink2, ilink1, ilink2, hcmd);
1578} 1578}
1579 1579
1580static void il4965_rf_kill_ct_config(struct il_priv *priv) 1580static void il4965_rf_kill_ct_config(struct il_priv *il)
1581{ 1581{
1582 struct il_ct_kill_config cmd; 1582 struct il_ct_kill_config cmd;
1583 unsigned long flags; 1583 unsigned long flags;
1584 int ret = 0; 1584 int ret = 0;
1585 1585
1586 spin_lock_irqsave(&priv->lock, flags); 1586 spin_lock_irqsave(&il->lock, flags);
1587 il_write32(priv, CSR_UCODE_DRV_GP1_CLR, 1587 il_write32(il, CSR_UCODE_DRV_GP1_CLR,
1588 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT); 1588 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
1589 spin_unlock_irqrestore(&priv->lock, flags); 1589 spin_unlock_irqrestore(&il->lock, flags);
1590 1590
1591 cmd.critical_temperature_R = 1591 cmd.critical_temperature_R =
1592 cpu_to_le32(priv->hw_params.ct_kill_threshold); 1592 cpu_to_le32(il->hw_params.ct_kill_threshold);
1593 1593
1594 ret = il_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD, 1594 ret = il_send_cmd_pdu(il, REPLY_CT_KILL_CONFIG_CMD,
1595 sizeof(cmd), &cmd); 1595 sizeof(cmd), &cmd);
1596 if (ret) 1596 if (ret)
1597 IL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n"); 1597 IL_ERR(il, "REPLY_CT_KILL_CONFIG_CMD failed\n");
1598 else 1598 else
1599 IL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD " 1599 IL_DEBUG_INFO(il, "REPLY_CT_KILL_CONFIG_CMD "
1600 "succeeded, " 1600 "succeeded, "
1601 "critical temperature is %d\n", 1601 "critical temperature is %d\n",
1602 priv->hw_params.ct_kill_threshold); 1602 il->hw_params.ct_kill_threshold);
1603} 1603}
1604 1604
1605static const s8 default_queue_to_tx_fifo[] = { 1605static const s8 default_queue_to_tx_fifo[] = {
@@ -1612,62 +1612,62 @@ static const s8 default_queue_to_tx_fifo[] = {
1612 IL_TX_FIFO_UNUSED, 1612 IL_TX_FIFO_UNUSED,
1613}; 1613};
1614 1614
1615static int il4965_alive_notify(struct il_priv *priv) 1615static int il4965_alive_notify(struct il_priv *il)
1616{ 1616{
1617 u32 a; 1617 u32 a;
1618 unsigned long flags; 1618 unsigned long flags;
1619 int i, chan; 1619 int i, chan;
1620 u32 reg_val; 1620 u32 reg_val;
1621 1621
1622 spin_lock_irqsave(&priv->lock, flags); 1622 spin_lock_irqsave(&il->lock, flags);
1623 1623
1624 /* Clear 4965's internal Tx Scheduler data base */ 1624 /* Clear 4965's internal Tx Scheduler data base */
1625 priv->scd_base_addr = il_read_prph(priv, 1625 il->scd_base_addr = il_read_prph(il,
1626 IWL49_SCD_SRAM_BASE_ADDR); 1626 IWL49_SCD_SRAM_BASE_ADDR);
1627 a = priv->scd_base_addr + IWL49_SCD_CONTEXT_DATA_OFFSET; 1627 a = il->scd_base_addr + IWL49_SCD_CONTEXT_DATA_OFFSET;
1628 for (; a < priv->scd_base_addr + IWL49_SCD_TX_STTS_BITMAP_OFFSET; a += 4) 1628 for (; a < il->scd_base_addr + IWL49_SCD_TX_STTS_BITMAP_OFFSET; a += 4)
1629 il_write_targ_mem(priv, a, 0); 1629 il_write_targ_mem(il, a, 0);
1630 for (; a < priv->scd_base_addr + IWL49_SCD_TRANSLATE_TBL_OFFSET; a += 4) 1630 for (; a < il->scd_base_addr + IWL49_SCD_TRANSLATE_TBL_OFFSET; a += 4)
1631 il_write_targ_mem(priv, a, 0); 1631 il_write_targ_mem(il, a, 0);
1632 for (; a < priv->scd_base_addr + 1632 for (; a < il->scd_base_addr +
1633 IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(priv->hw_params.max_txq_num); a += 4) 1633 IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(il->hw_params.max_txq_num); a += 4)
1634 il_write_targ_mem(priv, a, 0); 1634 il_write_targ_mem(il, a, 0);
1635 1635
1636 /* Tel 4965 where to find Tx byte count tables */ 1636 /* Tel 4965 where to find Tx byte count tables */
1637 il_write_prph(priv, IWL49_SCD_DRAM_BASE_ADDR, 1637 il_write_prph(il, IWL49_SCD_DRAM_BASE_ADDR,
1638 priv->scd_bc_tbls.dma >> 10); 1638 il->scd_bc_tbls.dma >> 10);
1639 1639
1640 /* Enable DMA channel */ 1640 /* Enable DMA channel */
1641 for (chan = 0; chan < FH49_TCSR_CHNL_NUM ; chan++) 1641 for (chan = 0; chan < FH49_TCSR_CHNL_NUM ; chan++)
1642 il_write_direct32(priv, 1642 il_write_direct32(il,
1643 FH_TCSR_CHNL_TX_CONFIG_REG(chan), 1643 FH_TCSR_CHNL_TX_CONFIG_REG(chan),
1644 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE | 1644 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE |
1645 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE); 1645 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE);
1646 1646
1647 /* Update FH chicken bits */ 1647 /* Update FH chicken bits */
1648 reg_val = il_read_direct32(priv, FH_TX_CHICKEN_BITS_REG); 1648 reg_val = il_read_direct32(il, FH_TX_CHICKEN_BITS_REG);
1649 il_write_direct32(priv, FH_TX_CHICKEN_BITS_REG, 1649 il_write_direct32(il, FH_TX_CHICKEN_BITS_REG,
1650 reg_val | FH_TX_CHICKEN_BITS_SCD_AUTO_RETRY_EN); 1650 reg_val | FH_TX_CHICKEN_BITS_SCD_AUTO_RETRY_EN);
1651 1651
1652 /* Disable chain mode for all queues */ 1652 /* Disable chain mode for all queues */
1653 il_write_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, 0); 1653 il_write_prph(il, IWL49_SCD_QUEUECHAIN_SEL, 0);
1654 1654
1655 /* Initialize each Tx queue (including the command queue) */ 1655 /* Initialize each Tx queue (including the command queue) */
1656 for (i = 0; i < priv->hw_params.max_txq_num; i++) { 1656 for (i = 0; i < il->hw_params.max_txq_num; i++) {
1657 1657
1658 /* TFD circular buffer read/write indexes */ 1658 /* TFD circular buffer read/write indexes */
1659 il_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(i), 0); 1659 il_write_prph(il, IWL49_SCD_QUEUE_RDPTR(i), 0);
1660 il_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8)); 1660 il_write_direct32(il, HBUS_TARG_WRPTR, 0 | (i << 8));
1661 1661
1662 /* Max Tx Window size for Scheduler-ACK mode */ 1662 /* Max Tx Window size for Scheduler-ACK mode */
1663 il_write_targ_mem(priv, priv->scd_base_addr + 1663 il_write_targ_mem(il, il->scd_base_addr +
1664 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i), 1664 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i),
1665 (SCD_WIN_SIZE << 1665 (SCD_WIN_SIZE <<
1666 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) & 1666 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
1667 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK); 1667 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
1668 1668
1669 /* Frame limit */ 1669 /* Frame limit */
1670 il_write_targ_mem(priv, priv->scd_base_addr + 1670 il_write_targ_mem(il, il->scd_base_addr +
1671 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i) + 1671 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i) +
1672 sizeof(u32), 1672 sizeof(u32),
1673 (SCD_FRAME_LIMIT << 1673 (SCD_FRAME_LIMIT <<
@@ -1675,36 +1675,36 @@ static int il4965_alive_notify(struct il_priv *priv)
1675 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK); 1675 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
1676 1676
1677 } 1677 }
1678 il_write_prph(priv, IWL49_SCD_INTERRUPT_MASK, 1678 il_write_prph(il, IWL49_SCD_INTERRUPT_MASK,
1679 (1 << priv->hw_params.max_txq_num) - 1); 1679 (1 << il->hw_params.max_txq_num) - 1);
1680 1680
1681 /* Activate all Tx DMA/FIFO channels */ 1681 /* Activate all Tx DMA/FIFO channels */
1682 il4965_txq_set_sched(priv, IL_MASK(0, 6)); 1682 il4965_txq_set_sched(il, IL_MASK(0, 6));
1683 1683
1684 il4965_set_wr_ptrs(priv, IL_DEFAULT_CMD_QUEUE_NUM, 0); 1684 il4965_set_wr_ptrs(il, IL_DEFAULT_CMD_QUEUE_NUM, 0);
1685 1685
1686 /* make sure all queue are not stopped */ 1686 /* make sure all queue are not stopped */
1687 memset(&priv->queue_stopped[0], 0, sizeof(priv->queue_stopped)); 1687 memset(&il->queue_stopped[0], 0, sizeof(il->queue_stopped));
1688 for (i = 0; i < 4; i++) 1688 for (i = 0; i < 4; i++)
1689 atomic_set(&priv->queue_stop_count[i], 0); 1689 atomic_set(&il->queue_stop_count[i], 0);
1690 1690
1691 /* reset to 0 to enable all the queue first */ 1691 /* reset to 0 to enable all the queue first */
1692 priv->txq_ctx_active_msk = 0; 1692 il->txq_ctx_active_msk = 0;
1693 /* Map each Tx/cmd queue to its corresponding fifo */ 1693 /* Map each Tx/cmd queue to its corresponding fifo */
1694 BUILD_BUG_ON(ARRAY_SIZE(default_queue_to_tx_fifo) != 7); 1694 BUILD_BUG_ON(ARRAY_SIZE(default_queue_to_tx_fifo) != 7);
1695 1695
1696 for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) { 1696 for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) {
1697 int ac = default_queue_to_tx_fifo[i]; 1697 int ac = default_queue_to_tx_fifo[i];
1698 1698
1699 il_txq_ctx_activate(priv, i); 1699 il_txq_ctx_activate(il, i);
1700 1700
1701 if (ac == IL_TX_FIFO_UNUSED) 1701 if (ac == IL_TX_FIFO_UNUSED)
1702 continue; 1702 continue;
1703 1703
1704 il4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0); 1704 il4965_tx_queue_set_status(il, &il->txq[i], ac, 0);
1705 } 1705 }
1706 1706
1707 spin_unlock_irqrestore(&priv->lock, flags); 1707 spin_unlock_irqrestore(&il->lock, flags);
1708 1708
1709 return 0; 1709 return 0;
1710} 1710}
@@ -1714,50 +1714,50 @@ static int il4965_alive_notify(struct il_priv *priv)
1714 * from protocol/runtime uCode (initialization uCode's 1714 * from protocol/runtime uCode (initialization uCode's
1715 * Alive gets handled by il_init_alive_start()). 1715 * Alive gets handled by il_init_alive_start()).
1716 */ 1716 */
1717static void il4965_alive_start(struct il_priv *priv) 1717static void il4965_alive_start(struct il_priv *il)
1718{ 1718{
1719 int ret = 0; 1719 int ret = 0;
1720 struct il_rxon_context *ctx = &priv->contexts[IL_RXON_CTX_BSS]; 1720 struct il_rxon_context *ctx = &il->contexts[IL_RXON_CTX_BSS];
1721 1721
1722 IL_DEBUG_INFO(priv, "Runtime Alive received.\n"); 1722 IL_DEBUG_INFO(il, "Runtime Alive received.\n");
1723 1723
1724 if (priv->card_alive.is_valid != UCODE_VALID_OK) { 1724 if (il->card_alive.is_valid != UCODE_VALID_OK) {
1725 /* We had an error bringing up the hardware, so take it 1725 /* We had an error bringing up the hardware, so take it
1726 * all the way back down so we can try again */ 1726 * all the way back down so we can try again */
1727 IL_DEBUG_INFO(priv, "Alive failed.\n"); 1727 IL_DEBUG_INFO(il, "Alive failed.\n");
1728 goto restart; 1728 goto restart;
1729 } 1729 }
1730 1730
1731 /* Initialize uCode has loaded Runtime uCode ... verify inst image. 1731 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
1732 * This is a paranoid check, because we would not have gotten the 1732 * This is a paranoid check, because we would not have gotten the
1733 * "runtime" alive if code weren't properly loaded. */ 1733 * "runtime" alive if code weren't properly loaded. */
1734 if (il4965_verify_ucode(priv)) { 1734 if (il4965_verify_ucode(il)) {
1735 /* Runtime instruction load was bad; 1735 /* Runtime instruction load was bad;
1736 * take it all the way back down so we can try again */ 1736 * take it all the way back down so we can try again */
1737 IL_DEBUG_INFO(priv, "Bad runtime uCode load.\n"); 1737 IL_DEBUG_INFO(il, "Bad runtime uCode load.\n");
1738 goto restart; 1738 goto restart;
1739 } 1739 }
1740 1740
1741 ret = il4965_alive_notify(priv); 1741 ret = il4965_alive_notify(il);
1742 if (ret) { 1742 if (ret) {
1743 IL_WARN(priv, 1743 IL_WARN(il,
1744 "Could not complete ALIVE transition [ntf]: %d\n", ret); 1744 "Could not complete ALIVE transition [ntf]: %d\n", ret);
1745 goto restart; 1745 goto restart;
1746 } 1746 }
1747 1747
1748 1748
1749 /* After the ALIVE response, we can send host commands to the uCode */ 1749 /* After the ALIVE response, we can send host commands to the uCode */
1750 set_bit(STATUS_ALIVE, &priv->status); 1750 set_bit(STATUS_ALIVE, &il->status);
1751 1751
1752 /* Enable watchdog to monitor the driver tx queues */ 1752 /* Enable watchdog to monitor the driver tx queues */
1753 il_setup_watchdog(priv); 1753 il_setup_watchdog(il);
1754 1754
1755 if (il_is_rfkill(priv)) 1755 if (il_is_rfkill(il))
1756 return; 1756 return;
1757 1757
1758 ieee80211_wake_queues(priv->hw); 1758 ieee80211_wake_queues(il->hw);
1759 1759
1760 priv->active_rate = IL_RATES_MASK; 1760 il->active_rate = IL_RATES_MASK;
1761 1761
1762 if (il_is_associated_ctx(ctx)) { 1762 if (il_is_associated_ctx(ctx)) {
1763 struct il_rxon_cmd *active_rxon = 1763 struct il_rxon_cmd *active_rxon =
@@ -1768,290 +1768,290 @@ static void il4965_alive_start(struct il_priv *priv)
1768 } else { 1768 } else {
1769 struct il_rxon_context *tmp; 1769 struct il_rxon_context *tmp;
1770 /* Initialize our rx_config data */ 1770 /* Initialize our rx_config data */
1771 for_each_context(priv, tmp) 1771 for_each_context(il, tmp)
1772 il_connection_init_rx_config(priv, tmp); 1772 il_connection_init_rx_config(il, tmp);
1773 1773
1774 if (priv->cfg->ops->hcmd->set_rxon_chain) 1774 if (il->cfg->ops->hcmd->set_rxon_chain)
1775 priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx); 1775 il->cfg->ops->hcmd->set_rxon_chain(il, ctx);
1776 } 1776 }
1777 1777
1778 /* Configure bluetooth coexistence if enabled */ 1778 /* Configure bluetooth coexistence if enabled */
1779 il_send_bt_config(priv); 1779 il_send_bt_config(il);
1780 1780
1781 il4965_reset_run_time_calib(priv); 1781 il4965_reset_run_time_calib(il);
1782 1782
1783 set_bit(STATUS_READY, &priv->status); 1783 set_bit(STATUS_READY, &il->status);
1784 1784
1785 /* Configure the adapter for unassociated operation */ 1785 /* Configure the adapter for unassociated operation */
1786 il_commit_rxon(priv, ctx); 1786 il_commit_rxon(il, ctx);
1787 1787
1788 /* At this point, the NIC is initialized and operational */ 1788 /* At this point, the NIC is initialized and operational */
1789 il4965_rf_kill_ct_config(priv); 1789 il4965_rf_kill_ct_config(il);
1790 1790
1791 IL_DEBUG_INFO(priv, "ALIVE processing complete.\n"); 1791 IL_DEBUG_INFO(il, "ALIVE processing complete.\n");
1792 wake_up(&priv->wait_command_queue); 1792 wake_up(&il->wait_command_queue);
1793 1793
1794 il_power_update_mode(priv, true); 1794 il_power_update_mode(il, true);
1795 IL_DEBUG_INFO(priv, "Updated power mode\n"); 1795 IL_DEBUG_INFO(il, "Updated power mode\n");
1796 1796
1797 return; 1797 return;
1798 1798
1799 restart: 1799 restart:
1800 queue_work(priv->workqueue, &priv->restart); 1800 queue_work(il->workqueue, &il->restart);
1801} 1801}
1802 1802
1803static void il4965_cancel_deferred_work(struct il_priv *priv); 1803static void il4965_cancel_deferred_work(struct il_priv *il);
1804 1804
1805static void __il4965_down(struct il_priv *priv) 1805static void __il4965_down(struct il_priv *il)
1806{ 1806{
1807 unsigned long flags; 1807 unsigned long flags;
1808 int exit_pending; 1808 int exit_pending;
1809 1809
1810 IL_DEBUG_INFO(priv, DRV_NAME " is going down\n"); 1810 IL_DEBUG_INFO(il, DRV_NAME " is going down\n");
1811 1811
1812 il_scan_cancel_timeout(priv, 200); 1812 il_scan_cancel_timeout(il, 200);
1813 1813
1814 exit_pending = test_and_set_bit(STATUS_EXIT_PENDING, &priv->status); 1814 exit_pending = test_and_set_bit(STATUS_EXIT_PENDING, &il->status);
1815 1815
1816 /* Stop TX queues watchdog. We need to have STATUS_EXIT_PENDING bit set 1816 /* Stop TX queues watchdog. We need to have STATUS_EXIT_PENDING bit set
1817 * to prevent rearm timer */ 1817 * to prevent rearm timer */
1818 del_timer_sync(&priv->watchdog); 1818 del_timer_sync(&il->watchdog);
1819 1819
1820 il_clear_ucode_stations(priv, NULL); 1820 il_clear_ucode_stations(il, NULL);
1821 il_dealloc_bcast_stations(priv); 1821 il_dealloc_bcast_stations(il);
1822 il_clear_driver_stations(priv); 1822 il_clear_driver_stations(il);
1823 1823
1824 /* Unblock any waiting calls */ 1824 /* Unblock any waiting calls */
1825 wake_up_all(&priv->wait_command_queue); 1825 wake_up_all(&il->wait_command_queue);
1826 1826
1827 /* Wipe out the EXIT_PENDING status bit if we are not actually 1827 /* Wipe out the EXIT_PENDING status bit if we are not actually
1828 * exiting the module */ 1828 * exiting the module */
1829 if (!exit_pending) 1829 if (!exit_pending)
1830 clear_bit(STATUS_EXIT_PENDING, &priv->status); 1830 clear_bit(STATUS_EXIT_PENDING, &il->status);
1831 1831
1832 /* stop and reset the on-board processor */ 1832 /* stop and reset the on-board processor */
1833 il_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET); 1833 il_write32(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
1834 1834
1835 /* tell the device to stop sending interrupts */ 1835 /* tell the device to stop sending interrupts */
1836 spin_lock_irqsave(&priv->lock, flags); 1836 spin_lock_irqsave(&il->lock, flags);
1837 il_disable_interrupts(priv); 1837 il_disable_interrupts(il);
1838 spin_unlock_irqrestore(&priv->lock, flags); 1838 spin_unlock_irqrestore(&il->lock, flags);
1839 il4965_synchronize_irq(priv); 1839 il4965_synchronize_irq(il);
1840 1840
1841 if (priv->mac80211_registered) 1841 if (il->mac80211_registered)
1842 ieee80211_stop_queues(priv->hw); 1842 ieee80211_stop_queues(il->hw);
1843 1843
1844 /* If we have not previously called il_init() then 1844 /* If we have not previously called il_init() then
1845 * clear all bits but the RF Kill bit and return */ 1845 * clear all bits but the RF Kill bit and return */
1846 if (!il_is_init(priv)) { 1846 if (!il_is_init(il)) {
1847 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) << 1847 il->status = test_bit(STATUS_RF_KILL_HW, &il->status) <<
1848 STATUS_RF_KILL_HW | 1848 STATUS_RF_KILL_HW |
1849 test_bit(STATUS_GEO_CONFIGURED, &priv->status) << 1849 test_bit(STATUS_GEO_CONFIGURED, &il->status) <<
1850 STATUS_GEO_CONFIGURED | 1850 STATUS_GEO_CONFIGURED |
1851 test_bit(STATUS_EXIT_PENDING, &priv->status) << 1851 test_bit(STATUS_EXIT_PENDING, &il->status) <<
1852 STATUS_EXIT_PENDING; 1852 STATUS_EXIT_PENDING;
1853 goto exit; 1853 goto exit;
1854 } 1854 }
1855 1855
1856 /* ...otherwise clear out all the status bits but the RF Kill 1856 /* ...otherwise clear out all the status bits but the RF Kill
1857 * bit and continue taking the NIC down. */ 1857 * bit and continue taking the NIC down. */
1858 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) << 1858 il->status &= test_bit(STATUS_RF_KILL_HW, &il->status) <<
1859 STATUS_RF_KILL_HW | 1859 STATUS_RF_KILL_HW |
1860 test_bit(STATUS_GEO_CONFIGURED, &priv->status) << 1860 test_bit(STATUS_GEO_CONFIGURED, &il->status) <<
1861 STATUS_GEO_CONFIGURED | 1861 STATUS_GEO_CONFIGURED |
1862 test_bit(STATUS_FW_ERROR, &priv->status) << 1862 test_bit(STATUS_FW_ERROR, &il->status) <<
1863 STATUS_FW_ERROR | 1863 STATUS_FW_ERROR |
1864 test_bit(STATUS_EXIT_PENDING, &priv->status) << 1864 test_bit(STATUS_EXIT_PENDING, &il->status) <<
1865 STATUS_EXIT_PENDING; 1865 STATUS_EXIT_PENDING;
1866 1866
1867 il4965_txq_ctx_stop(priv); 1867 il4965_txq_ctx_stop(il);
1868 il4965_rxq_stop(priv); 1868 il4965_rxq_stop(il);
1869 1869
1870 /* Power-down device's busmaster DMA clocks */ 1870 /* Power-down device's busmaster DMA clocks */
1871 il_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT); 1871 il_write_prph(il, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
1872 udelay(5); 1872 udelay(5);
1873 1873
1874 /* Make sure (redundant) we've released our request to stay awake */ 1874 /* Make sure (redundant) we've released our request to stay awake */
1875 il_clear_bit(priv, CSR_GP_CNTRL, 1875 il_clear_bit(il, CSR_GP_CNTRL,
1876 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); 1876 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
1877 1877
1878 /* Stop the device, and put it in low power state */ 1878 /* Stop the device, and put it in low power state */
1879 il_apm_stop(priv); 1879 il_apm_stop(il);
1880 1880
1881 exit: 1881 exit:
1882 memset(&priv->card_alive, 0, sizeof(struct il_alive_resp)); 1882 memset(&il->card_alive, 0, sizeof(struct il_alive_resp));
1883 1883
1884 dev_kfree_skb(priv->beacon_skb); 1884 dev_kfree_skb(il->beacon_skb);
1885 priv->beacon_skb = NULL; 1885 il->beacon_skb = NULL;
1886 1886
1887 /* clear out any free frames */ 1887 /* clear out any free frames */
1888 il4965_clear_free_frames(priv); 1888 il4965_clear_free_frames(il);
1889} 1889}
1890 1890
1891static void il4965_down(struct il_priv *priv) 1891static void il4965_down(struct il_priv *il)
1892{ 1892{
1893 mutex_lock(&priv->mutex); 1893 mutex_lock(&il->mutex);
1894 __il4965_down(priv); 1894 __il4965_down(il);
1895 mutex_unlock(&priv->mutex); 1895 mutex_unlock(&il->mutex);
1896 1896
1897 il4965_cancel_deferred_work(priv); 1897 il4965_cancel_deferred_work(il);
1898} 1898}
1899 1899
1900#define HW_READY_TIMEOUT (50) 1900#define HW_READY_TIMEOUT (50)
1901 1901
1902static int il4965_set_hw_ready(struct il_priv *priv) 1902static int il4965_set_hw_ready(struct il_priv *il)
1903{ 1903{
1904 int ret = 0; 1904 int ret = 0;
1905 1905
1906 il_set_bit(priv, CSR_HW_IF_CONFIG_REG, 1906 il_set_bit(il, CSR_HW_IF_CONFIG_REG,
1907 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY); 1907 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
1908 1908
1909 /* See if we got it */ 1909 /* See if we got it */
1910 ret = il_poll_bit(priv, CSR_HW_IF_CONFIG_REG, 1910 ret = il_poll_bit(il, CSR_HW_IF_CONFIG_REG,
1911 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY, 1911 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
1912 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY, 1912 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
1913 HW_READY_TIMEOUT); 1913 HW_READY_TIMEOUT);
1914 if (ret != -ETIMEDOUT) 1914 if (ret != -ETIMEDOUT)
1915 priv->hw_ready = true; 1915 il->hw_ready = true;
1916 else 1916 else
1917 priv->hw_ready = false; 1917 il->hw_ready = false;
1918 1918
1919 IL_DEBUG_INFO(priv, "hardware %s\n", 1919 IL_DEBUG_INFO(il, "hardware %s\n",
1920 (priv->hw_ready == 1) ? "ready" : "not ready"); 1920 (il->hw_ready == 1) ? "ready" : "not ready");
1921 return ret; 1921 return ret;
1922} 1922}
1923 1923
1924static int il4965_prepare_card_hw(struct il_priv *priv) 1924static int il4965_prepare_card_hw(struct il_priv *il)
1925{ 1925{
1926 int ret = 0; 1926 int ret = 0;
1927 1927
1928 IL_DEBUG_INFO(priv, "il4965_prepare_card_hw enter\n"); 1928 IL_DEBUG_INFO(il, "il4965_prepare_card_hw enter\n");
1929 1929
1930 ret = il4965_set_hw_ready(priv); 1930 ret = il4965_set_hw_ready(il);
1931 if (priv->hw_ready) 1931 if (il->hw_ready)
1932 return ret; 1932 return ret;
1933 1933
1934 /* If HW is not ready, prepare the conditions to check again */ 1934 /* If HW is not ready, prepare the conditions to check again */
1935 il_set_bit(priv, CSR_HW_IF_CONFIG_REG, 1935 il_set_bit(il, CSR_HW_IF_CONFIG_REG,
1936 CSR_HW_IF_CONFIG_REG_PREPARE); 1936 CSR_HW_IF_CONFIG_REG_PREPARE);
1937 1937
1938 ret = il_poll_bit(priv, CSR_HW_IF_CONFIG_REG, 1938 ret = il_poll_bit(il, CSR_HW_IF_CONFIG_REG,
1939 ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 1939 ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
1940 CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000); 1940 CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
1941 1941
1942 /* HW should be ready by now, check again. */ 1942 /* HW should be ready by now, check again. */
1943 if (ret != -ETIMEDOUT) 1943 if (ret != -ETIMEDOUT)
1944 il4965_set_hw_ready(priv); 1944 il4965_set_hw_ready(il);
1945 1945
1946 return ret; 1946 return ret;
1947} 1947}
1948 1948
1949#define MAX_HW_RESTARTS 5 1949#define MAX_HW_RESTARTS 5
1950 1950
1951static int __il4965_up(struct il_priv *priv) 1951static int __il4965_up(struct il_priv *il)
1952{ 1952{
1953 struct il_rxon_context *ctx; 1953 struct il_rxon_context *ctx;
1954 int i; 1954 int i;
1955 int ret; 1955 int ret;
1956 1956
1957 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) { 1957 if (test_bit(STATUS_EXIT_PENDING, &il->status)) {
1958 IL_WARN(priv, "Exit pending; will not bring the NIC up\n"); 1958 IL_WARN(il, "Exit pending; will not bring the NIC up\n");
1959 return -EIO; 1959 return -EIO;
1960 } 1960 }
1961 1961
1962 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) { 1962 if (!il->ucode_data_backup.v_addr || !il->ucode_data.v_addr) {
1963 IL_ERR(priv, "ucode not available for device bringup\n"); 1963 IL_ERR(il, "ucode not available for device bringup\n");
1964 return -EIO; 1964 return -EIO;
1965 } 1965 }
1966 1966
1967 for_each_context(priv, ctx) { 1967 for_each_context(il, ctx) {
1968 ret = il4965_alloc_bcast_station(priv, ctx); 1968 ret = il4965_alloc_bcast_station(il, ctx);
1969 if (ret) { 1969 if (ret) {
1970 il_dealloc_bcast_stations(priv); 1970 il_dealloc_bcast_stations(il);
1971 return ret; 1971 return ret;
1972 } 1972 }
1973 } 1973 }
1974 1974
1975 il4965_prepare_card_hw(priv); 1975 il4965_prepare_card_hw(il);
1976 1976
1977 if (!priv->hw_ready) { 1977 if (!il->hw_ready) {
1978 IL_WARN(priv, "Exit HW not ready\n"); 1978 IL_WARN(il, "Exit HW not ready\n");
1979 return -EIO; 1979 return -EIO;
1980 } 1980 }
1981 1981
1982 /* If platform's RF_KILL switch is NOT set to KILL */ 1982 /* If platform's RF_KILL switch is NOT set to KILL */
1983 if (il_read32(priv, 1983 if (il_read32(il,
1984 CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW) 1984 CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
1985 clear_bit(STATUS_RF_KILL_HW, &priv->status); 1985 clear_bit(STATUS_RF_KILL_HW, &il->status);
1986 else 1986 else
1987 set_bit(STATUS_RF_KILL_HW, &priv->status); 1987 set_bit(STATUS_RF_KILL_HW, &il->status);
1988 1988
1989 if (il_is_rfkill(priv)) { 1989 if (il_is_rfkill(il)) {
1990 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true); 1990 wiphy_rfkill_set_hw_state(il->hw->wiphy, true);
1991 1991
1992 il_enable_interrupts(priv); 1992 il_enable_interrupts(il);
1993 IL_WARN(priv, "Radio disabled by HW RF Kill switch\n"); 1993 IL_WARN(il, "Radio disabled by HW RF Kill switch\n");
1994 return 0; 1994 return 0;
1995 } 1995 }
1996 1996
1997 il_write32(priv, CSR_INT, 0xFFFFFFFF); 1997 il_write32(il, CSR_INT, 0xFFFFFFFF);
1998 1998
1999 /* must be initialised before il_hw_nic_init */ 1999 /* must be initialised before il_hw_nic_init */
2000 priv->cmd_queue = IL_DEFAULT_CMD_QUEUE_NUM; 2000 il->cmd_queue = IL_DEFAULT_CMD_QUEUE_NUM;
2001 2001
2002 ret = il4965_hw_nic_init(priv); 2002 ret = il4965_hw_nic_init(il);
2003 if (ret) { 2003 if (ret) {
2004 IL_ERR(priv, "Unable to init nic\n"); 2004 IL_ERR(il, "Unable to init nic\n");
2005 return ret; 2005 return ret;
2006 } 2006 }
2007 2007
2008 /* make sure rfkill handshake bits are cleared */ 2008 /* make sure rfkill handshake bits are cleared */
2009 il_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); 2009 il_write32(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2010 il_write32(priv, CSR_UCODE_DRV_GP1_CLR, 2010 il_write32(il, CSR_UCODE_DRV_GP1_CLR,
2011 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); 2011 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2012 2012
2013 /* clear (again), then enable host interrupts */ 2013 /* clear (again), then enable host interrupts */
2014 il_write32(priv, CSR_INT, 0xFFFFFFFF); 2014 il_write32(il, CSR_INT, 0xFFFFFFFF);
2015 il_enable_interrupts(priv); 2015 il_enable_interrupts(il);
2016 2016
2017 /* really make sure rfkill handshake bits are cleared */ 2017 /* really make sure rfkill handshake bits are cleared */
2018 il_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); 2018 il_write32(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2019 il_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); 2019 il_write32(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2020 2020
2021 /* Copy original ucode data image from disk into backup cache. 2021 /* Copy original ucode data image from disk into backup cache.
2022 * This will be used to initialize the on-board processor's 2022 * This will be used to initialize the on-board processor's
2023 * data SRAM for a clean start when the runtime program first loads. */ 2023 * data SRAM for a clean start when the runtime program first loads. */
2024 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr, 2024 memcpy(il->ucode_data_backup.v_addr, il->ucode_data.v_addr,
2025 priv->ucode_data.len); 2025 il->ucode_data.len);
2026 2026
2027 for (i = 0; i < MAX_HW_RESTARTS; i++) { 2027 for (i = 0; i < MAX_HW_RESTARTS; i++) {
2028 2028
2029 /* load bootstrap state machine, 2029 /* load bootstrap state machine,
2030 * load bootstrap program into processor's memory, 2030 * load bootstrap program into processor's memory,
2031 * prepare to load the "initialize" uCode */ 2031 * prepare to load the "initialize" uCode */
2032 ret = priv->cfg->ops->lib->load_ucode(priv); 2032 ret = il->cfg->ops->lib->load_ucode(il);
2033 2033
2034 if (ret) { 2034 if (ret) {
2035 IL_ERR(priv, "Unable to set up bootstrap uCode: %d\n", 2035 IL_ERR(il, "Unable to set up bootstrap uCode: %d\n",
2036 ret); 2036 ret);
2037 continue; 2037 continue;
2038 } 2038 }
2039 2039
2040 /* start card; "initialize" will load runtime ucode */ 2040 /* start card; "initialize" will load runtime ucode */
2041 il4965_nic_start(priv); 2041 il4965_nic_start(il);
2042 2042
2043 IL_DEBUG_INFO(priv, DRV_NAME " is coming up\n"); 2043 IL_DEBUG_INFO(il, DRV_NAME " is coming up\n");
2044 2044
2045 return 0; 2045 return 0;
2046 } 2046 }
2047 2047
2048 set_bit(STATUS_EXIT_PENDING, &priv->status); 2048 set_bit(STATUS_EXIT_PENDING, &il->status);
2049 __il4965_down(priv); 2049 __il4965_down(il);
2050 clear_bit(STATUS_EXIT_PENDING, &priv->status); 2050 clear_bit(STATUS_EXIT_PENDING, &il->status);
2051 2051
2052 /* tried to restart and config the device for as long as our 2052 /* tried to restart and config the device for as long as our
2053 * patience could withstand */ 2053 * patience could withstand */
2054 IL_ERR(priv, "Unable to initialize device after %d attempts.\n", i); 2054 IL_ERR(il, "Unable to initialize device after %d attempts.\n", i);
2055 return -EIO; 2055 return -EIO;
2056} 2056}
2057 2057
@@ -2064,100 +2064,100 @@ static int __il4965_up(struct il_priv *priv)
2064 2064
2065static void il4965_bg_init_alive_start(struct work_struct *data) 2065static void il4965_bg_init_alive_start(struct work_struct *data)
2066{ 2066{
2067 struct il_priv *priv = 2067 struct il_priv *il =
2068 container_of(data, struct il_priv, init_alive_start.work); 2068 container_of(data, struct il_priv, init_alive_start.work);
2069 2069
2070 mutex_lock(&priv->mutex); 2070 mutex_lock(&il->mutex);
2071 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) 2071 if (test_bit(STATUS_EXIT_PENDING, &il->status))
2072 goto out; 2072 goto out;
2073 2073
2074 priv->cfg->ops->lib->init_alive_start(priv); 2074 il->cfg->ops->lib->init_alive_start(il);
2075out: 2075out:
2076 mutex_unlock(&priv->mutex); 2076 mutex_unlock(&il->mutex);
2077} 2077}
2078 2078
2079static void il4965_bg_alive_start(struct work_struct *data) 2079static void il4965_bg_alive_start(struct work_struct *data)
2080{ 2080{
2081 struct il_priv *priv = 2081 struct il_priv *il =
2082 container_of(data, struct il_priv, alive_start.work); 2082 container_of(data, struct il_priv, alive_start.work);
2083 2083
2084 mutex_lock(&priv->mutex); 2084 mutex_lock(&il->mutex);
2085 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) 2085 if (test_bit(STATUS_EXIT_PENDING, &il->status))
2086 goto out; 2086 goto out;
2087 2087
2088 il4965_alive_start(priv); 2088 il4965_alive_start(il);
2089out: 2089out:
2090 mutex_unlock(&priv->mutex); 2090 mutex_unlock(&il->mutex);
2091} 2091}
2092 2092
2093static void il4965_bg_run_time_calib_work(struct work_struct *work) 2093static void il4965_bg_run_time_calib_work(struct work_struct *work)
2094{ 2094{
2095 struct il_priv *priv = container_of(work, struct il_priv, 2095 struct il_priv *il = container_of(work, struct il_priv,
2096 run_time_calib_work); 2096 run_time_calib_work);
2097 2097
2098 mutex_lock(&priv->mutex); 2098 mutex_lock(&il->mutex);
2099 2099
2100 if (test_bit(STATUS_EXIT_PENDING, &priv->status) || 2100 if (test_bit(STATUS_EXIT_PENDING, &il->status) ||
2101 test_bit(STATUS_SCANNING, &priv->status)) { 2101 test_bit(STATUS_SCANNING, &il->status)) {
2102 mutex_unlock(&priv->mutex); 2102 mutex_unlock(&il->mutex);
2103 return; 2103 return;
2104 } 2104 }
2105 2105
2106 if (priv->start_calib) { 2106 if (il->start_calib) {
2107 il4965_chain_noise_calibration(priv, 2107 il4965_chain_noise_calibration(il,
2108 (void *)&priv->_4965.statistics); 2108 (void *)&il->_4965.statistics);
2109 il4965_sensitivity_calibration(priv, 2109 il4965_sensitivity_calibration(il,
2110 (void *)&priv->_4965.statistics); 2110 (void *)&il->_4965.statistics);
2111 } 2111 }
2112 2112
2113 mutex_unlock(&priv->mutex); 2113 mutex_unlock(&il->mutex);
2114} 2114}
2115 2115
2116static void il4965_bg_restart(struct work_struct *data) 2116static void il4965_bg_restart(struct work_struct *data)
2117{ 2117{
2118 struct il_priv *priv = container_of(data, struct il_priv, restart); 2118 struct il_priv *il = container_of(data, struct il_priv, restart);
2119 2119
2120 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) 2120 if (test_bit(STATUS_EXIT_PENDING, &il->status))
2121 return; 2121 return;
2122 2122
2123 if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) { 2123 if (test_and_clear_bit(STATUS_FW_ERROR, &il->status)) {
2124 struct il_rxon_context *ctx; 2124 struct il_rxon_context *ctx;
2125 2125
2126 mutex_lock(&priv->mutex); 2126 mutex_lock(&il->mutex);
2127 for_each_context(priv, ctx) 2127 for_each_context(il, ctx)
2128 ctx->vif = NULL; 2128 ctx->vif = NULL;
2129 priv->is_open = 0; 2129 il->is_open = 0;
2130 2130
2131 __il4965_down(priv); 2131 __il4965_down(il);
2132 2132
2133 mutex_unlock(&priv->mutex); 2133 mutex_unlock(&il->mutex);
2134 il4965_cancel_deferred_work(priv); 2134 il4965_cancel_deferred_work(il);
2135 ieee80211_restart_hw(priv->hw); 2135 ieee80211_restart_hw(il->hw);
2136 } else { 2136 } else {
2137 il4965_down(priv); 2137 il4965_down(il);
2138 2138
2139 mutex_lock(&priv->mutex); 2139 mutex_lock(&il->mutex);
2140 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) { 2140 if (test_bit(STATUS_EXIT_PENDING, &il->status)) {
2141 mutex_unlock(&priv->mutex); 2141 mutex_unlock(&il->mutex);
2142 return; 2142 return;
2143 } 2143 }
2144 2144
2145 __il4965_up(priv); 2145 __il4965_up(il);
2146 mutex_unlock(&priv->mutex); 2146 mutex_unlock(&il->mutex);
2147 } 2147 }
2148} 2148}
2149 2149
2150static void il4965_bg_rx_replenish(struct work_struct *data) 2150static void il4965_bg_rx_replenish(struct work_struct *data)
2151{ 2151{
2152 struct il_priv *priv = 2152 struct il_priv *il =
2153 container_of(data, struct il_priv, rx_replenish); 2153 container_of(data, struct il_priv, rx_replenish);
2154 2154
2155 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) 2155 if (test_bit(STATUS_EXIT_PENDING, &il->status))
2156 return; 2156 return;
2157 2157
2158 mutex_lock(&priv->mutex); 2158 mutex_lock(&il->mutex);
2159 il4965_rx_replenish(priv); 2159 il4965_rx_replenish(il);
2160 mutex_unlock(&priv->mutex); 2160 mutex_unlock(&il->mutex);
2161} 2161}
2162 2162
2163/***************************************************************************** 2163/*****************************************************************************
@@ -2172,11 +2172,11 @@ static void il4965_bg_rx_replenish(struct work_struct *data)
2172 * Not a mac80211 entry point function, but it fits in with all the 2172 * Not a mac80211 entry point function, but it fits in with all the
2173 * other mac80211 functions grouped here. 2173 * other mac80211 functions grouped here.
2174 */ 2174 */
2175static int il4965_mac_setup_register(struct il_priv *priv, 2175static int il4965_mac_setup_register(struct il_priv *il,
2176 u32 max_probe_length) 2176 u32 max_probe_length)
2177{ 2177{
2178 int ret; 2178 int ret;
2179 struct ieee80211_hw *hw = priv->hw; 2179 struct ieee80211_hw *hw = il->hw;
2180 struct il_rxon_context *ctx; 2180 struct il_rxon_context *ctx;
2181 2181
2182 hw->rate_control_algorithm = "iwl-4965-rs"; 2182 hw->rate_control_algorithm = "iwl-4965-rs";
@@ -2188,14 +2188,14 @@ static int il4965_mac_setup_register(struct il_priv *priv,
2188 IEEE80211_HW_SPECTRUM_MGMT | 2188 IEEE80211_HW_SPECTRUM_MGMT |
2189 IEEE80211_HW_REPORTS_TX_ACK_STATUS; 2189 IEEE80211_HW_REPORTS_TX_ACK_STATUS;
2190 2190
2191 if (priv->cfg->sku & IL_SKU_N) 2191 if (il->cfg->sku & IL_SKU_N)
2192 hw->flags |= IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS | 2192 hw->flags |= IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS |
2193 IEEE80211_HW_SUPPORTS_STATIC_SMPS; 2193 IEEE80211_HW_SUPPORTS_STATIC_SMPS;
2194 2194
2195 hw->sta_data_size = sizeof(struct il_station_priv); 2195 hw->sta_data_size = sizeof(struct il_station_priv);
2196 hw->vif_data_size = sizeof(struct il_vif_priv); 2196 hw->vif_data_size = sizeof(struct il_vif_priv);
2197 2197
2198 for_each_context(priv, ctx) { 2198 for_each_context(il, ctx) {
2199 hw->wiphy->interface_modes |= ctx->interface_modes; 2199 hw->wiphy->interface_modes |= ctx->interface_modes;
2200 hw->wiphy->interface_modes |= ctx->exclusive_interface_modes; 2200 hw->wiphy->interface_modes |= ctx->exclusive_interface_modes;
2201 } 2201 }
@@ -2218,21 +2218,21 @@ static int il4965_mac_setup_register(struct il_priv *priv,
2218 2218
2219 hw->max_listen_interval = IL_CONN_MAX_LISTEN_INTERVAL; 2219 hw->max_listen_interval = IL_CONN_MAX_LISTEN_INTERVAL;
2220 2220
2221 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels) 2221 if (il->bands[IEEE80211_BAND_2GHZ].n_channels)
2222 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] = 2222 il->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
2223 &priv->bands[IEEE80211_BAND_2GHZ]; 2223 &il->bands[IEEE80211_BAND_2GHZ];
2224 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels) 2224 if (il->bands[IEEE80211_BAND_5GHZ].n_channels)
2225 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] = 2225 il->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
2226 &priv->bands[IEEE80211_BAND_5GHZ]; 2226 &il->bands[IEEE80211_BAND_5GHZ];
2227 2227
2228 il_leds_init(priv); 2228 il_leds_init(il);
2229 2229
2230 ret = ieee80211_register_hw(priv->hw); 2230 ret = ieee80211_register_hw(il->hw);
2231 if (ret) { 2231 if (ret) {
2232 IL_ERR(priv, "Failed to register hw (error %d)\n", ret); 2232 IL_ERR(il, "Failed to register hw (error %d)\n", ret);
2233 return ret; 2233 return ret;
2234 } 2234 }
2235 priv->mac80211_registered = 1; 2235 il->mac80211_registered = 1;
2236 2236
2237 return 0; 2237 return 0;
2238} 2238}
@@ -2240,81 +2240,81 @@ static int il4965_mac_setup_register(struct il_priv *priv,
2240 2240
2241int il4965_mac_start(struct ieee80211_hw *hw) 2241int il4965_mac_start(struct ieee80211_hw *hw)
2242{ 2242{
2243 struct il_priv *priv = hw->priv; 2243 struct il_priv *il = hw->priv;
2244 int ret; 2244 int ret;
2245 2245
2246 IL_DEBUG_MAC80211(priv, "enter\n"); 2246 IL_DEBUG_MAC80211(il, "enter\n");
2247 2247
2248 /* we should be verifying the device is ready to be opened */ 2248 /* we should be verifying the device is ready to be opened */
2249 mutex_lock(&priv->mutex); 2249 mutex_lock(&il->mutex);
2250 ret = __il4965_up(priv); 2250 ret = __il4965_up(il);
2251 mutex_unlock(&priv->mutex); 2251 mutex_unlock(&il->mutex);
2252 2252
2253 if (ret) 2253 if (ret)
2254 return ret; 2254 return ret;
2255 2255
2256 if (il_is_rfkill(priv)) 2256 if (il_is_rfkill(il))
2257 goto out; 2257 goto out;
2258 2258
2259 IL_DEBUG_INFO(priv, "Start UP work done.\n"); 2259 IL_DEBUG_INFO(il, "Start UP work done.\n");
2260 2260
2261 /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from 2261 /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
2262 * mac80211 will not be run successfully. */ 2262 * mac80211 will not be run successfully. */
2263 ret = wait_event_timeout(priv->wait_command_queue, 2263 ret = wait_event_timeout(il->wait_command_queue,
2264 test_bit(STATUS_READY, &priv->status), 2264 test_bit(STATUS_READY, &il->status),
2265 UCODE_READY_TIMEOUT); 2265 UCODE_READY_TIMEOUT);
2266 if (!ret) { 2266 if (!ret) {
2267 if (!test_bit(STATUS_READY, &priv->status)) { 2267 if (!test_bit(STATUS_READY, &il->status)) {
2268 IL_ERR(priv, "START_ALIVE timeout after %dms.\n", 2268 IL_ERR(il, "START_ALIVE timeout after %dms.\n",
2269 jiffies_to_msecs(UCODE_READY_TIMEOUT)); 2269 jiffies_to_msecs(UCODE_READY_TIMEOUT));
2270 return -ETIMEDOUT; 2270 return -ETIMEDOUT;
2271 } 2271 }
2272 } 2272 }
2273 2273
2274 il4965_led_enable(priv); 2274 il4965_led_enable(il);
2275 2275
2276out: 2276out:
2277 priv->is_open = 1; 2277 il->is_open = 1;
2278 IL_DEBUG_MAC80211(priv, "leave\n"); 2278 IL_DEBUG_MAC80211(il, "leave\n");
2279 return 0; 2279 return 0;
2280} 2280}
2281 2281
2282void il4965_mac_stop(struct ieee80211_hw *hw) 2282void il4965_mac_stop(struct ieee80211_hw *hw)
2283{ 2283{
2284 struct il_priv *priv = hw->priv; 2284 struct il_priv *il = hw->priv;
2285 2285
2286 IL_DEBUG_MAC80211(priv, "enter\n"); 2286 IL_DEBUG_MAC80211(il, "enter\n");
2287 2287
2288 if (!priv->is_open) 2288 if (!il->is_open)
2289 return; 2289 return;
2290 2290
2291 priv->is_open = 0; 2291 il->is_open = 0;
2292 2292
2293 il4965_down(priv); 2293 il4965_down(il);
2294 2294
2295 flush_workqueue(priv->workqueue); 2295 flush_workqueue(il->workqueue);
2296 2296
2297 /* User space software may expect getting rfkill changes 2297 /* User space software may expect getting rfkill changes
2298 * even if interface is down */ 2298 * even if interface is down */
2299 il_write32(priv, CSR_INT, 0xFFFFFFFF); 2299 il_write32(il, CSR_INT, 0xFFFFFFFF);
2300 il_enable_rfkill_int(priv); 2300 il_enable_rfkill_int(il);
2301 2301
2302 IL_DEBUG_MAC80211(priv, "leave\n"); 2302 IL_DEBUG_MAC80211(il, "leave\n");
2303} 2303}
2304 2304
2305void il4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb) 2305void il4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2306{ 2306{
2307 struct il_priv *priv = hw->priv; 2307 struct il_priv *il = hw->priv;
2308 2308
2309 IL_DEBUG_MACDUMP(priv, "enter\n"); 2309 IL_DEBUG_MACDUMP(il, "enter\n");
2310 2310
2311 IL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len, 2311 IL_DEBUG_TX(il, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
2312 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate); 2312 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
2313 2313
2314 if (il4965_tx_skb(priv, skb)) 2314 if (il4965_tx_skb(il, skb))
2315 dev_kfree_skb_any(skb); 2315 dev_kfree_skb_any(skb);
2316 2316
2317 IL_DEBUG_MACDUMP(priv, "leave\n"); 2317 IL_DEBUG_MACDUMP(il, "leave\n");
2318} 2318}
2319 2319
2320void il4965_mac_update_tkip_key(struct ieee80211_hw *hw, 2320void il4965_mac_update_tkip_key(struct ieee80211_hw *hw,
@@ -2323,41 +2323,41 @@ void il4965_mac_update_tkip_key(struct ieee80211_hw *hw,
2323 struct ieee80211_sta *sta, 2323 struct ieee80211_sta *sta,
2324 u32 iv32, u16 *phase1key) 2324 u32 iv32, u16 *phase1key)
2325{ 2325{
2326 struct il_priv *priv = hw->priv; 2326 struct il_priv *il = hw->priv;
2327 struct il_vif_priv *vif_priv = (void *)vif->drv_priv; 2327 struct il_vif_priv *vif_priv = (void *)vif->drv_priv;
2328 2328
2329 IL_DEBUG_MAC80211(priv, "enter\n"); 2329 IL_DEBUG_MAC80211(il, "enter\n");
2330 2330
2331 il4965_update_tkip_key(priv, vif_priv->ctx, keyconf, sta, 2331 il4965_update_tkip_key(il, vif_priv->ctx, keyconf, sta,
2332 iv32, phase1key); 2332 iv32, phase1key);
2333 2333
2334 IL_DEBUG_MAC80211(priv, "leave\n"); 2334 IL_DEBUG_MAC80211(il, "leave\n");
2335} 2335}
2336 2336
2337int il4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, 2337int il4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2338 struct ieee80211_vif *vif, struct ieee80211_sta *sta, 2338 struct ieee80211_vif *vif, struct ieee80211_sta *sta,
2339 struct ieee80211_key_conf *key) 2339 struct ieee80211_key_conf *key)
2340{ 2340{
2341 struct il_priv *priv = hw->priv; 2341 struct il_priv *il = hw->priv;
2342 struct il_vif_priv *vif_priv = (void *)vif->drv_priv; 2342 struct il_vif_priv *vif_priv = (void *)vif->drv_priv;
2343 struct il_rxon_context *ctx = vif_priv->ctx; 2343 struct il_rxon_context *ctx = vif_priv->ctx;
2344 int ret; 2344 int ret;
2345 u8 sta_id; 2345 u8 sta_id;
2346 bool is_default_wep_key = false; 2346 bool is_default_wep_key = false;
2347 2347
2348 IL_DEBUG_MAC80211(priv, "enter\n"); 2348 IL_DEBUG_MAC80211(il, "enter\n");
2349 2349
2350 if (priv->cfg->mod_params->sw_crypto) { 2350 if (il->cfg->mod_params->sw_crypto) {
2351 IL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n"); 2351 IL_DEBUG_MAC80211(il, "leave - hwcrypto disabled\n");
2352 return -EOPNOTSUPP; 2352 return -EOPNOTSUPP;
2353 } 2353 }
2354 2354
2355 sta_id = il_sta_id_or_broadcast(priv, vif_priv->ctx, sta); 2355 sta_id = il_sta_id_or_broadcast(il, vif_priv->ctx, sta);
2356 if (sta_id == IL_INVALID_STATION) 2356 if (sta_id == IL_INVALID_STATION)
2357 return -EINVAL; 2357 return -EINVAL;
2358 2358
2359 mutex_lock(&priv->mutex); 2359 mutex_lock(&il->mutex);
2360 il_scan_cancel_timeout(priv, 100); 2360 il_scan_cancel_timeout(il, 100);
2361 2361
2362 /* 2362 /*
2363 * If we are getting WEP group key and we didn't receive any key mapping 2363 * If we are getting WEP group key and we didn't receive any key mapping
@@ -2378,29 +2378,29 @@ int il4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2378 switch (cmd) { 2378 switch (cmd) {
2379 case SET_KEY: 2379 case SET_KEY:
2380 if (is_default_wep_key) 2380 if (is_default_wep_key)
2381 ret = il4965_set_default_wep_key(priv, 2381 ret = il4965_set_default_wep_key(il,
2382 vif_priv->ctx, key); 2382 vif_priv->ctx, key);
2383 else 2383 else
2384 ret = il4965_set_dynamic_key(priv, vif_priv->ctx, 2384 ret = il4965_set_dynamic_key(il, vif_priv->ctx,
2385 key, sta_id); 2385 key, sta_id);
2386 2386
2387 IL_DEBUG_MAC80211(priv, "enable hwcrypto key\n"); 2387 IL_DEBUG_MAC80211(il, "enable hwcrypto key\n");
2388 break; 2388 break;
2389 case DISABLE_KEY: 2389 case DISABLE_KEY:
2390 if (is_default_wep_key) 2390 if (is_default_wep_key)
2391 ret = il4965_remove_default_wep_key(priv, ctx, key); 2391 ret = il4965_remove_default_wep_key(il, ctx, key);
2392 else 2392 else
2393 ret = il4965_remove_dynamic_key(priv, ctx, 2393 ret = il4965_remove_dynamic_key(il, ctx,
2394 key, sta_id); 2394 key, sta_id);
2395 2395
2396 IL_DEBUG_MAC80211(priv, "disable hwcrypto key\n"); 2396 IL_DEBUG_MAC80211(il, "disable hwcrypto key\n");
2397 break; 2397 break;
2398 default: 2398 default:
2399 ret = -EINVAL; 2399 ret = -EINVAL;
2400 } 2400 }
2401 2401
2402 mutex_unlock(&priv->mutex); 2402 mutex_unlock(&il->mutex);
2403 IL_DEBUG_MAC80211(priv, "leave\n"); 2403 IL_DEBUG_MAC80211(il, "leave\n");
2404 2404
2405 return ret; 2405 return ret;
2406} 2406}
@@ -2411,43 +2411,43 @@ int il4965_mac_ampdu_action(struct ieee80211_hw *hw,
2411 struct ieee80211_sta *sta, u16 tid, u16 *ssn, 2411 struct ieee80211_sta *sta, u16 tid, u16 *ssn,
2412 u8 buf_size) 2412 u8 buf_size)
2413{ 2413{
2414 struct il_priv *priv = hw->priv; 2414 struct il_priv *il = hw->priv;
2415 int ret = -EINVAL; 2415 int ret = -EINVAL;
2416 2416
2417 IL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n", 2417 IL_DEBUG_HT(il, "A-MPDU action on addr %pM tid %d\n",
2418 sta->addr, tid); 2418 sta->addr, tid);
2419 2419
2420 if (!(priv->cfg->sku & IL_SKU_N)) 2420 if (!(il->cfg->sku & IL_SKU_N))
2421 return -EACCES; 2421 return -EACCES;
2422 2422
2423 mutex_lock(&priv->mutex); 2423 mutex_lock(&il->mutex);
2424 2424
2425 switch (action) { 2425 switch (action) {
2426 case IEEE80211_AMPDU_RX_START: 2426 case IEEE80211_AMPDU_RX_START:
2427 IL_DEBUG_HT(priv, "start Rx\n"); 2427 IL_DEBUG_HT(il, "start Rx\n");
2428 ret = il4965_sta_rx_agg_start(priv, sta, tid, *ssn); 2428 ret = il4965_sta_rx_agg_start(il, sta, tid, *ssn);
2429 break; 2429 break;
2430 case IEEE80211_AMPDU_RX_STOP: 2430 case IEEE80211_AMPDU_RX_STOP:
2431 IL_DEBUG_HT(priv, "stop Rx\n"); 2431 IL_DEBUG_HT(il, "stop Rx\n");
2432 ret = il4965_sta_rx_agg_stop(priv, sta, tid); 2432 ret = il4965_sta_rx_agg_stop(il, sta, tid);
2433 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) 2433 if (test_bit(STATUS_EXIT_PENDING, &il->status))
2434 ret = 0; 2434 ret = 0;
2435 break; 2435 break;
2436 case IEEE80211_AMPDU_TX_START: 2436 case IEEE80211_AMPDU_TX_START:
2437 IL_DEBUG_HT(priv, "start Tx\n"); 2437 IL_DEBUG_HT(il, "start Tx\n");
2438 ret = il4965_tx_agg_start(priv, vif, sta, tid, ssn); 2438 ret = il4965_tx_agg_start(il, vif, sta, tid, ssn);
2439 break; 2439 break;
2440 case IEEE80211_AMPDU_TX_STOP: 2440 case IEEE80211_AMPDU_TX_STOP:
2441 IL_DEBUG_HT(priv, "stop Tx\n"); 2441 IL_DEBUG_HT(il, "stop Tx\n");
2442 ret = il4965_tx_agg_stop(priv, vif, sta, tid); 2442 ret = il4965_tx_agg_stop(il, vif, sta, tid);
2443 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) 2443 if (test_bit(STATUS_EXIT_PENDING, &il->status))
2444 ret = 0; 2444 ret = 0;
2445 break; 2445 break;
2446 case IEEE80211_AMPDU_TX_OPERATIONAL: 2446 case IEEE80211_AMPDU_TX_OPERATIONAL:
2447 ret = 0; 2447 ret = 0;
2448 break; 2448 break;
2449 } 2449 }
2450 mutex_unlock(&priv->mutex); 2450 mutex_unlock(&il->mutex);
2451 2451
2452 return ret; 2452 return ret;
2453} 2453}
@@ -2456,39 +2456,39 @@ int il4965_mac_sta_add(struct ieee80211_hw *hw,
2456 struct ieee80211_vif *vif, 2456 struct ieee80211_vif *vif,
2457 struct ieee80211_sta *sta) 2457 struct ieee80211_sta *sta)
2458{ 2458{
2459 struct il_priv *priv = hw->priv; 2459 struct il_priv *il = hw->priv;
2460 struct il_station_priv *sta_priv = (void *)sta->drv_priv; 2460 struct il_station_priv *sta_priv = (void *)sta->drv_priv;
2461 struct il_vif_priv *vif_priv = (void *)vif->drv_priv; 2461 struct il_vif_priv *vif_priv = (void *)vif->drv_priv;
2462 bool is_ap = vif->type == NL80211_IFTYPE_STATION; 2462 bool is_ap = vif->type == NL80211_IFTYPE_STATION;
2463 int ret; 2463 int ret;
2464 u8 sta_id; 2464 u8 sta_id;
2465 2465
2466 IL_DEBUG_INFO(priv, "received request to add station %pM\n", 2466 IL_DEBUG_INFO(il, "received request to add station %pM\n",
2467 sta->addr); 2467 sta->addr);
2468 mutex_lock(&priv->mutex); 2468 mutex_lock(&il->mutex);
2469 IL_DEBUG_INFO(priv, "proceeding to add station %pM\n", 2469 IL_DEBUG_INFO(il, "proceeding to add station %pM\n",
2470 sta->addr); 2470 sta->addr);
2471 sta_priv->common.sta_id = IL_INVALID_STATION; 2471 sta_priv->common.sta_id = IL_INVALID_STATION;
2472 2472
2473 atomic_set(&sta_priv->pending_frames, 0); 2473 atomic_set(&sta_priv->pending_frames, 0);
2474 2474
2475 ret = il_add_station_common(priv, vif_priv->ctx, sta->addr, 2475 ret = il_add_station_common(il, vif_priv->ctx, sta->addr,
2476 is_ap, sta, &sta_id); 2476 is_ap, sta, &sta_id);
2477 if (ret) { 2477 if (ret) {
2478 IL_ERR(priv, "Unable to add station %pM (%d)\n", 2478 IL_ERR(il, "Unable to add station %pM (%d)\n",
2479 sta->addr, ret); 2479 sta->addr, ret);
2480 /* Should we return success if return code is EEXIST ? */ 2480 /* Should we return success if return code is EEXIST ? */
2481 mutex_unlock(&priv->mutex); 2481 mutex_unlock(&il->mutex);
2482 return ret; 2482 return ret;
2483 } 2483 }
2484 2484
2485 sta_priv->common.sta_id = sta_id; 2485 sta_priv->common.sta_id = sta_id;
2486 2486
2487 /* Initialize rate scaling */ 2487 /* Initialize rate scaling */
2488 IL_DEBUG_INFO(priv, "Initializing rate scaling for station %pM\n", 2488 IL_DEBUG_INFO(il, "Initializing rate scaling for station %pM\n",
2489 sta->addr); 2489 sta->addr);
2490 il4965_rs_rate_init(priv, sta, sta_id); 2490 il4965_rs_rate_init(il, sta, sta_id);
2491 mutex_unlock(&priv->mutex); 2491 mutex_unlock(&il->mutex);
2492 2492
2493 return 0; 2493 return 0;
2494} 2494}
@@ -2496,46 +2496,46 @@ int il4965_mac_sta_add(struct ieee80211_hw *hw,
2496void il4965_mac_channel_switch(struct ieee80211_hw *hw, 2496void il4965_mac_channel_switch(struct ieee80211_hw *hw,
2497 struct ieee80211_channel_switch *ch_switch) 2497 struct ieee80211_channel_switch *ch_switch)
2498{ 2498{
2499 struct il_priv *priv = hw->priv; 2499 struct il_priv *il = hw->priv;
2500 const struct il_channel_info *ch_info; 2500 const struct il_channel_info *ch_info;
2501 struct ieee80211_conf *conf = &hw->conf; 2501 struct ieee80211_conf *conf = &hw->conf;
2502 struct ieee80211_channel *channel = ch_switch->channel; 2502 struct ieee80211_channel *channel = ch_switch->channel;
2503 struct il_ht_config *ht_conf = &priv->current_ht_config; 2503 struct il_ht_config *ht_conf = &il->current_ht_config;
2504 2504
2505 struct il_rxon_context *ctx = &priv->contexts[IL_RXON_CTX_BSS]; 2505 struct il_rxon_context *ctx = &il->contexts[IL_RXON_CTX_BSS];
2506 u16 ch; 2506 u16 ch;
2507 2507
2508 IL_DEBUG_MAC80211(priv, "enter\n"); 2508 IL_DEBUG_MAC80211(il, "enter\n");
2509 2509
2510 mutex_lock(&priv->mutex); 2510 mutex_lock(&il->mutex);
2511 2511
2512 if (il_is_rfkill(priv)) 2512 if (il_is_rfkill(il))
2513 goto out; 2513 goto out;
2514 2514
2515 if (test_bit(STATUS_EXIT_PENDING, &priv->status) || 2515 if (test_bit(STATUS_EXIT_PENDING, &il->status) ||
2516 test_bit(STATUS_SCANNING, &priv->status) || 2516 test_bit(STATUS_SCANNING, &il->status) ||
2517 test_bit(STATUS_CHANNEL_SWITCH_PENDING, &priv->status)) 2517 test_bit(STATUS_CHANNEL_SWITCH_PENDING, &il->status))
2518 goto out; 2518 goto out;
2519 2519
2520 if (!il_is_associated_ctx(ctx)) 2520 if (!il_is_associated_ctx(ctx))
2521 goto out; 2521 goto out;
2522 2522
2523 if (!priv->cfg->ops->lib->set_channel_switch) 2523 if (!il->cfg->ops->lib->set_channel_switch)
2524 goto out; 2524 goto out;
2525 2525
2526 ch = channel->hw_value; 2526 ch = channel->hw_value;
2527 if (le16_to_cpu(ctx->active.channel) == ch) 2527 if (le16_to_cpu(ctx->active.channel) == ch)
2528 goto out; 2528 goto out;
2529 2529
2530 ch_info = il_get_channel_info(priv, channel->band, ch); 2530 ch_info = il_get_channel_info(il, channel->band, ch);
2531 if (!il_is_channel_valid(ch_info)) { 2531 if (!il_is_channel_valid(ch_info)) {
2532 IL_DEBUG_MAC80211(priv, "invalid channel\n"); 2532 IL_DEBUG_MAC80211(il, "invalid channel\n");
2533 goto out; 2533 goto out;
2534 } 2534 }
2535 2535
2536 spin_lock_irq(&priv->lock); 2536 spin_lock_irq(&il->lock);
2537 2537
2538 priv->current_ht_config.smps = conf->smps_mode; 2538 il->current_ht_config.smps = conf->smps_mode;
2539 2539
2540 /* Configure HT40 channels */ 2540 /* Configure HT40 channels */
2541 ctx->ht.enabled = conf_is_ht(conf); 2541 ctx->ht.enabled = conf_is_ht(conf);
@@ -2559,28 +2559,28 @@ void il4965_mac_channel_switch(struct ieee80211_hw *hw,
2559 if ((le16_to_cpu(ctx->staging.channel) != ch)) 2559 if ((le16_to_cpu(ctx->staging.channel) != ch))
2560 ctx->staging.flags = 0; 2560 ctx->staging.flags = 0;
2561 2561
2562 il_set_rxon_channel(priv, channel, ctx); 2562 il_set_rxon_channel(il, channel, ctx);
2563 il_set_rxon_ht(priv, ht_conf); 2563 il_set_rxon_ht(il, ht_conf);
2564 il_set_flags_for_band(priv, ctx, channel->band, ctx->vif); 2564 il_set_flags_for_band(il, ctx, channel->band, ctx->vif);
2565 2565
2566 spin_unlock_irq(&priv->lock); 2566 spin_unlock_irq(&il->lock);
2567 2567
2568 il_set_rate(priv); 2568 il_set_rate(il);
2569 /* 2569 /*
2570 * at this point, staging_rxon has the 2570 * at this point, staging_rxon has the
2571 * configuration for channel switch 2571 * configuration for channel switch
2572 */ 2572 */
2573 set_bit(STATUS_CHANNEL_SWITCH_PENDING, &priv->status); 2573 set_bit(STATUS_CHANNEL_SWITCH_PENDING, &il->status);
2574 priv->switch_channel = cpu_to_le16(ch); 2574 il->switch_channel = cpu_to_le16(ch);
2575 if (priv->cfg->ops->lib->set_channel_switch(priv, ch_switch)) { 2575 if (il->cfg->ops->lib->set_channel_switch(il, ch_switch)) {
2576 clear_bit(STATUS_CHANNEL_SWITCH_PENDING, &priv->status); 2576 clear_bit(STATUS_CHANNEL_SWITCH_PENDING, &il->status);
2577 priv->switch_channel = 0; 2577 il->switch_channel = 0;
2578 ieee80211_chswitch_done(ctx->vif, false); 2578 ieee80211_chswitch_done(ctx->vif, false);
2579 } 2579 }
2580 2580
2581out: 2581out:
2582 mutex_unlock(&priv->mutex); 2582 mutex_unlock(&il->mutex);
2583 IL_DEBUG_MAC80211(priv, "leave\n"); 2583 IL_DEBUG_MAC80211(il, "leave\n");
2584} 2584}
2585 2585
2586void il4965_configure_filter(struct ieee80211_hw *hw, 2586void il4965_configure_filter(struct ieee80211_hw *hw,
@@ -2588,7 +2588,7 @@ void il4965_configure_filter(struct ieee80211_hw *hw,
2588 unsigned int *total_flags, 2588 unsigned int *total_flags,
2589 u64 multicast) 2589 u64 multicast)
2590{ 2590{
2591 struct il_priv *priv = hw->priv; 2591 struct il_priv *il = hw->priv;
2592 __le32 filter_or = 0, filter_nand = 0; 2592 __le32 filter_or = 0, filter_nand = 0;
2593 struct il_rxon_context *ctx; 2593 struct il_rxon_context *ctx;
2594 2594
@@ -2599,7 +2599,7 @@ void il4965_configure_filter(struct ieee80211_hw *hw,
2599 filter_nand |= (flag); \ 2599 filter_nand |= (flag); \
2600 } while (0) 2600 } while (0)
2601 2601
2602 IL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n", 2602 IL_DEBUG_MAC80211(il, "Enter: changed: 0x%x, total: 0x%x\n",
2603 changed_flags, *total_flags); 2603 changed_flags, *total_flags);
2604 2604
2605 CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK); 2605 CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK);
@@ -2609,9 +2609,9 @@ void il4965_configure_filter(struct ieee80211_hw *hw,
2609 2609
2610#undef CHK 2610#undef CHK
2611 2611
2612 mutex_lock(&priv->mutex); 2612 mutex_lock(&il->mutex);
2613 2613
2614 for_each_context(priv, ctx) { 2614 for_each_context(il, ctx) {
2615 ctx->staging.filter_flags &= ~filter_nand; 2615 ctx->staging.filter_flags &= ~filter_nand;
2616 ctx->staging.filter_flags |= filter_or; 2616 ctx->staging.filter_flags |= filter_or;
2617 2617
@@ -2621,7 +2621,7 @@ void il4965_configure_filter(struct ieee80211_hw *hw,
2621 */ 2621 */
2622 } 2622 }
2623 2623
2624 mutex_unlock(&priv->mutex); 2624 mutex_unlock(&il->mutex);
2625 2625
2626 /* 2626 /*
2627 * Receiving all multicast frames is always enabled by the 2627 * Receiving all multicast frames is always enabled by the
@@ -2641,72 +2641,72 @@ void il4965_configure_filter(struct ieee80211_hw *hw,
2641 2641
2642static void il4965_bg_txpower_work(struct work_struct *work) 2642static void il4965_bg_txpower_work(struct work_struct *work)
2643{ 2643{
2644 struct il_priv *priv = container_of(work, struct il_priv, 2644 struct il_priv *il = container_of(work, struct il_priv,
2645 txpower_work); 2645 txpower_work);
2646 2646
2647 mutex_lock(&priv->mutex); 2647 mutex_lock(&il->mutex);
2648 2648
2649 /* If a scan happened to start before we got here 2649 /* If a scan happened to start before we got here
2650 * then just return; the statistics notification will 2650 * then just return; the statistics notification will
2651 * kick off another scheduled work to compensate for 2651 * kick off another scheduled work to compensate for
2652 * any temperature delta we missed here. */ 2652 * any temperature delta we missed here. */
2653 if (test_bit(STATUS_EXIT_PENDING, &priv->status) || 2653 if (test_bit(STATUS_EXIT_PENDING, &il->status) ||
2654 test_bit(STATUS_SCANNING, &priv->status)) 2654 test_bit(STATUS_SCANNING, &il->status))
2655 goto out; 2655 goto out;
2656 2656
2657 /* Regardless of if we are associated, we must reconfigure the 2657 /* Regardless of if we are associated, we must reconfigure the
2658 * TX power since frames can be sent on non-radar channels while 2658 * TX power since frames can be sent on non-radar channels while
2659 * not associated */ 2659 * not associated */
2660 priv->cfg->ops->lib->send_tx_power(priv); 2660 il->cfg->ops->lib->send_tx_power(il);
2661 2661
2662 /* Update last_temperature to keep is_calib_needed from running 2662 /* Update last_temperature to keep is_calib_needed from running
2663 * when it isn't needed... */ 2663 * when it isn't needed... */
2664 priv->last_temperature = priv->temperature; 2664 il->last_temperature = il->temperature;
2665out: 2665out:
2666 mutex_unlock(&priv->mutex); 2666 mutex_unlock(&il->mutex);
2667} 2667}
2668 2668
2669static void il4965_setup_deferred_work(struct il_priv *priv) 2669static void il4965_setup_deferred_work(struct il_priv *il)
2670{ 2670{
2671 priv->workqueue = create_singlethread_workqueue(DRV_NAME); 2671 il->workqueue = create_singlethread_workqueue(DRV_NAME);
2672 2672
2673 init_waitqueue_head(&priv->wait_command_queue); 2673 init_waitqueue_head(&il->wait_command_queue);
2674 2674
2675 INIT_WORK(&priv->restart, il4965_bg_restart); 2675 INIT_WORK(&il->restart, il4965_bg_restart);
2676 INIT_WORK(&priv->rx_replenish, il4965_bg_rx_replenish); 2676 INIT_WORK(&il->rx_replenish, il4965_bg_rx_replenish);
2677 INIT_WORK(&priv->run_time_calib_work, il4965_bg_run_time_calib_work); 2677 INIT_WORK(&il->run_time_calib_work, il4965_bg_run_time_calib_work);
2678 INIT_DELAYED_WORK(&priv->init_alive_start, il4965_bg_init_alive_start); 2678 INIT_DELAYED_WORK(&il->init_alive_start, il4965_bg_init_alive_start);
2679 INIT_DELAYED_WORK(&priv->alive_start, il4965_bg_alive_start); 2679 INIT_DELAYED_WORK(&il->alive_start, il4965_bg_alive_start);
2680 2680
2681 il_setup_scan_deferred_work(priv); 2681 il_setup_scan_deferred_work(il);
2682 2682
2683 INIT_WORK(&priv->txpower_work, il4965_bg_txpower_work); 2683 INIT_WORK(&il->txpower_work, il4965_bg_txpower_work);
2684 2684
2685 init_timer(&priv->statistics_periodic); 2685 init_timer(&il->statistics_periodic);
2686 priv->statistics_periodic.data = (unsigned long)priv; 2686 il->statistics_periodic.data = (unsigned long)il;
2687 priv->statistics_periodic.function = il4965_bg_statistics_periodic; 2687 il->statistics_periodic.function = il4965_bg_statistics_periodic;
2688 2688
2689 init_timer(&priv->watchdog); 2689 init_timer(&il->watchdog);
2690 priv->watchdog.data = (unsigned long)priv; 2690 il->watchdog.data = (unsigned long)il;
2691 priv->watchdog.function = il_bg_watchdog; 2691 il->watchdog.function = il_bg_watchdog;
2692 2692
2693 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long)) 2693 tasklet_init(&il->irq_tasklet, (void (*)(unsigned long))
2694 il4965_irq_tasklet, (unsigned long)priv); 2694 il4965_irq_tasklet, (unsigned long)il);
2695} 2695}
2696 2696
2697static void il4965_cancel_deferred_work(struct il_priv *priv) 2697static void il4965_cancel_deferred_work(struct il_priv *il)
2698{ 2698{
2699 cancel_work_sync(&priv->txpower_work); 2699 cancel_work_sync(&il->txpower_work);
2700 cancel_delayed_work_sync(&priv->init_alive_start); 2700 cancel_delayed_work_sync(&il->init_alive_start);
2701 cancel_delayed_work(&priv->alive_start); 2701 cancel_delayed_work(&il->alive_start);
2702 cancel_work_sync(&priv->run_time_calib_work); 2702 cancel_work_sync(&il->run_time_calib_work);
2703 2703
2704 il_cancel_scan_deferred_work(priv); 2704 il_cancel_scan_deferred_work(il);
2705 2705
2706 del_timer_sync(&priv->statistics_periodic); 2706 del_timer_sync(&il->statistics_periodic);
2707} 2707}
2708 2708
2709static void il4965_init_hw_rates(struct il_priv *priv, 2709static void il4965_init_hw_rates(struct il_priv *il,
2710 struct ieee80211_rate *rates) 2710 struct ieee80211_rate *rates)
2711{ 2711{
2712 int i; 2712 int i;
@@ -2727,26 +2727,26 @@ static void il4965_init_hw_rates(struct il_priv *priv,
2727 } 2727 }
2728} 2728}
2729/* 2729/*
2730 * Acquire priv->lock before calling this function ! 2730 * Acquire il->lock before calling this function !
2731 */ 2731 */
2732void il4965_set_wr_ptrs(struct il_priv *priv, int txq_id, u32 index) 2732void il4965_set_wr_ptrs(struct il_priv *il, int txq_id, u32 index)
2733{ 2733{
2734 il_write_direct32(priv, HBUS_TARG_WRPTR, 2734 il_write_direct32(il, HBUS_TARG_WRPTR,
2735 (index & 0xff) | (txq_id << 8)); 2735 (index & 0xff) | (txq_id << 8));
2736 il_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(txq_id), index); 2736 il_write_prph(il, IWL49_SCD_QUEUE_RDPTR(txq_id), index);
2737} 2737}
2738 2738
2739void il4965_tx_queue_set_status(struct il_priv *priv, 2739void il4965_tx_queue_set_status(struct il_priv *il,
2740 struct il_tx_queue *txq, 2740 struct il_tx_queue *txq,
2741 int tx_fifo_id, int scd_retry) 2741 int tx_fifo_id, int scd_retry)
2742{ 2742{
2743 int txq_id = txq->q.id; 2743 int txq_id = txq->q.id;
2744 2744
2745 /* Find out whether to activate Tx queue */ 2745 /* Find out whether to activate Tx queue */
2746 int active = test_bit(txq_id, &priv->txq_ctx_active_msk) ? 1 : 0; 2746 int active = test_bit(txq_id, &il->txq_ctx_active_msk) ? 1 : 0;
2747 2747
2748 /* Set up and activate */ 2748 /* Set up and activate */
2749 il_write_prph(priv, IWL49_SCD_QUEUE_STATUS_BITS(txq_id), 2749 il_write_prph(il, IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
2750 (active << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE) | 2750 (active << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE) |
2751 (tx_fifo_id << IWL49_SCD_QUEUE_STTS_REG_POS_TXF) | 2751 (tx_fifo_id << IWL49_SCD_QUEUE_STTS_REG_POS_TXF) |
2752 (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_WSL) | 2752 (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_WSL) |
@@ -2755,94 +2755,94 @@ void il4965_tx_queue_set_status(struct il_priv *priv,
2755 2755
2756 txq->sched_retry = scd_retry; 2756 txq->sched_retry = scd_retry;
2757 2757
2758 IL_DEBUG_INFO(priv, "%s %s Queue %d on AC %d\n", 2758 IL_DEBUG_INFO(il, "%s %s Queue %d on AC %d\n",
2759 active ? "Activate" : "Deactivate", 2759 active ? "Activate" : "Deactivate",
2760 scd_retry ? "BA" : "AC", txq_id, tx_fifo_id); 2760 scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
2761} 2761}
2762 2762
2763 2763
2764static int il4965_init_drv(struct il_priv *priv) 2764static int il4965_init_drv(struct il_priv *il)
2765{ 2765{
2766 int ret; 2766 int ret;
2767 2767
2768 spin_lock_init(&priv->sta_lock); 2768 spin_lock_init(&il->sta_lock);
2769 spin_lock_init(&priv->hcmd_lock); 2769 spin_lock_init(&il->hcmd_lock);
2770 2770
2771 INIT_LIST_HEAD(&priv->free_frames); 2771 INIT_LIST_HEAD(&il->free_frames);
2772 2772
2773 mutex_init(&priv->mutex); 2773 mutex_init(&il->mutex);
2774 2774
2775 priv->ieee_channels = NULL; 2775 il->ieee_channels = NULL;
2776 priv->ieee_rates = NULL; 2776 il->ieee_rates = NULL;
2777 priv->band = IEEE80211_BAND_2GHZ; 2777 il->band = IEEE80211_BAND_2GHZ;
2778 2778
2779 priv->iw_mode = NL80211_IFTYPE_STATION; 2779 il->iw_mode = NL80211_IFTYPE_STATION;
2780 priv->current_ht_config.smps = IEEE80211_SMPS_STATIC; 2780 il->current_ht_config.smps = IEEE80211_SMPS_STATIC;
2781 priv->missed_beacon_threshold = IL_MISSED_BEACON_THRESHOLD_DEF; 2781 il->missed_beacon_threshold = IL_MISSED_BEACON_THRESHOLD_DEF;
2782 2782
2783 /* initialize force reset */ 2783 /* initialize force reset */
2784 priv->force_reset.reset_duration = IL_DELAY_NEXT_FORCE_FW_RELOAD; 2784 il->force_reset.reset_duration = IL_DELAY_NEXT_FORCE_FW_RELOAD;
2785 2785
2786 /* Choose which receivers/antennas to use */ 2786 /* Choose which receivers/antennas to use */
2787 if (priv->cfg->ops->hcmd->set_rxon_chain) 2787 if (il->cfg->ops->hcmd->set_rxon_chain)
2788 priv->cfg->ops->hcmd->set_rxon_chain(priv, 2788 il->cfg->ops->hcmd->set_rxon_chain(il,
2789 &priv->contexts[IL_RXON_CTX_BSS]); 2789 &il->contexts[IL_RXON_CTX_BSS]);
2790 2790
2791 il_init_scan_params(priv); 2791 il_init_scan_params(il);
2792 2792
2793 ret = il_init_channel_map(priv); 2793 ret = il_init_channel_map(il);
2794 if (ret) { 2794 if (ret) {
2795 IL_ERR(priv, "initializing regulatory failed: %d\n", ret); 2795 IL_ERR(il, "initializing regulatory failed: %d\n", ret);
2796 goto err; 2796 goto err;
2797 } 2797 }
2798 2798
2799 ret = il_init_geos(priv); 2799 ret = il_init_geos(il);
2800 if (ret) { 2800 if (ret) {
2801 IL_ERR(priv, "initializing geos failed: %d\n", ret); 2801 IL_ERR(il, "initializing geos failed: %d\n", ret);
2802 goto err_free_channel_map; 2802 goto err_free_channel_map;
2803 } 2803 }
2804 il4965_init_hw_rates(priv, priv->ieee_rates); 2804 il4965_init_hw_rates(il, il->ieee_rates);
2805 2805
2806 return 0; 2806 return 0;
2807 2807
2808err_free_channel_map: 2808err_free_channel_map:
2809 il_free_channel_map(priv); 2809 il_free_channel_map(il);
2810err: 2810err:
2811 return ret; 2811 return ret;
2812} 2812}
2813 2813
2814static void il4965_uninit_drv(struct il_priv *priv) 2814static void il4965_uninit_drv(struct il_priv *il)
2815{ 2815{
2816 il4965_calib_free_results(priv); 2816 il4965_calib_free_results(il);
2817 il_free_geos(priv); 2817 il_free_geos(il);
2818 il_free_channel_map(priv); 2818 il_free_channel_map(il);
2819 kfree(priv->scan_cmd); 2819 kfree(il->scan_cmd);
2820} 2820}
2821 2821
2822static void il4965_hw_detect(struct il_priv *priv) 2822static void il4965_hw_detect(struct il_priv *il)
2823{ 2823{
2824 priv->hw_rev = _il_read32(priv, CSR_HW_REV); 2824 il->hw_rev = _il_read32(il, CSR_HW_REV);
2825 priv->hw_wa_rev = _il_read32(priv, CSR_HW_REV_WA_REG); 2825 il->hw_wa_rev = _il_read32(il, CSR_HW_REV_WA_REG);
2826 priv->rev_id = priv->pci_dev->revision; 2826 il->rev_id = il->pci_dev->revision;
2827 IL_DEBUG_INFO(priv, "HW Revision ID = 0x%X\n", priv->rev_id); 2827 IL_DEBUG_INFO(il, "HW Revision ID = 0x%X\n", il->rev_id);
2828} 2828}
2829 2829
2830static int il4965_set_hw_params(struct il_priv *priv) 2830static int il4965_set_hw_params(struct il_priv *il)
2831{ 2831{
2832 priv->hw_params.max_rxq_size = RX_QUEUE_SIZE; 2832 il->hw_params.max_rxq_size = RX_QUEUE_SIZE;
2833 priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG; 2833 il->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
2834 if (priv->cfg->mod_params->amsdu_size_8K) 2834 if (il->cfg->mod_params->amsdu_size_8K)
2835 priv->hw_params.rx_page_order = get_order(IL_RX_BUF_SIZE_8K); 2835 il->hw_params.rx_page_order = get_order(IL_RX_BUF_SIZE_8K);
2836 else 2836 else
2837 priv->hw_params.rx_page_order = get_order(IL_RX_BUF_SIZE_4K); 2837 il->hw_params.rx_page_order = get_order(IL_RX_BUF_SIZE_4K);
2838 2838
2839 priv->hw_params.max_beacon_itrvl = IL_MAX_UCODE_BEACON_INTERVAL; 2839 il->hw_params.max_beacon_itrvl = IL_MAX_UCODE_BEACON_INTERVAL;
2840 2840
2841 if (priv->cfg->mod_params->disable_11n) 2841 if (il->cfg->mod_params->disable_11n)
2842 priv->cfg->sku &= ~IL_SKU_N; 2842 il->cfg->sku &= ~IL_SKU_N;
2843 2843
2844 /* Device-specific setup */ 2844 /* Device-specific setup */
2845 return priv->cfg->ops->lib->set_hw_params(priv); 2845 return il->cfg->ops->lib->set_hw_params(il);
2846} 2846}
2847 2847
2848static const u8 il4965_bss_ac_to_fifo[] = { 2848static const u8 il4965_bss_ac_to_fifo[] = {
@@ -2860,7 +2860,7 @@ static int
2860il4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 2860il4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2861{ 2861{
2862 int err = 0, i; 2862 int err = 0, i;
2863 struct il_priv *priv; 2863 struct il_priv *il;
2864 struct ieee80211_hw *hw; 2864 struct ieee80211_hw *hw;
2865 struct il_cfg *cfg = (struct il_cfg *)(ent->driver_data); 2865 struct il_cfg *cfg = (struct il_cfg *)(ent->driver_data);
2866 unsigned long flags; 2866 unsigned long flags;
@@ -2875,49 +2875,49 @@ il4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2875 err = -ENOMEM; 2875 err = -ENOMEM;
2876 goto out; 2876 goto out;
2877 } 2877 }
2878 priv = hw->priv; 2878 il = hw->priv;
2879 /* At this point both hw and priv are allocated. */ 2879 /* At this point both hw and il are allocated. */
2880 2880
2881 /* 2881 /*
2882 * The default context is always valid, 2882 * The default context is always valid,
2883 * more may be discovered when firmware 2883 * more may be discovered when firmware
2884 * is loaded. 2884 * is loaded.
2885 */ 2885 */
2886 priv->valid_contexts = BIT(IL_RXON_CTX_BSS); 2886 il->valid_contexts = BIT(IL_RXON_CTX_BSS);
2887 2887
2888 for (i = 0; i < NUM_IL_RXON_CTX; i++) 2888 for (i = 0; i < NUM_IL_RXON_CTX; i++)
2889 priv->contexts[i].ctxid = i; 2889 il->contexts[i].ctxid = i;
2890 2890
2891 priv->contexts[IL_RXON_CTX_BSS].always_active = true; 2891 il->contexts[IL_RXON_CTX_BSS].always_active = true;
2892 priv->contexts[IL_RXON_CTX_BSS].is_active = true; 2892 il->contexts[IL_RXON_CTX_BSS].is_active = true;
2893 priv->contexts[IL_RXON_CTX_BSS].rxon_cmd = REPLY_RXON; 2893 il->contexts[IL_RXON_CTX_BSS].rxon_cmd = REPLY_RXON;
2894 priv->contexts[IL_RXON_CTX_BSS].rxon_timing_cmd = REPLY_RXON_TIMING; 2894 il->contexts[IL_RXON_CTX_BSS].rxon_timing_cmd = REPLY_RXON_TIMING;
2895 priv->contexts[IL_RXON_CTX_BSS].rxon_assoc_cmd = REPLY_RXON_ASSOC; 2895 il->contexts[IL_RXON_CTX_BSS].rxon_assoc_cmd = REPLY_RXON_ASSOC;
2896 priv->contexts[IL_RXON_CTX_BSS].qos_cmd = REPLY_QOS_PARAM; 2896 il->contexts[IL_RXON_CTX_BSS].qos_cmd = REPLY_QOS_PARAM;
2897 priv->contexts[IL_RXON_CTX_BSS].ap_sta_id = IL_AP_ID; 2897 il->contexts[IL_RXON_CTX_BSS].ap_sta_id = IL_AP_ID;
2898 priv->contexts[IL_RXON_CTX_BSS].wep_key_cmd = REPLY_WEPKEY; 2898 il->contexts[IL_RXON_CTX_BSS].wep_key_cmd = REPLY_WEPKEY;
2899 priv->contexts[IL_RXON_CTX_BSS].ac_to_fifo = il4965_bss_ac_to_fifo; 2899 il->contexts[IL_RXON_CTX_BSS].ac_to_fifo = il4965_bss_ac_to_fifo;
2900 priv->contexts[IL_RXON_CTX_BSS].ac_to_queue = il4965_bss_ac_to_queue; 2900 il->contexts[IL_RXON_CTX_BSS].ac_to_queue = il4965_bss_ac_to_queue;
2901 priv->contexts[IL_RXON_CTX_BSS].exclusive_interface_modes = 2901 il->contexts[IL_RXON_CTX_BSS].exclusive_interface_modes =
2902 BIT(NL80211_IFTYPE_ADHOC); 2902 BIT(NL80211_IFTYPE_ADHOC);
2903 priv->contexts[IL_RXON_CTX_BSS].interface_modes = 2903 il->contexts[IL_RXON_CTX_BSS].interface_modes =
2904 BIT(NL80211_IFTYPE_STATION); 2904 BIT(NL80211_IFTYPE_STATION);
2905 priv->contexts[IL_RXON_CTX_BSS].ap_devtype = RXON_DEV_TYPE_AP; 2905 il->contexts[IL_RXON_CTX_BSS].ap_devtype = RXON_DEV_TYPE_AP;
2906 priv->contexts[IL_RXON_CTX_BSS].ibss_devtype = RXON_DEV_TYPE_IBSS; 2906 il->contexts[IL_RXON_CTX_BSS].ibss_devtype = RXON_DEV_TYPE_IBSS;
2907 priv->contexts[IL_RXON_CTX_BSS].station_devtype = RXON_DEV_TYPE_ESS; 2907 il->contexts[IL_RXON_CTX_BSS].station_devtype = RXON_DEV_TYPE_ESS;
2908 priv->contexts[IL_RXON_CTX_BSS].unused_devtype = RXON_DEV_TYPE_ESS; 2908 il->contexts[IL_RXON_CTX_BSS].unused_devtype = RXON_DEV_TYPE_ESS;
2909 2909
2910 BUILD_BUG_ON(NUM_IL_RXON_CTX != 1); 2910 BUILD_BUG_ON(NUM_IL_RXON_CTX != 1);
2911 2911
2912 SET_IEEE80211_DEV(hw, &pdev->dev); 2912 SET_IEEE80211_DEV(hw, &pdev->dev);
2913 2913
2914 IL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n"); 2914 IL_DEBUG_INFO(il, "*** LOAD DRIVER ***\n");
2915 priv->cfg = cfg; 2915 il->cfg = cfg;
2916 priv->pci_dev = pdev; 2916 il->pci_dev = pdev;
2917 priv->inta_mask = CSR_INI_SET_MASK; 2917 il->inta_mask = CSR_INI_SET_MASK;
2918 2918
2919 if (il_alloc_traffic_mem(priv)) 2919 if (il_alloc_traffic_mem(il))
2920 IL_ERR(priv, "Not enough memory to generate traffic log\n"); 2920 IL_ERR(il, "Not enough memory to generate traffic log\n");
2921 2921
2922 /************************** 2922 /**************************
2923 * 2. Initializing PCI bus 2923 * 2. Initializing PCI bus
@@ -2942,7 +2942,7 @@ il4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2942 DMA_BIT_MASK(32)); 2942 DMA_BIT_MASK(32));
2943 /* both attempts failed: */ 2943 /* both attempts failed: */
2944 if (err) { 2944 if (err) {
2945 IL_WARN(priv, "No suitable DMA available.\n"); 2945 IL_WARN(il, "No suitable DMA available.\n");
2946 goto out_pci_disable_device; 2946 goto out_pci_disable_device;
2947 } 2947 }
2948 } 2948 }
@@ -2951,46 +2951,46 @@ il4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2951 if (err) 2951 if (err)
2952 goto out_pci_disable_device; 2952 goto out_pci_disable_device;
2953 2953
2954 pci_set_drvdata(pdev, priv); 2954 pci_set_drvdata(pdev, il);
2955 2955
2956 2956
2957 /*********************** 2957 /***********************
2958 * 3. Read REV register 2958 * 3. Read REV register
2959 ***********************/ 2959 ***********************/
2960 priv->hw_base = pci_iomap(pdev, 0, 0); 2960 il->hw_base = pci_iomap(pdev, 0, 0);
2961 if (!priv->hw_base) { 2961 if (!il->hw_base) {
2962 err = -ENODEV; 2962 err = -ENODEV;
2963 goto out_pci_release_regions; 2963 goto out_pci_release_regions;
2964 } 2964 }
2965 2965
2966 IL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n", 2966 IL_DEBUG_INFO(il, "pci_resource_len = 0x%08llx\n",
2967 (unsigned long long) pci_resource_len(pdev, 0)); 2967 (unsigned long long) pci_resource_len(pdev, 0));
2968 IL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base); 2968 IL_DEBUG_INFO(il, "pci_resource_base = %p\n", il->hw_base);
2969 2969
2970 /* these spin locks will be used in apm_ops.init and EEPROM access 2970 /* these spin locks will be used in apm_ops.init and EEPROM access
2971 * we should init now 2971 * we should init now
2972 */ 2972 */
2973 spin_lock_init(&priv->reg_lock); 2973 spin_lock_init(&il->reg_lock);
2974 spin_lock_init(&priv->lock); 2974 spin_lock_init(&il->lock);
2975 2975
2976 /* 2976 /*
2977 * stop and reset the on-board processor just in case it is in a 2977 * stop and reset the on-board processor just in case it is in a
2978 * strange state ... like being left stranded by a primary kernel 2978 * strange state ... like being left stranded by a primary kernel
2979 * and this is now the kdump kernel trying to start up 2979 * and this is now the kdump kernel trying to start up
2980 */ 2980 */
2981 il_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET); 2981 il_write32(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2982 2982
2983 il4965_hw_detect(priv); 2983 il4965_hw_detect(il);
2984 IL_INFO(priv, "Detected %s, REV=0x%X\n", 2984 IL_INFO(il, "Detected %s, REV=0x%X\n",
2985 priv->cfg->name, priv->hw_rev); 2985 il->cfg->name, il->hw_rev);
2986 2986
2987 /* We disable the RETRY_TIMEOUT register (0x41) to keep 2987 /* We disable the RETRY_TIMEOUT register (0x41) to keep
2988 * PCI Tx retries from interfering with C3 CPU state */ 2988 * PCI Tx retries from interfering with C3 CPU state */
2989 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00); 2989 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
2990 2990
2991 il4965_prepare_card_hw(priv); 2991 il4965_prepare_card_hw(il);
2992 if (!priv->hw_ready) { 2992 if (!il->hw_ready) {
2993 IL_WARN(priv, "Failed, HW not ready\n"); 2993 IL_WARN(il, "Failed, HW not ready\n");
2994 goto out_iounmap; 2994 goto out_iounmap;
2995 } 2995 }
2996 2996
@@ -2998,12 +2998,12 @@ il4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2998 * 4. Read EEPROM 2998 * 4. Read EEPROM
2999 *****************/ 2999 *****************/
3000 /* Read the EEPROM */ 3000 /* Read the EEPROM */
3001 err = il_eeprom_init(priv); 3001 err = il_eeprom_init(il);
3002 if (err) { 3002 if (err) {
3003 IL_ERR(priv, "Unable to init EEPROM\n"); 3003 IL_ERR(il, "Unable to init EEPROM\n");
3004 goto out_iounmap; 3004 goto out_iounmap;
3005 } 3005 }
3006 err = il4965_eeprom_check_version(priv); 3006 err = il4965_eeprom_check_version(il);
3007 if (err) 3007 if (err)
3008 goto out_free_eeprom; 3008 goto out_free_eeprom;
3009 3009
@@ -3011,131 +3011,131 @@ il4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3011 goto out_free_eeprom; 3011 goto out_free_eeprom;
3012 3012
3013 /* extract MAC Address */ 3013 /* extract MAC Address */
3014 il4965_eeprom_get_mac(priv, priv->addresses[0].addr); 3014 il4965_eeprom_get_mac(il, il->addresses[0].addr);
3015 IL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->addresses[0].addr); 3015 IL_DEBUG_INFO(il, "MAC address: %pM\n", il->addresses[0].addr);
3016 priv->hw->wiphy->addresses = priv->addresses; 3016 il->hw->wiphy->addresses = il->addresses;
3017 priv->hw->wiphy->n_addresses = 1; 3017 il->hw->wiphy->n_addresses = 1;
3018 3018
3019 /************************ 3019 /************************
3020 * 5. Setup HW constants 3020 * 5. Setup HW constants
3021 ************************/ 3021 ************************/
3022 if (il4965_set_hw_params(priv)) { 3022 if (il4965_set_hw_params(il)) {
3023 IL_ERR(priv, "failed to set hw parameters\n"); 3023 IL_ERR(il, "failed to set hw parameters\n");
3024 goto out_free_eeprom; 3024 goto out_free_eeprom;
3025 } 3025 }
3026 3026
3027 /******************* 3027 /*******************
3028 * 6. Setup priv 3028 * 6. Setup il
3029 *******************/ 3029 *******************/
3030 3030
3031 err = il4965_init_drv(priv); 3031 err = il4965_init_drv(il);
3032 if (err) 3032 if (err)
3033 goto out_free_eeprom; 3033 goto out_free_eeprom;
3034 /* At this point both hw and priv are initialized. */ 3034 /* At this point both hw and il are initialized. */
3035 3035
3036 /******************** 3036 /********************
3037 * 7. Setup services 3037 * 7. Setup services
3038 ********************/ 3038 ********************/
3039 spin_lock_irqsave(&priv->lock, flags); 3039 spin_lock_irqsave(&il->lock, flags);
3040 il_disable_interrupts(priv); 3040 il_disable_interrupts(il);
3041 spin_unlock_irqrestore(&priv->lock, flags); 3041 spin_unlock_irqrestore(&il->lock, flags);
3042 3042
3043 pci_enable_msi(priv->pci_dev); 3043 pci_enable_msi(il->pci_dev);
3044 3044
3045 err = request_irq(priv->pci_dev->irq, il_isr, 3045 err = request_irq(il->pci_dev->irq, il_isr,
3046 IRQF_SHARED, DRV_NAME, priv); 3046 IRQF_SHARED, DRV_NAME, il);
3047 if (err) { 3047 if (err) {
3048 IL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq); 3048 IL_ERR(il, "Error allocating IRQ %d\n", il->pci_dev->irq);
3049 goto out_disable_msi; 3049 goto out_disable_msi;
3050 } 3050 }
3051 3051
3052 il4965_setup_deferred_work(priv); 3052 il4965_setup_deferred_work(il);
3053 il4965_setup_rx_handlers(priv); 3053 il4965_setup_rx_handlers(il);
3054 3054
3055 /********************************************* 3055 /*********************************************
3056 * 8. Enable interrupts and read RFKILL state 3056 * 8. Enable interrupts and read RFKILL state
3057 *********************************************/ 3057 *********************************************/
3058 3058
3059 /* enable rfkill interrupt: hw bug w/a */ 3059 /* enable rfkill interrupt: hw bug w/a */
3060 pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd); 3060 pci_read_config_word(il->pci_dev, PCI_COMMAND, &pci_cmd);
3061 if (pci_cmd & PCI_COMMAND_INTX_DISABLE) { 3061 if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
3062 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE; 3062 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
3063 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd); 3063 pci_write_config_word(il->pci_dev, PCI_COMMAND, pci_cmd);
3064 } 3064 }
3065 3065
3066 il_enable_rfkill_int(priv); 3066 il_enable_rfkill_int(il);
3067 3067
3068 /* If platform's RF_KILL switch is NOT set to KILL */ 3068 /* If platform's RF_KILL switch is NOT set to KILL */
3069 if (il_read32(priv, CSR_GP_CNTRL) & 3069 if (il_read32(il, CSR_GP_CNTRL) &
3070 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW) 3070 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3071 clear_bit(STATUS_RF_KILL_HW, &priv->status); 3071 clear_bit(STATUS_RF_KILL_HW, &il->status);
3072 else 3072 else
3073 set_bit(STATUS_RF_KILL_HW, &priv->status); 3073 set_bit(STATUS_RF_KILL_HW, &il->status);
3074 3074
3075 wiphy_rfkill_set_hw_state(priv->hw->wiphy, 3075 wiphy_rfkill_set_hw_state(il->hw->wiphy,
3076 test_bit(STATUS_RF_KILL_HW, &priv->status)); 3076 test_bit(STATUS_RF_KILL_HW, &il->status));
3077 3077
3078 il_power_initialize(priv); 3078 il_power_initialize(il);
3079 3079
3080 init_completion(&priv->_4965.firmware_loading_complete); 3080 init_completion(&il->_4965.firmware_loading_complete);
3081 3081
3082 err = il4965_request_firmware(priv, true); 3082 err = il4965_request_firmware(il, true);
3083 if (err) 3083 if (err)
3084 goto out_destroy_workqueue; 3084 goto out_destroy_workqueue;
3085 3085
3086 return 0; 3086 return 0;
3087 3087
3088 out_destroy_workqueue: 3088 out_destroy_workqueue:
3089 destroy_workqueue(priv->workqueue); 3089 destroy_workqueue(il->workqueue);
3090 priv->workqueue = NULL; 3090 il->workqueue = NULL;
3091 free_irq(priv->pci_dev->irq, priv); 3091 free_irq(il->pci_dev->irq, il);
3092 out_disable_msi: 3092 out_disable_msi:
3093 pci_disable_msi(priv->pci_dev); 3093 pci_disable_msi(il->pci_dev);
3094 il4965_uninit_drv(priv); 3094 il4965_uninit_drv(il);
3095 out_free_eeprom: 3095 out_free_eeprom:
3096 il_eeprom_free(priv); 3096 il_eeprom_free(il);
3097 out_iounmap: 3097 out_iounmap:
3098 pci_iounmap(pdev, priv->hw_base); 3098 pci_iounmap(pdev, il->hw_base);
3099 out_pci_release_regions: 3099 out_pci_release_regions:
3100 pci_set_drvdata(pdev, NULL); 3100 pci_set_drvdata(pdev, NULL);
3101 pci_release_regions(pdev); 3101 pci_release_regions(pdev);
3102 out_pci_disable_device: 3102 out_pci_disable_device:
3103 pci_disable_device(pdev); 3103 pci_disable_device(pdev);
3104 out_ieee80211_free_hw: 3104 out_ieee80211_free_hw:
3105 il_free_traffic_mem(priv); 3105 il_free_traffic_mem(il);
3106 ieee80211_free_hw(priv->hw); 3106 ieee80211_free_hw(il->hw);
3107 out: 3107 out:
3108 return err; 3108 return err;
3109} 3109}
3110 3110
3111static void __devexit il4965_pci_remove(struct pci_dev *pdev) 3111static void __devexit il4965_pci_remove(struct pci_dev *pdev)
3112{ 3112{
3113 struct il_priv *priv = pci_get_drvdata(pdev); 3113 struct il_priv *il = pci_get_drvdata(pdev);
3114 unsigned long flags; 3114 unsigned long flags;
3115 3115
3116 if (!priv) 3116 if (!il)
3117 return; 3117 return;
3118 3118
3119 wait_for_completion(&priv->_4965.firmware_loading_complete); 3119 wait_for_completion(&il->_4965.firmware_loading_complete);
3120 3120
3121 IL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n"); 3121 IL_DEBUG_INFO(il, "*** UNLOAD DRIVER ***\n");
3122 3122
3123 il_dbgfs_unregister(priv); 3123 il_dbgfs_unregister(il);
3124 sysfs_remove_group(&pdev->dev.kobj, &il_attribute_group); 3124 sysfs_remove_group(&pdev->dev.kobj, &il_attribute_group);
3125 3125
3126 /* ieee80211_unregister_hw call wil cause il_mac_stop to 3126 /* ieee80211_unregister_hw call wil cause il_mac_stop to
3127 * to be called and il4965_down since we are removing the device 3127 * to be called and il4965_down since we are removing the device
3128 * we need to set STATUS_EXIT_PENDING bit. 3128 * we need to set STATUS_EXIT_PENDING bit.
3129 */ 3129 */
3130 set_bit(STATUS_EXIT_PENDING, &priv->status); 3130 set_bit(STATUS_EXIT_PENDING, &il->status);
3131 3131
3132 il_leds_exit(priv); 3132 il_leds_exit(il);
3133 3133
3134 if (priv->mac80211_registered) { 3134 if (il->mac80211_registered) {
3135 ieee80211_unregister_hw(priv->hw); 3135 ieee80211_unregister_hw(il->hw);
3136 priv->mac80211_registered = 0; 3136 il->mac80211_registered = 0;
3137 } else { 3137 } else {
3138 il4965_down(priv); 3138 il4965_down(il);
3139 } 3139 }
3140 3140
3141 /* 3141 /*
@@ -3145,57 +3145,57 @@ static void __devexit il4965_pci_remove(struct pci_dev *pdev)
3145 * paths to avoid running il4965_down() at all before leaving driver. 3145 * paths to avoid running il4965_down() at all before leaving driver.
3146 * This (inexpensive) call *makes sure* device is reset. 3146 * This (inexpensive) call *makes sure* device is reset.
3147 */ 3147 */
3148 il_apm_stop(priv); 3148 il_apm_stop(il);
3149 3149
3150 /* make sure we flush any pending irq or 3150 /* make sure we flush any pending irq or
3151 * tasklet for the driver 3151 * tasklet for the driver
3152 */ 3152 */
3153 spin_lock_irqsave(&priv->lock, flags); 3153 spin_lock_irqsave(&il->lock, flags);
3154 il_disable_interrupts(priv); 3154 il_disable_interrupts(il);
3155 spin_unlock_irqrestore(&priv->lock, flags); 3155 spin_unlock_irqrestore(&il->lock, flags);
3156 3156
3157 il4965_synchronize_irq(priv); 3157 il4965_synchronize_irq(il);
3158 3158
3159 il4965_dealloc_ucode_pci(priv); 3159 il4965_dealloc_ucode_pci(il);
3160 3160
3161 if (priv->rxq.bd) 3161 if (il->rxq.bd)
3162 il4965_rx_queue_free(priv, &priv->rxq); 3162 il4965_rx_queue_free(il, &il->rxq);
3163 il4965_hw_txq_ctx_free(priv); 3163 il4965_hw_txq_ctx_free(il);
3164 3164
3165 il_eeprom_free(priv); 3165 il_eeprom_free(il);
3166 3166
3167 3167
3168 /*netif_stop_queue(dev); */ 3168 /*netif_stop_queue(dev); */
3169 flush_workqueue(priv->workqueue); 3169 flush_workqueue(il->workqueue);
3170 3170
3171 /* ieee80211_unregister_hw calls il_mac_stop, which flushes 3171 /* ieee80211_unregister_hw calls il_mac_stop, which flushes
3172 * priv->workqueue... so we can't take down the workqueue 3172 * il->workqueue... so we can't take down the workqueue
3173 * until now... */ 3173 * until now... */
3174 destroy_workqueue(priv->workqueue); 3174 destroy_workqueue(il->workqueue);
3175 priv->workqueue = NULL; 3175 il->workqueue = NULL;
3176 il_free_traffic_mem(priv); 3176 il_free_traffic_mem(il);
3177 3177
3178 free_irq(priv->pci_dev->irq, priv); 3178 free_irq(il->pci_dev->irq, il);
3179 pci_disable_msi(priv->pci_dev); 3179 pci_disable_msi(il->pci_dev);
3180 pci_iounmap(pdev, priv->hw_base); 3180 pci_iounmap(pdev, il->hw_base);
3181 pci_release_regions(pdev); 3181 pci_release_regions(pdev);
3182 pci_disable_device(pdev); 3182 pci_disable_device(pdev);
3183 pci_set_drvdata(pdev, NULL); 3183 pci_set_drvdata(pdev, NULL);
3184 3184
3185 il4965_uninit_drv(priv); 3185 il4965_uninit_drv(il);
3186 3186
3187 dev_kfree_skb(priv->beacon_skb); 3187 dev_kfree_skb(il->beacon_skb);
3188 3188
3189 ieee80211_free_hw(priv->hw); 3189 ieee80211_free_hw(il->hw);
3190} 3190}
3191 3191
3192/* 3192/*
3193 * Activate/Deactivate Tx DMA/FIFO channels according tx fifos mask 3193 * Activate/Deactivate Tx DMA/FIFO channels according tx fifos mask
3194 * must be called under priv->lock and mac access 3194 * must be called under il->lock and mac access
3195 */ 3195 */
3196void il4965_txq_set_sched(struct il_priv *priv, u32 mask) 3196void il4965_txq_set_sched(struct il_priv *il, u32 mask)
3197{ 3197{
3198 il_write_prph(priv, IWL49_SCD_TXFACT, mask); 3198 il_write_prph(il, IWL49_SCD_TXFACT, mask);
3199} 3199}
3200 3200
3201/***************************************************************************** 3201/*****************************************************************************
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-26 00:51:30 -0500