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authorStanislaw Gruszka <sgruszka@redhat.com>2011-11-15 06:40:26 -0500
committerStanislaw Gruszka <sgruszka@redhat.com>2011-11-15 06:40:26 -0500
commit61fe55f61fb48b691251e0f75505674db77f5d29 (patch)
treef5ba365b65007a94a8c197b8ec0ab978ebe00161 /drivers/net/wireless/iwlegacy/3945-mac.c
parent17d6e557359e0a4033bf0889e0b481519e145404 (diff)
iwlegacy: rename base 4965 and 3945 file names
Signed-off-by: Stanislaw Gruszka <sgruszka@redhat.com>
Diffstat (limited to 'drivers/net/wireless/iwlegacy/3945-mac.c')
-rw-r--r--drivers/net/wireless/iwlegacy/3945-mac.c4007
1 files changed, 4007 insertions, 0 deletions
diff --git a/drivers/net/wireless/iwlegacy/3945-mac.c b/drivers/net/wireless/iwlegacy/3945-mac.c
new file mode 100644
index 000000000000..151c8faa18dd
--- /dev/null
+++ b/drivers/net/wireless/iwlegacy/3945-mac.c
@@ -0,0 +1,4007 @@
1/******************************************************************************
2 *
3 * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
30#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
31
32#include <linux/kernel.h>
33#include <linux/module.h>
34#include <linux/init.h>
35#include <linux/pci.h>
36#include <linux/pci-aspm.h>
37#include <linux/slab.h>
38#include <linux/dma-mapping.h>
39#include <linux/delay.h>
40#include <linux/sched.h>
41#include <linux/skbuff.h>
42#include <linux/netdevice.h>
43#include <linux/firmware.h>
44#include <linux/etherdevice.h>
45#include <linux/if_arp.h>
46
47#include <net/ieee80211_radiotap.h>
48#include <net/mac80211.h>
49
50#include <asm/div64.h>
51
52#define DRV_NAME "iwl3945"
53
54#include "iwl-fh.h"
55#include "iwl-3945-fh.h"
56#include "iwl-commands.h"
57#include "iwl-sta.h"
58#include "iwl-3945.h"
59#include "iwl-core.h"
60#include "iwl-helpers.h"
61#include "iwl-dev.h"
62#include "iwl-spectrum.h"
63
64/*
65 * module name, copyright, version, etc.
66 */
67
68#define DRV_DESCRIPTION \
69"Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
70
71#ifdef CONFIG_IWLEGACY_DEBUG
72#define VD "d"
73#else
74#define VD
75#endif
76
77/*
78 * add "s" to indicate spectrum measurement included.
79 * we add it here to be consistent with previous releases in which
80 * this was configurable.
81 */
82#define DRV_VERSION IWLWIFI_VERSION VD "s"
83#define DRV_COPYRIGHT "Copyright(c) 2003-2011 Intel Corporation"
84#define DRV_AUTHOR "<ilw@linux.intel.com>"
85
86MODULE_DESCRIPTION(DRV_DESCRIPTION);
87MODULE_VERSION(DRV_VERSION);
88MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
89MODULE_LICENSE("GPL");
90
91 /* module parameters */
92struct il_mod_params il3945_mod_params = {
93 .sw_crypto = 1,
94 .restart_fw = 1,
95 .disable_hw_scan = 1,
96 /* the rest are 0 by default */
97};
98
99/**
100 * il3945_get_antenna_flags - Get antenna flags for RXON command
101 * @il: eeprom and antenna fields are used to determine antenna flags
102 *
103 * il->eeprom39 is used to determine if antenna AUX/MAIN are reversed
104 * il3945_mod_params.antenna specifies the antenna diversity mode:
105 *
106 * IL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
107 * IL_ANTENNA_MAIN - Force MAIN antenna
108 * IL_ANTENNA_AUX - Force AUX antenna
109 */
110__le32 il3945_get_antenna_flags(const struct il_priv *il)
111{
112 struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
113
114 switch (il3945_mod_params.antenna) {
115 case IL_ANTENNA_DIVERSITY:
116 return 0;
117
118 case IL_ANTENNA_MAIN:
119 if (eeprom->antenna_switch_type)
120 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
121 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
122
123 case IL_ANTENNA_AUX:
124 if (eeprom->antenna_switch_type)
125 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
126 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
127 }
128
129 /* bad antenna selector value */
130 IL_ERR("Bad antenna selector value (0x%x)\n",
131 il3945_mod_params.antenna);
132
133 return 0; /* "diversity" is default if error */
134}
135
136static int il3945_set_ccmp_dynamic_key_info(struct il_priv *il,
137 struct ieee80211_key_conf *keyconf,
138 u8 sta_id)
139{
140 unsigned long flags;
141 __le16 key_flags = 0;
142 int ret;
143
144 key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
145 key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
146
147 if (sta_id == il->ctx.bcast_sta_id)
148 key_flags |= STA_KEY_MULTICAST_MSK;
149
150 keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
151 keyconf->hw_key_idx = keyconf->keyidx;
152 key_flags &= ~STA_KEY_FLG_INVALID;
153
154 spin_lock_irqsave(&il->sta_lock, flags);
155 il->stations[sta_id].keyinfo.cipher = keyconf->cipher;
156 il->stations[sta_id].keyinfo.keylen = keyconf->keylen;
157 memcpy(il->stations[sta_id].keyinfo.key, keyconf->key,
158 keyconf->keylen);
159
160 memcpy(il->stations[sta_id].sta.key.key, keyconf->key,
161 keyconf->keylen);
162
163 if ((il->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK)
164 == STA_KEY_FLG_NO_ENC)
165 il->stations[sta_id].sta.key.key_offset =
166 il_get_free_ucode_key_idx(il);
167 /* else, we are overriding an existing key => no need to allocated room
168 * in uCode. */
169
170 WARN(il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
171 "no space for a new key");
172
173 il->stations[sta_id].sta.key.key_flags = key_flags;
174 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
175 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
176
177 D_INFO("hwcrypto: modify ucode station key info\n");
178
179 ret = il_send_add_sta(il,
180 &il->stations[sta_id].sta, CMD_ASYNC);
181
182 spin_unlock_irqrestore(&il->sta_lock, flags);
183
184 return ret;
185}
186
187static int il3945_set_tkip_dynamic_key_info(struct il_priv *il,
188 struct ieee80211_key_conf *keyconf,
189 u8 sta_id)
190{
191 return -EOPNOTSUPP;
192}
193
194static int il3945_set_wep_dynamic_key_info(struct il_priv *il,
195 struct ieee80211_key_conf *keyconf,
196 u8 sta_id)
197{
198 return -EOPNOTSUPP;
199}
200
201static int il3945_clear_sta_key_info(struct il_priv *il, u8 sta_id)
202{
203 unsigned long flags;
204 struct il_addsta_cmd sta_cmd;
205
206 spin_lock_irqsave(&il->sta_lock, flags);
207 memset(&il->stations[sta_id].keyinfo, 0, sizeof(struct il_hw_key));
208 memset(&il->stations[sta_id].sta.key, 0,
209 sizeof(struct il4965_keyinfo));
210 il->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
211 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
212 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
213 memcpy(&sta_cmd, &il->stations[sta_id].sta, sizeof(struct il_addsta_cmd));
214 spin_unlock_irqrestore(&il->sta_lock, flags);
215
216 D_INFO("hwcrypto: clear ucode station key info\n");
217 return il_send_add_sta(il, &sta_cmd, CMD_SYNC);
218}
219
220static int il3945_set_dynamic_key(struct il_priv *il,
221 struct ieee80211_key_conf *keyconf, u8 sta_id)
222{
223 int ret = 0;
224
225 keyconf->hw_key_idx = HW_KEY_DYNAMIC;
226
227 switch (keyconf->cipher) {
228 case WLAN_CIPHER_SUITE_CCMP:
229 ret = il3945_set_ccmp_dynamic_key_info(il, keyconf, sta_id);
230 break;
231 case WLAN_CIPHER_SUITE_TKIP:
232 ret = il3945_set_tkip_dynamic_key_info(il, keyconf, sta_id);
233 break;
234 case WLAN_CIPHER_SUITE_WEP40:
235 case WLAN_CIPHER_SUITE_WEP104:
236 ret = il3945_set_wep_dynamic_key_info(il, keyconf, sta_id);
237 break;
238 default:
239 IL_ERR("Unknown alg: %s alg=%x\n", __func__,
240 keyconf->cipher);
241 ret = -EINVAL;
242 }
243
244 D_WEP("Set dynamic key: alg=%x len=%d idx=%d sta=%d ret=%d\n",
245 keyconf->cipher, keyconf->keylen, keyconf->keyidx,
246 sta_id, ret);
247
248 return ret;
249}
250
251static int il3945_remove_static_key(struct il_priv *il)
252{
253 int ret = -EOPNOTSUPP;
254
255 return ret;
256}
257
258static int il3945_set_static_key(struct il_priv *il,
259 struct ieee80211_key_conf *key)
260{
261 if (key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
262 key->cipher == WLAN_CIPHER_SUITE_WEP104)
263 return -EOPNOTSUPP;
264
265 IL_ERR("Static key invalid: cipher %x\n", key->cipher);
266 return -EINVAL;
267}
268
269static void il3945_clear_free_frames(struct il_priv *il)
270{
271 struct list_head *element;
272
273 D_INFO("%d frames on pre-allocated heap on clear.\n",
274 il->frames_count);
275
276 while (!list_empty(&il->free_frames)) {
277 element = il->free_frames.next;
278 list_del(element);
279 kfree(list_entry(element, struct il3945_frame, list));
280 il->frames_count--;
281 }
282
283 if (il->frames_count) {
284 IL_WARN("%d frames still in use. Did we lose one?\n",
285 il->frames_count);
286 il->frames_count = 0;
287 }
288}
289
290static struct il3945_frame *il3945_get_free_frame(struct il_priv *il)
291{
292 struct il3945_frame *frame;
293 struct list_head *element;
294 if (list_empty(&il->free_frames)) {
295 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
296 if (!frame) {
297 IL_ERR("Could not allocate frame!\n");
298 return NULL;
299 }
300
301 il->frames_count++;
302 return frame;
303 }
304
305 element = il->free_frames.next;
306 list_del(element);
307 return list_entry(element, struct il3945_frame, list);
308}
309
310static void il3945_free_frame(struct il_priv *il, struct il3945_frame *frame)
311{
312 memset(frame, 0, sizeof(*frame));
313 list_add(&frame->list, &il->free_frames);
314}
315
316unsigned int il3945_fill_beacon_frame(struct il_priv *il,
317 struct ieee80211_hdr *hdr,
318 int left)
319{
320
321 if (!il_is_associated(il) || !il->beacon_skb)
322 return 0;
323
324 if (il->beacon_skb->len > left)
325 return 0;
326
327 memcpy(hdr, il->beacon_skb->data, il->beacon_skb->len);
328
329 return il->beacon_skb->len;
330}
331
332static int il3945_send_beacon_cmd(struct il_priv *il)
333{
334 struct il3945_frame *frame;
335 unsigned int frame_size;
336 int rc;
337 u8 rate;
338
339 frame = il3945_get_free_frame(il);
340
341 if (!frame) {
342 IL_ERR("Could not obtain free frame buffer for beacon "
343 "command.\n");
344 return -ENOMEM;
345 }
346
347 rate = il_get_lowest_plcp(il,
348 &il->ctx);
349
350 frame_size = il3945_hw_get_beacon_cmd(il, frame, rate);
351
352 rc = il_send_cmd_pdu(il, REPLY_TX_BEACON, frame_size,
353 &frame->u.cmd[0]);
354
355 il3945_free_frame(il, frame);
356
357 return rc;
358}
359
360static void il3945_unset_hw_params(struct il_priv *il)
361{
362 if (il->_3945.shared_virt)
363 dma_free_coherent(&il->pci_dev->dev,
364 sizeof(struct il3945_shared),
365 il->_3945.shared_virt,
366 il->_3945.shared_phys);
367}
368
369static void il3945_build_tx_cmd_hwcrypto(struct il_priv *il,
370 struct ieee80211_tx_info *info,
371 struct il_device_cmd *cmd,
372 struct sk_buff *skb_frag,
373 int sta_id)
374{
375 struct il3945_tx_cmd *tx_cmd = (struct il3945_tx_cmd *)cmd->cmd.payload;
376 struct il_hw_key *keyinfo = &il->stations[sta_id].keyinfo;
377
378 tx_cmd->sec_ctl = 0;
379
380 switch (keyinfo->cipher) {
381 case WLAN_CIPHER_SUITE_CCMP:
382 tx_cmd->sec_ctl = TX_CMD_SEC_CCM;
383 memcpy(tx_cmd->key, keyinfo->key, keyinfo->keylen);
384 D_TX("tx_cmd with AES hwcrypto\n");
385 break;
386
387 case WLAN_CIPHER_SUITE_TKIP:
388 break;
389
390 case WLAN_CIPHER_SUITE_WEP104:
391 tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128;
392 /* fall through */
393 case WLAN_CIPHER_SUITE_WEP40:
394 tx_cmd->sec_ctl |= TX_CMD_SEC_WEP |
395 (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
396
397 memcpy(&tx_cmd->key[3], keyinfo->key, keyinfo->keylen);
398
399 D_TX("Configuring packet for WEP encryption "
400 "with key %d\n", info->control.hw_key->hw_key_idx);
401 break;
402
403 default:
404 IL_ERR("Unknown encode cipher %x\n", keyinfo->cipher);
405 break;
406 }
407}
408
409/*
410 * handle build REPLY_TX command notification.
411 */
412static void il3945_build_tx_cmd_basic(struct il_priv *il,
413 struct il_device_cmd *cmd,
414 struct ieee80211_tx_info *info,
415 struct ieee80211_hdr *hdr, u8 std_id)
416{
417 struct il3945_tx_cmd *tx_cmd = (struct il3945_tx_cmd *)cmd->cmd.payload;
418 __le32 tx_flags = tx_cmd->tx_flags;
419 __le16 fc = hdr->frame_control;
420
421 tx_cmd->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
422 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
423 tx_flags |= TX_CMD_FLG_ACK_MSK;
424 if (ieee80211_is_mgmt(fc))
425 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
426 if (ieee80211_is_probe_resp(fc) &&
427 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
428 tx_flags |= TX_CMD_FLG_TSF_MSK;
429 } else {
430 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
431 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
432 }
433
434 tx_cmd->sta_id = std_id;
435 if (ieee80211_has_morefrags(fc))
436 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
437
438 if (ieee80211_is_data_qos(fc)) {
439 u8 *qc = ieee80211_get_qos_ctl(hdr);
440 tx_cmd->tid_tspec = qc[0] & 0xf;
441 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
442 } else {
443 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
444 }
445
446 il_tx_cmd_protection(il, info, fc, &tx_flags);
447
448 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
449 if (ieee80211_is_mgmt(fc)) {
450 if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
451 tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(3);
452 else
453 tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(2);
454 } else {
455 tx_cmd->timeout.pm_frame_timeout = 0;
456 }
457
458 tx_cmd->driver_txop = 0;
459 tx_cmd->tx_flags = tx_flags;
460 tx_cmd->next_frame_len = 0;
461}
462
463/*
464 * start REPLY_TX command process
465 */
466static int il3945_tx_skb(struct il_priv *il, struct sk_buff *skb)
467{
468 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
469 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
470 struct il3945_tx_cmd *tx_cmd;
471 struct il_tx_queue *txq = NULL;
472 struct il_queue *q = NULL;
473 struct il_device_cmd *out_cmd;
474 struct il_cmd_meta *out_meta;
475 dma_addr_t phys_addr;
476 dma_addr_t txcmd_phys;
477 int txq_id = skb_get_queue_mapping(skb);
478 u16 len, idx, hdr_len;
479 u8 id;
480 u8 unicast;
481 u8 sta_id;
482 u8 tid = 0;
483 __le16 fc;
484 u8 wait_write_ptr = 0;
485 unsigned long flags;
486
487 spin_lock_irqsave(&il->lock, flags);
488 if (il_is_rfkill(il)) {
489 D_DROP("Dropping - RF KILL\n");
490 goto drop_unlock;
491 }
492
493 if ((ieee80211_get_tx_rate(il->hw, info)->hw_value & 0xFF) == IL_INVALID_RATE) {
494 IL_ERR("ERROR: No TX rate available.\n");
495 goto drop_unlock;
496 }
497
498 unicast = !is_multicast_ether_addr(hdr->addr1);
499 id = 0;
500
501 fc = hdr->frame_control;
502
503#ifdef CONFIG_IWLEGACY_DEBUG
504 if (ieee80211_is_auth(fc))
505 D_TX("Sending AUTH frame\n");
506 else if (ieee80211_is_assoc_req(fc))
507 D_TX("Sending ASSOC frame\n");
508 else if (ieee80211_is_reassoc_req(fc))
509 D_TX("Sending REASSOC frame\n");
510#endif
511
512 spin_unlock_irqrestore(&il->lock, flags);
513
514 hdr_len = ieee80211_hdrlen(fc);
515
516 /* Find idx into station table for destination station */
517 sta_id = il_sta_id_or_broadcast(
518 il, &il->ctx,
519 info->control.sta);
520 if (sta_id == IL_INVALID_STATION) {
521 D_DROP("Dropping - INVALID STATION: %pM\n",
522 hdr->addr1);
523 goto drop;
524 }
525
526 D_RATE("station Id %d\n", sta_id);
527
528 if (ieee80211_is_data_qos(fc)) {
529 u8 *qc = ieee80211_get_qos_ctl(hdr);
530 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
531 if (unlikely(tid >= MAX_TID_COUNT))
532 goto drop;
533 }
534
535 /* Descriptor for chosen Tx queue */
536 txq = &il->txq[txq_id];
537 q = &txq->q;
538
539 if ((il_queue_space(q) < q->high_mark))
540 goto drop;
541
542 spin_lock_irqsave(&il->lock, flags);
543
544 idx = il_get_cmd_idx(q, q->write_ptr, 0);
545
546 /* Set up driver data for this TFD */
547 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct il_tx_info));
548 txq->txb[q->write_ptr].skb = skb;
549 txq->txb[q->write_ptr].ctx = &il->ctx;
550
551 /* Init first empty entry in queue's array of Tx/cmd buffers */
552 out_cmd = txq->cmd[idx];
553 out_meta = &txq->meta[idx];
554 tx_cmd = (struct il3945_tx_cmd *)out_cmd->cmd.payload;
555 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
556 memset(tx_cmd, 0, sizeof(*tx_cmd));
557
558 /*
559 * Set up the Tx-command (not MAC!) header.
560 * Store the chosen Tx queue and TFD idx within the sequence field;
561 * after Tx, uCode's Tx response will return this value so driver can
562 * locate the frame within the tx queue and do post-tx processing.
563 */
564 out_cmd->hdr.cmd = REPLY_TX;
565 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
566 IDX_TO_SEQ(q->write_ptr)));
567
568 /* Copy MAC header from skb into command buffer */
569 memcpy(tx_cmd->hdr, hdr, hdr_len);
570
571
572 if (info->control.hw_key)
573 il3945_build_tx_cmd_hwcrypto(il, info, out_cmd, skb, sta_id);
574
575 /* TODO need this for burst mode later on */
576 il3945_build_tx_cmd_basic(il, out_cmd, info, hdr, sta_id);
577
578 /* set is_hcca to 0; it probably will never be implemented */
579 il3945_hw_build_tx_cmd_rate(il, out_cmd, info, hdr, sta_id, 0);
580
581 /* Total # bytes to be transmitted */
582 len = (u16)skb->len;
583 tx_cmd->len = cpu_to_le16(len);
584
585 il_dbg_log_tx_data_frame(il, len, hdr);
586 il_update_stats(il, true, fc, len);
587 tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
588 tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
589
590 if (!ieee80211_has_morefrags(hdr->frame_control)) {
591 txq->need_update = 1;
592 } else {
593 wait_write_ptr = 1;
594 txq->need_update = 0;
595 }
596
597 D_TX("sequence nr = 0X%x\n",
598 le16_to_cpu(out_cmd->hdr.sequence));
599 D_TX("tx_flags = 0X%x\n", le32_to_cpu(tx_cmd->tx_flags));
600 il_print_hex_dump(il, IL_DL_TX, tx_cmd, sizeof(*tx_cmd));
601 il_print_hex_dump(il, IL_DL_TX, (u8 *)tx_cmd->hdr,
602 ieee80211_hdrlen(fc));
603
604 /*
605 * Use the first empty entry in this queue's command buffer array
606 * to contain the Tx command and MAC header concatenated together
607 * (payload data will be in another buffer).
608 * Size of this varies, due to varying MAC header length.
609 * If end is not dword aligned, we'll have 2 extra bytes at the end
610 * of the MAC header (device reads on dword boundaries).
611 * We'll tell device about this padding later.
612 */
613 len = sizeof(struct il3945_tx_cmd) +
614 sizeof(struct il_cmd_header) + hdr_len;
615 len = (len + 3) & ~3;
616
617 /* Physical address of this Tx command's header (not MAC header!),
618 * within command buffer array. */
619 txcmd_phys = pci_map_single(il->pci_dev, &out_cmd->hdr,
620 len, PCI_DMA_TODEVICE);
621 /* we do not map meta data ... so we can safely access address to
622 * provide to unmap command*/
623 dma_unmap_addr_set(out_meta, mapping, txcmd_phys);
624 dma_unmap_len_set(out_meta, len, len);
625
626 /* Add buffer containing Tx command and MAC(!) header to TFD's
627 * first entry */
628 il->cfg->ops->lib->txq_attach_buf_to_tfd(il, txq,
629 txcmd_phys, len, 1, 0);
630
631
632 /* Set up TFD's 2nd entry to point directly to remainder of skb,
633 * if any (802.11 null frames have no payload). */
634 len = skb->len - hdr_len;
635 if (len) {
636 phys_addr = pci_map_single(il->pci_dev, skb->data + hdr_len,
637 len, PCI_DMA_TODEVICE);
638 il->cfg->ops->lib->txq_attach_buf_to_tfd(il, txq,
639 phys_addr, len,
640 0, U32_PAD(len));
641 }
642
643
644 /* Tell device the write idx *just past* this latest filled TFD */
645 q->write_ptr = il_queue_inc_wrap(q->write_ptr, q->n_bd);
646 il_txq_update_write_ptr(il, txq);
647 spin_unlock_irqrestore(&il->lock, flags);
648
649 if (il_queue_space(q) < q->high_mark
650 && il->mac80211_registered) {
651 if (wait_write_ptr) {
652 spin_lock_irqsave(&il->lock, flags);
653 txq->need_update = 1;
654 il_txq_update_write_ptr(il, txq);
655 spin_unlock_irqrestore(&il->lock, flags);
656 }
657
658 il_stop_queue(il, txq);
659 }
660
661 return 0;
662
663drop_unlock:
664 spin_unlock_irqrestore(&il->lock, flags);
665drop:
666 return -1;
667}
668
669static int il3945_get_measurement(struct il_priv *il,
670 struct ieee80211_measurement_params *params,
671 u8 type)
672{
673 struct il_spectrum_cmd spectrum;
674 struct il_rx_pkt *pkt;
675 struct il_host_cmd cmd = {
676 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
677 .data = (void *)&spectrum,
678 .flags = CMD_WANT_SKB,
679 };
680 u32 add_time = le64_to_cpu(params->start_time);
681 int rc;
682 int spectrum_resp_status;
683 int duration = le16_to_cpu(params->duration);
684 struct il_rxon_context *ctx = &il->ctx;
685
686 if (il_is_associated(il))
687 add_time = il_usecs_to_beacons(il,
688 le64_to_cpu(params->start_time) - il->_3945.last_tsf,
689 le16_to_cpu(ctx->timing.beacon_interval));
690
691 memset(&spectrum, 0, sizeof(spectrum));
692
693 spectrum.channel_count = cpu_to_le16(1);
694 spectrum.flags =
695 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
696 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
697 cmd.len = sizeof(spectrum);
698 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
699
700 if (il_is_associated(il))
701 spectrum.start_time =
702 il_add_beacon_time(il,
703 il->_3945.last_beacon_time, add_time,
704 le16_to_cpu(ctx->timing.beacon_interval));
705 else
706 spectrum.start_time = 0;
707
708 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
709 spectrum.channels[0].channel = params->channel;
710 spectrum.channels[0].type = type;
711 if (ctx->active.flags & RXON_FLG_BAND_24G_MSK)
712 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
713 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
714
715 rc = il_send_cmd_sync(il, &cmd);
716 if (rc)
717 return rc;
718
719 pkt = (struct il_rx_pkt *)cmd.reply_page;
720 if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
721 IL_ERR("Bad return from REPLY_RX_ON_ASSOC command\n");
722 rc = -EIO;
723 }
724
725 spectrum_resp_status = le16_to_cpu(pkt->u.spectrum.status);
726 switch (spectrum_resp_status) {
727 case 0: /* Command will be handled */
728 if (pkt->u.spectrum.id != 0xff) {
729 D_INFO("Replaced existing measurement: %d\n",
730 pkt->u.spectrum.id);
731 il->measurement_status &= ~MEASUREMENT_READY;
732 }
733 il->measurement_status |= MEASUREMENT_ACTIVE;
734 rc = 0;
735 break;
736
737 case 1: /* Command will not be handled */
738 rc = -EAGAIN;
739 break;
740 }
741
742 il_free_pages(il, cmd.reply_page);
743
744 return rc;
745}
746
747static void il3945_rx_reply_alive(struct il_priv *il,
748 struct il_rx_buf *rxb)
749{
750 struct il_rx_pkt *pkt = rxb_addr(rxb);
751 struct il_alive_resp *palive;
752 struct delayed_work *pwork;
753
754 palive = &pkt->u.alive_frame;
755
756 D_INFO("Alive ucode status 0x%08X revision "
757 "0x%01X 0x%01X\n",
758 palive->is_valid, palive->ver_type,
759 palive->ver_subtype);
760
761 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
762 D_INFO("Initialization Alive received.\n");
763 memcpy(&il->card_alive_init, &pkt->u.alive_frame,
764 sizeof(struct il_alive_resp));
765 pwork = &il->init_alive_start;
766 } else {
767 D_INFO("Runtime Alive received.\n");
768 memcpy(&il->card_alive, &pkt->u.alive_frame,
769 sizeof(struct il_alive_resp));
770 pwork = &il->alive_start;
771 il3945_disable_events(il);
772 }
773
774 /* We delay the ALIVE response by 5ms to
775 * give the HW RF Kill time to activate... */
776 if (palive->is_valid == UCODE_VALID_OK)
777 queue_delayed_work(il->workqueue, pwork,
778 msecs_to_jiffies(5));
779 else
780 IL_WARN("uCode did not respond OK.\n");
781}
782
783static void il3945_rx_reply_add_sta(struct il_priv *il,
784 struct il_rx_buf *rxb)
785{
786#ifdef CONFIG_IWLEGACY_DEBUG
787 struct il_rx_pkt *pkt = rxb_addr(rxb);
788#endif
789
790 D_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
791}
792
793static void il3945_rx_beacon_notif(struct il_priv *il,
794 struct il_rx_buf *rxb)
795{
796 struct il_rx_pkt *pkt = rxb_addr(rxb);
797 struct il3945_beacon_notif *beacon = &(pkt->u.beacon_status);
798#ifdef CONFIG_IWLEGACY_DEBUG
799 u8 rate = beacon->beacon_notify_hdr.rate;
800
801 D_RX("beacon status %x retries %d iss %d "
802 "tsf %d %d rate %d\n",
803 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
804 beacon->beacon_notify_hdr.failure_frame,
805 le32_to_cpu(beacon->ibss_mgr_status),
806 le32_to_cpu(beacon->high_tsf),
807 le32_to_cpu(beacon->low_tsf), rate);
808#endif
809
810 il->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status);
811
812}
813
814/* Handle notification from uCode that card's power state is changing
815 * due to software, hardware, or critical temperature RFKILL */
816static void il3945_rx_card_state_notif(struct il_priv *il,
817 struct il_rx_buf *rxb)
818{
819 struct il_rx_pkt *pkt = rxb_addr(rxb);
820 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
821 unsigned long status = il->status;
822
823 IL_WARN("Card state received: HW:%s SW:%s\n",
824 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
825 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
826
827 _il_wr(il, CSR_UCODE_DRV_GP1_SET,
828 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
829
830 if (flags & HW_CARD_DISABLED)
831 set_bit(STATUS_RF_KILL_HW, &il->status);
832 else
833 clear_bit(STATUS_RF_KILL_HW, &il->status);
834
835
836 il_scan_cancel(il);
837
838 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
839 test_bit(STATUS_RF_KILL_HW, &il->status)))
840 wiphy_rfkill_set_hw_state(il->hw->wiphy,
841 test_bit(STATUS_RF_KILL_HW, &il->status));
842 else
843 wake_up(&il->wait_command_queue);
844}
845
846/**
847 * il3945_setup_rx_handlers - Initialize Rx handler callbacks
848 *
849 * Setup the RX handlers for each of the reply types sent from the uCode
850 * to the host.
851 *
852 * This function chains into the hardware specific files for them to setup
853 * any hardware specific handlers as well.
854 */
855static void il3945_setup_rx_handlers(struct il_priv *il)
856{
857 il->rx_handlers[REPLY_ALIVE] = il3945_rx_reply_alive;
858 il->rx_handlers[REPLY_ADD_STA] = il3945_rx_reply_add_sta;
859 il->rx_handlers[REPLY_ERROR] = il_rx_reply_error;
860 il->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = il_rx_csa;
861 il->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
862 il_rx_spectrum_measure_notif;
863 il->rx_handlers[PM_SLEEP_NOTIFICATION] = il_rx_pm_sleep_notif;
864 il->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
865 il_rx_pm_debug_stats_notif;
866 il->rx_handlers[BEACON_NOTIFICATION] = il3945_rx_beacon_notif;
867
868 /*
869 * The same handler is used for both the REPLY to a discrete
870 * stats request from the host as well as for the periodic
871 * stats notifications (after received beacons) from the uCode.
872 */
873 il->rx_handlers[REPLY_STATISTICS_CMD] = il3945_reply_stats;
874 il->rx_handlers[STATISTICS_NOTIFICATION] = il3945_hw_rx_stats;
875
876 il_setup_rx_scan_handlers(il);
877 il->rx_handlers[CARD_STATE_NOTIFICATION] = il3945_rx_card_state_notif;
878
879 /* Set up hardware specific Rx handlers */
880 il3945_hw_rx_handler_setup(il);
881}
882
883/************************** RX-FUNCTIONS ****************************/
884/*
885 * Rx theory of operation
886 *
887 * The host allocates 32 DMA target addresses and passes the host address
888 * to the firmware at register IL_RFDS_TBL_LOWER + N * RFD_SIZE where N is
889 * 0 to 31
890 *
891 * Rx Queue Indexes
892 * The host/firmware share two idx registers for managing the Rx buffers.
893 *
894 * The READ idx maps to the first position that the firmware may be writing
895 * to -- the driver can read up to (but not including) this position and get
896 * good data.
897 * The READ idx is managed by the firmware once the card is enabled.
898 *
899 * The WRITE idx maps to the last position the driver has read from -- the
900 * position preceding WRITE is the last slot the firmware can place a packet.
901 *
902 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
903 * WRITE = READ.
904 *
905 * During initialization, the host sets up the READ queue position to the first
906 * IDX position, and WRITE to the last (READ - 1 wrapped)
907 *
908 * When the firmware places a packet in a buffer, it will advance the READ idx
909 * and fire the RX interrupt. The driver can then query the READ idx and
910 * process as many packets as possible, moving the WRITE idx forward as it
911 * resets the Rx queue buffers with new memory.
912 *
913 * The management in the driver is as follows:
914 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
915 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
916 * to replenish the iwl->rxq->rx_free.
917 * + In il3945_rx_replenish (scheduled) if 'processed' != 'read' then the
918 * iwl->rxq is replenished and the READ IDX is updated (updating the
919 * 'processed' and 'read' driver idxes as well)
920 * + A received packet is processed and handed to the kernel network stack,
921 * detached from the iwl->rxq. The driver 'processed' idx is updated.
922 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
923 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
924 * IDX is not incremented and iwl->status(RX_STALLED) is set. If there
925 * were enough free buffers and RX_STALLED is set it is cleared.
926 *
927 *
928 * Driver sequence:
929 *
930 * il3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
931 * il3945_rx_queue_restock
932 * il3945_rx_queue_restock() Moves available buffers from rx_free into Rx
933 * queue, updates firmware pointers, and updates
934 * the WRITE idx. If insufficient rx_free buffers
935 * are available, schedules il3945_rx_replenish
936 *
937 * -- enable interrupts --
938 * ISR - il3945_rx() Detach il_rx_bufs from pool up to the
939 * READ IDX, detaching the SKB from the pool.
940 * Moves the packet buffer from queue to rx_used.
941 * Calls il3945_rx_queue_restock to refill any empty
942 * slots.
943 * ...
944 *
945 */
946
947/**
948 * il3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
949 */
950static inline __le32 il3945_dma_addr2rbd_ptr(struct il_priv *il,
951 dma_addr_t dma_addr)
952{
953 return cpu_to_le32((u32)dma_addr);
954}
955
956/**
957 * il3945_rx_queue_restock - refill RX queue from pre-allocated pool
958 *
959 * If there are slots in the RX queue that need to be restocked,
960 * and we have free pre-allocated buffers, fill the ranks as much
961 * as we can, pulling from rx_free.
962 *
963 * This moves the 'write' idx forward to catch up with 'processed', and
964 * also updates the memory address in the firmware to reference the new
965 * target buffer.
966 */
967static void il3945_rx_queue_restock(struct il_priv *il)
968{
969 struct il_rx_queue *rxq = &il->rxq;
970 struct list_head *element;
971 struct il_rx_buf *rxb;
972 unsigned long flags;
973 int write;
974
975 spin_lock_irqsave(&rxq->lock, flags);
976 write = rxq->write & ~0x7;
977 while (il_rx_queue_space(rxq) > 0 && rxq->free_count) {
978 /* Get next free Rx buffer, remove from free list */
979 element = rxq->rx_free.next;
980 rxb = list_entry(element, struct il_rx_buf, list);
981 list_del(element);
982
983 /* Point to Rx buffer via next RBD in circular buffer */
984 rxq->bd[rxq->write] = il3945_dma_addr2rbd_ptr(il, rxb->page_dma);
985 rxq->queue[rxq->write] = rxb;
986 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
987 rxq->free_count--;
988 }
989 spin_unlock_irqrestore(&rxq->lock, flags);
990 /* If the pre-allocated buffer pool is dropping low, schedule to
991 * refill it */
992 if (rxq->free_count <= RX_LOW_WATERMARK)
993 queue_work(il->workqueue, &il->rx_replenish);
994
995
996 /* If we've added more space for the firmware to place data, tell it.
997 * Increment device's write pointer in multiples of 8. */
998 if (rxq->write_actual != (rxq->write & ~0x7) ||
999 abs(rxq->write - rxq->read) > 7) {
1000 spin_lock_irqsave(&rxq->lock, flags);
1001 rxq->need_update = 1;
1002 spin_unlock_irqrestore(&rxq->lock, flags);
1003 il_rx_queue_update_write_ptr(il, rxq);
1004 }
1005}
1006
1007/**
1008 * il3945_rx_replenish - Move all used packet from rx_used to rx_free
1009 *
1010 * When moving to rx_free an SKB is allocated for the slot.
1011 *
1012 * Also restock the Rx queue via il3945_rx_queue_restock.
1013 * This is called as a scheduled work item (except for during initialization)
1014 */
1015static void il3945_rx_allocate(struct il_priv *il, gfp_t priority)
1016{
1017 struct il_rx_queue *rxq = &il->rxq;
1018 struct list_head *element;
1019 struct il_rx_buf *rxb;
1020 struct page *page;
1021 unsigned long flags;
1022 gfp_t gfp_mask = priority;
1023
1024 while (1) {
1025 spin_lock_irqsave(&rxq->lock, flags);
1026
1027 if (list_empty(&rxq->rx_used)) {
1028 spin_unlock_irqrestore(&rxq->lock, flags);
1029 return;
1030 }
1031 spin_unlock_irqrestore(&rxq->lock, flags);
1032
1033 if (rxq->free_count > RX_LOW_WATERMARK)
1034 gfp_mask |= __GFP_NOWARN;
1035
1036 if (il->hw_params.rx_page_order > 0)
1037 gfp_mask |= __GFP_COMP;
1038
1039 /* Alloc a new receive buffer */
1040 page = alloc_pages(gfp_mask, il->hw_params.rx_page_order);
1041 if (!page) {
1042 if (net_ratelimit())
1043 D_INFO("Failed to allocate SKB buffer.\n");
1044 if (rxq->free_count <= RX_LOW_WATERMARK &&
1045 net_ratelimit())
1046 IL_ERR("Failed to allocate SKB buffer with %s. Only %u free buffers remaining.\n",
1047 priority == GFP_ATOMIC ? "GFP_ATOMIC" : "GFP_KERNEL",
1048 rxq->free_count);
1049 /* We don't reschedule replenish work here -- we will
1050 * call the restock method and if it still needs
1051 * more buffers it will schedule replenish */
1052 break;
1053 }
1054
1055 spin_lock_irqsave(&rxq->lock, flags);
1056 if (list_empty(&rxq->rx_used)) {
1057 spin_unlock_irqrestore(&rxq->lock, flags);
1058 __free_pages(page, il->hw_params.rx_page_order);
1059 return;
1060 }
1061 element = rxq->rx_used.next;
1062 rxb = list_entry(element, struct il_rx_buf, list);
1063 list_del(element);
1064 spin_unlock_irqrestore(&rxq->lock, flags);
1065
1066 rxb->page = page;
1067 /* Get physical address of RB/SKB */
1068 rxb->page_dma = pci_map_page(il->pci_dev, page, 0,
1069 PAGE_SIZE << il->hw_params.rx_page_order,
1070 PCI_DMA_FROMDEVICE);
1071
1072 spin_lock_irqsave(&rxq->lock, flags);
1073
1074 list_add_tail(&rxb->list, &rxq->rx_free);
1075 rxq->free_count++;
1076 il->alloc_rxb_page++;
1077
1078 spin_unlock_irqrestore(&rxq->lock, flags);
1079 }
1080}
1081
1082void il3945_rx_queue_reset(struct il_priv *il, struct il_rx_queue *rxq)
1083{
1084 unsigned long flags;
1085 int i;
1086 spin_lock_irqsave(&rxq->lock, flags);
1087 INIT_LIST_HEAD(&rxq->rx_free);
1088 INIT_LIST_HEAD(&rxq->rx_used);
1089 /* Fill the rx_used queue with _all_ of the Rx buffers */
1090 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
1091 /* In the reset function, these buffers may have been allocated
1092 * to an SKB, so we need to unmap and free potential storage */
1093 if (rxq->pool[i].page != NULL) {
1094 pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma,
1095 PAGE_SIZE << il->hw_params.rx_page_order,
1096 PCI_DMA_FROMDEVICE);
1097 __il_free_pages(il, rxq->pool[i].page);
1098 rxq->pool[i].page = NULL;
1099 }
1100 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
1101 }
1102
1103 /* Set us so that we have processed and used all buffers, but have
1104 * not restocked the Rx queue with fresh buffers */
1105 rxq->read = rxq->write = 0;
1106 rxq->write_actual = 0;
1107 rxq->free_count = 0;
1108 spin_unlock_irqrestore(&rxq->lock, flags);
1109}
1110
1111void il3945_rx_replenish(void *data)
1112{
1113 struct il_priv *il = data;
1114 unsigned long flags;
1115
1116 il3945_rx_allocate(il, GFP_KERNEL);
1117
1118 spin_lock_irqsave(&il->lock, flags);
1119 il3945_rx_queue_restock(il);
1120 spin_unlock_irqrestore(&il->lock, flags);
1121}
1122
1123static void il3945_rx_replenish_now(struct il_priv *il)
1124{
1125 il3945_rx_allocate(il, GFP_ATOMIC);
1126
1127 il3945_rx_queue_restock(il);
1128}
1129
1130
1131/* Assumes that the skb field of the buffers in 'pool' is kept accurate.
1132 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
1133 * This free routine walks the list of POOL entries and if SKB is set to
1134 * non NULL it is unmapped and freed
1135 */
1136static void il3945_rx_queue_free(struct il_priv *il, struct il_rx_queue *rxq)
1137{
1138 int i;
1139 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
1140 if (rxq->pool[i].page != NULL) {
1141 pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma,
1142 PAGE_SIZE << il->hw_params.rx_page_order,
1143 PCI_DMA_FROMDEVICE);
1144 __il_free_pages(il, rxq->pool[i].page);
1145 rxq->pool[i].page = NULL;
1146 }
1147 }
1148
1149 dma_free_coherent(&il->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
1150 rxq->bd_dma);
1151 dma_free_coherent(&il->pci_dev->dev, sizeof(struct il_rb_status),
1152 rxq->rb_stts, rxq->rb_stts_dma);
1153 rxq->bd = NULL;
1154 rxq->rb_stts = NULL;
1155}
1156
1157
1158/* Convert linear signal-to-noise ratio into dB */
1159static u8 ratio2dB[100] = {
1160/* 0 1 2 3 4 5 6 7 8 9 */
1161 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
1162 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
1163 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
1164 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
1165 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
1166 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
1167 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
1168 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
1169 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
1170 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
1171};
1172
1173/* Calculates a relative dB value from a ratio of linear
1174 * (i.e. not dB) signal levels.
1175 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
1176int il3945_calc_db_from_ratio(int sig_ratio)
1177{
1178 /* 1000:1 or higher just report as 60 dB */
1179 if (sig_ratio >= 1000)
1180 return 60;
1181
1182 /* 100:1 or higher, divide by 10 and use table,
1183 * add 20 dB to make up for divide by 10 */
1184 if (sig_ratio >= 100)
1185 return 20 + (int)ratio2dB[sig_ratio/10];
1186
1187 /* We shouldn't see this */
1188 if (sig_ratio < 1)
1189 return 0;
1190
1191 /* Use table for ratios 1:1 - 99:1 */
1192 return (int)ratio2dB[sig_ratio];
1193}
1194
1195/**
1196 * il3945_rx_handle - Main entry function for receiving responses from uCode
1197 *
1198 * Uses the il->rx_handlers callback function array to invoke
1199 * the appropriate handlers, including command responses,
1200 * frame-received notifications, and other notifications.
1201 */
1202static void il3945_rx_handle(struct il_priv *il)
1203{
1204 struct il_rx_buf *rxb;
1205 struct il_rx_pkt *pkt;
1206 struct il_rx_queue *rxq = &il->rxq;
1207 u32 r, i;
1208 int reclaim;
1209 unsigned long flags;
1210 u8 fill_rx = 0;
1211 u32 count = 8;
1212 int total_empty = 0;
1213
1214 /* uCode's read idx (stored in shared DRAM) indicates the last Rx
1215 * buffer that the driver may process (last buffer filled by ucode). */
1216 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
1217 i = rxq->read;
1218
1219 /* calculate total frames need to be restock after handling RX */
1220 total_empty = r - rxq->write_actual;
1221 if (total_empty < 0)
1222 total_empty += RX_QUEUE_SIZE;
1223
1224 if (total_empty > (RX_QUEUE_SIZE / 2))
1225 fill_rx = 1;
1226 /* Rx interrupt, but nothing sent from uCode */
1227 if (i == r)
1228 D_RX("r = %d, i = %d\n", r, i);
1229
1230 while (i != r) {
1231 int len;
1232
1233 rxb = rxq->queue[i];
1234
1235 /* If an RXB doesn't have a Rx queue slot associated with it,
1236 * then a bug has been introduced in the queue refilling
1237 * routines -- catch it here */
1238 BUG_ON(rxb == NULL);
1239
1240 rxq->queue[i] = NULL;
1241
1242 pci_unmap_page(il->pci_dev, rxb->page_dma,
1243 PAGE_SIZE << il->hw_params.rx_page_order,
1244 PCI_DMA_FROMDEVICE);
1245 pkt = rxb_addr(rxb);
1246
1247 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
1248 len += sizeof(u32); /* account for status word */
1249
1250 /* Reclaim a command buffer only if this packet is a response
1251 * to a (driver-originated) command.
1252 * If the packet (e.g. Rx frame) originated from uCode,
1253 * there is no command buffer to reclaim.
1254 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
1255 * but apparently a few don't get set; catch them here. */
1256 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
1257 pkt->hdr.cmd != STATISTICS_NOTIFICATION &&
1258 pkt->hdr.cmd != REPLY_TX;
1259
1260 /* Based on type of command response or notification,
1261 * handle those that need handling via function in
1262 * rx_handlers table. See il3945_setup_rx_handlers() */
1263 if (il->rx_handlers[pkt->hdr.cmd]) {
1264 D_RX("r = %d, i = %d, %s, 0x%02x\n", r, i,
1265 il_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
1266 il->isr_stats.rx_handlers[pkt->hdr.cmd]++;
1267 il->rx_handlers[pkt->hdr.cmd] (il, rxb);
1268 } else {
1269 /* No handling needed */
1270 D_RX(
1271 "r %d i %d No handler needed for %s, 0x%02x\n",
1272 r, i, il_get_cmd_string(pkt->hdr.cmd),
1273 pkt->hdr.cmd);
1274 }
1275
1276 /*
1277 * XXX: After here, we should always check rxb->page
1278 * against NULL before touching it or its virtual
1279 * memory (pkt). Because some rx_handler might have
1280 * already taken or freed the pages.
1281 */
1282
1283 if (reclaim) {
1284 /* Invoke any callbacks, transfer the buffer to caller,
1285 * and fire off the (possibly) blocking il_send_cmd()
1286 * as we reclaim the driver command queue */
1287 if (rxb->page)
1288 il_tx_cmd_complete(il, rxb);
1289 else
1290 IL_WARN("Claim null rxb?\n");
1291 }
1292
1293 /* Reuse the page if possible. For notification packets and
1294 * SKBs that fail to Rx correctly, add them back into the
1295 * rx_free list for reuse later. */
1296 spin_lock_irqsave(&rxq->lock, flags);
1297 if (rxb->page != NULL) {
1298 rxb->page_dma = pci_map_page(il->pci_dev, rxb->page,
1299 0, PAGE_SIZE << il->hw_params.rx_page_order,
1300 PCI_DMA_FROMDEVICE);
1301 list_add_tail(&rxb->list, &rxq->rx_free);
1302 rxq->free_count++;
1303 } else
1304 list_add_tail(&rxb->list, &rxq->rx_used);
1305
1306 spin_unlock_irqrestore(&rxq->lock, flags);
1307
1308 i = (i + 1) & RX_QUEUE_MASK;
1309 /* If there are a lot of unused frames,
1310 * restock the Rx queue so ucode won't assert. */
1311 if (fill_rx) {
1312 count++;
1313 if (count >= 8) {
1314 rxq->read = i;
1315 il3945_rx_replenish_now(il);
1316 count = 0;
1317 }
1318 }
1319 }
1320
1321 /* Backtrack one entry */
1322 rxq->read = i;
1323 if (fill_rx)
1324 il3945_rx_replenish_now(il);
1325 else
1326 il3945_rx_queue_restock(il);
1327}
1328
1329/* call this function to flush any scheduled tasklet */
1330static inline void il3945_synchronize_irq(struct il_priv *il)
1331{
1332 /* wait to make sure we flush pending tasklet*/
1333 synchronize_irq(il->pci_dev->irq);
1334 tasklet_kill(&il->irq_tasklet);
1335}
1336
1337static const char *il3945_desc_lookup(int i)
1338{
1339 switch (i) {
1340 case 1:
1341 return "FAIL";
1342 case 2:
1343 return "BAD_PARAM";
1344 case 3:
1345 return "BAD_CHECKSUM";
1346 case 4:
1347 return "NMI_INTERRUPT";
1348 case 5:
1349 return "SYSASSERT";
1350 case 6:
1351 return "FATAL_ERROR";
1352 }
1353
1354 return "UNKNOWN";
1355}
1356
1357#define ERROR_START_OFFSET (1 * sizeof(u32))
1358#define ERROR_ELEM_SIZE (7 * sizeof(u32))
1359
1360void il3945_dump_nic_error_log(struct il_priv *il)
1361{
1362 u32 i;
1363 u32 desc, time, count, base, data1;
1364 u32 blink1, blink2, ilink1, ilink2;
1365
1366 base = le32_to_cpu(il->card_alive.error_event_table_ptr);
1367
1368 if (!il3945_hw_valid_rtc_data_addr(base)) {
1369 IL_ERR("Not valid error log pointer 0x%08X\n", base);
1370 return;
1371 }
1372
1373
1374 count = il_read_targ_mem(il, base);
1375
1376 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1377 IL_ERR("Start IWL Error Log Dump:\n");
1378 IL_ERR("Status: 0x%08lX, count: %d\n",
1379 il->status, count);
1380 }
1381
1382 IL_ERR("Desc Time asrtPC blink2 "
1383 "ilink1 nmiPC Line\n");
1384 for (i = ERROR_START_OFFSET;
1385 i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
1386 i += ERROR_ELEM_SIZE) {
1387 desc = il_read_targ_mem(il, base + i);
1388 time =
1389 il_read_targ_mem(il, base + i + 1 * sizeof(u32));
1390 blink1 =
1391 il_read_targ_mem(il, base + i + 2 * sizeof(u32));
1392 blink2 =
1393 il_read_targ_mem(il, base + i + 3 * sizeof(u32));
1394 ilink1 =
1395 il_read_targ_mem(il, base + i + 4 * sizeof(u32));
1396 ilink2 =
1397 il_read_targ_mem(il, base + i + 5 * sizeof(u32));
1398 data1 =
1399 il_read_targ_mem(il, base + i + 6 * sizeof(u32));
1400
1401 IL_ERR(
1402 "%-13s (0x%X) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
1403 il3945_desc_lookup(desc), desc, time, blink1, blink2,
1404 ilink1, ilink2, data1);
1405 }
1406}
1407
1408static void il3945_irq_tasklet(struct il_priv *il)
1409{
1410 u32 inta, handled = 0;
1411 u32 inta_fh;
1412 unsigned long flags;
1413#ifdef CONFIG_IWLEGACY_DEBUG
1414 u32 inta_mask;
1415#endif
1416
1417 spin_lock_irqsave(&il->lock, flags);
1418
1419 /* Ack/clear/reset pending uCode interrupts.
1420 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1421 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
1422 inta = _il_rd(il, CSR_INT);
1423 _il_wr(il, CSR_INT, inta);
1424
1425 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1426 * Any new interrupts that happen after this, either while we're
1427 * in this tasklet, or later, will show up in next ISR/tasklet. */
1428 inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
1429 _il_wr(il, CSR_FH_INT_STATUS, inta_fh);
1430
1431#ifdef CONFIG_IWLEGACY_DEBUG
1432 if (il_get_debug_level(il) & IL_DL_ISR) {
1433 /* just for debug */
1434 inta_mask = _il_rd(il, CSR_INT_MASK);
1435 D_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1436 inta, inta_mask, inta_fh);
1437 }
1438#endif
1439
1440 spin_unlock_irqrestore(&il->lock, flags);
1441
1442 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1443 * atomic, make sure that inta covers all the interrupts that
1444 * we've discovered, even if FH interrupt came in just after
1445 * reading CSR_INT. */
1446 if (inta_fh & CSR39_FH_INT_RX_MASK)
1447 inta |= CSR_INT_BIT_FH_RX;
1448 if (inta_fh & CSR39_FH_INT_TX_MASK)
1449 inta |= CSR_INT_BIT_FH_TX;
1450
1451 /* Now service all interrupt bits discovered above. */
1452 if (inta & CSR_INT_BIT_HW_ERR) {
1453 IL_ERR("Hardware error detected. Restarting.\n");
1454
1455 /* Tell the device to stop sending interrupts */
1456 il_disable_interrupts(il);
1457
1458 il->isr_stats.hw++;
1459 il_irq_handle_error(il);
1460
1461 handled |= CSR_INT_BIT_HW_ERR;
1462
1463 return;
1464 }
1465
1466#ifdef CONFIG_IWLEGACY_DEBUG
1467 if (il_get_debug_level(il) & (IL_DL_ISR)) {
1468 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1469 if (inta & CSR_INT_BIT_SCD) {
1470 D_ISR("Scheduler finished to transmit "
1471 "the frame/frames.\n");
1472 il->isr_stats.sch++;
1473 }
1474
1475 /* Alive notification via Rx interrupt will do the real work */
1476 if (inta & CSR_INT_BIT_ALIVE) {
1477 D_ISR("Alive interrupt\n");
1478 il->isr_stats.alive++;
1479 }
1480 }
1481#endif
1482 /* Safely ignore these bits for debug checks below */
1483 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1484
1485 /* Error detected by uCode */
1486 if (inta & CSR_INT_BIT_SW_ERR) {
1487 IL_ERR("Microcode SW error detected. "
1488 "Restarting 0x%X.\n", inta);
1489 il->isr_stats.sw++;
1490 il_irq_handle_error(il);
1491 handled |= CSR_INT_BIT_SW_ERR;
1492 }
1493
1494 /* uCode wakes up after power-down sleep */
1495 if (inta & CSR_INT_BIT_WAKEUP) {
1496 D_ISR("Wakeup interrupt\n");
1497 il_rx_queue_update_write_ptr(il, &il->rxq);
1498 il_txq_update_write_ptr(il, &il->txq[0]);
1499 il_txq_update_write_ptr(il, &il->txq[1]);
1500 il_txq_update_write_ptr(il, &il->txq[2]);
1501 il_txq_update_write_ptr(il, &il->txq[3]);
1502 il_txq_update_write_ptr(il, &il->txq[4]);
1503 il_txq_update_write_ptr(il, &il->txq[5]);
1504
1505 il->isr_stats.wakeup++;
1506 handled |= CSR_INT_BIT_WAKEUP;
1507 }
1508
1509 /* All uCode command responses, including Tx command responses,
1510 * Rx "responses" (frame-received notification), and other
1511 * notifications from uCode come through here*/
1512 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1513 il3945_rx_handle(il);
1514 il->isr_stats.rx++;
1515 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1516 }
1517
1518 if (inta & CSR_INT_BIT_FH_TX) {
1519 D_ISR("Tx interrupt\n");
1520 il->isr_stats.tx++;
1521
1522 _il_wr(il, CSR_FH_INT_STATUS, (1 << 6));
1523 il_wr(il, FH39_TCSR_CREDIT
1524 (FH39_SRVC_CHNL), 0x0);
1525 handled |= CSR_INT_BIT_FH_TX;
1526 }
1527
1528 if (inta & ~handled) {
1529 IL_ERR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
1530 il->isr_stats.unhandled++;
1531 }
1532
1533 if (inta & ~il->inta_mask) {
1534 IL_WARN("Disabled INTA bits 0x%08x were pending\n",
1535 inta & ~il->inta_mask);
1536 IL_WARN(" with FH_INT = 0x%08x\n", inta_fh);
1537 }
1538
1539 /* Re-enable all interrupts */
1540 /* only Re-enable if disabled by irq */
1541 if (test_bit(STATUS_INT_ENABLED, &il->status))
1542 il_enable_interrupts(il);
1543
1544#ifdef CONFIG_IWLEGACY_DEBUG
1545 if (il_get_debug_level(il) & (IL_DL_ISR)) {
1546 inta = _il_rd(il, CSR_INT);
1547 inta_mask = _il_rd(il, CSR_INT_MASK);
1548 inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
1549 D_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1550 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1551 }
1552#endif
1553}
1554
1555static int il3945_get_channels_for_scan(struct il_priv *il,
1556 enum ieee80211_band band,
1557 u8 is_active, u8 n_probes,
1558 struct il3945_scan_channel *scan_ch,
1559 struct ieee80211_vif *vif)
1560{
1561 struct ieee80211_channel *chan;
1562 const struct ieee80211_supported_band *sband;
1563 const struct il_channel_info *ch_info;
1564 u16 passive_dwell = 0;
1565 u16 active_dwell = 0;
1566 int added, i;
1567
1568 sband = il_get_hw_mode(il, band);
1569 if (!sband)
1570 return 0;
1571
1572 active_dwell = il_get_active_dwell_time(il, band, n_probes);
1573 passive_dwell = il_get_passive_dwell_time(il, band, vif);
1574
1575 if (passive_dwell <= active_dwell)
1576 passive_dwell = active_dwell + 1;
1577
1578 for (i = 0, added = 0; i < il->scan_request->n_channels; i++) {
1579 chan = il->scan_request->channels[i];
1580
1581 if (chan->band != band)
1582 continue;
1583
1584 scan_ch->channel = chan->hw_value;
1585
1586 ch_info = il_get_channel_info(il, band,
1587 scan_ch->channel);
1588 if (!il_is_channel_valid(ch_info)) {
1589 D_SCAN(
1590 "Channel %d is INVALID for this band.\n",
1591 scan_ch->channel);
1592 continue;
1593 }
1594
1595 scan_ch->active_dwell = cpu_to_le16(active_dwell);
1596 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
1597 /* If passive , set up for auto-switch
1598 * and use long active_dwell time.
1599 */
1600 if (!is_active || il_is_channel_passive(ch_info) ||
1601 (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
1602 scan_ch->type = 0; /* passive */
1603 if (IL_UCODE_API(il->ucode_ver) == 1)
1604 scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
1605 } else {
1606 scan_ch->type = 1; /* active */
1607 }
1608
1609 /* Set direct probe bits. These may be used both for active
1610 * scan channels (probes gets sent right away),
1611 * or for passive channels (probes get se sent only after
1612 * hearing clear Rx packet).*/
1613 if (IL_UCODE_API(il->ucode_ver) >= 2) {
1614 if (n_probes)
1615 scan_ch->type |= IL39_SCAN_PROBE_MASK(n_probes);
1616 } else {
1617 /* uCode v1 does not allow setting direct probe bits on
1618 * passive channel. */
1619 if ((scan_ch->type & 1) && n_probes)
1620 scan_ch->type |= IL39_SCAN_PROBE_MASK(n_probes);
1621 }
1622
1623 /* Set txpower levels to defaults */
1624 scan_ch->tpc.dsp_atten = 110;
1625 /* scan_pwr_info->tpc.dsp_atten; */
1626
1627 /*scan_pwr_info->tpc.tx_gain; */
1628 if (band == IEEE80211_BAND_5GHZ)
1629 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
1630 else {
1631 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
1632 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
1633 * power level:
1634 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
1635 */
1636 }
1637
1638 D_SCAN("Scanning %d [%s %d]\n",
1639 scan_ch->channel,
1640 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
1641 (scan_ch->type & 1) ?
1642 active_dwell : passive_dwell);
1643
1644 scan_ch++;
1645 added++;
1646 }
1647
1648 D_SCAN("total channels to scan %d\n", added);
1649 return added;
1650}
1651
1652static void il3945_init_hw_rates(struct il_priv *il,
1653 struct ieee80211_rate *rates)
1654{
1655 int i;
1656
1657 for (i = 0; i < RATE_COUNT_LEGACY; i++) {
1658 rates[i].bitrate = il3945_rates[i].ieee * 5;
1659 rates[i].hw_value = i; /* Rate scaling will work on idxes */
1660 rates[i].hw_value_short = i;
1661 rates[i].flags = 0;
1662 if (i > IL39_LAST_OFDM_RATE || i < IL_FIRST_OFDM_RATE) {
1663 /*
1664 * If CCK != 1M then set short preamble rate flag.
1665 */
1666 rates[i].flags |= (il3945_rates[i].plcp == 10) ?
1667 0 : IEEE80211_RATE_SHORT_PREAMBLE;
1668 }
1669 }
1670}
1671
1672/******************************************************************************
1673 *
1674 * uCode download functions
1675 *
1676 ******************************************************************************/
1677
1678static void il3945_dealloc_ucode_pci(struct il_priv *il)
1679{
1680 il_free_fw_desc(il->pci_dev, &il->ucode_code);
1681 il_free_fw_desc(il->pci_dev, &il->ucode_data);
1682 il_free_fw_desc(il->pci_dev, &il->ucode_data_backup);
1683 il_free_fw_desc(il->pci_dev, &il->ucode_init);
1684 il_free_fw_desc(il->pci_dev, &il->ucode_init_data);
1685 il_free_fw_desc(il->pci_dev, &il->ucode_boot);
1686}
1687
1688/**
1689 * il3945_verify_inst_full - verify runtime uCode image in card vs. host,
1690 * looking at all data.
1691 */
1692static int il3945_verify_inst_full(struct il_priv *il, __le32 *image, u32 len)
1693{
1694 u32 val;
1695 u32 save_len = len;
1696 int rc = 0;
1697 u32 errcnt;
1698
1699 D_INFO("ucode inst image size is %u\n", len);
1700
1701 il_wr(il, HBUS_TARG_MEM_RADDR,
1702 IL39_RTC_INST_LOWER_BOUND);
1703
1704 errcnt = 0;
1705 for (; len > 0; len -= sizeof(u32), image++) {
1706 /* read data comes through single port, auto-incr addr */
1707 /* NOTE: Use the debugless read so we don't flood kernel log
1708 * if IL_DL_IO is set */
1709 val = _il_rd(il, HBUS_TARG_MEM_RDAT);
1710 if (val != le32_to_cpu(*image)) {
1711 IL_ERR("uCode INST section is invalid at "
1712 "offset 0x%x, is 0x%x, s/b 0x%x\n",
1713 save_len - len, val, le32_to_cpu(*image));
1714 rc = -EIO;
1715 errcnt++;
1716 if (errcnt >= 20)
1717 break;
1718 }
1719 }
1720
1721
1722 if (!errcnt)
1723 D_INFO(
1724 "ucode image in INSTRUCTION memory is good\n");
1725
1726 return rc;
1727}
1728
1729
1730/**
1731 * il3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
1732 * using sample data 100 bytes apart. If these sample points are good,
1733 * it's a pretty good bet that everything between them is good, too.
1734 */
1735static int il3945_verify_inst_sparse(struct il_priv *il, __le32 *image, u32 len)
1736{
1737 u32 val;
1738 int rc = 0;
1739 u32 errcnt = 0;
1740 u32 i;
1741
1742 D_INFO("ucode inst image size is %u\n", len);
1743
1744 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
1745 /* read data comes through single port, auto-incr addr */
1746 /* NOTE: Use the debugless read so we don't flood kernel log
1747 * if IL_DL_IO is set */
1748 il_wr(il, HBUS_TARG_MEM_RADDR,
1749 i + IL39_RTC_INST_LOWER_BOUND);
1750 val = _il_rd(il, HBUS_TARG_MEM_RDAT);
1751 if (val != le32_to_cpu(*image)) {
1752#if 0 /* Enable this if you want to see details */
1753 IL_ERR("uCode INST section is invalid at "
1754 "offset 0x%x, is 0x%x, s/b 0x%x\n",
1755 i, val, *image);
1756#endif
1757 rc = -EIO;
1758 errcnt++;
1759 if (errcnt >= 3)
1760 break;
1761 }
1762 }
1763
1764 return rc;
1765}
1766
1767
1768/**
1769 * il3945_verify_ucode - determine which instruction image is in SRAM,
1770 * and verify its contents
1771 */
1772static int il3945_verify_ucode(struct il_priv *il)
1773{
1774 __le32 *image;
1775 u32 len;
1776 int rc = 0;
1777
1778 /* Try bootstrap */
1779 image = (__le32 *)il->ucode_boot.v_addr;
1780 len = il->ucode_boot.len;
1781 rc = il3945_verify_inst_sparse(il, image, len);
1782 if (rc == 0) {
1783 D_INFO("Bootstrap uCode is good in inst SRAM\n");
1784 return 0;
1785 }
1786
1787 /* Try initialize */
1788 image = (__le32 *)il->ucode_init.v_addr;
1789 len = il->ucode_init.len;
1790 rc = il3945_verify_inst_sparse(il, image, len);
1791 if (rc == 0) {
1792 D_INFO("Initialize uCode is good in inst SRAM\n");
1793 return 0;
1794 }
1795
1796 /* Try runtime/protocol */
1797 image = (__le32 *)il->ucode_code.v_addr;
1798 len = il->ucode_code.len;
1799 rc = il3945_verify_inst_sparse(il, image, len);
1800 if (rc == 0) {
1801 D_INFO("Runtime uCode is good in inst SRAM\n");
1802 return 0;
1803 }
1804
1805 IL_ERR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
1806
1807 /* Since nothing seems to match, show first several data entries in
1808 * instruction SRAM, so maybe visual inspection will give a clue.
1809 * Selection of bootstrap image (vs. other images) is arbitrary. */
1810 image = (__le32 *)il->ucode_boot.v_addr;
1811 len = il->ucode_boot.len;
1812 rc = il3945_verify_inst_full(il, image, len);
1813
1814 return rc;
1815}
1816
1817static void il3945_nic_start(struct il_priv *il)
1818{
1819 /* Remove all resets to allow NIC to operate */
1820 _il_wr(il, CSR_RESET, 0);
1821}
1822
1823#define IL3945_UCODE_GET(item) \
1824static u32 il3945_ucode_get_##item(const struct il_ucode_header *ucode)\
1825{ \
1826 return le32_to_cpu(ucode->v1.item); \
1827}
1828
1829static u32 il3945_ucode_get_header_size(u32 api_ver)
1830{
1831 return 24;
1832}
1833
1834static u8 *il3945_ucode_get_data(const struct il_ucode_header *ucode)
1835{
1836 return (u8 *) ucode->v1.data;
1837}
1838
1839IL3945_UCODE_GET(inst_size);
1840IL3945_UCODE_GET(data_size);
1841IL3945_UCODE_GET(init_size);
1842IL3945_UCODE_GET(init_data_size);
1843IL3945_UCODE_GET(boot_size);
1844
1845/**
1846 * il3945_read_ucode - Read uCode images from disk file.
1847 *
1848 * Copy into buffers for card to fetch via bus-mastering
1849 */
1850static int il3945_read_ucode(struct il_priv *il)
1851{
1852 const struct il_ucode_header *ucode;
1853 int ret = -EINVAL, idx;
1854 const struct firmware *ucode_raw;
1855 /* firmware file name contains uCode/driver compatibility version */
1856 const char *name_pre = il->cfg->fw_name_pre;
1857 const unsigned int api_max = il->cfg->ucode_api_max;
1858 const unsigned int api_min = il->cfg->ucode_api_min;
1859 char buf[25];
1860 u8 *src;
1861 size_t len;
1862 u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
1863
1864 /* Ask kernel firmware_class module to get the boot firmware off disk.
1865 * request_firmware() is synchronous, file is in memory on return. */
1866 for (idx = api_max; idx >= api_min; idx--) {
1867 sprintf(buf, "%s%u%s", name_pre, idx, ".ucode");
1868 ret = request_firmware(&ucode_raw, buf, &il->pci_dev->dev);
1869 if (ret < 0) {
1870 IL_ERR("%s firmware file req failed: %d\n",
1871 buf, ret);
1872 if (ret == -ENOENT)
1873 continue;
1874 else
1875 goto error;
1876 } else {
1877 if (idx < api_max)
1878 IL_ERR("Loaded firmware %s, "
1879 "which is deprecated. "
1880 " Please use API v%u instead.\n",
1881 buf, api_max);
1882 D_INFO("Got firmware '%s' file "
1883 "(%zd bytes) from disk\n",
1884 buf, ucode_raw->size);
1885 break;
1886 }
1887 }
1888
1889 if (ret < 0)
1890 goto error;
1891
1892 /* Make sure that we got at least our header! */
1893 if (ucode_raw->size < il3945_ucode_get_header_size(1)) {
1894 IL_ERR("File size way too small!\n");
1895 ret = -EINVAL;
1896 goto err_release;
1897 }
1898
1899 /* Data from ucode file: header followed by uCode images */
1900 ucode = (struct il_ucode_header *)ucode_raw->data;
1901
1902 il->ucode_ver = le32_to_cpu(ucode->ver);
1903 api_ver = IL_UCODE_API(il->ucode_ver);
1904 inst_size = il3945_ucode_get_inst_size(ucode);
1905 data_size = il3945_ucode_get_data_size(ucode);
1906 init_size = il3945_ucode_get_init_size(ucode);
1907 init_data_size = il3945_ucode_get_init_data_size(ucode);
1908 boot_size = il3945_ucode_get_boot_size(ucode);
1909 src = il3945_ucode_get_data(ucode);
1910
1911 /* api_ver should match the api version forming part of the
1912 * firmware filename ... but we don't check for that and only rely
1913 * on the API version read from firmware header from here on forward */
1914
1915 if (api_ver < api_min || api_ver > api_max) {
1916 IL_ERR("Driver unable to support your firmware API. "
1917 "Driver supports v%u, firmware is v%u.\n",
1918 api_max, api_ver);
1919 il->ucode_ver = 0;
1920 ret = -EINVAL;
1921 goto err_release;
1922 }
1923 if (api_ver != api_max)
1924 IL_ERR("Firmware has old API version. Expected %u, "
1925 "got %u. New firmware can be obtained "
1926 "from http://www.intellinuxwireless.org.\n",
1927 api_max, api_ver);
1928
1929 IL_INFO("loaded firmware version %u.%u.%u.%u\n",
1930 IL_UCODE_MAJOR(il->ucode_ver),
1931 IL_UCODE_MINOR(il->ucode_ver),
1932 IL_UCODE_API(il->ucode_ver),
1933 IL_UCODE_SERIAL(il->ucode_ver));
1934
1935 snprintf(il->hw->wiphy->fw_version,
1936 sizeof(il->hw->wiphy->fw_version),
1937 "%u.%u.%u.%u",
1938 IL_UCODE_MAJOR(il->ucode_ver),
1939 IL_UCODE_MINOR(il->ucode_ver),
1940 IL_UCODE_API(il->ucode_ver),
1941 IL_UCODE_SERIAL(il->ucode_ver));
1942
1943 D_INFO("f/w package hdr ucode version raw = 0x%x\n",
1944 il->ucode_ver);
1945 D_INFO("f/w package hdr runtime inst size = %u\n",
1946 inst_size);
1947 D_INFO("f/w package hdr runtime data size = %u\n",
1948 data_size);
1949 D_INFO("f/w package hdr init inst size = %u\n",
1950 init_size);
1951 D_INFO("f/w package hdr init data size = %u\n",
1952 init_data_size);
1953 D_INFO("f/w package hdr boot inst size = %u\n",
1954 boot_size);
1955
1956
1957 /* Verify size of file vs. image size info in file's header */
1958 if (ucode_raw->size != il3945_ucode_get_header_size(api_ver) +
1959 inst_size + data_size + init_size +
1960 init_data_size + boot_size) {
1961
1962 D_INFO(
1963 "uCode file size %zd does not match expected size\n",
1964 ucode_raw->size);
1965 ret = -EINVAL;
1966 goto err_release;
1967 }
1968
1969 /* Verify that uCode images will fit in card's SRAM */
1970 if (inst_size > IL39_MAX_INST_SIZE) {
1971 D_INFO("uCode instr len %d too large to fit in\n",
1972 inst_size);
1973 ret = -EINVAL;
1974 goto err_release;
1975 }
1976
1977 if (data_size > IL39_MAX_DATA_SIZE) {
1978 D_INFO("uCode data len %d too large to fit in\n",
1979 data_size);
1980 ret = -EINVAL;
1981 goto err_release;
1982 }
1983 if (init_size > IL39_MAX_INST_SIZE) {
1984 D_INFO(
1985 "uCode init instr len %d too large to fit in\n",
1986 init_size);
1987 ret = -EINVAL;
1988 goto err_release;
1989 }
1990 if (init_data_size > IL39_MAX_DATA_SIZE) {
1991 D_INFO(
1992 "uCode init data len %d too large to fit in\n",
1993 init_data_size);
1994 ret = -EINVAL;
1995 goto err_release;
1996 }
1997 if (boot_size > IL39_MAX_BSM_SIZE) {
1998 D_INFO(
1999 "uCode boot instr len %d too large to fit in\n",
2000 boot_size);
2001 ret = -EINVAL;
2002 goto err_release;
2003 }
2004
2005 /* Allocate ucode buffers for card's bus-master loading ... */
2006
2007 /* Runtime instructions and 2 copies of data:
2008 * 1) unmodified from disk
2009 * 2) backup cache for save/restore during power-downs */
2010 il->ucode_code.len = inst_size;
2011 il_alloc_fw_desc(il->pci_dev, &il->ucode_code);
2012
2013 il->ucode_data.len = data_size;
2014 il_alloc_fw_desc(il->pci_dev, &il->ucode_data);
2015
2016 il->ucode_data_backup.len = data_size;
2017 il_alloc_fw_desc(il->pci_dev, &il->ucode_data_backup);
2018
2019 if (!il->ucode_code.v_addr || !il->ucode_data.v_addr ||
2020 !il->ucode_data_backup.v_addr)
2021 goto err_pci_alloc;
2022
2023 /* Initialization instructions and data */
2024 if (init_size && init_data_size) {
2025 il->ucode_init.len = init_size;
2026 il_alloc_fw_desc(il->pci_dev, &il->ucode_init);
2027
2028 il->ucode_init_data.len = init_data_size;
2029 il_alloc_fw_desc(il->pci_dev, &il->ucode_init_data);
2030
2031 if (!il->ucode_init.v_addr || !il->ucode_init_data.v_addr)
2032 goto err_pci_alloc;
2033 }
2034
2035 /* Bootstrap (instructions only, no data) */
2036 if (boot_size) {
2037 il->ucode_boot.len = boot_size;
2038 il_alloc_fw_desc(il->pci_dev, &il->ucode_boot);
2039
2040 if (!il->ucode_boot.v_addr)
2041 goto err_pci_alloc;
2042 }
2043
2044 /* Copy images into buffers for card's bus-master reads ... */
2045
2046 /* Runtime instructions (first block of data in file) */
2047 len = inst_size;
2048 D_INFO(
2049 "Copying (but not loading) uCode instr len %zd\n", len);
2050 memcpy(il->ucode_code.v_addr, src, len);
2051 src += len;
2052
2053 D_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
2054 il->ucode_code.v_addr, (u32)il->ucode_code.p_addr);
2055
2056 /* Runtime data (2nd block)
2057 * NOTE: Copy into backup buffer will be done in il3945_up() */
2058 len = data_size;
2059 D_INFO(
2060 "Copying (but not loading) uCode data len %zd\n", len);
2061 memcpy(il->ucode_data.v_addr, src, len);
2062 memcpy(il->ucode_data_backup.v_addr, src, len);
2063 src += len;
2064
2065 /* Initialization instructions (3rd block) */
2066 if (init_size) {
2067 len = init_size;
2068 D_INFO(
2069 "Copying (but not loading) init instr len %zd\n", len);
2070 memcpy(il->ucode_init.v_addr, src, len);
2071 src += len;
2072 }
2073
2074 /* Initialization data (4th block) */
2075 if (init_data_size) {
2076 len = init_data_size;
2077 D_INFO(
2078 "Copying (but not loading) init data len %zd\n", len);
2079 memcpy(il->ucode_init_data.v_addr, src, len);
2080 src += len;
2081 }
2082
2083 /* Bootstrap instructions (5th block) */
2084 len = boot_size;
2085 D_INFO(
2086 "Copying (but not loading) boot instr len %zd\n", len);
2087 memcpy(il->ucode_boot.v_addr, src, len);
2088
2089 /* We have our copies now, allow OS release its copies */
2090 release_firmware(ucode_raw);
2091 return 0;
2092
2093 err_pci_alloc:
2094 IL_ERR("failed to allocate pci memory\n");
2095 ret = -ENOMEM;
2096 il3945_dealloc_ucode_pci(il);
2097
2098 err_release:
2099 release_firmware(ucode_raw);
2100
2101 error:
2102 return ret;
2103}
2104
2105
2106/**
2107 * il3945_set_ucode_ptrs - Set uCode address location
2108 *
2109 * Tell initialization uCode where to find runtime uCode.
2110 *
2111 * BSM registers initially contain pointers to initialization uCode.
2112 * We need to replace them to load runtime uCode inst and data,
2113 * and to save runtime data when powering down.
2114 */
2115static int il3945_set_ucode_ptrs(struct il_priv *il)
2116{
2117 dma_addr_t pinst;
2118 dma_addr_t pdata;
2119
2120 /* bits 31:0 for 3945 */
2121 pinst = il->ucode_code.p_addr;
2122 pdata = il->ucode_data_backup.p_addr;
2123
2124 /* Tell bootstrap uCode where to find image to load */
2125 il_wr_prph(il, BSM_DRAM_INST_PTR_REG, pinst);
2126 il_wr_prph(il, BSM_DRAM_DATA_PTR_REG, pdata);
2127 il_wr_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG,
2128 il->ucode_data.len);
2129
2130 /* Inst byte count must be last to set up, bit 31 signals uCode
2131 * that all new ptr/size info is in place */
2132 il_wr_prph(il, BSM_DRAM_INST_BYTECOUNT_REG,
2133 il->ucode_code.len | BSM_DRAM_INST_LOAD);
2134
2135 D_INFO("Runtime uCode pointers are set.\n");
2136
2137 return 0;
2138}
2139
2140/**
2141 * il3945_init_alive_start - Called after REPLY_ALIVE notification received
2142 *
2143 * Called after REPLY_ALIVE notification received from "initialize" uCode.
2144 *
2145 * Tell "initialize" uCode to go ahead and load the runtime uCode.
2146 */
2147static void il3945_init_alive_start(struct il_priv *il)
2148{
2149 /* Check alive response for "valid" sign from uCode */
2150 if (il->card_alive_init.is_valid != UCODE_VALID_OK) {
2151 /* We had an error bringing up the hardware, so take it
2152 * all the way back down so we can try again */
2153 D_INFO("Initialize Alive failed.\n");
2154 goto restart;
2155 }
2156
2157 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
2158 * This is a paranoid check, because we would not have gotten the
2159 * "initialize" alive if code weren't properly loaded. */
2160 if (il3945_verify_ucode(il)) {
2161 /* Runtime instruction load was bad;
2162 * take it all the way back down so we can try again */
2163 D_INFO("Bad \"initialize\" uCode load.\n");
2164 goto restart;
2165 }
2166
2167 /* Send pointers to protocol/runtime uCode image ... init code will
2168 * load and launch runtime uCode, which will send us another "Alive"
2169 * notification. */
2170 D_INFO("Initialization Alive received.\n");
2171 if (il3945_set_ucode_ptrs(il)) {
2172 /* Runtime instruction load won't happen;
2173 * take it all the way back down so we can try again */
2174 D_INFO("Couldn't set up uCode pointers.\n");
2175 goto restart;
2176 }
2177 return;
2178
2179 restart:
2180 queue_work(il->workqueue, &il->restart);
2181}
2182
2183/**
2184 * il3945_alive_start - called after REPLY_ALIVE notification received
2185 * from protocol/runtime uCode (initialization uCode's
2186 * Alive gets handled by il3945_init_alive_start()).
2187 */
2188static void il3945_alive_start(struct il_priv *il)
2189{
2190 int thermal_spin = 0;
2191 u32 rfkill;
2192 struct il_rxon_context *ctx = &il->ctx;
2193
2194 D_INFO("Runtime Alive received.\n");
2195
2196 if (il->card_alive.is_valid != UCODE_VALID_OK) {
2197 /* We had an error bringing up the hardware, so take it
2198 * all the way back down so we can try again */
2199 D_INFO("Alive failed.\n");
2200 goto restart;
2201 }
2202
2203 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2204 * This is a paranoid check, because we would not have gotten the
2205 * "runtime" alive if code weren't properly loaded. */
2206 if (il3945_verify_ucode(il)) {
2207 /* Runtime instruction load was bad;
2208 * take it all the way back down so we can try again */
2209 D_INFO("Bad runtime uCode load.\n");
2210 goto restart;
2211 }
2212
2213 rfkill = il_rd_prph(il, APMG_RFKILL_REG);
2214 D_INFO("RFKILL status: 0x%x\n", rfkill);
2215
2216 if (rfkill & 0x1) {
2217 clear_bit(STATUS_RF_KILL_HW, &il->status);
2218 /* if RFKILL is not on, then wait for thermal
2219 * sensor in adapter to kick in */
2220 while (il3945_hw_get_temperature(il) == 0) {
2221 thermal_spin++;
2222 udelay(10);
2223 }
2224
2225 if (thermal_spin)
2226 D_INFO("Thermal calibration took %dus\n",
2227 thermal_spin * 10);
2228 } else
2229 set_bit(STATUS_RF_KILL_HW, &il->status);
2230
2231 /* After the ALIVE response, we can send commands to 3945 uCode */
2232 set_bit(STATUS_ALIVE, &il->status);
2233
2234 /* Enable watchdog to monitor the driver tx queues */
2235 il_setup_watchdog(il);
2236
2237 if (il_is_rfkill(il))
2238 return;
2239
2240 ieee80211_wake_queues(il->hw);
2241
2242 il->active_rate = RATES_MASK_3945;
2243
2244 il_power_update_mode(il, true);
2245
2246 if (il_is_associated(il)) {
2247 struct il3945_rxon_cmd *active_rxon =
2248 (struct il3945_rxon_cmd *)(&ctx->active);
2249
2250 ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
2251 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2252 } else {
2253 /* Initialize our rx_config data */
2254 il_connection_init_rx_config(il, ctx);
2255 }
2256
2257 /* Configure Bluetooth device coexistence support */
2258 il_send_bt_config(il);
2259
2260 set_bit(STATUS_READY, &il->status);
2261
2262 /* Configure the adapter for unassociated operation */
2263 il3945_commit_rxon(il, ctx);
2264
2265 il3945_reg_txpower_periodic(il);
2266
2267 D_INFO("ALIVE processing complete.\n");
2268 wake_up(&il->wait_command_queue);
2269
2270 return;
2271
2272 restart:
2273 queue_work(il->workqueue, &il->restart);
2274}
2275
2276static void il3945_cancel_deferred_work(struct il_priv *il);
2277
2278static void __il3945_down(struct il_priv *il)
2279{
2280 unsigned long flags;
2281 int exit_pending;
2282
2283 D_INFO(DRV_NAME " is going down\n");
2284
2285 il_scan_cancel_timeout(il, 200);
2286
2287 exit_pending = test_and_set_bit(STATUS_EXIT_PENDING, &il->status);
2288
2289 /* Stop TX queues watchdog. We need to have STATUS_EXIT_PENDING bit set
2290 * to prevent rearm timer */
2291 del_timer_sync(&il->watchdog);
2292
2293 /* Station information will now be cleared in device */
2294 il_clear_ucode_stations(il, NULL);
2295 il_dealloc_bcast_stations(il);
2296 il_clear_driver_stations(il);
2297
2298 /* Unblock any waiting calls */
2299 wake_up_all(&il->wait_command_queue);
2300
2301 /* Wipe out the EXIT_PENDING status bit if we are not actually
2302 * exiting the module */
2303 if (!exit_pending)
2304 clear_bit(STATUS_EXIT_PENDING, &il->status);
2305
2306 /* stop and reset the on-board processor */
2307 _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2308
2309 /* tell the device to stop sending interrupts */
2310 spin_lock_irqsave(&il->lock, flags);
2311 il_disable_interrupts(il);
2312 spin_unlock_irqrestore(&il->lock, flags);
2313 il3945_synchronize_irq(il);
2314
2315 if (il->mac80211_registered)
2316 ieee80211_stop_queues(il->hw);
2317
2318 /* If we have not previously called il3945_init() then
2319 * clear all bits but the RF Kill bits and return */
2320 if (!il_is_init(il)) {
2321 il->status = test_bit(STATUS_RF_KILL_HW, &il->status) <<
2322 STATUS_RF_KILL_HW |
2323 test_bit(STATUS_GEO_CONFIGURED, &il->status) <<
2324 STATUS_GEO_CONFIGURED |
2325 test_bit(STATUS_EXIT_PENDING, &il->status) <<
2326 STATUS_EXIT_PENDING;
2327 goto exit;
2328 }
2329
2330 /* ...otherwise clear out all the status bits but the RF Kill
2331 * bit and continue taking the NIC down. */
2332 il->status &= test_bit(STATUS_RF_KILL_HW, &il->status) <<
2333 STATUS_RF_KILL_HW |
2334 test_bit(STATUS_GEO_CONFIGURED, &il->status) <<
2335 STATUS_GEO_CONFIGURED |
2336 test_bit(STATUS_FW_ERROR, &il->status) <<
2337 STATUS_FW_ERROR |
2338 test_bit(STATUS_EXIT_PENDING, &il->status) <<
2339 STATUS_EXIT_PENDING;
2340
2341 il3945_hw_txq_ctx_stop(il);
2342 il3945_hw_rxq_stop(il);
2343
2344 /* Power-down device's busmaster DMA clocks */
2345 il_wr_prph(il, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
2346 udelay(5);
2347
2348 /* Stop the device, and put it in low power state */
2349 il_apm_stop(il);
2350
2351 exit:
2352 memset(&il->card_alive, 0, sizeof(struct il_alive_resp));
2353
2354 if (il->beacon_skb)
2355 dev_kfree_skb(il->beacon_skb);
2356 il->beacon_skb = NULL;
2357
2358 /* clear out any free frames */
2359 il3945_clear_free_frames(il);
2360}
2361
2362static void il3945_down(struct il_priv *il)
2363{
2364 mutex_lock(&il->mutex);
2365 __il3945_down(il);
2366 mutex_unlock(&il->mutex);
2367
2368 il3945_cancel_deferred_work(il);
2369}
2370
2371#define MAX_HW_RESTARTS 5
2372
2373static int il3945_alloc_bcast_station(struct il_priv *il)
2374{
2375 struct il_rxon_context *ctx = &il->ctx;
2376 unsigned long flags;
2377 u8 sta_id;
2378
2379 spin_lock_irqsave(&il->sta_lock, flags);
2380 sta_id = il_prep_station(il, ctx,
2381 il_bcast_addr, false, NULL);
2382 if (sta_id == IL_INVALID_STATION) {
2383 IL_ERR("Unable to prepare broadcast station\n");
2384 spin_unlock_irqrestore(&il->sta_lock, flags);
2385
2386 return -EINVAL;
2387 }
2388
2389 il->stations[sta_id].used |= IL_STA_DRIVER_ACTIVE;
2390 il->stations[sta_id].used |= IL_STA_BCAST;
2391 spin_unlock_irqrestore(&il->sta_lock, flags);
2392
2393 return 0;
2394}
2395
2396static int __il3945_up(struct il_priv *il)
2397{
2398 int rc, i;
2399
2400 rc = il3945_alloc_bcast_station(il);
2401 if (rc)
2402 return rc;
2403
2404 if (test_bit(STATUS_EXIT_PENDING, &il->status)) {
2405 IL_WARN("Exit pending; will not bring the NIC up\n");
2406 return -EIO;
2407 }
2408
2409 if (!il->ucode_data_backup.v_addr || !il->ucode_data.v_addr) {
2410 IL_ERR("ucode not available for device bring up\n");
2411 return -EIO;
2412 }
2413
2414 /* If platform's RF_KILL switch is NOT set to KILL */
2415 if (_il_rd(il, CSR_GP_CNTRL) &
2416 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2417 clear_bit(STATUS_RF_KILL_HW, &il->status);
2418 else {
2419 set_bit(STATUS_RF_KILL_HW, &il->status);
2420 IL_WARN("Radio disabled by HW RF Kill switch\n");
2421 return -ENODEV;
2422 }
2423
2424 _il_wr(il, CSR_INT, 0xFFFFFFFF);
2425
2426 rc = il3945_hw_nic_init(il);
2427 if (rc) {
2428 IL_ERR("Unable to int nic\n");
2429 return rc;
2430 }
2431
2432 /* make sure rfkill handshake bits are cleared */
2433 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2434 _il_wr(il, CSR_UCODE_DRV_GP1_CLR,
2435 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2436
2437 /* clear (again), then enable host interrupts */
2438 _il_wr(il, CSR_INT, 0xFFFFFFFF);
2439 il_enable_interrupts(il);
2440
2441 /* really make sure rfkill handshake bits are cleared */
2442 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2443 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2444
2445 /* Copy original ucode data image from disk into backup cache.
2446 * This will be used to initialize the on-board processor's
2447 * data SRAM for a clean start when the runtime program first loads. */
2448 memcpy(il->ucode_data_backup.v_addr, il->ucode_data.v_addr,
2449 il->ucode_data.len);
2450
2451 /* We return success when we resume from suspend and rf_kill is on. */
2452 if (test_bit(STATUS_RF_KILL_HW, &il->status))
2453 return 0;
2454
2455 for (i = 0; i < MAX_HW_RESTARTS; i++) {
2456
2457 /* load bootstrap state machine,
2458 * load bootstrap program into processor's memory,
2459 * prepare to load the "initialize" uCode */
2460 rc = il->cfg->ops->lib->load_ucode(il);
2461
2462 if (rc) {
2463 IL_ERR(
2464 "Unable to set up bootstrap uCode: %d\n", rc);
2465 continue;
2466 }
2467
2468 /* start card; "initialize" will load runtime ucode */
2469 il3945_nic_start(il);
2470
2471 D_INFO(DRV_NAME " is coming up\n");
2472
2473 return 0;
2474 }
2475
2476 set_bit(STATUS_EXIT_PENDING, &il->status);
2477 __il3945_down(il);
2478 clear_bit(STATUS_EXIT_PENDING, &il->status);
2479
2480 /* tried to restart and config the device for as long as our
2481 * patience could withstand */
2482 IL_ERR("Unable to initialize device after %d attempts.\n", i);
2483 return -EIO;
2484}
2485
2486
2487/*****************************************************************************
2488 *
2489 * Workqueue callbacks
2490 *
2491 *****************************************************************************/
2492
2493static void il3945_bg_init_alive_start(struct work_struct *data)
2494{
2495 struct il_priv *il =
2496 container_of(data, struct il_priv, init_alive_start.work);
2497
2498 mutex_lock(&il->mutex);
2499 if (test_bit(STATUS_EXIT_PENDING, &il->status))
2500 goto out;
2501
2502 il3945_init_alive_start(il);
2503out:
2504 mutex_unlock(&il->mutex);
2505}
2506
2507static void il3945_bg_alive_start(struct work_struct *data)
2508{
2509 struct il_priv *il =
2510 container_of(data, struct il_priv, alive_start.work);
2511
2512 mutex_lock(&il->mutex);
2513 if (test_bit(STATUS_EXIT_PENDING, &il->status))
2514 goto out;
2515
2516 il3945_alive_start(il);
2517out:
2518 mutex_unlock(&il->mutex);
2519}
2520
2521/*
2522 * 3945 cannot interrupt driver when hardware rf kill switch toggles;
2523 * driver must poll CSR_GP_CNTRL_REG register for change. This register
2524 * *is* readable even when device has been SW_RESET into low power mode
2525 * (e.g. during RF KILL).
2526 */
2527static void il3945_rfkill_poll(struct work_struct *data)
2528{
2529 struct il_priv *il =
2530 container_of(data, struct il_priv, _3945.rfkill_poll.work);
2531 bool old_rfkill = test_bit(STATUS_RF_KILL_HW, &il->status);
2532 bool new_rfkill = !(_il_rd(il, CSR_GP_CNTRL)
2533 & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW);
2534
2535 if (new_rfkill != old_rfkill) {
2536 if (new_rfkill)
2537 set_bit(STATUS_RF_KILL_HW, &il->status);
2538 else
2539 clear_bit(STATUS_RF_KILL_HW, &il->status);
2540
2541 wiphy_rfkill_set_hw_state(il->hw->wiphy, new_rfkill);
2542
2543 D_RF_KILL("RF_KILL bit toggled to %s.\n",
2544 new_rfkill ? "disable radio" : "enable radio");
2545 }
2546
2547 /* Keep this running, even if radio now enabled. This will be
2548 * cancelled in mac_start() if system decides to start again */
2549 queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll,
2550 round_jiffies_relative(2 * HZ));
2551
2552}
2553
2554int il3945_request_scan(struct il_priv *il, struct ieee80211_vif *vif)
2555{
2556 struct il_host_cmd cmd = {
2557 .id = REPLY_SCAN_CMD,
2558 .len = sizeof(struct il3945_scan_cmd),
2559 .flags = CMD_SIZE_HUGE,
2560 };
2561 struct il3945_scan_cmd *scan;
2562 u8 n_probes = 0;
2563 enum ieee80211_band band;
2564 bool is_active = false;
2565 int ret;
2566 u16 len;
2567
2568 lockdep_assert_held(&il->mutex);
2569
2570 if (!il->scan_cmd) {
2571 il->scan_cmd = kmalloc(sizeof(struct il3945_scan_cmd) +
2572 IL_MAX_SCAN_SIZE, GFP_KERNEL);
2573 if (!il->scan_cmd) {
2574 D_SCAN("Fail to allocate scan memory\n");
2575 return -ENOMEM;
2576 }
2577 }
2578 scan = il->scan_cmd;
2579 memset(scan, 0, sizeof(struct il3945_scan_cmd) + IL_MAX_SCAN_SIZE);
2580
2581 scan->quiet_plcp_th = IL_PLCP_QUIET_THRESH;
2582 scan->quiet_time = IL_ACTIVE_QUIET_TIME;
2583
2584 if (il_is_associated(il)) {
2585 u16 interval;
2586 u32 extra;
2587 u32 suspend_time = 100;
2588 u32 scan_suspend_time = 100;
2589
2590 D_INFO("Scanning while associated...\n");
2591
2592 interval = vif->bss_conf.beacon_int;
2593
2594 scan->suspend_time = 0;
2595 scan->max_out_time = cpu_to_le32(200 * 1024);
2596 if (!interval)
2597 interval = suspend_time;
2598 /*
2599 * suspend time format:
2600 * 0-19: beacon interval in usec (time before exec.)
2601 * 20-23: 0
2602 * 24-31: number of beacons (suspend between channels)
2603 */
2604
2605 extra = (suspend_time / interval) << 24;
2606 scan_suspend_time = 0xFF0FFFFF &
2607 (extra | ((suspend_time % interval) * 1024));
2608
2609 scan->suspend_time = cpu_to_le32(scan_suspend_time);
2610 D_SCAN("suspend_time 0x%X beacon interval %d\n",
2611 scan_suspend_time, interval);
2612 }
2613
2614 if (il->scan_request->n_ssids) {
2615 int i, p = 0;
2616 D_SCAN("Kicking off active scan\n");
2617 for (i = 0; i < il->scan_request->n_ssids; i++) {
2618 /* always does wildcard anyway */
2619 if (!il->scan_request->ssids[i].ssid_len)
2620 continue;
2621 scan->direct_scan[p].id = WLAN_EID_SSID;
2622 scan->direct_scan[p].len =
2623 il->scan_request->ssids[i].ssid_len;
2624 memcpy(scan->direct_scan[p].ssid,
2625 il->scan_request->ssids[i].ssid,
2626 il->scan_request->ssids[i].ssid_len);
2627 n_probes++;
2628 p++;
2629 }
2630 is_active = true;
2631 } else
2632 D_SCAN("Kicking off passive scan.\n");
2633
2634 /* We don't build a direct scan probe request; the uCode will do
2635 * that based on the direct_mask added to each channel entry */
2636 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
2637 scan->tx_cmd.sta_id = il->ctx.bcast_sta_id;
2638 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2639
2640 /* flags + rate selection */
2641
2642 switch (il->scan_band) {
2643 case IEEE80211_BAND_2GHZ:
2644 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
2645 scan->tx_cmd.rate = RATE_1M_PLCP;
2646 band = IEEE80211_BAND_2GHZ;
2647 break;
2648 case IEEE80211_BAND_5GHZ:
2649 scan->tx_cmd.rate = RATE_6M_PLCP;
2650 band = IEEE80211_BAND_5GHZ;
2651 break;
2652 default:
2653 IL_WARN("Invalid scan band\n");
2654 return -EIO;
2655 }
2656
2657 /*
2658 * If active scaning is requested but a certain channel
2659 * is marked passive, we can do active scanning if we
2660 * detect transmissions.
2661 */
2662 scan->good_CRC_th = is_active ? IL_GOOD_CRC_TH_DEFAULT :
2663 IL_GOOD_CRC_TH_DISABLED;
2664
2665 len = il_fill_probe_req(il, (struct ieee80211_mgmt *)scan->data,
2666 vif->addr, il->scan_request->ie,
2667 il->scan_request->ie_len,
2668 IL_MAX_SCAN_SIZE - sizeof(*scan));
2669 scan->tx_cmd.len = cpu_to_le16(len);
2670
2671 /* select Rx antennas */
2672 scan->flags |= il3945_get_antenna_flags(il);
2673
2674 scan->channel_count = il3945_get_channels_for_scan(il, band, is_active, n_probes,
2675 (void *)&scan->data[len], vif);
2676 if (scan->channel_count == 0) {
2677 D_SCAN("channel count %d\n", scan->channel_count);
2678 return -EIO;
2679 }
2680
2681 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
2682 scan->channel_count * sizeof(struct il3945_scan_channel);
2683 cmd.data = scan;
2684 scan->len = cpu_to_le16(cmd.len);
2685
2686 set_bit(STATUS_SCAN_HW, &il->status);
2687 ret = il_send_cmd_sync(il, &cmd);
2688 if (ret)
2689 clear_bit(STATUS_SCAN_HW, &il->status);
2690 return ret;
2691}
2692
2693void il3945_post_scan(struct il_priv *il)
2694{
2695 struct il_rxon_context *ctx = &il->ctx;
2696
2697 /*
2698 * Since setting the RXON may have been deferred while
2699 * performing the scan, fire one off if needed
2700 */
2701 if (memcmp(&ctx->staging, &ctx->active, sizeof(ctx->staging)))
2702 il3945_commit_rxon(il, ctx);
2703}
2704
2705static void il3945_bg_restart(struct work_struct *data)
2706{
2707 struct il_priv *il = container_of(data, struct il_priv, restart);
2708
2709 if (test_bit(STATUS_EXIT_PENDING, &il->status))
2710 return;
2711
2712 if (test_and_clear_bit(STATUS_FW_ERROR, &il->status)) {
2713 mutex_lock(&il->mutex);
2714 il->ctx.vif = NULL;
2715 il->is_open = 0;
2716 mutex_unlock(&il->mutex);
2717 il3945_down(il);
2718 ieee80211_restart_hw(il->hw);
2719 } else {
2720 il3945_down(il);
2721
2722 mutex_lock(&il->mutex);
2723 if (test_bit(STATUS_EXIT_PENDING, &il->status)) {
2724 mutex_unlock(&il->mutex);
2725 return;
2726 }
2727
2728 __il3945_up(il);
2729 mutex_unlock(&il->mutex);
2730 }
2731}
2732
2733static void il3945_bg_rx_replenish(struct work_struct *data)
2734{
2735 struct il_priv *il =
2736 container_of(data, struct il_priv, rx_replenish);
2737
2738 mutex_lock(&il->mutex);
2739 if (test_bit(STATUS_EXIT_PENDING, &il->status))
2740 goto out;
2741
2742 il3945_rx_replenish(il);
2743out:
2744 mutex_unlock(&il->mutex);
2745}
2746
2747void il3945_post_associate(struct il_priv *il)
2748{
2749 int rc = 0;
2750 struct ieee80211_conf *conf = NULL;
2751 struct il_rxon_context *ctx = &il->ctx;
2752
2753 if (!ctx->vif || !il->is_open)
2754 return;
2755
2756 D_ASSOC("Associated as %d to: %pM\n",
2757 ctx->vif->bss_conf.aid, ctx->active.bssid_addr);
2758
2759 if (test_bit(STATUS_EXIT_PENDING, &il->status))
2760 return;
2761
2762 il_scan_cancel_timeout(il, 200);
2763
2764 conf = il_ieee80211_get_hw_conf(il->hw);
2765
2766 ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2767 il3945_commit_rxon(il, ctx);
2768
2769 rc = il_send_rxon_timing(il, ctx);
2770 if (rc)
2771 IL_WARN("REPLY_RXON_TIMING failed - "
2772 "Attempting to continue.\n");
2773
2774 ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
2775
2776 ctx->staging.assoc_id = cpu_to_le16(ctx->vif->bss_conf.aid);
2777
2778 D_ASSOC("assoc id %d beacon interval %d\n",
2779 ctx->vif->bss_conf.aid, ctx->vif->bss_conf.beacon_int);
2780
2781 if (ctx->vif->bss_conf.use_short_preamble)
2782 ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2783 else
2784 ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2785
2786 if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK) {
2787 if (ctx->vif->bss_conf.use_short_slot)
2788 ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
2789 else
2790 ctx->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2791 }
2792
2793 il3945_commit_rxon(il, ctx);
2794
2795 switch (ctx->vif->type) {
2796 case NL80211_IFTYPE_STATION:
2797 il3945_rate_scale_init(il->hw, IL_AP_ID);
2798 break;
2799 case NL80211_IFTYPE_ADHOC:
2800 il3945_send_beacon_cmd(il);
2801 break;
2802 default:
2803 IL_ERR("%s Should not be called in %d mode\n",
2804 __func__, ctx->vif->type);
2805 break;
2806 }
2807}
2808
2809/*****************************************************************************
2810 *
2811 * mac80211 entry point functions
2812 *
2813 *****************************************************************************/
2814
2815#define UCODE_READY_TIMEOUT (2 * HZ)
2816
2817static int il3945_mac_start(struct ieee80211_hw *hw)
2818{
2819 struct il_priv *il = hw->priv;
2820 int ret;
2821
2822 D_MAC80211("enter\n");
2823
2824 /* we should be verifying the device is ready to be opened */
2825 mutex_lock(&il->mutex);
2826
2827 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
2828 * ucode filename and max sizes are card-specific. */
2829
2830 if (!il->ucode_code.len) {
2831 ret = il3945_read_ucode(il);
2832 if (ret) {
2833 IL_ERR("Could not read microcode: %d\n", ret);
2834 mutex_unlock(&il->mutex);
2835 goto out_release_irq;
2836 }
2837 }
2838
2839 ret = __il3945_up(il);
2840
2841 mutex_unlock(&il->mutex);
2842
2843 if (ret)
2844 goto out_release_irq;
2845
2846 D_INFO("Start UP work.\n");
2847
2848 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
2849 * mac80211 will not be run successfully. */
2850 ret = wait_event_timeout(il->wait_command_queue,
2851 test_bit(STATUS_READY, &il->status),
2852 UCODE_READY_TIMEOUT);
2853 if (!ret) {
2854 if (!test_bit(STATUS_READY, &il->status)) {
2855 IL_ERR(
2856 "Wait for START_ALIVE timeout after %dms.\n",
2857 jiffies_to_msecs(UCODE_READY_TIMEOUT));
2858 ret = -ETIMEDOUT;
2859 goto out_release_irq;
2860 }
2861 }
2862
2863 /* ucode is running and will send rfkill notifications,
2864 * no need to poll the killswitch state anymore */
2865 cancel_delayed_work(&il->_3945.rfkill_poll);
2866
2867 il->is_open = 1;
2868 D_MAC80211("leave\n");
2869 return 0;
2870
2871out_release_irq:
2872 il->is_open = 0;
2873 D_MAC80211("leave - failed\n");
2874 return ret;
2875}
2876
2877static void il3945_mac_stop(struct ieee80211_hw *hw)
2878{
2879 struct il_priv *il = hw->priv;
2880
2881 D_MAC80211("enter\n");
2882
2883 if (!il->is_open) {
2884 D_MAC80211("leave - skip\n");
2885 return;
2886 }
2887
2888 il->is_open = 0;
2889
2890 il3945_down(il);
2891
2892 flush_workqueue(il->workqueue);
2893
2894 /* start polling the killswitch state again */
2895 queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll,
2896 round_jiffies_relative(2 * HZ));
2897
2898 D_MAC80211("leave\n");
2899}
2900
2901static void il3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2902{
2903 struct il_priv *il = hw->priv;
2904
2905 D_MAC80211("enter\n");
2906
2907 D_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
2908 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
2909
2910 if (il3945_tx_skb(il, skb))
2911 dev_kfree_skb_any(skb);
2912
2913 D_MAC80211("leave\n");
2914}
2915
2916void il3945_config_ap(struct il_priv *il)
2917{
2918 struct il_rxon_context *ctx = &il->ctx;
2919 struct ieee80211_vif *vif = ctx->vif;
2920 int rc = 0;
2921
2922 if (test_bit(STATUS_EXIT_PENDING, &il->status))
2923 return;
2924
2925 /* The following should be done only at AP bring up */
2926 if (!(il_is_associated(il))) {
2927
2928 /* RXON - unassoc (to set timing command) */
2929 ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2930 il3945_commit_rxon(il, ctx);
2931
2932 /* RXON Timing */
2933 rc = il_send_rxon_timing(il, ctx);
2934 if (rc)
2935 IL_WARN("REPLY_RXON_TIMING failed - "
2936 "Attempting to continue.\n");
2937
2938 ctx->staging.assoc_id = 0;
2939
2940 if (vif->bss_conf.use_short_preamble)
2941 ctx->staging.flags |=
2942 RXON_FLG_SHORT_PREAMBLE_MSK;
2943 else
2944 ctx->staging.flags &=
2945 ~RXON_FLG_SHORT_PREAMBLE_MSK;
2946
2947 if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK) {
2948 if (vif->bss_conf.use_short_slot)
2949 ctx->staging.flags |=
2950 RXON_FLG_SHORT_SLOT_MSK;
2951 else
2952 ctx->staging.flags &=
2953 ~RXON_FLG_SHORT_SLOT_MSK;
2954 }
2955 /* restore RXON assoc */
2956 ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
2957 il3945_commit_rxon(il, ctx);
2958 }
2959 il3945_send_beacon_cmd(il);
2960}
2961
2962static int il3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2963 struct ieee80211_vif *vif,
2964 struct ieee80211_sta *sta,
2965 struct ieee80211_key_conf *key)
2966{
2967 struct il_priv *il = hw->priv;
2968 int ret = 0;
2969 u8 sta_id = IL_INVALID_STATION;
2970 u8 static_key;
2971
2972 D_MAC80211("enter\n");
2973
2974 if (il3945_mod_params.sw_crypto) {
2975 D_MAC80211("leave - hwcrypto disabled\n");
2976 return -EOPNOTSUPP;
2977 }
2978
2979 /*
2980 * To support IBSS RSN, don't program group keys in IBSS, the
2981 * hardware will then not attempt to decrypt the frames.
2982 */
2983 if (vif->type == NL80211_IFTYPE_ADHOC &&
2984 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE))
2985 return -EOPNOTSUPP;
2986
2987 static_key = !il_is_associated(il);
2988
2989 if (!static_key) {
2990 sta_id = il_sta_id_or_broadcast(
2991 il, &il->ctx, sta);
2992 if (sta_id == IL_INVALID_STATION)
2993 return -EINVAL;
2994 }
2995
2996 mutex_lock(&il->mutex);
2997 il_scan_cancel_timeout(il, 100);
2998
2999 switch (cmd) {
3000 case SET_KEY:
3001 if (static_key)
3002 ret = il3945_set_static_key(il, key);
3003 else
3004 ret = il3945_set_dynamic_key(il, key, sta_id);
3005 D_MAC80211("enable hwcrypto key\n");
3006 break;
3007 case DISABLE_KEY:
3008 if (static_key)
3009 ret = il3945_remove_static_key(il);
3010 else
3011 ret = il3945_clear_sta_key_info(il, sta_id);
3012 D_MAC80211("disable hwcrypto key\n");
3013 break;
3014 default:
3015 ret = -EINVAL;
3016 }
3017
3018 mutex_unlock(&il->mutex);
3019 D_MAC80211("leave\n");
3020
3021 return ret;
3022}
3023
3024static int il3945_mac_sta_add(struct ieee80211_hw *hw,
3025 struct ieee80211_vif *vif,
3026 struct ieee80211_sta *sta)
3027{
3028 struct il_priv *il = hw->priv;
3029 struct il3945_sta_priv *sta_priv = (void *)sta->drv_priv;
3030 int ret;
3031 bool is_ap = vif->type == NL80211_IFTYPE_STATION;
3032 u8 sta_id;
3033
3034 D_INFO("received request to add station %pM\n",
3035 sta->addr);
3036 mutex_lock(&il->mutex);
3037 D_INFO("proceeding to add station %pM\n",
3038 sta->addr);
3039 sta_priv->common.sta_id = IL_INVALID_STATION;
3040
3041
3042 ret = il_add_station_common(il,
3043 &il->ctx,
3044 sta->addr, is_ap, sta, &sta_id);
3045 if (ret) {
3046 IL_ERR("Unable to add station %pM (%d)\n",
3047 sta->addr, ret);
3048 /* Should we return success if return code is EEXIST ? */
3049 mutex_unlock(&il->mutex);
3050 return ret;
3051 }
3052
3053 sta_priv->common.sta_id = sta_id;
3054
3055 /* Initialize rate scaling */
3056 D_INFO("Initializing rate scaling for station %pM\n",
3057 sta->addr);
3058 il3945_rs_rate_init(il, sta, sta_id);
3059 mutex_unlock(&il->mutex);
3060
3061 return 0;
3062}
3063
3064static void il3945_configure_filter(struct ieee80211_hw *hw,
3065 unsigned int changed_flags,
3066 unsigned int *total_flags,
3067 u64 multicast)
3068{
3069 struct il_priv *il = hw->priv;
3070 __le32 filter_or = 0, filter_nand = 0;
3071 struct il_rxon_context *ctx = &il->ctx;
3072
3073#define CHK(test, flag) do { \
3074 if (*total_flags & (test)) \
3075 filter_or |= (flag); \
3076 else \
3077 filter_nand |= (flag); \
3078 } while (0)
3079
3080 D_MAC80211("Enter: changed: 0x%x, total: 0x%x\n",
3081 changed_flags, *total_flags);
3082
3083 CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK);
3084 CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK);
3085 CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK);
3086
3087#undef CHK
3088
3089 mutex_lock(&il->mutex);
3090
3091 ctx->staging.filter_flags &= ~filter_nand;
3092 ctx->staging.filter_flags |= filter_or;
3093
3094 /*
3095 * Not committing directly because hardware can perform a scan,
3096 * but even if hw is ready, committing here breaks for some reason,
3097 * we'll eventually commit the filter flags change anyway.
3098 */
3099
3100 mutex_unlock(&il->mutex);
3101
3102 /*
3103 * Receiving all multicast frames is always enabled by the
3104 * default flags setup in il_connection_init_rx_config()
3105 * since we currently do not support programming multicast
3106 * filters into the device.
3107 */
3108 *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
3109 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
3110}
3111
3112
3113/*****************************************************************************
3114 *
3115 * sysfs attributes
3116 *
3117 *****************************************************************************/
3118
3119#ifdef CONFIG_IWLEGACY_DEBUG
3120
3121/*
3122 * The following adds a new attribute to the sysfs representation
3123 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
3124 * used for controlling the debug level.
3125 *
3126 * See the level definitions in iwl for details.
3127 *
3128 * The debug_level being managed using sysfs below is a per device debug
3129 * level that is used instead of the global debug level if it (the per
3130 * device debug level) is set.
3131 */
3132static ssize_t il3945_show_debug_level(struct device *d,
3133 struct device_attribute *attr, char *buf)
3134{
3135 struct il_priv *il = dev_get_drvdata(d);
3136 return sprintf(buf, "0x%08X\n", il_get_debug_level(il));
3137}
3138static ssize_t il3945_store_debug_level(struct device *d,
3139 struct device_attribute *attr,
3140 const char *buf, size_t count)
3141{
3142 struct il_priv *il = dev_get_drvdata(d);
3143 unsigned long val;
3144 int ret;
3145
3146 ret = strict_strtoul(buf, 0, &val);
3147 if (ret)
3148 IL_INFO("%s is not in hex or decimal form.\n", buf);
3149 else {
3150 il->debug_level = val;
3151 if (il_alloc_traffic_mem(il))
3152 IL_ERR(
3153 "Not enough memory to generate traffic log\n");
3154 }
3155 return strnlen(buf, count);
3156}
3157
3158static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
3159 il3945_show_debug_level, il3945_store_debug_level);
3160
3161#endif /* CONFIG_IWLEGACY_DEBUG */
3162
3163static ssize_t il3945_show_temperature(struct device *d,
3164 struct device_attribute *attr, char *buf)
3165{
3166 struct il_priv *il = dev_get_drvdata(d);
3167
3168 if (!il_is_alive(il))
3169 return -EAGAIN;
3170
3171 return sprintf(buf, "%d\n", il3945_hw_get_temperature(il));
3172}
3173
3174static DEVICE_ATTR(temperature, S_IRUGO, il3945_show_temperature, NULL);
3175
3176static ssize_t il3945_show_tx_power(struct device *d,
3177 struct device_attribute *attr, char *buf)
3178{
3179 struct il_priv *il = dev_get_drvdata(d);
3180 return sprintf(buf, "%d\n", il->tx_power_user_lmt);
3181}
3182
3183static ssize_t il3945_store_tx_power(struct device *d,
3184 struct device_attribute *attr,
3185 const char *buf, size_t count)
3186{
3187 struct il_priv *il = dev_get_drvdata(d);
3188 char *p = (char *)buf;
3189 u32 val;
3190
3191 val = simple_strtoul(p, &p, 10);
3192 if (p == buf)
3193 IL_INFO(": %s is not in decimal form.\n", buf);
3194 else
3195 il3945_hw_reg_set_txpower(il, val);
3196
3197 return count;
3198}
3199
3200static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, il3945_show_tx_power, il3945_store_tx_power);
3201
3202static ssize_t il3945_show_flags(struct device *d,
3203 struct device_attribute *attr, char *buf)
3204{
3205 struct il_priv *il = dev_get_drvdata(d);
3206 struct il_rxon_context *ctx = &il->ctx;
3207
3208 return sprintf(buf, "0x%04X\n", ctx->active.flags);
3209}
3210
3211static ssize_t il3945_store_flags(struct device *d,
3212 struct device_attribute *attr,
3213 const char *buf, size_t count)
3214{
3215 struct il_priv *il = dev_get_drvdata(d);
3216 u32 flags = simple_strtoul(buf, NULL, 0);
3217 struct il_rxon_context *ctx = &il->ctx;
3218
3219 mutex_lock(&il->mutex);
3220 if (le32_to_cpu(ctx->staging.flags) != flags) {
3221 /* Cancel any currently running scans... */
3222 if (il_scan_cancel_timeout(il, 100))
3223 IL_WARN("Could not cancel scan.\n");
3224 else {
3225 D_INFO("Committing rxon.flags = 0x%04X\n",
3226 flags);
3227 ctx->staging.flags = cpu_to_le32(flags);
3228 il3945_commit_rxon(il, ctx);
3229 }
3230 }
3231 mutex_unlock(&il->mutex);
3232
3233 return count;
3234}
3235
3236static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, il3945_show_flags, il3945_store_flags);
3237
3238static ssize_t il3945_show_filter_flags(struct device *d,
3239 struct device_attribute *attr, char *buf)
3240{
3241 struct il_priv *il = dev_get_drvdata(d);
3242 struct il_rxon_context *ctx = &il->ctx;
3243
3244 return sprintf(buf, "0x%04X\n",
3245 le32_to_cpu(ctx->active.filter_flags));
3246}
3247
3248static ssize_t il3945_store_filter_flags(struct device *d,
3249 struct device_attribute *attr,
3250 const char *buf, size_t count)
3251{
3252 struct il_priv *il = dev_get_drvdata(d);
3253 struct il_rxon_context *ctx = &il->ctx;
3254 u32 filter_flags = simple_strtoul(buf, NULL, 0);
3255
3256 mutex_lock(&il->mutex);
3257 if (le32_to_cpu(ctx->staging.filter_flags) != filter_flags) {
3258 /* Cancel any currently running scans... */
3259 if (il_scan_cancel_timeout(il, 100))
3260 IL_WARN("Could not cancel scan.\n");
3261 else {
3262 D_INFO("Committing rxon.filter_flags = "
3263 "0x%04X\n", filter_flags);
3264 ctx->staging.filter_flags =
3265 cpu_to_le32(filter_flags);
3266 il3945_commit_rxon(il, ctx);
3267 }
3268 }
3269 mutex_unlock(&il->mutex);
3270
3271 return count;
3272}
3273
3274static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, il3945_show_filter_flags,
3275 il3945_store_filter_flags);
3276
3277static ssize_t il3945_show_measurement(struct device *d,
3278 struct device_attribute *attr, char *buf)
3279{
3280 struct il_priv *il = dev_get_drvdata(d);
3281 struct il_spectrum_notification measure_report;
3282 u32 size = sizeof(measure_report), len = 0, ofs = 0;
3283 u8 *data = (u8 *)&measure_report;
3284 unsigned long flags;
3285
3286 spin_lock_irqsave(&il->lock, flags);
3287 if (!(il->measurement_status & MEASUREMENT_READY)) {
3288 spin_unlock_irqrestore(&il->lock, flags);
3289 return 0;
3290 }
3291 memcpy(&measure_report, &il->measure_report, size);
3292 il->measurement_status = 0;
3293 spin_unlock_irqrestore(&il->lock, flags);
3294
3295 while (size && PAGE_SIZE - len) {
3296 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3297 PAGE_SIZE - len, 1);
3298 len = strlen(buf);
3299 if (PAGE_SIZE - len)
3300 buf[len++] = '\n';
3301
3302 ofs += 16;
3303 size -= min(size, 16U);
3304 }
3305
3306 return len;
3307}
3308
3309static ssize_t il3945_store_measurement(struct device *d,
3310 struct device_attribute *attr,
3311 const char *buf, size_t count)
3312{
3313 struct il_priv *il = dev_get_drvdata(d);
3314 struct il_rxon_context *ctx = &il->ctx;
3315 struct ieee80211_measurement_params params = {
3316 .channel = le16_to_cpu(ctx->active.channel),
3317 .start_time = cpu_to_le64(il->_3945.last_tsf),
3318 .duration = cpu_to_le16(1),
3319 };
3320 u8 type = IL_MEASURE_BASIC;
3321 u8 buffer[32];
3322 u8 channel;
3323
3324 if (count) {
3325 char *p = buffer;
3326 strncpy(buffer, buf, min(sizeof(buffer), count));
3327 channel = simple_strtoul(p, NULL, 0);
3328 if (channel)
3329 params.channel = channel;
3330
3331 p = buffer;
3332 while (*p && *p != ' ')
3333 p++;
3334 if (*p)
3335 type = simple_strtoul(p + 1, NULL, 0);
3336 }
3337
3338 D_INFO("Invoking measurement of type %d on "
3339 "channel %d (for '%s')\n", type, params.channel, buf);
3340 il3945_get_measurement(il, &params, type);
3341
3342 return count;
3343}
3344
3345static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
3346 il3945_show_measurement, il3945_store_measurement);
3347
3348static ssize_t il3945_store_retry_rate(struct device *d,
3349 struct device_attribute *attr,
3350 const char *buf, size_t count)
3351{
3352 struct il_priv *il = dev_get_drvdata(d);
3353
3354 il->retry_rate = simple_strtoul(buf, NULL, 0);
3355 if (il->retry_rate <= 0)
3356 il->retry_rate = 1;
3357
3358 return count;
3359}
3360
3361static ssize_t il3945_show_retry_rate(struct device *d,
3362 struct device_attribute *attr, char *buf)
3363{
3364 struct il_priv *il = dev_get_drvdata(d);
3365 return sprintf(buf, "%d", il->retry_rate);
3366}
3367
3368static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, il3945_show_retry_rate,
3369 il3945_store_retry_rate);
3370
3371
3372static ssize_t il3945_show_channels(struct device *d,
3373 struct device_attribute *attr, char *buf)
3374{
3375 /* all this shit doesn't belong into sysfs anyway */
3376 return 0;
3377}
3378
3379static DEVICE_ATTR(channels, S_IRUSR, il3945_show_channels, NULL);
3380
3381static ssize_t il3945_show_antenna(struct device *d,
3382 struct device_attribute *attr, char *buf)
3383{
3384 struct il_priv *il = dev_get_drvdata(d);
3385
3386 if (!il_is_alive(il))
3387 return -EAGAIN;
3388
3389 return sprintf(buf, "%d\n", il3945_mod_params.antenna);
3390}
3391
3392static ssize_t il3945_store_antenna(struct device *d,
3393 struct device_attribute *attr,
3394 const char *buf, size_t count)
3395{
3396 struct il_priv *il __maybe_unused = dev_get_drvdata(d);
3397 int ant;
3398
3399 if (count == 0)
3400 return 0;
3401
3402 if (sscanf(buf, "%1i", &ant) != 1) {
3403 D_INFO("not in hex or decimal form.\n");
3404 return count;
3405 }
3406
3407 if (ant >= 0 && ant <= 2) {
3408 D_INFO("Setting antenna select to %d.\n", ant);
3409 il3945_mod_params.antenna = (enum il3945_antenna)ant;
3410 } else
3411 D_INFO("Bad antenna select value %d.\n", ant);
3412
3413
3414 return count;
3415}
3416
3417static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, il3945_show_antenna, il3945_store_antenna);
3418
3419static ssize_t il3945_show_status(struct device *d,
3420 struct device_attribute *attr, char *buf)
3421{
3422 struct il_priv *il = dev_get_drvdata(d);
3423 if (!il_is_alive(il))
3424 return -EAGAIN;
3425 return sprintf(buf, "0x%08x\n", (int)il->status);
3426}
3427
3428static DEVICE_ATTR(status, S_IRUGO, il3945_show_status, NULL);
3429
3430static ssize_t il3945_dump_error_log(struct device *d,
3431 struct device_attribute *attr,
3432 const char *buf, size_t count)
3433{
3434 struct il_priv *il = dev_get_drvdata(d);
3435 char *p = (char *)buf;
3436
3437 if (p[0] == '1')
3438 il3945_dump_nic_error_log(il);
3439
3440 return strnlen(buf, count);
3441}
3442
3443static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, il3945_dump_error_log);
3444
3445/*****************************************************************************
3446 *
3447 * driver setup and tear down
3448 *
3449 *****************************************************************************/
3450
3451static void il3945_setup_deferred_work(struct il_priv *il)
3452{
3453 il->workqueue = create_singlethread_workqueue(DRV_NAME);
3454
3455 init_waitqueue_head(&il->wait_command_queue);
3456
3457 INIT_WORK(&il->restart, il3945_bg_restart);
3458 INIT_WORK(&il->rx_replenish, il3945_bg_rx_replenish);
3459 INIT_DELAYED_WORK(&il->init_alive_start, il3945_bg_init_alive_start);
3460 INIT_DELAYED_WORK(&il->alive_start, il3945_bg_alive_start);
3461 INIT_DELAYED_WORK(&il->_3945.rfkill_poll, il3945_rfkill_poll);
3462
3463 il_setup_scan_deferred_work(il);
3464
3465 il3945_hw_setup_deferred_work(il);
3466
3467 init_timer(&il->watchdog);
3468 il->watchdog.data = (unsigned long)il;
3469 il->watchdog.function = il_bg_watchdog;
3470
3471 tasklet_init(&il->irq_tasklet, (void (*)(unsigned long))
3472 il3945_irq_tasklet, (unsigned long)il);
3473}
3474
3475static void il3945_cancel_deferred_work(struct il_priv *il)
3476{
3477 il3945_hw_cancel_deferred_work(il);
3478
3479 cancel_delayed_work_sync(&il->init_alive_start);
3480 cancel_delayed_work(&il->alive_start);
3481
3482 il_cancel_scan_deferred_work(il);
3483}
3484
3485static struct attribute *il3945_sysfs_entries[] = {
3486 &dev_attr_antenna.attr,
3487 &dev_attr_channels.attr,
3488 &dev_attr_dump_errors.attr,
3489 &dev_attr_flags.attr,
3490 &dev_attr_filter_flags.attr,
3491 &dev_attr_measurement.attr,
3492 &dev_attr_retry_rate.attr,
3493 &dev_attr_status.attr,
3494 &dev_attr_temperature.attr,
3495 &dev_attr_tx_power.attr,
3496#ifdef CONFIG_IWLEGACY_DEBUG
3497 &dev_attr_debug_level.attr,
3498#endif
3499 NULL
3500};
3501
3502static struct attribute_group il3945_attribute_group = {
3503 .name = NULL, /* put in device directory */
3504 .attrs = il3945_sysfs_entries,
3505};
3506
3507struct ieee80211_ops il3945_hw_ops = {
3508 .tx = il3945_mac_tx,
3509 .start = il3945_mac_start,
3510 .stop = il3945_mac_stop,
3511 .add_interface = il_mac_add_interface,
3512 .remove_interface = il_mac_remove_interface,
3513 .change_interface = il_mac_change_interface,
3514 .config = il_mac_config,
3515 .configure_filter = il3945_configure_filter,
3516 .set_key = il3945_mac_set_key,
3517 .conf_tx = il_mac_conf_tx,
3518 .reset_tsf = il_mac_reset_tsf,
3519 .bss_info_changed = il_mac_bss_info_changed,
3520 .hw_scan = il_mac_hw_scan,
3521 .sta_add = il3945_mac_sta_add,
3522 .sta_remove = il_mac_sta_remove,
3523 .tx_last_beacon = il_mac_tx_last_beacon,
3524};
3525
3526static int il3945_init_drv(struct il_priv *il)
3527{
3528 int ret;
3529 struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
3530
3531 il->retry_rate = 1;
3532 il->beacon_skb = NULL;
3533
3534 spin_lock_init(&il->sta_lock);
3535 spin_lock_init(&il->hcmd_lock);
3536
3537 INIT_LIST_HEAD(&il->free_frames);
3538
3539 mutex_init(&il->mutex);
3540
3541 il->ieee_channels = NULL;
3542 il->ieee_rates = NULL;
3543 il->band = IEEE80211_BAND_2GHZ;
3544
3545 il->iw_mode = NL80211_IFTYPE_STATION;
3546 il->missed_beacon_threshold = IL_MISSED_BEACON_THRESHOLD_DEF;
3547
3548 /* initialize force reset */
3549 il->force_reset.reset_duration = IL_DELAY_NEXT_FORCE_FW_RELOAD;
3550
3551 if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
3552 IL_WARN("Unsupported EEPROM version: 0x%04X\n",
3553 eeprom->version);
3554 ret = -EINVAL;
3555 goto err;
3556 }
3557 ret = il_init_channel_map(il);
3558 if (ret) {
3559 IL_ERR("initializing regulatory failed: %d\n", ret);
3560 goto err;
3561 }
3562
3563 /* Set up txpower settings in driver for all channels */
3564 if (il3945_txpower_set_from_eeprom(il)) {
3565 ret = -EIO;
3566 goto err_free_channel_map;
3567 }
3568
3569 ret = il_init_geos(il);
3570 if (ret) {
3571 IL_ERR("initializing geos failed: %d\n", ret);
3572 goto err_free_channel_map;
3573 }
3574 il3945_init_hw_rates(il, il->ieee_rates);
3575
3576 return 0;
3577
3578err_free_channel_map:
3579 il_free_channel_map(il);
3580err:
3581 return ret;
3582}
3583
3584#define IL3945_MAX_PROBE_REQUEST 200
3585
3586static int il3945_setup_mac(struct il_priv *il)
3587{
3588 int ret;
3589 struct ieee80211_hw *hw = il->hw;
3590
3591 hw->rate_control_algorithm = "iwl-3945-rs";
3592 hw->sta_data_size = sizeof(struct il3945_sta_priv);
3593 hw->vif_data_size = sizeof(struct il_vif_priv);
3594
3595 /* Tell mac80211 our characteristics */
3596 hw->flags = IEEE80211_HW_SIGNAL_DBM |
3597 IEEE80211_HW_SPECTRUM_MGMT;
3598
3599 hw->wiphy->interface_modes =
3600 il->ctx.interface_modes;
3601
3602 hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY |
3603 WIPHY_FLAG_DISABLE_BEACON_HINTS |
3604 WIPHY_FLAG_IBSS_RSN;
3605
3606 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
3607 /* we create the 802.11 header and a zero-length SSID element */
3608 hw->wiphy->max_scan_ie_len = IL3945_MAX_PROBE_REQUEST - 24 - 2;
3609
3610 /* Default value; 4 EDCA QOS priorities */
3611 hw->queues = 4;
3612
3613 if (il->bands[IEEE80211_BAND_2GHZ].n_channels)
3614 il->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
3615 &il->bands[IEEE80211_BAND_2GHZ];
3616
3617 if (il->bands[IEEE80211_BAND_5GHZ].n_channels)
3618 il->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
3619 &il->bands[IEEE80211_BAND_5GHZ];
3620
3621 il_leds_init(il);
3622
3623 ret = ieee80211_register_hw(il->hw);
3624 if (ret) {
3625 IL_ERR("Failed to register hw (error %d)\n", ret);
3626 return ret;
3627 }
3628 il->mac80211_registered = 1;
3629
3630 return 0;
3631}
3632
3633static int il3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3634{
3635 int err = 0;
3636 struct il_priv *il;
3637 struct ieee80211_hw *hw;
3638 struct il_cfg *cfg = (struct il_cfg *)(ent->driver_data);
3639 struct il3945_eeprom *eeprom;
3640 unsigned long flags;
3641
3642 /***********************
3643 * 1. Allocating HW data
3644 * ********************/
3645
3646 /* mac80211 allocates memory for this device instance, including
3647 * space for this driver's ilate structure */
3648 hw = il_alloc_all(cfg);
3649 if (hw == NULL) {
3650 pr_err("Can not allocate network device\n");
3651 err = -ENOMEM;
3652 goto out;
3653 }
3654 il = hw->priv;
3655 SET_IEEE80211_DEV(hw, &pdev->dev);
3656
3657 il->cmd_queue = IL39_CMD_QUEUE_NUM;
3658
3659 il->ctx.ctxid = 0;
3660
3661 il->ctx.rxon_cmd = REPLY_RXON;
3662 il->ctx.rxon_timing_cmd = REPLY_RXON_TIMING;
3663 il->ctx.rxon_assoc_cmd = REPLY_RXON_ASSOC;
3664 il->ctx.qos_cmd = REPLY_QOS_PARAM;
3665 il->ctx.ap_sta_id = IL_AP_ID;
3666 il->ctx.wep_key_cmd = REPLY_WEPKEY;
3667 il->ctx.interface_modes =
3668 BIT(NL80211_IFTYPE_STATION) |
3669 BIT(NL80211_IFTYPE_ADHOC);
3670 il->ctx.ibss_devtype = RXON_DEV_TYPE_IBSS;
3671 il->ctx.station_devtype = RXON_DEV_TYPE_ESS;
3672 il->ctx.unused_devtype = RXON_DEV_TYPE_ESS;
3673
3674 /*
3675 * Disabling hardware scan means that mac80211 will perform scans
3676 * "the hard way", rather than using device's scan.
3677 */
3678 if (il3945_mod_params.disable_hw_scan) {
3679 D_INFO("Disabling hw_scan\n");
3680 il3945_hw_ops.hw_scan = NULL;
3681 }
3682
3683 D_INFO("*** LOAD DRIVER ***\n");
3684 il->cfg = cfg;
3685 il->pci_dev = pdev;
3686 il->inta_mask = CSR_INI_SET_MASK;
3687
3688 if (il_alloc_traffic_mem(il))
3689 IL_ERR("Not enough memory to generate traffic log\n");
3690
3691 /***************************
3692 * 2. Initializing PCI bus
3693 * *************************/
3694 pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
3695 PCIE_LINK_STATE_CLKPM);
3696
3697 if (pci_enable_device(pdev)) {
3698 err = -ENODEV;
3699 goto out_ieee80211_free_hw;
3700 }
3701
3702 pci_set_master(pdev);
3703
3704 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3705 if (!err)
3706 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3707 if (err) {
3708 IL_WARN("No suitable DMA available.\n");
3709 goto out_pci_disable_device;
3710 }
3711
3712 pci_set_drvdata(pdev, il);
3713 err = pci_request_regions(pdev, DRV_NAME);
3714 if (err)
3715 goto out_pci_disable_device;
3716
3717 /***********************
3718 * 3. Read REV Register
3719 * ********************/
3720 il->hw_base = pci_iomap(pdev, 0, 0);
3721 if (!il->hw_base) {
3722 err = -ENODEV;
3723 goto out_pci_release_regions;
3724 }
3725
3726 D_INFO("pci_resource_len = 0x%08llx\n",
3727 (unsigned long long) pci_resource_len(pdev, 0));
3728 D_INFO("pci_resource_base = %p\n", il->hw_base);
3729
3730 /* We disable the RETRY_TIMEOUT register (0x41) to keep
3731 * PCI Tx retries from interfering with C3 CPU state */
3732 pci_write_config_byte(pdev, 0x41, 0x00);
3733
3734 /* these spin locks will be used in apm_ops.init and EEPROM access
3735 * we should init now
3736 */
3737 spin_lock_init(&il->reg_lock);
3738 spin_lock_init(&il->lock);
3739
3740 /*
3741 * stop and reset the on-board processor just in case it is in a
3742 * strange state ... like being left stranded by a primary kernel
3743 * and this is now the kdump kernel trying to start up
3744 */
3745 _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
3746
3747 /***********************
3748 * 4. Read EEPROM
3749 * ********************/
3750
3751 /* Read the EEPROM */
3752 err = il_eeprom_init(il);
3753 if (err) {
3754 IL_ERR("Unable to init EEPROM\n");
3755 goto out_iounmap;
3756 }
3757 /* MAC Address location in EEPROM same for 3945/4965 */
3758 eeprom = (struct il3945_eeprom *)il->eeprom;
3759 D_INFO("MAC address: %pM\n", eeprom->mac_address);
3760 SET_IEEE80211_PERM_ADDR(il->hw, eeprom->mac_address);
3761
3762 /***********************
3763 * 5. Setup HW Constants
3764 * ********************/
3765 /* Device-specific setup */
3766 if (il3945_hw_set_hw_params(il)) {
3767 IL_ERR("failed to set hw settings\n");
3768 goto out_eeprom_free;
3769 }
3770
3771 /***********************
3772 * 6. Setup il
3773 * ********************/
3774
3775 err = il3945_init_drv(il);
3776 if (err) {
3777 IL_ERR("initializing driver failed\n");
3778 goto out_unset_hw_params;
3779 }
3780
3781 IL_INFO("Detected Intel Wireless WiFi Link %s\n",
3782 il->cfg->name);
3783
3784 /***********************
3785 * 7. Setup Services
3786 * ********************/
3787
3788 spin_lock_irqsave(&il->lock, flags);
3789 il_disable_interrupts(il);
3790 spin_unlock_irqrestore(&il->lock, flags);
3791
3792 pci_enable_msi(il->pci_dev);
3793
3794 err = request_irq(il->pci_dev->irq, il_isr,
3795 IRQF_SHARED, DRV_NAME, il);
3796 if (err) {
3797 IL_ERR("Error allocating IRQ %d\n", il->pci_dev->irq);
3798 goto out_disable_msi;
3799 }
3800
3801 err = sysfs_create_group(&pdev->dev.kobj, &il3945_attribute_group);
3802 if (err) {
3803 IL_ERR("failed to create sysfs device attributes\n");
3804 goto out_release_irq;
3805 }
3806
3807 il_set_rxon_channel(il,
3808 &il->bands[IEEE80211_BAND_2GHZ].channels[5],
3809 &il->ctx);
3810 il3945_setup_deferred_work(il);
3811 il3945_setup_rx_handlers(il);
3812 il_power_initialize(il);
3813
3814 /*********************************
3815 * 8. Setup and Register mac80211
3816 * *******************************/
3817
3818 il_enable_interrupts(il);
3819
3820 err = il3945_setup_mac(il);
3821 if (err)
3822 goto out_remove_sysfs;
3823
3824 err = il_dbgfs_register(il, DRV_NAME);
3825 if (err)
3826 IL_ERR("failed to create debugfs files. Ignoring error: %d\n", err);
3827
3828 /* Start monitoring the killswitch */
3829 queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll,
3830 2 * HZ);
3831
3832 return 0;
3833
3834 out_remove_sysfs:
3835 destroy_workqueue(il->workqueue);
3836 il->workqueue = NULL;
3837 sysfs_remove_group(&pdev->dev.kobj, &il3945_attribute_group);
3838 out_release_irq:
3839 free_irq(il->pci_dev->irq, il);
3840 out_disable_msi:
3841 pci_disable_msi(il->pci_dev);
3842 il_free_geos(il);
3843 il_free_channel_map(il);
3844 out_unset_hw_params:
3845 il3945_unset_hw_params(il);
3846 out_eeprom_free:
3847 il_eeprom_free(il);
3848 out_iounmap:
3849 pci_iounmap(pdev, il->hw_base);
3850 out_pci_release_regions:
3851 pci_release_regions(pdev);
3852 out_pci_disable_device:
3853 pci_set_drvdata(pdev, NULL);
3854 pci_disable_device(pdev);
3855 out_ieee80211_free_hw:
3856 il_free_traffic_mem(il);
3857 ieee80211_free_hw(il->hw);
3858 out:
3859 return err;
3860}
3861
3862static void __devexit il3945_pci_remove(struct pci_dev *pdev)
3863{
3864 struct il_priv *il = pci_get_drvdata(pdev);
3865 unsigned long flags;
3866
3867 if (!il)
3868 return;
3869
3870 D_INFO("*** UNLOAD DRIVER ***\n");
3871
3872 il_dbgfs_unregister(il);
3873
3874 set_bit(STATUS_EXIT_PENDING, &il->status);
3875
3876 il_leds_exit(il);
3877
3878 if (il->mac80211_registered) {
3879 ieee80211_unregister_hw(il->hw);
3880 il->mac80211_registered = 0;
3881 } else {
3882 il3945_down(il);
3883 }
3884
3885 /*
3886 * Make sure device is reset to low power before unloading driver.
3887 * This may be redundant with il_down(), but there are paths to
3888 * run il_down() without calling apm_ops.stop(), and there are
3889 * paths to avoid running il_down() at all before leaving driver.
3890 * This (inexpensive) call *makes sure* device is reset.
3891 */
3892 il_apm_stop(il);
3893
3894 /* make sure we flush any pending irq or
3895 * tasklet for the driver
3896 */
3897 spin_lock_irqsave(&il->lock, flags);
3898 il_disable_interrupts(il);
3899 spin_unlock_irqrestore(&il->lock, flags);
3900
3901 il3945_synchronize_irq(il);
3902
3903 sysfs_remove_group(&pdev->dev.kobj, &il3945_attribute_group);
3904
3905 cancel_delayed_work_sync(&il->_3945.rfkill_poll);
3906
3907 il3945_dealloc_ucode_pci(il);
3908
3909 if (il->rxq.bd)
3910 il3945_rx_queue_free(il, &il->rxq);
3911 il3945_hw_txq_ctx_free(il);
3912
3913 il3945_unset_hw_params(il);
3914
3915 /*netif_stop_queue(dev); */
3916 flush_workqueue(il->workqueue);
3917
3918 /* ieee80211_unregister_hw calls il3945_mac_stop, which flushes
3919 * il->workqueue... so we can't take down the workqueue
3920 * until now... */
3921 destroy_workqueue(il->workqueue);
3922 il->workqueue = NULL;
3923 il_free_traffic_mem(il);
3924
3925 free_irq(pdev->irq, il);
3926 pci_disable_msi(pdev);
3927
3928 pci_iounmap(pdev, il->hw_base);
3929 pci_release_regions(pdev);
3930 pci_disable_device(pdev);
3931 pci_set_drvdata(pdev, NULL);
3932
3933 il_free_channel_map(il);
3934 il_free_geos(il);
3935 kfree(il->scan_cmd);
3936 if (il->beacon_skb)
3937 dev_kfree_skb(il->beacon_skb);
3938
3939 ieee80211_free_hw(il->hw);
3940}
3941
3942
3943/*****************************************************************************
3944 *
3945 * driver and module entry point
3946 *
3947 *****************************************************************************/
3948
3949static struct pci_driver il3945_driver = {
3950 .name = DRV_NAME,
3951 .id_table = il3945_hw_card_ids,
3952 .probe = il3945_pci_probe,
3953 .remove = __devexit_p(il3945_pci_remove),
3954 .driver.pm = IL_LEGACY_PM_OPS,
3955};
3956
3957static int __init il3945_init(void)
3958{
3959
3960 int ret;
3961 pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n");
3962 pr_info(DRV_COPYRIGHT "\n");
3963
3964 ret = il3945_rate_control_register();
3965 if (ret) {
3966 pr_err("Unable to register rate control algorithm: %d\n", ret);
3967 return ret;
3968 }
3969
3970 ret = pci_register_driver(&il3945_driver);
3971 if (ret) {
3972 pr_err("Unable to initialize PCI module\n");
3973 goto error_register;
3974 }
3975
3976 return ret;
3977
3978error_register:
3979 il3945_rate_control_unregister();
3980 return ret;
3981}
3982
3983static void __exit il3945_exit(void)
3984{
3985 pci_unregister_driver(&il3945_driver);
3986 il3945_rate_control_unregister();
3987}
3988
3989MODULE_FIRMWARE(IL3945_MODULE_FIRMWARE(IL3945_UCODE_API_MAX));
3990
3991module_param_named(antenna, il3945_mod_params.antenna, int, S_IRUGO);
3992MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
3993module_param_named(swcrypto, il3945_mod_params.sw_crypto, int, S_IRUGO);
3994MODULE_PARM_DESC(swcrypto,
3995 "using software crypto (default 1 [software])");
3996module_param_named(disable_hw_scan, il3945_mod_params.disable_hw_scan,
3997 int, S_IRUGO);
3998MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 1)");
3999#ifdef CONFIG_IWLEGACY_DEBUG
4000module_param_named(debug, il_debug_level, uint, S_IRUGO | S_IWUSR);
4001MODULE_PARM_DESC(debug, "debug output mask");
4002#endif
4003module_param_named(fw_restart, il3945_mod_params.restart_fw, int, S_IRUGO);
4004MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");
4005
4006module_exit(il3945_exit);
4007module_init(il3945_init);
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-01 12:55:07 -0500