aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/net/wireless/brcm80211
diff options
context:
space:
mode:
authorFranky Lin <frankyl@broadcom.com>2011-11-04 17:23:31 -0400
committerJohn W. Linville <linville@tuxdriver.com>2011-11-09 16:13:58 -0500
commit2d4a9af172814b76bf2ad5da2213ea42d111893b (patch)
tree3f5ab448be1da5f7e1e48a587c3467856b719672 /drivers/net/wireless/brcm80211
parent5b45e54e77cc29a760461ca64cf143ffa49493b6 (diff)
brcm80211: fmac: move core disable function to sdio_chip.c
This patch is part of the abstracting chip backplane handle code series. Reviewed-by: Arend van Spriel <arend@broadcom.com> Signed-off-by: Franky Lin <frankyl@broadcom.com> Signed-off-by: Arend van Spriel <arend@broadcom.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/brcm80211')
-rw-r--r--drivers/net/wireless/brcm80211/brcmfmac/dhd_sdio.c117
-rw-r--r--drivers/net/wireless/brcm80211/brcmfmac/sdio_chip.c80
-rw-r--r--drivers/net/wireless/brcm80211/brcmfmac/sdio_chip.h28
3 files changed, 111 insertions, 114 deletions
diff --git a/drivers/net/wireless/brcm80211/brcmfmac/dhd_sdio.c b/drivers/net/wireless/brcm80211/brcmfmac/dhd_sdio.c
index 9a78cc3e2820..af0d5c96984f 100644
--- a/drivers/net/wireless/brcm80211/brcmfmac/dhd_sdio.c
+++ b/drivers/net/wireless/brcm80211/brcmfmac/dhd_sdio.c
@@ -309,38 +309,6 @@ struct rte_console {
309/* Flags for SDH calls */ 309/* Flags for SDH calls */
310#define F2SYNC (SDIO_REQ_4BYTE | SDIO_REQ_FIXED) 310#define F2SYNC (SDIO_REQ_4BYTE | SDIO_REQ_FIXED)
311 311
312/* sbimstate */
313#define SBIM_IBE 0x20000 /* inbanderror */
314#define SBIM_TO 0x40000 /* timeout */
315#define SBIM_BY 0x01800000 /* busy (sonics >= 2.3) */
316#define SBIM_RJ 0x02000000 /* reject (sonics >= 2.3) */
317
318/* sbtmstatelow */
319
320/* reset */
321#define SBTML_RESET 0x0001
322/* reject field */
323#define SBTML_REJ_MASK 0x0006
324/* reject */
325#define SBTML_REJ 0x0002
326/* temporary reject, for error recovery */
327#define SBTML_TMPREJ 0x0004
328
329/* Shift to locate the SI control flags in sbtml */
330#define SBTML_SICF_SHIFT 16
331
332/* sbtmstatehigh */
333#define SBTMH_SERR 0x0001 /* serror */
334#define SBTMH_INT 0x0002 /* interrupt */
335#define SBTMH_BUSY 0x0004 /* busy */
336#define SBTMH_TO 0x0020 /* timeout (sonics >= 2.3) */
337
338/* Shift to locate the SI status flags in sbtmh */
339#define SBTMH_SISF_SHIFT 16
340
341/* sbidlow */
342#define SBIDL_INIT 0x80 /* initiator */
343
344/* 312/*
345 * Conversion of 802.1D priority to precedence level 313 * Conversion of 802.1D priority to precedence level
346 */ 314 */
@@ -3123,85 +3091,6 @@ static int brcmf_sdbrcm_write_vars(struct brcmf_bus *bus)
3123} 3091}
3124 3092
3125static void 3093static void
3126brcmf_sdbrcm_chip_disablecore(struct brcmf_sdio_dev *sdiodev, u32 corebase)
3127{
3128 u32 regdata;
3129
3130 regdata = brcmf_sdcard_reg_read(sdiodev,
3131 CORE_SB(corebase, sbtmstatelow), 4);
3132 if (regdata & SBTML_RESET)
3133 return;
3134
3135 regdata = brcmf_sdcard_reg_read(sdiodev,
3136 CORE_SB(corebase, sbtmstatelow), 4);
3137 if ((regdata & (SICF_CLOCK_EN << SBTML_SICF_SHIFT)) != 0) {
3138 /*
3139 * set target reject and spin until busy is clear
3140 * (preserve core-specific bits)
3141 */
3142 regdata = brcmf_sdcard_reg_read(sdiodev,
3143 CORE_SB(corebase, sbtmstatelow), 4);
3144 brcmf_sdcard_reg_write(sdiodev, CORE_SB(corebase, sbtmstatelow),
3145 4, regdata | SBTML_REJ);
3146
3147 regdata = brcmf_sdcard_reg_read(sdiodev,
3148 CORE_SB(corebase, sbtmstatelow), 4);
3149 udelay(1);
3150 SPINWAIT((brcmf_sdcard_reg_read(sdiodev,
3151 CORE_SB(corebase, sbtmstatehigh), 4) &
3152 SBTMH_BUSY), 100000);
3153
3154 regdata = brcmf_sdcard_reg_read(sdiodev,
3155 CORE_SB(corebase, sbtmstatehigh), 4);
3156 if (regdata & SBTMH_BUSY)
3157 brcmf_dbg(ERROR, "ARM core still busy\n");
3158
3159 regdata = brcmf_sdcard_reg_read(sdiodev,
3160 CORE_SB(corebase, sbidlow), 4);
3161 if (regdata & SBIDL_INIT) {
3162 regdata = brcmf_sdcard_reg_read(sdiodev,
3163 CORE_SB(corebase, sbimstate), 4) |
3164 SBIM_RJ;
3165 brcmf_sdcard_reg_write(sdiodev,
3166 CORE_SB(corebase, sbimstate), 4,
3167 regdata);
3168 regdata = brcmf_sdcard_reg_read(sdiodev,
3169 CORE_SB(corebase, sbimstate), 4);
3170 udelay(1);
3171 SPINWAIT((brcmf_sdcard_reg_read(sdiodev,
3172 CORE_SB(corebase, sbimstate), 4) &
3173 SBIM_BY), 100000);
3174 }
3175
3176 /* set reset and reject while enabling the clocks */
3177 brcmf_sdcard_reg_write(sdiodev,
3178 CORE_SB(corebase, sbtmstatelow), 4,
3179 (((SICF_FGC | SICF_CLOCK_EN) << SBTML_SICF_SHIFT) |
3180 SBTML_REJ | SBTML_RESET));
3181 regdata = brcmf_sdcard_reg_read(sdiodev,
3182 CORE_SB(corebase, sbtmstatelow), 4);
3183 udelay(10);
3184
3185 /* clear the initiator reject bit */
3186 regdata = brcmf_sdcard_reg_read(sdiodev,
3187 CORE_SB(corebase, sbidlow), 4);
3188 if (regdata & SBIDL_INIT) {
3189 regdata = brcmf_sdcard_reg_read(sdiodev,
3190 CORE_SB(corebase, sbimstate), 4) &
3191 ~SBIM_RJ;
3192 brcmf_sdcard_reg_write(sdiodev,
3193 CORE_SB(corebase, sbimstate), 4,
3194 regdata);
3195 }
3196 }
3197
3198 /* leave reset and reject asserted */
3199 brcmf_sdcard_reg_write(sdiodev, CORE_SB(corebase, sbtmstatelow), 4,
3200 (SBTML_REJ | SBTML_RESET));
3201 udelay(1);
3202}
3203
3204static void
3205brcmf_sdbrcm_chip_resetcore(struct brcmf_sdio_dev *sdiodev, u32 corebase) 3094brcmf_sdbrcm_chip_resetcore(struct brcmf_sdio_dev *sdiodev, u32 corebase)
3206{ 3095{
3207 u32 regdata; 3096 u32 regdata;
@@ -3210,7 +3099,7 @@ brcmf_sdbrcm_chip_resetcore(struct brcmf_sdio_dev *sdiodev, u32 corebase)
3210 * Must do the disable sequence first to work for 3099 * Must do the disable sequence first to work for
3211 * arbitrary current core state. 3100 * arbitrary current core state.
3212 */ 3101 */
3213 brcmf_sdbrcm_chip_disablecore(sdiodev, corebase); 3102 brcmf_sdio_chip_coredisable(sdiodev, corebase);
3214 3103
3215 /* 3104 /*
3216 * Now do the initialization sequence. 3105 * Now do the initialization sequence.
@@ -3258,7 +3147,7 @@ static int brcmf_sdbrcm_download_state(struct brcmf_bus *bus, bool enter)
3258 if (enter) { 3147 if (enter) {
3259 bus->alp_only = true; 3148 bus->alp_only = true;
3260 3149
3261 brcmf_sdbrcm_chip_disablecore(bus->sdiodev, 3150 brcmf_sdio_chip_coredisable(bus->sdiodev,
3262 bus->ci->armcorebase); 3151 bus->ci->armcorebase);
3263 3152
3264 brcmf_sdbrcm_chip_resetcore(bus->sdiodev, bus->ci->ramcorebase); 3153 brcmf_sdbrcm_chip_resetcore(bus->sdiodev, bus->ci->ramcorebase);
@@ -4000,7 +3889,7 @@ brcmf_sdbrcm_chip_attach(struct brcmf_bus *bus, u32 regs)
4000 * Make sure any on-chip ARM is off (in case strapping is wrong), 3889 * Make sure any on-chip ARM is off (in case strapping is wrong),
4001 * or downloaded code was already running. 3890 * or downloaded code was already running.
4002 */ 3891 */
4003 brcmf_sdbrcm_chip_disablecore(bus->sdiodev, ci->armcorebase); 3892 brcmf_sdio_chip_coredisable(bus->sdiodev, ci->armcorebase);
4004 3893
4005 brcmf_sdcard_reg_write(bus->sdiodev, 3894 brcmf_sdcard_reg_write(bus->sdiodev,
4006 CORE_CC_REG(ci->cccorebase, gpiopullup), 4, 0); 3895 CORE_CC_REG(ci->cccorebase, gpiopullup), 4, 0);
diff --git a/drivers/net/wireless/brcm80211/brcmfmac/sdio_chip.c b/drivers/net/wireless/brcm80211/brcmfmac/sdio_chip.c
index 1e01ae254622..f198a48bc2ca 100644
--- a/drivers/net/wireless/brcm80211/brcmfmac/sdio_chip.c
+++ b/drivers/net/wireless/brcm80211/brcmfmac/sdio_chip.c
@@ -22,6 +22,7 @@
22#include <brcm_hw_ids.h> 22#include <brcm_hw_ids.h>
23#include <brcmu_wifi.h> 23#include <brcmu_wifi.h>
24#include <brcmu_utils.h> 24#include <brcmu_utils.h>
25#include <soc.h>
25#include "dhd.h" 26#include "dhd.h"
26#include "dhd_dbg.h" 27#include "dhd_dbg.h"
27#include "sdio_host.h" 28#include "sdio_host.h"
@@ -51,6 +52,85 @@
51#define SBIDH_VC_MASK 0xffff0000 /* vendor code */ 52#define SBIDH_VC_MASK 0xffff0000 /* vendor code */
52#define SBIDH_VC_SHIFT 16 53#define SBIDH_VC_SHIFT 16
53 54
55void
56brcmf_sdio_chip_coredisable(struct brcmf_sdio_dev *sdiodev, u32 corebase)
57{
58 u32 regdata;
59
60 regdata = brcmf_sdcard_reg_read(sdiodev,
61 CORE_SB(corebase, sbtmstatelow), 4);
62 if (regdata & SBTML_RESET)
63 return;
64
65 regdata = brcmf_sdcard_reg_read(sdiodev,
66 CORE_SB(corebase, sbtmstatelow), 4);
67 if ((regdata & (SICF_CLOCK_EN << SBTML_SICF_SHIFT)) != 0) {
68 /*
69 * set target reject and spin until busy is clear
70 * (preserve core-specific bits)
71 */
72 regdata = brcmf_sdcard_reg_read(sdiodev,
73 CORE_SB(corebase, sbtmstatelow), 4);
74 brcmf_sdcard_reg_write(sdiodev, CORE_SB(corebase, sbtmstatelow),
75 4, regdata | SBTML_REJ);
76
77 regdata = brcmf_sdcard_reg_read(sdiodev,
78 CORE_SB(corebase, sbtmstatelow), 4);
79 udelay(1);
80 SPINWAIT((brcmf_sdcard_reg_read(sdiodev,
81 CORE_SB(corebase, sbtmstatehigh), 4) &
82 SBTMH_BUSY), 100000);
83
84 regdata = brcmf_sdcard_reg_read(sdiodev,
85 CORE_SB(corebase, sbtmstatehigh), 4);
86 if (regdata & SBTMH_BUSY)
87 brcmf_dbg(ERROR, "core state still busy\n");
88
89 regdata = brcmf_sdcard_reg_read(sdiodev,
90 CORE_SB(corebase, sbidlow), 4);
91 if (regdata & SBIDL_INIT) {
92 regdata = brcmf_sdcard_reg_read(sdiodev,
93 CORE_SB(corebase, sbimstate), 4) |
94 SBIM_RJ;
95 brcmf_sdcard_reg_write(sdiodev,
96 CORE_SB(corebase, sbimstate), 4,
97 regdata);
98 regdata = brcmf_sdcard_reg_read(sdiodev,
99 CORE_SB(corebase, sbimstate), 4);
100 udelay(1);
101 SPINWAIT((brcmf_sdcard_reg_read(sdiodev,
102 CORE_SB(corebase, sbimstate), 4) &
103 SBIM_BY), 100000);
104 }
105
106 /* set reset and reject while enabling the clocks */
107 brcmf_sdcard_reg_write(sdiodev,
108 CORE_SB(corebase, sbtmstatelow), 4,
109 (((SICF_FGC | SICF_CLOCK_EN) << SBTML_SICF_SHIFT) |
110 SBTML_REJ | SBTML_RESET));
111 regdata = brcmf_sdcard_reg_read(sdiodev,
112 CORE_SB(corebase, sbtmstatelow), 4);
113 udelay(10);
114
115 /* clear the initiator reject bit */
116 regdata = brcmf_sdcard_reg_read(sdiodev,
117 CORE_SB(corebase, sbidlow), 4);
118 if (regdata & SBIDL_INIT) {
119 regdata = brcmf_sdcard_reg_read(sdiodev,
120 CORE_SB(corebase, sbimstate), 4) &
121 ~SBIM_RJ;
122 brcmf_sdcard_reg_write(sdiodev,
123 CORE_SB(corebase, sbimstate), 4,
124 regdata);
125 }
126 }
127
128 /* leave reset and reject asserted */
129 brcmf_sdcard_reg_write(sdiodev, CORE_SB(corebase, sbtmstatelow), 4,
130 (SBTML_REJ | SBTML_RESET));
131 udelay(1);
132}
133
54static int brcmf_sdio_chip_recognition(struct brcmf_sdio_dev *sdiodev, 134static int brcmf_sdio_chip_recognition(struct brcmf_sdio_dev *sdiodev,
55 struct chip_info *ci, u32 regs) 135 struct chip_info *ci, u32 regs)
56{ 136{
diff --git a/drivers/net/wireless/brcm80211/brcmfmac/sdio_chip.h b/drivers/net/wireless/brcm80211/brcmfmac/sdio_chip.h
index 1985e3650559..17007bdad564 100644
--- a/drivers/net/wireless/brcm80211/brcmfmac/sdio_chip.h
+++ b/drivers/net/wireless/brcm80211/brcmfmac/sdio_chip.h
@@ -52,6 +52,31 @@
52#define SBSDIO_CLKAV(regval, alponly) \ 52#define SBSDIO_CLKAV(regval, alponly) \
53 (SBSDIO_ALPAV(regval) && (alponly ? 1 : SBSDIO_HTAV(regval))) 53 (SBSDIO_ALPAV(regval) && (alponly ? 1 : SBSDIO_HTAV(regval)))
54 54
55/* sbimstate */
56#define SBIM_IBE 0x20000 /* inbanderror */
57#define SBIM_TO 0x40000 /* timeout */
58#define SBIM_BY 0x01800000 /* busy (sonics >= 2.3) */
59#define SBIM_RJ 0x02000000 /* reject (sonics >= 2.3) */
60
61/* sbtmstatelow */
62#define SBTML_RESET 0x0001 /* reset */
63#define SBTML_REJ_MASK 0x0006 /* reject field */
64#define SBTML_REJ 0x0002 /* reject */
65#define SBTML_TMPREJ 0x0004 /* temporary reject(error recovery) */
66/* Shift to locate the SI control flags in sbtml */
67#define SBTML_SICF_SHIFT 16
68
69/* sbtmstatehigh */
70#define SBTMH_SERR 0x0001 /* serror */
71#define SBTMH_INT 0x0002 /* interrupt */
72#define SBTMH_BUSY 0x0004 /* busy */
73#define SBTMH_TO 0x0020 /* timeout (sonics >= 2.3) */
74/* Shift to locate the SI status flags in sbtmh */
75#define SBTMH_SISF_SHIFT 16
76
77/* sbidlow */
78#define SBIDL_INIT 0x80 /* initiator */
79
55struct chip_info { 80struct chip_info {
56 u32 chip; 81 u32 chip;
57 u32 chiprev; 82 u32 chiprev;
@@ -108,6 +133,9 @@ struct sbconfig {
108 u32 sbidhigh; /* identification */ 133 u32 sbidhigh; /* identification */
109}; 134};
110 135
136
137extern void brcmf_sdio_chip_coredisable(struct brcmf_sdio_dev *sdiodev,
138 u32 corebase);
111extern int brcmf_sdio_chip_attach(struct brcmf_sdio_dev *sdiodev, 139extern int brcmf_sdio_chip_attach(struct brcmf_sdio_dev *sdiodev,
112 struct chip_info *ci, u32 regs); 140 struct chip_info *ci, u32 regs);
113 141
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-27 20:25:36 -0500