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authorJohn W. Linville <linville@tuxdriver.com>2010-10-15 16:11:56 -0400
committerJohn W. Linville <linville@tuxdriver.com>2010-10-15 16:11:56 -0400
commitc64557d666eb62eb5f296c6b93bd0a5525ed1e36 (patch)
tree1e25cc32521d06ae876de18bb8e48b3cf9d30808 /drivers/net/wireless/b43
parent1a63c353c856c9f6d44a533afb6ad6dbbcdea683 (diff)
parent0d91f22b75347d9503b17a42b6c74d3f7750acd6 (diff)
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-next-2.6 into for-davem
Diffstat (limited to 'drivers/net/wireless/b43')
-rw-r--r--drivers/net/wireless/b43/Makefile2
-rw-r--r--drivers/net/wireless/b43/phy_common.h5
-rw-r--r--drivers/net/wireless/b43/phy_n.c128
-rw-r--r--drivers/net/wireless/b43/phy_n.h218
-rw-r--r--drivers/net/wireless/b43/radio_2055.c1332
-rw-r--r--drivers/net/wireless/b43/radio_2055.h254
-rw-r--r--drivers/net/wireless/b43/radio_2056.c43
-rw-r--r--drivers/net/wireless/b43/radio_2056.h42
-rw-r--r--drivers/net/wireless/b43/tables_nphy.c1311
-rw-r--r--drivers/net/wireless/b43/tables_nphy.h59
10 files changed, 1746 insertions, 1648 deletions
diff --git a/drivers/net/wireless/b43/Makefile b/drivers/net/wireless/b43/Makefile
index 5e83b6f0a3a0..69d4af09a6cb 100644
--- a/drivers/net/wireless/b43/Makefile
+++ b/drivers/net/wireless/b43/Makefile
@@ -1,6 +1,8 @@
1b43-y += main.o 1b43-y += main.o
2b43-y += tables.o 2b43-y += tables.o
3b43-$(CONFIG_B43_NPHY) += tables_nphy.o 3b43-$(CONFIG_B43_NPHY) += tables_nphy.o
4b43-$(CONFIG_B43_NPHY) += radio_2055.o
5b43-$(CONFIG_B43_NPHY) += radio_2056.o
4b43-y += phy_common.o 6b43-y += phy_common.o
5b43-y += phy_g.o 7b43-y += phy_g.o
6b43-y += phy_a.o 8b43-y += phy_a.o
diff --git a/drivers/net/wireless/b43/phy_common.h b/drivers/net/wireless/b43/phy_common.h
index bd480b481bfc..0e6194228845 100644
--- a/drivers/net/wireless/b43/phy_common.h
+++ b/drivers/net/wireless/b43/phy_common.h
@@ -2,6 +2,7 @@
2#define LINUX_B43_PHY_COMMON_H_ 2#define LINUX_B43_PHY_COMMON_H_
3 3
4#include <linux/types.h> 4#include <linux/types.h>
5#include <linux/nl80211.h>
5 6
6struct b43_wldev; 7struct b43_wldev;
7 8
@@ -250,8 +251,10 @@ struct b43_phy {
250 * check is needed. */ 251 * check is needed. */
251 unsigned long next_txpwr_check_time; 252 unsigned long next_txpwr_check_time;
252 253
253 /* current channel */ 254 /* Current channel */
254 unsigned int channel; 255 unsigned int channel;
256 u16 channel_freq;
257 enum nl80211_channel_type channel_type;
255 258
256 /* PHY TX errors counter. */ 259 /* PHY TX errors counter. */
257 atomic_t txerr_cnt; 260 atomic_t txerr_cnt;
diff --git a/drivers/net/wireless/b43/phy_n.c b/drivers/net/wireless/b43/phy_n.c
index f575e757caeb..dfec5496055e 100644
--- a/drivers/net/wireless/b43/phy_n.c
+++ b/drivers/net/wireless/b43/phy_n.c
@@ -29,6 +29,8 @@
29#include "b43.h" 29#include "b43.h"
30#include "phy_n.h" 30#include "phy_n.h"
31#include "tables_nphy.h" 31#include "tables_nphy.h"
32#include "radio_2055.h"
33#include "radio_2056.h"
32#include "main.h" 34#include "main.h"
33 35
34struct nphy_txgains { 36struct nphy_txgains {
@@ -74,19 +76,11 @@ static void b43_nphy_rf_control_override(struct b43_wldev *dev, u16 field,
74static void b43_nphy_rf_control_intc_override(struct b43_wldev *dev, u8 field, 76static void b43_nphy_rf_control_intc_override(struct b43_wldev *dev, u8 field,
75 u16 value, u8 core); 77 u16 value, u8 core);
76 78
77static inline bool b43_empty_chanspec(struct b43_chanspec *chanspec) 79static inline bool b43_channel_type_is_40mhz(
80 enum nl80211_channel_type channel_type)
78{ 81{
79 return !chanspec->channel && !chanspec->sideband && 82 return (channel_type == NL80211_CHAN_HT40MINUS ||
80 !chanspec->b_width && !chanspec->b_freq; 83 channel_type == NL80211_CHAN_HT40PLUS);
81}
82
83static inline bool b43_eq_chanspecs(struct b43_chanspec *chanspec1,
84 struct b43_chanspec *chanspec2)
85{
86 return (chanspec1->channel == chanspec2->channel &&
87 chanspec1->sideband == chanspec2->sideband &&
88 chanspec1->b_width == chanspec2->b_width &&
89 chanspec1->b_freq == chanspec2->b_freq);
90} 84}
91 85
92void b43_nphy_set_rxantenna(struct b43_wldev *dev, int antenna) 86void b43_nphy_set_rxantenna(struct b43_wldev *dev, int antenna)
@@ -781,7 +775,7 @@ static void b43_nphy_spur_workaround(struct b43_wldev *dev)
781{ 775{
782 struct b43_phy_n *nphy = dev->phy.n; 776 struct b43_phy_n *nphy = dev->phy.n;
783 777
784 u8 channel = nphy->radio_chanspec.channel; 778 u8 channel = dev->phy.channel;
785 int tone[2] = { 57, 58 }; 779 int tone[2] = { 57, 58 };
786 u32 noise[2] = { 0x3FF, 0x3FF }; 780 u32 noise[2] = { 0x3FF, 0x3FF };
787 781
@@ -855,9 +849,9 @@ static void b43_nphy_adjust_lna_gain_table(struct b43_wldev *dev)
855 gain[0] = 6; 849 gain[0] = 6;
856 gain[1] = 6; 850 gain[1] = 6;
857 } else { 851 } else {
858 tmp = 40370 - 315 * nphy->radio_chanspec.channel; 852 tmp = 40370 - 315 * dev->phy.channel;
859 gain[0] = ((tmp >> 13) + ((tmp >> 12) & 1)); 853 gain[0] = ((tmp >> 13) + ((tmp >> 12) & 1));
860 tmp = 23242 - 224 * nphy->radio_chanspec.channel; 854 tmp = 23242 - 224 * dev->phy.channel;
861 gain[1] = ((tmp >> 13) + ((tmp >> 12) & 1)); 855 gain[1] = ((tmp >> 13) + ((tmp >> 12) & 1));
862 } 856 }
863 } else { 857 } else {
@@ -2083,12 +2077,12 @@ static void b43_nphy_restore_rssi_cal(struct b43_wldev *dev)
2083 u16 *rssical_phy_regs = NULL; 2077 u16 *rssical_phy_regs = NULL;
2084 2078
2085 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) { 2079 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
2086 if (b43_empty_chanspec(&nphy->rssical_chanspec_2G)) 2080 if (!nphy->rssical_chanspec_2G.center_freq)
2087 return; 2081 return;
2088 rssical_radio_regs = nphy->rssical_cache.rssical_radio_regs_2G; 2082 rssical_radio_regs = nphy->rssical_cache.rssical_radio_regs_2G;
2089 rssical_phy_regs = nphy->rssical_cache.rssical_phy_regs_2G; 2083 rssical_phy_regs = nphy->rssical_cache.rssical_phy_regs_2G;
2090 } else { 2084 } else {
2091 if (b43_empty_chanspec(&nphy->rssical_chanspec_5G)) 2085 if (!nphy->rssical_chanspec_5G.center_freq)
2092 return; 2086 return;
2093 rssical_radio_regs = nphy->rssical_cache.rssical_radio_regs_5G; 2087 rssical_radio_regs = nphy->rssical_cache.rssical_radio_regs_5G;
2094 rssical_phy_regs = nphy->rssical_cache.rssical_phy_regs_5G; 2088 rssical_phy_regs = nphy->rssical_cache.rssical_phy_regs_5G;
@@ -2544,8 +2538,9 @@ static void b43_nphy_save_cal(struct b43_wldev *dev)
2544 txcal_radio_regs[2] = b43_radio_read(dev, 0x8D); 2538 txcal_radio_regs[2] = b43_radio_read(dev, 0x8D);
2545 txcal_radio_regs[3] = b43_radio_read(dev, 0xBC); 2539 txcal_radio_regs[3] = b43_radio_read(dev, 0xBC);
2546 } 2540 }
2547 *iqcal_chanspec = nphy->radio_chanspec; 2541 iqcal_chanspec->center_freq = dev->phy.channel_freq;
2548 b43_ntab_write_bulk(dev, B43_NTAB16(15, 80), 8, table); 2542 iqcal_chanspec->channel_type = dev->phy.channel_type;
2543 b43_ntab_read_bulk(dev, B43_NTAB16(15, 80), 8, table);
2549 2544
2550 if (nphy->hang_avoid) 2545 if (nphy->hang_avoid)
2551 b43_nphy_stay_in_carrier_search(dev, 0); 2546 b43_nphy_stay_in_carrier_search(dev, 0);
@@ -2565,12 +2560,12 @@ static void b43_nphy_restore_cal(struct b43_wldev *dev)
2565 struct b43_phy_n_iq_comp *rxcal_coeffs = NULL; 2560 struct b43_phy_n_iq_comp *rxcal_coeffs = NULL;
2566 2561
2567 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) { 2562 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
2568 if (b43_empty_chanspec(&nphy->iqcal_chanspec_2G)) 2563 if (!nphy->iqcal_chanspec_2G.center_freq)
2569 return; 2564 return;
2570 table = nphy->cal_cache.txcal_coeffs_2G; 2565 table = nphy->cal_cache.txcal_coeffs_2G;
2571 loft = &nphy->cal_cache.txcal_coeffs_2G[5]; 2566 loft = &nphy->cal_cache.txcal_coeffs_2G[5];
2572 } else { 2567 } else {
2573 if (b43_empty_chanspec(&nphy->iqcal_chanspec_5G)) 2568 if (!nphy->iqcal_chanspec_5G.center_freq)
2574 return; 2569 return;
2575 table = nphy->cal_cache.txcal_coeffs_5G; 2570 table = nphy->cal_cache.txcal_coeffs_5G;
2576 loft = &nphy->cal_cache.txcal_coeffs_5G[5]; 2571 loft = &nphy->cal_cache.txcal_coeffs_5G[5];
@@ -2815,7 +2810,10 @@ static int b43_nphy_cal_tx_iq_lo(struct b43_wldev *dev,
2815 b43_ntab_read_bulk(dev, B43_NTAB16(15, 96), length, 2810 b43_ntab_read_bulk(dev, B43_NTAB16(15, 96), length,
2816 nphy->txiqlocal_bestc); 2811 nphy->txiqlocal_bestc);
2817 nphy->txiqlocal_coeffsvalid = true; 2812 nphy->txiqlocal_coeffsvalid = true;
2818 nphy->txiqlocal_chanspec = nphy->radio_chanspec; 2813 nphy->txiqlocal_chanspec.center_freq =
2814 dev->phy.channel_freq;
2815 nphy->txiqlocal_chanspec.channel_type =
2816 dev->phy.channel_type;
2819 } else { 2817 } else {
2820 length = 11; 2818 length = 11;
2821 if (dev->phy.rev < 3) 2819 if (dev->phy.rev < 3)
@@ -2851,7 +2849,8 @@ static void b43_nphy_reapply_tx_cal_coeffs(struct b43_wldev *dev)
2851 bool equal = true; 2849 bool equal = true;
2852 2850
2853 if (!nphy->txiqlocal_coeffsvalid || 2851 if (!nphy->txiqlocal_coeffsvalid ||
2854 b43_eq_chanspecs(&nphy->txiqlocal_chanspec, &nphy->radio_chanspec)) 2852 nphy->txiqlocal_chanspec.center_freq != dev->phy.channel_freq ||
2853 nphy->txiqlocal_chanspec.channel_type != dev->phy.channel_type)
2855 return; 2854 return;
2856 2855
2857 b43_ntab_read_bulk(dev, B43_NTAB16(15, 80), 7, buffer); 2856 b43_ntab_read_bulk(dev, B43_NTAB16(15, 80), 7, buffer);
@@ -3257,11 +3256,9 @@ int b43_phy_initn(struct b43_wldev *dev)
3257 do_rssi_cal = false; 3256 do_rssi_cal = false;
3258 if (phy->rev >= 3) { 3257 if (phy->rev >= 3) {
3259 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) 3258 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)
3260 do_rssi_cal = 3259 do_rssi_cal = !nphy->rssical_chanspec_2G.center_freq;
3261 b43_empty_chanspec(&nphy->rssical_chanspec_2G);
3262 else 3260 else
3263 do_rssi_cal = 3261 do_rssi_cal = !nphy->rssical_chanspec_5G.center_freq;
3264 b43_empty_chanspec(&nphy->rssical_chanspec_5G);
3265 3262
3266 if (do_rssi_cal) 3263 if (do_rssi_cal)
3267 b43_nphy_rssi_cal(dev); 3264 b43_nphy_rssi_cal(dev);
@@ -3273,9 +3270,9 @@ int b43_phy_initn(struct b43_wldev *dev)
3273 3270
3274 if (!((nphy->measure_hold & 0x6) != 0)) { 3271 if (!((nphy->measure_hold & 0x6) != 0)) {
3275 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) 3272 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)
3276 do_cal = b43_empty_chanspec(&nphy->iqcal_chanspec_2G); 3273 do_cal = !nphy->iqcal_chanspec_2G.center_freq;
3277 else 3274 else
3278 do_cal = b43_empty_chanspec(&nphy->iqcal_chanspec_5G); 3275 do_cal = !nphy->iqcal_chanspec_5G.center_freq;
3279 3276
3280 if (nphy->mute) 3277 if (nphy->mute)
3281 do_cal = false; 3278 do_cal = false;
@@ -3323,24 +3320,25 @@ int b43_phy_initn(struct b43_wldev *dev)
3323} 3320}
3324 3321
3325/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/ChanspecSetup */ 3322/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/ChanspecSetup */
3326static void b43_nphy_chanspec_setup(struct b43_wldev *dev, 3323static void b43_nphy_channel_setup(struct b43_wldev *dev,
3327 const struct b43_phy_n_sfo_cfg *e, 3324 const struct b43_phy_n_sfo_cfg *e,
3328 struct b43_chanspec chanspec) 3325 struct ieee80211_channel *new_channel)
3329{ 3326{
3330 struct b43_phy *phy = &dev->phy; 3327 struct b43_phy *phy = &dev->phy;
3331 struct b43_phy_n *nphy = dev->phy.n; 3328 struct b43_phy_n *nphy = dev->phy.n;
3332 3329
3333 u16 tmp; 3330 u16 old_band_5ghz;
3334 u32 tmp32; 3331 u32 tmp32;
3335 3332
3336 tmp = b43_phy_read(dev, B43_NPHY_BANDCTL) & B43_NPHY_BANDCTL_5GHZ; 3333 old_band_5ghz =
3337 if (chanspec.b_freq == 1 && tmp == 0) { 3334 b43_phy_read(dev, B43_NPHY_BANDCTL) & B43_NPHY_BANDCTL_5GHZ;
3335 if (new_channel->band == IEEE80211_BAND_5GHZ && !old_band_5ghz) {
3338 tmp32 = b43_read32(dev, B43_MMIO_PSM_PHY_HDR); 3336 tmp32 = b43_read32(dev, B43_MMIO_PSM_PHY_HDR);
3339 b43_write32(dev, B43_MMIO_PSM_PHY_HDR, tmp32 | 4); 3337 b43_write32(dev, B43_MMIO_PSM_PHY_HDR, tmp32 | 4);
3340 b43_phy_set(dev, B43_PHY_B_BBCFG, 0xC000); 3338 b43_phy_set(dev, B43_PHY_B_BBCFG, 0xC000);
3341 b43_write32(dev, B43_MMIO_PSM_PHY_HDR, tmp32); 3339 b43_write32(dev, B43_MMIO_PSM_PHY_HDR, tmp32);
3342 b43_phy_set(dev, B43_NPHY_BANDCTL, B43_NPHY_BANDCTL_5GHZ); 3340 b43_phy_set(dev, B43_NPHY_BANDCTL, B43_NPHY_BANDCTL_5GHZ);
3343 } else if (chanspec.b_freq == 1) { 3341 } else if (new_channel->band == IEEE80211_BAND_2GHZ && old_band_5ghz) {
3344 b43_phy_mask(dev, B43_NPHY_BANDCTL, ~B43_NPHY_BANDCTL_5GHZ); 3342 b43_phy_mask(dev, B43_NPHY_BANDCTL, ~B43_NPHY_BANDCTL_5GHZ);
3345 tmp32 = b43_read32(dev, B43_MMIO_PSM_PHY_HDR); 3343 tmp32 = b43_read32(dev, B43_MMIO_PSM_PHY_HDR);
3346 b43_write32(dev, B43_MMIO_PSM_PHY_HDR, tmp32 | 4); 3344 b43_write32(dev, B43_MMIO_PSM_PHY_HDR, tmp32 | 4);
@@ -3350,13 +3348,12 @@ static void b43_nphy_chanspec_setup(struct b43_wldev *dev,
3350 3348
3351 b43_chantab_phy_upload(dev, e); 3349 b43_chantab_phy_upload(dev, e);
3352 3350
3353 3351 if (new_channel->hw_value == 14) {
3354 if (nphy->radio_chanspec.channel == 14) {
3355 b43_nphy_classifier(dev, 2, 0); 3352 b43_nphy_classifier(dev, 2, 0);
3356 b43_phy_set(dev, B43_PHY_B_TEST, 0x0800); 3353 b43_phy_set(dev, B43_PHY_B_TEST, 0x0800);
3357 } else { 3354 } else {
3358 b43_nphy_classifier(dev, 2, 2); 3355 b43_nphy_classifier(dev, 2, 2);
3359 if (chanspec.b_freq == 2) 3356 if (new_channel->band == IEEE80211_BAND_2GHZ)
3360 b43_phy_mask(dev, B43_PHY_B_TEST, ~0x840); 3357 b43_phy_mask(dev, B43_PHY_B_TEST, ~0x840);
3361 } 3358 }
3362 3359
@@ -3379,53 +3376,57 @@ static void b43_nphy_chanspec_setup(struct b43_wldev *dev,
3379} 3376}
3380 3377
3381/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/SetChanspec */ 3378/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/SetChanspec */
3382static int b43_nphy_set_chanspec(struct b43_wldev *dev, 3379static int b43_nphy_set_channel(struct b43_wldev *dev,
3383 struct b43_chanspec chanspec) 3380 struct ieee80211_channel *channel,
3381 enum nl80211_channel_type channel_type)
3384{ 3382{
3383 struct b43_phy *phy = &dev->phy;
3385 struct b43_phy_n *nphy = dev->phy.n; 3384 struct b43_phy_n *nphy = dev->phy.n;
3386 3385
3387 const struct b43_nphy_channeltab_entry_rev2 *tabent_r2; 3386 const struct b43_nphy_channeltab_entry_rev2 *tabent_r2;
3388 const struct b43_nphy_channeltab_entry_rev3 *tabent_r3; 3387 const struct b43_nphy_channeltab_entry_rev3 *tabent_r3;
3389 3388
3390 u8 tmp; 3389 u8 tmp;
3391 u8 channel = chanspec.channel;
3392 3390
3393 if (dev->phy.rev >= 3) { 3391 if (dev->phy.rev >= 3) {
3394 /* TODO */ 3392 tabent_r3 = b43_nphy_get_chantabent_rev3(dev,
3393 channel->center_freq);
3395 tabent_r3 = NULL; 3394 tabent_r3 = NULL;
3396 if (!tabent_r3) 3395 if (!tabent_r3)
3397 return -ESRCH; 3396 return -ESRCH;
3398 } else { 3397 } else {
3399 tabent_r2 = b43_nphy_get_chantabent_rev2(dev, channel); 3398 tabent_r2 = b43_nphy_get_chantabent_rev2(dev,
3399 channel->hw_value);
3400 if (!tabent_r2) 3400 if (!tabent_r2)
3401 return -ESRCH; 3401 return -ESRCH;
3402 } 3402 }
3403 3403
3404 nphy->radio_chanspec = chanspec; 3404 /* Channel is set later in common code, but we need to set it on our
3405 own to let this function's subcalls work properly. */
3406 phy->channel = channel->hw_value;
3407 phy->channel_freq = channel->center_freq;
3405 3408
3406 if (chanspec.b_width != nphy->b_width) 3409 if (b43_channel_type_is_40mhz(phy->channel_type) !=
3407 ; /* TODO: BMAC BW Set (chanspec.b_width) */ 3410 b43_channel_type_is_40mhz(channel_type))
3411 ; /* TODO: BMAC BW Set (channel_type) */
3408 3412
3409 /* TODO: use defines */ 3413 if (channel_type == NL80211_CHAN_HT40PLUS)
3410 if (chanspec.b_width == 3) { 3414 b43_phy_set(dev, B43_NPHY_RXCTL,
3411 if (chanspec.sideband == 2) 3415 B43_NPHY_RXCTL_BSELU20);
3412 b43_phy_set(dev, B43_NPHY_RXCTL, 3416 else if (channel_type == NL80211_CHAN_HT40MINUS)
3413 B43_NPHY_RXCTL_BSELU20); 3417 b43_phy_mask(dev, B43_NPHY_RXCTL,
3414 else 3418 ~B43_NPHY_RXCTL_BSELU20);
3415 b43_phy_mask(dev, B43_NPHY_RXCTL,
3416 ~B43_NPHY_RXCTL_BSELU20);
3417 }
3418 3419
3419 if (dev->phy.rev >= 3) { 3420 if (dev->phy.rev >= 3) {
3420 tmp = (chanspec.b_freq == 1) ? 4 : 0; 3421 tmp = (channel->band == IEEE80211_BAND_5GHZ) ? 4 : 0;
3421 b43_radio_maskset(dev, 0x08, 0xFFFB, tmp); 3422 b43_radio_maskset(dev, 0x08, 0xFFFB, tmp);
3422 /* TODO: PHY Radio2056 Setup (dev, tabent_r3); */ 3423 /* TODO: PHY Radio2056 Setup (dev, tabent_r3); */
3423 b43_nphy_chanspec_setup(dev, &(tabent_r3->phy_regs), chanspec); 3424 b43_nphy_channel_setup(dev, &(tabent_r3->phy_regs), channel);
3424 } else { 3425 } else {
3425 tmp = (chanspec.b_freq == 1) ? 0x0020 : 0x0050; 3426 tmp = (channel->band == IEEE80211_BAND_5GHZ) ? 0x0020 : 0x0050;
3426 b43_radio_maskset(dev, B2055_MASTER1, 0xFF8F, tmp); 3427 b43_radio_maskset(dev, B2055_MASTER1, 0xFF8F, tmp);
3427 b43_radio_2055_setup(dev, tabent_r2); 3428 b43_radio_2055_setup(dev, tabent_r2);
3428 b43_nphy_chanspec_setup(dev, &(tabent_r2->phy_regs), chanspec); 3429 b43_nphy_channel_setup(dev, &(tabent_r2->phy_regs), channel);
3429 } 3430 }
3430 3431
3431 return 0; 3432 return 0;
@@ -3567,8 +3568,8 @@ static void b43_nphy_op_switch_analog(struct b43_wldev *dev, bool on)
3567static int b43_nphy_op_switch_channel(struct b43_wldev *dev, 3568static int b43_nphy_op_switch_channel(struct b43_wldev *dev,
3568 unsigned int new_channel) 3569 unsigned int new_channel)
3569{ 3570{
3570 struct b43_phy_n *nphy = dev->phy.n; 3571 struct ieee80211_channel *channel = dev->wl->hw->conf.channel;
3571 struct b43_chanspec chanspec; 3572 enum nl80211_channel_type channel_type = dev->wl->hw->conf.channel_type;
3572 3573
3573 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) { 3574 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
3574 if ((new_channel < 1) || (new_channel > 14)) 3575 if ((new_channel < 1) || (new_channel > 14))
@@ -3578,10 +3579,7 @@ static int b43_nphy_op_switch_channel(struct b43_wldev *dev,
3578 return -EINVAL; 3579 return -EINVAL;
3579 } 3580 }
3580 3581
3581 chanspec = nphy->radio_chanspec; 3582 return b43_nphy_set_channel(dev, channel, channel_type);
3582 chanspec.channel = new_channel;
3583
3584 return b43_nphy_set_chanspec(dev, chanspec);
3585} 3583}
3586 3584
3587static unsigned int b43_nphy_op_get_default_chan(struct b43_wldev *dev) 3585static unsigned int b43_nphy_op_get_default_chan(struct b43_wldev *dev)
diff --git a/drivers/net/wireless/b43/phy_n.h b/drivers/net/wireless/b43/phy_n.h
index 8b6d570dd0aa..c144e59a708b 100644
--- a/drivers/net/wireless/b43/phy_n.h
+++ b/drivers/net/wireless/b43/phy_n.h
@@ -714,223 +714,11 @@
714#define B43_PHY_B_BBCFG B43_PHY_N_BMODE(0x001) /* BB config */ 714#define B43_PHY_B_BBCFG B43_PHY_N_BMODE(0x001) /* BB config */
715#define B43_PHY_B_TEST B43_PHY_N_BMODE(0x00A) 715#define B43_PHY_B_TEST B43_PHY_N_BMODE(0x00A)
716 716
717
718/* Broadcom 2055 radio registers */
719
720#define B2055_GEN_SPARE 0x00 /* GEN spare */
721#define B2055_SP_PINPD 0x02 /* SP PIN PD */
722#define B2055_C1_SP_RSSI 0x03 /* SP RSSI Core 1 */
723#define B2055_C1_SP_PDMISC 0x04 /* SP PD MISC Core 1 */
724#define B2055_C2_SP_RSSI 0x05 /* SP RSSI Core 2 */
725#define B2055_C2_SP_PDMISC 0x06 /* SP PD MISC Core 2 */
726#define B2055_C1_SP_RXGC1 0x07 /* SP RX GC1 Core 1 */
727#define B2055_C1_SP_RXGC2 0x08 /* SP RX GC2 Core 1 */
728#define B2055_C2_SP_RXGC1 0x09 /* SP RX GC1 Core 2 */
729#define B2055_C2_SP_RXGC2 0x0A /* SP RX GC2 Core 2 */
730#define B2055_C1_SP_LPFBWSEL 0x0B /* SP LPF BW select Core 1 */
731#define B2055_C2_SP_LPFBWSEL 0x0C /* SP LPF BW select Core 2 */
732#define B2055_C1_SP_TXGC1 0x0D /* SP TX GC1 Core 1 */
733#define B2055_C1_SP_TXGC2 0x0E /* SP TX GC2 Core 1 */
734#define B2055_C2_SP_TXGC1 0x0F /* SP TX GC1 Core 2 */
735#define B2055_C2_SP_TXGC2 0x10 /* SP TX GC2 Core 2 */
736#define B2055_MASTER1 0x11 /* Master control 1 */
737#define B2055_MASTER2 0x12 /* Master control 2 */
738#define B2055_PD_LGEN 0x13 /* PD LGEN */
739#define B2055_PD_PLLTS 0x14 /* PD PLL TS */
740#define B2055_C1_PD_LGBUF 0x15 /* PD Core 1 LGBUF */
741#define B2055_C1_PD_TX 0x16 /* PD Core 1 TX */
742#define B2055_C1_PD_RXTX 0x17 /* PD Core 1 RXTX */
743#define B2055_C1_PD_RSSIMISC 0x18 /* PD Core 1 RSSI MISC */
744#define B2055_C2_PD_LGBUF 0x19 /* PD Core 2 LGBUF */
745#define B2055_C2_PD_TX 0x1A /* PD Core 2 TX */
746#define B2055_C2_PD_RXTX 0x1B /* PD Core 2 RXTX */
747#define B2055_C2_PD_RSSIMISC 0x1C /* PD Core 2 RSSI MISC */
748#define B2055_PWRDET_LGEN 0x1D /* PWRDET LGEN */
749#define B2055_C1_PWRDET_LGBUF 0x1E /* PWRDET LGBUF Core 1 */
750#define B2055_C1_PWRDET_RXTX 0x1F /* PWRDET RXTX Core 1 */
751#define B2055_C2_PWRDET_LGBUF 0x20 /* PWRDET LGBUF Core 2 */
752#define B2055_C2_PWRDET_RXTX 0x21 /* PWRDET RXTX Core 2 */
753#define B2055_RRCCAL_CS 0x22 /* RRCCAL Control spare */
754#define B2055_RRCCAL_NOPTSEL 0x23 /* RRCCAL N OPT SEL */
755#define B2055_CAL_MISC 0x24 /* CAL MISC */
756#define B2055_CAL_COUT 0x25 /* CAL Counter out */
757#define B2055_CAL_COUT2 0x26 /* CAL Counter out 2 */
758#define B2055_CAL_CVARCTL 0x27 /* CAL CVAR Control */
759#define B2055_CAL_RVARCTL 0x28 /* CAL RVAR Control */
760#define B2055_CAL_LPOCTL 0x29 /* CAL LPO Control */
761#define B2055_CAL_TS 0x2A /* CAL TS */
762#define B2055_CAL_RCCALRTS 0x2B /* CAL RCCAL READ TS */
763#define B2055_CAL_RCALRTS 0x2C /* CAL RCAL READ TS */
764#define B2055_PADDRV 0x2D /* PAD driver */
765#define B2055_XOCTL1 0x2E /* XO Control 1 */
766#define B2055_XOCTL2 0x2F /* XO Control 2 */
767#define B2055_XOREGUL 0x30 /* XO Regulator */
768#define B2055_XOMISC 0x31 /* XO misc */
769#define B2055_PLL_LFC1 0x32 /* PLL LF C1 */
770#define B2055_PLL_CALVTH 0x33 /* PLL CAL VTH */
771#define B2055_PLL_LFC2 0x34 /* PLL LF C2 */
772#define B2055_PLL_REF 0x35 /* PLL reference */
773#define B2055_PLL_LFR1 0x36 /* PLL LF R1 */
774#define B2055_PLL_PFDCP 0x37 /* PLL PFD CP */
775#define B2055_PLL_IDAC_CPOPAMP 0x38 /* PLL IDAC CPOPAMP */
776#define B2055_PLL_CPREG 0x39 /* PLL CP Regulator */
777#define B2055_PLL_RCAL 0x3A /* PLL RCAL */
778#define B2055_RF_PLLMOD0 0x3B /* RF PLL MOD0 */
779#define B2055_RF_PLLMOD1 0x3C /* RF PLL MOD1 */
780#define B2055_RF_MMDIDAC1 0x3D /* RF MMD IDAC 1 */
781#define B2055_RF_MMDIDAC0 0x3E /* RF MMD IDAC 0 */
782#define B2055_RF_MMDSP 0x3F /* RF MMD spare */
783#define B2055_VCO_CAL1 0x40 /* VCO cal 1 */
784#define B2055_VCO_CAL2 0x41 /* VCO cal 2 */
785#define B2055_VCO_CAL3 0x42 /* VCO cal 3 */
786#define B2055_VCO_CAL4 0x43 /* VCO cal 4 */
787#define B2055_VCO_CAL5 0x44 /* VCO cal 5 */
788#define B2055_VCO_CAL6 0x45 /* VCO cal 6 */
789#define B2055_VCO_CAL7 0x46 /* VCO cal 7 */
790#define B2055_VCO_CAL8 0x47 /* VCO cal 8 */
791#define B2055_VCO_CAL9 0x48 /* VCO cal 9 */
792#define B2055_VCO_CAL10 0x49 /* VCO cal 10 */
793#define B2055_VCO_CAL11 0x4A /* VCO cal 11 */
794#define B2055_VCO_CAL12 0x4B /* VCO cal 12 */
795#define B2055_VCO_CAL13 0x4C /* VCO cal 13 */
796#define B2055_VCO_CAL14 0x4D /* VCO cal 14 */
797#define B2055_VCO_CAL15 0x4E /* VCO cal 15 */
798#define B2055_VCO_CAL16 0x4F /* VCO cal 16 */
799#define B2055_VCO_KVCO 0x50 /* VCO KVCO */
800#define B2055_VCO_CAPTAIL 0x51 /* VCO CAP TAIL */
801#define B2055_VCO_IDACVCO 0x52 /* VCO IDAC VCO */
802#define B2055_VCO_REG 0x53 /* VCO Regulator */
803#define B2055_PLL_RFVTH 0x54 /* PLL RF VTH */
804#define B2055_LGBUF_CENBUF 0x55 /* LGBUF CEN BUF */
805#define B2055_LGEN_TUNE1 0x56 /* LGEN tune 1 */
806#define B2055_LGEN_TUNE2 0x57 /* LGEN tune 2 */
807#define B2055_LGEN_IDAC1 0x58 /* LGEN IDAC 1 */
808#define B2055_LGEN_IDAC2 0x59 /* LGEN IDAC 2 */
809#define B2055_LGEN_BIASC 0x5A /* LGEN BIAS counter */
810#define B2055_LGEN_BIASIDAC 0x5B /* LGEN BIAS IDAC */
811#define B2055_LGEN_RCAL 0x5C /* LGEN RCAL */
812#define B2055_LGEN_DIV 0x5D /* LGEN div */
813#define B2055_LGEN_SPARE2 0x5E /* LGEN spare 2 */
814#define B2055_C1_LGBUF_ATUNE 0x5F /* Core 1 LGBUF A tune */
815#define B2055_C1_LGBUF_GTUNE 0x60 /* Core 1 LGBUF G tune */
816#define B2055_C1_LGBUF_DIV 0x61 /* Core 1 LGBUF div */
817#define B2055_C1_LGBUF_AIDAC 0x62 /* Core 1 LGBUF A IDAC */
818#define B2055_C1_LGBUF_GIDAC 0x63 /* Core 1 LGBUF G IDAC */
819#define B2055_C1_LGBUF_IDACFO 0x64 /* Core 1 LGBUF IDAC filter override */
820#define B2055_C1_LGBUF_SPARE 0x65 /* Core 1 LGBUF spare */
821#define B2055_C1_RX_RFSPC1 0x66 /* Core 1 RX RF SPC1 */
822#define B2055_C1_RX_RFR1 0x67 /* Core 1 RX RF reg 1 */
823#define B2055_C1_RX_RFR2 0x68 /* Core 1 RX RF reg 2 */
824#define B2055_C1_RX_RFRCAL 0x69 /* Core 1 RX RF RCAL */
825#define B2055_C1_RX_BB_BLCMP 0x6A /* Core 1 RX Baseband BUFI LPF CMP */
826#define B2055_C1_RX_BB_LPF 0x6B /* Core 1 RX Baseband LPF */
827#define B2055_C1_RX_BB_MIDACHP 0x6C /* Core 1 RX Baseband MIDAC High-pass */
828#define B2055_C1_RX_BB_VGA1IDAC 0x6D /* Core 1 RX Baseband VGA1 IDAC */
829#define B2055_C1_RX_BB_VGA2IDAC 0x6E /* Core 1 RX Baseband VGA2 IDAC */
830#define B2055_C1_RX_BB_VGA3IDAC 0x6F /* Core 1 RX Baseband VGA3 IDAC */
831#define B2055_C1_RX_BB_BUFOCTL 0x70 /* Core 1 RX Baseband BUFO Control */
832#define B2055_C1_RX_BB_RCCALCTL 0x71 /* Core 1 RX Baseband RCCAL Control */
833#define B2055_C1_RX_BB_RSSICTL1 0x72 /* Core 1 RX Baseband RSSI Control 1 */
834#define B2055_C1_RX_BB_RSSICTL2 0x73 /* Core 1 RX Baseband RSSI Control 2 */
835#define B2055_C1_RX_BB_RSSICTL3 0x74 /* Core 1 RX Baseband RSSI Control 3 */
836#define B2055_C1_RX_BB_RSSICTL4 0x75 /* Core 1 RX Baseband RSSI Control 4 */
837#define B2055_C1_RX_BB_RSSICTL5 0x76 /* Core 1 RX Baseband RSSI Control 5 */
838#define B2055_C1_RX_BB_REG 0x77 /* Core 1 RX Baseband Regulator */
839#define B2055_C1_RX_BB_SPARE1 0x78 /* Core 1 RX Baseband spare 1 */
840#define B2055_C1_RX_TXBBRCAL 0x79 /* Core 1 RX TX BB RCAL */
841#define B2055_C1_TX_RF_SPGA 0x7A /* Core 1 TX RF SGM PGA */
842#define B2055_C1_TX_RF_SPAD 0x7B /* Core 1 TX RF SGM PAD */
843#define B2055_C1_TX_RF_CNTPGA1 0x7C /* Core 1 TX RF counter PGA 1 */
844#define B2055_C1_TX_RF_CNTPAD1 0x7D /* Core 1 TX RF counter PAD 1 */
845#define B2055_C1_TX_RF_PGAIDAC 0x7E /* Core 1 TX RF PGA IDAC */
846#define B2055_C1_TX_PGAPADTN 0x7F /* Core 1 TX PGA PAD TN */
847#define B2055_C1_TX_PADIDAC1 0x80 /* Core 1 TX PAD IDAC 1 */
848#define B2055_C1_TX_PADIDAC2 0x81 /* Core 1 TX PAD IDAC 2 */
849#define B2055_C1_TX_MXBGTRIM 0x82 /* Core 1 TX MX B/G TRIM */
850#define B2055_C1_TX_RF_RCAL 0x83 /* Core 1 TX RF RCAL */
851#define B2055_C1_TX_RF_PADTSSI1 0x84 /* Core 1 TX RF PAD TSSI1 */
852#define B2055_C1_TX_RF_PADTSSI2 0x85 /* Core 1 TX RF PAD TSSI2 */
853#define B2055_C1_TX_RF_SPARE 0x86 /* Core 1 TX RF spare */
854#define B2055_C1_TX_RF_IQCAL1 0x87 /* Core 1 TX RF I/Q CAL 1 */
855#define B2055_C1_TX_RF_IQCAL2 0x88 /* Core 1 TX RF I/Q CAL 2 */
856#define B2055_C1_TXBB_RCCAL 0x89 /* Core 1 TXBB RC CAL Control */
857#define B2055_C1_TXBB_LPF1 0x8A /* Core 1 TXBB LPF 1 */
858#define B2055_C1_TX_VOSCNCL 0x8B /* Core 1 TX VOS CNCL */
859#define B2055_C1_TX_LPF_MXGMIDAC 0x8C /* Core 1 TX LPF MXGM IDAC */
860#define B2055_C1_TX_BB_MXGM 0x8D /* Core 1 TX BB MXGM */
861#define B2055_C2_LGBUF_ATUNE 0x8E /* Core 2 LGBUF A tune */
862#define B2055_C2_LGBUF_GTUNE 0x8F /* Core 2 LGBUF G tune */
863#define B2055_C2_LGBUF_DIV 0x90 /* Core 2 LGBUF div */
864#define B2055_C2_LGBUF_AIDAC 0x91 /* Core 2 LGBUF A IDAC */
865#define B2055_C2_LGBUF_GIDAC 0x92 /* Core 2 LGBUF G IDAC */
866#define B2055_C2_LGBUF_IDACFO 0x93 /* Core 2 LGBUF IDAC filter override */
867#define B2055_C2_LGBUF_SPARE 0x94 /* Core 2 LGBUF spare */
868#define B2055_C2_RX_RFSPC1 0x95 /* Core 2 RX RF SPC1 */
869#define B2055_C2_RX_RFR1 0x96 /* Core 2 RX RF reg 1 */
870#define B2055_C2_RX_RFR2 0x97 /* Core 2 RX RF reg 2 */
871#define B2055_C2_RX_RFRCAL 0x98 /* Core 2 RX RF RCAL */
872#define B2055_C2_RX_BB_BLCMP 0x99 /* Core 2 RX Baseband BUFI LPF CMP */
873#define B2055_C2_RX_BB_LPF 0x9A /* Core 2 RX Baseband LPF */
874#define B2055_C2_RX_BB_MIDACHP 0x9B /* Core 2 RX Baseband MIDAC High-pass */
875#define B2055_C2_RX_BB_VGA1IDAC 0x9C /* Core 2 RX Baseband VGA1 IDAC */
876#define B2055_C2_RX_BB_VGA2IDAC 0x9D /* Core 2 RX Baseband VGA2 IDAC */
877#define B2055_C2_RX_BB_VGA3IDAC 0x9E /* Core 2 RX Baseband VGA3 IDAC */
878#define B2055_C2_RX_BB_BUFOCTL 0x9F /* Core 2 RX Baseband BUFO Control */
879#define B2055_C2_RX_BB_RCCALCTL 0xA0 /* Core 2 RX Baseband RCCAL Control */
880#define B2055_C2_RX_BB_RSSICTL1 0xA1 /* Core 2 RX Baseband RSSI Control 1 */
881#define B2055_C2_RX_BB_RSSICTL2 0xA2 /* Core 2 RX Baseband RSSI Control 2 */
882#define B2055_C2_RX_BB_RSSICTL3 0xA3 /* Core 2 RX Baseband RSSI Control 3 */
883#define B2055_C2_RX_BB_RSSICTL4 0xA4 /* Core 2 RX Baseband RSSI Control 4 */
884#define B2055_C2_RX_BB_RSSICTL5 0xA5 /* Core 2 RX Baseband RSSI Control 5 */
885#define B2055_C2_RX_BB_REG 0xA6 /* Core 2 RX Baseband Regulator */
886#define B2055_C2_RX_BB_SPARE1 0xA7 /* Core 2 RX Baseband spare 1 */
887#define B2055_C2_RX_TXBBRCAL 0xA8 /* Core 2 RX TX BB RCAL */
888#define B2055_C2_TX_RF_SPGA 0xA9 /* Core 2 TX RF SGM PGA */
889#define B2055_C2_TX_RF_SPAD 0xAA /* Core 2 TX RF SGM PAD */
890#define B2055_C2_TX_RF_CNTPGA1 0xAB /* Core 2 TX RF counter PGA 1 */
891#define B2055_C2_TX_RF_CNTPAD1 0xAC /* Core 2 TX RF counter PAD 1 */
892#define B2055_C2_TX_RF_PGAIDAC 0xAD /* Core 2 TX RF PGA IDAC */
893#define B2055_C2_TX_PGAPADTN 0xAE /* Core 2 TX PGA PAD TN */
894#define B2055_C2_TX_PADIDAC1 0xAF /* Core 2 TX PAD IDAC 1 */
895#define B2055_C2_TX_PADIDAC2 0xB0 /* Core 2 TX PAD IDAC 2 */
896#define B2055_C2_TX_MXBGTRIM 0xB1 /* Core 2 TX MX B/G TRIM */
897#define B2055_C2_TX_RF_RCAL 0xB2 /* Core 2 TX RF RCAL */
898#define B2055_C2_TX_RF_PADTSSI1 0xB3 /* Core 2 TX RF PAD TSSI1 */
899#define B2055_C2_TX_RF_PADTSSI2 0xB4 /* Core 2 TX RF PAD TSSI2 */
900#define B2055_C2_TX_RF_SPARE 0xB5 /* Core 2 TX RF spare */
901#define B2055_C2_TX_RF_IQCAL1 0xB6 /* Core 2 TX RF I/Q CAL 1 */
902#define B2055_C2_TX_RF_IQCAL2 0xB7 /* Core 2 TX RF I/Q CAL 2 */
903#define B2055_C2_TXBB_RCCAL 0xB8 /* Core 2 TXBB RC CAL Control */
904#define B2055_C2_TXBB_LPF1 0xB9 /* Core 2 TXBB LPF 1 */
905#define B2055_C2_TX_VOSCNCL 0xBA /* Core 2 TX VOS CNCL */
906#define B2055_C2_TX_LPF_MXGMIDAC 0xBB /* Core 2 TX LPF MXGM IDAC */
907#define B2055_C2_TX_BB_MXGM 0xBC /* Core 2 TX BB MXGM */
908#define B2055_PRG_GCHP21 0xBD /* PRG GC HPVGA23 21 */
909#define B2055_PRG_GCHP22 0xBE /* PRG GC HPVGA23 22 */
910#define B2055_PRG_GCHP23 0xBF /* PRG GC HPVGA23 23 */
911#define B2055_PRG_GCHP24 0xC0 /* PRG GC HPVGA23 24 */
912#define B2055_PRG_GCHP25 0xC1 /* PRG GC HPVGA23 25 */
913#define B2055_PRG_GCHP26 0xC2 /* PRG GC HPVGA23 26 */
914#define B2055_PRG_GCHP27 0xC3 /* PRG GC HPVGA23 27 */
915#define B2055_PRG_GCHP28 0xC4 /* PRG GC HPVGA23 28 */
916#define B2055_PRG_GCHP29 0xC5 /* PRG GC HPVGA23 29 */
917#define B2055_PRG_GCHP30 0xC6 /* PRG GC HPVGA23 30 */
918#define B2055_C1_LNA_GAINBST 0xCD /* Core 1 LNA GAINBST */
919#define B2055_C1_B0NB_RSSIVCM 0xD2 /* Core 1 B0 narrow-band RSSI VCM */
920#define B2055_C1_GENSPARE2 0xD6 /* Core 1 GEN spare 2 */
921#define B2055_C2_LNA_GAINBST 0xD9 /* Core 2 LNA GAINBST */
922#define B2055_C2_B0NB_RSSIVCM 0xDE /* Core 2 B0 narrow-band RSSI VCM */
923#define B2055_C2_GENSPARE2 0xE2 /* Core 2 GEN spare 2 */
924
925
926
927struct b43_wldev; 717struct b43_wldev;
928 718
929struct b43_chanspec { 719struct b43_chanspec {
930 u8 channel; 720 u16 center_freq;
931 u8 sideband; 721 enum nl80211_channel_type channel_type;
932 u8 b_width;
933 u8 b_freq;
934}; 722};
935 723
936struct b43_phy_n_iq_comp { 724struct b43_phy_n_iq_comp {
@@ -984,8 +772,6 @@ struct b43_phy_n {
984 u16 papd_epsilon_offset[2]; 772 u16 papd_epsilon_offset[2];
985 s32 preamble_override; 773 s32 preamble_override;
986 u32 bb_mult_save; 774 u32 bb_mult_save;
987 u8 b_width;
988 struct b43_chanspec radio_chanspec;
989 775
990 bool gain_boost; 776 bool gain_boost;
991 bool elna_gain_config; 777 bool elna_gain_config;
diff --git a/drivers/net/wireless/b43/radio_2055.c b/drivers/net/wireless/b43/radio_2055.c
new file mode 100644
index 000000000000..1b5316586cbf
--- /dev/null
+++ b/drivers/net/wireless/b43/radio_2055.c
@@ -0,0 +1,1332 @@
1/*
2
3 Broadcom B43 wireless driver
4 IEEE 802.11n PHY and radio device data tables
5
6 Copyright (c) 2008 Michael Buesch <mb@bu3sch.de>
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; see the file COPYING. If not, write to
20 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
21 Boston, MA 02110-1301, USA.
22
23*/
24
25#include "b43.h"
26#include "radio_2055.h"
27#include "phy_common.h"
28
29struct b2055_inittab_entry {
30 /* Value to write if we use the 5GHz band. */
31 u16 ghz5;
32 /* Value to write if we use the 2.4GHz band. */
33 u16 ghz2;
34 /* Flags */
35 u8 flags;
36#define B2055_INITTAB_ENTRY_OK 0x01
37#define B2055_INITTAB_UPLOAD 0x02
38};
39#define UPLOAD .flags = B2055_INITTAB_ENTRY_OK | B2055_INITTAB_UPLOAD
40#define NOUPLOAD .flags = B2055_INITTAB_ENTRY_OK
41
42static const struct b2055_inittab_entry b2055_inittab [] = {
43 [B2055_SP_PINPD] = { .ghz5 = 0x0080, .ghz2 = 0x0080, NOUPLOAD, },
44 [B2055_C1_SP_RSSI] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
45 [B2055_C1_SP_PDMISC] = { .ghz5 = 0x0027, .ghz2 = 0x0027, NOUPLOAD, },
46 [B2055_C2_SP_RSSI] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
47 [B2055_C2_SP_PDMISC] = { .ghz5 = 0x0027, .ghz2 = 0x0027, NOUPLOAD, },
48 [B2055_C1_SP_RXGC1] = { .ghz5 = 0x007F, .ghz2 = 0x007F, UPLOAD, },
49 [B2055_C1_SP_RXGC2] = { .ghz5 = 0x0007, .ghz2 = 0x0007, UPLOAD, },
50 [B2055_C2_SP_RXGC1] = { .ghz5 = 0x007F, .ghz2 = 0x007F, UPLOAD, },
51 [B2055_C2_SP_RXGC2] = { .ghz5 = 0x0007, .ghz2 = 0x0007, UPLOAD, },
52 [B2055_C1_SP_LPFBWSEL] = { .ghz5 = 0x0015, .ghz2 = 0x0015, NOUPLOAD, },
53 [B2055_C2_SP_LPFBWSEL] = { .ghz5 = 0x0015, .ghz2 = 0x0015, NOUPLOAD, },
54 [B2055_C1_SP_TXGC1] = { .ghz5 = 0x004F, .ghz2 = 0x004F, UPLOAD, },
55 [B2055_C1_SP_TXGC2] = { .ghz5 = 0x0005, .ghz2 = 0x0005, UPLOAD, },
56 [B2055_C2_SP_TXGC1] = { .ghz5 = 0x004F, .ghz2 = 0x004F, UPLOAD, },
57 [B2055_C2_SP_TXGC2] = { .ghz5 = 0x0005, .ghz2 = 0x0005, UPLOAD, },
58 [B2055_MASTER1] = { .ghz5 = 0x00D0, .ghz2 = 0x00D0, NOUPLOAD, },
59 [B2055_MASTER2] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
60 [B2055_PD_LGEN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
61 [B2055_PD_PLLTS] = { .ghz5 = 0x0040, .ghz2 = 0x0040, NOUPLOAD, },
62 [B2055_C1_PD_LGBUF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
63 [B2055_C1_PD_TX] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
64 [B2055_C1_PD_RXTX] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
65 [B2055_C1_PD_RSSIMISC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
66 [B2055_C2_PD_LGBUF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
67 [B2055_C2_PD_TX] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
68 [B2055_C2_PD_RXTX] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
69 [B2055_C2_PD_RSSIMISC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
70 [B2055_PWRDET_LGEN] = { .ghz5 = 0x00C0, .ghz2 = 0x00C0, NOUPLOAD, },
71 [B2055_C1_PWRDET_LGBUF] = { .ghz5 = 0x00FF, .ghz2 = 0x00FF, NOUPLOAD, },
72 [B2055_C1_PWRDET_RXTX] = { .ghz5 = 0x00C0, .ghz2 = 0x00C0, NOUPLOAD, },
73 [B2055_C2_PWRDET_LGBUF] = { .ghz5 = 0x00FF, .ghz2 = 0x00FF, NOUPLOAD, },
74 [B2055_C2_PWRDET_RXTX] = { .ghz5 = 0x00C0, .ghz2 = 0x00C0, NOUPLOAD, },
75 [B2055_RRCCAL_CS] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
76 [B2055_RRCCAL_NOPTSEL] = { .ghz5 = 0x002C, .ghz2 = 0x002C, NOUPLOAD, },
77 [B2055_CAL_MISC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
78 [B2055_CAL_COUT] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
79 [B2055_CAL_COUT2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
80 [B2055_CAL_CVARCTL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
81 [B2055_CAL_RVARCTL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
82 [B2055_CAL_LPOCTL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
83 [B2055_CAL_TS] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
84 [B2055_CAL_RCCALRTS] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
85 [B2055_CAL_RCALRTS] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
86 [B2055_PADDRV] = { .ghz5 = 0x00A4, .ghz2 = 0x00A4, NOUPLOAD, },
87 [B2055_XOCTL1] = { .ghz5 = 0x0038, .ghz2 = 0x0038, NOUPLOAD, },
88 [B2055_XOCTL2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
89 [B2055_XOREGUL] = { .ghz5 = 0x0004, .ghz2 = 0x0004, UPLOAD, },
90 [B2055_XOMISC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
91 [B2055_PLL_LFC1] = { .ghz5 = 0x000A, .ghz2 = 0x000A, NOUPLOAD, },
92 [B2055_PLL_CALVTH] = { .ghz5 = 0x0087, .ghz2 = 0x0087, NOUPLOAD, },
93 [B2055_PLL_LFC2] = { .ghz5 = 0x0009, .ghz2 = 0x0009, NOUPLOAD, },
94 [B2055_PLL_REF] = { .ghz5 = 0x0070, .ghz2 = 0x0070, NOUPLOAD, },
95 [B2055_PLL_LFR1] = { .ghz5 = 0x0011, .ghz2 = 0x0011, NOUPLOAD, },
96 [B2055_PLL_PFDCP] = { .ghz5 = 0x0018, .ghz2 = 0x0018, UPLOAD, },
97 [B2055_PLL_IDAC_CPOPAMP] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
98 [B2055_PLL_CPREG] = { .ghz5 = 0x0004, .ghz2 = 0x0004, UPLOAD, },
99 [B2055_PLL_RCAL] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
100 [B2055_RF_PLLMOD0] = { .ghz5 = 0x009E, .ghz2 = 0x009E, NOUPLOAD, },
101 [B2055_RF_PLLMOD1] = { .ghz5 = 0x0009, .ghz2 = 0x0009, NOUPLOAD, },
102 [B2055_RF_MMDIDAC1] = { .ghz5 = 0x00C8, .ghz2 = 0x00C8, UPLOAD, },
103 [B2055_RF_MMDIDAC0] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
104 [B2055_RF_MMDSP] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
105 [B2055_VCO_CAL1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
106 [B2055_VCO_CAL2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
107 [B2055_VCO_CAL3] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
108 [B2055_VCO_CAL4] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
109 [B2055_VCO_CAL5] = { .ghz5 = 0x0096, .ghz2 = 0x0096, NOUPLOAD, },
110 [B2055_VCO_CAL6] = { .ghz5 = 0x003E, .ghz2 = 0x003E, NOUPLOAD, },
111 [B2055_VCO_CAL7] = { .ghz5 = 0x003E, .ghz2 = 0x003E, NOUPLOAD, },
112 [B2055_VCO_CAL8] = { .ghz5 = 0x0013, .ghz2 = 0x0013, NOUPLOAD, },
113 [B2055_VCO_CAL9] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
114 [B2055_VCO_CAL10] = { .ghz5 = 0x0015, .ghz2 = 0x0015, NOUPLOAD, },
115 [B2055_VCO_CAL11] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
116 [B2055_VCO_CAL12] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
117 [B2055_VCO_CAL13] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
118 [B2055_VCO_CAL14] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
119 [B2055_VCO_CAL15] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
120 [B2055_VCO_CAL16] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
121 [B2055_VCO_KVCO] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
122 [B2055_VCO_CAPTAIL] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
123 [B2055_VCO_IDACVCO] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
124 [B2055_VCO_REG] = { .ghz5 = 0x0084, .ghz2 = 0x0084, UPLOAD, },
125 [B2055_PLL_RFVTH] = { .ghz5 = 0x00C3, .ghz2 = 0x00C3, NOUPLOAD, },
126 [B2055_LGBUF_CENBUF] = { .ghz5 = 0x008F, .ghz2 = 0x008F, NOUPLOAD, },
127 [B2055_LGEN_TUNE1] = { .ghz5 = 0x00FF, .ghz2 = 0x00FF, NOUPLOAD, },
128 [B2055_LGEN_TUNE2] = { .ghz5 = 0x00FF, .ghz2 = 0x00FF, NOUPLOAD, },
129 [B2055_LGEN_IDAC1] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
130 [B2055_LGEN_IDAC2] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
131 [B2055_LGEN_BIASC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
132 [B2055_LGEN_BIASIDAC] = { .ghz5 = 0x00CC, .ghz2 = 0x00CC, NOUPLOAD, },
133 [B2055_LGEN_RCAL] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
134 [B2055_LGEN_DIV] = { .ghz5 = 0x0080, .ghz2 = 0x0080, NOUPLOAD, },
135 [B2055_LGEN_SPARE2] = { .ghz5 = 0x0080, .ghz2 = 0x0080, NOUPLOAD, },
136 [B2055_C1_LGBUF_ATUNE] = { .ghz5 = 0x00F8, .ghz2 = 0x00F8, NOUPLOAD, },
137 [B2055_C1_LGBUF_GTUNE] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
138 [B2055_C1_LGBUF_DIV] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
139 [B2055_C1_LGBUF_AIDAC] = { .ghz5 = 0x0088, .ghz2 = 0x0008, UPLOAD, },
140 [B2055_C1_LGBUF_GIDAC] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
141 [B2055_C1_LGBUF_IDACFO] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
142 [B2055_C1_LGBUF_SPARE] = { .ghz5 = 0x0001, .ghz2 = 0x0001, UPLOAD, },
143 [B2055_C1_RX_RFSPC1] = { .ghz5 = 0x008A, .ghz2 = 0x008A, NOUPLOAD, },
144 [B2055_C1_RX_RFR1] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
145 [B2055_C1_RX_RFR2] = { .ghz5 = 0x0083, .ghz2 = 0x0083, NOUPLOAD, },
146 [B2055_C1_RX_RFRCAL] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
147 [B2055_C1_RX_BB_BLCMP] = { .ghz5 = 0x00A0, .ghz2 = 0x00A0, NOUPLOAD, },
148 [B2055_C1_RX_BB_LPF] = { .ghz5 = 0x000A, .ghz2 = 0x000A, NOUPLOAD, },
149 [B2055_C1_RX_BB_MIDACHP] = { .ghz5 = 0x0087, .ghz2 = 0x0087, UPLOAD, },
150 [B2055_C1_RX_BB_VGA1IDAC] = { .ghz5 = 0x002A, .ghz2 = 0x002A, NOUPLOAD, },
151 [B2055_C1_RX_BB_VGA2IDAC] = { .ghz5 = 0x002A, .ghz2 = 0x002A, NOUPLOAD, },
152 [B2055_C1_RX_BB_VGA3IDAC] = { .ghz5 = 0x002A, .ghz2 = 0x002A, NOUPLOAD, },
153 [B2055_C1_RX_BB_BUFOCTL] = { .ghz5 = 0x002A, .ghz2 = 0x002A, NOUPLOAD, },
154 [B2055_C1_RX_BB_RCCALCTL] = { .ghz5 = 0x0018, .ghz2 = 0x0018, NOUPLOAD, },
155 [B2055_C1_RX_BB_RSSICTL1] = { .ghz5 = 0x006A, .ghz2 = 0x006A, UPLOAD, },
156 [B2055_C1_RX_BB_RSSICTL2] = { .ghz5 = 0x00AB, .ghz2 = 0x00AB, UPLOAD, },
157 [B2055_C1_RX_BB_RSSICTL3] = { .ghz5 = 0x0013, .ghz2 = 0x0013, UPLOAD, },
158 [B2055_C1_RX_BB_RSSICTL4] = { .ghz5 = 0x00C1, .ghz2 = 0x00C1, UPLOAD, },
159 [B2055_C1_RX_BB_RSSICTL5] = { .ghz5 = 0x00AA, .ghz2 = 0x00AA, UPLOAD, },
160 [B2055_C1_RX_BB_REG] = { .ghz5 = 0x0087, .ghz2 = 0x0087, UPLOAD, },
161 [B2055_C1_RX_BB_SPARE1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
162 [B2055_C1_RX_TXBBRCAL] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
163 [B2055_C1_TX_RF_SPGA] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
164 [B2055_C1_TX_RF_SPAD] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
165 [B2055_C1_TX_RF_CNTPGA1] = { .ghz5 = 0x0015, .ghz2 = 0x0015, NOUPLOAD, },
166 [B2055_C1_TX_RF_CNTPAD1] = { .ghz5 = 0x0055, .ghz2 = 0x0055, NOUPLOAD, },
167 [B2055_C1_TX_RF_PGAIDAC] = { .ghz5 = 0x0097, .ghz2 = 0x0097, UPLOAD, },
168 [B2055_C1_TX_PGAPADTN] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
169 [B2055_C1_TX_PADIDAC1] = { .ghz5 = 0x0014, .ghz2 = 0x0014, UPLOAD, },
170 [B2055_C1_TX_PADIDAC2] = { .ghz5 = 0x0033, .ghz2 = 0x0033, NOUPLOAD, },
171 [B2055_C1_TX_MXBGTRIM] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
172 [B2055_C1_TX_RF_RCAL] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
173 [B2055_C1_TX_RF_PADTSSI1] = { .ghz5 = 0x0003, .ghz2 = 0x0003, UPLOAD, },
174 [B2055_C1_TX_RF_PADTSSI2] = { .ghz5 = 0x000A, .ghz2 = 0x000A, NOUPLOAD, },
175 [B2055_C1_TX_RF_SPARE] = { .ghz5 = 0x0003, .ghz2 = 0x0003, UPLOAD, },
176 [B2055_C1_TX_RF_IQCAL1] = { .ghz5 = 0x002A, .ghz2 = 0x002A, NOUPLOAD, },
177 [B2055_C1_TX_RF_IQCAL2] = { .ghz5 = 0x00A4, .ghz2 = 0x00A4, NOUPLOAD, },
178 [B2055_C1_TXBB_RCCAL] = { .ghz5 = 0x0018, .ghz2 = 0x0018, NOUPLOAD, },
179 [B2055_C1_TXBB_LPF1] = { .ghz5 = 0x0028, .ghz2 = 0x0028, NOUPLOAD, },
180 [B2055_C1_TX_VOSCNCL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
181 [B2055_C1_TX_LPF_MXGMIDAC] = { .ghz5 = 0x004A, .ghz2 = 0x004A, NOUPLOAD, },
182 [B2055_C1_TX_BB_MXGM] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
183 [B2055_C2_LGBUF_ATUNE] = { .ghz5 = 0x00F8, .ghz2 = 0x00F8, NOUPLOAD, },
184 [B2055_C2_LGBUF_GTUNE] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
185 [B2055_C2_LGBUF_DIV] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
186 [B2055_C2_LGBUF_AIDAC] = { .ghz5 = 0x0088, .ghz2 = 0x0008, UPLOAD, },
187 [B2055_C2_LGBUF_GIDAC] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
188 [B2055_C2_LGBUF_IDACFO] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
189 [B2055_C2_LGBUF_SPARE] = { .ghz5 = 0x0001, .ghz2 = 0x0001, UPLOAD, },
190 [B2055_C2_RX_RFSPC1] = { .ghz5 = 0x008A, .ghz2 = 0x008A, NOUPLOAD, },
191 [B2055_C2_RX_RFR1] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
192 [B2055_C2_RX_RFR2] = { .ghz5 = 0x0083, .ghz2 = 0x0083, NOUPLOAD, },
193 [B2055_C2_RX_RFRCAL] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
194 [B2055_C2_RX_BB_BLCMP] = { .ghz5 = 0x00A0, .ghz2 = 0x00A0, NOUPLOAD, },
195 [B2055_C2_RX_BB_LPF] = { .ghz5 = 0x000A, .ghz2 = 0x000A, NOUPLOAD, },
196 [B2055_C2_RX_BB_MIDACHP] = { .ghz5 = 0x0087, .ghz2 = 0x0087, UPLOAD, },
197 [B2055_C2_RX_BB_VGA1IDAC] = { .ghz5 = 0x002A, .ghz2 = 0x002A, NOUPLOAD, },
198 [B2055_C2_RX_BB_VGA2IDAC] = { .ghz5 = 0x002A, .ghz2 = 0x002A, NOUPLOAD, },
199 [B2055_C2_RX_BB_VGA3IDAC] = { .ghz5 = 0x002A, .ghz2 = 0x002A, NOUPLOAD, },
200 [B2055_C2_RX_BB_BUFOCTL] = { .ghz5 = 0x002A, .ghz2 = 0x002A, NOUPLOAD, },
201 [B2055_C2_RX_BB_RCCALCTL] = { .ghz5 = 0x0018, .ghz2 = 0x0018, NOUPLOAD, },
202 [B2055_C2_RX_BB_RSSICTL1] = { .ghz5 = 0x006A, .ghz2 = 0x006A, UPLOAD, },
203 [B2055_C2_RX_BB_RSSICTL2] = { .ghz5 = 0x00AB, .ghz2 = 0x00AB, UPLOAD, },
204 [B2055_C2_RX_BB_RSSICTL3] = { .ghz5 = 0x0013, .ghz2 = 0x0013, UPLOAD, },
205 [B2055_C2_RX_BB_RSSICTL4] = { .ghz5 = 0x00C1, .ghz2 = 0x00C1, UPLOAD, },
206 [B2055_C2_RX_BB_RSSICTL5] = { .ghz5 = 0x00AA, .ghz2 = 0x00AA, UPLOAD, },
207 [B2055_C2_RX_BB_REG] = { .ghz5 = 0x0087, .ghz2 = 0x0087, UPLOAD, },
208 [B2055_C2_RX_BB_SPARE1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
209 [B2055_C2_RX_TXBBRCAL] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
210 [B2055_C2_TX_RF_SPGA] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
211 [B2055_C2_TX_RF_SPAD] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
212 [B2055_C2_TX_RF_CNTPGA1] = { .ghz5 = 0x0015, .ghz2 = 0x0015, NOUPLOAD, },
213 [B2055_C2_TX_RF_CNTPAD1] = { .ghz5 = 0x0055, .ghz2 = 0x0055, NOUPLOAD, },
214 [B2055_C2_TX_RF_PGAIDAC] = { .ghz5 = 0x0097, .ghz2 = 0x0097, UPLOAD, },
215 [B2055_C2_TX_PGAPADTN] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
216 [B2055_C2_TX_PADIDAC1] = { .ghz5 = 0x0014, .ghz2 = 0x0014, UPLOAD, },
217 [B2055_C2_TX_PADIDAC2] = { .ghz5 = 0x0033, .ghz2 = 0x0033, NOUPLOAD, },
218 [B2055_C2_TX_MXBGTRIM] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
219 [B2055_C2_TX_RF_RCAL] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
220 [B2055_C2_TX_RF_PADTSSI1] = { .ghz5 = 0x0003, .ghz2 = 0x0003, UPLOAD, },
221 [B2055_C2_TX_RF_PADTSSI2] = { .ghz5 = 0x000A, .ghz2 = 0x000A, NOUPLOAD, },
222 [B2055_C2_TX_RF_SPARE] = { .ghz5 = 0x0003, .ghz2 = 0x0003, UPLOAD, },
223 [B2055_C2_TX_RF_IQCAL1] = { .ghz5 = 0x002A, .ghz2 = 0x002A, NOUPLOAD, },
224 [B2055_C2_TX_RF_IQCAL2] = { .ghz5 = 0x00A4, .ghz2 = 0x00A4, NOUPLOAD, },
225 [B2055_C2_TXBB_RCCAL] = { .ghz5 = 0x0018, .ghz2 = 0x0018, NOUPLOAD, },
226 [B2055_C2_TXBB_LPF1] = { .ghz5 = 0x0028, .ghz2 = 0x0028, NOUPLOAD, },
227 [B2055_C2_TX_VOSCNCL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
228 [B2055_C2_TX_LPF_MXGMIDAC] = { .ghz5 = 0x004A, .ghz2 = 0x004A, NOUPLOAD, },
229 [B2055_C2_TX_BB_MXGM] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
230 [B2055_PRG_GCHP21] = { .ghz5 = 0x0071, .ghz2 = 0x0071, NOUPLOAD, },
231 [B2055_PRG_GCHP22] = { .ghz5 = 0x0072, .ghz2 = 0x0072, NOUPLOAD, },
232 [B2055_PRG_GCHP23] = { .ghz5 = 0x0073, .ghz2 = 0x0073, NOUPLOAD, },
233 [B2055_PRG_GCHP24] = { .ghz5 = 0x0074, .ghz2 = 0x0074, NOUPLOAD, },
234 [B2055_PRG_GCHP25] = { .ghz5 = 0x0075, .ghz2 = 0x0075, NOUPLOAD, },
235 [B2055_PRG_GCHP26] = { .ghz5 = 0x0076, .ghz2 = 0x0076, NOUPLOAD, },
236 [B2055_PRG_GCHP27] = { .ghz5 = 0x0077, .ghz2 = 0x0077, NOUPLOAD, },
237 [B2055_PRG_GCHP28] = { .ghz5 = 0x0078, .ghz2 = 0x0078, NOUPLOAD, },
238 [B2055_PRG_GCHP29] = { .ghz5 = 0x0079, .ghz2 = 0x0079, NOUPLOAD, },
239 [B2055_PRG_GCHP30] = { .ghz5 = 0x007A, .ghz2 = 0x007A, NOUPLOAD, },
240 [0xC7] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
241 [0xC8] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
242 [0xC9] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
243 [0xCA] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
244 [0xCB] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
245 [0xCC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
246 [B2055_C1_LNA_GAINBST] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
247 [0xCE] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
248 [0xCF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
249 [0xD0] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
250 [0xD1] = { .ghz5 = 0x0018, .ghz2 = 0x0018, NOUPLOAD, },
251 [B2055_C1_B0NB_RSSIVCM] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
252 [0xD3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
253 [0xD4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
254 [0xD5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
255 [B2055_C1_GENSPARE2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
256 [0xD7] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
257 [0xD8] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
258 [B2055_C2_LNA_GAINBST] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
259 [0xDA] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
260 [0xDB] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
261 [0xDC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
262 [0xDD] = { .ghz5 = 0x0018, .ghz2 = 0x0018, NOUPLOAD, },
263 [B2055_C2_B0NB_RSSIVCM] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
264 [0xDF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
265 [0xE0] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
266 [0xE1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
267 [B2055_C2_GENSPARE2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
268};
269
270#define RADIOREGS(r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, \
271 r12, r13, r14, r15, r16, r17, r18, r19, r20, r21) \
272 .radio_pll_ref = r0, \
273 .radio_rf_pllmod0 = r1, \
274 .radio_rf_pllmod1 = r2, \
275 .radio_vco_captail = r3, \
276 .radio_vco_cal1 = r4, \
277 .radio_vco_cal2 = r5, \
278 .radio_pll_lfc1 = r6, \
279 .radio_pll_lfr1 = r7, \
280 .radio_pll_lfc2 = r8, \
281 .radio_lgbuf_cenbuf = r9, \
282 .radio_lgen_tune1 = r10, \
283 .radio_lgen_tune2 = r11, \
284 .radio_c1_lgbuf_atune = r12, \
285 .radio_c1_lgbuf_gtune = r13, \
286 .radio_c1_rx_rfr1 = r14, \
287 .radio_c1_tx_pgapadtn = r15, \
288 .radio_c1_tx_mxbgtrim = r16, \
289 .radio_c2_lgbuf_atune = r17, \
290 .radio_c2_lgbuf_gtune = r18, \
291 .radio_c2_rx_rfr1 = r19, \
292 .radio_c2_tx_pgapadtn = r20, \
293 .radio_c2_tx_mxbgtrim = r21
294
295#define PHYREGS(r0, r1, r2, r3, r4, r5) \
296 .phy_regs.phy_bw1a = r0, \
297 .phy_regs.phy_bw2 = r1, \
298 .phy_regs.phy_bw3 = r2, \
299 .phy_regs.phy_bw4 = r3, \
300 .phy_regs.phy_bw5 = r4, \
301 .phy_regs.phy_bw6 = r5
302
303static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] = {
304 { .channel = 184,
305 .freq = 4920, /* MHz */
306 .unk2 = 3280,
307 RADIOREGS(0x71, 0x01, 0xEC, 0x0F, 0xFF, 0x01, 0x04, 0x0A,
308 0x00, 0x8F, 0xFF, 0xFF, 0xFF, 0x00, 0x0F, 0x0F,
309 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
310 PHYREGS(0xB407, 0xB007, 0xAC07, 0x1402, 0x1502, 0x1602),
311 },
312 { .channel = 186,
313 .freq = 4930, /* MHz */
314 .unk2 = 3287,
315 RADIOREGS(0x71, 0x01, 0xED, 0x0F, 0xFF, 0x01, 0x04, 0x0A,
316 0x00, 0x8F, 0xFF, 0xFF, 0xFF, 0x00, 0x0F, 0x0F,
317 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
318 PHYREGS(0xB807, 0xB407, 0xB007, 0x1302, 0x1402, 0x1502),
319 },
320 { .channel = 188,
321 .freq = 4940, /* MHz */
322 .unk2 = 3293,
323 RADIOREGS(0x71, 0x01, 0xEE, 0x0F, 0xFF, 0x01, 0x04, 0x0A,
324 0x00, 0x8F, 0xEE, 0xEE, 0xFF, 0x00, 0x0F, 0x0F,
325 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
326 PHYREGS(0xBC07, 0xB807, 0xB407, 0x1202, 0x1302, 0x1402),
327 },
328 { .channel = 190,
329 .freq = 4950, /* MHz */
330 .unk2 = 3300,
331 RADIOREGS(0x71, 0x01, 0xEF, 0x0F, 0xFF, 0x01, 0x04, 0x0A,
332 0x00, 0x8F, 0xEE, 0xEE, 0xFF, 0x00, 0x0F, 0x0F,
333 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
334 PHYREGS(0xC007, 0xBC07, 0xB807, 0x1102, 0x1202, 0x1302),
335 },
336 { .channel = 192,
337 .freq = 4960, /* MHz */
338 .unk2 = 3307,
339 RADIOREGS(0x71, 0x01, 0xF0, 0x0F, 0xFF, 0x01, 0x04, 0x0A,
340 0x00, 0x8F, 0xEE, 0xEE, 0xFF, 0x00, 0x0F, 0x0F,
341 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
342 PHYREGS(0xC407, 0xC007, 0xBC07, 0x0F02, 0x1102, 0x1202),
343 },
344 { .channel = 194,
345 .freq = 4970, /* MHz */
346 .unk2 = 3313,
347 RADIOREGS(0x71, 0x01, 0xF1, 0x0F, 0xFF, 0x01, 0x04, 0x0A,
348 0x00, 0x8F, 0xEE, 0xEE, 0xFF, 0x00, 0x0F, 0x0F,
349 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
350 PHYREGS(0xC807, 0xC407, 0xC007, 0x0E02, 0x0F02, 0x1102),
351 },
352 { .channel = 196,
353 .freq = 4980, /* MHz */
354 .unk2 = 3320,
355 RADIOREGS(0x71, 0x01, 0xF2, 0x0E, 0xFF, 0x01, 0x04, 0x0A,
356 0x00, 0x8F, 0xDD, 0xDD, 0xFF, 0x00, 0x0F, 0x0F,
357 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
358 PHYREGS(0xCC07, 0xC807, 0xC407, 0x0D02, 0x0E02, 0x0F02),
359 },
360 { .channel = 198,
361 .freq = 4990, /* MHz */
362 .unk2 = 3327,
363 RADIOREGS(0x71, 0x01, 0xF3, 0x0E, 0xFF, 0x01, 0x04, 0x0A,
364 0x00, 0x8F, 0xDD, 0xDD, 0xFF, 0x00, 0x0F, 0x0F,
365 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
366 PHYREGS(0xD007, 0xCC07, 0xC807, 0x0C02, 0x0D02, 0x0E02),
367 },
368 { .channel = 200,
369 .freq = 5000, /* MHz */
370 .unk2 = 3333,
371 RADIOREGS(0x71, 0x01, 0xF4, 0x0E, 0xFF, 0x01, 0x04, 0x0A,
372 0x00, 0x8F, 0xDD, 0xDD, 0xFF, 0x00, 0x0F, 0x0F,
373 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
374 PHYREGS(0xD407, 0xD007, 0xCC07, 0x0B02, 0x0C02, 0x0D02),
375 },
376 { .channel = 202,
377 .freq = 5010, /* MHz */
378 .unk2 = 3340,
379 RADIOREGS(0x71, 0x01, 0xF5, 0x0E, 0xFF, 0x01, 0x04, 0x0A,
380 0x00, 0x8F, 0xDD, 0xDD, 0xFF, 0x00, 0x0F, 0x0F,
381 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
382 PHYREGS(0xD807, 0xD407, 0xD007, 0x0A02, 0x0B02, 0x0C02),
383 },
384 { .channel = 204,
385 .freq = 5020, /* MHz */
386 .unk2 = 3347,
387 RADIOREGS(0x71, 0x01, 0xF6, 0x0E, 0xF7, 0x01, 0x04, 0x0A,
388 0x00, 0x8F, 0xCC, 0xCC, 0xFF, 0x00, 0x0F, 0x0F,
389 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
390 PHYREGS(0xDC07, 0xD807, 0xD407, 0x0902, 0x0A02, 0x0B02),
391 },
392 { .channel = 206,
393 .freq = 5030, /* MHz */
394 .unk2 = 3353,
395 RADIOREGS(0x71, 0x01, 0xF7, 0x0E, 0xF7, 0x01, 0x04, 0x0A,
396 0x00, 0x8F, 0xCC, 0xCC, 0xFF, 0x00, 0x0F, 0x0F,
397 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
398 PHYREGS(0xE007, 0xDC07, 0xD807, 0x0802, 0x0902, 0x0A02),
399 },
400 { .channel = 208,
401 .freq = 5040, /* MHz */
402 .unk2 = 3360,
403 RADIOREGS(0x71, 0x01, 0xF8, 0x0D, 0xEF, 0x01, 0x04, 0x0A,
404 0x00, 0x8F, 0xCC, 0xCC, 0xFF, 0x00, 0x0F, 0x0F,
405 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
406 PHYREGS(0xE407, 0xE007, 0xDC07, 0x0702, 0x0802, 0x0902),
407 },
408 { .channel = 210,
409 .freq = 5050, /* MHz */
410 .unk2 = 3367,
411 RADIOREGS(0x71, 0x01, 0xF9, 0x0D, 0xEF, 0x01, 0x04, 0x0A,
412 0x00, 0x8F, 0xCC, 0xCC, 0xFF, 0x00, 0x0F, 0x0F,
413 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
414 PHYREGS(0xE807, 0xE407, 0xE007, 0x0602, 0x0702, 0x0802),
415 },
416 { .channel = 212,
417 .freq = 5060, /* MHz */
418 .unk2 = 3373,
419 RADIOREGS(0x71, 0x01, 0xFA, 0x0D, 0xE6, 0x01, 0x04, 0x0A,
420 0x00, 0x8F, 0xBB, 0xBB, 0xFF, 0x00, 0x0E, 0x0F,
421 0x8E, 0xFF, 0x00, 0x0E, 0x0F, 0x8E),
422 PHYREGS(0xEC07, 0xE807, 0xE407, 0x0502, 0x0602, 0x0702),
423 },
424 { .channel = 214,
425 .freq = 5070, /* MHz */
426 .unk2 = 3380,
427 RADIOREGS(0x71, 0x01, 0xFB, 0x0D, 0xE6, 0x01, 0x04, 0x0A,
428 0x00, 0x8F, 0xBB, 0xBB, 0xFF, 0x00, 0x0E, 0x0F,
429 0x8E, 0xFF, 0x00, 0x0E, 0x0F, 0x8E),
430 PHYREGS(0xF007, 0xEC07, 0xE807, 0x0402, 0x0502, 0x0602),
431 },
432 { .channel = 216,
433 .freq = 5080, /* MHz */
434 .unk2 = 3387,
435 RADIOREGS(0x71, 0x01, 0xFC, 0x0D, 0xDE, 0x01, 0x04, 0x0A,
436 0x00, 0x8E, 0xBB, 0xBB, 0xEE, 0x00, 0x0E, 0x0F,
437 0x8D, 0xEE, 0x00, 0x0E, 0x0F, 0x8D),
438 PHYREGS(0xF407, 0xF007, 0xEC07, 0x0302, 0x0402, 0x0502),
439 },
440 { .channel = 218,
441 .freq = 5090, /* MHz */
442 .unk2 = 3393,
443 RADIOREGS(0x71, 0x01, 0xFD, 0x0D, 0xDE, 0x01, 0x04, 0x0A,
444 0x00, 0x8E, 0xBB, 0xBB, 0xEE, 0x00, 0x0E, 0x0F,
445 0x8D, 0xEE, 0x00, 0x0E, 0x0F, 0x8D),
446 PHYREGS(0xF807, 0xF407, 0xF007, 0x0202, 0x0302, 0x0402),
447 },
448 { .channel = 220,
449 .freq = 5100, /* MHz */
450 .unk2 = 3400,
451 RADIOREGS(0x71, 0x01, 0xFE, 0x0C, 0xD6, 0x01, 0x04, 0x0A,
452 0x00, 0x8E, 0xAA, 0xAA, 0xEE, 0x00, 0x0D, 0x0F,
453 0x8D, 0xEE, 0x00, 0x0D, 0x0F, 0x8D),
454 PHYREGS(0xFC07, 0xF807, 0xF407, 0x0102, 0x0202, 0x0302),
455 },
456 { .channel = 222,
457 .freq = 5110, /* MHz */
458 .unk2 = 3407,
459 RADIOREGS(0x71, 0x01, 0xFF, 0x0C, 0xD6, 0x01, 0x04, 0x0A,
460 0x00, 0x8E, 0xAA, 0xAA, 0xEE, 0x00, 0x0D, 0x0F,
461 0x8D, 0xEE, 0x00, 0x0D, 0x0F, 0x8D),
462 PHYREGS(0x0008, 0xFC07, 0xF807, 0x0002, 0x0102, 0x0202),
463 },
464 { .channel = 224,
465 .freq = 5120, /* MHz */
466 .unk2 = 3413,
467 RADIOREGS(0x71, 0x02, 0x00, 0x0C, 0xCE, 0x01, 0x04, 0x0A,
468 0x00, 0x8D, 0xAA, 0xAA, 0xDD, 0x00, 0x0D, 0x0F,
469 0x8C, 0xDD, 0x00, 0x0D, 0x0F, 0x8C),
470 PHYREGS(0x0408, 0x0008, 0xFC07, 0xFF01, 0x0002, 0x0102),
471 },
472 { .channel = 226,
473 .freq = 5130, /* MHz */
474 .unk2 = 3420,
475 RADIOREGS(0x71, 0x02, 0x01, 0x0C, 0xCE, 0x01, 0x04, 0x0A,
476 0x00, 0x8D, 0xAA, 0xAA, 0xDD, 0x00, 0x0D, 0x0F,
477 0x8C, 0xDD, 0x00, 0x0D, 0x0F, 0x8C),
478 PHYREGS(0x0808, 0x0408, 0x0008, 0xFE01, 0xFF01, 0x0002),
479 },
480 { .channel = 228,
481 .freq = 5140, /* MHz */
482 .unk2 = 3427,
483 RADIOREGS(0x71, 0x02, 0x02, 0x0C, 0xC6, 0x01, 0x04, 0x0A,
484 0x00, 0x8D, 0x99, 0x99, 0xDD, 0x00, 0x0C, 0x0E,
485 0x8B, 0xDD, 0x00, 0x0C, 0x0E, 0x8B),
486 PHYREGS(0x0C08, 0x0808, 0x0408, 0xFD01, 0xFE01, 0xFF01),
487 },
488 { .channel = 32,
489 .freq = 5160, /* MHz */
490 .unk2 = 3440,
491 RADIOREGS(0x71, 0x02, 0x04, 0x0B, 0xBE, 0x01, 0x04, 0x0A,
492 0x00, 0x8C, 0x99, 0x99, 0xCC, 0x00, 0x0B, 0x0D,
493 0x8A, 0xCC, 0x00, 0x0B, 0x0D, 0x8A),
494 PHYREGS(0x1408, 0x1008, 0x0C08, 0xFB01, 0xFC01, 0xFD01),
495 },
496 { .channel = 34,
497 .freq = 5170, /* MHz */
498 .unk2 = 3447,
499 RADIOREGS(0x71, 0x02, 0x05, 0x0B, 0xBE, 0x01, 0x04, 0x0A,
500 0x00, 0x8C, 0x99, 0x99, 0xCC, 0x00, 0x0B, 0x0D,
501 0x8A, 0xCC, 0x00, 0x0B, 0x0D, 0x8A),
502 PHYREGS(0x1808, 0x1408, 0x1008, 0xFA01, 0xFB01, 0xFC01),
503 },
504 { .channel = 36,
505 .freq = 5180, /* MHz */
506 .unk2 = 3453,
507 RADIOREGS(0x71, 0x02, 0x06, 0x0B, 0xB6, 0x01, 0x04, 0x0A,
508 0x00, 0x8C, 0x88, 0x88, 0xCC, 0x00, 0x0B, 0x0C,
509 0x89, 0xCC, 0x00, 0x0B, 0x0C, 0x89),
510 PHYREGS(0x1C08, 0x1808, 0x1408, 0xF901, 0xFA01, 0xFB01),
511 },
512 { .channel = 38,
513 .freq = 5190, /* MHz */
514 .unk2 = 3460,
515 RADIOREGS(0x71, 0x02, 0x07, 0x0B, 0xB6, 0x01, 0x04, 0x0A,
516 0x00, 0x8C, 0x88, 0x88, 0xCC, 0x00, 0x0B, 0x0C,
517 0x89, 0xCC, 0x00, 0x0B, 0x0C, 0x89),
518 PHYREGS(0x2008, 0x1C08, 0x1808, 0xF801, 0xF901, 0xFA01),
519 },
520 { .channel = 40,
521 .freq = 5200, /* MHz */
522 .unk2 = 3467,
523 RADIOREGS(0x71, 0x02, 0x08, 0x0B, 0xAF, 0x01, 0x04, 0x0A,
524 0x00, 0x8B, 0x88, 0x88, 0xBB, 0x00, 0x0A, 0x0B,
525 0x89, 0xBB, 0x00, 0x0A, 0x0B, 0x89),
526 PHYREGS(0x2408, 0x2008, 0x1C08, 0xF701, 0xF801, 0xF901),
527 },
528 { .channel = 42,
529 .freq = 5210, /* MHz */
530 .unk2 = 3473,
531 RADIOREGS(0x71, 0x02, 0x09, 0x0B, 0xAF, 0x01, 0x04, 0x0A,
532 0x00, 0x8B, 0x88, 0x88, 0xBB, 0x00, 0x0A, 0x0B,
533 0x89, 0xBB, 0x00, 0x0A, 0x0B, 0x89),
534 PHYREGS(0x2808, 0x2408, 0x2008, 0xF601, 0xF701, 0xF801),
535 },
536 { .channel = 44,
537 .freq = 5220, /* MHz */
538 .unk2 = 3480,
539 RADIOREGS(0x71, 0x02, 0x0A, 0x0A, 0xA7, 0x01, 0x04, 0x0A,
540 0x00, 0x8B, 0x77, 0x77, 0xBB, 0x00, 0x09, 0x0A,
541 0x88, 0xBB, 0x00, 0x09, 0x0A, 0x88),
542 PHYREGS(0x2C08, 0x2808, 0x2408, 0xF501, 0xF601, 0xF701),
543 },
544 { .channel = 46,
545 .freq = 5230, /* MHz */
546 .unk2 = 3487,
547 RADIOREGS(0x71, 0x02, 0x0B, 0x0A, 0xA7, 0x01, 0x04, 0x0A,
548 0x00, 0x8B, 0x77, 0x77, 0xBB, 0x00, 0x09, 0x0A,
549 0x88, 0xBB, 0x00, 0x09, 0x0A, 0x88),
550 PHYREGS(0x3008, 0x2C08, 0x2808, 0xF401, 0xF501, 0xF601),
551 },
552 { .channel = 48,
553 .freq = 5240, /* MHz */
554 .unk2 = 3493,
555 RADIOREGS(0x71, 0x02, 0x0C, 0x0A, 0xA0, 0x01, 0x04, 0x0A,
556 0x00, 0x8A, 0x77, 0x77, 0xAA, 0x00, 0x09, 0x0A,
557 0x87, 0xAA, 0x00, 0x09, 0x0A, 0x87),
558 PHYREGS(0x3408, 0x3008, 0x2C08, 0xF301, 0xF401, 0xF501),
559 },
560 { .channel = 50,
561 .freq = 5250, /* MHz */
562 .unk2 = 3500,
563 RADIOREGS(0x71, 0x02, 0x0D, 0x0A, 0xA0, 0x01, 0x04, 0x0A,
564 0x00, 0x8A, 0x77, 0x77, 0xAA, 0x00, 0x09, 0x0A,
565 0x87, 0xAA, 0x00, 0x09, 0x0A, 0x87),
566 PHYREGS(0x3808, 0x3408, 0x3008, 0xF201, 0xF301, 0xF401),
567 },
568 { .channel = 52,
569 .freq = 5260, /* MHz */
570 .unk2 = 3507,
571 RADIOREGS(0x71, 0x02, 0x0E, 0x0A, 0x98, 0x01, 0x04, 0x0A,
572 0x00, 0x8A, 0x66, 0x66, 0xAA, 0x00, 0x08, 0x09,
573 0x87, 0xAA, 0x00, 0x08, 0x09, 0x87),
574 PHYREGS(0x3C08, 0x3808, 0x3408, 0xF101, 0xF201, 0xF301),
575 },
576 { .channel = 54,
577 .freq = 5270, /* MHz */
578 .unk2 = 3513,
579 RADIOREGS(0x71, 0x02, 0x0F, 0x0A, 0x98, 0x01, 0x04, 0x0A,
580 0x00, 0x8A, 0x66, 0x66, 0xAA, 0x00, 0x08, 0x09,
581 0x87, 0xAA, 0x00, 0x08, 0x09, 0x87),
582 PHYREGS(0x4008, 0x3C08, 0x3808, 0xF001, 0xF101, 0xF201),
583 },
584 { .channel = 56,
585 .freq = 5280, /* MHz */
586 .unk2 = 3520,
587 RADIOREGS(0x71, 0x02, 0x10, 0x09, 0x91, 0x01, 0x04, 0x0A,
588 0x00, 0x89, 0x66, 0x66, 0x99, 0x00, 0x08, 0x08,
589 0x86, 0x99, 0x00, 0x08, 0x08, 0x86),
590 PHYREGS(0x4408, 0x4008, 0x3C08, 0xF001, 0xF001, 0xF101),
591 },
592 { .channel = 58,
593 .freq = 5290, /* MHz */
594 .unk2 = 3527,
595 RADIOREGS(0x71, 0x02, 0x11, 0x09, 0x91, 0x01, 0x04, 0x0A,
596 0x00, 0x89, 0x66, 0x66, 0x99, 0x00, 0x08, 0x08,
597 0x86, 0x99, 0x00, 0x08, 0x08, 0x86),
598 PHYREGS(0x4808, 0x4408, 0x4008, 0xEF01, 0xF001, 0xF001),
599 },
600 { .channel = 60,
601 .freq = 5300, /* MHz */
602 .unk2 = 3533,
603 RADIOREGS(0x71, 0x02, 0x12, 0x09, 0x8A, 0x01, 0x04, 0x0A,
604 0x00, 0x89, 0x55, 0x55, 0x99, 0x00, 0x08, 0x07,
605 0x85, 0x99, 0x00, 0x08, 0x07, 0x85),
606 PHYREGS(0x4C08, 0x4808, 0x4408, 0xEE01, 0xEF01, 0xF001),
607 },
608 { .channel = 62,
609 .freq = 5310, /* MHz */
610 .unk2 = 3540,
611 RADIOREGS(0x71, 0x02, 0x13, 0x09, 0x8A, 0x01, 0x04, 0x0A,
612 0x00, 0x89, 0x55, 0x55, 0x99, 0x00, 0x08, 0x07,
613 0x85, 0x99, 0x00, 0x08, 0x07, 0x85),
614 PHYREGS(0x5008, 0x4C08, 0x4808, 0xED01, 0xEE01, 0xEF01),
615 },
616 { .channel = 64,
617 .freq = 5320, /* MHz */
618 .unk2 = 3547,
619 RADIOREGS(0x71, 0x02, 0x14, 0x09, 0x83, 0x01, 0x04, 0x0A,
620 0x00, 0x88, 0x55, 0x55, 0x88, 0x00, 0x07, 0x07,
621 0x84, 0x88, 0x00, 0x07, 0x07, 0x84),
622 PHYREGS(0x5408, 0x5008, 0x4C08, 0xEC01, 0xED01, 0xEE01),
623 },
624 { .channel = 66,
625 .freq = 5330, /* MHz */
626 .unk2 = 3553,
627 RADIOREGS(0x71, 0x02, 0x15, 0x09, 0x83, 0x01, 0x04, 0x0A,
628 0x00, 0x88, 0x55, 0x55, 0x88, 0x00, 0x07, 0x07,
629 0x84, 0x88, 0x00, 0x07, 0x07, 0x84),
630 PHYREGS(0x5808, 0x5408, 0x5008, 0xEB01, 0xEC01, 0xED01),
631 },
632 { .channel = 68,
633 .freq = 5340, /* MHz */
634 .unk2 = 3560,
635 RADIOREGS(0x71, 0x02, 0x16, 0x08, 0x7C, 0x01, 0x04, 0x0A,
636 0x00, 0x88, 0x44, 0x44, 0x88, 0x00, 0x07, 0x06,
637 0x84, 0x88, 0x00, 0x07, 0x06, 0x84),
638 PHYREGS(0x5C08, 0x5808, 0x5408, 0xEA01, 0xEB01, 0xEC01),
639 },
640 { .channel = 70,
641 .freq = 5350, /* MHz */
642 .unk2 = 3567,
643 RADIOREGS(0x71, 0x02, 0x17, 0x08, 0x7C, 0x01, 0x04, 0x0A,
644 0x00, 0x88, 0x44, 0x44, 0x88, 0x00, 0x07, 0x06,
645 0x84, 0x88, 0x00, 0x07, 0x06, 0x84),
646 PHYREGS(0x6008, 0x5C08, 0x5808, 0xE901, 0xEA01, 0xEB01),
647 },
648 { .channel = 72,
649 .freq = 5360, /* MHz */
650 .unk2 = 3573,
651 RADIOREGS(0x71, 0x02, 0x18, 0x08, 0x75, 0x01, 0x04, 0x0A,
652 0x00, 0x87, 0x44, 0x44, 0x77, 0x00, 0x06, 0x05,
653 0x83, 0x77, 0x00, 0x06, 0x05, 0x83),
654 PHYREGS(0x6408, 0x6008, 0x5C08, 0xE801, 0xE901, 0xEA01),
655 },
656 { .channel = 74,
657 .freq = 5370, /* MHz */
658 .unk2 = 3580,
659 RADIOREGS(0x71, 0x02, 0x19, 0x08, 0x75, 0x01, 0x04, 0x0A,
660 0x00, 0x87, 0x44, 0x44, 0x77, 0x00, 0x06, 0x05,
661 0x83, 0x77, 0x00, 0x06, 0x05, 0x83),
662 PHYREGS(0x6808, 0x6408, 0x6008, 0xE701, 0xE801, 0xE901),
663 },
664 { .channel = 76,
665 .freq = 5380, /* MHz */
666 .unk2 = 3587,
667 RADIOREGS(0x71, 0x02, 0x1A, 0x08, 0x6E, 0x01, 0x04, 0x0A,
668 0x00, 0x87, 0x33, 0x33, 0x77, 0x00, 0x06, 0x04,
669 0x82, 0x77, 0x00, 0x06, 0x04, 0x82),
670 PHYREGS(0x6C08, 0x6808, 0x6408, 0xE601, 0xE701, 0xE801),
671 },
672 { .channel = 78,
673 .freq = 5390, /* MHz */
674 .unk2 = 3593,
675 RADIOREGS(0x71, 0x02, 0x1B, 0x08, 0x6E, 0x01, 0x04, 0x0A,
676 0x00, 0x87, 0x33, 0x33, 0x77, 0x00, 0x06, 0x04,
677 0x82, 0x77, 0x00, 0x06, 0x04, 0x82),
678 PHYREGS(0x7008, 0x6C08, 0x6808, 0xE501, 0xE601, 0xE701),
679 },
680 { .channel = 80,
681 .freq = 5400, /* MHz */
682 .unk2 = 3600,
683 RADIOREGS(0x71, 0x02, 0x1C, 0x07, 0x67, 0x01, 0x04, 0x0A,
684 0x00, 0x86, 0x33, 0x33, 0x66, 0x00, 0x05, 0x04,
685 0x81, 0x66, 0x00, 0x05, 0x04, 0x81),
686 PHYREGS(0x7408, 0x7008, 0x6C08, 0xE501, 0xE501, 0xE601),
687 },
688 { .channel = 82,
689 .freq = 5410, /* MHz */
690 .unk2 = 3607,
691 RADIOREGS(0x71, 0x02, 0x1D, 0x07, 0x67, 0x01, 0x04, 0x0A,
692 0x00, 0x86, 0x33, 0x33, 0x66, 0x00, 0x05, 0x04,
693 0x81, 0x66, 0x00, 0x05, 0x04, 0x81),
694 PHYREGS(0x7808, 0x7408, 0x7008, 0xE401, 0xE501, 0xE501),
695 },
696 { .channel = 84,
697 .freq = 5420, /* MHz */
698 .unk2 = 3613,
699 RADIOREGS(0x71, 0x02, 0x1E, 0x07, 0x61, 0x01, 0x04, 0x0A,
700 0x00, 0x86, 0x22, 0x22, 0x66, 0x00, 0x05, 0x03,
701 0x80, 0x66, 0x00, 0x05, 0x03, 0x80),
702 PHYREGS(0x7C08, 0x7808, 0x7408, 0xE301, 0xE401, 0xE501),
703 },
704 { .channel = 86,
705 .freq = 5430, /* MHz */
706 .unk2 = 3620,
707 RADIOREGS(0x71, 0x02, 0x1F, 0x07, 0x61, 0x01, 0x04, 0x0A,
708 0x00, 0x86, 0x22, 0x22, 0x66, 0x00, 0x05, 0x03,
709 0x80, 0x66, 0x00, 0x05, 0x03, 0x80),
710 PHYREGS(0x8008, 0x7C08, 0x7808, 0xE201, 0xE301, 0xE401),
711 },
712 { .channel = 88,
713 .freq = 5440, /* MHz */
714 .unk2 = 3627,
715 RADIOREGS(0x71, 0x02, 0x20, 0x07, 0x5A, 0x01, 0x04, 0x0A,
716 0x00, 0x85, 0x22, 0x22, 0x55, 0x00, 0x04, 0x02,
717 0x80, 0x55, 0x00, 0x04, 0x02, 0x80),
718 PHYREGS(0x8408, 0x8008, 0x7C08, 0xE101, 0xE201, 0xE301),
719 },
720 { .channel = 90,
721 .freq = 5450, /* MHz */
722 .unk2 = 3633,
723 RADIOREGS(0x71, 0x02, 0x21, 0x07, 0x5A, 0x01, 0x04, 0x0A,
724 0x00, 0x85, 0x22, 0x22, 0x55, 0x00, 0x04, 0x02,
725 0x80, 0x55, 0x00, 0x04, 0x02, 0x80),
726 PHYREGS(0x8808, 0x8408, 0x8008, 0xE001, 0xE101, 0xE201),
727 },
728 { .channel = 92,
729 .freq = 5460, /* MHz */
730 .unk2 = 3640,
731 RADIOREGS(0x71, 0x02, 0x22, 0x06, 0x53, 0x01, 0x04, 0x0A,
732 0x00, 0x85, 0x11, 0x11, 0x55, 0x00, 0x04, 0x01,
733 0x80, 0x55, 0x00, 0x04, 0x01, 0x80),
734 PHYREGS(0x8C08, 0x8808, 0x8408, 0xDF01, 0xE001, 0xE101),
735 },
736 { .channel = 94,
737 .freq = 5470, /* MHz */
738 .unk2 = 3647,
739 RADIOREGS(0x71, 0x02, 0x23, 0x06, 0x53, 0x01, 0x04, 0x0A,
740 0x00, 0x85, 0x11, 0x11, 0x55, 0x00, 0x04, 0x01,
741 0x80, 0x55, 0x00, 0x04, 0x01, 0x80),
742 PHYREGS(0x9008, 0x8C08, 0x8808, 0xDE01, 0xDF01, 0xE001),
743 },
744 { .channel = 96,
745 .freq = 5480, /* MHz */
746 .unk2 = 3653,
747 RADIOREGS(0x71, 0x02, 0x24, 0x06, 0x4D, 0x01, 0x04, 0x0A,
748 0x00, 0x84, 0x11, 0x11, 0x44, 0x00, 0x03, 0x00,
749 0x80, 0x44, 0x00, 0x03, 0x00, 0x80),
750 PHYREGS(0x9408, 0x9008, 0x8C08, 0xDD01, 0xDE01, 0xDF01),
751 },
752 { .channel = 98,
753 .freq = 5490, /* MHz */
754 .unk2 = 3660,
755 RADIOREGS(0x71, 0x02, 0x25, 0x06, 0x4D, 0x01, 0x04, 0x0A,
756 0x00, 0x84, 0x11, 0x11, 0x44, 0x00, 0x03, 0x00,
757 0x80, 0x44, 0x00, 0x03, 0x00, 0x80),
758 PHYREGS(0x9808, 0x9408, 0x9008, 0xDD01, 0xDD01, 0xDE01),
759 },
760 { .channel = 100,
761 .freq = 5500, /* MHz */
762 .unk2 = 3667,
763 RADIOREGS(0x71, 0x02, 0x26, 0x06, 0x47, 0x01, 0x04, 0x0A,
764 0x00, 0x84, 0x00, 0x00, 0x44, 0x00, 0x03, 0x00,
765 0x80, 0x44, 0x00, 0x03, 0x00, 0x80),
766 PHYREGS(0x9C08, 0x9808, 0x9408, 0xDC01, 0xDD01, 0xDD01),
767 },
768 { .channel = 102,
769 .freq = 5510, /* MHz */
770 .unk2 = 3673,
771 RADIOREGS(0x71, 0x02, 0x27, 0x06, 0x47, 0x01, 0x04, 0x0A,
772 0x00, 0x84, 0x00, 0x00, 0x44, 0x00, 0x03, 0x00,
773 0x80, 0x44, 0x00, 0x03, 0x00, 0x80),
774 PHYREGS(0xA008, 0x9C08, 0x9808, 0xDB01, 0xDC01, 0xDD01),
775 },
776 { .channel = 104,
777 .freq = 5520, /* MHz */
778 .unk2 = 3680,
779 RADIOREGS(0x71, 0x02, 0x28, 0x05, 0x40, 0x01, 0x04, 0x0A,
780 0x00, 0x83, 0x00, 0x00, 0x33, 0x00, 0x02, 0x00,
781 0x80, 0x33, 0x00, 0x02, 0x00, 0x80),
782 PHYREGS(0xA408, 0xA008, 0x9C08, 0xDA01, 0xDB01, 0xDC01),
783 },
784 { .channel = 106,
785 .freq = 5530, /* MHz */
786 .unk2 = 3687,
787 RADIOREGS(0x71, 0x02, 0x29, 0x05, 0x40, 0x01, 0x04, 0x0A,
788 0x00, 0x83, 0x00, 0x00, 0x33, 0x00, 0x02, 0x00,
789 0x80, 0x33, 0x00, 0x02, 0x00, 0x80),
790 PHYREGS(0xA808, 0xA408, 0xA008, 0xD901, 0xDA01, 0xDB01),
791 },
792 { .channel = 108,
793 .freq = 5540, /* MHz */
794 .unk2 = 3693,
795 RADIOREGS(0x71, 0x02, 0x2A, 0x05, 0x3A, 0x01, 0x04, 0x0A,
796 0x00, 0x83, 0x00, 0x00, 0x33, 0x00, 0x02, 0x00,
797 0x80, 0x33, 0x00, 0x02, 0x00, 0x80),
798 PHYREGS(0xAC08, 0xA808, 0xA408, 0xD801, 0xD901, 0xDA01),
799 },
800 { .channel = 110,
801 .freq = 5550, /* MHz */
802 .unk2 = 3700,
803 RADIOREGS(0x71, 0x02, 0x2B, 0x05, 0x3A, 0x01, 0x04, 0x0A,
804 0x00, 0x83, 0x00, 0x00, 0x33, 0x00, 0x02, 0x00,
805 0x80, 0x33, 0x00, 0x02, 0x00, 0x80),
806 PHYREGS(0xB008, 0xAC08, 0xA808, 0xD701, 0xD801, 0xD901),
807 },
808 { .channel = 112,
809 .freq = 5560, /* MHz */
810 .unk2 = 3707,
811 RADIOREGS(0x71, 0x02, 0x2C, 0x05, 0x34, 0x01, 0x04, 0x0A,
812 0x00, 0x82, 0x00, 0x00, 0x22, 0x00, 0x01, 0x00,
813 0x80, 0x22, 0x00, 0x01, 0x00, 0x80),
814 PHYREGS(0xB408, 0xB008, 0xAC08, 0xD701, 0xD701, 0xD801),
815 },
816 { .channel = 114,
817 .freq = 5570, /* MHz */
818 .unk2 = 3713,
819 RADIOREGS(0x71, 0x02, 0x2D, 0x05, 0x34, 0x01, 0x04, 0x0A,
820 0x00, 0x82, 0x00, 0x00, 0x22, 0x00, 0x01, 0x00,
821 0x80, 0x22, 0x00, 0x01, 0x00, 0x80),
822 PHYREGS(0xB808, 0xB408, 0xB008, 0xD601, 0xD701, 0xD701),
823 },
824 { .channel = 116,
825 .freq = 5580, /* MHz */
826 .unk2 = 3720,
827 RADIOREGS(0x71, 0x02, 0x2E, 0x04, 0x2E, 0x01, 0x04, 0x0A,
828 0x00, 0x82, 0x00, 0x00, 0x22, 0x00, 0x01, 0x00,
829 0x80, 0x22, 0x00, 0x01, 0x00, 0x80),
830 PHYREGS(0xBC08, 0xB808, 0xB408, 0xD501, 0xD601, 0xD701),
831 },
832 { .channel = 118,
833 .freq = 5590, /* MHz */
834 .unk2 = 3727,
835 RADIOREGS(0x71, 0x02, 0x2F, 0x04, 0x2E, 0x01, 0x04, 0x0A,
836 0x00, 0x82, 0x00, 0x00, 0x22, 0x00, 0x01, 0x00,
837 0x80, 0x22, 0x00, 0x01, 0x00, 0x80),
838 PHYREGS(0xC008, 0xBC08, 0xB808, 0xD401, 0xD501, 0xD601),
839 },
840 { .channel = 120,
841 .freq = 5600, /* MHz */
842 .unk2 = 3733,
843 RADIOREGS(0x71, 0x02, 0x30, 0x04, 0x28, 0x01, 0x04, 0x0A,
844 0x00, 0x81, 0x00, 0x00, 0x11, 0x00, 0x01, 0x00,
845 0x80, 0x11, 0x00, 0x01, 0x00, 0x80),
846 PHYREGS(0xC408, 0xC008, 0xBC08, 0xD301, 0xD401, 0xD501),
847 },
848 { .channel = 122,
849 .freq = 5610, /* MHz */
850 .unk2 = 3740,
851 RADIOREGS(0x71, 0x02, 0x31, 0x04, 0x28, 0x01, 0x04, 0x0A,
852 0x00, 0x81, 0x00, 0x00, 0x11, 0x00, 0x01, 0x00,
853 0x80, 0x11, 0x00, 0x01, 0x00, 0x80),
854 PHYREGS(0xC808, 0xC408, 0xC008, 0xD201, 0xD301, 0xD401),
855 },
856 { .channel = 124,
857 .freq = 5620, /* MHz */
858 .unk2 = 3747,
859 RADIOREGS(0x71, 0x02, 0x32, 0x04, 0x21, 0x01, 0x04, 0x0A,
860 0x00, 0x81, 0x00, 0x00, 0x11, 0x00, 0x00, 0x00,
861 0x80, 0x11, 0x00, 0x00, 0x00, 0x80),
862 PHYREGS(0xCC08, 0xC808, 0xC408, 0xD201, 0xD201, 0xD301),
863 },
864 { .channel = 126,
865 .freq = 5630, /* MHz */
866 .unk2 = 3753,
867 RADIOREGS(0x71, 0x02, 0x33, 0x04, 0x21, 0x01, 0x04, 0x0A,
868 0x00, 0x81, 0x00, 0x00, 0x11, 0x00, 0x00, 0x00,
869 0x80, 0x11, 0x00, 0x00, 0x00, 0x80),
870 PHYREGS(0xD008, 0xCC08, 0xC808, 0xD101, 0xD201, 0xD201),
871 },
872 { .channel = 128,
873 .freq = 5640, /* MHz */
874 .unk2 = 3760,
875 RADIOREGS(0x71, 0x02, 0x34, 0x03, 0x1C, 0x01, 0x04, 0x0A,
876 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
877 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
878 PHYREGS(0xD408, 0xD008, 0xCC08, 0xD001, 0xD101, 0xD201),
879 },
880 { .channel = 130,
881 .freq = 5650, /* MHz */
882 .unk2 = 3767,
883 RADIOREGS(0x71, 0x02, 0x35, 0x03, 0x1C, 0x01, 0x04, 0x0A,
884 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
885 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
886 PHYREGS(0xD808, 0xD408, 0xD008, 0xCF01, 0xD001, 0xD101),
887 },
888 { .channel = 132,
889 .freq = 5660, /* MHz */
890 .unk2 = 3773,
891 RADIOREGS(0x71, 0x02, 0x36, 0x03, 0x16, 0x01, 0x04, 0x0A,
892 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
893 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
894 PHYREGS(0xDC08, 0xD808, 0xD408, 0xCE01, 0xCF01, 0xD001),
895 },
896 { .channel = 134,
897 .freq = 5670, /* MHz */
898 .unk2 = 3780,
899 RADIOREGS(0x71, 0x02, 0x37, 0x03, 0x16, 0x01, 0x04, 0x0A,
900 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
901 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
902 PHYREGS(0xE008, 0xDC08, 0xD808, 0xCE01, 0xCE01, 0xCF01),
903 },
904 { .channel = 136,
905 .freq = 5680, /* MHz */
906 .unk2 = 3787,
907 RADIOREGS(0x71, 0x02, 0x38, 0x03, 0x10, 0x01, 0x04, 0x0A,
908 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
909 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
910 PHYREGS(0xE408, 0xE008, 0xDC08, 0xCD01, 0xCE01, 0xCE01),
911 },
912 { .channel = 138,
913 .freq = 5690, /* MHz */
914 .unk2 = 3793,
915 RADIOREGS(0x71, 0x02, 0x39, 0x03, 0x10, 0x01, 0x04, 0x0A,
916 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
917 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
918 PHYREGS(0xE808, 0xE408, 0xE008, 0xCC01, 0xCD01, 0xCE01),
919 },
920 { .channel = 140,
921 .freq = 5700, /* MHz */
922 .unk2 = 3800,
923 RADIOREGS(0x71, 0x02, 0x3A, 0x02, 0x0A, 0x01, 0x04, 0x0A,
924 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
925 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
926 PHYREGS(0xEC08, 0xE808, 0xE408, 0xCB01, 0xCC01, 0xCD01),
927 },
928 { .channel = 142,
929 .freq = 5710, /* MHz */
930 .unk2 = 3807,
931 RADIOREGS(0x71, 0x02, 0x3B, 0x02, 0x0A, 0x01, 0x04, 0x0A,
932 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
933 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
934 PHYREGS(0xF008, 0xEC08, 0xE808, 0xCA01, 0xCB01, 0xCC01),
935 },
936 { .channel = 144,
937 .freq = 5720, /* MHz */
938 .unk2 = 3813,
939 RADIOREGS(0x71, 0x02, 0x3C, 0x02, 0x0A, 0x01, 0x04, 0x0A,
940 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
941 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
942 PHYREGS(0xF408, 0xF008, 0xEC08, 0xC901, 0xCA01, 0xCB01),
943 },
944 { .channel = 145,
945 .freq = 5725, /* MHz */
946 .unk2 = 3817,
947 RADIOREGS(0x72, 0x04, 0x79, 0x02, 0x03, 0x01, 0x03, 0x14,
948 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
949 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
950 PHYREGS(0xF608, 0xF208, 0xEE08, 0xC901, 0xCA01, 0xCB01),
951 },
952 { .channel = 146,
953 .freq = 5730, /* MHz */
954 .unk2 = 3820,
955 RADIOREGS(0x71, 0x02, 0x3D, 0x02, 0x0A, 0x01, 0x04, 0x0A,
956 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
957 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
958 PHYREGS(0xF808, 0xF408, 0xF008, 0xC901, 0xC901, 0xCA01),
959 },
960 { .channel = 147,
961 .freq = 5735, /* MHz */
962 .unk2 = 3823,
963 RADIOREGS(0x72, 0x04, 0x7B, 0x02, 0x03, 0x01, 0x03, 0x14,
964 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
965 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
966 PHYREGS(0xFA08, 0xF608, 0xF208, 0xC801, 0xC901, 0xCA01),
967 },
968 { .channel = 148,
969 .freq = 5740, /* MHz */
970 .unk2 = 3827,
971 RADIOREGS(0x71, 0x02, 0x3E, 0x02, 0x0A, 0x01, 0x04, 0x0A,
972 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
973 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
974 PHYREGS(0xFC08, 0xF808, 0xF408, 0xC801, 0xC901, 0xC901),
975 },
976 { .channel = 149,
977 .freq = 5745, /* MHz */
978 .unk2 = 3830,
979 RADIOREGS(0x72, 0x04, 0x7D, 0x02, 0xFE, 0x00, 0x03, 0x14,
980 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
981 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
982 PHYREGS(0xFE08, 0xFA08, 0xF608, 0xC801, 0xC801, 0xC901),
983 },
984 { .channel = 150,
985 .freq = 5750, /* MHz */
986 .unk2 = 3833,
987 RADIOREGS(0x71, 0x02, 0x3F, 0x02, 0x0A, 0x01, 0x04, 0x0A,
988 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
989 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
990 PHYREGS(0x0009, 0xFC08, 0xF808, 0xC701, 0xC801, 0xC901),
991 },
992 { .channel = 151,
993 .freq = 5755, /* MHz */
994 .unk2 = 3837,
995 RADIOREGS(0x72, 0x04, 0x7F, 0x02, 0xFE, 0x00, 0x03, 0x14,
996 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
997 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
998 PHYREGS(0x0209, 0xFE08, 0xFA08, 0xC701, 0xC801, 0xC801),
999 },
1000 { .channel = 152,
1001 .freq = 5760, /* MHz */
1002 .unk2 = 3840,
1003 RADIOREGS(0x71, 0x02, 0x40, 0x02, 0x0A, 0x01, 0x04, 0x0A,
1004 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1005 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1006 PHYREGS(0x0409, 0x0009, 0xFC08, 0xC601, 0xC701, 0xC801),
1007 },
1008 { .channel = 153,
1009 .freq = 5765, /* MHz */
1010 .unk2 = 3843,
1011 RADIOREGS(0x72, 0x04, 0x81, 0x02, 0xF8, 0x00, 0x03, 0x14,
1012 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1013 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1014 PHYREGS(0x0609, 0x0209, 0xFE08, 0xC601, 0xC701, 0xC801),
1015 },
1016 { .channel = 154,
1017 .freq = 5770, /* MHz */
1018 .unk2 = 3847,
1019 RADIOREGS(0x71, 0x02, 0x41, 0x02, 0x0A, 0x01, 0x04, 0x0A,
1020 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1021 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1022 PHYREGS(0x0809, 0x0409, 0x0009, 0xC601, 0xC601, 0xC701),
1023 },
1024 { .channel = 155,
1025 .freq = 5775, /* MHz */
1026 .unk2 = 3850,
1027 RADIOREGS(0x72, 0x04, 0x83, 0x02, 0xF8, 0x00, 0x03, 0x14,
1028 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1029 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1030 PHYREGS(0x0A09, 0x0609, 0x0209, 0xC501, 0xC601, 0xC701),
1031 },
1032 { .channel = 156,
1033 .freq = 5780, /* MHz */
1034 .unk2 = 3853,
1035 RADIOREGS(0x71, 0x02, 0x42, 0x02, 0x0A, 0x01, 0x04, 0x0A,
1036 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1037 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1038 PHYREGS(0x0C09, 0x0809, 0x0409, 0xC501, 0xC601, 0xC601),
1039 },
1040 { .channel = 157,
1041 .freq = 5785, /* MHz */
1042 .unk2 = 3857,
1043 RADIOREGS(0x72, 0x04, 0x85, 0x02, 0xF2, 0x00, 0x03, 0x14,
1044 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1045 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1046 PHYREGS(0x0E09, 0x0A09, 0x0609, 0xC401, 0xC501, 0xC601),
1047 },
1048 { .channel = 158,
1049 .freq = 5790, /* MHz */
1050 .unk2 = 3860,
1051 RADIOREGS(0x71, 0x02, 0x43, 0x02, 0x0A, 0x01, 0x04, 0x0A,
1052 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1053 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1054 PHYREGS(0x1009, 0x0C09, 0x0809, 0xC401, 0xC501, 0xC601),
1055 },
1056 { .channel = 159,
1057 .freq = 5795, /* MHz */
1058 .unk2 = 3863,
1059 RADIOREGS(0x72, 0x04, 0x87, 0x02, 0xF2, 0x00, 0x03, 0x14,
1060 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1061 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1062 PHYREGS(0x1209, 0x0E09, 0x0A09, 0xC401, 0xC401, 0xC501),
1063 },
1064 { .channel = 160,
1065 .freq = 5800, /* MHz */
1066 .unk2 = 3867,
1067 RADIOREGS(0x71, 0x02, 0x44, 0x01, 0x0A, 0x01, 0x04, 0x0A,
1068 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1069 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1070 PHYREGS(0x1409, 0x1009, 0x0C09, 0xC301, 0xC401, 0xC501),
1071 },
1072 { .channel = 161,
1073 .freq = 5805, /* MHz */
1074 .unk2 = 3870,
1075 RADIOREGS(0x72, 0x04, 0x89, 0x01, 0xED, 0x00, 0x03, 0x14,
1076 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1077 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1078 PHYREGS(0x1609, 0x1209, 0x0E09, 0xC301, 0xC401, 0xC401),
1079 },
1080 { .channel = 162,
1081 .freq = 5810, /* MHz */
1082 .unk2 = 3873,
1083 RADIOREGS(0x71, 0x02, 0x45, 0x01, 0x0A, 0x01, 0x04, 0x0A,
1084 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1085 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1086 PHYREGS(0x1809, 0x1409, 0x1009, 0xC201, 0xC301, 0xC401),
1087 },
1088 { .channel = 163,
1089 .freq = 5815, /* MHz */
1090 .unk2 = 3877,
1091 RADIOREGS(0x72, 0x04, 0x8B, 0x01, 0xED, 0x00, 0x03, 0x14,
1092 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1093 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1094 PHYREGS(0x1A09, 0x1609, 0x1209, 0xC201, 0xC301, 0xC401),
1095 },
1096 { .channel = 164,
1097 .freq = 5820, /* MHz */
1098 .unk2 = 3880,
1099 RADIOREGS(0x71, 0x02, 0x46, 0x01, 0x0A, 0x01, 0x04, 0x0A,
1100 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1101 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1102 PHYREGS(0x1C09, 0x1809, 0x1409, 0xC201, 0xC201, 0xC301),
1103 },
1104 { .channel = 165,
1105 .freq = 5825, /* MHz */
1106 .unk2 = 3883,
1107 RADIOREGS(0x72, 0x04, 0x8D, 0x01, 0xED, 0x00, 0x03, 0x14,
1108 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1109 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1110 PHYREGS(0x1E09, 0x1A09, 0x1609, 0xC101, 0xC201, 0xC301),
1111 },
1112 { .channel = 166,
1113 .freq = 5830, /* MHz */
1114 .unk2 = 3887,
1115 RADIOREGS(0x71, 0x02, 0x47, 0x01, 0x0A, 0x01, 0x04, 0x0A,
1116 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1117 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1118 PHYREGS(0x2009, 0x1C09, 0x1809, 0xC101, 0xC201, 0xC201),
1119 },
1120 { .channel = 168,
1121 .freq = 5840, /* MHz */
1122 .unk2 = 3893,
1123 RADIOREGS(0x71, 0x02, 0x48, 0x01, 0x0A, 0x01, 0x04, 0x0A,
1124 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1125 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1126 PHYREGS(0x2409, 0x2009, 0x1C09, 0xC001, 0xC101, 0xC201),
1127 },
1128 { .channel = 170,
1129 .freq = 5850, /* MHz */
1130 .unk2 = 3900,
1131 RADIOREGS(0x71, 0x02, 0x49, 0x01, 0xE0, 0x00, 0x04, 0x0A,
1132 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1133 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1134 PHYREGS(0x2809, 0x2409, 0x2009, 0xBF01, 0xC001, 0xC101),
1135 },
1136 { .channel = 172,
1137 .freq = 5860, /* MHz */
1138 .unk2 = 3907,
1139 RADIOREGS(0x71, 0x02, 0x4A, 0x01, 0xDE, 0x00, 0x04, 0x0A,
1140 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1141 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1142 PHYREGS(0x2C09, 0x2809, 0x2409, 0xBF01, 0xBF01, 0xC001),
1143 },
1144 { .channel = 174,
1145 .freq = 5870, /* MHz */
1146 .unk2 = 3913,
1147 RADIOREGS(0x71, 0x02, 0x4B, 0x00, 0xDB, 0x00, 0x04, 0x0A,
1148 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1149 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1150 PHYREGS(0x3009, 0x2C09, 0x2809, 0xBE01, 0xBF01, 0xBF01),
1151 },
1152 { .channel = 176,
1153 .freq = 5880, /* MHz */
1154 .unk2 = 3920,
1155 RADIOREGS(0x71, 0x02, 0x4C, 0x00, 0xD8, 0x00, 0x04, 0x0A,
1156 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1157 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1158 PHYREGS(0x3409, 0x3009, 0x2C09, 0xBD01, 0xBE01, 0xBF01),
1159 },
1160 { .channel = 178,
1161 .freq = 5890, /* MHz */
1162 .unk2 = 3927,
1163 RADIOREGS(0x71, 0x02, 0x4D, 0x00, 0xD6, 0x00, 0x04, 0x0A,
1164 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1165 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1166 PHYREGS(0x3809, 0x3409, 0x3009, 0xBC01, 0xBD01, 0xBE01),
1167 },
1168 { .channel = 180,
1169 .freq = 5900, /* MHz */
1170 .unk2 = 3933,
1171 RADIOREGS(0x71, 0x02, 0x4E, 0x00, 0xD3, 0x00, 0x04, 0x0A,
1172 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1173 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1174 PHYREGS(0x3C09, 0x3809, 0x3409, 0xBC01, 0xBC01, 0xBD01),
1175 },
1176 { .channel = 182,
1177 .freq = 5910, /* MHz */
1178 .unk2 = 3940,
1179 RADIOREGS(0x71, 0x02, 0x4F, 0x00, 0xD6, 0x00, 0x04, 0x0A,
1180 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1181 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1182 PHYREGS(0x4009, 0x3C09, 0x3809, 0xBB01, 0xBC01, 0xBC01),
1183 },
1184 { .channel = 1,
1185 .freq = 2412, /* MHz */
1186 .unk2 = 3216,
1187 RADIOREGS(0x73, 0x09, 0x6C, 0x0F, 0x00, 0x01, 0x07, 0x15,
1188 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0D, 0x0C,
1189 0x80, 0xFF, 0x88, 0x0D, 0x0C, 0x80),
1190 PHYREGS(0xC903, 0xC503, 0xC103, 0x3A04, 0x3F04, 0x4304),
1191 },
1192 { .channel = 2,
1193 .freq = 2417, /* MHz */
1194 .unk2 = 3223,
1195 RADIOREGS(0x73, 0x09, 0x71, 0x0F, 0x00, 0x01, 0x07, 0x15,
1196 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0C, 0x0B,
1197 0x80, 0xFF, 0x88, 0x0C, 0x0B, 0x80),
1198 PHYREGS(0xCB03, 0xC703, 0xC303, 0x3804, 0x3D04, 0x4104),
1199 },
1200 { .channel = 3,
1201 .freq = 2422, /* MHz */
1202 .unk2 = 3229,
1203 RADIOREGS(0x73, 0x09, 0x76, 0x0F, 0x00, 0x01, 0x07, 0x15,
1204 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0C, 0x0A,
1205 0x80, 0xFF, 0x88, 0x0C, 0x0A, 0x80),
1206 PHYREGS(0xCD03, 0xC903, 0xC503, 0x3604, 0x3A04, 0x3F04),
1207 },
1208 { .channel = 4,
1209 .freq = 2427, /* MHz */
1210 .unk2 = 3236,
1211 RADIOREGS(0x73, 0x09, 0x7B, 0x0F, 0x00, 0x01, 0x07, 0x15,
1212 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0C, 0x0A,
1213 0x80, 0xFF, 0x88, 0x0C, 0x0A, 0x80),
1214 PHYREGS(0xCF03, 0xCB03, 0xC703, 0x3404, 0x3804, 0x3D04),
1215 },
1216 { .channel = 5,
1217 .freq = 2432, /* MHz */
1218 .unk2 = 3243,
1219 RADIOREGS(0x73, 0x09, 0x80, 0x0F, 0x00, 0x01, 0x07, 0x15,
1220 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0C, 0x09,
1221 0x80, 0xFF, 0x88, 0x0C, 0x09, 0x80),
1222 PHYREGS(0xD103, 0xCD03, 0xC903, 0x3104, 0x3604, 0x3A04),
1223 },
1224 { .channel = 6,
1225 .freq = 2437, /* MHz */
1226 .unk2 = 3249,
1227 RADIOREGS(0x73, 0x09, 0x85, 0x0F, 0x00, 0x01, 0x07, 0x15,
1228 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0B, 0x08,
1229 0x80, 0xFF, 0x88, 0x0B, 0x08, 0x80),
1230 PHYREGS(0xD303, 0xCF03, 0xCB03, 0x2F04, 0x3404, 0x3804),
1231 },
1232 { .channel = 7,
1233 .freq = 2442, /* MHz */
1234 .unk2 = 3256,
1235 RADIOREGS(0x73, 0x09, 0x8A, 0x0F, 0x00, 0x01, 0x07, 0x15,
1236 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0A, 0x07,
1237 0x80, 0xFF, 0x88, 0x0A, 0x07, 0x80),
1238 PHYREGS(0xD503, 0xD103, 0xCD03, 0x2D04, 0x3104, 0x3604),
1239 },
1240 { .channel = 8,
1241 .freq = 2447, /* MHz */
1242 .unk2 = 3263,
1243 RADIOREGS(0x73, 0x09, 0x8F, 0x0F, 0x00, 0x01, 0x07, 0x15,
1244 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0A, 0x06,
1245 0x80, 0xFF, 0x88, 0x0A, 0x06, 0x80),
1246 PHYREGS(0xD703, 0xD303, 0xCF03, 0x2B04, 0x2F04, 0x3404),
1247 },
1248 { .channel = 9,
1249 .freq = 2452, /* MHz */
1250 .unk2 = 3269,
1251 RADIOREGS(0x73, 0x09, 0x94, 0x0F, 0x00, 0x01, 0x07, 0x15,
1252 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x09, 0x06,
1253 0x80, 0xFF, 0x88, 0x09, 0x06, 0x80),
1254 PHYREGS(0xD903, 0xD503, 0xD103, 0x2904, 0x2D04, 0x3104),
1255 },
1256 { .channel = 10,
1257 .freq = 2457, /* MHz */
1258 .unk2 = 3276,
1259 RADIOREGS(0x73, 0x09, 0x99, 0x0F, 0x00, 0x01, 0x07, 0x15,
1260 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x08, 0x05,
1261 0x80, 0xFF, 0x88, 0x08, 0x05, 0x80),
1262 PHYREGS(0xDB03, 0xD703, 0xD303, 0x2704, 0x2B04, 0x2F04),
1263 },
1264 { .channel = 11,
1265 .freq = 2462, /* MHz */
1266 .unk2 = 3283,
1267 RADIOREGS(0x73, 0x09, 0x9E, 0x0F, 0x00, 0x01, 0x07, 0x15,
1268 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x08, 0x04,
1269 0x80, 0xFF, 0x88, 0x08, 0x04, 0x80),
1270 PHYREGS(0xDD03, 0xD903, 0xD503, 0x2404, 0x2904, 0x2D04),
1271 },
1272 { .channel = 12,
1273 .freq = 2467, /* MHz */
1274 .unk2 = 3289,
1275 RADIOREGS(0x73, 0x09, 0xA3, 0x0F, 0x00, 0x01, 0x07, 0x15,
1276 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x08, 0x03,
1277 0x80, 0xFF, 0x88, 0x08, 0x03, 0x80),
1278 PHYREGS(0xDF03, 0xDB03, 0xD703, 0x2204, 0x2704, 0x2B04),
1279 },
1280 { .channel = 13,
1281 .freq = 2472, /* MHz */
1282 .unk2 = 3296,
1283 RADIOREGS(0x73, 0x09, 0xA8, 0x0F, 0x00, 0x01, 0x07, 0x15,
1284 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x07, 0x03,
1285 0x80, 0xFF, 0x88, 0x07, 0x03, 0x80),
1286 PHYREGS(0xE103, 0xDD03, 0xD903, 0x2004, 0x2404, 0x2904),
1287 },
1288 { .channel = 14,
1289 .freq = 2484, /* MHz */
1290 .unk2 = 3312,
1291 RADIOREGS(0x73, 0x09, 0xB4, 0x0F, 0xFF, 0x01, 0x07, 0x15,
1292 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x07, 0x01,
1293 0x80, 0xFF, 0x88, 0x07, 0x01, 0x80),
1294 PHYREGS(0xE603, 0xE203, 0xDE03, 0x1B04, 0x1F04, 0x2404),
1295 },
1296};
1297
1298void b2055_upload_inittab(struct b43_wldev *dev,
1299 bool ghz5, bool ignore_uploadflag)
1300{
1301 const struct b2055_inittab_entry *e;
1302 unsigned int i;
1303 u16 value;
1304
1305 for (i = 0; i < ARRAY_SIZE(b2055_inittab); i++) {
1306 e = &(b2055_inittab[i]);
1307 if (!(e->flags & B2055_INITTAB_ENTRY_OK))
1308 continue;
1309 if ((e->flags & B2055_INITTAB_UPLOAD) || ignore_uploadflag) {
1310 if (ghz5)
1311 value = e->ghz5;
1312 else
1313 value = e->ghz2;
1314 b43_radio_write16(dev, i, value);
1315 }
1316 }
1317}
1318
1319const struct b43_nphy_channeltab_entry_rev2 *
1320b43_nphy_get_chantabent_rev2(struct b43_wldev *dev, u8 channel)
1321{
1322 const struct b43_nphy_channeltab_entry_rev2 *e;
1323 unsigned int i;
1324
1325 for (i = 0; i < ARRAY_SIZE(b43_nphy_channeltab_rev2); i++) {
1326 e = &(b43_nphy_channeltab_rev2[i]);
1327 if (e->channel == channel)
1328 return e;
1329 }
1330
1331 return NULL;
1332}
diff --git a/drivers/net/wireless/b43/radio_2055.h b/drivers/net/wireless/b43/radio_2055.h
new file mode 100644
index 000000000000..d9bfa0f21b72
--- /dev/null
+++ b/drivers/net/wireless/b43/radio_2055.h
@@ -0,0 +1,254 @@
1#ifndef B43_RADIO_2055_H_
2#define B43_RADIO_2055_H_
3
4#include <linux/types.h>
5
6#include "tables_nphy.h"
7
8#define B2055_GEN_SPARE 0x00 /* GEN spare */
9#define B2055_SP_PINPD 0x02 /* SP PIN PD */
10#define B2055_C1_SP_RSSI 0x03 /* SP RSSI Core 1 */
11#define B2055_C1_SP_PDMISC 0x04 /* SP PD MISC Core 1 */
12#define B2055_C2_SP_RSSI 0x05 /* SP RSSI Core 2 */
13#define B2055_C2_SP_PDMISC 0x06 /* SP PD MISC Core 2 */
14#define B2055_C1_SP_RXGC1 0x07 /* SP RX GC1 Core 1 */
15#define B2055_C1_SP_RXGC2 0x08 /* SP RX GC2 Core 1 */
16#define B2055_C2_SP_RXGC1 0x09 /* SP RX GC1 Core 2 */
17#define B2055_C2_SP_RXGC2 0x0A /* SP RX GC2 Core 2 */
18#define B2055_C1_SP_LPFBWSEL 0x0B /* SP LPF BW select Core 1 */
19#define B2055_C2_SP_LPFBWSEL 0x0C /* SP LPF BW select Core 2 */
20#define B2055_C1_SP_TXGC1 0x0D /* SP TX GC1 Core 1 */
21#define B2055_C1_SP_TXGC2 0x0E /* SP TX GC2 Core 1 */
22#define B2055_C2_SP_TXGC1 0x0F /* SP TX GC1 Core 2 */
23#define B2055_C2_SP_TXGC2 0x10 /* SP TX GC2 Core 2 */
24#define B2055_MASTER1 0x11 /* Master control 1 */
25#define B2055_MASTER2 0x12 /* Master control 2 */
26#define B2055_PD_LGEN 0x13 /* PD LGEN */
27#define B2055_PD_PLLTS 0x14 /* PD PLL TS */
28#define B2055_C1_PD_LGBUF 0x15 /* PD Core 1 LGBUF */
29#define B2055_C1_PD_TX 0x16 /* PD Core 1 TX */
30#define B2055_C1_PD_RXTX 0x17 /* PD Core 1 RXTX */
31#define B2055_C1_PD_RSSIMISC 0x18 /* PD Core 1 RSSI MISC */
32#define B2055_C2_PD_LGBUF 0x19 /* PD Core 2 LGBUF */
33#define B2055_C2_PD_TX 0x1A /* PD Core 2 TX */
34#define B2055_C2_PD_RXTX 0x1B /* PD Core 2 RXTX */
35#define B2055_C2_PD_RSSIMISC 0x1C /* PD Core 2 RSSI MISC */
36#define B2055_PWRDET_LGEN 0x1D /* PWRDET LGEN */
37#define B2055_C1_PWRDET_LGBUF 0x1E /* PWRDET LGBUF Core 1 */
38#define B2055_C1_PWRDET_RXTX 0x1F /* PWRDET RXTX Core 1 */
39#define B2055_C2_PWRDET_LGBUF 0x20 /* PWRDET LGBUF Core 2 */
40#define B2055_C2_PWRDET_RXTX 0x21 /* PWRDET RXTX Core 2 */
41#define B2055_RRCCAL_CS 0x22 /* RRCCAL Control spare */
42#define B2055_RRCCAL_NOPTSEL 0x23 /* RRCCAL N OPT SEL */
43#define B2055_CAL_MISC 0x24 /* CAL MISC */
44#define B2055_CAL_COUT 0x25 /* CAL Counter out */
45#define B2055_CAL_COUT2 0x26 /* CAL Counter out 2 */
46#define B2055_CAL_CVARCTL 0x27 /* CAL CVAR Control */
47#define B2055_CAL_RVARCTL 0x28 /* CAL RVAR Control */
48#define B2055_CAL_LPOCTL 0x29 /* CAL LPO Control */
49#define B2055_CAL_TS 0x2A /* CAL TS */
50#define B2055_CAL_RCCALRTS 0x2B /* CAL RCCAL READ TS */
51#define B2055_CAL_RCALRTS 0x2C /* CAL RCAL READ TS */
52#define B2055_PADDRV 0x2D /* PAD driver */
53#define B2055_XOCTL1 0x2E /* XO Control 1 */
54#define B2055_XOCTL2 0x2F /* XO Control 2 */
55#define B2055_XOREGUL 0x30 /* XO Regulator */
56#define B2055_XOMISC 0x31 /* XO misc */
57#define B2055_PLL_LFC1 0x32 /* PLL LF C1 */
58#define B2055_PLL_CALVTH 0x33 /* PLL CAL VTH */
59#define B2055_PLL_LFC2 0x34 /* PLL LF C2 */
60#define B2055_PLL_REF 0x35 /* PLL reference */
61#define B2055_PLL_LFR1 0x36 /* PLL LF R1 */
62#define B2055_PLL_PFDCP 0x37 /* PLL PFD CP */
63#define B2055_PLL_IDAC_CPOPAMP 0x38 /* PLL IDAC CPOPAMP */
64#define B2055_PLL_CPREG 0x39 /* PLL CP Regulator */
65#define B2055_PLL_RCAL 0x3A /* PLL RCAL */
66#define B2055_RF_PLLMOD0 0x3B /* RF PLL MOD0 */
67#define B2055_RF_PLLMOD1 0x3C /* RF PLL MOD1 */
68#define B2055_RF_MMDIDAC1 0x3D /* RF MMD IDAC 1 */
69#define B2055_RF_MMDIDAC0 0x3E /* RF MMD IDAC 0 */
70#define B2055_RF_MMDSP 0x3F /* RF MMD spare */
71#define B2055_VCO_CAL1 0x40 /* VCO cal 1 */
72#define B2055_VCO_CAL2 0x41 /* VCO cal 2 */
73#define B2055_VCO_CAL3 0x42 /* VCO cal 3 */
74#define B2055_VCO_CAL4 0x43 /* VCO cal 4 */
75#define B2055_VCO_CAL5 0x44 /* VCO cal 5 */
76#define B2055_VCO_CAL6 0x45 /* VCO cal 6 */
77#define B2055_VCO_CAL7 0x46 /* VCO cal 7 */
78#define B2055_VCO_CAL8 0x47 /* VCO cal 8 */
79#define B2055_VCO_CAL9 0x48 /* VCO cal 9 */
80#define B2055_VCO_CAL10 0x49 /* VCO cal 10 */
81#define B2055_VCO_CAL11 0x4A /* VCO cal 11 */
82#define B2055_VCO_CAL12 0x4B /* VCO cal 12 */
83#define B2055_VCO_CAL13 0x4C /* VCO cal 13 */
84#define B2055_VCO_CAL14 0x4D /* VCO cal 14 */
85#define B2055_VCO_CAL15 0x4E /* VCO cal 15 */
86#define B2055_VCO_CAL16 0x4F /* VCO cal 16 */
87#define B2055_VCO_KVCO 0x50 /* VCO KVCO */
88#define B2055_VCO_CAPTAIL 0x51 /* VCO CAP TAIL */
89#define B2055_VCO_IDACVCO 0x52 /* VCO IDAC VCO */
90#define B2055_VCO_REG 0x53 /* VCO Regulator */
91#define B2055_PLL_RFVTH 0x54 /* PLL RF VTH */
92#define B2055_LGBUF_CENBUF 0x55 /* LGBUF CEN BUF */
93#define B2055_LGEN_TUNE1 0x56 /* LGEN tune 1 */
94#define B2055_LGEN_TUNE2 0x57 /* LGEN tune 2 */
95#define B2055_LGEN_IDAC1 0x58 /* LGEN IDAC 1 */
96#define B2055_LGEN_IDAC2 0x59 /* LGEN IDAC 2 */
97#define B2055_LGEN_BIASC 0x5A /* LGEN BIAS counter */
98#define B2055_LGEN_BIASIDAC 0x5B /* LGEN BIAS IDAC */
99#define B2055_LGEN_RCAL 0x5C /* LGEN RCAL */
100#define B2055_LGEN_DIV 0x5D /* LGEN div */
101#define B2055_LGEN_SPARE2 0x5E /* LGEN spare 2 */
102#define B2055_C1_LGBUF_ATUNE 0x5F /* Core 1 LGBUF A tune */
103#define B2055_C1_LGBUF_GTUNE 0x60 /* Core 1 LGBUF G tune */
104#define B2055_C1_LGBUF_DIV 0x61 /* Core 1 LGBUF div */
105#define B2055_C1_LGBUF_AIDAC 0x62 /* Core 1 LGBUF A IDAC */
106#define B2055_C1_LGBUF_GIDAC 0x63 /* Core 1 LGBUF G IDAC */
107#define B2055_C1_LGBUF_IDACFO 0x64 /* Core 1 LGBUF IDAC filter override */
108#define B2055_C1_LGBUF_SPARE 0x65 /* Core 1 LGBUF spare */
109#define B2055_C1_RX_RFSPC1 0x66 /* Core 1 RX RF SPC1 */
110#define B2055_C1_RX_RFR1 0x67 /* Core 1 RX RF reg 1 */
111#define B2055_C1_RX_RFR2 0x68 /* Core 1 RX RF reg 2 */
112#define B2055_C1_RX_RFRCAL 0x69 /* Core 1 RX RF RCAL */
113#define B2055_C1_RX_BB_BLCMP 0x6A /* Core 1 RX Baseband BUFI LPF CMP */
114#define B2055_C1_RX_BB_LPF 0x6B /* Core 1 RX Baseband LPF */
115#define B2055_C1_RX_BB_MIDACHP 0x6C /* Core 1 RX Baseband MIDAC High-pass */
116#define B2055_C1_RX_BB_VGA1IDAC 0x6D /* Core 1 RX Baseband VGA1 IDAC */
117#define B2055_C1_RX_BB_VGA2IDAC 0x6E /* Core 1 RX Baseband VGA2 IDAC */
118#define B2055_C1_RX_BB_VGA3IDAC 0x6F /* Core 1 RX Baseband VGA3 IDAC */
119#define B2055_C1_RX_BB_BUFOCTL 0x70 /* Core 1 RX Baseband BUFO Control */
120#define B2055_C1_RX_BB_RCCALCTL 0x71 /* Core 1 RX Baseband RCCAL Control */
121#define B2055_C1_RX_BB_RSSICTL1 0x72 /* Core 1 RX Baseband RSSI Control 1 */
122#define B2055_C1_RX_BB_RSSICTL2 0x73 /* Core 1 RX Baseband RSSI Control 2 */
123#define B2055_C1_RX_BB_RSSICTL3 0x74 /* Core 1 RX Baseband RSSI Control 3 */
124#define B2055_C1_RX_BB_RSSICTL4 0x75 /* Core 1 RX Baseband RSSI Control 4 */
125#define B2055_C1_RX_BB_RSSICTL5 0x76 /* Core 1 RX Baseband RSSI Control 5 */
126#define B2055_C1_RX_BB_REG 0x77 /* Core 1 RX Baseband Regulator */
127#define B2055_C1_RX_BB_SPARE1 0x78 /* Core 1 RX Baseband spare 1 */
128#define B2055_C1_RX_TXBBRCAL 0x79 /* Core 1 RX TX BB RCAL */
129#define B2055_C1_TX_RF_SPGA 0x7A /* Core 1 TX RF SGM PGA */
130#define B2055_C1_TX_RF_SPAD 0x7B /* Core 1 TX RF SGM PAD */
131#define B2055_C1_TX_RF_CNTPGA1 0x7C /* Core 1 TX RF counter PGA 1 */
132#define B2055_C1_TX_RF_CNTPAD1 0x7D /* Core 1 TX RF counter PAD 1 */
133#define B2055_C1_TX_RF_PGAIDAC 0x7E /* Core 1 TX RF PGA IDAC */
134#define B2055_C1_TX_PGAPADTN 0x7F /* Core 1 TX PGA PAD TN */
135#define B2055_C1_TX_PADIDAC1 0x80 /* Core 1 TX PAD IDAC 1 */
136#define B2055_C1_TX_PADIDAC2 0x81 /* Core 1 TX PAD IDAC 2 */
137#define B2055_C1_TX_MXBGTRIM 0x82 /* Core 1 TX MX B/G TRIM */
138#define B2055_C1_TX_RF_RCAL 0x83 /* Core 1 TX RF RCAL */
139#define B2055_C1_TX_RF_PADTSSI1 0x84 /* Core 1 TX RF PAD TSSI1 */
140#define B2055_C1_TX_RF_PADTSSI2 0x85 /* Core 1 TX RF PAD TSSI2 */
141#define B2055_C1_TX_RF_SPARE 0x86 /* Core 1 TX RF spare */
142#define B2055_C1_TX_RF_IQCAL1 0x87 /* Core 1 TX RF I/Q CAL 1 */
143#define B2055_C1_TX_RF_IQCAL2 0x88 /* Core 1 TX RF I/Q CAL 2 */
144#define B2055_C1_TXBB_RCCAL 0x89 /* Core 1 TXBB RC CAL Control */
145#define B2055_C1_TXBB_LPF1 0x8A /* Core 1 TXBB LPF 1 */
146#define B2055_C1_TX_VOSCNCL 0x8B /* Core 1 TX VOS CNCL */
147#define B2055_C1_TX_LPF_MXGMIDAC 0x8C /* Core 1 TX LPF MXGM IDAC */
148#define B2055_C1_TX_BB_MXGM 0x8D /* Core 1 TX BB MXGM */
149#define B2055_C2_LGBUF_ATUNE 0x8E /* Core 2 LGBUF A tune */
150#define B2055_C2_LGBUF_GTUNE 0x8F /* Core 2 LGBUF G tune */
151#define B2055_C2_LGBUF_DIV 0x90 /* Core 2 LGBUF div */
152#define B2055_C2_LGBUF_AIDAC 0x91 /* Core 2 LGBUF A IDAC */
153#define B2055_C2_LGBUF_GIDAC 0x92 /* Core 2 LGBUF G IDAC */
154#define B2055_C2_LGBUF_IDACFO 0x93 /* Core 2 LGBUF IDAC filter override */
155#define B2055_C2_LGBUF_SPARE 0x94 /* Core 2 LGBUF spare */
156#define B2055_C2_RX_RFSPC1 0x95 /* Core 2 RX RF SPC1 */
157#define B2055_C2_RX_RFR1 0x96 /* Core 2 RX RF reg 1 */
158#define B2055_C2_RX_RFR2 0x97 /* Core 2 RX RF reg 2 */
159#define B2055_C2_RX_RFRCAL 0x98 /* Core 2 RX RF RCAL */
160#define B2055_C2_RX_BB_BLCMP 0x99 /* Core 2 RX Baseband BUFI LPF CMP */
161#define B2055_C2_RX_BB_LPF 0x9A /* Core 2 RX Baseband LPF */
162#define B2055_C2_RX_BB_MIDACHP 0x9B /* Core 2 RX Baseband MIDAC High-pass */
163#define B2055_C2_RX_BB_VGA1IDAC 0x9C /* Core 2 RX Baseband VGA1 IDAC */
164#define B2055_C2_RX_BB_VGA2IDAC 0x9D /* Core 2 RX Baseband VGA2 IDAC */
165#define B2055_C2_RX_BB_VGA3IDAC 0x9E /* Core 2 RX Baseband VGA3 IDAC */
166#define B2055_C2_RX_BB_BUFOCTL 0x9F /* Core 2 RX Baseband BUFO Control */
167#define B2055_C2_RX_BB_RCCALCTL 0xA0 /* Core 2 RX Baseband RCCAL Control */
168#define B2055_C2_RX_BB_RSSICTL1 0xA1 /* Core 2 RX Baseband RSSI Control 1 */
169#define B2055_C2_RX_BB_RSSICTL2 0xA2 /* Core 2 RX Baseband RSSI Control 2 */
170#define B2055_C2_RX_BB_RSSICTL3 0xA3 /* Core 2 RX Baseband RSSI Control 3 */
171#define B2055_C2_RX_BB_RSSICTL4 0xA4 /* Core 2 RX Baseband RSSI Control 4 */
172#define B2055_C2_RX_BB_RSSICTL5 0xA5 /* Core 2 RX Baseband RSSI Control 5 */
173#define B2055_C2_RX_BB_REG 0xA6 /* Core 2 RX Baseband Regulator */
174#define B2055_C2_RX_BB_SPARE1 0xA7 /* Core 2 RX Baseband spare 1 */
175#define B2055_C2_RX_TXBBRCAL 0xA8 /* Core 2 RX TX BB RCAL */
176#define B2055_C2_TX_RF_SPGA 0xA9 /* Core 2 TX RF SGM PGA */
177#define B2055_C2_TX_RF_SPAD 0xAA /* Core 2 TX RF SGM PAD */
178#define B2055_C2_TX_RF_CNTPGA1 0xAB /* Core 2 TX RF counter PGA 1 */
179#define B2055_C2_TX_RF_CNTPAD1 0xAC /* Core 2 TX RF counter PAD 1 */
180#define B2055_C2_TX_RF_PGAIDAC 0xAD /* Core 2 TX RF PGA IDAC */
181#define B2055_C2_TX_PGAPADTN 0xAE /* Core 2 TX PGA PAD TN */
182#define B2055_C2_TX_PADIDAC1 0xAF /* Core 2 TX PAD IDAC 1 */
183#define B2055_C2_TX_PADIDAC2 0xB0 /* Core 2 TX PAD IDAC 2 */
184#define B2055_C2_TX_MXBGTRIM 0xB1 /* Core 2 TX MX B/G TRIM */
185#define B2055_C2_TX_RF_RCAL 0xB2 /* Core 2 TX RF RCAL */
186#define B2055_C2_TX_RF_PADTSSI1 0xB3 /* Core 2 TX RF PAD TSSI1 */
187#define B2055_C2_TX_RF_PADTSSI2 0xB4 /* Core 2 TX RF PAD TSSI2 */
188#define B2055_C2_TX_RF_SPARE 0xB5 /* Core 2 TX RF spare */
189#define B2055_C2_TX_RF_IQCAL1 0xB6 /* Core 2 TX RF I/Q CAL 1 */
190#define B2055_C2_TX_RF_IQCAL2 0xB7 /* Core 2 TX RF I/Q CAL 2 */
191#define B2055_C2_TXBB_RCCAL 0xB8 /* Core 2 TXBB RC CAL Control */
192#define B2055_C2_TXBB_LPF1 0xB9 /* Core 2 TXBB LPF 1 */
193#define B2055_C2_TX_VOSCNCL 0xBA /* Core 2 TX VOS CNCL */
194#define B2055_C2_TX_LPF_MXGMIDAC 0xBB /* Core 2 TX LPF MXGM IDAC */
195#define B2055_C2_TX_BB_MXGM 0xBC /* Core 2 TX BB MXGM */
196#define B2055_PRG_GCHP21 0xBD /* PRG GC HPVGA23 21 */
197#define B2055_PRG_GCHP22 0xBE /* PRG GC HPVGA23 22 */
198#define B2055_PRG_GCHP23 0xBF /* PRG GC HPVGA23 23 */
199#define B2055_PRG_GCHP24 0xC0 /* PRG GC HPVGA23 24 */
200#define B2055_PRG_GCHP25 0xC1 /* PRG GC HPVGA23 25 */
201#define B2055_PRG_GCHP26 0xC2 /* PRG GC HPVGA23 26 */
202#define B2055_PRG_GCHP27 0xC3 /* PRG GC HPVGA23 27 */
203#define B2055_PRG_GCHP28 0xC4 /* PRG GC HPVGA23 28 */
204#define B2055_PRG_GCHP29 0xC5 /* PRG GC HPVGA23 29 */
205#define B2055_PRG_GCHP30 0xC6 /* PRG GC HPVGA23 30 */
206#define B2055_C1_LNA_GAINBST 0xCD /* Core 1 LNA GAINBST */
207#define B2055_C1_B0NB_RSSIVCM 0xD2 /* Core 1 B0 narrow-band RSSI VCM */
208#define B2055_C1_GENSPARE2 0xD6 /* Core 1 GEN spare 2 */
209#define B2055_C2_LNA_GAINBST 0xD9 /* Core 2 LNA GAINBST */
210#define B2055_C2_B0NB_RSSIVCM 0xDE /* Core 2 B0 narrow-band RSSI VCM */
211#define B2055_C2_GENSPARE2 0xE2 /* Core 2 GEN spare 2 */
212
213struct b43_nphy_channeltab_entry_rev2 {
214 /* The channel number */
215 u8 channel;
216 /* The channel frequency in MHz */
217 u16 freq;
218 /* An unknown value */
219 u16 unk2;
220 /* Radio register values on channelswitch */
221 u8 radio_pll_ref;
222 u8 radio_rf_pllmod0;
223 u8 radio_rf_pllmod1;
224 u8 radio_vco_captail;
225 u8 radio_vco_cal1;
226 u8 radio_vco_cal2;
227 u8 radio_pll_lfc1;
228 u8 radio_pll_lfr1;
229 u8 radio_pll_lfc2;
230 u8 radio_lgbuf_cenbuf;
231 u8 radio_lgen_tune1;
232 u8 radio_lgen_tune2;
233 u8 radio_c1_lgbuf_atune;
234 u8 radio_c1_lgbuf_gtune;
235 u8 radio_c1_rx_rfr1;
236 u8 radio_c1_tx_pgapadtn;
237 u8 radio_c1_tx_mxbgtrim;
238 u8 radio_c2_lgbuf_atune;
239 u8 radio_c2_lgbuf_gtune;
240 u8 radio_c2_rx_rfr1;
241 u8 radio_c2_tx_pgapadtn;
242 u8 radio_c2_tx_mxbgtrim;
243 /* PHY register values on channelswitch */
244 struct b43_phy_n_sfo_cfg phy_regs;
245};
246
247/* Upload the default register value table.
248 * If "ghz5" is true, we upload the 5Ghz table. Otherwise the 2.4Ghz
249 * table is uploaded. If "ignore_uploadflag" is true, we upload any value
250 * and ignore the "UPLOAD" flag. */
251void b2055_upload_inittab(struct b43_wldev *dev,
252 bool ghz5, bool ignore_uploadflag);
253
254#endif /* B43_RADIO_2055_H_ */
diff --git a/drivers/net/wireless/b43/radio_2056.c b/drivers/net/wireless/b43/radio_2056.c
new file mode 100644
index 000000000000..d8563192ce56
--- /dev/null
+++ b/drivers/net/wireless/b43/radio_2056.c
@@ -0,0 +1,43 @@
1/*
2
3 Broadcom B43 wireless driver
4 IEEE 802.11n 2056 radio device data tables
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; see the file COPYING. If not, write to
18 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
19 Boston, MA 02110-1301, USA.
20
21*/
22
23#include "b43.h"
24#include "radio_2056.h"
25#include "phy_common.h"
26
27static const struct b43_nphy_channeltab_entry_rev3 b43_nphy_channeltab_rev3[] = {
28};
29
30const struct b43_nphy_channeltab_entry_rev3 *
31b43_nphy_get_chantabent_rev3(struct b43_wldev *dev, u16 freq)
32{
33 const struct b43_nphy_channeltab_entry_rev3 *e;
34 unsigned int i;
35
36 for (i = 0; i < ARRAY_SIZE(b43_nphy_channeltab_rev3); i++) {
37 e = &(b43_nphy_channeltab_rev3[i]);
38 if (e->freq == freq)
39 return e;
40 }
41
42 return NULL;
43}
diff --git a/drivers/net/wireless/b43/radio_2056.h b/drivers/net/wireless/b43/radio_2056.h
new file mode 100644
index 000000000000..fda6dafecb8c
--- /dev/null
+++ b/drivers/net/wireless/b43/radio_2056.h
@@ -0,0 +1,42 @@
1/*
2
3 Broadcom B43 wireless driver
4
5 Copyright (c) 2010 Rafał Miłecki <zajec5@gmail.com>
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; see the file COPYING. If not, write to
19 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
20 Boston, MA 02110-1301, USA.
21
22*/
23
24#ifndef B43_RADIO_2056_H_
25#define B43_RADIO_2056_H_
26
27#include <linux/types.h>
28
29#include "tables_nphy.h"
30
31struct b43_nphy_channeltab_entry_rev3 {
32 /* The channel number */
33 u8 channel;
34 /* The channel frequency in MHz */
35 u16 freq;
36 /* Radio register values on channelswitch */
37 /* TODO */
38 /* PHY register values on channelswitch */
39 struct b43_phy_n_sfo_cfg phy_regs;
40};
41
42#endif /* B43_RADIO_2056_H_ */
diff --git a/drivers/net/wireless/b43/tables_nphy.c b/drivers/net/wireless/b43/tables_nphy.c
index d96e870ab8fe..d60db078eae2 100644
--- a/drivers/net/wireless/b43/tables_nphy.c
+++ b/drivers/net/wireless/b43/tables_nphy.c
@@ -1,7 +1,7 @@
1/* 1/*
2 2
3 Broadcom B43 wireless driver 3 Broadcom B43 wireless driver
4 IEEE 802.11n PHY and radio device data tables 4 IEEE 802.11n PHY data tables
5 5
6 Copyright (c) 2008 Michael Buesch <mb@bu3sch.de> 6 Copyright (c) 2008 Michael Buesch <mb@bu3sch.de>
7 7
@@ -27,1315 +27,6 @@
27#include "phy_common.h" 27#include "phy_common.h"
28#include "phy_n.h" 28#include "phy_n.h"
29 29
30
31struct b2055_inittab_entry {
32 /* Value to write if we use the 5GHz band. */
33 u16 ghz5;
34 /* Value to write if we use the 2.4GHz band. */
35 u16 ghz2;
36 /* Flags */
37 u8 flags;
38#define B2055_INITTAB_ENTRY_OK 0x01
39#define B2055_INITTAB_UPLOAD 0x02
40};
41#define UPLOAD .flags = B2055_INITTAB_ENTRY_OK | B2055_INITTAB_UPLOAD
42#define NOUPLOAD .flags = B2055_INITTAB_ENTRY_OK
43
44static const struct b2055_inittab_entry b2055_inittab [] = {
45 [B2055_SP_PINPD] = { .ghz5 = 0x0080, .ghz2 = 0x0080, NOUPLOAD, },
46 [B2055_C1_SP_RSSI] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
47 [B2055_C1_SP_PDMISC] = { .ghz5 = 0x0027, .ghz2 = 0x0027, NOUPLOAD, },
48 [B2055_C2_SP_RSSI] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
49 [B2055_C2_SP_PDMISC] = { .ghz5 = 0x0027, .ghz2 = 0x0027, NOUPLOAD, },
50 [B2055_C1_SP_RXGC1] = { .ghz5 = 0x007F, .ghz2 = 0x007F, UPLOAD, },
51 [B2055_C1_SP_RXGC2] = { .ghz5 = 0x0007, .ghz2 = 0x0007, UPLOAD, },
52 [B2055_C2_SP_RXGC1] = { .ghz5 = 0x007F, .ghz2 = 0x007F, UPLOAD, },
53 [B2055_C2_SP_RXGC2] = { .ghz5 = 0x0007, .ghz2 = 0x0007, UPLOAD, },
54 [B2055_C1_SP_LPFBWSEL] = { .ghz5 = 0x0015, .ghz2 = 0x0015, NOUPLOAD, },
55 [B2055_C2_SP_LPFBWSEL] = { .ghz5 = 0x0015, .ghz2 = 0x0015, NOUPLOAD, },
56 [B2055_C1_SP_TXGC1] = { .ghz5 = 0x004F, .ghz2 = 0x004F, UPLOAD, },
57 [B2055_C1_SP_TXGC2] = { .ghz5 = 0x0005, .ghz2 = 0x0005, UPLOAD, },
58 [B2055_C2_SP_TXGC1] = { .ghz5 = 0x004F, .ghz2 = 0x004F, UPLOAD, },
59 [B2055_C2_SP_TXGC2] = { .ghz5 = 0x0005, .ghz2 = 0x0005, UPLOAD, },
60 [B2055_MASTER1] = { .ghz5 = 0x00D0, .ghz2 = 0x00D0, NOUPLOAD, },
61 [B2055_MASTER2] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
62 [B2055_PD_LGEN] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
63 [B2055_PD_PLLTS] = { .ghz5 = 0x0040, .ghz2 = 0x0040, NOUPLOAD, },
64 [B2055_C1_PD_LGBUF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
65 [B2055_C1_PD_TX] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
66 [B2055_C1_PD_RXTX] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
67 [B2055_C1_PD_RSSIMISC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
68 [B2055_C2_PD_LGBUF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
69 [B2055_C2_PD_TX] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
70 [B2055_C2_PD_RXTX] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
71 [B2055_C2_PD_RSSIMISC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
72 [B2055_PWRDET_LGEN] = { .ghz5 = 0x00C0, .ghz2 = 0x00C0, NOUPLOAD, },
73 [B2055_C1_PWRDET_LGBUF] = { .ghz5 = 0x00FF, .ghz2 = 0x00FF, NOUPLOAD, },
74 [B2055_C1_PWRDET_RXTX] = { .ghz5 = 0x00C0, .ghz2 = 0x00C0, NOUPLOAD, },
75 [B2055_C2_PWRDET_LGBUF] = { .ghz5 = 0x00FF, .ghz2 = 0x00FF, NOUPLOAD, },
76 [B2055_C2_PWRDET_RXTX] = { .ghz5 = 0x00C0, .ghz2 = 0x00C0, NOUPLOAD, },
77 [B2055_RRCCAL_CS] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
78 [B2055_RRCCAL_NOPTSEL] = { .ghz5 = 0x002C, .ghz2 = 0x002C, NOUPLOAD, },
79 [B2055_CAL_MISC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
80 [B2055_CAL_COUT] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
81 [B2055_CAL_COUT2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
82 [B2055_CAL_CVARCTL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
83 [B2055_CAL_RVARCTL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
84 [B2055_CAL_LPOCTL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
85 [B2055_CAL_TS] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
86 [B2055_CAL_RCCALRTS] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
87 [B2055_CAL_RCALRTS] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
88 [B2055_PADDRV] = { .ghz5 = 0x00A4, .ghz2 = 0x00A4, NOUPLOAD, },
89 [B2055_XOCTL1] = { .ghz5 = 0x0038, .ghz2 = 0x0038, NOUPLOAD, },
90 [B2055_XOCTL2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
91 [B2055_XOREGUL] = { .ghz5 = 0x0004, .ghz2 = 0x0004, UPLOAD, },
92 [B2055_XOMISC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
93 [B2055_PLL_LFC1] = { .ghz5 = 0x000A, .ghz2 = 0x000A, NOUPLOAD, },
94 [B2055_PLL_CALVTH] = { .ghz5 = 0x0087, .ghz2 = 0x0087, NOUPLOAD, },
95 [B2055_PLL_LFC2] = { .ghz5 = 0x0009, .ghz2 = 0x0009, NOUPLOAD, },
96 [B2055_PLL_REF] = { .ghz5 = 0x0070, .ghz2 = 0x0070, NOUPLOAD, },
97 [B2055_PLL_LFR1] = { .ghz5 = 0x0011, .ghz2 = 0x0011, NOUPLOAD, },
98 [B2055_PLL_PFDCP] = { .ghz5 = 0x0018, .ghz2 = 0x0018, UPLOAD, },
99 [B2055_PLL_IDAC_CPOPAMP] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
100 [B2055_PLL_CPREG] = { .ghz5 = 0x0004, .ghz2 = 0x0004, UPLOAD, },
101 [B2055_PLL_RCAL] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
102 [B2055_RF_PLLMOD0] = { .ghz5 = 0x009E, .ghz2 = 0x009E, NOUPLOAD, },
103 [B2055_RF_PLLMOD1] = { .ghz5 = 0x0009, .ghz2 = 0x0009, NOUPLOAD, },
104 [B2055_RF_MMDIDAC1] = { .ghz5 = 0x00C8, .ghz2 = 0x00C8, UPLOAD, },
105 [B2055_RF_MMDIDAC0] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
106 [B2055_RF_MMDSP] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
107 [B2055_VCO_CAL1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
108 [B2055_VCO_CAL2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
109 [B2055_VCO_CAL3] = { .ghz5 = 0x0001, .ghz2 = 0x0001, NOUPLOAD, },
110 [B2055_VCO_CAL4] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
111 [B2055_VCO_CAL5] = { .ghz5 = 0x0096, .ghz2 = 0x0096, NOUPLOAD, },
112 [B2055_VCO_CAL6] = { .ghz5 = 0x003E, .ghz2 = 0x003E, NOUPLOAD, },
113 [B2055_VCO_CAL7] = { .ghz5 = 0x003E, .ghz2 = 0x003E, NOUPLOAD, },
114 [B2055_VCO_CAL8] = { .ghz5 = 0x0013, .ghz2 = 0x0013, NOUPLOAD, },
115 [B2055_VCO_CAL9] = { .ghz5 = 0x0002, .ghz2 = 0x0002, NOUPLOAD, },
116 [B2055_VCO_CAL10] = { .ghz5 = 0x0015, .ghz2 = 0x0015, NOUPLOAD, },
117 [B2055_VCO_CAL11] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
118 [B2055_VCO_CAL12] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
119 [B2055_VCO_CAL13] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
120 [B2055_VCO_CAL14] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
121 [B2055_VCO_CAL15] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
122 [B2055_VCO_CAL16] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
123 [B2055_VCO_KVCO] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
124 [B2055_VCO_CAPTAIL] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
125 [B2055_VCO_IDACVCO] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
126 [B2055_VCO_REG] = { .ghz5 = 0x0084, .ghz2 = 0x0084, UPLOAD, },
127 [B2055_PLL_RFVTH] = { .ghz5 = 0x00C3, .ghz2 = 0x00C3, NOUPLOAD, },
128 [B2055_LGBUF_CENBUF] = { .ghz5 = 0x008F, .ghz2 = 0x008F, NOUPLOAD, },
129 [B2055_LGEN_TUNE1] = { .ghz5 = 0x00FF, .ghz2 = 0x00FF, NOUPLOAD, },
130 [B2055_LGEN_TUNE2] = { .ghz5 = 0x00FF, .ghz2 = 0x00FF, NOUPLOAD, },
131 [B2055_LGEN_IDAC1] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
132 [B2055_LGEN_IDAC2] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
133 [B2055_LGEN_BIASC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
134 [B2055_LGEN_BIASIDAC] = { .ghz5 = 0x00CC, .ghz2 = 0x00CC, NOUPLOAD, },
135 [B2055_LGEN_RCAL] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
136 [B2055_LGEN_DIV] = { .ghz5 = 0x0080, .ghz2 = 0x0080, NOUPLOAD, },
137 [B2055_LGEN_SPARE2] = { .ghz5 = 0x0080, .ghz2 = 0x0080, NOUPLOAD, },
138 [B2055_C1_LGBUF_ATUNE] = { .ghz5 = 0x00F8, .ghz2 = 0x00F8, NOUPLOAD, },
139 [B2055_C1_LGBUF_GTUNE] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
140 [B2055_C1_LGBUF_DIV] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
141 [B2055_C1_LGBUF_AIDAC] = { .ghz5 = 0x0088, .ghz2 = 0x0008, UPLOAD, },
142 [B2055_C1_LGBUF_GIDAC] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
143 [B2055_C1_LGBUF_IDACFO] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
144 [B2055_C1_LGBUF_SPARE] = { .ghz5 = 0x0001, .ghz2 = 0x0001, UPLOAD, },
145 [B2055_C1_RX_RFSPC1] = { .ghz5 = 0x008A, .ghz2 = 0x008A, NOUPLOAD, },
146 [B2055_C1_RX_RFR1] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
147 [B2055_C1_RX_RFR2] = { .ghz5 = 0x0083, .ghz2 = 0x0083, NOUPLOAD, },
148 [B2055_C1_RX_RFRCAL] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
149 [B2055_C1_RX_BB_BLCMP] = { .ghz5 = 0x00A0, .ghz2 = 0x00A0, NOUPLOAD, },
150 [B2055_C1_RX_BB_LPF] = { .ghz5 = 0x000A, .ghz2 = 0x000A, NOUPLOAD, },
151 [B2055_C1_RX_BB_MIDACHP] = { .ghz5 = 0x0087, .ghz2 = 0x0087, UPLOAD, },
152 [B2055_C1_RX_BB_VGA1IDAC] = { .ghz5 = 0x002A, .ghz2 = 0x002A, NOUPLOAD, },
153 [B2055_C1_RX_BB_VGA2IDAC] = { .ghz5 = 0x002A, .ghz2 = 0x002A, NOUPLOAD, },
154 [B2055_C1_RX_BB_VGA3IDAC] = { .ghz5 = 0x002A, .ghz2 = 0x002A, NOUPLOAD, },
155 [B2055_C1_RX_BB_BUFOCTL] = { .ghz5 = 0x002A, .ghz2 = 0x002A, NOUPLOAD, },
156 [B2055_C1_RX_BB_RCCALCTL] = { .ghz5 = 0x0018, .ghz2 = 0x0018, NOUPLOAD, },
157 [B2055_C1_RX_BB_RSSICTL1] = { .ghz5 = 0x006A, .ghz2 = 0x006A, UPLOAD, },
158 [B2055_C1_RX_BB_RSSICTL2] = { .ghz5 = 0x00AB, .ghz2 = 0x00AB, UPLOAD, },
159 [B2055_C1_RX_BB_RSSICTL3] = { .ghz5 = 0x0013, .ghz2 = 0x0013, UPLOAD, },
160 [B2055_C1_RX_BB_RSSICTL4] = { .ghz5 = 0x00C1, .ghz2 = 0x00C1, UPLOAD, },
161 [B2055_C1_RX_BB_RSSICTL5] = { .ghz5 = 0x00AA, .ghz2 = 0x00AA, UPLOAD, },
162 [B2055_C1_RX_BB_REG] = { .ghz5 = 0x0087, .ghz2 = 0x0087, UPLOAD, },
163 [B2055_C1_RX_BB_SPARE1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
164 [B2055_C1_RX_TXBBRCAL] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
165 [B2055_C1_TX_RF_SPGA] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
166 [B2055_C1_TX_RF_SPAD] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
167 [B2055_C1_TX_RF_CNTPGA1] = { .ghz5 = 0x0015, .ghz2 = 0x0015, NOUPLOAD, },
168 [B2055_C1_TX_RF_CNTPAD1] = { .ghz5 = 0x0055, .ghz2 = 0x0055, NOUPLOAD, },
169 [B2055_C1_TX_RF_PGAIDAC] = { .ghz5 = 0x0097, .ghz2 = 0x0097, UPLOAD, },
170 [B2055_C1_TX_PGAPADTN] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
171 [B2055_C1_TX_PADIDAC1] = { .ghz5 = 0x0014, .ghz2 = 0x0014, UPLOAD, },
172 [B2055_C1_TX_PADIDAC2] = { .ghz5 = 0x0033, .ghz2 = 0x0033, NOUPLOAD, },
173 [B2055_C1_TX_MXBGTRIM] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
174 [B2055_C1_TX_RF_RCAL] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
175 [B2055_C1_TX_RF_PADTSSI1] = { .ghz5 = 0x0003, .ghz2 = 0x0003, UPLOAD, },
176 [B2055_C1_TX_RF_PADTSSI2] = { .ghz5 = 0x000A, .ghz2 = 0x000A, NOUPLOAD, },
177 [B2055_C1_TX_RF_SPARE] = { .ghz5 = 0x0003, .ghz2 = 0x0003, UPLOAD, },
178 [B2055_C1_TX_RF_IQCAL1] = { .ghz5 = 0x002A, .ghz2 = 0x002A, NOUPLOAD, },
179 [B2055_C1_TX_RF_IQCAL2] = { .ghz5 = 0x00A4, .ghz2 = 0x00A4, NOUPLOAD, },
180 [B2055_C1_TXBB_RCCAL] = { .ghz5 = 0x0018, .ghz2 = 0x0018, NOUPLOAD, },
181 [B2055_C1_TXBB_LPF1] = { .ghz5 = 0x0028, .ghz2 = 0x0028, NOUPLOAD, },
182 [B2055_C1_TX_VOSCNCL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
183 [B2055_C1_TX_LPF_MXGMIDAC] = { .ghz5 = 0x004A, .ghz2 = 0x004A, NOUPLOAD, },
184 [B2055_C1_TX_BB_MXGM] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
185 [B2055_C2_LGBUF_ATUNE] = { .ghz5 = 0x00F8, .ghz2 = 0x00F8, NOUPLOAD, },
186 [B2055_C2_LGBUF_GTUNE] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
187 [B2055_C2_LGBUF_DIV] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
188 [B2055_C2_LGBUF_AIDAC] = { .ghz5 = 0x0088, .ghz2 = 0x0008, UPLOAD, },
189 [B2055_C2_LGBUF_GIDAC] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
190 [B2055_C2_LGBUF_IDACFO] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
191 [B2055_C2_LGBUF_SPARE] = { .ghz5 = 0x0001, .ghz2 = 0x0001, UPLOAD, },
192 [B2055_C2_RX_RFSPC1] = { .ghz5 = 0x008A, .ghz2 = 0x008A, NOUPLOAD, },
193 [B2055_C2_RX_RFR1] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
194 [B2055_C2_RX_RFR2] = { .ghz5 = 0x0083, .ghz2 = 0x0083, NOUPLOAD, },
195 [B2055_C2_RX_RFRCAL] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
196 [B2055_C2_RX_BB_BLCMP] = { .ghz5 = 0x00A0, .ghz2 = 0x00A0, NOUPLOAD, },
197 [B2055_C2_RX_BB_LPF] = { .ghz5 = 0x000A, .ghz2 = 0x000A, NOUPLOAD, },
198 [B2055_C2_RX_BB_MIDACHP] = { .ghz5 = 0x0087, .ghz2 = 0x0087, UPLOAD, },
199 [B2055_C2_RX_BB_VGA1IDAC] = { .ghz5 = 0x002A, .ghz2 = 0x002A, NOUPLOAD, },
200 [B2055_C2_RX_BB_VGA2IDAC] = { .ghz5 = 0x002A, .ghz2 = 0x002A, NOUPLOAD, },
201 [B2055_C2_RX_BB_VGA3IDAC] = { .ghz5 = 0x002A, .ghz2 = 0x002A, NOUPLOAD, },
202 [B2055_C2_RX_BB_BUFOCTL] = { .ghz5 = 0x002A, .ghz2 = 0x002A, NOUPLOAD, },
203 [B2055_C2_RX_BB_RCCALCTL] = { .ghz5 = 0x0018, .ghz2 = 0x0018, NOUPLOAD, },
204 [B2055_C2_RX_BB_RSSICTL1] = { .ghz5 = 0x006A, .ghz2 = 0x006A, UPLOAD, },
205 [B2055_C2_RX_BB_RSSICTL2] = { .ghz5 = 0x00AB, .ghz2 = 0x00AB, UPLOAD, },
206 [B2055_C2_RX_BB_RSSICTL3] = { .ghz5 = 0x0013, .ghz2 = 0x0013, UPLOAD, },
207 [B2055_C2_RX_BB_RSSICTL4] = { .ghz5 = 0x00C1, .ghz2 = 0x00C1, UPLOAD, },
208 [B2055_C2_RX_BB_RSSICTL5] = { .ghz5 = 0x00AA, .ghz2 = 0x00AA, UPLOAD, },
209 [B2055_C2_RX_BB_REG] = { .ghz5 = 0x0087, .ghz2 = 0x0087, UPLOAD, },
210 [B2055_C2_RX_BB_SPARE1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
211 [B2055_C2_RX_TXBBRCAL] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
212 [B2055_C2_TX_RF_SPGA] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
213 [B2055_C2_TX_RF_SPAD] = { .ghz5 = 0x0007, .ghz2 = 0x0007, NOUPLOAD, },
214 [B2055_C2_TX_RF_CNTPGA1] = { .ghz5 = 0x0015, .ghz2 = 0x0015, NOUPLOAD, },
215 [B2055_C2_TX_RF_CNTPAD1] = { .ghz5 = 0x0055, .ghz2 = 0x0055, NOUPLOAD, },
216 [B2055_C2_TX_RF_PGAIDAC] = { .ghz5 = 0x0097, .ghz2 = 0x0097, UPLOAD, },
217 [B2055_C2_TX_PGAPADTN] = { .ghz5 = 0x0008, .ghz2 = 0x0008, NOUPLOAD, },
218 [B2055_C2_TX_PADIDAC1] = { .ghz5 = 0x0014, .ghz2 = 0x0014, UPLOAD, },
219 [B2055_C2_TX_PADIDAC2] = { .ghz5 = 0x0033, .ghz2 = 0x0033, NOUPLOAD, },
220 [B2055_C2_TX_MXBGTRIM] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
221 [B2055_C2_TX_RF_RCAL] = { .ghz5 = 0x0006, .ghz2 = 0x0006, NOUPLOAD, },
222 [B2055_C2_TX_RF_PADTSSI1] = { .ghz5 = 0x0003, .ghz2 = 0x0003, UPLOAD, },
223 [B2055_C2_TX_RF_PADTSSI2] = { .ghz5 = 0x000A, .ghz2 = 0x000A, NOUPLOAD, },
224 [B2055_C2_TX_RF_SPARE] = { .ghz5 = 0x0003, .ghz2 = 0x0003, UPLOAD, },
225 [B2055_C2_TX_RF_IQCAL1] = { .ghz5 = 0x002A, .ghz2 = 0x002A, NOUPLOAD, },
226 [B2055_C2_TX_RF_IQCAL2] = { .ghz5 = 0x00A4, .ghz2 = 0x00A4, NOUPLOAD, },
227 [B2055_C2_TXBB_RCCAL] = { .ghz5 = 0x0018, .ghz2 = 0x0018, NOUPLOAD, },
228 [B2055_C2_TXBB_LPF1] = { .ghz5 = 0x0028, .ghz2 = 0x0028, NOUPLOAD, },
229 [B2055_C2_TX_VOSCNCL] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
230 [B2055_C2_TX_LPF_MXGMIDAC] = { .ghz5 = 0x004A, .ghz2 = 0x004A, NOUPLOAD, },
231 [B2055_C2_TX_BB_MXGM] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
232 [B2055_PRG_GCHP21] = { .ghz5 = 0x0071, .ghz2 = 0x0071, NOUPLOAD, },
233 [B2055_PRG_GCHP22] = { .ghz5 = 0x0072, .ghz2 = 0x0072, NOUPLOAD, },
234 [B2055_PRG_GCHP23] = { .ghz5 = 0x0073, .ghz2 = 0x0073, NOUPLOAD, },
235 [B2055_PRG_GCHP24] = { .ghz5 = 0x0074, .ghz2 = 0x0074, NOUPLOAD, },
236 [B2055_PRG_GCHP25] = { .ghz5 = 0x0075, .ghz2 = 0x0075, NOUPLOAD, },
237 [B2055_PRG_GCHP26] = { .ghz5 = 0x0076, .ghz2 = 0x0076, NOUPLOAD, },
238 [B2055_PRG_GCHP27] = { .ghz5 = 0x0077, .ghz2 = 0x0077, NOUPLOAD, },
239 [B2055_PRG_GCHP28] = { .ghz5 = 0x0078, .ghz2 = 0x0078, NOUPLOAD, },
240 [B2055_PRG_GCHP29] = { .ghz5 = 0x0079, .ghz2 = 0x0079, NOUPLOAD, },
241 [B2055_PRG_GCHP30] = { .ghz5 = 0x007A, .ghz2 = 0x007A, NOUPLOAD, },
242 [0xC7] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
243 [0xC8] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
244 [0xC9] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
245 [0xCA] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
246 [0xCB] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
247 [0xCC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
248 [B2055_C1_LNA_GAINBST] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
249 [0xCE] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
250 [0xCF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
251 [0xD0] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
252 [0xD1] = { .ghz5 = 0x0018, .ghz2 = 0x0018, NOUPLOAD, },
253 [B2055_C1_B0NB_RSSIVCM] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
254 [0xD3] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
255 [0xD4] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
256 [0xD5] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
257 [B2055_C1_GENSPARE2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
258 [0xD7] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
259 [0xD8] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
260 [B2055_C2_LNA_GAINBST] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
261 [0xDA] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
262 [0xDB] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
263 [0xDC] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
264 [0xDD] = { .ghz5 = 0x0018, .ghz2 = 0x0018, NOUPLOAD, },
265 [B2055_C2_B0NB_RSSIVCM] = { .ghz5 = 0x0088, .ghz2 = 0x0088, NOUPLOAD, },
266 [0xDF] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
267 [0xE0] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
268 [0xE1] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
269 [B2055_C2_GENSPARE2] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
270};
271
272
273void b2055_upload_inittab(struct b43_wldev *dev,
274 bool ghz5, bool ignore_uploadflag)
275{
276 const struct b2055_inittab_entry *e;
277 unsigned int i;
278 u16 value;
279
280 for (i = 0; i < ARRAY_SIZE(b2055_inittab); i++) {
281 e = &(b2055_inittab[i]);
282 if (!(e->flags & B2055_INITTAB_ENTRY_OK))
283 continue;
284 if ((e->flags & B2055_INITTAB_UPLOAD) || ignore_uploadflag) {
285 if (ghz5)
286 value = e->ghz5;
287 else
288 value = e->ghz2;
289 b43_radio_write16(dev, i, value);
290 }
291 }
292}
293
294
295#define RADIOREGS(r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, \
296 r12, r13, r14, r15, r16, r17, r18, r19, r20, r21) \
297 .radio_pll_ref = r0, \
298 .radio_rf_pllmod0 = r1, \
299 .radio_rf_pllmod1 = r2, \
300 .radio_vco_captail = r3, \
301 .radio_vco_cal1 = r4, \
302 .radio_vco_cal2 = r5, \
303 .radio_pll_lfc1 = r6, \
304 .radio_pll_lfr1 = r7, \
305 .radio_pll_lfc2 = r8, \
306 .radio_lgbuf_cenbuf = r9, \
307 .radio_lgen_tune1 = r10, \
308 .radio_lgen_tune2 = r11, \
309 .radio_c1_lgbuf_atune = r12, \
310 .radio_c1_lgbuf_gtune = r13, \
311 .radio_c1_rx_rfr1 = r14, \
312 .radio_c1_tx_pgapadtn = r15, \
313 .radio_c1_tx_mxbgtrim = r16, \
314 .radio_c2_lgbuf_atune = r17, \
315 .radio_c2_lgbuf_gtune = r18, \
316 .radio_c2_rx_rfr1 = r19, \
317 .radio_c2_tx_pgapadtn = r20, \
318 .radio_c2_tx_mxbgtrim = r21
319
320#define PHYREGS(r0, r1, r2, r3, r4, r5) \
321 .phy_regs.phy_bw1a = r0, \
322 .phy_regs.phy_bw2 = r1, \
323 .phy_regs.phy_bw3 = r2, \
324 .phy_regs.phy_bw4 = r3, \
325 .phy_regs.phy_bw5 = r4, \
326 .phy_regs.phy_bw6 = r5
327
328static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab[] = {
329 { .channel = 184,
330 .freq = 4920, /* MHz */
331 .unk2 = 3280,
332 RADIOREGS(0x71, 0x01, 0xEC, 0x0F, 0xFF, 0x01, 0x04, 0x0A,
333 0x00, 0x8F, 0xFF, 0xFF, 0xFF, 0x00, 0x0F, 0x0F,
334 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
335 PHYREGS(0xB407, 0xB007, 0xAC07, 0x1402, 0x1502, 0x1602),
336 },
337 { .channel = 186,
338 .freq = 4930, /* MHz */
339 .unk2 = 3287,
340 RADIOREGS(0x71, 0x01, 0xED, 0x0F, 0xFF, 0x01, 0x04, 0x0A,
341 0x00, 0x8F, 0xFF, 0xFF, 0xFF, 0x00, 0x0F, 0x0F,
342 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
343 PHYREGS(0xB807, 0xB407, 0xB007, 0x1302, 0x1402, 0x1502),
344 },
345 { .channel = 188,
346 .freq = 4940, /* MHz */
347 .unk2 = 3293,
348 RADIOREGS(0x71, 0x01, 0xEE, 0x0F, 0xFF, 0x01, 0x04, 0x0A,
349 0x00, 0x8F, 0xEE, 0xEE, 0xFF, 0x00, 0x0F, 0x0F,
350 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
351 PHYREGS(0xBC07, 0xB807, 0xB407, 0x1202, 0x1302, 0x1402),
352 },
353 { .channel = 190,
354 .freq = 4950, /* MHz */
355 .unk2 = 3300,
356 RADIOREGS(0x71, 0x01, 0xEF, 0x0F, 0xFF, 0x01, 0x04, 0x0A,
357 0x00, 0x8F, 0xEE, 0xEE, 0xFF, 0x00, 0x0F, 0x0F,
358 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
359 PHYREGS(0xC007, 0xBC07, 0xB807, 0x1102, 0x1202, 0x1302),
360 },
361 { .channel = 192,
362 .freq = 4960, /* MHz */
363 .unk2 = 3307,
364 RADIOREGS(0x71, 0x01, 0xF0, 0x0F, 0xFF, 0x01, 0x04, 0x0A,
365 0x00, 0x8F, 0xEE, 0xEE, 0xFF, 0x00, 0x0F, 0x0F,
366 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
367 PHYREGS(0xC407, 0xC007, 0xBC07, 0x0F02, 0x1102, 0x1202),
368 },
369 { .channel = 194,
370 .freq = 4970, /* MHz */
371 .unk2 = 3313,
372 RADIOREGS(0x71, 0x01, 0xF1, 0x0F, 0xFF, 0x01, 0x04, 0x0A,
373 0x00, 0x8F, 0xEE, 0xEE, 0xFF, 0x00, 0x0F, 0x0F,
374 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
375 PHYREGS(0xC807, 0xC407, 0xC007, 0x0E02, 0x0F02, 0x1102),
376 },
377 { .channel = 196,
378 .freq = 4980, /* MHz */
379 .unk2 = 3320,
380 RADIOREGS(0x71, 0x01, 0xF2, 0x0E, 0xFF, 0x01, 0x04, 0x0A,
381 0x00, 0x8F, 0xDD, 0xDD, 0xFF, 0x00, 0x0F, 0x0F,
382 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
383 PHYREGS(0xCC07, 0xC807, 0xC407, 0x0D02, 0x0E02, 0x0F02),
384 },
385 { .channel = 198,
386 .freq = 4990, /* MHz */
387 .unk2 = 3327,
388 RADIOREGS(0x71, 0x01, 0xF3, 0x0E, 0xFF, 0x01, 0x04, 0x0A,
389 0x00, 0x8F, 0xDD, 0xDD, 0xFF, 0x00, 0x0F, 0x0F,
390 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
391 PHYREGS(0xD007, 0xCC07, 0xC807, 0x0C02, 0x0D02, 0x0E02),
392 },
393 { .channel = 200,
394 .freq = 5000, /* MHz */
395 .unk2 = 3333,
396 RADIOREGS(0x71, 0x01, 0xF4, 0x0E, 0xFF, 0x01, 0x04, 0x0A,
397 0x00, 0x8F, 0xDD, 0xDD, 0xFF, 0x00, 0x0F, 0x0F,
398 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
399 PHYREGS(0xD407, 0xD007, 0xCC07, 0x0B02, 0x0C02, 0x0D02),
400 },
401 { .channel = 202,
402 .freq = 5010, /* MHz */
403 .unk2 = 3340,
404 RADIOREGS(0x71, 0x01, 0xF5, 0x0E, 0xFF, 0x01, 0x04, 0x0A,
405 0x00, 0x8F, 0xDD, 0xDD, 0xFF, 0x00, 0x0F, 0x0F,
406 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
407 PHYREGS(0xD807, 0xD407, 0xD007, 0x0A02, 0x0B02, 0x0C02),
408 },
409 { .channel = 204,
410 .freq = 5020, /* MHz */
411 .unk2 = 3347,
412 RADIOREGS(0x71, 0x01, 0xF6, 0x0E, 0xF7, 0x01, 0x04, 0x0A,
413 0x00, 0x8F, 0xCC, 0xCC, 0xFF, 0x00, 0x0F, 0x0F,
414 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
415 PHYREGS(0xDC07, 0xD807, 0xD407, 0x0902, 0x0A02, 0x0B02),
416 },
417 { .channel = 206,
418 .freq = 5030, /* MHz */
419 .unk2 = 3353,
420 RADIOREGS(0x71, 0x01, 0xF7, 0x0E, 0xF7, 0x01, 0x04, 0x0A,
421 0x00, 0x8F, 0xCC, 0xCC, 0xFF, 0x00, 0x0F, 0x0F,
422 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
423 PHYREGS(0xE007, 0xDC07, 0xD807, 0x0802, 0x0902, 0x0A02),
424 },
425 { .channel = 208,
426 .freq = 5040, /* MHz */
427 .unk2 = 3360,
428 RADIOREGS(0x71, 0x01, 0xF8, 0x0D, 0xEF, 0x01, 0x04, 0x0A,
429 0x00, 0x8F, 0xCC, 0xCC, 0xFF, 0x00, 0x0F, 0x0F,
430 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
431 PHYREGS(0xE407, 0xE007, 0xDC07, 0x0702, 0x0802, 0x0902),
432 },
433 { .channel = 210,
434 .freq = 5050, /* MHz */
435 .unk2 = 3367,
436 RADIOREGS(0x71, 0x01, 0xF9, 0x0D, 0xEF, 0x01, 0x04, 0x0A,
437 0x00, 0x8F, 0xCC, 0xCC, 0xFF, 0x00, 0x0F, 0x0F,
438 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
439 PHYREGS(0xE807, 0xE407, 0xE007, 0x0602, 0x0702, 0x0802),
440 },
441 { .channel = 212,
442 .freq = 5060, /* MHz */
443 .unk2 = 3373,
444 RADIOREGS(0x71, 0x01, 0xFA, 0x0D, 0xE6, 0x01, 0x04, 0x0A,
445 0x00, 0x8F, 0xBB, 0xBB, 0xFF, 0x00, 0x0E, 0x0F,
446 0x8E, 0xFF, 0x00, 0x0E, 0x0F, 0x8E),
447 PHYREGS(0xEC07, 0xE807, 0xE407, 0x0502, 0x0602, 0x0702),
448 },
449 { .channel = 214,
450 .freq = 5070, /* MHz */
451 .unk2 = 3380,
452 RADIOREGS(0x71, 0x01, 0xFB, 0x0D, 0xE6, 0x01, 0x04, 0x0A,
453 0x00, 0x8F, 0xBB, 0xBB, 0xFF, 0x00, 0x0E, 0x0F,
454 0x8E, 0xFF, 0x00, 0x0E, 0x0F, 0x8E),
455 PHYREGS(0xF007, 0xEC07, 0xE807, 0x0402, 0x0502, 0x0602),
456 },
457 { .channel = 216,
458 .freq = 5080, /* MHz */
459 .unk2 = 3387,
460 RADIOREGS(0x71, 0x01, 0xFC, 0x0D, 0xDE, 0x01, 0x04, 0x0A,
461 0x00, 0x8E, 0xBB, 0xBB, 0xEE, 0x00, 0x0E, 0x0F,
462 0x8D, 0xEE, 0x00, 0x0E, 0x0F, 0x8D),
463 PHYREGS(0xF407, 0xF007, 0xEC07, 0x0302, 0x0402, 0x0502),
464 },
465 { .channel = 218,
466 .freq = 5090, /* MHz */
467 .unk2 = 3393,
468 RADIOREGS(0x71, 0x01, 0xFD, 0x0D, 0xDE, 0x01, 0x04, 0x0A,
469 0x00, 0x8E, 0xBB, 0xBB, 0xEE, 0x00, 0x0E, 0x0F,
470 0x8D, 0xEE, 0x00, 0x0E, 0x0F, 0x8D),
471 PHYREGS(0xF807, 0xF407, 0xF007, 0x0202, 0x0302, 0x0402),
472 },
473 { .channel = 220,
474 .freq = 5100, /* MHz */
475 .unk2 = 3400,
476 RADIOREGS(0x71, 0x01, 0xFE, 0x0C, 0xD6, 0x01, 0x04, 0x0A,
477 0x00, 0x8E, 0xAA, 0xAA, 0xEE, 0x00, 0x0D, 0x0F,
478 0x8D, 0xEE, 0x00, 0x0D, 0x0F, 0x8D),
479 PHYREGS(0xFC07, 0xF807, 0xF407, 0x0102, 0x0202, 0x0302),
480 },
481 { .channel = 222,
482 .freq = 5110, /* MHz */
483 .unk2 = 3407,
484 RADIOREGS(0x71, 0x01, 0xFF, 0x0C, 0xD6, 0x01, 0x04, 0x0A,
485 0x00, 0x8E, 0xAA, 0xAA, 0xEE, 0x00, 0x0D, 0x0F,
486 0x8D, 0xEE, 0x00, 0x0D, 0x0F, 0x8D),
487 PHYREGS(0x0008, 0xFC07, 0xF807, 0x0002, 0x0102, 0x0202),
488 },
489 { .channel = 224,
490 .freq = 5120, /* MHz */
491 .unk2 = 3413,
492 RADIOREGS(0x71, 0x02, 0x00, 0x0C, 0xCE, 0x01, 0x04, 0x0A,
493 0x00, 0x8D, 0xAA, 0xAA, 0xDD, 0x00, 0x0D, 0x0F,
494 0x8C, 0xDD, 0x00, 0x0D, 0x0F, 0x8C),
495 PHYREGS(0x0408, 0x0008, 0xFC07, 0xFF01, 0x0002, 0x0102),
496 },
497 { .channel = 226,
498 .freq = 5130, /* MHz */
499 .unk2 = 3420,
500 RADIOREGS(0x71, 0x02, 0x01, 0x0C, 0xCE, 0x01, 0x04, 0x0A,
501 0x00, 0x8D, 0xAA, 0xAA, 0xDD, 0x00, 0x0D, 0x0F,
502 0x8C, 0xDD, 0x00, 0x0D, 0x0F, 0x8C),
503 PHYREGS(0x0808, 0x0408, 0x0008, 0xFE01, 0xFF01, 0x0002),
504 },
505 { .channel = 228,
506 .freq = 5140, /* MHz */
507 .unk2 = 3427,
508 RADIOREGS(0x71, 0x02, 0x02, 0x0C, 0xC6, 0x01, 0x04, 0x0A,
509 0x00, 0x8D, 0x99, 0x99, 0xDD, 0x00, 0x0C, 0x0E,
510 0x8B, 0xDD, 0x00, 0x0C, 0x0E, 0x8B),
511 PHYREGS(0x0C08, 0x0808, 0x0408, 0xFD01, 0xFE01, 0xFF01),
512 },
513 { .channel = 32,
514 .freq = 5160, /* MHz */
515 .unk2 = 3440,
516 RADIOREGS(0x71, 0x02, 0x04, 0x0B, 0xBE, 0x01, 0x04, 0x0A,
517 0x00, 0x8C, 0x99, 0x99, 0xCC, 0x00, 0x0B, 0x0D,
518 0x8A, 0xCC, 0x00, 0x0B, 0x0D, 0x8A),
519 PHYREGS(0x1408, 0x1008, 0x0C08, 0xFB01, 0xFC01, 0xFD01),
520 },
521 { .channel = 34,
522 .freq = 5170, /* MHz */
523 .unk2 = 3447,
524 RADIOREGS(0x71, 0x02, 0x05, 0x0B, 0xBE, 0x01, 0x04, 0x0A,
525 0x00, 0x8C, 0x99, 0x99, 0xCC, 0x00, 0x0B, 0x0D,
526 0x8A, 0xCC, 0x00, 0x0B, 0x0D, 0x8A),
527 PHYREGS(0x1808, 0x1408, 0x1008, 0xFA01, 0xFB01, 0xFC01),
528 },
529 { .channel = 36,
530 .freq = 5180, /* MHz */
531 .unk2 = 3453,
532 RADIOREGS(0x71, 0x02, 0x06, 0x0B, 0xB6, 0x01, 0x04, 0x0A,
533 0x00, 0x8C, 0x88, 0x88, 0xCC, 0x00, 0x0B, 0x0C,
534 0x89, 0xCC, 0x00, 0x0B, 0x0C, 0x89),
535 PHYREGS(0x1C08, 0x1808, 0x1408, 0xF901, 0xFA01, 0xFB01),
536 },
537 { .channel = 38,
538 .freq = 5190, /* MHz */
539 .unk2 = 3460,
540 RADIOREGS(0x71, 0x02, 0x07, 0x0B, 0xB6, 0x01, 0x04, 0x0A,
541 0x00, 0x8C, 0x88, 0x88, 0xCC, 0x00, 0x0B, 0x0C,
542 0x89, 0xCC, 0x00, 0x0B, 0x0C, 0x89),
543 PHYREGS(0x2008, 0x1C08, 0x1808, 0xF801, 0xF901, 0xFA01),
544 },
545 { .channel = 40,
546 .freq = 5200, /* MHz */
547 .unk2 = 3467,
548 RADIOREGS(0x71, 0x02, 0x08, 0x0B, 0xAF, 0x01, 0x04, 0x0A,
549 0x00, 0x8B, 0x88, 0x88, 0xBB, 0x00, 0x0A, 0x0B,
550 0x89, 0xBB, 0x00, 0x0A, 0x0B, 0x89),
551 PHYREGS(0x2408, 0x2008, 0x1C08, 0xF701, 0xF801, 0xF901),
552 },
553 { .channel = 42,
554 .freq = 5210, /* MHz */
555 .unk2 = 3473,
556 RADIOREGS(0x71, 0x02, 0x09, 0x0B, 0xAF, 0x01, 0x04, 0x0A,
557 0x00, 0x8B, 0x88, 0x88, 0xBB, 0x00, 0x0A, 0x0B,
558 0x89, 0xBB, 0x00, 0x0A, 0x0B, 0x89),
559 PHYREGS(0x2808, 0x2408, 0x2008, 0xF601, 0xF701, 0xF801),
560 },
561 { .channel = 44,
562 .freq = 5220, /* MHz */
563 .unk2 = 3480,
564 RADIOREGS(0x71, 0x02, 0x0A, 0x0A, 0xA7, 0x01, 0x04, 0x0A,
565 0x00, 0x8B, 0x77, 0x77, 0xBB, 0x00, 0x09, 0x0A,
566 0x88, 0xBB, 0x00, 0x09, 0x0A, 0x88),
567 PHYREGS(0x2C08, 0x2808, 0x2408, 0xF501, 0xF601, 0xF701),
568 },
569 { .channel = 46,
570 .freq = 5230, /* MHz */
571 .unk2 = 3487,
572 RADIOREGS(0x71, 0x02, 0x0B, 0x0A, 0xA7, 0x01, 0x04, 0x0A,
573 0x00, 0x8B, 0x77, 0x77, 0xBB, 0x00, 0x09, 0x0A,
574 0x88, 0xBB, 0x00, 0x09, 0x0A, 0x88),
575 PHYREGS(0x3008, 0x2C08, 0x2808, 0xF401, 0xF501, 0xF601),
576 },
577 { .channel = 48,
578 .freq = 5240, /* MHz */
579 .unk2 = 3493,
580 RADIOREGS(0x71, 0x02, 0x0C, 0x0A, 0xA0, 0x01, 0x04, 0x0A,
581 0x00, 0x8A, 0x77, 0x77, 0xAA, 0x00, 0x09, 0x0A,
582 0x87, 0xAA, 0x00, 0x09, 0x0A, 0x87),
583 PHYREGS(0x3408, 0x3008, 0x2C08, 0xF301, 0xF401, 0xF501),
584 },
585 { .channel = 50,
586 .freq = 5250, /* MHz */
587 .unk2 = 3500,
588 RADIOREGS(0x71, 0x02, 0x0D, 0x0A, 0xA0, 0x01, 0x04, 0x0A,
589 0x00, 0x8A, 0x77, 0x77, 0xAA, 0x00, 0x09, 0x0A,
590 0x87, 0xAA, 0x00, 0x09, 0x0A, 0x87),
591 PHYREGS(0x3808, 0x3408, 0x3008, 0xF201, 0xF301, 0xF401),
592 },
593 { .channel = 52,
594 .freq = 5260, /* MHz */
595 .unk2 = 3507,
596 RADIOREGS(0x71, 0x02, 0x0E, 0x0A, 0x98, 0x01, 0x04, 0x0A,
597 0x00, 0x8A, 0x66, 0x66, 0xAA, 0x00, 0x08, 0x09,
598 0x87, 0xAA, 0x00, 0x08, 0x09, 0x87),
599 PHYREGS(0x3C08, 0x3808, 0x3408, 0xF101, 0xF201, 0xF301),
600 },
601 { .channel = 54,
602 .freq = 5270, /* MHz */
603 .unk2 = 3513,
604 RADIOREGS(0x71, 0x02, 0x0F, 0x0A, 0x98, 0x01, 0x04, 0x0A,
605 0x00, 0x8A, 0x66, 0x66, 0xAA, 0x00, 0x08, 0x09,
606 0x87, 0xAA, 0x00, 0x08, 0x09, 0x87),
607 PHYREGS(0x4008, 0x3C08, 0x3808, 0xF001, 0xF101, 0xF201),
608 },
609 { .channel = 56,
610 .freq = 5280, /* MHz */
611 .unk2 = 3520,
612 RADIOREGS(0x71, 0x02, 0x10, 0x09, 0x91, 0x01, 0x04, 0x0A,
613 0x00, 0x89, 0x66, 0x66, 0x99, 0x00, 0x08, 0x08,
614 0x86, 0x99, 0x00, 0x08, 0x08, 0x86),
615 PHYREGS(0x4408, 0x4008, 0x3C08, 0xF001, 0xF001, 0xF101),
616 },
617 { .channel = 58,
618 .freq = 5290, /* MHz */
619 .unk2 = 3527,
620 RADIOREGS(0x71, 0x02, 0x11, 0x09, 0x91, 0x01, 0x04, 0x0A,
621 0x00, 0x89, 0x66, 0x66, 0x99, 0x00, 0x08, 0x08,
622 0x86, 0x99, 0x00, 0x08, 0x08, 0x86),
623 PHYREGS(0x4808, 0x4408, 0x4008, 0xEF01, 0xF001, 0xF001),
624 },
625 { .channel = 60,
626 .freq = 5300, /* MHz */
627 .unk2 = 3533,
628 RADIOREGS(0x71, 0x02, 0x12, 0x09, 0x8A, 0x01, 0x04, 0x0A,
629 0x00, 0x89, 0x55, 0x55, 0x99, 0x00, 0x08, 0x07,
630 0x85, 0x99, 0x00, 0x08, 0x07, 0x85),
631 PHYREGS(0x4C08, 0x4808, 0x4408, 0xEE01, 0xEF01, 0xF001),
632 },
633 { .channel = 62,
634 .freq = 5310, /* MHz */
635 .unk2 = 3540,
636 RADIOREGS(0x71, 0x02, 0x13, 0x09, 0x8A, 0x01, 0x04, 0x0A,
637 0x00, 0x89, 0x55, 0x55, 0x99, 0x00, 0x08, 0x07,
638 0x85, 0x99, 0x00, 0x08, 0x07, 0x85),
639 PHYREGS(0x5008, 0x4C08, 0x4808, 0xED01, 0xEE01, 0xEF01),
640 },
641 { .channel = 64,
642 .freq = 5320, /* MHz */
643 .unk2 = 3547,
644 RADIOREGS(0x71, 0x02, 0x14, 0x09, 0x83, 0x01, 0x04, 0x0A,
645 0x00, 0x88, 0x55, 0x55, 0x88, 0x00, 0x07, 0x07,
646 0x84, 0x88, 0x00, 0x07, 0x07, 0x84),
647 PHYREGS(0x5408, 0x5008, 0x4C08, 0xEC01, 0xED01, 0xEE01),
648 },
649 { .channel = 66,
650 .freq = 5330, /* MHz */
651 .unk2 = 3553,
652 RADIOREGS(0x71, 0x02, 0x15, 0x09, 0x83, 0x01, 0x04, 0x0A,
653 0x00, 0x88, 0x55, 0x55, 0x88, 0x00, 0x07, 0x07,
654 0x84, 0x88, 0x00, 0x07, 0x07, 0x84),
655 PHYREGS(0x5808, 0x5408, 0x5008, 0xEB01, 0xEC01, 0xED01),
656 },
657 { .channel = 68,
658 .freq = 5340, /* MHz */
659 .unk2 = 3560,
660 RADIOREGS(0x71, 0x02, 0x16, 0x08, 0x7C, 0x01, 0x04, 0x0A,
661 0x00, 0x88, 0x44, 0x44, 0x88, 0x00, 0x07, 0x06,
662 0x84, 0x88, 0x00, 0x07, 0x06, 0x84),
663 PHYREGS(0x5C08, 0x5808, 0x5408, 0xEA01, 0xEB01, 0xEC01),
664 },
665 { .channel = 70,
666 .freq = 5350, /* MHz */
667 .unk2 = 3567,
668 RADIOREGS(0x71, 0x02, 0x17, 0x08, 0x7C, 0x01, 0x04, 0x0A,
669 0x00, 0x88, 0x44, 0x44, 0x88, 0x00, 0x07, 0x06,
670 0x84, 0x88, 0x00, 0x07, 0x06, 0x84),
671 PHYREGS(0x6008, 0x5C08, 0x5808, 0xE901, 0xEA01, 0xEB01),
672 },
673 { .channel = 72,
674 .freq = 5360, /* MHz */
675 .unk2 = 3573,
676 RADIOREGS(0x71, 0x02, 0x18, 0x08, 0x75, 0x01, 0x04, 0x0A,
677 0x00, 0x87, 0x44, 0x44, 0x77, 0x00, 0x06, 0x05,
678 0x83, 0x77, 0x00, 0x06, 0x05, 0x83),
679 PHYREGS(0x6408, 0x6008, 0x5C08, 0xE801, 0xE901, 0xEA01),
680 },
681 { .channel = 74,
682 .freq = 5370, /* MHz */
683 .unk2 = 3580,
684 RADIOREGS(0x71, 0x02, 0x19, 0x08, 0x75, 0x01, 0x04, 0x0A,
685 0x00, 0x87, 0x44, 0x44, 0x77, 0x00, 0x06, 0x05,
686 0x83, 0x77, 0x00, 0x06, 0x05, 0x83),
687 PHYREGS(0x6808, 0x6408, 0x6008, 0xE701, 0xE801, 0xE901),
688 },
689 { .channel = 76,
690 .freq = 5380, /* MHz */
691 .unk2 = 3587,
692 RADIOREGS(0x71, 0x02, 0x1A, 0x08, 0x6E, 0x01, 0x04, 0x0A,
693 0x00, 0x87, 0x33, 0x33, 0x77, 0x00, 0x06, 0x04,
694 0x82, 0x77, 0x00, 0x06, 0x04, 0x82),
695 PHYREGS(0x6C08, 0x6808, 0x6408, 0xE601, 0xE701, 0xE801),
696 },
697 { .channel = 78,
698 .freq = 5390, /* MHz */
699 .unk2 = 3593,
700 RADIOREGS(0x71, 0x02, 0x1B, 0x08, 0x6E, 0x01, 0x04, 0x0A,
701 0x00, 0x87, 0x33, 0x33, 0x77, 0x00, 0x06, 0x04,
702 0x82, 0x77, 0x00, 0x06, 0x04, 0x82),
703 PHYREGS(0x7008, 0x6C08, 0x6808, 0xE501, 0xE601, 0xE701),
704 },
705 { .channel = 80,
706 .freq = 5400, /* MHz */
707 .unk2 = 3600,
708 RADIOREGS(0x71, 0x02, 0x1C, 0x07, 0x67, 0x01, 0x04, 0x0A,
709 0x00, 0x86, 0x33, 0x33, 0x66, 0x00, 0x05, 0x04,
710 0x81, 0x66, 0x00, 0x05, 0x04, 0x81),
711 PHYREGS(0x7408, 0x7008, 0x6C08, 0xE501, 0xE501, 0xE601),
712 },
713 { .channel = 82,
714 .freq = 5410, /* MHz */
715 .unk2 = 3607,
716 RADIOREGS(0x71, 0x02, 0x1D, 0x07, 0x67, 0x01, 0x04, 0x0A,
717 0x00, 0x86, 0x33, 0x33, 0x66, 0x00, 0x05, 0x04,
718 0x81, 0x66, 0x00, 0x05, 0x04, 0x81),
719 PHYREGS(0x7808, 0x7408, 0x7008, 0xE401, 0xE501, 0xE501),
720 },
721 { .channel = 84,
722 .freq = 5420, /* MHz */
723 .unk2 = 3613,
724 RADIOREGS(0x71, 0x02, 0x1E, 0x07, 0x61, 0x01, 0x04, 0x0A,
725 0x00, 0x86, 0x22, 0x22, 0x66, 0x00, 0x05, 0x03,
726 0x80, 0x66, 0x00, 0x05, 0x03, 0x80),
727 PHYREGS(0x7C08, 0x7808, 0x7408, 0xE301, 0xE401, 0xE501),
728 },
729 { .channel = 86,
730 .freq = 5430, /* MHz */
731 .unk2 = 3620,
732 RADIOREGS(0x71, 0x02, 0x1F, 0x07, 0x61, 0x01, 0x04, 0x0A,
733 0x00, 0x86, 0x22, 0x22, 0x66, 0x00, 0x05, 0x03,
734 0x80, 0x66, 0x00, 0x05, 0x03, 0x80),
735 PHYREGS(0x8008, 0x7C08, 0x7808, 0xE201, 0xE301, 0xE401),
736 },
737 { .channel = 88,
738 .freq = 5440, /* MHz */
739 .unk2 = 3627,
740 RADIOREGS(0x71, 0x02, 0x20, 0x07, 0x5A, 0x01, 0x04, 0x0A,
741 0x00, 0x85, 0x22, 0x22, 0x55, 0x00, 0x04, 0x02,
742 0x80, 0x55, 0x00, 0x04, 0x02, 0x80),
743 PHYREGS(0x8408, 0x8008, 0x7C08, 0xE101, 0xE201, 0xE301),
744 },
745 { .channel = 90,
746 .freq = 5450, /* MHz */
747 .unk2 = 3633,
748 RADIOREGS(0x71, 0x02, 0x21, 0x07, 0x5A, 0x01, 0x04, 0x0A,
749 0x00, 0x85, 0x22, 0x22, 0x55, 0x00, 0x04, 0x02,
750 0x80, 0x55, 0x00, 0x04, 0x02, 0x80),
751 PHYREGS(0x8808, 0x8408, 0x8008, 0xE001, 0xE101, 0xE201),
752 },
753 { .channel = 92,
754 .freq = 5460, /* MHz */
755 .unk2 = 3640,
756 RADIOREGS(0x71, 0x02, 0x22, 0x06, 0x53, 0x01, 0x04, 0x0A,
757 0x00, 0x85, 0x11, 0x11, 0x55, 0x00, 0x04, 0x01,
758 0x80, 0x55, 0x00, 0x04, 0x01, 0x80),
759 PHYREGS(0x8C08, 0x8808, 0x8408, 0xDF01, 0xE001, 0xE101),
760 },
761 { .channel = 94,
762 .freq = 5470, /* MHz */
763 .unk2 = 3647,
764 RADIOREGS(0x71, 0x02, 0x23, 0x06, 0x53, 0x01, 0x04, 0x0A,
765 0x00, 0x85, 0x11, 0x11, 0x55, 0x00, 0x04, 0x01,
766 0x80, 0x55, 0x00, 0x04, 0x01, 0x80),
767 PHYREGS(0x9008, 0x8C08, 0x8808, 0xDE01, 0xDF01, 0xE001),
768 },
769 { .channel = 96,
770 .freq = 5480, /* MHz */
771 .unk2 = 3653,
772 RADIOREGS(0x71, 0x02, 0x24, 0x06, 0x4D, 0x01, 0x04, 0x0A,
773 0x00, 0x84, 0x11, 0x11, 0x44, 0x00, 0x03, 0x00,
774 0x80, 0x44, 0x00, 0x03, 0x00, 0x80),
775 PHYREGS(0x9408, 0x9008, 0x8C08, 0xDD01, 0xDE01, 0xDF01),
776 },
777 { .channel = 98,
778 .freq = 5490, /* MHz */
779 .unk2 = 3660,
780 RADIOREGS(0x71, 0x02, 0x25, 0x06, 0x4D, 0x01, 0x04, 0x0A,
781 0x00, 0x84, 0x11, 0x11, 0x44, 0x00, 0x03, 0x00,
782 0x80, 0x44, 0x00, 0x03, 0x00, 0x80),
783 PHYREGS(0x9808, 0x9408, 0x9008, 0xDD01, 0xDD01, 0xDE01),
784 },
785 { .channel = 100,
786 .freq = 5500, /* MHz */
787 .unk2 = 3667,
788 RADIOREGS(0x71, 0x02, 0x26, 0x06, 0x47, 0x01, 0x04, 0x0A,
789 0x00, 0x84, 0x00, 0x00, 0x44, 0x00, 0x03, 0x00,
790 0x80, 0x44, 0x00, 0x03, 0x00, 0x80),
791 PHYREGS(0x9C08, 0x9808, 0x9408, 0xDC01, 0xDD01, 0xDD01),
792 },
793 { .channel = 102,
794 .freq = 5510, /* MHz */
795 .unk2 = 3673,
796 RADIOREGS(0x71, 0x02, 0x27, 0x06, 0x47, 0x01, 0x04, 0x0A,
797 0x00, 0x84, 0x00, 0x00, 0x44, 0x00, 0x03, 0x00,
798 0x80, 0x44, 0x00, 0x03, 0x00, 0x80),
799 PHYREGS(0xA008, 0x9C08, 0x9808, 0xDB01, 0xDC01, 0xDD01),
800 },
801 { .channel = 104,
802 .freq = 5520, /* MHz */
803 .unk2 = 3680,
804 RADIOREGS(0x71, 0x02, 0x28, 0x05, 0x40, 0x01, 0x04, 0x0A,
805 0x00, 0x83, 0x00, 0x00, 0x33, 0x00, 0x02, 0x00,
806 0x80, 0x33, 0x00, 0x02, 0x00, 0x80),
807 PHYREGS(0xA408, 0xA008, 0x9C08, 0xDA01, 0xDB01, 0xDC01),
808 },
809 { .channel = 106,
810 .freq = 5530, /* MHz */
811 .unk2 = 3687,
812 RADIOREGS(0x71, 0x02, 0x29, 0x05, 0x40, 0x01, 0x04, 0x0A,
813 0x00, 0x83, 0x00, 0x00, 0x33, 0x00, 0x02, 0x00,
814 0x80, 0x33, 0x00, 0x02, 0x00, 0x80),
815 PHYREGS(0xA808, 0xA408, 0xA008, 0xD901, 0xDA01, 0xDB01),
816 },
817 { .channel = 108,
818 .freq = 5540, /* MHz */
819 .unk2 = 3693,
820 RADIOREGS(0x71, 0x02, 0x2A, 0x05, 0x3A, 0x01, 0x04, 0x0A,
821 0x00, 0x83, 0x00, 0x00, 0x33, 0x00, 0x02, 0x00,
822 0x80, 0x33, 0x00, 0x02, 0x00, 0x80),
823 PHYREGS(0xAC08, 0xA808, 0xA408, 0xD801, 0xD901, 0xDA01),
824 },
825 { .channel = 110,
826 .freq = 5550, /* MHz */
827 .unk2 = 3700,
828 RADIOREGS(0x71, 0x02, 0x2B, 0x05, 0x3A, 0x01, 0x04, 0x0A,
829 0x00, 0x83, 0x00, 0x00, 0x33, 0x00, 0x02, 0x00,
830 0x80, 0x33, 0x00, 0x02, 0x00, 0x80),
831 PHYREGS(0xB008, 0xAC08, 0xA808, 0xD701, 0xD801, 0xD901),
832 },
833 { .channel = 112,
834 .freq = 5560, /* MHz */
835 .unk2 = 3707,
836 RADIOREGS(0x71, 0x02, 0x2C, 0x05, 0x34, 0x01, 0x04, 0x0A,
837 0x00, 0x82, 0x00, 0x00, 0x22, 0x00, 0x01, 0x00,
838 0x80, 0x22, 0x00, 0x01, 0x00, 0x80),
839 PHYREGS(0xB408, 0xB008, 0xAC08, 0xD701, 0xD701, 0xD801),
840 },
841 { .channel = 114,
842 .freq = 5570, /* MHz */
843 .unk2 = 3713,
844 RADIOREGS(0x71, 0x02, 0x2D, 0x05, 0x34, 0x01, 0x04, 0x0A,
845 0x00, 0x82, 0x00, 0x00, 0x22, 0x00, 0x01, 0x00,
846 0x80, 0x22, 0x00, 0x01, 0x00, 0x80),
847 PHYREGS(0xB808, 0xB408, 0xB008, 0xD601, 0xD701, 0xD701),
848 },
849 { .channel = 116,
850 .freq = 5580, /* MHz */
851 .unk2 = 3720,
852 RADIOREGS(0x71, 0x02, 0x2E, 0x04, 0x2E, 0x01, 0x04, 0x0A,
853 0x00, 0x82, 0x00, 0x00, 0x22, 0x00, 0x01, 0x00,
854 0x80, 0x22, 0x00, 0x01, 0x00, 0x80),
855 PHYREGS(0xBC08, 0xB808, 0xB408, 0xD501, 0xD601, 0xD701),
856 },
857 { .channel = 118,
858 .freq = 5590, /* MHz */
859 .unk2 = 3727,
860 RADIOREGS(0x71, 0x02, 0x2F, 0x04, 0x2E, 0x01, 0x04, 0x0A,
861 0x00, 0x82, 0x00, 0x00, 0x22, 0x00, 0x01, 0x00,
862 0x80, 0x22, 0x00, 0x01, 0x00, 0x80),
863 PHYREGS(0xC008, 0xBC08, 0xB808, 0xD401, 0xD501, 0xD601),
864 },
865 { .channel = 120,
866 .freq = 5600, /* MHz */
867 .unk2 = 3733,
868 RADIOREGS(0x71, 0x02, 0x30, 0x04, 0x28, 0x01, 0x04, 0x0A,
869 0x00, 0x81, 0x00, 0x00, 0x11, 0x00, 0x01, 0x00,
870 0x80, 0x11, 0x00, 0x01, 0x00, 0x80),
871 PHYREGS(0xC408, 0xC008, 0xBC08, 0xD301, 0xD401, 0xD501),
872 },
873 { .channel = 122,
874 .freq = 5610, /* MHz */
875 .unk2 = 3740,
876 RADIOREGS(0x71, 0x02, 0x31, 0x04, 0x28, 0x01, 0x04, 0x0A,
877 0x00, 0x81, 0x00, 0x00, 0x11, 0x00, 0x01, 0x00,
878 0x80, 0x11, 0x00, 0x01, 0x00, 0x80),
879 PHYREGS(0xC808, 0xC408, 0xC008, 0xD201, 0xD301, 0xD401),
880 },
881 { .channel = 124,
882 .freq = 5620, /* MHz */
883 .unk2 = 3747,
884 RADIOREGS(0x71, 0x02, 0x32, 0x04, 0x21, 0x01, 0x04, 0x0A,
885 0x00, 0x81, 0x00, 0x00, 0x11, 0x00, 0x00, 0x00,
886 0x80, 0x11, 0x00, 0x00, 0x00, 0x80),
887 PHYREGS(0xCC08, 0xC808, 0xC408, 0xD201, 0xD201, 0xD301),
888 },
889 { .channel = 126,
890 .freq = 5630, /* MHz */
891 .unk2 = 3753,
892 RADIOREGS(0x71, 0x02, 0x33, 0x04, 0x21, 0x01, 0x04, 0x0A,
893 0x00, 0x81, 0x00, 0x00, 0x11, 0x00, 0x00, 0x00,
894 0x80, 0x11, 0x00, 0x00, 0x00, 0x80),
895 PHYREGS(0xD008, 0xCC08, 0xC808, 0xD101, 0xD201, 0xD201),
896 },
897 { .channel = 128,
898 .freq = 5640, /* MHz */
899 .unk2 = 3760,
900 RADIOREGS(0x71, 0x02, 0x34, 0x03, 0x1C, 0x01, 0x04, 0x0A,
901 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
902 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
903 PHYREGS(0xD408, 0xD008, 0xCC08, 0xD001, 0xD101, 0xD201),
904 },
905 { .channel = 130,
906 .freq = 5650, /* MHz */
907 .unk2 = 3767,
908 RADIOREGS(0x71, 0x02, 0x35, 0x03, 0x1C, 0x01, 0x04, 0x0A,
909 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
910 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
911 PHYREGS(0xD808, 0xD408, 0xD008, 0xCF01, 0xD001, 0xD101),
912 },
913 { .channel = 132,
914 .freq = 5660, /* MHz */
915 .unk2 = 3773,
916 RADIOREGS(0x71, 0x02, 0x36, 0x03, 0x16, 0x01, 0x04, 0x0A,
917 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
918 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
919 PHYREGS(0xDC08, 0xD808, 0xD408, 0xCE01, 0xCF01, 0xD001),
920 },
921 { .channel = 134,
922 .freq = 5670, /* MHz */
923 .unk2 = 3780,
924 RADIOREGS(0x71, 0x02, 0x37, 0x03, 0x16, 0x01, 0x04, 0x0A,
925 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
926 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
927 PHYREGS(0xE008, 0xDC08, 0xD808, 0xCE01, 0xCE01, 0xCF01),
928 },
929 { .channel = 136,
930 .freq = 5680, /* MHz */
931 .unk2 = 3787,
932 RADIOREGS(0x71, 0x02, 0x38, 0x03, 0x10, 0x01, 0x04, 0x0A,
933 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
934 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
935 PHYREGS(0xE408, 0xE008, 0xDC08, 0xCD01, 0xCE01, 0xCE01),
936 },
937 { .channel = 138,
938 .freq = 5690, /* MHz */
939 .unk2 = 3793,
940 RADIOREGS(0x71, 0x02, 0x39, 0x03, 0x10, 0x01, 0x04, 0x0A,
941 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
942 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
943 PHYREGS(0xE808, 0xE408, 0xE008, 0xCC01, 0xCD01, 0xCE01),
944 },
945 { .channel = 140,
946 .freq = 5700, /* MHz */
947 .unk2 = 3800,
948 RADIOREGS(0x71, 0x02, 0x3A, 0x02, 0x0A, 0x01, 0x04, 0x0A,
949 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
950 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
951 PHYREGS(0xEC08, 0xE808, 0xE408, 0xCB01, 0xCC01, 0xCD01),
952 },
953 { .channel = 142,
954 .freq = 5710, /* MHz */
955 .unk2 = 3807,
956 RADIOREGS(0x71, 0x02, 0x3B, 0x02, 0x0A, 0x01, 0x04, 0x0A,
957 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
958 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
959 PHYREGS(0xF008, 0xEC08, 0xE808, 0xCA01, 0xCB01, 0xCC01),
960 },
961 { .channel = 144,
962 .freq = 5720, /* MHz */
963 .unk2 = 3813,
964 RADIOREGS(0x71, 0x02, 0x3C, 0x02, 0x0A, 0x01, 0x04, 0x0A,
965 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
966 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
967 PHYREGS(0xF408, 0xF008, 0xEC08, 0xC901, 0xCA01, 0xCB01),
968 },
969 { .channel = 145,
970 .freq = 5725, /* MHz */
971 .unk2 = 3817,
972 RADIOREGS(0x72, 0x04, 0x79, 0x02, 0x03, 0x01, 0x03, 0x14,
973 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
974 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
975 PHYREGS(0xF608, 0xF208, 0xEE08, 0xC901, 0xCA01, 0xCB01),
976 },
977 { .channel = 146,
978 .freq = 5730, /* MHz */
979 .unk2 = 3820,
980 RADIOREGS(0x71, 0x02, 0x3D, 0x02, 0x0A, 0x01, 0x04, 0x0A,
981 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
982 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
983 PHYREGS(0xF808, 0xF408, 0xF008, 0xC901, 0xC901, 0xCA01),
984 },
985 { .channel = 147,
986 .freq = 5735, /* MHz */
987 .unk2 = 3823,
988 RADIOREGS(0x72, 0x04, 0x7B, 0x02, 0x03, 0x01, 0x03, 0x14,
989 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
990 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
991 PHYREGS(0xFA08, 0xF608, 0xF208, 0xC801, 0xC901, 0xCA01),
992 },
993 { .channel = 148,
994 .freq = 5740, /* MHz */
995 .unk2 = 3827,
996 RADIOREGS(0x71, 0x02, 0x3E, 0x02, 0x0A, 0x01, 0x04, 0x0A,
997 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
998 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
999 PHYREGS(0xFC08, 0xF808, 0xF408, 0xC801, 0xC901, 0xC901),
1000 },
1001 { .channel = 149,
1002 .freq = 5745, /* MHz */
1003 .unk2 = 3830,
1004 RADIOREGS(0x72, 0x04, 0x7D, 0x02, 0xFE, 0x00, 0x03, 0x14,
1005 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1006 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1007 PHYREGS(0xFE08, 0xFA08, 0xF608, 0xC801, 0xC801, 0xC901),
1008 },
1009 { .channel = 150,
1010 .freq = 5750, /* MHz */
1011 .unk2 = 3833,
1012 RADIOREGS(0x71, 0x02, 0x3F, 0x02, 0x0A, 0x01, 0x04, 0x0A,
1013 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1014 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1015 PHYREGS(0x0009, 0xFC08, 0xF808, 0xC701, 0xC801, 0xC901),
1016 },
1017 { .channel = 151,
1018 .freq = 5755, /* MHz */
1019 .unk2 = 3837,
1020 RADIOREGS(0x72, 0x04, 0x7F, 0x02, 0xFE, 0x00, 0x03, 0x14,
1021 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1022 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1023 PHYREGS(0x0209, 0xFE08, 0xFA08, 0xC701, 0xC801, 0xC801),
1024 },
1025 { .channel = 152,
1026 .freq = 5760, /* MHz */
1027 .unk2 = 3840,
1028 RADIOREGS(0x71, 0x02, 0x40, 0x02, 0x0A, 0x01, 0x04, 0x0A,
1029 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1030 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1031 PHYREGS(0x0409, 0x0009, 0xFC08, 0xC601, 0xC701, 0xC801),
1032 },
1033 { .channel = 153,
1034 .freq = 5765, /* MHz */
1035 .unk2 = 3843,
1036 RADIOREGS(0x72, 0x04, 0x81, 0x02, 0xF8, 0x00, 0x03, 0x14,
1037 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1038 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1039 PHYREGS(0x0609, 0x0209, 0xFE08, 0xC601, 0xC701, 0xC801),
1040 },
1041 { .channel = 154,
1042 .freq = 5770, /* MHz */
1043 .unk2 = 3847,
1044 RADIOREGS(0x71, 0x02, 0x41, 0x02, 0x0A, 0x01, 0x04, 0x0A,
1045 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1046 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1047 PHYREGS(0x0809, 0x0409, 0x0009, 0xC601, 0xC601, 0xC701),
1048 },
1049 { .channel = 155,
1050 .freq = 5775, /* MHz */
1051 .unk2 = 3850,
1052 RADIOREGS(0x72, 0x04, 0x83, 0x02, 0xF8, 0x00, 0x03, 0x14,
1053 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1054 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1055 PHYREGS(0x0A09, 0x0609, 0x0209, 0xC501, 0xC601, 0xC701),
1056 },
1057 { .channel = 156,
1058 .freq = 5780, /* MHz */
1059 .unk2 = 3853,
1060 RADIOREGS(0x71, 0x02, 0x42, 0x02, 0x0A, 0x01, 0x04, 0x0A,
1061 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1062 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1063 PHYREGS(0x0C09, 0x0809, 0x0409, 0xC501, 0xC601, 0xC601),
1064 },
1065 { .channel = 157,
1066 .freq = 5785, /* MHz */
1067 .unk2 = 3857,
1068 RADIOREGS(0x72, 0x04, 0x85, 0x02, 0xF2, 0x00, 0x03, 0x14,
1069 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1070 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1071 PHYREGS(0x0E09, 0x0A09, 0x0609, 0xC401, 0xC501, 0xC601),
1072 },
1073 { .channel = 158,
1074 .freq = 5790, /* MHz */
1075 .unk2 = 3860,
1076 RADIOREGS(0x71, 0x02, 0x43, 0x02, 0x0A, 0x01, 0x04, 0x0A,
1077 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1078 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1079 PHYREGS(0x1009, 0x0C09, 0x0809, 0xC401, 0xC501, 0xC601),
1080 },
1081 { .channel = 159,
1082 .freq = 5795, /* MHz */
1083 .unk2 = 3863,
1084 RADIOREGS(0x72, 0x04, 0x87, 0x02, 0xF2, 0x00, 0x03, 0x14,
1085 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1086 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1087 PHYREGS(0x1209, 0x0E09, 0x0A09, 0xC401, 0xC401, 0xC501),
1088 },
1089 { .channel = 160,
1090 .freq = 5800, /* MHz */
1091 .unk2 = 3867,
1092 RADIOREGS(0x71, 0x02, 0x44, 0x01, 0x0A, 0x01, 0x04, 0x0A,
1093 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1094 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1095 PHYREGS(0x1409, 0x1009, 0x0C09, 0xC301, 0xC401, 0xC501),
1096 },
1097 { .channel = 161,
1098 .freq = 5805, /* MHz */
1099 .unk2 = 3870,
1100 RADIOREGS(0x72, 0x04, 0x89, 0x01, 0xED, 0x00, 0x03, 0x14,
1101 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1102 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1103 PHYREGS(0x1609, 0x1209, 0x0E09, 0xC301, 0xC401, 0xC401),
1104 },
1105 { .channel = 162,
1106 .freq = 5810, /* MHz */
1107 .unk2 = 3873,
1108 RADIOREGS(0x71, 0x02, 0x45, 0x01, 0x0A, 0x01, 0x04, 0x0A,
1109 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1110 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1111 PHYREGS(0x1809, 0x1409, 0x1009, 0xC201, 0xC301, 0xC401),
1112 },
1113 { .channel = 163,
1114 .freq = 5815, /* MHz */
1115 .unk2 = 3877,
1116 RADIOREGS(0x72, 0x04, 0x8B, 0x01, 0xED, 0x00, 0x03, 0x14,
1117 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1118 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1119 PHYREGS(0x1A09, 0x1609, 0x1209, 0xC201, 0xC301, 0xC401),
1120 },
1121 { .channel = 164,
1122 .freq = 5820, /* MHz */
1123 .unk2 = 3880,
1124 RADIOREGS(0x71, 0x02, 0x46, 0x01, 0x0A, 0x01, 0x04, 0x0A,
1125 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1126 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1127 PHYREGS(0x1C09, 0x1809, 0x1409, 0xC201, 0xC201, 0xC301),
1128 },
1129 { .channel = 165,
1130 .freq = 5825, /* MHz */
1131 .unk2 = 3883,
1132 RADIOREGS(0x72, 0x04, 0x8D, 0x01, 0xED, 0x00, 0x03, 0x14,
1133 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1134 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1135 PHYREGS(0x1E09, 0x1A09, 0x1609, 0xC101, 0xC201, 0xC301),
1136 },
1137 { .channel = 166,
1138 .freq = 5830, /* MHz */
1139 .unk2 = 3887,
1140 RADIOREGS(0x71, 0x02, 0x47, 0x01, 0x0A, 0x01, 0x04, 0x0A,
1141 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1142 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1143 PHYREGS(0x2009, 0x1C09, 0x1809, 0xC101, 0xC201, 0xC201),
1144 },
1145 { .channel = 168,
1146 .freq = 5840, /* MHz */
1147 .unk2 = 3893,
1148 RADIOREGS(0x71, 0x02, 0x48, 0x01, 0x0A, 0x01, 0x04, 0x0A,
1149 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1150 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1151 PHYREGS(0x2409, 0x2009, 0x1C09, 0xC001, 0xC101, 0xC201),
1152 },
1153 { .channel = 170,
1154 .freq = 5850, /* MHz */
1155 .unk2 = 3900,
1156 RADIOREGS(0x71, 0x02, 0x49, 0x01, 0xE0, 0x00, 0x04, 0x0A,
1157 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1158 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1159 PHYREGS(0x2809, 0x2409, 0x2009, 0xBF01, 0xC001, 0xC101),
1160 },
1161 { .channel = 172,
1162 .freq = 5860, /* MHz */
1163 .unk2 = 3907,
1164 RADIOREGS(0x71, 0x02, 0x4A, 0x01, 0xDE, 0x00, 0x04, 0x0A,
1165 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1166 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1167 PHYREGS(0x2C09, 0x2809, 0x2409, 0xBF01, 0xBF01, 0xC001),
1168 },
1169 { .channel = 174,
1170 .freq = 5870, /* MHz */
1171 .unk2 = 3913,
1172 RADIOREGS(0x71, 0x02, 0x4B, 0x00, 0xDB, 0x00, 0x04, 0x0A,
1173 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1174 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1175 PHYREGS(0x3009, 0x2C09, 0x2809, 0xBE01, 0xBF01, 0xBF01),
1176 },
1177 { .channel = 176,
1178 .freq = 5880, /* MHz */
1179 .unk2 = 3920,
1180 RADIOREGS(0x71, 0x02, 0x4C, 0x00, 0xD8, 0x00, 0x04, 0x0A,
1181 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1182 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1183 PHYREGS(0x3409, 0x3009, 0x2C09, 0xBD01, 0xBE01, 0xBF01),
1184 },
1185 { .channel = 178,
1186 .freq = 5890, /* MHz */
1187 .unk2 = 3927,
1188 RADIOREGS(0x71, 0x02, 0x4D, 0x00, 0xD6, 0x00, 0x04, 0x0A,
1189 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1190 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1191 PHYREGS(0x3809, 0x3409, 0x3009, 0xBC01, 0xBD01, 0xBE01),
1192 },
1193 { .channel = 180,
1194 .freq = 5900, /* MHz */
1195 .unk2 = 3933,
1196 RADIOREGS(0x71, 0x02, 0x4E, 0x00, 0xD3, 0x00, 0x04, 0x0A,
1197 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1198 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1199 PHYREGS(0x3C09, 0x3809, 0x3409, 0xBC01, 0xBC01, 0xBD01),
1200 },
1201 { .channel = 182,
1202 .freq = 5910, /* MHz */
1203 .unk2 = 3940,
1204 RADIOREGS(0x71, 0x02, 0x4F, 0x00, 0xD6, 0x00, 0x04, 0x0A,
1205 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1206 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
1207 PHYREGS(0x4009, 0x3C09, 0x3809, 0xBB01, 0xBC01, 0xBC01),
1208 },
1209 { .channel = 1,
1210 .freq = 2412, /* MHz */
1211 .unk2 = 3216,
1212 RADIOREGS(0x73, 0x09, 0x6C, 0x0F, 0x00, 0x01, 0x07, 0x15,
1213 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0D, 0x0C,
1214 0x80, 0xFF, 0x88, 0x0D, 0x0C, 0x80),
1215 PHYREGS(0xC903, 0xC503, 0xC103, 0x3A04, 0x3F04, 0x4304),
1216 },
1217 { .channel = 2,
1218 .freq = 2417, /* MHz */
1219 .unk2 = 3223,
1220 RADIOREGS(0x73, 0x09, 0x71, 0x0F, 0x00, 0x01, 0x07, 0x15,
1221 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0C, 0x0B,
1222 0x80, 0xFF, 0x88, 0x0C, 0x0B, 0x80),
1223 PHYREGS(0xCB03, 0xC703, 0xC303, 0x3804, 0x3D04, 0x4104),
1224 },
1225 { .channel = 3,
1226 .freq = 2422, /* MHz */
1227 .unk2 = 3229,
1228 RADIOREGS(0x73, 0x09, 0x76, 0x0F, 0x00, 0x01, 0x07, 0x15,
1229 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0C, 0x0A,
1230 0x80, 0xFF, 0x88, 0x0C, 0x0A, 0x80),
1231 PHYREGS(0xCD03, 0xC903, 0xC503, 0x3604, 0x3A04, 0x3F04),
1232 },
1233 { .channel = 4,
1234 .freq = 2427, /* MHz */
1235 .unk2 = 3236,
1236 RADIOREGS(0x73, 0x09, 0x7B, 0x0F, 0x00, 0x01, 0x07, 0x15,
1237 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0C, 0x0A,
1238 0x80, 0xFF, 0x88, 0x0C, 0x0A, 0x80),
1239 PHYREGS(0xCF03, 0xCB03, 0xC703, 0x3404, 0x3804, 0x3D04),
1240 },
1241 { .channel = 5,
1242 .freq = 2432, /* MHz */
1243 .unk2 = 3243,
1244 RADIOREGS(0x73, 0x09, 0x80, 0x0F, 0x00, 0x01, 0x07, 0x15,
1245 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0C, 0x09,
1246 0x80, 0xFF, 0x88, 0x0C, 0x09, 0x80),
1247 PHYREGS(0xD103, 0xCD03, 0xC903, 0x3104, 0x3604, 0x3A04),
1248 },
1249 { .channel = 6,
1250 .freq = 2437, /* MHz */
1251 .unk2 = 3249,
1252 RADIOREGS(0x73, 0x09, 0x85, 0x0F, 0x00, 0x01, 0x07, 0x15,
1253 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0B, 0x08,
1254 0x80, 0xFF, 0x88, 0x0B, 0x08, 0x80),
1255 PHYREGS(0xD303, 0xCF03, 0xCB03, 0x2F04, 0x3404, 0x3804),
1256 },
1257 { .channel = 7,
1258 .freq = 2442, /* MHz */
1259 .unk2 = 3256,
1260 RADIOREGS(0x73, 0x09, 0x8A, 0x0F, 0x00, 0x01, 0x07, 0x15,
1261 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0A, 0x07,
1262 0x80, 0xFF, 0x88, 0x0A, 0x07, 0x80),
1263 PHYREGS(0xD503, 0xD103, 0xCD03, 0x2D04, 0x3104, 0x3604),
1264 },
1265 { .channel = 8,
1266 .freq = 2447, /* MHz */
1267 .unk2 = 3263,
1268 RADIOREGS(0x73, 0x09, 0x8F, 0x0F, 0x00, 0x01, 0x07, 0x15,
1269 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0A, 0x06,
1270 0x80, 0xFF, 0x88, 0x0A, 0x06, 0x80),
1271 PHYREGS(0xD703, 0xD303, 0xCF03, 0x2B04, 0x2F04, 0x3404),
1272 },
1273 { .channel = 9,
1274 .freq = 2452, /* MHz */
1275 .unk2 = 3269,
1276 RADIOREGS(0x73, 0x09, 0x94, 0x0F, 0x00, 0x01, 0x07, 0x15,
1277 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x09, 0x06,
1278 0x80, 0xFF, 0x88, 0x09, 0x06, 0x80),
1279 PHYREGS(0xD903, 0xD503, 0xD103, 0x2904, 0x2D04, 0x3104),
1280 },
1281 { .channel = 10,
1282 .freq = 2457, /* MHz */
1283 .unk2 = 3276,
1284 RADIOREGS(0x73, 0x09, 0x99, 0x0F, 0x00, 0x01, 0x07, 0x15,
1285 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x08, 0x05,
1286 0x80, 0xFF, 0x88, 0x08, 0x05, 0x80),
1287 PHYREGS(0xDB03, 0xD703, 0xD303, 0x2704, 0x2B04, 0x2F04),
1288 },
1289 { .channel = 11,
1290 .freq = 2462, /* MHz */
1291 .unk2 = 3283,
1292 RADIOREGS(0x73, 0x09, 0x9E, 0x0F, 0x00, 0x01, 0x07, 0x15,
1293 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x08, 0x04,
1294 0x80, 0xFF, 0x88, 0x08, 0x04, 0x80),
1295 PHYREGS(0xDD03, 0xD903, 0xD503, 0x2404, 0x2904, 0x2D04),
1296 },
1297 { .channel = 12,
1298 .freq = 2467, /* MHz */
1299 .unk2 = 3289,
1300 RADIOREGS(0x73, 0x09, 0xA3, 0x0F, 0x00, 0x01, 0x07, 0x15,
1301 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x08, 0x03,
1302 0x80, 0xFF, 0x88, 0x08, 0x03, 0x80),
1303 PHYREGS(0xDF03, 0xDB03, 0xD703, 0x2204, 0x2704, 0x2B04),
1304 },
1305 { .channel = 13,
1306 .freq = 2472, /* MHz */
1307 .unk2 = 3296,
1308 RADIOREGS(0x73, 0x09, 0xA8, 0x0F, 0x00, 0x01, 0x07, 0x15,
1309 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x07, 0x03,
1310 0x80, 0xFF, 0x88, 0x07, 0x03, 0x80),
1311 PHYREGS(0xE103, 0xDD03, 0xD903, 0x2004, 0x2404, 0x2904),
1312 },
1313 { .channel = 14,
1314 .freq = 2484, /* MHz */
1315 .unk2 = 3312,
1316 RADIOREGS(0x73, 0x09, 0xB4, 0x0F, 0xFF, 0x01, 0x07, 0x15,
1317 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x07, 0x01,
1318 0x80, 0xFF, 0x88, 0x07, 0x01, 0x80),
1319 PHYREGS(0xE603, 0xE203, 0xDE03, 0x1B04, 0x1F04, 0x2404),
1320 },
1321};
1322
1323const struct b43_nphy_channeltab_entry_rev2 *
1324b43_nphy_get_chantabent_rev2(struct b43_wldev *dev, u8 channel)
1325{
1326 const struct b43_nphy_channeltab_entry_rev2 *e;
1327 unsigned int i;
1328
1329 for (i = 0; i < ARRAY_SIZE(b43_nphy_channeltab); i++) {
1330 e = &(b43_nphy_channeltab[i]);
1331 if (e->channel == channel)
1332 return e;
1333 }
1334
1335 return NULL;
1336}
1337
1338
1339static const u8 b43_ntab_adjustpower0[] = { 30static const u8 b43_ntab_adjustpower0[] = {
1340 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x01, 0x01, 31 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x01, 0x01,
1341 0x02, 0x02, 0x02, 0x02, 0x03, 0x03, 0x03, 0x03, 32 0x02, 0x02, 0x02, 0x02, 0x03, 0x03, 0x03, 0x03,
diff --git a/drivers/net/wireless/b43/tables_nphy.h b/drivers/net/wireless/b43/tables_nphy.h
index 8fc1da9f8fe5..4ec593ba3eef 100644
--- a/drivers/net/wireless/b43/tables_nphy.h
+++ b/drivers/net/wireless/b43/tables_nphy.h
@@ -3,7 +3,6 @@
3 3
4#include <linux/types.h> 4#include <linux/types.h>
5 5
6
7struct b43_phy_n_sfo_cfg { 6struct b43_phy_n_sfo_cfg {
8 u16 phy_bw1a; 7 u16 phy_bw1a;
9 u16 phy_bw2; 8 u16 phy_bw2;
@@ -13,52 +12,6 @@ struct b43_phy_n_sfo_cfg {
13 u16 phy_bw6; 12 u16 phy_bw6;
14}; 13};
15 14
16struct b43_nphy_channeltab_entry_rev2 {
17 /* The channel number */
18 u8 channel;
19 /* The channel frequency in MHz */
20 u16 freq;
21 /* An unknown value */
22 u16 unk2;
23 /* Radio register values on channelswitch */
24 u8 radio_pll_ref;
25 u8 radio_rf_pllmod0;
26 u8 radio_rf_pllmod1;
27 u8 radio_vco_captail;
28 u8 radio_vco_cal1;
29 u8 radio_vco_cal2;
30 u8 radio_pll_lfc1;
31 u8 radio_pll_lfr1;
32 u8 radio_pll_lfc2;
33 u8 radio_lgbuf_cenbuf;
34 u8 radio_lgen_tune1;
35 u8 radio_lgen_tune2;
36 u8 radio_c1_lgbuf_atune;
37 u8 radio_c1_lgbuf_gtune;
38 u8 radio_c1_rx_rfr1;
39 u8 radio_c1_tx_pgapadtn;
40 u8 radio_c1_tx_mxbgtrim;
41 u8 radio_c2_lgbuf_atune;
42 u8 radio_c2_lgbuf_gtune;
43 u8 radio_c2_rx_rfr1;
44 u8 radio_c2_tx_pgapadtn;
45 u8 radio_c2_tx_mxbgtrim;
46 /* PHY register values on channelswitch */
47 struct b43_phy_n_sfo_cfg phy_regs;
48};
49
50struct b43_nphy_channeltab_entry_rev3 {
51 /* The channel number */
52 u8 channel;
53 /* The channel frequency in MHz */
54 u16 freq;
55 /* Radio register values on channelswitch */
56 /* TODO */
57 /* PHY register values on channelswitch */
58 struct b43_phy_n_sfo_cfg phy_regs;
59};
60
61
62struct b43_wldev; 15struct b43_wldev;
63 16
64struct nphy_txiqcal_ladder { 17struct nphy_txiqcal_ladder {
@@ -82,18 +35,12 @@ struct nphy_rf_control_override_rev3 {
82 u8 val_addr1; 35 u8 val_addr1;
83}; 36};
84 37
85/* Upload the default register value table. 38/* Get the NPHY Channel Switch Table entry for a channel.
86 * If "ghz5" is true, we upload the 5Ghz table. Otherwise the 2.4Ghz
87 * table is uploaded. If "ignore_uploadflag" is true, we upload any value
88 * and ignore the "UPLOAD" flag. */
89void b2055_upload_inittab(struct b43_wldev *dev,
90 bool ghz5, bool ignore_uploadflag);
91
92
93/* Get the NPHY Channel Switch Table entry for a channel number.
94 * Returns NULL on failure to find an entry. */ 39 * Returns NULL on failure to find an entry. */
95const struct b43_nphy_channeltab_entry_rev2 * 40const struct b43_nphy_channeltab_entry_rev2 *
96b43_nphy_get_chantabent_rev2(struct b43_wldev *dev, u8 channel); 41b43_nphy_get_chantabent_rev2(struct b43_wldev *dev, u8 channel);
42const struct b43_nphy_channeltab_entry_rev3 *
43b43_nphy_get_chantabent_rev3(struct b43_wldev *dev, u16 freq);
97 44
98 45
99/* The N-PHY tables. */ 46/* The N-PHY tables. */
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-23 11:45:55 -0500