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authorRafał Miłecki <zajec5@gmail.com>2014-09-09 15:17:06 -0400
committerJohn W. Linville <linville@tuxdriver.com>2014-09-11 15:27:35 -0400
commit85e6c26fb632dbf3722fa9d2d788cd4f7993c943 (patch)
treeb59078c7891170a8327d12b3449e73843aa03323 /drivers/net/wireless/b43
parent4f4378dead3792d21577739f07869fbd843dab23 (diff)
b43: HT-PHY: Move radio preparation into init function
Radio should be prepared only before initialization. We need this to be able to call b43_radio_2059_init conditionally (in the future). This also documents RF control register a bit. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/b43')
-rw-r--r--drivers/net/wireless/b43/phy_ht.c24
-rw-r--r--drivers/net/wireless/b43/phy_ht.h4
2 files changed, 16 insertions, 12 deletions
diff --git a/drivers/net/wireless/b43/phy_ht.c b/drivers/net/wireless/b43/phy_ht.c
index c4dc8b020f60..7b445419036f 100644
--- a/drivers/net/wireless/b43/phy_ht.c
+++ b/drivers/net/wireless/b43/phy_ht.c
@@ -89,6 +89,14 @@ static void b43_radio_2059_channel_setup(struct b43_wldev *dev,
89 udelay(300); 89 udelay(300);
90} 90}
91 91
92static void b43_radio_2059_init_pre(struct b43_wldev *dev)
93{
94 b43_phy_mask(dev, B43_PHY_HT_RF_CTL_CMD, ~B43_PHY_HT_RF_CTL_CMD_CHIP0_PU);
95 b43_phy_set(dev, B43_PHY_HT_RF_CTL_CMD, B43_PHY_HT_RF_CTL_CMD_FORCE);
96 b43_phy_mask(dev, B43_PHY_HT_RF_CTL_CMD, ~B43_PHY_HT_RF_CTL_CMD_FORCE);
97 b43_phy_set(dev, B43_PHY_HT_RF_CTL_CMD, B43_PHY_HT_RF_CTL_CMD_CHIP0_PU);
98}
99
92static void b43_radio_2059_init(struct b43_wldev *dev) 100static void b43_radio_2059_init(struct b43_wldev *dev)
93{ 101{
94 const u16 routing[] = { R2059_C1, R2059_C2, R2059_C3 }; 102 const u16 routing[] = { R2059_C1, R2059_C2, R2059_C3 };
@@ -97,6 +105,9 @@ static void b43_radio_2059_init(struct b43_wldev *dev)
97 }; 105 };
98 u16 i, j; 106 u16 i, j;
99 107
108 /* Prepare (reset?) radio */
109 b43_radio_2059_init_pre(dev);
110
100 b43_radio_write(dev, R2059_ALL | 0x51, 0x0070); 111 b43_radio_write(dev, R2059_ALL | 0x51, 0x0070);
101 b43_radio_write(dev, R2059_ALL | 0x5a, 0x0003); 112 b43_radio_write(dev, R2059_ALL | 0x5a, 0x0003);
102 113
@@ -1002,19 +1013,10 @@ static void b43_phy_ht_op_software_rfkill(struct b43_wldev *dev,
1002 if (b43_read32(dev, B43_MMIO_MACCTL) & B43_MACCTL_ENABLED) 1013 if (b43_read32(dev, B43_MMIO_MACCTL) & B43_MACCTL_ENABLED)
1003 b43err(dev->wl, "MAC not suspended\n"); 1014 b43err(dev->wl, "MAC not suspended\n");
1004 1015
1005 /* In the following PHY ops we copy wl's dummy behaviour.
1006 * TODO: Find out if reads (currently hidden in masks/masksets) are
1007 * needed and replace following ops with just writes or w&r.
1008 * Note: B43_PHY_HT_RF_CTL1 register is tricky, wrong operation can
1009 * cause delayed (!) machine lock up. */
1010 if (blocked) { 1016 if (blocked) {
1011 b43_phy_mask(dev, B43_PHY_HT_RF_CTL1, 0); 1017 b43_phy_mask(dev, B43_PHY_HT_RF_CTL_CMD,
1018 ~B43_PHY_HT_RF_CTL_CMD_CHIP0_PU);
1012 } else { 1019 } else {
1013 b43_phy_mask(dev, B43_PHY_HT_RF_CTL1, 0);
1014 b43_phy_maskset(dev, B43_PHY_HT_RF_CTL1, 0, 0x1);
1015 b43_phy_mask(dev, B43_PHY_HT_RF_CTL1, 0);
1016 b43_phy_maskset(dev, B43_PHY_HT_RF_CTL1, 0, 0x2);
1017
1018 if (dev->phy.radio_ver == 0x2059) 1020 if (dev->phy.radio_ver == 0x2059)
1019 b43_radio_2059_init(dev); 1021 b43_radio_2059_init(dev);
1020 else 1022 else
diff --git a/drivers/net/wireless/b43/phy_ht.h b/drivers/net/wireless/b43/phy_ht.h
index 6cae370d1018..67b208e2f47e 100644
--- a/drivers/net/wireless/b43/phy_ht.h
+++ b/drivers/net/wireless/b43/phy_ht.h
@@ -81,7 +81,9 @@
81#define B43_PHY_HT_RF_SEQ_STATUS B43_PHY_EXTG(0x004) 81#define B43_PHY_HT_RF_SEQ_STATUS B43_PHY_EXTG(0x004)
82/* Values for the status are the same as for the trigger */ 82/* Values for the status are the same as for the trigger */
83 83
84#define B43_PHY_HT_RF_CTL1 B43_PHY_EXTG(0x010) 84#define B43_PHY_HT_RF_CTL_CMD 0x810
85#define B43_PHY_HT_RF_CTL_CMD_FORCE 0x0001
86#define B43_PHY_HT_RF_CTL_CMD_CHIP0_PU 0x0002
85 87
86#define B43_PHY_HT_RF_CTL_INT_C1 B43_PHY_EXTG(0x04c) 88#define B43_PHY_HT_RF_CTL_INT_C1 B43_PHY_EXTG(0x04c)
87#define B43_PHY_HT_RF_CTL_INT_C2 B43_PHY_EXTG(0x06c) 89#define B43_PHY_HT_RF_CTL_INT_C2 B43_PHY_EXTG(0x06c)