diff options
author | Oleksij Rempel <linux@rempel-privat.de> | 2015-03-22 14:29:49 -0400 |
---|---|---|
committer | Kalle Valo <kvalo@codeaurora.org> | 2015-03-30 04:31:26 -0400 |
commit | 93442c85d23a1e86c693de4b00915168a4a99d92 (patch) | |
tree | 1bc6c2e2a6d3a8b0e1b8b6da4372683d8e2d8b56 /drivers/net/wireless/ath | |
parent | 0202a553f59b7d0df4db56d0ce64c702afea64d0 (diff) |
ath9k: ar9271_hw_pa_cal: use RMW buffer
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Diffstat (limited to 'drivers/net/wireless/ath')
-rw-r--r-- | drivers/net/wireless/ath/ath9k/ar9002_calib.c | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/drivers/net/wireless/ath/ath9k/ar9002_calib.c b/drivers/net/wireless/ath/ath9k/ar9002_calib.c index 8d24a73ca9f2..62a23149556d 100644 --- a/drivers/net/wireless/ath/ath9k/ar9002_calib.c +++ b/drivers/net/wireless/ath/ath9k/ar9002_calib.c | |||
@@ -436,13 +436,14 @@ static void ar9271_hw_pa_cal(struct ath_hw *ah, bool is_reset) | |||
436 | { AR9285_AN_RF2G2, 0 }, | 436 | { AR9285_AN_RF2G2, 0 }, |
437 | { AR9285_AN_TOP2, 0 }, | 437 | { AR9285_AN_TOP2, 0 }, |
438 | { AR9285_AN_RF2G8, 0 }, | 438 | { AR9285_AN_RF2G8, 0 }, |
439 | { AR9285_AN_RF2G7, 0 } , | 439 | { AR9285_AN_RF2G7, 0 }, |
440 | { AR9285_AN_RF2G3, 0 } , | 440 | { AR9285_AN_RF2G3, 0 }, |
441 | }; | 441 | }; |
442 | 442 | ||
443 | for (i = 0; i < ARRAY_SIZE(regList); i++) | 443 | for (i = 0; i < ARRAY_SIZE(regList); i++) |
444 | regList[i][1] = REG_READ(ah, regList[i][0]); | 444 | regList[i][1] = REG_READ(ah, regList[i][0]); |
445 | 445 | ||
446 | ENABLE_REG_RMW_BUFFER(ah); | ||
446 | /* 7834, b1=0 */ | 447 | /* 7834, b1=0 */ |
447 | REG_CLR_BIT(ah, AR9285_AN_RF2G6, 1 << 0); | 448 | REG_CLR_BIT(ah, AR9285_AN_RF2G6, 1 << 0); |
448 | /* 9808, b27=1 */ | 449 | /* 9808, b27=1 */ |
@@ -476,6 +477,7 @@ static void ar9271_hw_pa_cal(struct ath_hw *ah, bool is_reset) | |||
476 | REG_RMW_FIELD(ah, AR9285_AN_RF2G7, AR9285_AN_RF2G7_PADRVGN2TAB0, 0); | 477 | REG_RMW_FIELD(ah, AR9285_AN_RF2G7, AR9285_AN_RF2G7_PADRVGN2TAB0, 0); |
477 | /* 7828, b0-11, ccom=fff */ | 478 | /* 7828, b0-11, ccom=fff */ |
478 | REG_RMW_FIELD(ah, AR9285_AN_RF2G3, AR9271_AN_RF2G3_CCOMP, 0xfff); | 479 | REG_RMW_FIELD(ah, AR9285_AN_RF2G3, AR9271_AN_RF2G3_CCOMP, 0xfff); |
480 | REG_RMW_BUFFER_FLUSH(ah); | ||
479 | 481 | ||
480 | /* Set: | 482 | /* Set: |
481 | * localmode=1,bmode=1,bmoderxtx=1,synthon=1, | 483 | * localmode=1,bmode=1,bmoderxtx=1,synthon=1, |
@@ -514,10 +516,12 @@ static void ar9271_hw_pa_cal(struct ath_hw *ah, bool is_reset) | |||
514 | } | 516 | } |
515 | 517 | ||
516 | 518 | ||
519 | ENABLE_REG_RMW_BUFFER(ah); | ||
517 | /* 7834, b1=1 */ | 520 | /* 7834, b1=1 */ |
518 | REG_SET_BIT(ah, AR9285_AN_RF2G6, 1 << 0); | 521 | REG_SET_BIT(ah, AR9285_AN_RF2G6, 1 << 0); |
519 | /* 9808, b27=0 */ | 522 | /* 9808, b27=0 */ |
520 | REG_CLR_BIT(ah, 0x9808, 1 << 27); | 523 | REG_CLR_BIT(ah, 0x9808, 1 << 27); |
524 | REG_RMW_BUFFER_FLUSH(ah); | ||
521 | 525 | ||
522 | ENABLE_REGWRITE_BUFFER(ah); | 526 | ENABLE_REGWRITE_BUFFER(ah); |
523 | for (i = 0; i < ARRAY_SIZE(regList); i++) | 527 | for (i = 0; i < ARRAY_SIZE(regList); i++) |