aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/net/wireless/ath
diff options
context:
space:
mode:
authorRajkumar Manoharan <rmanohar@qca.qualcomm.com>2012-07-01 10:23:55 -0400
committerJohn W. Linville <linville@tuxdriver.com>2012-07-09 16:36:20 -0400
commit83bfea42190b72acc1a1653bc10b21e741490087 (patch)
tree6eeca66d40330afaad0083a8bfea53368fb6e113 /drivers/net/wireless/ath
parent08d4df410a9ff02c999e69268ec2f4fbfeaac8d7 (diff)
ath9k_hw: fix AR9462 2g5g switch on full reset
On full reset, mci reset will put LNA update on 2G mode. And Whenever 2g5g_switch is forced at the end of full reset, lna update should not be skipped. Not doing so, is affecting WLAN rx and causing beacon loss when BTCOEX is enabled on AR9462. Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath')
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9003_mci.c18
1 files changed, 6 insertions, 12 deletions
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_mci.c b/drivers/net/wireless/ath/ath9k/ar9003_mci.c
index 61558375bfbf..9a34fcaae3ff 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_mci.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_mci.c
@@ -1015,12 +1015,9 @@ void ar9003_mci_2g5g_switch(struct ath_hw *ah, bool force)
1015 return; 1015 return;
1016 1016
1017 if (mci->is_2g) { 1017 if (mci->is_2g) {
1018 if (!force) { 1018 ar9003_mci_send_2g5g_status(ah, true);
1019 ar9003_mci_send_2g5g_status(ah, true); 1019 ar9003_mci_send_lna_transfer(ah, true);
1020 1020 udelay(5);
1021 ar9003_mci_send_lna_transfer(ah, true);
1022 udelay(5);
1023 }
1024 1021
1025 REG_CLR_BIT(ah, AR_MCI_TX_CTRL, 1022 REG_CLR_BIT(ah, AR_MCI_TX_CTRL,
1026 AR_MCI_TX_CTRL_DISABLE_LNA_UPDATE); 1023 AR_MCI_TX_CTRL_DISABLE_LNA_UPDATE);
@@ -1030,10 +1027,8 @@ void ar9003_mci_2g5g_switch(struct ath_hw *ah, bool force)
1030 if (!(mci->config & ATH_MCI_CONFIG_DISABLE_OSLA)) 1027 if (!(mci->config & ATH_MCI_CONFIG_DISABLE_OSLA))
1031 ar9003_mci_osla_setup(ah, true); 1028 ar9003_mci_osla_setup(ah, true);
1032 } else { 1029 } else {
1033 if (!force) { 1030 ar9003_mci_send_lna_take(ah, true);
1034 ar9003_mci_send_lna_take(ah, true); 1031 udelay(5);
1035 udelay(5);
1036 }
1037 1032
1038 REG_SET_BIT(ah, AR_MCI_TX_CTRL, 1033 REG_SET_BIT(ah, AR_MCI_TX_CTRL,
1039 AR_MCI_TX_CTRL_DISABLE_LNA_UPDATE); 1034 AR_MCI_TX_CTRL_DISABLE_LNA_UPDATE);
@@ -1041,8 +1036,7 @@ void ar9003_mci_2g5g_switch(struct ath_hw *ah, bool force)
1041 AR_BTCOEX_CTRL_BT_OWN_SPDT_CTRL); 1036 AR_BTCOEX_CTRL_BT_OWN_SPDT_CTRL);
1042 1037
1043 ar9003_mci_osla_setup(ah, false); 1038 ar9003_mci_osla_setup(ah, false);
1044 if (!force) 1039 ar9003_mci_send_2g5g_status(ah, true);
1045 ar9003_mci_send_2g5g_status(ah, true);
1046 } 1040 }
1047} 1041}
1048 1042