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authorSujith Manoharan <c_manoha@qca.qualcomm.com>2015-03-14 01:57:52 -0400
committerKalle Valo <kvalo@codeaurora.org>2015-03-20 02:27:23 -0400
commit188f1a1288d59ed9ae895bdbf22d46017a8a69b8 (patch)
tree60eadce47403b596e29d5d4a921b3048563eded8 /drivers/net/wireless/ath
parent716eed4c0dfb6a7ceeb61730506e43f2755f322b (diff)
ath9k: Process the AIC calibration results
This patch adds support for post-processing the AIC calibration results. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Diffstat (limited to 'drivers/net/wireless/ath')
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9003_aic.c245
1 files changed, 245 insertions, 0 deletions
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_aic.c b/drivers/net/wireless/ath/ath9k/ar9003_aic.c
index 00aaf4dd90e7..51ecc9b2df8c 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_aic.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_aic.c
@@ -20,6 +20,22 @@
20#include "ar9003_aic.h" 20#include "ar9003_aic.h"
21#include "reg_aic.h" 21#include "reg_aic.h"
22 22
23static const u8 com_att_db_table[ATH_AIC_MAX_COM_ATT_DB_TABLE] = {
24 0, 3, 9, 15, 21, 27
25};
26
27static const u16 aic_lin_table[ATH_AIC_MAX_AIC_LIN_TABLE] = {
28 8191, 7300, 6506, 5799, 5168, 4606, 4105, 3659,
29 3261, 2906, 2590, 2309, 2057, 1834, 1634, 1457,
30 1298, 1157, 1031, 919, 819, 730, 651, 580,
31 517, 461, 411, 366, 326, 291, 259, 231,
32 206, 183, 163, 146, 130, 116, 103, 92,
33 82, 73, 65, 58, 52, 46, 41, 37,
34 33, 29, 26, 23, 21, 18, 16, 15,
35 13, 12, 10, 9, 8, 7, 7, 6,
36 5, 5, 4, 4, 3
37};
38
23static bool ar9003_hw_is_aic_enabled(struct ath_hw *ah) 39static bool ar9003_hw_is_aic_enabled(struct ath_hw *ah)
24{ 40{
25 struct ath9k_hw_mci *mci_hw = &ah->btcoex_hw.mci; 41 struct ath9k_hw_mci *mci_hw = &ah->btcoex_hw.mci;
@@ -30,6 +46,56 @@ static bool ar9003_hw_is_aic_enabled(struct ath_hw *ah)
30 return true; 46 return true;
31} 47}
32 48
49static int16_t ar9003_aic_find_valid(struct ath_aic_sram_info *cal_sram,
50 bool dir, u8 index)
51{
52 int16_t i;
53
54 if (dir) {
55 for (i = index + 1; i < ATH_AIC_MAX_BT_CHANNEL; i++) {
56 if (cal_sram[i].valid)
57 break;
58 }
59 } else {
60 for (i = index - 1; i >= 0; i--) {
61 if (cal_sram[i].valid)
62 break;
63 }
64 }
65
66 if ((i >= ATH_AIC_MAX_BT_CHANNEL) || (i < 0))
67 i = -1;
68
69 return i;
70}
71
72/*
73 * type 0: aic_lin_table, 1: com_att_db_table
74 */
75static int16_t ar9003_aic_find_index(u8 type, int16_t value)
76{
77 int16_t i = -1;
78
79 if (type == 0) {
80 for (i = ATH_AIC_MAX_AIC_LIN_TABLE - 1; i >= 0; i--) {
81 if (aic_lin_table[i] >= value)
82 break;
83 }
84 } else if (type == 1) {
85 for (i = 0; i < ATH_AIC_MAX_COM_ATT_DB_TABLE; i++) {
86 if (com_att_db_table[i] > value) {
87 i--;
88 break;
89 }
90 }
91
92 if (i >= ATH_AIC_MAX_COM_ATT_DB_TABLE)
93 i = -1;
94 }
95
96 return i;
97}
98
33static void ar9003_aic_gain_table(struct ath_hw *ah) 99static void ar9003_aic_gain_table(struct ath_hw *ah)
34{ 100{
35 u32 aic_atten_word[19], i; 101 u32 aic_atten_word[19], i;
@@ -186,12 +252,191 @@ static void ar9003_aic_cal_start(struct ath_hw *ah, u8 min_valid_count)
186 aic->aic_cal_state = AIC_CAL_STATE_STARTED; 252 aic->aic_cal_state = AIC_CAL_STATE_STARTED;
187} 253}
188 254
255static bool ar9003_aic_cal_post_process(struct ath_hw *ah)
256{
257 struct ath9k_hw_aic *aic = &ah->btcoex_hw.aic;
258 struct ath_aic_sram_info cal_sram[ATH_AIC_MAX_BT_CHANNEL];
259 struct ath_aic_out_info aic_sram[ATH_AIC_MAX_BT_CHANNEL];
260 u32 dir_path_gain_idx, quad_path_gain_idx, value;
261 u32 fixed_com_att_db;
262 int8_t dir_path_sign, quad_path_sign;
263 int16_t i;
264 bool ret = true;
265
266 memset(&cal_sram, 0, sizeof(cal_sram));
267 memset(&aic_sram, 0, sizeof(aic_sram));
268
269 for (i = 0; i < ATH_AIC_MAX_BT_CHANNEL; i++) {
270 value = aic->aic_sram[i];
271
272 cal_sram[i].valid =
273 MS(value, AR_PHY_AIC_SRAM_VALID);
274 cal_sram[i].rot_quad_att_db =
275 MS(value, AR_PHY_AIC_SRAM_ROT_QUAD_ATT_DB);
276 cal_sram[i].vga_quad_sign =
277 MS(value, AR_PHY_AIC_SRAM_VGA_QUAD_SIGN);
278 cal_sram[i].rot_dir_att_db =
279 MS(value, AR_PHY_AIC_SRAM_ROT_DIR_ATT_DB);
280 cal_sram[i].vga_dir_sign =
281 MS(value, AR_PHY_AIC_SRAM_VGA_DIR_SIGN);
282 cal_sram[i].com_att_6db =
283 MS(value, AR_PHY_AIC_SRAM_COM_ATT_6DB);
284
285 if (cal_sram[i].valid) {
286 dir_path_gain_idx = cal_sram[i].rot_dir_att_db +
287 com_att_db_table[cal_sram[i].com_att_6db];
288 quad_path_gain_idx = cal_sram[i].rot_quad_att_db +
289 com_att_db_table[cal_sram[i].com_att_6db];
290
291 dir_path_sign = (cal_sram[i].vga_dir_sign) ? 1 : -1;
292 quad_path_sign = (cal_sram[i].vga_quad_sign) ? 1 : -1;
293
294 aic_sram[i].dir_path_gain_lin = dir_path_sign *
295 aic_lin_table[dir_path_gain_idx];
296 aic_sram[i].quad_path_gain_lin = quad_path_sign *
297 aic_lin_table[quad_path_gain_idx];
298 }
299 }
300
301 for (i = 0; i < ATH_AIC_MAX_BT_CHANNEL; i++) {
302 int16_t start_idx, end_idx;
303
304 if (cal_sram[i].valid)
305 continue;
306
307 start_idx = ar9003_aic_find_valid(cal_sram, 0, i);
308 end_idx = ar9003_aic_find_valid(cal_sram, 1, i);
309
310 if (start_idx < 0) {
311 /* extrapolation */
312 start_idx = end_idx;
313 end_idx = ar9003_aic_find_valid(cal_sram, 1, start_idx);
314
315 if (end_idx < 0) {
316 ret = false;
317 break;
318 }
319
320 aic_sram[i].dir_path_gain_lin =
321 ((aic_sram[start_idx].dir_path_gain_lin -
322 aic_sram[end_idx].dir_path_gain_lin) *
323 (start_idx - i) + ((end_idx - i) >> 1)) /
324 (end_idx - i) +
325 aic_sram[start_idx].dir_path_gain_lin;
326 aic_sram[i].quad_path_gain_lin =
327 ((aic_sram[start_idx].quad_path_gain_lin -
328 aic_sram[end_idx].quad_path_gain_lin) *
329 (start_idx - i) + ((end_idx - i) >> 1)) /
330 (end_idx - i) +
331 aic_sram[start_idx].quad_path_gain_lin;
332 }
333
334 if (end_idx < 0) {
335 /* extrapolation */
336 end_idx = ar9003_aic_find_valid(cal_sram, 0, start_idx);
337
338 if (end_idx < 0) {
339 ret = false;
340 break;
341 }
342
343 aic_sram[i].dir_path_gain_lin =
344 ((aic_sram[start_idx].dir_path_gain_lin -
345 aic_sram[end_idx].dir_path_gain_lin) *
346 (i - start_idx) + ((start_idx - end_idx) >> 1)) /
347 (start_idx - end_idx) +
348 aic_sram[start_idx].dir_path_gain_lin;
349 aic_sram[i].quad_path_gain_lin =
350 ((aic_sram[start_idx].quad_path_gain_lin -
351 aic_sram[end_idx].quad_path_gain_lin) *
352 (i - start_idx) + ((start_idx - end_idx) >> 1)) /
353 (start_idx - end_idx) +
354 aic_sram[start_idx].quad_path_gain_lin;
355
356 } else if (start_idx >= 0){
357 /* interpolation */
358 aic_sram[i].dir_path_gain_lin =
359 (((end_idx - i) * aic_sram[start_idx].dir_path_gain_lin) +
360 ((i - start_idx) * aic_sram[end_idx].dir_path_gain_lin) +
361 ((end_idx - start_idx) >> 1)) /
362 (end_idx - start_idx);
363 aic_sram[i].quad_path_gain_lin =
364 (((end_idx - i) * aic_sram[start_idx].quad_path_gain_lin) +
365 ((i - start_idx) * aic_sram[end_idx].quad_path_gain_lin) +
366 ((end_idx - start_idx) >> 1))/
367 (end_idx - start_idx);
368 }
369 }
370
371 /* From dir/quad_path_gain_lin to sram. */
372 i = ar9003_aic_find_valid(cal_sram, 1, 0);
373 if (i < 0) {
374 i = 0;
375 ret = false;
376 }
377 fixed_com_att_db = com_att_db_table[cal_sram[i].com_att_6db];
378
379 for (i = 0; i < ATH_AIC_MAX_BT_CHANNEL; i++) {
380 int16_t rot_dir_path_att_db, rot_quad_path_att_db;
381
382 aic_sram[i].sram.vga_dir_sign =
383 (aic_sram[i].dir_path_gain_lin >= 0) ? 1 : 0;
384 aic_sram[i].sram.vga_quad_sign=
385 (aic_sram[i].quad_path_gain_lin >= 0) ? 1 : 0;
386
387 rot_dir_path_att_db =
388 ar9003_aic_find_index(0, abs(aic_sram[i].dir_path_gain_lin)) -
389 fixed_com_att_db;
390 rot_quad_path_att_db =
391 ar9003_aic_find_index(0, abs(aic_sram[i].quad_path_gain_lin)) -
392 fixed_com_att_db;
393
394 aic_sram[i].sram.com_att_6db =
395 ar9003_aic_find_index(1, fixed_com_att_db);
396
397 aic_sram[i].sram.valid = 1;
398
399 aic_sram[i].sram.rot_dir_att_db =
400 min(max(rot_dir_path_att_db,
401 (int16_t)ATH_AIC_MIN_ROT_DIR_ATT_DB),
402 ATH_AIC_MAX_ROT_DIR_ATT_DB);
403 aic_sram[i].sram.rot_quad_att_db =
404 min(max(rot_quad_path_att_db,
405 (int16_t)ATH_AIC_MIN_ROT_QUAD_ATT_DB),
406 ATH_AIC_MAX_ROT_QUAD_ATT_DB);
407 }
408
409 for (i = 0; i < ATH_AIC_MAX_BT_CHANNEL; i++) {
410 aic->aic_sram[i] = (SM(aic_sram[i].sram.vga_dir_sign,
411 AR_PHY_AIC_SRAM_VGA_DIR_SIGN) |
412 SM(aic_sram[i].sram.vga_quad_sign,
413 AR_PHY_AIC_SRAM_VGA_QUAD_SIGN) |
414 SM(aic_sram[i].sram.com_att_6db,
415 AR_PHY_AIC_SRAM_COM_ATT_6DB) |
416 SM(aic_sram[i].sram.valid,
417 AR_PHY_AIC_SRAM_VALID) |
418 SM(aic_sram[i].sram.rot_dir_att_db,
419 AR_PHY_AIC_SRAM_ROT_DIR_ATT_DB) |
420 SM(aic_sram[i].sram.rot_quad_att_db,
421 AR_PHY_AIC_SRAM_ROT_QUAD_ATT_DB));
422 }
423
424 return ret;
425}
426
189static void ar9003_aic_cal_done(struct ath_hw *ah) 427static void ar9003_aic_cal_done(struct ath_hw *ah)
190{ 428{
429 struct ath9k_hw_aic *aic = &ah->btcoex_hw.aic;
430
191 /* Disable AIC reference signal in BT modem. */ 431 /* Disable AIC reference signal in BT modem. */
192 REG_WRITE(ah, ATH_AIC_BT_JUPITER_CTRL, 432 REG_WRITE(ah, ATH_AIC_BT_JUPITER_CTRL,
193 (REG_READ(ah, ATH_AIC_BT_JUPITER_CTRL) & 433 (REG_READ(ah, ATH_AIC_BT_JUPITER_CTRL) &
194 ~ATH_AIC_BT_AIC_ENABLE)); 434 ~ATH_AIC_BT_AIC_ENABLE));
435
436 if (ar9003_aic_cal_post_process(ah))
437 aic->aic_cal_state = AIC_CAL_STATE_DONE;
438 else
439 aic->aic_cal_state = AIC_CAL_STATE_ERROR;
195} 440}
196 441
197static u8 ar9003_aic_cal_continue(struct ath_hw *ah, bool cal_once) 442static u8 ar9003_aic_cal_continue(struct ath_hw *ah, bool cal_once)