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authorSujith <Sujith.Manoharan@atheros.com>2009-02-09 02:57:26 -0500
committerJohn W. Linville <linville@tuxdriver.com>2009-02-13 13:45:10 -0500
commit2660b81a378ab227b78c4cc618453fa7e19a7c7b (patch)
treeea305af43f0e27c86538fecce6c9a4e0151dbc78 /drivers/net/wireless/ath9k/hw.h
parentf74df6fbe31561091bf42be0ed30232be2b9d3ac (diff)
ath9k: Remove all the useless ah_ variable prefixes
Signed-off-by: Sujith <Sujith.Manoharan@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath9k/hw.h')
-rw-r--r--drivers/net/wireless/ath9k/hw.h216
1 files changed, 106 insertions, 110 deletions
diff --git a/drivers/net/wireless/ath9k/hw.h b/drivers/net/wireless/ath9k/hw.h
index f8f46db665c2..82111636c693 100644
--- a/drivers/net/wireless/ath9k/hw.h
+++ b/drivers/net/wireless/ath9k/hw.h
@@ -420,152 +420,148 @@ struct ath9k_hw_version {
420struct ath_hw { 420struct ath_hw {
421 struct ath_softc *ah_sc; 421 struct ath_softc *ah_sc;
422 struct ath9k_hw_version hw_version; 422 struct ath9k_hw_version hw_version;
423 struct ath9k_ops_config ah_config; 423 struct ath9k_ops_config config;
424 struct ath9k_hw_capabilities ah_caps; 424 struct ath9k_hw_capabilities caps;
425 struct ath9k_regulatory regulatory; 425 struct ath9k_regulatory regulatory;
426 struct ath9k_channel ah_channels[38]; 426 struct ath9k_channel channels[38];
427 struct ath9k_channel *ah_curchan; 427 struct ath9k_channel *curchan;
428 428
429 union { 429 union {
430 struct ar5416_eeprom_def def; 430 struct ar5416_eeprom_def def;
431 struct ar5416_eeprom_4k map4k; 431 struct ar5416_eeprom_4k map4k;
432 } ah_eeprom; 432 } eeprom;
433 const struct eeprom_ops *eep_ops; 433 const struct eeprom_ops *eep_ops;
434 enum ath9k_eep_map eep_map;
434 435
435 bool sw_mgmt_crypto; 436 bool sw_mgmt_crypto;
436 bool ah_isPciExpress; 437 bool is_pciexpress;
437 u8 macaddr[ETH_ALEN]; 438 u8 macaddr[ETH_ALEN];
438 u16 ah_txTrigLevel; 439 u16 tx_trig_level;
439 u16 ah_rfsilent; 440 u16 rfsilent;
440 u32 ah_rfkill_gpio; 441 u32 rfkill_gpio;
441 u32 ah_rfkill_polarity; 442 u32 rfkill_polarity;
442 u32 ah_btactive_gpio; 443 u32 btactive_gpio;
443 u32 ah_wlanactive_gpio; 444 u32 wlanactive_gpio;
444 u32 ah_flags; 445 u32 ah_flags;
445 enum nl80211_iftype ah_opmode;
446 446
447 enum ath9k_power_mode ah_power_mode; 447 enum nl80211_iftype opmode;
448 enum ath9k_power_mode ah_restore_mode; 448 enum ath9k_power_mode power_mode;
449 enum ath9k_power_mode restore_mode;
449 450
450 struct ath9k_nfcal_hist nfCalHist[NUM_NF_READINGS]; 451 struct ath9k_nfcal_hist nfCalHist[NUM_NF_READINGS];
451 struct ar5416Stats ah_stats; 452 struct ar5416Stats stats;
452 struct ath9k_tx_queue_info ah_txq[ATH9K_NUM_TX_QUEUES]; 453 struct ath9k_tx_queue_info txq[ATH9K_NUM_TX_QUEUES];
453 454
454 int16_t ah_curchanRadIndex; 455 int16_t curchan_rad_index;
455 u32 ah_maskReg; 456 u32 mask_reg;
456 u32 ah_txOkInterruptMask; 457 u32 txok_interrupt_mask;
457 u32 ah_txErrInterruptMask; 458 u32 txerr_interrupt_mask;
458 u32 ah_txDescInterruptMask; 459 u32 txdesc_interrupt_mask;
459 u32 ah_txEolInterruptMask; 460 u32 txeol_interrupt_mask;
460 u32 ah_txUrnInterruptMask; 461 u32 txurn_interrupt_mask;
461 bool ah_chipFullSleep; 462 bool chip_fullsleep;
462 u32 ah_atimWindow; 463 u32 atim_window;
463 u16 ah_antennaSwitchSwap; 464 u16 antenna_switch_swap;
464 enum ath9k_ant_setting ah_diversityControl; 465 enum ath9k_ant_setting diversity_control;
465 466
466 /* Calibration */ 467 /* Calibration */
467 enum hal_cal_types ah_suppCals; 468 enum hal_cal_types supp_cals;
468 struct hal_cal_list ah_iqCalData; 469 struct hal_cal_list iq_caldata;
469 struct hal_cal_list ah_adcGainCalData; 470 struct hal_cal_list adcgain_caldata;
470 struct hal_cal_list ah_adcDcCalInitData; 471 struct hal_cal_list adcdc_calinitdata;
471 struct hal_cal_list ah_adcDcCalData; 472 struct hal_cal_list adcdc_caldata;
472 struct hal_cal_list *ah_cal_list; 473 struct hal_cal_list *cal_list;
473 struct hal_cal_list *ah_cal_list_last; 474 struct hal_cal_list *cal_list_last;
474 struct hal_cal_list *ah_cal_list_curr; 475 struct hal_cal_list *cal_list_curr;
475#define ah_totalPowerMeasI ah_Meas0.unsign 476#define totalPowerMeasI meas0.unsign
476#define ah_totalPowerMeasQ ah_Meas1.unsign 477#define totalPowerMeasQ meas1.unsign
477#define ah_totalIqCorrMeas ah_Meas2.sign 478#define totalIqCorrMeas meas2.sign
478#define ah_totalAdcIOddPhase ah_Meas0.unsign 479#define totalAdcIOddPhase meas0.unsign
479#define ah_totalAdcIEvenPhase ah_Meas1.unsign 480#define totalAdcIEvenPhase meas1.unsign
480#define ah_totalAdcQOddPhase ah_Meas2.unsign 481#define totalAdcQOddPhase meas2.unsign
481#define ah_totalAdcQEvenPhase ah_Meas3.unsign 482#define totalAdcQEvenPhase meas3.unsign
482#define ah_totalAdcDcOffsetIOddPhase ah_Meas0.sign 483#define totalAdcDcOffsetIOddPhase meas0.sign
483#define ah_totalAdcDcOffsetIEvenPhase ah_Meas1.sign 484#define totalAdcDcOffsetIEvenPhase meas1.sign
484#define ah_totalAdcDcOffsetQOddPhase ah_Meas2.sign 485#define totalAdcDcOffsetQOddPhase meas2.sign
485#define ah_totalAdcDcOffsetQEvenPhase ah_Meas3.sign 486#define totalAdcDcOffsetQEvenPhase meas3.sign
486 union { 487 union {
487 u32 unsign[AR5416_MAX_CHAINS]; 488 u32 unsign[AR5416_MAX_CHAINS];
488 int32_t sign[AR5416_MAX_CHAINS]; 489 int32_t sign[AR5416_MAX_CHAINS];
489 } ah_Meas0; 490 } meas0;
490 union { 491 union {
491 u32 unsign[AR5416_MAX_CHAINS]; 492 u32 unsign[AR5416_MAX_CHAINS];
492 int32_t sign[AR5416_MAX_CHAINS]; 493 int32_t sign[AR5416_MAX_CHAINS];
493 } ah_Meas1; 494 } meas1;
494 union { 495 union {
495 u32 unsign[AR5416_MAX_CHAINS]; 496 u32 unsign[AR5416_MAX_CHAINS];
496 int32_t sign[AR5416_MAX_CHAINS]; 497 int32_t sign[AR5416_MAX_CHAINS];
497 } ah_Meas2; 498 } meas2;
498 union { 499 union {
499 u32 unsign[AR5416_MAX_CHAINS]; 500 u32 unsign[AR5416_MAX_CHAINS];
500 int32_t sign[AR5416_MAX_CHAINS]; 501 int32_t sign[AR5416_MAX_CHAINS];
501 } ah_Meas3; 502 } meas3;
502 u16 ah_CalSamples; 503 u16 cal_samples;
503 504
504 u32 ah_staId1Defaults; 505 u32 sta_id1_defaults;
505 u32 ah_miscMode; 506 u32 misc_mode;
506 enum { 507 enum {
507 AUTO_32KHZ, 508 AUTO_32KHZ,
508 USE_32KHZ, 509 USE_32KHZ,
509 DONT_USE_32KHZ, 510 DONT_USE_32KHZ,
510 } ah_enable32kHzClock; 511 } enable_32kHz_clock;
511 512
512 /* RF */ 513 /* RF */
513 u32 *ah_analogBank0Data; 514 u32 *analogBank0Data;
514 u32 *ah_analogBank1Data; 515 u32 *analogBank1Data;
515 u32 *ah_analogBank2Data; 516 u32 *analogBank2Data;
516 u32 *ah_analogBank3Data; 517 u32 *analogBank3Data;
517 u32 *ah_analogBank6Data; 518 u32 *analogBank6Data;
518 u32 *ah_analogBank6TPCData; 519 u32 *analogBank6TPCData;
519 u32 *ah_analogBank7Data; 520 u32 *analogBank7Data;
520 u32 *ah_addac5416_21; 521 u32 *addac5416_21;
521 u32 *ah_bank6Temp; 522 u32 *bank6Temp;
522 523
523 int16_t ah_txPowerIndexOffset; 524 int16_t txpower_indexoffset;
524 u32 ah_beaconInterval; 525 u32 beacon_interval;
525 u32 ah_slottime; 526 u32 slottime;
526 u32 ah_acktimeout; 527 u32 acktimeout;
527 u32 ah_ctstimeout; 528 u32 ctstimeout;
528 u32 ah_globaltxtimeout; 529 u32 globaltxtimeout;
529 u8 ah_gBeaconRate; 530 u8 gbeacon_rate;
530 u32 ah_gpioSelect;
531 u32 ah_polarity;
532 u32 ah_gpioBit;
533 531
534 /* ANI */ 532 /* ANI */
535 u32 ah_procPhyErr; 533 u32 proc_phyerr;
536 bool ah_hasHwPhyCounters; 534 bool has_hw_phycounters;
537 u32 ah_aniPeriod; 535 u32 aniperiod;
538 struct ar5416AniState *ah_curani; 536 struct ar5416AniState *curani;
539 struct ar5416AniState ah_ani[255]; 537 struct ar5416AniState ani[255];
540 int ah_totalSizeDesired[5]; 538 int totalSizeDesired[5];
541 int ah_coarseHigh[5]; 539 int coarse_high[5];
542 int ah_coarseLow[5]; 540 int coarse_low[5];
543 int ah_firpwr[5]; 541 int firpwr[5];
544 enum ath9k_ani_cmd ah_ani_function; 542 enum ath9k_ani_cmd ani_function;
545 543
546 u32 ah_intrTxqs; 544 u32 intr_txqs;
547 bool ah_intrMitigation; 545 bool intr_mitigation;
548 enum ath9k_ht_extprotspacing ah_extprotspacing; 546 enum ath9k_ht_extprotspacing extprotspacing;
549 u8 ah_txchainmask; 547 u8 txchainmask;
550 u8 ah_rxchainmask; 548 u8 rxchainmask;
551 549
552 struct ar5416IniArray ah_iniModes; 550 struct ar5416IniArray iniModes;
553 struct ar5416IniArray ah_iniCommon; 551 struct ar5416IniArray iniCommon;
554 struct ar5416IniArray ah_iniBank0; 552 struct ar5416IniArray iniBank0;
555 struct ar5416IniArray ah_iniBB_RfGain; 553 struct ar5416IniArray iniBB_RfGain;
556 struct ar5416IniArray ah_iniBank1; 554 struct ar5416IniArray iniBank1;
557 struct ar5416IniArray ah_iniBank2; 555 struct ar5416IniArray iniBank2;
558 struct ar5416IniArray ah_iniBank3; 556 struct ar5416IniArray iniBank3;
559 struct ar5416IniArray ah_iniBank6; 557 struct ar5416IniArray iniBank6;
560 struct ar5416IniArray ah_iniBank6TPC; 558 struct ar5416IniArray iniBank6TPC;
561 struct ar5416IniArray ah_iniBank7; 559 struct ar5416IniArray iniBank7;
562 struct ar5416IniArray ah_iniAddac; 560 struct ar5416IniArray iniAddac;
563 struct ar5416IniArray ah_iniPcieSerdes; 561 struct ar5416IniArray iniPcieSerdes;
564 struct ar5416IniArray ah_iniModesAdditional; 562 struct ar5416IniArray iniModesAdditional;
565 struct ar5416IniArray ah_iniModesRxGain; 563 struct ar5416IniArray iniModesRxGain;
566 struct ar5416IniArray ah_iniModesTxGain; 564 struct ar5416IniArray iniModesTxGain;
567 /* To indicate EEPROM mapping used */
568 enum hal_eep_map ah_eep_map;
569}; 565};
570 566
571/* Attach, Detach, Reset */ 567/* Attach, Detach, Reset */