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authorSujith <Sujith.Manoharan@atheros.com>2008-11-17 22:39:54 -0500
committerJohn W. Linville <linville@tuxdriver.com>2008-11-26 09:47:33 -0500
commit788a3d6f3df595a6537ef537433c870d090afe02 (patch)
treeb34dde0a02d80f75a236be89f78c69cd059a635b /drivers/net/wireless/ath9k/hw.c
parentc428839008f6638317a0db102d4e65d631c288a6 (diff)
ath9k: Fix bug in deciphering channel flags
CHANNEL_CCK flag is set for all 2 Ghz channels, so IS_CHAN_CCK() would turn out to be true for all channles in that band. Use IS_CHAN_B() now, which checks the channel mode and not the channel flags. Signed-off-by: Sujith <Sujith.Manoharan@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath9k/hw.c')
-rw-r--r--drivers/net/wireless/ath9k/hw.c11
1 files changed, 6 insertions, 5 deletions
diff --git a/drivers/net/wireless/ath9k/hw.c b/drivers/net/wireless/ath9k/hw.c
index eb1445143bcf..10f6c08f6eb2 100644
--- a/drivers/net/wireless/ath9k/hw.c
+++ b/drivers/net/wireless/ath9k/hw.c
@@ -86,10 +86,11 @@ static u32 ath9k_hw_mac_to_clks(struct ath_hal *ah, u32 usecs)
86enum wireless_mode ath9k_hw_chan2wmode(struct ath_hal *ah, 86enum wireless_mode ath9k_hw_chan2wmode(struct ath_hal *ah,
87 const struct ath9k_channel *chan) 87 const struct ath9k_channel *chan)
88{ 88{
89 if (IS_CHAN_CCK(chan)) 89 if (IS_CHAN_B(chan))
90 return ATH9K_MODE_11A; 90 return ATH9K_MODE_11B;
91 if (IS_CHAN_G(chan)) 91 if (IS_CHAN_G(chan))
92 return ATH9K_MODE_11G; 92 return ATH9K_MODE_11G;
93
93 return ATH9K_MODE_11A; 94 return ATH9K_MODE_11A;
94} 95}
95 96
@@ -909,7 +910,7 @@ static void ath9k_hw_init_bb(struct ath_hal *ah,
909 u32 synthDelay; 910 u32 synthDelay;
910 911
911 synthDelay = REG_READ(ah, AR_PHY_RX_DELAY) & AR_PHY_RX_DELAY_DELAY; 912 synthDelay = REG_READ(ah, AR_PHY_RX_DELAY) & AR_PHY_RX_DELAY_DELAY;
912 if (IS_CHAN_CCK(chan)) 913 if (IS_CHAN_B(chan))
913 synthDelay = (4 * synthDelay) / 22; 914 synthDelay = (4 * synthDelay) / 22;
914 else 915 else
915 synthDelay /= 10; 916 synthDelay /= 10;
@@ -1647,7 +1648,7 @@ static struct ath9k_channel *ath9k_hw_check_chan(struct ath_hal *ah,
1647 } 1648 }
1648 1649
1649 if (!IS_CHAN_OFDM(chan) && 1650 if (!IS_CHAN_OFDM(chan) &&
1650 !IS_CHAN_CCK(chan) && 1651 !IS_CHAN_B(chan) &&
1651 !IS_CHAN_HT20(chan) && 1652 !IS_CHAN_HT20(chan) &&
1652 !IS_CHAN_HT40(chan)) { 1653 !IS_CHAN_HT40(chan)) {
1653 DPRINTF(ah->ah_sc, ATH_DBG_CHANNEL, 1654 DPRINTF(ah->ah_sc, ATH_DBG_CHANNEL,
@@ -1711,7 +1712,7 @@ static bool ath9k_hw_channel_change(struct ath_hal *ah,
1711 } 1712 }
1712 1713
1713 synthDelay = REG_READ(ah, AR_PHY_RX_DELAY) & AR_PHY_RX_DELAY_DELAY; 1714 synthDelay = REG_READ(ah, AR_PHY_RX_DELAY) & AR_PHY_RX_DELAY_DELAY;
1714 if (IS_CHAN_CCK(chan)) 1715 if (IS_CHAN_B(chan))
1715 synthDelay = (4 * synthDelay) / 22; 1716 synthDelay = (4 * synthDelay) / 22;
1716 else 1717 else
1717 synthDelay /= 10; 1718 synthDelay /= 10;