diff options
| author | Christian Lamparter <chunkeey@googlemail.com> | 2011-06-30 14:27:47 -0400 |
|---|---|---|
| committer | John W. Linville <linville@tuxdriver.com> | 2011-07-05 15:26:51 -0400 |
| commit | 85ee5122abbc1b5c5f3622e46942291a2f6f1261 (patch) | |
| tree | 12a0b33c25255957a1cb0421bf7e3a1614769057 /drivers/net/wireless/ath/carl9170/hw.h | |
| parent | 3b4670ffe7824d1fc4db2f73101015056ecb4415 (diff) | |
carl9170: import 1.9.4 firmware headers
This patch imports all shared header changes
from carl9170fw.git.
* update copyright boilerplate
* add some more strategic __aligned(4).
* WoWLAN
Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath/carl9170/hw.h')
| -rw-r--r-- | drivers/net/wireless/ath/carl9170/hw.h | 15 |
1 files changed, 13 insertions, 2 deletions
diff --git a/drivers/net/wireless/ath/carl9170/hw.h b/drivers/net/wireless/ath/carl9170/hw.h index 4e30762dd903..261f89351070 100644 --- a/drivers/net/wireless/ath/carl9170/hw.h +++ b/drivers/net/wireless/ath/carl9170/hw.h | |||
| @@ -4,7 +4,7 @@ | |||
| 4 | * Register map, hardware-specific definitions | 4 | * Register map, hardware-specific definitions |
| 5 | * | 5 | * |
| 6 | * Copyright 2008, Johannes Berg <johannes@sipsolutions.net> | 6 | * Copyright 2008, Johannes Berg <johannes@sipsolutions.net> |
| 7 | * Copyright 2009, 2010, Christian Lamparter <chunkeey@googlemail.com> | 7 | * Copyright 2009-2011 Christian Lamparter <chunkeey@googlemail.com> |
| 8 | * | 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify | 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of the GNU General Public License as published by | 10 | * it under the terms of the GNU General Public License as published by |
| @@ -357,7 +357,18 @@ | |||
| 357 | 357 | ||
| 358 | #define AR9170_MAC_REG_DMA_WLAN_STATUS (AR9170_MAC_REG_BASE + 0xd38) | 358 | #define AR9170_MAC_REG_DMA_WLAN_STATUS (AR9170_MAC_REG_BASE + 0xd38) |
| 359 | #define AR9170_MAC_REG_DMA_STATUS (AR9170_MAC_REG_BASE + 0xd3c) | 359 | #define AR9170_MAC_REG_DMA_STATUS (AR9170_MAC_REG_BASE + 0xd3c) |
| 360 | 360 | #define AR9170_MAC_REG_DMA_TXQ_LAST_ADDR (AR9170_MAC_REG_BASE + 0xd40) | |
| 361 | #define AR9170_MAC_REG_DMA_TXQ0_LAST_ADDR (AR9170_MAC_REG_BASE + 0xd40) | ||
| 362 | #define AR9170_MAC_REG_DMA_TXQ1_LAST_ADDR (AR9170_MAC_REG_BASE + 0xd44) | ||
| 363 | #define AR9170_MAC_REG_DMA_TXQ2_LAST_ADDR (AR9170_MAC_REG_BASE + 0xd48) | ||
| 364 | #define AR9170_MAC_REG_DMA_TXQ3_LAST_ADDR (AR9170_MAC_REG_BASE + 0xd4c) | ||
| 365 | #define AR9170_MAC_REG_DMA_TXQ4_LAST_ADDR (AR9170_MAC_REG_BASE + 0xd50) | ||
| 366 | #define AR9170_MAC_REG_DMA_TXQ0Q1_LEN (AR9170_MAC_REG_BASE + 0xd54) | ||
| 367 | #define AR9170_MAC_REG_DMA_TXQ2Q3_LEN (AR9170_MAC_REG_BASE + 0xd58) | ||
| 368 | #define AR9170_MAC_REG_DMA_TXQ4_LEN (AR9170_MAC_REG_BASE + 0xd5c) | ||
| 369 | |||
| 370 | #define AR9170_MAC_REG_DMA_TXQX_LAST_ADDR (AR9170_MAC_REG_BASE + 0xd74) | ||
| 371 | #define AR9170_MAC_REG_DMA_TXQX_FAIL_ADDR (AR9170_MAC_REG_BASE + 0xd78) | ||
| 361 | #define AR9170_MAC_REG_TXRX_MPI (AR9170_MAC_REG_BASE + 0xd7c) | 372 | #define AR9170_MAC_REG_TXRX_MPI (AR9170_MAC_REG_BASE + 0xd7c) |
| 362 | #define AR9170_MAC_TXRX_MPI_TX_MPI_MASK 0x0000000f | 373 | #define AR9170_MAC_TXRX_MPI_TX_MPI_MASK 0x0000000f |
| 363 | #define AR9170_MAC_TXRX_MPI_TX_TO_MASK 0x0000fff0 | 374 | #define AR9170_MAC_TXRX_MPI_TX_TO_MASK 0x0000fff0 |