ath9k: tx queue enable is read only for EDMA chipsets

for EDMA chip AR_Q_TXE (tx enable for each queue) is read only

Signed-off-by: Mohammed Shafi Shajakhan <mohammed@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>

1 files changed, 5 insertions, 2 deletions

diff --git a/drivers/net/wireless/ath/ath9k/beacon.c b/drivers/net/wireless/ath/ath9k/beacon.c
index dc5fd569690f..b8967e482e6e 100644
--- a/drivers/net/wireless/ath/ath9k/beacon.c
+++ b/drivers/net/wireless/ath/ath9k/beacon.c
@@ -356,6 +356,7 @@ void ath_beacon_tasklet(unsigned long data)
         struct ath_buf *bf = NULL;
         struct ieee80211_vif *vif;
         struct ath_tx_status ts;
+        bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
         int slot;
         u32 bfaddr, bc = 0;
 
@@ -456,10 +457,12 @@ void ath_beacon_tasklet(unsigned long data)
         if (bfaddr != 0) {
                 /* NB: cabq traffic should already be queued and primed */
                 ath9k_hw_puttxbuf(ah, sc->beacon.beaconq, bfaddr);
-                ath9k_hw_txstart(ah, sc->beacon.beaconq);
+
+                if (!edma)
+                        ath9k_hw_txstart(ah, sc->beacon.beaconq);
 
                 sc->beacon.ast_be_xmit += bc;     /* XXX per-vif? */
-                if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
+                if (edma) {
                         spin_lock_bh(&sc->sc_pcu_lock);
                         ath9k_hw_txprocdesc(ah, bf->bf_desc, (void *)&ts);
                         spin_unlock_bh(&sc->sc_pcu_lock);