aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/net/wireless/ath/ath9k
diff options
context:
space:
mode:
authorSujith Manoharan <c_manoha@qca.qualcomm.com>2015-03-14 01:57:51 -0400
committerKalle Valo <kvalo@codeaurora.org>2015-03-20 02:27:21 -0400
commit716eed4c0dfb6a7ceeb61730506e43f2755f322b (patch)
treef05e2cf0a76668b3a25af8c9059c3963513a5aa4 /drivers/net/wireless/ath/ath9k
parentb6ab9ae2eed84eef622d56e00925c68e0c56239e (diff)
ath9k: Finish AIC calibration
Set the appropriate bits in the HW after AIC calibration is done. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Diffstat (limited to 'drivers/net/wireless/ath/ath9k')
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9003_aic.c78
1 files changed, 77 insertions, 1 deletions
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_aic.c b/drivers/net/wireless/ath/ath9k/ar9003_aic.c
index c2cfac3bb528..00aaf4dd90e7 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_aic.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_aic.c
@@ -186,15 +186,91 @@ static void ar9003_aic_cal_start(struct ath_hw *ah, u8 min_valid_count)
186 aic->aic_cal_state = AIC_CAL_STATE_STARTED; 186 aic->aic_cal_state = AIC_CAL_STATE_STARTED;
187} 187}
188 188
189static void ar9003_aic_cal_done(struct ath_hw *ah)
190{
191 /* Disable AIC reference signal in BT modem. */
192 REG_WRITE(ah, ATH_AIC_BT_JUPITER_CTRL,
193 (REG_READ(ah, ATH_AIC_BT_JUPITER_CTRL) &
194 ~ATH_AIC_BT_AIC_ENABLE));
195}
196
197static u8 ar9003_aic_cal_continue(struct ath_hw *ah, bool cal_once)
198{
199 struct ath_common *common = ath9k_hw_common(ah);
200 struct ath9k_hw_mci *mci_hw = &ah->btcoex_hw.mci;
201 struct ath9k_hw_aic *aic = &ah->btcoex_hw.aic;
202 int i, num_chan;
203
204 num_chan = MS(mci_hw->config, ATH_MCI_CONFIG_AIC_CAL_NUM_CHAN);
205
206 if (!num_chan) {
207 aic->aic_cal_state = AIC_CAL_STATE_ERROR;
208 return aic->aic_cal_state;
209 }
210
211 if (cal_once) {
212 for (i = 0; i < 10000; i++) {
213 if ((REG_READ(ah, AR_PHY_AIC_CTRL_0_B1) &
214 AR_PHY_AIC_CAL_ENABLE) == 0)
215 break;
216
217 udelay(100);
218 }
219 }
220
221 /*
222 * Use AR_PHY_AIC_CAL_ENABLE bit instead of AR_PHY_AIC_CAL_DONE.
223 * Sometimes CAL_DONE bit is not asserted.
224 */
225 if ((REG_READ(ah, AR_PHY_AIC_CTRL_0_B1) &
226 AR_PHY_AIC_CAL_ENABLE) != 0) {
227 ath_dbg(common, MCI, "AIC cal is not done after 40ms");
228 goto exit;
229 }
230
231 REG_WRITE(ah, AR_PHY_AIC_SRAM_ADDR_B1,
232 (ATH_AIC_SRAM_CAL_OFFSET | ATH_AIC_SRAM_AUTO_INCREMENT));
233
234 for (i = 0; i < ATH_AIC_MAX_BT_CHANNEL; i++) {
235 u32 value;
236
237 value = REG_READ(ah, AR_PHY_AIC_SRAM_DATA_B1);
238
239 if (value & 0x01) {
240 if (aic->aic_sram[i] == 0)
241 aic->aic_caled_chan++;
242
243 aic->aic_sram[i] = value;
244
245 if (!cal_once)
246 break;
247 }
248 }
249
250 if ((aic->aic_caled_chan >= num_chan) || cal_once) {
251 ar9003_aic_cal_done(ah);
252 } else {
253 /* Start calibration */
254 REG_CLR_BIT(ah, AR_PHY_AIC_CTRL_0_B1, AR_PHY_AIC_CAL_ENABLE);
255 REG_SET_BIT(ah, AR_PHY_AIC_CTRL_0_B1,
256 AR_PHY_AIC_CAL_CH_VALID_RESET);
257 REG_SET_BIT(ah, AR_PHY_AIC_CTRL_0_B1, AR_PHY_AIC_CAL_ENABLE);
258 }
259exit:
260 return aic->aic_cal_state;
261
262}
263
189u8 ar9003_aic_calibration_single(struct ath_hw *ah) 264u8 ar9003_aic_calibration_single(struct ath_hw *ah)
190{ 265{
191 struct ath9k_hw_mci *mci_hw = &ah->btcoex_hw.mci; 266 struct ath9k_hw_mci *mci_hw = &ah->btcoex_hw.mci;
192 u8 cal_ret = 0; 267 u8 cal_ret;
193 int num_chan; 268 int num_chan;
194 269
195 num_chan = MS(mci_hw->config, ATH_MCI_CONFIG_AIC_CAL_NUM_CHAN); 270 num_chan = MS(mci_hw->config, ATH_MCI_CONFIG_AIC_CAL_NUM_CHAN);
196 271
197 ar9003_aic_cal_start(ah, num_chan); 272 ar9003_aic_cal_start(ah, num_chan);
273 cal_ret = ar9003_aic_cal_continue(ah, true);
198 274
199 return cal_ret; 275 return cal_ret;
200} 276}