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authorRajkumar Manoharan <rmanoharan@atheros.com>2011-05-04 10:07:17 -0400
committerJohn W. Linville <linville@tuxdriver.com>2011-05-05 14:59:20 -0400
commit28ef6450f0182f95c4f50aaa0ab2043a09c72b0a (patch)
tree0696797b7d38136c0dacc9544fbf354a9432a5be /drivers/net/wireless/ath/ath9k
parenteecc48000afe2ca6da22122d553b7cad294e42fc (diff)
ath9k_hw: do noise floor calibration only on required chains
At present the noise floor calibration is processed in supported control and extension chains rather than required chains. Unnccesarily doing nfcal in all supported chains leads to invalid nf readings on extn chains and these invalid values got updated into history buffer. While loading those values from history buffer is moving the chip to deaf state. This issue was observed in AR9002/AR9003 chips while doing associate/dissociate in HT40 mode and interface up/down in iterative manner. After some iterations, the chip was moved to deaf state. Somehow the pci devices are recovered by poll work after chip reset. Raading the nf values in all supported extension chains when the hw is not yet configured in HT40 mode results invalid values. Cc: stable@kernel.org Signed-off-by: Rajkumar Manoharan <rmanoharan@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath/ath9k')
-rw-r--r--drivers/net/wireless/ath/ath9k/calib.c13
1 files changed, 13 insertions, 0 deletions
diff --git a/drivers/net/wireless/ath/ath9k/calib.c b/drivers/net/wireless/ath/ath9k/calib.c
index 8649581fa4dd..fe3c10e6b276 100644
--- a/drivers/net/wireless/ath/ath9k/calib.c
+++ b/drivers/net/wireless/ath/ath9k/calib.c
@@ -69,15 +69,21 @@ static void ath9k_hw_update_nfcal_hist_buffer(struct ath_hw *ah,
69 int16_t *nfarray) 69 int16_t *nfarray)
70{ 70{
71 struct ath_common *common = ath9k_hw_common(ah); 71 struct ath_common *common = ath9k_hw_common(ah);
72 struct ieee80211_conf *conf = &common->hw->conf;
72 struct ath_nf_limits *limit; 73 struct ath_nf_limits *limit;
73 struct ath9k_nfcal_hist *h; 74 struct ath9k_nfcal_hist *h;
74 bool high_nf_mid = false; 75 bool high_nf_mid = false;
76 u8 chainmask = (ah->rxchainmask << 3) | ah->rxchainmask;
75 int i; 77 int i;
76 78
77 h = cal->nfCalHist; 79 h = cal->nfCalHist;
78 limit = ath9k_hw_get_nf_limits(ah, ah->curchan); 80 limit = ath9k_hw_get_nf_limits(ah, ah->curchan);
79 81
80 for (i = 0; i < NUM_NF_READINGS; i++) { 82 for (i = 0; i < NUM_NF_READINGS; i++) {
83 if (!(chainmask & (1 << i)) ||
84 ((i >= AR5416_MAX_CHAINS) && !conf_is_ht40(conf)))
85 continue;
86
81 h[i].nfCalBuffer[h[i].currIndex] = nfarray[i]; 87 h[i].nfCalBuffer[h[i].currIndex] = nfarray[i];
82 88
83 if (++h[i].currIndex >= ATH9K_NF_CAL_HIST_MAX) 89 if (++h[i].currIndex >= ATH9K_NF_CAL_HIST_MAX)
@@ -225,6 +231,7 @@ void ath9k_hw_loadnf(struct ath_hw *ah, struct ath9k_channel *chan)
225 int32_t val; 231 int32_t val;
226 u8 chainmask = (ah->rxchainmask << 3) | ah->rxchainmask; 232 u8 chainmask = (ah->rxchainmask << 3) | ah->rxchainmask;
227 struct ath_common *common = ath9k_hw_common(ah); 233 struct ath_common *common = ath9k_hw_common(ah);
234 struct ieee80211_conf *conf = &common->hw->conf;
228 s16 default_nf = ath9k_hw_get_default_nf(ah, chan); 235 s16 default_nf = ath9k_hw_get_default_nf(ah, chan);
229 236
230 if (ah->caldata) 237 if (ah->caldata)
@@ -234,6 +241,9 @@ void ath9k_hw_loadnf(struct ath_hw *ah, struct ath9k_channel *chan)
234 if (chainmask & (1 << i)) { 241 if (chainmask & (1 << i)) {
235 s16 nfval; 242 s16 nfval;
236 243
244 if ((i >= AR5416_MAX_CHAINS) && !conf_is_ht40(conf))
245 continue;
246
237 if (h) 247 if (h)
238 nfval = h[i].privNF; 248 nfval = h[i].privNF;
239 else 249 else
@@ -293,6 +303,9 @@ void ath9k_hw_loadnf(struct ath_hw *ah, struct ath9k_channel *chan)
293 ENABLE_REGWRITE_BUFFER(ah); 303 ENABLE_REGWRITE_BUFFER(ah);
294 for (i = 0; i < NUM_NF_READINGS; i++) { 304 for (i = 0; i < NUM_NF_READINGS; i++) {
295 if (chainmask & (1 << i)) { 305 if (chainmask & (1 << i)) {
306 if ((i >= AR5416_MAX_CHAINS) && !conf_is_ht40(conf))
307 continue;
308
296 val = REG_READ(ah, ah->nf_regs[i]); 309 val = REG_READ(ah, ah->nf_regs[i]);
297 val &= 0xFFFFFE00; 310 val &= 0xFFFFFE00;
298 val |= (((u32) (-50) << 1) & 0x1ff); 311 val |= (((u32) (-50) << 1) & 0x1ff);