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authorLuis R. Rodriguez <lrodriguez@atheros.com>2009-10-19 02:33:46 -0400
committerJohn W. Linville <linville@tuxdriver.com>2009-10-30 16:50:38 -0400
commitddcd4c08188dc512ceb08bcc3f4f830c2dbfb5ce (patch)
treee8dceaeb41d67a1650caaa28db14c1852da70d6c /drivers/net/wireless/ath/ath9k/phy.c
parenta77658286105c8be3741305c5dcf4c319746817f (diff)
ath9k_hw: make ath9k_phy_modify_rx_buffer() static
To do this we reorder callers in order in which they are called. Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath/ath9k/phy.c')
-rw-r--r--drivers/net/wireless/ath/ath9k/phy.c256
1 files changed, 126 insertions, 130 deletions
diff --git a/drivers/net/wireless/ath/ath9k/phy.c b/drivers/net/wireless/ath/ath9k/phy.c
index df55e28a6560..13ab4d7eb7aa 100644
--- a/drivers/net/wireless/ath/ath9k/phy.c
+++ b/drivers/net/wireless/ath/ath9k/phy.c
@@ -41,10 +41,6 @@
41 41
42#include "hw.h" 42#include "hw.h"
43 43
44static void ath9k_phy_modify_rx_buffer(u32 *rfBuf, u32 reg32,
45 u32 numBits, u32 firstBit,
46 u32 column);
47
48/** 44/**
49 * ath9k_hw_write_regs - ?? 45 * ath9k_hw_write_regs - ??
50 * 46 *
@@ -433,6 +429,43 @@ void ath9k_hw_9280_spur_mitigate(struct ath_hw *ah, struct ath9k_channel *chan)
433 429
434/* All code below is for non single-chip solutions */ 430/* All code below is for non single-chip solutions */
435 431
432/**
433 * ath9k_phy_modify_rx_buffer() - perform analog swizzling of parameters
434 * @rfbuf:
435 * @reg32:
436 * @numBits:
437 * @firstBit:
438 * @column:
439 *
440 * Performs analog "swizzling" of parameters into their location.
441 * Used on external AR2133/AR5133 radios.
442 */
443static void ath9k_phy_modify_rx_buffer(u32 *rfBuf, u32 reg32,
444 u32 numBits, u32 firstBit,
445 u32 column)
446{
447 u32 tmp32, mask, arrayEntry, lastBit;
448 int32_t bitPosition, bitsLeft;
449
450 tmp32 = ath9k_hw_reverse_bits(reg32, numBits);
451 arrayEntry = (firstBit - 1) / 8;
452 bitPosition = (firstBit - 1) % 8;
453 bitsLeft = numBits;
454 while (bitsLeft > 0) {
455 lastBit = (bitPosition + bitsLeft > 8) ?
456 8 : bitPosition + bitsLeft;
457 mask = (((1 << lastBit) - 1) ^ ((1 << bitPosition) - 1)) <<
458 (column * 8);
459 rfBuf[arrayEntry] &= ~mask;
460 rfBuf[arrayEntry] |= ((tmp32 << bitPosition) <<
461 (column * 8)) & mask;
462 bitsLeft -= 8 - bitPosition;
463 tmp32 = tmp32 >> (8 - bitPosition);
464 bitPosition = 0;
465 arrayEntry++;
466 }
467}
468
436/* 469/*
437 * Fix on 2.4 GHz band for orientation sensitivity issue by increasing 470 * Fix on 2.4 GHz band for orientation sensitivity issue by increasing
438 * rf_pwd_icsyndiv. 471 * rf_pwd_icsyndiv.
@@ -495,6 +528,95 @@ static void ath9k_hw_force_bias(struct ath_hw *ah, u16 synth_freq)
495} 528}
496 529
497/** 530/**
531 * ath9k_hw_decrease_chain_power()
532 *
533 * @ah: atheros hardware structure
534 * @chan:
535 *
536 * Only used on the AR5416 and AR5418 with the external AR2133/AR5133 radios.
537 *
538 * Sets a chain internal RF path to the lowest output power. Any
539 * further writes to bank6 after this setting will override these
540 * changes. Thus this function must be the last function in the
541 * sequence to modify bank 6.
542 *
543 * This function must be called after ar5416SetRfRegs() which is
544 * called from ath9k_hw_process_ini() due to swizzling of bank 6.
545 * Depends on ah->analogBank6Data being initialized by
546 * ath9k_hw_set_rf_regs()
547 *
548 * Additional additive reduction in power -
549 * change chain's switch table so chain's tx state is actually the rx
550 * state value. May produce different results in 2GHz/5GHz as well as
551 * board to board but in general should be a reduction.
552 *
553 * Activated by #ifdef ALTER_SWITCH. Not tried yet. If so, must be
554 * called after ah->eep_ops->set_board_values() due to RMW of
555 * PHY_SWITCH_CHAIN_0.
556 */
557void ath9k_hw_decrease_chain_power(struct ath_hw *ah,
558 struct ath9k_channel *chan)
559{
560 int i, regWrites = 0;
561 u32 bank6SelMask;
562 u32 *bank6Temp = ah->bank6Temp;
563
564 BUG_ON(AR_SREV_9280_10_OR_LATER(ah));
565
566 switch (ah->config.diversity_control) {
567 case ATH9K_ANT_FIXED_A:
568 bank6SelMask =
569 (ah->config.antenna_switch_swap & ANTSWAP_AB) ?
570 REDUCE_CHAIN_0 : /* swapped, reduce chain 0 */
571 REDUCE_CHAIN_1; /* normal, select chain 1/2 to reduce */
572 break;
573 case ATH9K_ANT_FIXED_B:
574 bank6SelMask =
575 (ah->config.antenna_switch_swap & ANTSWAP_AB) ?
576 REDUCE_CHAIN_1 : /* swapped, reduce chain 1/2 */
577 REDUCE_CHAIN_0; /* normal, select chain 0 to reduce */
578 break;
579 case ATH9K_ANT_VARIABLE:
580 return; /* do not change anything */
581 break;
582 default:
583 return; /* do not change anything */
584 break;
585 }
586
587 for (i = 0; i < ah->iniBank6.ia_rows; i++)
588 bank6Temp[i] = ah->analogBank6Data[i];
589
590 /* Write Bank 5 to switch Bank 6 write to selected chain only */
591 REG_WRITE(ah, AR_PHY_BASE + 0xD8, bank6SelMask);
592
593 /*
594 * Modify Bank6 selected chain to use lowest amplification.
595 * Modifies the parameters to a value of 1.
596 * Depends on existing bank 6 values to be cached in
597 * ah->analogBank6Data
598 */
599 ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 189, 0);
600 ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 190, 0);
601 ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 191, 0);
602 ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 192, 0);
603 ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 193, 0);
604 ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 222, 0);
605 ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 245, 0);
606 ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 246, 0);
607 ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 247, 0);
608
609 REG_WRITE_RF_ARRAY(&ah->iniBank6, bank6Temp, regWrites);
610
611 REG_WRITE(ah, AR_PHY_BASE + 0xD8, 0x00000053);
612#ifdef ALTER_SWITCH
613 REG_WRITE(ah, PHY_SWITCH_CHAIN_0,
614 (REG_READ(ah, PHY_SWITCH_CHAIN_0) & ~0x38)
615 | ((REG_READ(ah, PHY_SWITCH_CHAIN_0) >> 3) & 0x38));
616#endif
617}
618
619/**
498 * ath9k_hw_set_channel - tune to a channel on the external AR2133/AR5133 radios 620 * ath9k_hw_set_channel - tune to a channel on the external AR2133/AR5133 radios
499 * @ah: atheros hardware stucture 621 * @ah: atheros hardware stucture
500 * @chan: 622 * @chan:
@@ -853,43 +975,6 @@ ath9k_hw_rf_free_ext_banks(struct ath_hw *ah)
853#undef ATH_FREE_BANK 975#undef ATH_FREE_BANK
854} 976}
855 977
856/**
857 * ath9k_phy_modify_rx_buffer() - perform analog swizzling of parameters
858 * @rfbuf:
859 * @reg32:
860 * @numBits:
861 * @firstBit:
862 * @column:
863 *
864 * Performs analog "swizzling" of parameters into their location.
865 * Used on external AR2133/AR5133 radios.
866 */
867static void ath9k_phy_modify_rx_buffer(u32 *rfBuf, u32 reg32,
868 u32 numBits, u32 firstBit,
869 u32 column)
870{
871 u32 tmp32, mask, arrayEntry, lastBit;
872 int32_t bitPosition, bitsLeft;
873
874 tmp32 = ath9k_hw_reverse_bits(reg32, numBits);
875 arrayEntry = (firstBit - 1) / 8;
876 bitPosition = (firstBit - 1) % 8;
877 bitsLeft = numBits;
878 while (bitsLeft > 0) {
879 lastBit = (bitPosition + bitsLeft > 8) ?
880 8 : bitPosition + bitsLeft;
881 mask = (((1 << lastBit) - 1) ^ ((1 << bitPosition) - 1)) <<
882 (column * 8);
883 rfBuf[arrayEntry] &= ~mask;
884 rfBuf[arrayEntry] |= ((tmp32 << bitPosition) <<
885 (column * 8)) & mask;
886 bitsLeft -= 8 - bitPosition;
887 tmp32 = tmp32 >> (8 - bitPosition);
888 bitPosition = 0;
889 arrayEntry++;
890 }
891}
892
893/* * 978/* *
894 * ath9k_hw_set_rf_regs - programs rf registers based on EEPROM 979 * ath9k_hw_set_rf_regs - programs rf registers based on EEPROM
895 * @ah: atheros hardware structure 980 * @ah: atheros hardware structure
@@ -979,92 +1064,3 @@ bool ath9k_hw_set_rf_regs(struct ath_hw *ah, struct ath9k_channel *chan,
979 1064
980 return true; 1065 return true;
981} 1066}
982
983/**
984 * ath9k_hw_decrease_chain_power()
985 *
986 * @ah: atheros hardware structure
987 * @chan:
988 *
989 * Only used on the AR5416 and AR5418 with the external AR2133/AR5133 radios.
990 *
991 * Sets a chain internal RF path to the lowest output power. Any
992 * further writes to bank6 after this setting will override these
993 * changes. Thus this function must be the last function in the
994 * sequence to modify bank 6.
995 *
996 * This function must be called after ar5416SetRfRegs() which is
997 * called from ath9k_hw_process_ini() due to swizzling of bank 6.
998 * Depends on ah->analogBank6Data being initialized by
999 * ath9k_hw_set_rf_regs()
1000 *
1001 * Additional additive reduction in power -
1002 * change chain's switch table so chain's tx state is actually the rx
1003 * state value. May produce different results in 2GHz/5GHz as well as
1004 * board to board but in general should be a reduction.
1005 *
1006 * Activated by #ifdef ALTER_SWITCH. Not tried yet. If so, must be
1007 * called after ah->eep_ops->set_board_values() due to RMW of
1008 * PHY_SWITCH_CHAIN_0.
1009 */
1010void
1011ath9k_hw_decrease_chain_power(struct ath_hw *ah, struct ath9k_channel *chan)
1012{
1013 int i, regWrites = 0;
1014 u32 bank6SelMask;
1015 u32 *bank6Temp = ah->bank6Temp;
1016
1017 BUG_ON(AR_SREV_9280_10_OR_LATER(ah));
1018
1019 switch (ah->config.diversity_control) {
1020 case ATH9K_ANT_FIXED_A:
1021 bank6SelMask =
1022 (ah->config.antenna_switch_swap & ANTSWAP_AB) ?
1023 REDUCE_CHAIN_0 : /* swapped, reduce chain 0 */
1024 REDUCE_CHAIN_1; /* normal, select chain 1/2 to reduce */
1025 break;
1026 case ATH9K_ANT_FIXED_B:
1027 bank6SelMask =
1028 (ah->config.antenna_switch_swap & ANTSWAP_AB) ?
1029 REDUCE_CHAIN_1 : /* swapped, reduce chain 1/2 */
1030 REDUCE_CHAIN_0; /* normal, select chain 0 to reduce */
1031 break;
1032 case ATH9K_ANT_VARIABLE:
1033 return; /* do not change anything */
1034 break;
1035 default:
1036 return; /* do not change anything */
1037 break;
1038 }
1039
1040 for (i = 0; i < ah->iniBank6.ia_rows; i++)
1041 bank6Temp[i] = ah->analogBank6Data[i];
1042
1043 /* Write Bank 5 to switch Bank 6 write to selected chain only */
1044 REG_WRITE(ah, AR_PHY_BASE + 0xD8, bank6SelMask);
1045
1046 /*
1047 * Modify Bank6 selected chain to use lowest amplification.
1048 * Modifies the parameters to a value of 1.
1049 * Depends on existing bank 6 values to be cached in
1050 * ah->analogBank6Data
1051 */
1052 ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 189, 0);
1053 ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 190, 0);
1054 ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 191, 0);
1055 ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 192, 0);
1056 ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 193, 0);
1057 ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 222, 0);
1058 ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 245, 0);
1059 ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 246, 0);
1060 ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 247, 0);
1061
1062 REG_WRITE_RF_ARRAY(&ah->iniBank6, bank6Temp, regWrites);
1063
1064 REG_WRITE(ah, AR_PHY_BASE + 0xD8, 0x00000053);
1065#ifdef ALTER_SWITCH
1066 REG_WRITE(ah, PHY_SWITCH_CHAIN_0,
1067 (REG_READ(ah, PHY_SWITCH_CHAIN_0) & ~0x38)
1068 | ((REG_READ(ah, PHY_SWITCH_CHAIN_0) >> 3) & 0x38));
1069#endif
1070}