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authorLuis R. Rodriguez <lrodriguez@atheros.com>2009-10-19 02:33:40 -0400
committerJohn W. Linville <linville@tuxdriver.com>2009-10-30 16:50:37 -0400
commit0a3b7bac673ee9462f5defe808609746d27af50d (patch)
tree5bb366282dc49d28406dc2a8e5afb45c2df2f5c0 /drivers/net/wireless/ath/ath9k/phy.c
parentdc51dd503953a8bed545d10eb89fb3340a98879b (diff)
ath9k_hw: make both analog channel change routines return int
This allows us to later define a callback for both. Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath/ath9k/phy.c')
-rw-r--r--drivers/net/wireless/ath/ath9k/phy.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/drivers/net/wireless/ath/ath9k/phy.c b/drivers/net/wireless/ath/ath9k/phy.c
index d50b5ff28b38..bfcb9af4ae3c 100644
--- a/drivers/net/wireless/ath/ath9k/phy.c
+++ b/drivers/net/wireless/ath/ath9k/phy.c
@@ -68,8 +68,7 @@ ath9k_hw_write_regs(struct ath_hw *ah, u32 modesIndex, u32 freqIndex,
68 * the channel value. Assumes writes enabled to analog bus and bank6 register 68 * the channel value. Assumes writes enabled to analog bus and bank6 register
69 * cache in ah->analogBank6Data. 69 * cache in ah->analogBank6Data.
70 */ 70 */
71bool 71int ath9k_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
72ath9k_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
73{ 72{
74 struct ath_common *common = ath9k_hw_common(ah); 73 struct ath_common *common = ath9k_hw_common(ah);
75 u32 channelSel = 0; 74 u32 channelSel = 0;
@@ -94,7 +93,7 @@ ath9k_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
94 } else { 93 } else {
95 ath_print(common, ATH_DBG_FATAL, 94 ath_print(common, ATH_DBG_FATAL,
96 "Invalid channel %u MHz\n", freq); 95 "Invalid channel %u MHz\n", freq);
97 return false; 96 return -EINVAL;
98 } 97 }
99 98
100 channelSel = (channelSel << 2) & 0xff; 99 channelSel = (channelSel << 2) & 0xff;
@@ -127,7 +126,7 @@ ath9k_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
127 } else { 126 } else {
128 ath_print(common, ATH_DBG_FATAL, 127 ath_print(common, ATH_DBG_FATAL,
129 "Invalid channel %u MHz\n", freq); 128 "Invalid channel %u MHz\n", freq);
130 return false; 129 return -EINVAL;
131 } 130 }
132 131
133 reg32 = 132 reg32 =
@@ -139,7 +138,7 @@ ath9k_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
139 ah->curchan = chan; 138 ah->curchan = chan;
140 ah->curchan_rad_index = -1; 139 ah->curchan_rad_index = -1;
141 140
142 return true; 141 return 0;
143} 142}
144 143
145/** 144/**
@@ -163,8 +162,7 @@ ath9k_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
163 * Channel Frequency = (3/2) * freq_ref * (chansel[8:0] + chanfrac[16:0]/2^10) 162 * Channel Frequency = (3/2) * freq_ref * (chansel[8:0] + chanfrac[16:0]/2^10)
164 * (freq_ref = 40MHz/(24>>amodeRefSel)) 163 * (freq_ref = 40MHz/(24>>amodeRefSel))
165 */ 164 */
166void ath9k_hw_ar9280_set_channel(struct ath_hw *ah, 165int ath9k_hw_ar9280_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
167 struct ath9k_channel *chan)
168{ 166{
169 u16 bMode, fracMode, aModeRefSel = 0; 167 u16 bMode, fracMode, aModeRefSel = 0;
170 u32 freq, ndiv, channelSel = 0, channelFrac = 0, reg32 = 0; 168 u32 freq, ndiv, channelSel = 0, channelFrac = 0, reg32 = 0;
@@ -252,6 +250,8 @@ void ath9k_hw_ar9280_set_channel(struct ath_hw *ah,
252 250
253 ah->curchan = chan; 251 ah->curchan = chan;
254 ah->curchan_rad_index = -1; 252 ah->curchan_rad_index = -1;
253
254 return 0;
255} 255}
256 256
257/** 257/**