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authorLuis R. Rodriguez <lrodriguez@atheros.com>2010-05-19 16:45:50 -0400
committerJohn W. Linville <linville@tuxdriver.com>2010-06-02 16:13:28 -0400
commitc5395b67437b47c4a4c0686d3db99be9327ef67e (patch)
tree6a382391a51f1899cdb92c63de7d79cf8fa53b41 /drivers/net/wireless/ath/ath9k/hw.h
parent252aa631f88080920a7083ac5a5844ffc5463629 (diff)
ath9k_hw: Enable TX IQ calibration on AR9003
To enable it we now disable and re-enable the PHY chips after TX IQ calibration. Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath/ath9k/hw.h')
-rw-r--r--drivers/net/wireless/ath/ath9k/hw.h1
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h
index ffc9249b02c5..116d1c80aa21 100644
--- a/drivers/net/wireless/ath/ath9k/hw.h
+++ b/drivers/net/wireless/ath/ath9k/hw.h
@@ -263,7 +263,6 @@ struct ath9k_ops_config {
263#define AR_BASE_FREQ_5GHZ 4900 263#define AR_BASE_FREQ_5GHZ 4900
264#define AR_SPUR_FEEQ_BOUND_HT40 19 264#define AR_SPUR_FEEQ_BOUND_HT40 19
265#define AR_SPUR_FEEQ_BOUND_HT20 10 265#define AR_SPUR_FEEQ_BOUND_HT20 10
266 bool tx_iq_calibration; /* Only available for >= AR9003 */
267 int spurmode; 266 int spurmode;
268 u16 spurchans[AR_EEPROM_MODAL_SPURS][2]; 267 u16 spurchans[AR_EEPROM_MODAL_SPURS][2];
269 u8 max_txtrig_level; 268 u8 max_txtrig_level;