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authorFelix Fietkau <nbd@openwrt.org>2011-03-23 15:57:27 -0400
committerJohn W. Linville <linville@tuxdriver.com>2011-03-30 14:15:19 -0400
commita9b6b2569cf107fe541381e82faa0a3c47a9a7fd (patch)
treeddd70da664996e96c554682e2348f60598a41c12 /drivers/net/wireless/ath/ath9k/hw.h
parentca7a4deb4a1a87dbdc6e7cab0d1022a535204226 (diff)
ath9k_hw: turn a few big macros into functions
RF_BANK_SETUP, REG_WRITE_RF_ARRAY and REG_WRITE_ARRAY are way too big, so they shouldn't be inlined at every single callsite, especially since they can easily be turned into real functions. Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath/ath9k/hw.h')
-rw-r--r--drivers/net/wireless/ath/ath9k/hw.h14
1 files changed, 4 insertions, 10 deletions
diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h
index e256658c740a..dafbe97a969c 100644
--- a/drivers/net/wireless/ath/ath9k/hw.h
+++ b/drivers/net/wireless/ath/ath9k/hw.h
@@ -106,16 +106,8 @@
106 udelay(1); \ 106 udelay(1); \
107 } while (0) 107 } while (0)
108 108
109#define REG_WRITE_ARRAY(iniarray, column, regWr) do { \ 109#define REG_WRITE_ARRAY(iniarray, column, regWr) \
110 int r; \ 110 ath9k_hw_write_array(ah, iniarray, column, &(regWr))
111 ENABLE_REGWRITE_BUFFER(ah); \
112 for (r = 0; r < ((iniarray)->ia_rows); r++) { \
113 REG_WRITE(ah, INI_RA((iniarray), (r), 0), \
114 INI_RA((iniarray), r, (column))); \
115 DO_DELAY(regWr); \
116 } \
117 REGWRITE_BUFFER_FLUSH(ah); \
118 } while (0)
119 111
120#define AR_GPIO_OUTPUT_MUX_AS_OUTPUT 0 112#define AR_GPIO_OUTPUT_MUX_AS_OUTPUT 0
121#define AR_GPIO_OUTPUT_MUX_AS_PCIE_ATTENTION_LED 1 113#define AR_GPIO_OUTPUT_MUX_AS_PCIE_ATTENTION_LED 1
@@ -913,6 +905,8 @@ void ath9k_hw_antdiv_comb_conf_set(struct ath_hw *ah,
913 905
914/* General Operation */ 906/* General Operation */
915bool ath9k_hw_wait(struct ath_hw *ah, u32 reg, u32 mask, u32 val, u32 timeout); 907bool ath9k_hw_wait(struct ath_hw *ah, u32 reg, u32 mask, u32 val, u32 timeout);
908void ath9k_hw_write_array(struct ath_hw *ah, struct ar5416IniArray *array,
909 int column, unsigned int *writecnt);
916u32 ath9k_hw_reverse_bits(u32 val, u32 n); 910u32 ath9k_hw_reverse_bits(u32 val, u32 n);
917bool ath9k_get_channel_edges(struct ath_hw *ah, u16 flags, u16 *low, u16 *high); 911bool ath9k_get_channel_edges(struct ath_hw *ah, u16 flags, u16 *low, u16 *high);
918u16 ath9k_hw_computetxtime(struct ath_hw *ah, 912u16 ath9k_hw_computetxtime(struct ath_hw *ah,