diff options
author | Luis R. Rodriguez <lrodriguez@atheros.com> | 2009-08-17 21:07:23 -0400 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2009-08-20 11:36:03 -0400 |
commit | 608b88cb34b0e70a538ee1fc334cc833ef691836 (patch) | |
tree | 6d2a363cea722241581306964da6cff8724b407a /drivers/net/wireless/ath/ath9k/hw.c | |
parent | 4c48381786159ba3f3d8a33d967aeb049341a220 (diff) |
ath: move regulatory info into shared common structure
This moves the shared regulatory structure into the
common structure. We will use this ongoing for common
data.
Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath/ath9k/hw.c')
-rw-r--r-- | drivers/net/wireless/ath/ath9k/hw.c | 53 |
1 files changed, 31 insertions, 22 deletions
diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c index df62113d89d6..4f3d5ea34812 100644 --- a/drivers/net/wireless/ath/ath9k/hw.c +++ b/drivers/net/wireless/ath/ath9k/hw.c | |||
@@ -439,8 +439,13 @@ static void ath9k_hw_init_config(struct ath_hw *ah) | |||
439 | 439 | ||
440 | static void ath9k_hw_init_defaults(struct ath_hw *ah) | 440 | static void ath9k_hw_init_defaults(struct ath_hw *ah) |
441 | { | 441 | { |
442 | struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah); | ||
443 | |||
444 | regulatory->country_code = CTRY_DEFAULT; | ||
445 | regulatory->power_limit = MAX_RATE_POWER; | ||
446 | regulatory->tp_scale = ATH9K_TP_SCALE_MAX; | ||
447 | |||
442 | ah->hw_version.magic = AR5416_MAGIC; | 448 | ah->hw_version.magic = AR5416_MAGIC; |
443 | ah->regulatory.country_code = CTRY_DEFAULT; | ||
444 | ah->hw_version.subvendorid = 0; | 449 | ah->hw_version.subvendorid = 0; |
445 | 450 | ||
446 | ah->ah_flags = 0; | 451 | ah->ah_flags = 0; |
@@ -449,8 +454,6 @@ static void ath9k_hw_init_defaults(struct ath_hw *ah) | |||
449 | if (!AR_SREV_9100(ah)) | 454 | if (!AR_SREV_9100(ah)) |
450 | ah->ah_flags = AH_USE_EEPROM; | 455 | ah->ah_flags = AH_USE_EEPROM; |
451 | 456 | ||
452 | ah->regulatory.power_limit = MAX_RATE_POWER; | ||
453 | ah->regulatory.tp_scale = ATH9K_TP_SCALE_MAX; | ||
454 | ah->atim_window = 0; | 457 | ah->atim_window = 0; |
455 | ah->sta_id1_defaults = AR_STA_ID1_CRPT_MIC_ENABLE; | 458 | ah->sta_id1_defaults = AR_STA_ID1_CRPT_MIC_ENABLE; |
456 | ah->beacon_interval = 100; | 459 | ah->beacon_interval = 100; |
@@ -1368,6 +1371,7 @@ static int ath9k_hw_process_ini(struct ath_hw *ah, | |||
1368 | struct ath9k_channel *chan, | 1371 | struct ath9k_channel *chan, |
1369 | enum ath9k_ht_macmode macmode) | 1372 | enum ath9k_ht_macmode macmode) |
1370 | { | 1373 | { |
1374 | struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah); | ||
1371 | int i, regWrites = 0; | 1375 | int i, regWrites = 0; |
1372 | struct ieee80211_channel *channel = chan->chan; | 1376 | struct ieee80211_channel *channel = chan->chan; |
1373 | u32 modesIndex, freqIndex; | 1377 | u32 modesIndex, freqIndex; |
@@ -1474,11 +1478,11 @@ static int ath9k_hw_process_ini(struct ath_hw *ah, | |||
1474 | ath9k_olc_init(ah); | 1478 | ath9k_olc_init(ah); |
1475 | 1479 | ||
1476 | ah->eep_ops->set_txpower(ah, chan, | 1480 | ah->eep_ops->set_txpower(ah, chan, |
1477 | ath9k_regd_get_ctl(&ah->regulatory, chan), | 1481 | ath9k_regd_get_ctl(regulatory, chan), |
1478 | channel->max_antenna_gain * 2, | 1482 | channel->max_antenna_gain * 2, |
1479 | channel->max_power * 2, | 1483 | channel->max_power * 2, |
1480 | min((u32) MAX_RATE_POWER, | 1484 | min((u32) MAX_RATE_POWER, |
1481 | (u32) ah->regulatory.power_limit)); | 1485 | (u32) regulatory->power_limit)); |
1482 | 1486 | ||
1483 | if (!ath9k_hw_set_rf_regs(ah, chan, freqIndex)) { | 1487 | if (!ath9k_hw_set_rf_regs(ah, chan, freqIndex)) { |
1484 | DPRINTF(ah->ah_sc, ATH_DBG_FATAL, | 1488 | DPRINTF(ah->ah_sc, ATH_DBG_FATAL, |
@@ -1796,6 +1800,7 @@ static bool ath9k_hw_channel_change(struct ath_hw *ah, | |||
1796 | struct ath9k_channel *chan, | 1800 | struct ath9k_channel *chan, |
1797 | enum ath9k_ht_macmode macmode) | 1801 | enum ath9k_ht_macmode macmode) |
1798 | { | 1802 | { |
1803 | struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah); | ||
1799 | struct ieee80211_channel *channel = chan->chan; | 1804 | struct ieee80211_channel *channel = chan->chan; |
1800 | u32 synthDelay, qnum; | 1805 | u32 synthDelay, qnum; |
1801 | 1806 | ||
@@ -1828,11 +1833,11 @@ static bool ath9k_hw_channel_change(struct ath_hw *ah, | |||
1828 | } | 1833 | } |
1829 | 1834 | ||
1830 | ah->eep_ops->set_txpower(ah, chan, | 1835 | ah->eep_ops->set_txpower(ah, chan, |
1831 | ath9k_regd_get_ctl(&ah->regulatory, chan), | 1836 | ath9k_regd_get_ctl(regulatory, chan), |
1832 | channel->max_antenna_gain * 2, | 1837 | channel->max_antenna_gain * 2, |
1833 | channel->max_power * 2, | 1838 | channel->max_power * 2, |
1834 | min((u32) MAX_RATE_POWER, | 1839 | min((u32) MAX_RATE_POWER, |
1835 | (u32) ah->regulatory.power_limit)); | 1840 | (u32) regulatory->power_limit)); |
1836 | 1841 | ||
1837 | synthDelay = REG_READ(ah, AR_PHY_RX_DELAY) & AR_PHY_RX_DELAY_DELAY; | 1842 | synthDelay = REG_READ(ah, AR_PHY_RX_DELAY) & AR_PHY_RX_DELAY_DELAY; |
1838 | if (IS_CHAN_B(chan)) | 1843 | if (IS_CHAN_B(chan)) |
@@ -3480,27 +3485,29 @@ void ath9k_hw_set_sta_beacon_timers(struct ath_hw *ah, | |||
3480 | void ath9k_hw_fill_cap_info(struct ath_hw *ah) | 3485 | void ath9k_hw_fill_cap_info(struct ath_hw *ah) |
3481 | { | 3486 | { |
3482 | struct ath9k_hw_capabilities *pCap = &ah->caps; | 3487 | struct ath9k_hw_capabilities *pCap = &ah->caps; |
3488 | struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah); | ||
3489 | |||
3483 | u16 capField = 0, eeval; | 3490 | u16 capField = 0, eeval; |
3484 | 3491 | ||
3485 | eeval = ah->eep_ops->get_eeprom(ah, EEP_REG_0); | 3492 | eeval = ah->eep_ops->get_eeprom(ah, EEP_REG_0); |
3486 | ah->regulatory.current_rd = eeval; | 3493 | regulatory->current_rd = eeval; |
3487 | 3494 | ||
3488 | eeval = ah->eep_ops->get_eeprom(ah, EEP_REG_1); | 3495 | eeval = ah->eep_ops->get_eeprom(ah, EEP_REG_1); |
3489 | if (AR_SREV_9285_10_OR_LATER(ah)) | 3496 | if (AR_SREV_9285_10_OR_LATER(ah)) |
3490 | eeval |= AR9285_RDEXT_DEFAULT; | 3497 | eeval |= AR9285_RDEXT_DEFAULT; |
3491 | ah->regulatory.current_rd_ext = eeval; | 3498 | regulatory->current_rd_ext = eeval; |
3492 | 3499 | ||
3493 | capField = ah->eep_ops->get_eeprom(ah, EEP_OP_CAP); | 3500 | capField = ah->eep_ops->get_eeprom(ah, EEP_OP_CAP); |
3494 | 3501 | ||
3495 | if (ah->opmode != NL80211_IFTYPE_AP && | 3502 | if (ah->opmode != NL80211_IFTYPE_AP && |
3496 | ah->hw_version.subvendorid == AR_SUBVENDOR_ID_NEW_A) { | 3503 | ah->hw_version.subvendorid == AR_SUBVENDOR_ID_NEW_A) { |
3497 | if (ah->regulatory.current_rd == 0x64 || | 3504 | if (regulatory->current_rd == 0x64 || |
3498 | ah->regulatory.current_rd == 0x65) | 3505 | regulatory->current_rd == 0x65) |
3499 | ah->regulatory.current_rd += 5; | 3506 | regulatory->current_rd += 5; |
3500 | else if (ah->regulatory.current_rd == 0x41) | 3507 | else if (regulatory->current_rd == 0x41) |
3501 | ah->regulatory.current_rd = 0x43; | 3508 | regulatory->current_rd = 0x43; |
3502 | DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY, | 3509 | DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY, |
3503 | "regdomain mapped to 0x%x\n", ah->regulatory.current_rd); | 3510 | "regdomain mapped to 0x%x\n", regulatory->current_rd); |
3504 | } | 3511 | } |
3505 | 3512 | ||
3506 | eeval = ah->eep_ops->get_eeprom(ah, EEP_OP_MODE); | 3513 | eeval = ah->eep_ops->get_eeprom(ah, EEP_OP_MODE); |
@@ -3635,7 +3642,7 @@ void ath9k_hw_fill_cap_info(struct ath_hw *ah) | |||
3635 | else | 3642 | else |
3636 | pCap->hw_caps |= ATH9K_HW_CAP_4KB_SPLITTRANS; | 3643 | pCap->hw_caps |= ATH9K_HW_CAP_4KB_SPLITTRANS; |
3637 | 3644 | ||
3638 | if (ah->regulatory.current_rd_ext & (1 << REG_EXT_JAPAN_MIDBAND)) { | 3645 | if (regulatory->current_rd_ext & (1 << REG_EXT_JAPAN_MIDBAND)) { |
3639 | pCap->reg_cap = | 3646 | pCap->reg_cap = |
3640 | AR_EEPROM_EEREGCAP_EN_KK_NEW_11A | | 3647 | AR_EEPROM_EEREGCAP_EN_KK_NEW_11A | |
3641 | AR_EEPROM_EEREGCAP_EN_KK_U1_EVEN | | 3648 | AR_EEPROM_EEREGCAP_EN_KK_U1_EVEN | |
@@ -3664,6 +3671,7 @@ void ath9k_hw_fill_cap_info(struct ath_hw *ah) | |||
3664 | bool ath9k_hw_getcapability(struct ath_hw *ah, enum ath9k_capability_type type, | 3671 | bool ath9k_hw_getcapability(struct ath_hw *ah, enum ath9k_capability_type type, |
3665 | u32 capability, u32 *result) | 3672 | u32 capability, u32 *result) |
3666 | { | 3673 | { |
3674 | struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah); | ||
3667 | switch (type) { | 3675 | switch (type) { |
3668 | case ATH9K_CAP_CIPHER: | 3676 | case ATH9K_CAP_CIPHER: |
3669 | switch (capability) { | 3677 | switch (capability) { |
@@ -3712,13 +3720,13 @@ bool ath9k_hw_getcapability(struct ath_hw *ah, enum ath9k_capability_type type, | |||
3712 | case 0: | 3720 | case 0: |
3713 | return 0; | 3721 | return 0; |
3714 | case 1: | 3722 | case 1: |
3715 | *result = ah->regulatory.power_limit; | 3723 | *result = regulatory->power_limit; |
3716 | return 0; | 3724 | return 0; |
3717 | case 2: | 3725 | case 2: |
3718 | *result = ah->regulatory.max_power_level; | 3726 | *result = regulatory->max_power_level; |
3719 | return 0; | 3727 | return 0; |
3720 | case 3: | 3728 | case 3: |
3721 | *result = ah->regulatory.tp_scale; | 3729 | *result = regulatory->tp_scale; |
3722 | return 0; | 3730 | return 0; |
3723 | } | 3731 | } |
3724 | return false; | 3732 | return false; |
@@ -3956,17 +3964,18 @@ bool ath9k_hw_disable(struct ath_hw *ah) | |||
3956 | 3964 | ||
3957 | void ath9k_hw_set_txpowerlimit(struct ath_hw *ah, u32 limit) | 3965 | void ath9k_hw_set_txpowerlimit(struct ath_hw *ah, u32 limit) |
3958 | { | 3966 | { |
3967 | struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah); | ||
3959 | struct ath9k_channel *chan = ah->curchan; | 3968 | struct ath9k_channel *chan = ah->curchan; |
3960 | struct ieee80211_channel *channel = chan->chan; | 3969 | struct ieee80211_channel *channel = chan->chan; |
3961 | 3970 | ||
3962 | ah->regulatory.power_limit = min(limit, (u32) MAX_RATE_POWER); | 3971 | regulatory->power_limit = min(limit, (u32) MAX_RATE_POWER); |
3963 | 3972 | ||
3964 | ah->eep_ops->set_txpower(ah, chan, | 3973 | ah->eep_ops->set_txpower(ah, chan, |
3965 | ath9k_regd_get_ctl(&ah->regulatory, chan), | 3974 | ath9k_regd_get_ctl(regulatory, chan), |
3966 | channel->max_antenna_gain * 2, | 3975 | channel->max_antenna_gain * 2, |
3967 | channel->max_power * 2, | 3976 | channel->max_power * 2, |
3968 | min((u32) MAX_RATE_POWER, | 3977 | min((u32) MAX_RATE_POWER, |
3969 | (u32) ah->regulatory.power_limit)); | 3978 | (u32) regulatory->power_limit)); |
3970 | } | 3979 | } |
3971 | 3980 | ||
3972 | void ath9k_hw_setmac(struct ath_hw *ah, const u8 *mac) | 3981 | void ath9k_hw_setmac(struct ath_hw *ah, const u8 *mac) |