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authorLuis R. Rodriguez <lrodriguez@atheros.com>2009-09-07 07:52:26 -0400
committerJohn W. Linville <linville@tuxdriver.com>2009-10-07 16:39:19 -0400
commit4d6b228d84ba992ee13c90312c1ed539191c94b1 (patch)
treee6a0aa0b51f60bbde79d6a8da9490fb1837f4fae /drivers/net/wireless/ath/ath9k/eeprom_def.c
parentd519e17e2d01a0ee9abe083019532061b4438065 (diff)
ath9k: use ath_hw for DPRINTF() and debug init/exit
DPRINTF() is used in hw specific related code, as such ensure we don't rely on the private driver core ath_softc struct when calling it. Drivers can then implement their own DPRINTF() as they see fit. Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath/ath9k/eeprom_def.c')
-rw-r--r--drivers/net/wireless/ath/ath9k/eeprom_def.c24
1 files changed, 12 insertions, 12 deletions
diff --git a/drivers/net/wireless/ath/ath9k/eeprom_def.c b/drivers/net/wireless/ath/ath9k/eeprom_def.c
index 4071fc91da0a..8a7fc3962a16 100644
--- a/drivers/net/wireless/ath/ath9k/eeprom_def.c
+++ b/drivers/net/wireless/ath/ath9k/eeprom_def.c
@@ -95,7 +95,7 @@ static bool ath9k_hw_def_fill_eeprom(struct ath_hw *ah)
95 for (addr = 0; addr < SIZE_EEPROM_DEF; addr++) { 95 for (addr = 0; addr < SIZE_EEPROM_DEF; addr++) {
96 if (!ath9k_hw_nvram_read(ah, addr + ar5416_eep_start_loc, 96 if (!ath9k_hw_nvram_read(ah, addr + ar5416_eep_start_loc,
97 eep_data)) { 97 eep_data)) {
98 DPRINTF(ah->ah_sc, ATH_DBG_FATAL, 98 DPRINTF(ah, ATH_DBG_FATAL,
99 "Unable to read eeprom region\n"); 99 "Unable to read eeprom region\n");
100 return false; 100 return false;
101 } 101 }
@@ -115,12 +115,12 @@ static int ath9k_hw_def_check_eeprom(struct ath_hw *ah)
115 int i, addr, size; 115 int i, addr, size;
116 116
117 if (!ath9k_hw_nvram_read(ah, AR5416_EEPROM_MAGIC_OFFSET, &magic)) { 117 if (!ath9k_hw_nvram_read(ah, AR5416_EEPROM_MAGIC_OFFSET, &magic)) {
118 DPRINTF(ah->ah_sc, ATH_DBG_FATAL, "Reading Magic # failed\n"); 118 DPRINTF(ah, ATH_DBG_FATAL, "Reading Magic # failed\n");
119 return false; 119 return false;
120 } 120 }
121 121
122 if (!ath9k_hw_use_flash(ah)) { 122 if (!ath9k_hw_use_flash(ah)) {
123 DPRINTF(ah->ah_sc, ATH_DBG_EEPROM, 123 DPRINTF(ah, ATH_DBG_EEPROM,
124 "Read Magic = 0x%04X\n", magic); 124 "Read Magic = 0x%04X\n", magic);
125 125
126 if (magic != AR5416_EEPROM_MAGIC) { 126 if (magic != AR5416_EEPROM_MAGIC) {
@@ -137,7 +137,7 @@ static int ath9k_hw_def_check_eeprom(struct ath_hw *ah)
137 eepdata++; 137 eepdata++;
138 } 138 }
139 } else { 139 } else {
140 DPRINTF(ah->ah_sc, ATH_DBG_FATAL, 140 DPRINTF(ah, ATH_DBG_FATAL,
141 "Invalid EEPROM Magic. " 141 "Invalid EEPROM Magic. "
142 "Endianness mismatch.\n"); 142 "Endianness mismatch.\n");
143 return -EINVAL; 143 return -EINVAL;
@@ -145,7 +145,7 @@ static int ath9k_hw_def_check_eeprom(struct ath_hw *ah)
145 } 145 }
146 } 146 }
147 147
148 DPRINTF(ah->ah_sc, ATH_DBG_EEPROM, "need_swap = %s.\n", 148 DPRINTF(ah, ATH_DBG_EEPROM, "need_swap = %s.\n",
149 need_swap ? "True" : "False"); 149 need_swap ? "True" : "False");
150 150
151 if (need_swap) 151 if (need_swap)
@@ -167,7 +167,7 @@ static int ath9k_hw_def_check_eeprom(struct ath_hw *ah)
167 u32 integer, j; 167 u32 integer, j;
168 u16 word; 168 u16 word;
169 169
170 DPRINTF(ah->ah_sc, ATH_DBG_EEPROM, 170 DPRINTF(ah, ATH_DBG_EEPROM,
171 "EEPROM Endianness is not native.. Changing.\n"); 171 "EEPROM Endianness is not native.. Changing.\n");
172 172
173 word = swab16(eep->baseEepHeader.length); 173 word = swab16(eep->baseEepHeader.length);
@@ -214,7 +214,7 @@ static int ath9k_hw_def_check_eeprom(struct ath_hw *ah)
214 214
215 if (sum != 0xffff || ah->eep_ops->get_eeprom_ver(ah) != AR5416_EEP_VER || 215 if (sum != 0xffff || ah->eep_ops->get_eeprom_ver(ah) != AR5416_EEP_VER ||
216 ah->eep_ops->get_eeprom_rev(ah) < AR5416_EEP_NO_BACK_VER) { 216 ah->eep_ops->get_eeprom_rev(ah) < AR5416_EEP_NO_BACK_VER) {
217 DPRINTF(ah->ah_sc, ATH_DBG_FATAL, 217 DPRINTF(ah, ATH_DBG_FATAL,
218 "Bad EEPROM checksum 0x%x or revision 0x%04x\n", 218 "Bad EEPROM checksum 0x%x or revision 0x%04x\n",
219 sum, ah->eep_ops->get_eeprom_ver(ah)); 219 sum, ah->eep_ops->get_eeprom_ver(ah));
220 return -EINVAL; 220 return -EINVAL;
@@ -870,11 +870,11 @@ static void ath9k_hw_set_def_power_cal_table(struct ath_hw *ah,
870 ((pdadcValues[4 * j + 3] & 0xFF) << 24); 870 ((pdadcValues[4 * j + 3] & 0xFF) << 24);
871 REG_WRITE(ah, regOffset, reg32); 871 REG_WRITE(ah, regOffset, reg32);
872 872
873 DPRINTF(ah->ah_sc, ATH_DBG_EEPROM, 873 DPRINTF(ah, ATH_DBG_EEPROM,
874 "PDADC (%d,%4x): %4.4x %8.8x\n", 874 "PDADC (%d,%4x): %4.4x %8.8x\n",
875 i, regChainOffset, regOffset, 875 i, regChainOffset, regOffset,
876 reg32); 876 reg32);
877 DPRINTF(ah->ah_sc, ATH_DBG_EEPROM, 877 DPRINTF(ah, ATH_DBG_EEPROM,
878 "PDADC: Chain %d | PDADC %3d " 878 "PDADC: Chain %d | PDADC %3d "
879 "Value %3d | PDADC %3d Value %3d | " 879 "Value %3d | PDADC %3d Value %3d | "
880 "PDADC %3d Value %3d | PDADC %3d " 880 "PDADC %3d Value %3d | PDADC %3d "
@@ -1311,7 +1311,7 @@ static void ath9k_hw_def_set_txpower(struct ath_hw *ah,
1311 regulatory->max_power_level += INCREASE_MAXPOW_BY_THREE_CHAIN; 1311 regulatory->max_power_level += INCREASE_MAXPOW_BY_THREE_CHAIN;
1312 break; 1312 break;
1313 default: 1313 default:
1314 DPRINTF(ah->ah_sc, ATH_DBG_EEPROM, 1314 DPRINTF(ah, ATH_DBG_EEPROM,
1315 "Invalid chainmask configuration\n"); 1315 "Invalid chainmask configuration\n");
1316 break; 1316 break;
1317 } 1317 }
@@ -1352,7 +1352,7 @@ static u16 ath9k_hw_def_get_spur_channel(struct ath_hw *ah, u16 i, bool is2GHz)
1352 1352
1353 u16 spur_val = AR_NO_SPUR; 1353 u16 spur_val = AR_NO_SPUR;
1354 1354
1355 DPRINTF(ah->ah_sc, ATH_DBG_ANI, 1355 DPRINTF(ah, ATH_DBG_ANI,
1356 "Getting spur idx %d is2Ghz. %d val %x\n", 1356 "Getting spur idx %d is2Ghz. %d val %x\n",
1357 i, is2GHz, ah->config.spurchans[i][is2GHz]); 1357 i, is2GHz, ah->config.spurchans[i][is2GHz]);
1358 1358
@@ -1361,7 +1361,7 @@ static u16 ath9k_hw_def_get_spur_channel(struct ath_hw *ah, u16 i, bool is2GHz)
1361 break; 1361 break;
1362 case SPUR_ENABLE_IOCTL: 1362 case SPUR_ENABLE_IOCTL:
1363 spur_val = ah->config.spurchans[i][is2GHz]; 1363 spur_val = ah->config.spurchans[i][is2GHz];
1364 DPRINTF(ah->ah_sc, ATH_DBG_ANI, 1364 DPRINTF(ah, ATH_DBG_ANI,
1365 "Getting spur val from new loc. %d\n", spur_val); 1365 "Getting spur val from new loc. %d\n", spur_val);
1366 break; 1366 break;
1367 case SPUR_ENABLE_EEPROM: 1367 case SPUR_ENABLE_EEPROM: