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authorAndrea Bastoni <bastoni@cs.unc.edu>2010-05-30 19:16:45 -0400
committerAndrea Bastoni <bastoni@cs.unc.edu>2010-05-30 19:16:45 -0400
commitada47b5fe13d89735805b566185f4885f5a3f750 (patch)
tree644b88f8a71896307d71438e9b3af49126ffb22b /drivers/net/wireless/ath/ath9k/ath9k.h
parent43e98717ad40a4ae64545b5ba047c7b86aa44f4f (diff)
parent3280f21d43ee541f97f8cda5792150d2dbec20d5 (diff)
Merge branch 'wip-2.6.34' into old-private-masterarchived-private-master
Diffstat (limited to 'drivers/net/wireless/ath/ath9k/ath9k.h')
-rw-r--r--drivers/net/wireless/ath/ath9k/ath9k.h291
1 files changed, 92 insertions, 199 deletions
diff --git a/drivers/net/wireless/ath/ath9k/ath9k.h b/drivers/net/wireless/ath/ath9k/ath9k.h
index 1d59f10f68da..83c7ea4c007f 100644
--- a/drivers/net/wireless/ath/ath9k/ath9k.h
+++ b/drivers/net/wireless/ath/ath9k/ath9k.h
@@ -19,24 +19,25 @@
19 19
20#include <linux/etherdevice.h> 20#include <linux/etherdevice.h>
21#include <linux/device.h> 21#include <linux/device.h>
22#include <net/mac80211.h>
23#include <linux/leds.h> 22#include <linux/leds.h>
24 23
25#include "hw.h"
26#include "rc.h"
27#include "debug.h" 24#include "debug.h"
28#include "../ath.h" 25#include "common.h"
29#include "btcoex.h" 26
27/*
28 * Header for the ath9k.ko driver core *only* -- hw code nor any other driver
29 * should rely on this file or its contents.
30 */
30 31
31struct ath_node; 32struct ath_node;
32 33
33/* Macro to expand scalars to 64-bit objects */ 34/* Macro to expand scalars to 64-bit objects */
34 35
35#define ito64(x) (sizeof(x) == 8) ? \ 36#define ito64(x) (sizeof(x) == 1) ? \
36 (((unsigned long long int)(x)) & (0xff)) : \ 37 (((unsigned long long int)(x)) & (0xff)) : \
37 (sizeof(x) == 16) ? \ 38 (sizeof(x) == 2) ? \
38 (((unsigned long long int)(x)) & 0xffff) : \ 39 (((unsigned long long int)(x)) & 0xffff) : \
39 ((sizeof(x) == 32) ? \ 40 ((sizeof(x) == 4) ? \
40 (((unsigned long long int)(x)) & 0xffffffff) : \ 41 (((unsigned long long int)(x)) & 0xffffffff) : \
41 (unsigned long long int)(x)) 42 (unsigned long long int)(x))
42 43
@@ -54,15 +55,11 @@ struct ath_node;
54 55
55#define A_MAX(a, b) ((a) > (b) ? (a) : (b)) 56#define A_MAX(a, b) ((a) > (b) ? (a) : (b))
56 57
57#define ASSERT(exp) BUG_ON(!(exp))
58
59#define TSF_TO_TU(_h,_l) \ 58#define TSF_TO_TU(_h,_l) \
60 ((((u32)(_h)) << 22) | (((u32)(_l)) >> 10)) 59 ((((u32)(_h)) << 22) | (((u32)(_l)) >> 10))
61 60
62#define ATH_TXQ_SETUP(sc, i) ((sc)->tx.txqsetup & (1<<i)) 61#define ATH_TXQ_SETUP(sc, i) ((sc)->tx.txqsetup & (1<<i))
63 62
64static const u8 ath_bcast_mac[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
65
66struct ath_config { 63struct ath_config {
67 u32 ath_aggr_prot; 64 u32 ath_aggr_prot;
68 u16 txpowlimit; 65 u16 txpowlimit;
@@ -103,18 +100,6 @@ enum buffer_type {
103 BUF_XRETRY = BIT(5), 100 BUF_XRETRY = BIT(5),
104}; 101};
105 102
106struct ath_buf_state {
107 int bfs_nframes;
108 u16 bfs_al;
109 u16 bfs_frmlen;
110 int bfs_seqno;
111 int bfs_tidno;
112 int bfs_retries;
113 u8 bf_type;
114 u32 bfs_keyix;
115 enum ath9k_key_type bfs_keytype;
116};
117
118#define bf_nframes bf_state.bfs_nframes 103#define bf_nframes bf_state.bfs_nframes
119#define bf_al bf_state.bfs_al 104#define bf_al bf_state.bfs_al
120#define bf_frmlen bf_state.bfs_frmlen 105#define bf_frmlen bf_state.bfs_frmlen
@@ -129,21 +114,6 @@ struct ath_buf_state {
129#define bf_isretried(bf) (bf->bf_state.bf_type & BUF_RETRY) 114#define bf_isretried(bf) (bf->bf_state.bf_type & BUF_RETRY)
130#define bf_isxretried(bf) (bf->bf_state.bf_type & BUF_XRETRY) 115#define bf_isxretried(bf) (bf->bf_state.bf_type & BUF_XRETRY)
131 116
132struct ath_buf {
133 struct list_head list;
134 struct ath_buf *bf_lastbf; /* last buf of this unit (a frame or
135 an aggregate) */
136 struct ath_buf *bf_next; /* next subframe in the aggregate */
137 struct sk_buff *bf_mpdu; /* enclosing frame structure */
138 struct ath_desc *bf_desc; /* virtual addr of desc */
139 dma_addr_t bf_daddr; /* physical addr of desc */
140 dma_addr_t bf_buf_addr; /* physical addr of data buffer */
141 bool bf_stale;
142 u16 bf_flags;
143 struct ath_buf_state bf_state;
144 dma_addr_t bf_dmacontext;
145};
146
147struct ath_descdma { 117struct ath_descdma {
148 struct ath_desc *dd_desc; 118 struct ath_desc *dd_desc;
149 dma_addr_t dd_desc_paddr; 119 dma_addr_t dd_desc_paddr;
@@ -163,13 +133,9 @@ void ath_descdma_cleanup(struct ath_softc *sc, struct ath_descdma *dd,
163 133
164#define ATH_MAX_ANTENNA 3 134#define ATH_MAX_ANTENNA 3
165#define ATH_RXBUF 512 135#define ATH_RXBUF 512
166#define WME_NUM_TID 16
167#define ATH_TXBUF 512 136#define ATH_TXBUF 512
168#define ATH_TXMAXTRY 13 137#define ATH_TXMAXTRY 13
169#define ATH_MGT_TXMAXTRY 4 138#define ATH_MGT_TXMAXTRY 4
170#define WME_BA_BMP_SIZE 64
171#define WME_MAX_BA WME_BA_BMP_SIZE
172#define ATH_TID_MAX_BUFS (2 * WME_MAX_BA)
173 139
174#define TID_TO_WME_AC(_tid) \ 140#define TID_TO_WME_AC(_tid) \
175 ((((_tid) == 0) || ((_tid) == 3)) ? WME_AC_BE : \ 141 ((((_tid) == 0) || ((_tid) == 3)) ? WME_AC_BE : \
@@ -177,12 +143,6 @@ void ath_descdma_cleanup(struct ath_softc *sc, struct ath_descdma *dd,
177 (((_tid) == 4) || ((_tid) == 5)) ? WME_AC_VI : \ 143 (((_tid) == 4) || ((_tid) == 5)) ? WME_AC_VI : \
178 WME_AC_VO) 144 WME_AC_VO)
179 145
180#define WME_AC_BE 0
181#define WME_AC_BK 1
182#define WME_AC_VI 2
183#define WME_AC_VO 3
184#define WME_NUM_AC 4
185
186#define ADDBA_EXCHANGE_ATTEMPTS 10 146#define ADDBA_EXCHANGE_ATTEMPTS 10
187#define ATH_AGGR_DELIM_SZ 4 147#define ATH_AGGR_DELIM_SZ 4
188#define ATH_AGGR_MINPLEN 256 /* in bytes, minimum packet length */ 148#define ATH_AGGR_MINPLEN 256 /* in bytes, minimum packet length */
@@ -191,7 +151,6 @@ void ath_descdma_cleanup(struct ath_softc *sc, struct ath_descdma *dd,
191/* minimum h/w qdepth to be sustained to maximize aggregation */ 151/* minimum h/w qdepth to be sustained to maximize aggregation */
192#define ATH_AGGR_MIN_QDEPTH 2 152#define ATH_AGGR_MIN_QDEPTH 2
193#define ATH_AMPDU_SUBFRAME_DEFAULT 32 153#define ATH_AMPDU_SUBFRAME_DEFAULT 32
194#define ATH_AMPDU_LIMIT_MAX (64 * 1024 - 1)
195 154
196#define IEEE80211_SEQ_SEQ_SHIFT 4 155#define IEEE80211_SEQ_SEQ_SHIFT 4
197#define IEEE80211_SEQ_MAX 4096 156#define IEEE80211_SEQ_MAX 4096
@@ -238,18 +197,8 @@ struct ath_txq {
238 struct list_head axq_q; 197 struct list_head axq_q;
239 spinlock_t axq_lock; 198 spinlock_t axq_lock;
240 u32 axq_depth; 199 u32 axq_depth;
241 u8 axq_aggr_depth;
242 bool stopped; 200 bool stopped;
243 bool axq_tx_inprogress; 201 bool axq_tx_inprogress;
244 struct ath_buf *axq_linkbuf;
245
246 /* first desc of the last descriptor that contains CTS */
247 struct ath_desc *axq_lastdsWithCTS;
248
249 /* final desc of the gating desc that determines whether
250 lastdsWithCTS has been DMA'ed or not */
251 struct ath_desc *axq_gatingds;
252
253 struct list_head axq_acq; 202 struct list_head axq_acq;
254}; 203};
255 204
@@ -257,30 +206,6 @@ struct ath_txq {
257#define AGGR_ADDBA_COMPLETE BIT(2) 206#define AGGR_ADDBA_COMPLETE BIT(2)
258#define AGGR_ADDBA_PROGRESS BIT(3) 207#define AGGR_ADDBA_PROGRESS BIT(3)
259 208
260struct ath_atx_tid {
261 struct list_head list;
262 struct list_head buf_q;
263 struct ath_node *an;
264 struct ath_atx_ac *ac;
265 struct ath_buf *tx_buf[ATH_TID_MAX_BUFS];
266 u16 seq_start;
267 u16 seq_next;
268 u16 baw_size;
269 int tidno;
270 int baw_head; /* first un-acked tx buffer */
271 int baw_tail; /* next unused tx buffer slot */
272 int sched;
273 int paused;
274 u8 state;
275};
276
277struct ath_atx_ac {
278 int sched;
279 int qnum;
280 struct list_head list;
281 struct list_head tid_q;
282};
283
284struct ath_tx_control { 209struct ath_tx_control {
285 struct ath_txq *txq; 210 struct ath_txq *txq;
286 int if_id; 211 int if_id;
@@ -291,30 +216,6 @@ struct ath_tx_control {
291#define ATH_TX_XRETRY 0x02 216#define ATH_TX_XRETRY 0x02
292#define ATH_TX_BAR 0x04 217#define ATH_TX_BAR 0x04
293 218
294#define ATH_RSSI_LPF_LEN 10
295#define RSSI_LPF_THRESHOLD -20
296#define ATH9K_RSSI_BAD 0x80
297#define ATH_RSSI_EP_MULTIPLIER (1<<7)
298#define ATH_EP_MUL(x, mul) ((x) * (mul))
299#define ATH_RSSI_IN(x) (ATH_EP_MUL((x), ATH_RSSI_EP_MULTIPLIER))
300#define ATH_LPF_RSSI(x, y, len) \
301 ((x != ATH_RSSI_DUMMY_MARKER) ? (((x) * ((len) - 1) + (y)) / (len)) : (y))
302#define ATH_RSSI_LPF(x, y) do { \
303 if ((y) >= RSSI_LPF_THRESHOLD) \
304 x = ATH_LPF_RSSI((x), ATH_RSSI_IN((y)), ATH_RSSI_LPF_LEN); \
305} while (0)
306#define ATH_EP_RND(x, mul) \
307 ((((x)%(mul)) >= ((mul)/2)) ? ((x) + ((mul) - 1)) / (mul) : (x)/(mul))
308
309struct ath_node {
310 struct ath_softc *an_sc;
311 struct ath_atx_tid tid[WME_NUM_TID];
312 struct ath_atx_ac ac[WME_NUM_AC];
313 u16 maxampdu;
314 u8 mpdudensity;
315 int last_rssi;
316};
317
318struct ath_tx { 219struct ath_tx {
319 u16 seq_no; 220 u16 seq_no;
320 u32 txqsetup; 221 u32 txqsetup;
@@ -329,7 +230,6 @@ struct ath_rx {
329 u8 defant; 230 u8 defant;
330 u8 rxotherant; 231 u8 rxotherant;
331 u32 *rxlink; 232 u32 *rxlink;
332 int bufsize;
333 unsigned int rxfilter; 233 unsigned int rxfilter;
334 spinlock_t rxflushlock; 234 spinlock_t rxflushlock;
335 spinlock_t rxbuflock; 235 spinlock_t rxbuflock;
@@ -367,6 +267,7 @@ void ath_tx_aggr_start(struct ath_softc *sc, struct ieee80211_sta *sta,
367 u16 tid, u16 *ssn); 267 u16 tid, u16 *ssn);
368void ath_tx_aggr_stop(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid); 268void ath_tx_aggr_stop(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);
369void ath_tx_aggr_resume(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid); 269void ath_tx_aggr_resume(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);
270void ath9k_enable_ps(struct ath_softc *sc);
370 271
371/********/ 272/********/
372/* VIFs */ 273/* VIFs */
@@ -427,9 +328,9 @@ struct ath_beacon {
427 328
428void ath_beacon_tasklet(unsigned long data); 329void ath_beacon_tasklet(unsigned long data);
429void ath_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif); 330void ath_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif);
430int ath_beaconq_setup(struct ath_hw *ah);
431int ath_beacon_alloc(struct ath_wiphy *aphy, struct ieee80211_vif *vif); 331int ath_beacon_alloc(struct ath_wiphy *aphy, struct ieee80211_vif *vif);
432void ath_beacon_return(struct ath_softc *sc, struct ath_vif *avp); 332void ath_beacon_return(struct ath_softc *sc, struct ath_vif *avp);
333int ath_beaconq_config(struct ath_softc *sc);
433 334
434/*******/ 335/*******/
435/* ANI */ 336/* ANI */
@@ -441,16 +342,37 @@ void ath_beacon_return(struct ath_softc *sc, struct ath_vif *avp);
441#define ATH_LONG_CALINTERVAL 30000 /* 30 seconds */ 342#define ATH_LONG_CALINTERVAL 30000 /* 30 seconds */
442#define ATH_RESTART_CALINTERVAL 1200000 /* 20 minutes */ 343#define ATH_RESTART_CALINTERVAL 1200000 /* 20 minutes */
443 344
444struct ath_ani { 345void ath_ani_calibrate(unsigned long data);
445 bool caldone; 346
446 int16_t noise_floor; 347/**********/
447 unsigned int longcal_timer; 348/* BTCOEX */
448 unsigned int shortcal_timer; 349/**********/
449 unsigned int resetcal_timer; 350
450 unsigned int checkani_timer; 351/* Defines the BT AR_BT_COEX_WGHT used */
451 struct timer_list timer; 352enum ath_stomp_type {
353 ATH_BTCOEX_NO_STOMP,
354 ATH_BTCOEX_STOMP_ALL,
355 ATH_BTCOEX_STOMP_LOW,
356 ATH_BTCOEX_STOMP_NONE
452}; 357};
453 358
359struct ath_btcoex {
360 bool hw_timer_enabled;
361 spinlock_t btcoex_lock;
362 struct timer_list period_timer; /* Timer for BT period */
363 u32 bt_priority_cnt;
364 unsigned long bt_priority_time;
365 int bt_stomp_type; /* Types of BT stomping */
366 u32 btcoex_no_stomp; /* in usec */
367 u32 btcoex_period; /* in usec */
368 u32 btscan_no_stomp; /* in usec */
369 struct ath_gen_timer *no_stomp_timer; /* Timer for no BT stomping */
370};
371
372int ath_init_btcoex_timer(struct ath_softc *sc);
373void ath9k_btcoex_timer_resume(struct ath_softc *sc);
374void ath9k_btcoex_timer_pause(struct ath_softc *sc);
375
454/********************/ 376/********************/
455/* LED Control */ 377/* LED Control */
456/********************/ 378/********************/
@@ -475,6 +397,9 @@ struct ath_led {
475 bool registered; 397 bool registered;
476}; 398};
477 399
400void ath_init_leds(struct ath_softc *sc);
401void ath_deinit_leds(struct ath_softc *sc);
402
478/********************/ 403/********************/
479/* Main driver core */ 404/* Main driver core */
480/********************/ 405/********************/
@@ -484,61 +409,46 @@ struct ath_led {
484 * Used when PCI device not fully initialized by bootrom/BIOS 409 * Used when PCI device not fully initialized by bootrom/BIOS
485*/ 410*/
486#define DEFAULT_CACHELINE 32 411#define DEFAULT_CACHELINE 32
487#define ATH_DEFAULT_NOISE_FLOOR -95
488#define ATH_REGCLASSIDS_MAX 10 412#define ATH_REGCLASSIDS_MAX 10
489#define ATH_CABQ_READY_TIME 80 /* % of beacon interval */ 413#define ATH_CABQ_READY_TIME 80 /* % of beacon interval */
490#define ATH_MAX_SW_RETRIES 10 414#define ATH_MAX_SW_RETRIES 10
491#define ATH_CHAN_MAX 255 415#define ATH_CHAN_MAX 255
492#define IEEE80211_WEP_NKID 4 /* number of key ids */ 416#define IEEE80211_WEP_NKID 4 /* number of key ids */
493 417
494/*
495 * The key cache is used for h/w cipher state and also for
496 * tracking station state such as the current tx antenna.
497 * We also setup a mapping table between key cache slot indices
498 * and station state to short-circuit node lookups on rx.
499 * Different parts have different size key caches. We handle
500 * up to ATH_KEYMAX entries (could dynamically allocate state).
501 */
502#define ATH_KEYMAX 128 /* max key cache size we handle */
503
504#define ATH_TXPOWER_MAX 100 /* .5 dBm units */ 418#define ATH_TXPOWER_MAX 100 /* .5 dBm units */
505#define ATH_RSSI_DUMMY_MARKER 0x127
506#define ATH_RATE_DUMMY_MARKER 0 419#define ATH_RATE_DUMMY_MARKER 0
507 420
508#define SC_OP_INVALID BIT(0) 421#define SC_OP_INVALID BIT(0)
509#define SC_OP_BEACONS BIT(1) 422#define SC_OP_BEACONS BIT(1)
510#define SC_OP_RXAGGR BIT(2) 423#define SC_OP_RXAGGR BIT(2)
511#define SC_OP_TXAGGR BIT(3) 424#define SC_OP_TXAGGR BIT(3)
512#define SC_OP_FULL_RESET BIT(4) 425#define SC_OP_FULL_RESET BIT(4)
513#define SC_OP_PREAMBLE_SHORT BIT(5) 426#define SC_OP_PREAMBLE_SHORT BIT(5)
514#define SC_OP_PROTECT_ENABLE BIT(6) 427#define SC_OP_PROTECT_ENABLE BIT(6)
515#define SC_OP_RXFLUSH BIT(7) 428#define SC_OP_RXFLUSH BIT(7)
516#define SC_OP_LED_ASSOCIATED BIT(8) 429#define SC_OP_LED_ASSOCIATED BIT(8)
517#define SC_OP_WAIT_FOR_BEACON BIT(12) 430#define SC_OP_LED_ON BIT(9)
518#define SC_OP_LED_ON BIT(13) 431#define SC_OP_SCANNING BIT(10)
519#define SC_OP_SCANNING BIT(14) 432#define SC_OP_TSF_RESET BIT(11)
520#define SC_OP_TSF_RESET BIT(15) 433#define SC_OP_BT_PRIORITY_DETECTED BIT(12)
521#define SC_OP_WAIT_FOR_CAB BIT(16) 434#define SC_OP_BT_SCAN BIT(13)
522#define SC_OP_WAIT_FOR_PSPOLL_DATA BIT(17) 435
523#define SC_OP_WAIT_FOR_TX_ACK BIT(18) 436/* Powersave flags */
524#define SC_OP_BEACON_SYNC BIT(19) 437#define PS_WAIT_FOR_BEACON BIT(0)
525#define SC_OP_BTCOEX_ENABLED BIT(20) 438#define PS_WAIT_FOR_CAB BIT(1)
526#define SC_OP_BT_PRIORITY_DETECTED BIT(21) 439#define PS_WAIT_FOR_PSPOLL_DATA BIT(2)
527 440#define PS_WAIT_FOR_TX_ACK BIT(3)
528struct ath_bus_ops { 441#define PS_BEACON_SYNC BIT(4)
529 void (*read_cachesize)(struct ath_softc *sc, int *csz); 442#define PS_NULLFUNC_COMPLETED BIT(5)
530 void (*cleanup)(struct ath_softc *sc); 443#define PS_ENABLED BIT(6)
531 bool (*eeprom_read)(struct ath_hw *ah, u32 off, u16 *data);
532};
533 444
534struct ath_wiphy; 445struct ath_wiphy;
446struct ath_rate_table;
535 447
536struct ath_softc { 448struct ath_softc {
537 struct ieee80211_hw *hw; 449 struct ieee80211_hw *hw;
538 struct device *dev; 450 struct device *dev;
539 451
540 struct ath_common common;
541
542 spinlock_t wiphy_lock; /* spinlock to protect ath_wiphy data */ 452 spinlock_t wiphy_lock; /* spinlock to protect ath_wiphy data */
543 struct ath_wiphy *pri_wiphy; 453 struct ath_wiphy *pri_wiphy;
544 struct ath_wiphy **sec_wiphy; /* secondary wiphys (virtual radios); may 454 struct ath_wiphy **sec_wiphy; /* secondary wiphys (virtual radios); may
@@ -561,36 +471,26 @@ struct ath_softc {
561 int irq; 471 int irq;
562 spinlock_t sc_resetlock; 472 spinlock_t sc_resetlock;
563 spinlock_t sc_serial_rw; 473 spinlock_t sc_serial_rw;
564 spinlock_t ani_lock;
565 spinlock_t sc_pm_lock; 474 spinlock_t sc_pm_lock;
566 struct mutex mutex; 475 struct mutex mutex;
567 476
568 u8 curbssid[ETH_ALEN];
569 u8 bssidmask[ETH_ALEN];
570 u32 intrstatus; 477 u32 intrstatus;
571 u32 sc_flags; /* SC_OP_* */ 478 u32 sc_flags; /* SC_OP_* */
479 u16 ps_flags; /* PS_* */
572 u16 curtxpow; 480 u16 curtxpow;
573 u16 curaid;
574 u8 nbcnvifs; 481 u8 nbcnvifs;
575 u16 nvifs; 482 u16 nvifs;
576 u8 tx_chainmask;
577 u8 rx_chainmask;
578 u32 keymax;
579 DECLARE_BITMAP(keymap, ATH_KEYMAX);
580 u8 splitmic;
581 bool ps_enabled; 483 bool ps_enabled;
484 bool ps_idle;
582 unsigned long ps_usecount; 485 unsigned long ps_usecount;
583 enum ath9k_int imask; 486 enum ath9k_int imask;
584 enum ath9k_ht_extprotspacing ht_extprotspacing;
585 enum ath9k_ht_macmode tx_chan_width;
586 487
587 struct ath_config config; 488 struct ath_config config;
588 struct ath_rx rx; 489 struct ath_rx rx;
589 struct ath_tx tx; 490 struct ath_tx tx;
590 struct ath_beacon beacon; 491 struct ath_beacon beacon;
591 struct ieee80211_rate rates[IEEE80211_NUM_BANDS][ATH_RATE_MAX];
592 const struct ath_rate_table *hw_rate_table[ATH9K_MODE_MAX];
593 const struct ath_rate_table *cur_rate_table; 492 const struct ath_rate_table *cur_rate_table;
493 enum wireless_mode cur_rate_mode;
594 struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS]; 494 struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS];
595 495
596 struct ath_led radio_led; 496 struct ath_led radio_led;
@@ -605,14 +505,12 @@ struct ath_softc {
605 505
606 int beacon_interval; 506 int beacon_interval;
607 507
608 struct ath_ani ani; 508#ifdef CONFIG_ATH9K_DEBUGFS
609#ifdef CONFIG_ATH9K_DEBUG
610 struct ath9k_debug debug; 509 struct ath9k_debug debug;
611#endif 510#endif
612 struct ath_bus_ops *bus_ops;
613 struct ath_beacon_config cur_beacon_conf; 511 struct ath_beacon_config cur_beacon_conf;
614 struct delayed_work tx_complete_work; 512 struct delayed_work tx_complete_work;
615 struct ath_btcoex_info btcoex_info; 513 struct ath_btcoex btcoex;
616}; 514};
617 515
618struct ath_wiphy { 516struct ath_wiphy {
@@ -625,51 +523,41 @@ struct ath_wiphy {
625 ATH_WIPHY_PAUSED, 523 ATH_WIPHY_PAUSED,
626 ATH_WIPHY_SCAN, 524 ATH_WIPHY_SCAN,
627 } state; 525 } state;
526 bool idle;
628 int chan_idx; 527 int chan_idx;
629 int chan_is_ht; 528 int chan_is_ht;
630}; 529};
631 530
531void ath9k_tasklet(unsigned long data);
632int ath_reset(struct ath_softc *sc, bool retry_tx); 532int ath_reset(struct ath_softc *sc, bool retry_tx);
633int ath_get_hal_qnum(u16 queue, struct ath_softc *sc); 533int ath_get_hal_qnum(u16 queue, struct ath_softc *sc);
634int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc); 534int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc);
635int ath_cabq_update(struct ath_softc *); 535int ath_cabq_update(struct ath_softc *);
636 536
637static inline struct ath_common *ath9k_hw_common(struct ath_hw *ah) 537static inline void ath_read_cachesize(struct ath_common *common, int *csz)
638{ 538{
639 return &ah->ah_sc->common; 539 common->bus_ops->read_cachesize(common, csz);
640}
641
642static inline struct ath_regulatory *ath9k_hw_regulatory(struct ath_hw *ah)
643{
644 return &(ath9k_hw_common(ah)->regulatory);
645}
646
647static inline void ath_read_cachesize(struct ath_softc *sc, int *csz)
648{
649 sc->bus_ops->read_cachesize(sc, csz);
650}
651
652static inline void ath_bus_cleanup(struct ath_softc *sc)
653{
654 sc->bus_ops->cleanup(sc);
655} 540}
656 541
657extern struct ieee80211_ops ath9k_ops; 542extern struct ieee80211_ops ath9k_ops;
543extern int modparam_nohwcrypt;
658 544
659irqreturn_t ath_isr(int irq, void *dev); 545irqreturn_t ath_isr(int irq, void *dev);
660void ath_cleanup(struct ath_softc *sc); 546int ath9k_init_device(u16 devid, struct ath_softc *sc, u16 subsysid,
661int ath_init_device(u16 devid, struct ath_softc *sc, u16 subsysid); 547 const struct ath_bus_ops *bus_ops);
662void ath_detach(struct ath_softc *sc); 548void ath9k_deinit_device(struct ath_softc *sc);
663const char *ath_mac_bb_name(u32 mac_bb_version); 549const char *ath_mac_bb_name(u32 mac_bb_version);
664const char *ath_rf_name(u16 rf_version); 550const char *ath_rf_name(u16 rf_version);
665void ath_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw); 551void ath9k_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw);
666void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw, 552void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
667 struct ath9k_channel *ichan); 553 struct ath9k_channel *ichan);
668void ath_update_chainmask(struct ath_softc *sc, int is_ht); 554void ath_update_chainmask(struct ath_softc *sc, int is_ht);
669int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw, 555int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
670 struct ath9k_channel *hchan); 556 struct ath9k_channel *hchan);
671void ath_radio_enable(struct ath_softc *sc); 557
672void ath_radio_disable(struct ath_softc *sc); 558void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw);
559void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw);
560bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode);
673 561
674#ifdef CONFIG_PCI 562#ifdef CONFIG_PCI
675int ath_pci_init(void); 563int ath_pci_init(void);
@@ -705,9 +593,14 @@ void ath9k_wiphy_pause_all_forced(struct ath_softc *sc,
705bool ath9k_wiphy_scanning(struct ath_softc *sc); 593bool ath9k_wiphy_scanning(struct ath_softc *sc);
706void ath9k_wiphy_work(struct work_struct *work); 594void ath9k_wiphy_work(struct work_struct *work);
707bool ath9k_all_wiphys_idle(struct ath_softc *sc); 595bool ath9k_all_wiphys_idle(struct ath_softc *sc);
596void ath9k_set_wiphy_idle(struct ath_wiphy *aphy, bool idle);
708 597
709void ath9k_iowrite32(struct ath_hw *ah, u32 reg_offset, u32 val); 598void ath_mac80211_stop_queue(struct ath_softc *sc, u16 skb_queue);
710unsigned int ath9k_ioread32(struct ath_hw *ah, u32 reg_offset); 599void ath_mac80211_start_queue(struct ath_softc *sc, u16 skb_queue);
711 600
712int ath_tx_get_qnum(struct ath_softc *sc, int qtype, int haltype); 601int ath_tx_get_qnum(struct ath_softc *sc, int qtype, int haltype);
602
603void ath_start_rfkill_poll(struct ath_softc *sc);
604extern void ath9k_rfkill_poll_state(struct ieee80211_hw *hw);
605
713#endif /* ATH9K_H */ 606#endif /* ATH9K_H */