ath9k: Fix ASPM for AR9462

If the L1 entrance latency is not calibrated properly
in the EEPROM in WB222 boards, there could be problems
in connectivity. Check and correct the calibrated value
if it doesn't match the optimal value for WB222, 4us.

Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>

1 files changed, 14 insertions, 0 deletions

diff --git a/drivers/net/wireless/ath/ath9k/ar9003_hw.c b/drivers/net/wireless/ath/ath9k/ar9003_hw.c
index 738aa7e454d8..582cddddddd7 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_hw.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_hw.c
@@ -745,6 +745,20 @@ static void ar9003_hw_init_mode_gain_regs(struct ath_hw *ah)
 static void ar9003_hw_configpcipowersave(struct ath_hw *ah,
                                          bool power_off)
 {
+        /*
+         * Increase L1 Entry Latency. Some WB222 boards don't have
+         * this change in eeprom/OTP.
+         *
+         */
+        if (AR_SREV_9462(ah)) {
+                u32 val = ah->config.aspm_l1_fix;
+                if ((val & 0xff000000) == 0x17000000) {
+                        val &= 0x00ffffff;
+                        val |= 0x27000000;
+                        REG_WRITE(ah, 0x570c, val);
+                }
+        }
+
         /* Nothing to do on restore for 11N */
         if (!power_off /* !restore */) {
                 /* set bit 19 to allow forcing of pcie core into L1 state */