diff options
author | Sujith Manoharan <c_manoha@qca.qualcomm.com> | 2013-12-01 23:26:31 -0500 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2013-12-02 14:25:04 -0500 |
commit | 2c8672c13a206fdf1df1f9c5c57f361a7d3f5594 (patch) | |
tree | 8e1bd124f69182fc3cf20f93f5994f9e3bfad54b /drivers/net/wireless/ath/ath9k/ar9003_hw.c | |
parent | 40cc87de93ebb9122f6fcddd799ea18145f0bdab (diff) |
ath9k: Fix initvals for freq 2484
This is missing for AR9300, AR9580 and AR9340.
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath/ath9k/ar9003_hw.c')
-rw-r--r-- | drivers/net/wireless/ath/ath9k/ar9003_hw.c | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_hw.c b/drivers/net/wireless/ath/ath9k/ar9003_hw.c index d3eca0cec9cd..d8c1eee8ea53 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_hw.c +++ b/drivers/net/wireless/ath/ath9k/ar9003_hw.c | |||
@@ -149,7 +149,9 @@ static void ar9003_hw_init_mode_regs(struct ath_hw *ah) | |||
149 | ar9340Modes_high_ob_db_tx_gain_table_1p0); | 149 | ar9340Modes_high_ob_db_tx_gain_table_1p0); |
150 | 150 | ||
151 | INIT_INI_ARRAY(&ah->iniModesFastClock, | 151 | INIT_INI_ARRAY(&ah->iniModesFastClock, |
152 | ar9340Modes_fast_clock_1p0); | 152 | ar9340Modes_fast_clock_1p0); |
153 | INIT_INI_ARRAY(&ah->iniCckfirJapan2484, | ||
154 | ar9340_1p0_baseband_core_txfir_coeff_japan_2484); | ||
153 | 155 | ||
154 | if (!ah->is_clk_25mhz) | 156 | if (!ah->is_clk_25mhz) |
155 | INIT_INI_ARRAY(&ah->iniAdditional, | 157 | INIT_INI_ARRAY(&ah->iniAdditional, |
@@ -335,7 +337,9 @@ static void ar9003_hw_init_mode_regs(struct ath_hw *ah) | |||
335 | ar9580_1p0_low_ob_db_tx_gain_table); | 337 | ar9580_1p0_low_ob_db_tx_gain_table); |
336 | 338 | ||
337 | INIT_INI_ARRAY(&ah->iniModesFastClock, | 339 | INIT_INI_ARRAY(&ah->iniModesFastClock, |
338 | ar9580_1p0_modes_fast_clock); | 340 | ar9580_1p0_modes_fast_clock); |
341 | INIT_INI_ARRAY(&ah->iniCckfirJapan2484, | ||
342 | ar9580_1p0_baseband_core_txfir_coeff_japan_2484); | ||
339 | } else if (AR_SREV_9565_11_OR_LATER(ah)) { | 343 | } else if (AR_SREV_9565_11_OR_LATER(ah)) { |
340 | INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE], | 344 | INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE], |
341 | ar9565_1p1_mac_core); | 345 | ar9565_1p1_mac_core); |
@@ -451,7 +455,9 @@ static void ar9003_hw_init_mode_regs(struct ath_hw *ah) | |||
451 | 455 | ||
452 | /* Fast clock modal settings */ | 456 | /* Fast clock modal settings */ |
453 | INIT_INI_ARRAY(&ah->iniModesFastClock, | 457 | INIT_INI_ARRAY(&ah->iniModesFastClock, |
454 | ar9300Modes_fast_clock_2p2); | 458 | ar9300Modes_fast_clock_2p2); |
459 | INIT_INI_ARRAY(&ah->iniCckfirJapan2484, | ||
460 | ar9300_2p2_baseband_core_txfir_coeff_japan_2484); | ||
455 | } | 461 | } |
456 | } | 462 | } |
457 | 463 | ||