ath9k_hw: Assign default xlna config for AR9485

For AR9485 boards with XLNA, the default gpio config
is not set correctly, fix this.

Cc: stable@vger.kernel.org
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>

1 files changed, 6 insertions, 2 deletions

diff --git a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
index e6b92ff265fd..25b8bbbe74fe 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
@@ -3563,14 +3563,18 @@ static void ar9003_hw_ant_ctrl_apply(struct ath_hw *ah, bool is2ghz)
 {
         struct ath9k_hw_capabilities *pCap = &ah->caps;
         int chain;
-        u32 regval;
+        u32 regval, value;
         static const u32 switch_chain_reg[AR9300_MAX_CHAINS] = {
                         AR_PHY_SWITCH_CHAIN_0,
                         AR_PHY_SWITCH_CHAIN_1,
                         AR_PHY_SWITCH_CHAIN_2,
         };
 
-        u32 value = ar9003_hw_ant_ctrl_common_get(ah, is2ghz);
+        if (AR_SREV_9485(ah) && (ar9003_hw_get_rx_gain_idx(ah) == 0))
+                ath9k_hw_cfg_output(ah, AR9300_EXT_LNA_CTL_GPIO_AR9485,
+                                    AR_GPIO_OUTPUT_MUX_AS_PCIE_ATTENTION_LED);
+
+        value = ar9003_hw_ant_ctrl_common_get(ah, is2ghz);
 
         if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) {
                 REG_RMW_FIELD(ah, AR_PHY_SWITCH_COM,