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authorFelix Fietkau <nbd@openwrt.org>2010-10-03 13:07:17 -0400
committerJohn W. Linville <linville@tuxdriver.com>2010-10-06 16:26:01 -0400
commit9dbebc7fd07ab66341dce8d001272db400c11e03 (patch)
tree492fd72be595cb7f397d83b2cd4a567cbec73cb4 /drivers/net/wireless/ath/ath9k/ani.h
parent6497827f53eb90dcf30c5d6414c83238f722e8ae (diff)
ath9k_hw: merge codepaths that access the cycle counter registers
The cycle counters are used by ANI to determine the amount of time that the radio spent not receiving or transmitting. They're also used for debugging purposes if the baseband watchdog on AR9003 detects a lockup. In the future, we want to use these counters to determine the medium utilization and export this information via survey. For that, we need to make sure that the counter is only accessed from one place, which also ensures that wraparounds won't occur at inconvenient points in time. Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath/ath9k/ani.h')
-rw-r--r--drivers/net/wireless/ath/ath9k/ani.h13
1 files changed, 8 insertions, 5 deletions
diff --git a/drivers/net/wireless/ath/ath9k/ani.h b/drivers/net/wireless/ath/ath9k/ani.h
index f4d0a4d48b37..15f9d67a18c8 100644
--- a/drivers/net/wireless/ath/ath9k/ani.h
+++ b/drivers/net/wireless/ath/ath9k/ani.h
@@ -93,6 +93,13 @@ struct ath9k_mib_stats {
93 u32 beacons; 93 u32 beacons;
94}; 94};
95 95
96struct ath_cycle_counters {
97 u32 cycles;
98 u32 rx_frame;
99 u32 rx_clear;
100 u32 tx_frame;
101};
102
96/* INI default values for ANI registers */ 103/* INI default values for ANI registers */
97struct ath9k_ani_default { 104struct ath9k_ani_default {
98 u16 m1ThreshLow; 105 u16 m1ThreshLow;
@@ -130,9 +137,6 @@ struct ar5416AniState {
130 int32_t rssiThrLow; 137 int32_t rssiThrLow;
131 int32_t rssiThrHigh; 138 int32_t rssiThrHigh;
132 u32 noiseFloor; 139 u32 noiseFloor;
133 u32 txFrameCount;
134 u32 rxFrameCount;
135 u32 cycleCount;
136 u32 ofdmPhyErrCount; 140 u32 ofdmPhyErrCount;
137 u32 cckPhyErrCount; 141 u32 cckPhyErrCount;
138 u32 ofdmPhyErrBase; 142 u32 ofdmPhyErrBase;
@@ -166,8 +170,7 @@ struct ar5416Stats {
166 170
167void ath9k_enable_mib_counters(struct ath_hw *ah); 171void ath9k_enable_mib_counters(struct ath_hw *ah);
168void ath9k_hw_disable_mib_counters(struct ath_hw *ah); 172void ath9k_hw_disable_mib_counters(struct ath_hw *ah);
169u32 ath9k_hw_GetMibCycleCountsPct(struct ath_hw *ah, u32 *rxc_pcnt, 173void ath9k_hw_update_cycle_counters(struct ath_hw *ah);
170 u32 *rxf_pcnt, u32 *txf_pcnt);
171void ath9k_hw_ani_setup(struct ath_hw *ah); 174void ath9k_hw_ani_setup(struct ath_hw *ah);
172void ath9k_hw_ani_init(struct ath_hw *ah); 175void ath9k_hw_ani_init(struct ath_hw *ah);
173int ath9k_hw_get_ani_channel_idx(struct ath_hw *ah, 176int ath9k_hw_get_ani_channel_idx(struct ath_hw *ah,