diff options
author | Kalle Valo <kvalo@qca.qualcomm.com> | 2012-03-07 13:03:58 -0500 |
---|---|---|
committer | Kalle Valo <kvalo@qca.qualcomm.com> | 2012-03-07 13:03:58 -0500 |
commit | 24fc32b35647401bbf03b3e2d5f01c6d0579a01c (patch) | |
tree | 0313adc46ffb798f5934183fc8d9e5988288064c /drivers/net/wireless/ath/ath6kl | |
parent | d0d670abcf97d2e1a369449847d776ebbfba292d (diff) |
ath6kl: add ath6kl_bmi_write_hi32()
We have a lot of 32 bit writes to the host interest area and the code
doing that is ugly. Clean that up by adding ath6kl_bmi_write_hi32().
This also fixes few checkpatch warnings.
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
Diffstat (limited to 'drivers/net/wireless/ath/ath6kl')
-rw-r--r-- | drivers/net/wireless/ath/ath6kl/bmi.h | 9 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath6kl/init.c | 99 |
2 files changed, 32 insertions, 76 deletions
diff --git a/drivers/net/wireless/ath/ath6kl/bmi.h b/drivers/net/wireless/ath/ath6kl/bmi.h index 114f7b265a3a..e6a7330aadcd 100644 --- a/drivers/net/wireless/ath/ath6kl/bmi.h +++ b/drivers/net/wireless/ath/ath6kl/bmi.h | |||
@@ -223,6 +223,15 @@ struct ath6kl_bmi_target_info { | |||
223 | __le32 type; /* target type */ | 223 | __le32 type; /* target type */ |
224 | } __packed; | 224 | } __packed; |
225 | 225 | ||
226 | #define ath6kl_bmi_write_hi32(ar, item, val) \ | ||
227 | ({ \ | ||
228 | u32 addr, v; \ | ||
229 | addr = ath6kl_get_hi_item_addr(ar, HI_ITEM(item)); \ | ||
230 | v = val; \ | ||
231 | ath6kl_bmi_write(ar, addr, (u8 *) &v, sizeof(v)); \ | ||
232 | }) | ||
233 | |||
234 | |||
226 | int ath6kl_bmi_init(struct ath6kl *ar); | 235 | int ath6kl_bmi_init(struct ath6kl *ar); |
227 | void ath6kl_bmi_cleanup(struct ath6kl *ar); | 236 | void ath6kl_bmi_cleanup(struct ath6kl *ar); |
228 | void ath6kl_bmi_reset(struct ath6kl *ar); | 237 | void ath6kl_bmi_reset(struct ath6kl *ar); |
diff --git a/drivers/net/wireless/ath/ath6kl/init.c b/drivers/net/wireless/ath/ath6kl/init.c index 445426f3f9ed..da5900d30caa 100644 --- a/drivers/net/wireless/ath/ath6kl/init.c +++ b/drivers/net/wireless/ath/ath6kl/init.c | |||
@@ -352,11 +352,7 @@ static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val, | |||
352 | blk_size |= ((u32)htc_ctrl_buf) << 16; | 352 | blk_size |= ((u32)htc_ctrl_buf) << 16; |
353 | 353 | ||
354 | /* set the host interest area for the block size */ | 354 | /* set the host interest area for the block size */ |
355 | status = ath6kl_bmi_write(ar, | 355 | status = ath6kl_bmi_write_hi32(ar, hi_mbox_io_block_sz, blk_size); |
356 | ath6kl_get_hi_item_addr(ar, | ||
357 | HI_ITEM(hi_mbox_io_block_sz)), | ||
358 | (u8 *)&blk_size, | ||
359 | 4); | ||
360 | if (status) { | 356 | if (status) { |
361 | ath6kl_err("bmi_write_memory for IO block size failed\n"); | 357 | ath6kl_err("bmi_write_memory for IO block size failed\n"); |
362 | goto out; | 358 | goto out; |
@@ -368,11 +364,8 @@ static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val, | |||
368 | 364 | ||
369 | if (mbox_isr_yield_val) { | 365 | if (mbox_isr_yield_val) { |
370 | /* set the host interest area for the mbox ISR yield limit */ | 366 | /* set the host interest area for the mbox ISR yield limit */ |
371 | status = ath6kl_bmi_write(ar, | 367 | status = ath6kl_bmi_write_hi32(ar, hi_mbox_isr_yield_limit, |
372 | ath6kl_get_hi_item_addr(ar, | 368 | mbox_isr_yield_val); |
373 | HI_ITEM(hi_mbox_isr_yield_limit)), | ||
374 | (u8 *)&mbox_isr_yield_val, | ||
375 | 4); | ||
376 | if (status) { | 369 | if (status) { |
377 | ath6kl_err("bmi_write_memory for yield limit failed\n"); | 370 | ath6kl_err("bmi_write_memory for yield limit failed\n"); |
378 | goto out; | 371 | goto out; |
@@ -463,8 +456,7 @@ int ath6kl_configure_target(struct ath6kl *ar) | |||
463 | int i, status; | 456 | int i, status; |
464 | 457 | ||
465 | param = !!(ar->conf_flags & ATH6KL_CONF_UART_DEBUG); | 458 | param = !!(ar->conf_flags & ATH6KL_CONF_UART_DEBUG); |
466 | if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar, | 459 | if (ath6kl_bmi_write_hi32(ar, hi_serial_enable, param)) { |
467 | HI_ITEM(hi_serial_enable)), (u8 *)¶m, 4)) { | ||
468 | ath6kl_err("bmi_write_memory for uart debug failed\n"); | 460 | ath6kl_err("bmi_write_memory for uart debug failed\n"); |
469 | return -EIO; | 461 | return -EIO; |
470 | } | 462 | } |
@@ -500,11 +492,8 @@ int ath6kl_configure_target(struct ath6kl *ar) | |||
500 | if (ar->p2p && ar->vif_max == 1) | 492 | if (ar->p2p && ar->vif_max == 1) |
501 | fw_submode = HI_OPTION_FW_SUBMODE_P2PDEV; | 493 | fw_submode = HI_OPTION_FW_SUBMODE_P2PDEV; |
502 | 494 | ||
503 | param = HTC_PROTOCOL_VERSION; | 495 | if (ath6kl_bmi_write_hi32(ar, hi_app_host_interest, |
504 | if (ath6kl_bmi_write(ar, | 496 | HTC_PROTOCOL_VERSION) != 0) { |
505 | ath6kl_get_hi_item_addr(ar, | ||
506 | HI_ITEM(hi_app_host_interest)), | ||
507 | (u8 *)¶m, 4) != 0) { | ||
508 | ath6kl_err("bmi_write_memory for htc version failed\n"); | 497 | ath6kl_err("bmi_write_memory for htc version failed\n"); |
509 | return -EIO; | 498 | return -EIO; |
510 | } | 499 | } |
@@ -527,11 +516,7 @@ int ath6kl_configure_target(struct ath6kl *ar) | |||
527 | param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); | 516 | param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); |
528 | param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); | 517 | param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); |
529 | 518 | ||
530 | if (ath6kl_bmi_write(ar, | 519 | if (ath6kl_bmi_write_hi32(ar, hi_option_flag, param) != 0) { |
531 | ath6kl_get_hi_item_addr(ar, | ||
532 | HI_ITEM(hi_option_flag)), | ||
533 | (u8 *)¶m, | ||
534 | 4) != 0) { | ||
535 | ath6kl_err("bmi_write_memory for setting fwmode failed\n"); | 520 | ath6kl_err("bmi_write_memory for setting fwmode failed\n"); |
536 | return -EIO; | 521 | return -EIO; |
537 | } | 522 | } |
@@ -550,16 +535,13 @@ int ath6kl_configure_target(struct ath6kl *ar) | |||
550 | param = ar->hw.board_ext_data_addr; | 535 | param = ar->hw.board_ext_data_addr; |
551 | ram_reserved_size = ar->hw.reserved_ram_size; | 536 | ram_reserved_size = ar->hw.reserved_ram_size; |
552 | 537 | ||
553 | if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar, | 538 | if (ath6kl_bmi_write_hi32(ar, hi_board_ext_data, param) != 0) { |
554 | HI_ITEM(hi_board_ext_data)), | ||
555 | (u8 *)¶m, 4) != 0) { | ||
556 | ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n"); | 539 | ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n"); |
557 | return -EIO; | 540 | return -EIO; |
558 | } | 541 | } |
559 | 542 | ||
560 | if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar, | 543 | if (ath6kl_bmi_write_hi32(ar, hi_end_ram_reserve_sz, |
561 | HI_ITEM(hi_end_ram_reserve_sz)), | 544 | ram_reserved_size) != 0) { |
562 | (u8 *)&ram_reserved_size, 4) != 0) { | ||
563 | ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n"); | 545 | ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n"); |
564 | return -EIO; | 546 | return -EIO; |
565 | } | 547 | } |
@@ -570,20 +552,13 @@ int ath6kl_configure_target(struct ath6kl *ar) | |||
570 | return -EIO; | 552 | return -EIO; |
571 | 553 | ||
572 | /* Configure GPIO AR600x UART */ | 554 | /* Configure GPIO AR600x UART */ |
573 | param = ar->hw.uarttx_pin; | 555 | status = ath6kl_bmi_write_hi32(ar, hi_dbg_uart_txpin, |
574 | status = ath6kl_bmi_write(ar, | 556 | ar->hw.uarttx_pin); |
575 | ath6kl_get_hi_item_addr(ar, | ||
576 | HI_ITEM(hi_dbg_uart_txpin)), | ||
577 | (u8 *)¶m, 4); | ||
578 | if (status) | 557 | if (status) |
579 | return status; | 558 | return status; |
580 | 559 | ||
581 | /* Configure target refclk_hz */ | 560 | /* Configure target refclk_hz */ |
582 | param = ar->hw.refclk_hz; | 561 | status = ath6kl_bmi_write_hi32(ar, hi_refclk_hz, ar->hw.refclk_hz); |
583 | status = ath6kl_bmi_write(ar, | ||
584 | ath6kl_get_hi_item_addr(ar, | ||
585 | HI_ITEM(hi_refclk_hz)), | ||
586 | (u8 *)¶m, 4); | ||
587 | if (status) | 562 | if (status) |
588 | return status; | 563 | return status; |
589 | 564 | ||
@@ -1096,11 +1071,8 @@ static int ath6kl_upload_board_file(struct ath6kl *ar) | |||
1096 | * writing board data. | 1071 | * writing board data. |
1097 | */ | 1072 | */ |
1098 | if (ar->hw.board_addr != 0) { | 1073 | if (ar->hw.board_addr != 0) { |
1099 | board_address = ar->hw.board_addr; | 1074 | ath6kl_bmi_write_hi32(ar, hi_board_data, |
1100 | ath6kl_bmi_write(ar, | 1075 | ar->hw.board_addr); |
1101 | ath6kl_get_hi_item_addr(ar, | ||
1102 | HI_ITEM(hi_board_data)), | ||
1103 | (u8 *) &board_address, 4); | ||
1104 | } else { | 1076 | } else { |
1105 | ath6kl_bmi_read(ar, | 1077 | ath6kl_bmi_read(ar, |
1106 | ath6kl_get_hi_item_addr(ar, | 1078 | ath6kl_get_hi_item_addr(ar, |
@@ -1157,10 +1129,7 @@ static int ath6kl_upload_board_file(struct ath6kl *ar) | |||
1157 | /* record that extended board data is initialized */ | 1129 | /* record that extended board data is initialized */ |
1158 | param = (board_ext_data_size << 16) | 1; | 1130 | param = (board_ext_data_size << 16) | 1; |
1159 | 1131 | ||
1160 | ath6kl_bmi_write(ar, | 1132 | ath6kl_bmi_write_hi32(ar, hi_board_ext_data_config, param); |
1161 | ath6kl_get_hi_item_addr(ar, | ||
1162 | HI_ITEM(hi_board_ext_data_config)), | ||
1163 | (unsigned char *) ¶m, 4); | ||
1164 | } | 1133 | } |
1165 | 1134 | ||
1166 | if (ar->fw_board_len < board_data_size) { | 1135 | if (ar->fw_board_len < board_data_size) { |
@@ -1181,11 +1150,7 @@ static int ath6kl_upload_board_file(struct ath6kl *ar) | |||
1181 | } | 1150 | } |
1182 | 1151 | ||
1183 | /* record the fact that Board Data IS initialized */ | 1152 | /* record the fact that Board Data IS initialized */ |
1184 | param = 1; | 1153 | ath6kl_bmi_write_hi32(ar, hi_board_data_initialized, 1); |
1185 | ath6kl_bmi_write(ar, | ||
1186 | ath6kl_get_hi_item_addr(ar, | ||
1187 | HI_ITEM(hi_board_data_initialized)), | ||
1188 | (u8 *)¶m, 4); | ||
1189 | 1154 | ||
1190 | return ret; | 1155 | return ret; |
1191 | } | 1156 | } |
@@ -1273,7 +1238,7 @@ static int ath6kl_upload_firmware(struct ath6kl *ar) | |||
1273 | 1238 | ||
1274 | static int ath6kl_upload_patch(struct ath6kl *ar) | 1239 | static int ath6kl_upload_patch(struct ath6kl *ar) |
1275 | { | 1240 | { |
1276 | u32 address, param; | 1241 | u32 address; |
1277 | int ret; | 1242 | int ret; |
1278 | 1243 | ||
1279 | if (ar->fw_patch == NULL) | 1244 | if (ar->fw_patch == NULL) |
@@ -1290,18 +1255,14 @@ static int ath6kl_upload_patch(struct ath6kl *ar) | |||
1290 | return ret; | 1255 | return ret; |
1291 | } | 1256 | } |
1292 | 1257 | ||
1293 | param = address; | 1258 | ath6kl_bmi_write_hi32(ar, hi_dset_list_head, address); |
1294 | ath6kl_bmi_write(ar, | ||
1295 | ath6kl_get_hi_item_addr(ar, | ||
1296 | HI_ITEM(hi_dset_list_head)), | ||
1297 | (unsigned char *) ¶m, 4); | ||
1298 | 1259 | ||
1299 | return 0; | 1260 | return 0; |
1300 | } | 1261 | } |
1301 | 1262 | ||
1302 | static int ath6kl_upload_testscript(struct ath6kl *ar) | 1263 | static int ath6kl_upload_testscript(struct ath6kl *ar) |
1303 | { | 1264 | { |
1304 | u32 address, param; | 1265 | u32 address; |
1305 | int ret; | 1266 | int ret; |
1306 | 1267 | ||
1307 | if (ar->testmode != 2) | 1268 | if (ar->testmode != 2) |
@@ -1322,23 +1283,9 @@ static int ath6kl_upload_testscript(struct ath6kl *ar) | |||
1322 | return ret; | 1283 | return ret; |
1323 | } | 1284 | } |
1324 | 1285 | ||
1325 | param = address; | 1286 | ath6kl_bmi_write_hi32(ar, hi_ota_testscript, address); |
1326 | ath6kl_bmi_write(ar, | 1287 | ath6kl_bmi_write_hi32(ar, hi_end_ram_reserve_sz, 4096); |
1327 | ath6kl_get_hi_item_addr(ar, | 1288 | ath6kl_bmi_write_hi32(ar, hi_test_apps_related, 1); |
1328 | HI_ITEM(hi_ota_testscript)), | ||
1329 | (unsigned char *) ¶m, 4); | ||
1330 | |||
1331 | param = 4096; | ||
1332 | ath6kl_bmi_write(ar, | ||
1333 | ath6kl_get_hi_item_addr(ar, | ||
1334 | HI_ITEM(hi_end_ram_reserve_sz)), | ||
1335 | (unsigned char *) ¶m, 4); | ||
1336 | |||
1337 | param = 1; | ||
1338 | ath6kl_bmi_write(ar, | ||
1339 | ath6kl_get_hi_item_addr(ar, | ||
1340 | HI_ITEM(hi_test_apps_related)), | ||
1341 | (unsigned char *) ¶m, 4); | ||
1342 | 1289 | ||
1343 | return 0; | 1290 | return 0; |
1344 | } | 1291 | } |