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authorPavel Roskin <proski@gnu.org>2011-07-07 18:13:24 -0400
committerJohn W. Linville <linville@tuxdriver.com>2011-07-08 11:44:28 -0400
commit0a5d381348fcb12d27289b3a66824fb3481911ce (patch)
treefd5a1a8e52f71fcf342f9c145d3614cf788ef250 /drivers/net/wireless/ath/ath5k/reg.h
parentb988a887a448be479696544de31656754c133f30 (diff)
ath5k: replace spaces with tabs as suggested by checkpatch.pl
Signed-off-by: Pavel Roskin <proski@gnu.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath/ath5k/reg.h')
-rw-r--r--drivers/net/wireless/ath/ath5k/reg.h34
1 files changed, 17 insertions, 17 deletions
diff --git a/drivers/net/wireless/ath/ath5k/reg.h b/drivers/net/wireless/ath/ath5k/reg.h
index d12b827033c1..060a4c522ab2 100644
--- a/drivers/net/wireless/ath/ath5k/reg.h
+++ b/drivers/net/wireless/ath/ath5k/reg.h
@@ -72,7 +72,7 @@
72#define AR5K_CFG_SWRD 0x00000004 /* Byte-swap RX descriptor */ 72#define AR5K_CFG_SWRD 0x00000004 /* Byte-swap RX descriptor */
73#define AR5K_CFG_SWRB 0x00000008 /* Byte-swap RX buffer */ 73#define AR5K_CFG_SWRB 0x00000008 /* Byte-swap RX buffer */
74#define AR5K_CFG_SWRG 0x00000010 /* Byte-swap Register access */ 74#define AR5K_CFG_SWRG 0x00000010 /* Byte-swap Register access */
75#define AR5K_CFG_IBSS 0x00000020 /* 0-BSS, 1-IBSS [5211+] */ 75#define AR5K_CFG_IBSS 0x00000020 /* 0-BSS, 1-IBSS [5211+] */
76#define AR5K_CFG_PHY_OK 0x00000100 /* [5211+] */ 76#define AR5K_CFG_PHY_OK 0x00000100 /* [5211+] */
77#define AR5K_CFG_EEBS 0x00000200 /* EEPROM is busy */ 77#define AR5K_CFG_EEBS 0x00000200 /* EEPROM is busy */
78#define AR5K_CFG_CLKGD 0x00000400 /* Clock gated (Disable dynamic clock) */ 78#define AR5K_CFG_CLKGD 0x00000400 /* Clock gated (Disable dynamic clock) */
@@ -303,7 +303,7 @@
303#define AR5K_ISR_BRSSI 0x00020000 /* Beacon rssi below threshold (?) */ 303#define AR5K_ISR_BRSSI 0x00020000 /* Beacon rssi below threshold (?) */
304#define AR5K_ISR_BMISS 0x00040000 /* Beacon missed */ 304#define AR5K_ISR_BMISS 0x00040000 /* Beacon missed */
305#define AR5K_ISR_HIUERR 0x00080000 /* Host Interface Unit error [5211+] */ 305#define AR5K_ISR_HIUERR 0x00080000 /* Host Interface Unit error [5211+] */
306#define AR5K_ISR_BNR 0x00100000 /* Beacon not ready [5211+] */ 306#define AR5K_ISR_BNR 0x00100000 /* Beacon not ready [5211+] */
307#define AR5K_ISR_MCABT 0x00100000 /* Master Cycle Abort [5210] */ 307#define AR5K_ISR_MCABT 0x00100000 /* Master Cycle Abort [5210] */
308#define AR5K_ISR_RXCHIRP 0x00200000 /* CHIRP Received [5212+] */ 308#define AR5K_ISR_RXCHIRP 0x00200000 /* CHIRP Received [5212+] */
309#define AR5K_ISR_SSERR 0x00200000 /* Signaled System Error [5210] */ 309#define AR5K_ISR_SSERR 0x00200000 /* Signaled System Error [5210] */
@@ -397,7 +397,7 @@
397#define AR5K_IMR_BRSSI 0x00020000 /* Beacon rssi below threshold (?) */ 397#define AR5K_IMR_BRSSI 0x00020000 /* Beacon rssi below threshold (?) */
398#define AR5K_IMR_BMISS 0x00040000 /* Beacon missed*/ 398#define AR5K_IMR_BMISS 0x00040000 /* Beacon missed*/
399#define AR5K_IMR_HIUERR 0x00080000 /* Host Interface Unit error [5211+] */ 399#define AR5K_IMR_HIUERR 0x00080000 /* Host Interface Unit error [5211+] */
400#define AR5K_IMR_BNR 0x00100000 /* Beacon not ready [5211+] */ 400#define AR5K_IMR_BNR 0x00100000 /* Beacon not ready [5211+] */
401#define AR5K_IMR_MCABT 0x00100000 /* Master Cycle Abort [5210] */ 401#define AR5K_IMR_MCABT 0x00100000 /* Master Cycle Abort [5210] */
402#define AR5K_IMR_RXCHIRP 0x00200000 /* CHIRP Received [5212+]*/ 402#define AR5K_IMR_RXCHIRP 0x00200000 /* CHIRP Received [5212+]*/
403#define AR5K_IMR_SSERR 0x00200000 /* Signaled System Error [5210] */ 403#define AR5K_IMR_SSERR 0x00200000 /* Signaled System Error [5210] */
@@ -1328,16 +1328,16 @@
1328#define AR5K_RX_FILTER_5211 0x803c /* Register Address [5211+] */ 1328#define AR5K_RX_FILTER_5211 0x803c /* Register Address [5211+] */
1329#define AR5K_RX_FILTER (ah->ah_version == AR5K_AR5210 ? \ 1329#define AR5K_RX_FILTER (ah->ah_version == AR5K_AR5210 ? \
1330 AR5K_RX_FILTER_5210 : AR5K_RX_FILTER_5211) 1330 AR5K_RX_FILTER_5210 : AR5K_RX_FILTER_5211)
1331#define AR5K_RX_FILTER_UCAST 0x00000001 /* Don't filter unicast frames */ 1331#define AR5K_RX_FILTER_UCAST 0x00000001 /* Don't filter unicast frames */
1332#define AR5K_RX_FILTER_MCAST 0x00000002 /* Don't filter multicast frames */ 1332#define AR5K_RX_FILTER_MCAST 0x00000002 /* Don't filter multicast frames */
1333#define AR5K_RX_FILTER_BCAST 0x00000004 /* Don't filter broadcast frames */ 1333#define AR5K_RX_FILTER_BCAST 0x00000004 /* Don't filter broadcast frames */
1334#define AR5K_RX_FILTER_CONTROL 0x00000008 /* Don't filter control frames */ 1334#define AR5K_RX_FILTER_CONTROL 0x00000008 /* Don't filter control frames */
1335#define AR5K_RX_FILTER_BEACON 0x00000010 /* Don't filter beacon frames */ 1335#define AR5K_RX_FILTER_BEACON 0x00000010 /* Don't filter beacon frames */
1336#define AR5K_RX_FILTER_PROM 0x00000020 /* Set promiscuous mode */ 1336#define AR5K_RX_FILTER_PROM 0x00000020 /* Set promiscuous mode */
1337#define AR5K_RX_FILTER_XRPOLL 0x00000040 /* Don't filter XR poll frame [5212+] */ 1337#define AR5K_RX_FILTER_XRPOLL 0x00000040 /* Don't filter XR poll frame [5212+] */
1338#define AR5K_RX_FILTER_PROBEREQ 0x00000080 /* Don't filter probe requests [5212+] */ 1338#define AR5K_RX_FILTER_PROBEREQ 0x00000080 /* Don't filter probe requests [5212+] */
1339#define AR5K_RX_FILTER_PHYERR_5212 0x00000100 /* Don't filter phy errors [5212+] */ 1339#define AR5K_RX_FILTER_PHYERR_5212 0x00000100 /* Don't filter phy errors [5212+] */
1340#define AR5K_RX_FILTER_RADARERR_5212 0x00000200 /* Don't filter phy radar errors [5212+] */ 1340#define AR5K_RX_FILTER_RADARERR_5212 0x00000200 /* Don't filter phy radar errors [5212+] */
1341#define AR5K_RX_FILTER_PHYERR_5211 0x00000040 /* [5211] */ 1341#define AR5K_RX_FILTER_PHYERR_5211 0x00000040 /* [5211] */
1342#define AR5K_RX_FILTER_RADARERR_5211 0x00000080 /* [5211] */ 1342#define AR5K_RX_FILTER_RADARERR_5211 0x00000080 /* [5211] */
1343#define AR5K_RX_FILTER_PHYERR \ 1343#define AR5K_RX_FILTER_PHYERR \
@@ -1461,7 +1461,7 @@
1461 * ADDAC test register [5211+] 1461 * ADDAC test register [5211+]
1462 */ 1462 */
1463#define AR5K_ADDAC_TEST 0x8054 /* Register Address */ 1463#define AR5K_ADDAC_TEST 0x8054 /* Register Address */
1464#define AR5K_ADDAC_TEST_TXCONT 0x00000001 /* Test continuous tx */ 1464#define AR5K_ADDAC_TEST_TXCONT 0x00000001 /* Test continuous tx */
1465#define AR5K_ADDAC_TEST_TST_MODE 0x00000002 /* Test mode */ 1465#define AR5K_ADDAC_TEST_TST_MODE 0x00000002 /* Test mode */
1466#define AR5K_ADDAC_TEST_LOOP_EN 0x00000004 /* Enable loop */ 1466#define AR5K_ADDAC_TEST_LOOP_EN 0x00000004 /* Enable loop */
1467#define AR5K_ADDAC_TEST_LOOP_LEN 0x00000008 /* Loop length (field) */ 1467#define AR5K_ADDAC_TEST_LOOP_LEN 0x00000008 /* Loop length (field) */
@@ -2038,7 +2038,7 @@
2038#define AR5K_PHY_WEAK_OFDM_HIGH_THR_M2_S 24 2038#define AR5K_PHY_WEAK_OFDM_HIGH_THR_M2_S 24
2039 2039
2040/* Low thresholds */ 2040/* Low thresholds */
2041#define AR5K_PHY_WEAK_OFDM_LOW_THR 0x986c 2041#define AR5K_PHY_WEAK_OFDM_LOW_THR 0x986c
2042#define AR5K_PHY_WEAK_OFDM_LOW_THR_SELFCOR_EN 0x00000001 2042#define AR5K_PHY_WEAK_OFDM_LOW_THR_SELFCOR_EN 0x00000001
2043#define AR5K_PHY_WEAK_OFDM_LOW_THR_M2_COUNT 0x00003f00 2043#define AR5K_PHY_WEAK_OFDM_LOW_THR_M2_COUNT 0x00003f00
2044#define AR5K_PHY_WEAK_OFDM_LOW_THR_M2_COUNT_S 8 2044#define AR5K_PHY_WEAK_OFDM_LOW_THR_M2_COUNT_S 8
@@ -2281,22 +2281,22 @@
2281#define AR5K_PHY_RADAR 0x9954 2281#define AR5K_PHY_RADAR 0x9954
2282#define AR5K_PHY_RADAR_ENABLE 0x00000001 2282#define AR5K_PHY_RADAR_ENABLE 0x00000001
2283#define AR5K_PHY_RADAR_DISABLE 0x00000000 2283#define AR5K_PHY_RADAR_DISABLE 0x00000000
2284#define AR5K_PHY_RADAR_INBANDTHR 0x0000003e /* Inband threshold 2284#define AR5K_PHY_RADAR_INBANDTHR 0x0000003e /* Inband threshold
2285 5-bits, units unknown {0..31} 2285 5-bits, units unknown {0..31}
2286 (? MHz ?) */ 2286 (? MHz ?) */
2287#define AR5K_PHY_RADAR_INBANDTHR_S 1 2287#define AR5K_PHY_RADAR_INBANDTHR_S 1
2288 2288
2289#define AR5K_PHY_RADAR_PRSSI_THR 0x00000fc0 /* Pulse RSSI/SNR threshold 2289#define AR5K_PHY_RADAR_PRSSI_THR 0x00000fc0 /* Pulse RSSI/SNR threshold
2290 6-bits, dBm range {0..63} 2290 6-bits, dBm range {0..63}
2291 in dBm units. */ 2291 in dBm units. */
2292#define AR5K_PHY_RADAR_PRSSI_THR_S 6 2292#define AR5K_PHY_RADAR_PRSSI_THR_S 6
2293 2293
2294#define AR5K_PHY_RADAR_PHEIGHT_THR 0x0003f000 /* Pulse height threshold 2294#define AR5K_PHY_RADAR_PHEIGHT_THR 0x0003f000 /* Pulse height threshold
2295 6-bits, dBm range {0..63} 2295 6-bits, dBm range {0..63}
2296 in dBm units. */ 2296 in dBm units. */
2297#define AR5K_PHY_RADAR_PHEIGHT_THR_S 12 2297#define AR5K_PHY_RADAR_PHEIGHT_THR_S 12
2298 2298
2299#define AR5K_PHY_RADAR_RSSI_THR 0x00fc0000 /* Radar RSSI/SNR threshold. 2299#define AR5K_PHY_RADAR_RSSI_THR 0x00fc0000 /* Radar RSSI/SNR threshold.
2300 6-bits, dBm range {0..63} 2300 6-bits, dBm range {0..63}
2301 in dBm units. */ 2301 in dBm units. */
2302#define AR5K_PHY_RADAR_RSSI_THR_S 18 2302#define AR5K_PHY_RADAR_RSSI_THR_S 18