ath5k: Beaconing fixes

* Write next beacon timer even on AP mode since without this we get
 no beacons + ath9k does it too.  Docs say that we must write 0 on
 this register on AP mode to start TSF increment, we do both to be
 on the safe side.

 * Fix num_tx_pending function, we never read the register :P that's
 why we got all those "beacon queue 7 didn't stop messages".

 * Put full prioriy on beacon queue, lock all queues with lower
 priority using the arblock and also bypass any arblock by seting
 the arblock ignore flag.

 * For the CAB queue (do we need this thing ?, it seems crap) since
 it's supposed to fire up after each beacon (we don't use it on driver
 part, ath9k/MadWiFi does), don't make it DBA gated but instead make
 it fire after each beacon by using the beacon sent gated flag.

 * Increase bmiss threshold to 10, that's what we used on MadWiFi for
 a long time. Also when we have pending frames on the beacon queue (we
 got a beacon that didn't make it on the air) it's more likely that
 the beacon queue never started, probably due to faulty DBA setting,
 so change that "beacon queue didn't stop" message.

 Tested this with AP mode and IBSS mode and seems to work fine ;-)

 Signed-off-by: Nick Kossifidis <mickflemm@gmail.com>
 Signed-off-by: Bob Copeland <me@bobcopeland.com>

Signed-off-by: John W. Linville <linville@tuxdriver.com>

1 files changed, 2 insertions, 2 deletions

diff --git a/drivers/net/wireless/ath/ath5k/pcu.c b/drivers/net/wireless/ath/ath5k/pcu.c
index 5f07e876d4bd..579aa0a96ab8 100644
--- a/drivers/net/wireless/ath/ath5k/pcu.c
+++ b/drivers/net/wireless/ath/ath5k/pcu.c
@@ -736,8 +736,8 @@ void ath5k_hw_init_beacon(struct ath5k_hw *ah, u32 next_beacon, u32 interval)
         /* When in AP mode zero timer0 to start TSF */
         if (ah->ah_op_mode == NL80211_IFTYPE_AP)
                 ath5k_hw_reg_write(ah, 0, AR5K_TIMER0);
-        else
-                ath5k_hw_reg_write(ah, next_beacon, AR5K_TIMER0);
+
+        ath5k_hw_reg_write(ah, next_beacon, AR5K_TIMER0);
         ath5k_hw_reg_write(ah, timer1, AR5K_TIMER1);
         ath5k_hw_reg_write(ah, timer2, AR5K_TIMER2);
         ath5k_hw_reg_write(ah, timer3, AR5K_TIMER3);