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authorJon Mason <jon.mason@exar.com>2010-11-10 23:25:56 -0500
committerDavid S. Miller <davem@davemloft.net>2010-11-11 12:30:20 -0500
commit8424e00dfd5282026a93996a165fc4079d382169 (patch)
treec427a353c8859c77b642d683e2911afb3a7d3afd /drivers/net/vxge/vxge-config.c
parentddd62726e0bc1ffe0ab791b647f4178161ab451b (diff)
vxge: serialize access to steering control register
It is possible for multiple callers to access the firmware interface for the same vpath simultaneously, resulting in uncertain output. Add locks to serialize access. Also, make functions only accessed locally static, thus requiring some movement of code blocks. Signed-off-by: Jon Mason <jon.mason@exar.com> Signed-off-by: Ram Vepa <ram.vepa@exar.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/vxge/vxge-config.c')
-rw-r--r--drivers/net/vxge/vxge-config.c807
1 files changed, 324 insertions, 483 deletions
diff --git a/drivers/net/vxge/vxge-config.c b/drivers/net/vxge/vxge-config.c
index 212e301bdd68..c822463faf01 100644
--- a/drivers/net/vxge/vxge-config.c
+++ b/drivers/net/vxge/vxge-config.c
@@ -19,6 +19,7 @@
19 19
20#include "vxge-traffic.h" 20#include "vxge-traffic.h"
21#include "vxge-config.h" 21#include "vxge-config.h"
22#include "vxge-main.h"
22 23
23static enum vxge_hw_status 24static enum vxge_hw_status
24__vxge_hw_fifo_create( 25__vxge_hw_fifo_create(
@@ -104,12 +105,6 @@ static void
104__vxge_hw_device_host_info_get(struct __vxge_hw_device *hldev); 105__vxge_hw_device_host_info_get(struct __vxge_hw_device *hldev);
105 106
106static enum vxge_hw_status 107static enum vxge_hw_status
107__vxge_hw_vpath_card_info_get(
108 u32 vp_id,
109 struct vxge_hw_vpath_reg __iomem *vpath_reg,
110 struct vxge_hw_device_hw_info *hw_info);
111
112static enum vxge_hw_status
113__vxge_hw_device_initialize(struct __vxge_hw_device *hldev); 108__vxge_hw_device_initialize(struct __vxge_hw_device *hldev);
114 109
115static void 110static void
@@ -153,17 +148,6 @@ vxge_hw_vpath_stats_enable(struct __vxge_hw_vpath_handle *vpath_handle);
153static enum vxge_hw_status 148static enum vxge_hw_status
154__vxge_hw_legacy_swapper_set(struct vxge_hw_legacy_reg __iomem *legacy_reg); 149__vxge_hw_legacy_swapper_set(struct vxge_hw_legacy_reg __iomem *legacy_reg);
155 150
156static u64
157__vxge_hw_vpath_pci_func_mode_get(u32 vp_id,
158 struct vxge_hw_vpath_reg __iomem *vpath_reg);
159
160static u32
161__vxge_hw_vpath_func_id_get(u32 vp_id, struct vxge_hw_vpmgmt_reg __iomem *vpmgmt_reg);
162
163static enum vxge_hw_status
164__vxge_hw_vpath_addr_get(u32 vp_id, struct vxge_hw_vpath_reg __iomem *vpath_reg,
165 u8 (macaddr)[ETH_ALEN], u8 (macaddr_mask)[ETH_ALEN]);
166
167static enum vxge_hw_status 151static enum vxge_hw_status
168__vxge_hw_vpath_reset_check(struct __vxge_hw_virtualpath *vpath); 152__vxge_hw_vpath_reset_check(struct __vxge_hw_virtualpath *vpath);
169 153
@@ -171,9 +155,6 @@ __vxge_hw_vpath_reset_check(struct __vxge_hw_virtualpath *vpath);
171static enum vxge_hw_status 155static enum vxge_hw_status
172__vxge_hw_vpath_sw_reset(struct __vxge_hw_device *devh, u32 vp_id); 156__vxge_hw_vpath_sw_reset(struct __vxge_hw_device *devh, u32 vp_id);
173 157
174static enum vxge_hw_status
175__vxge_hw_vpath_fw_ver_get(u32 vp_id, struct vxge_hw_vpath_reg __iomem *vpath_reg,
176 struct vxge_hw_device_hw_info *hw_info);
177 158
178static enum vxge_hw_status 159static enum vxge_hw_status
179__vxge_hw_vpath_mac_configure(struct __vxge_hw_device *devh, u32 vp_id); 160__vxge_hw_vpath_mac_configure(struct __vxge_hw_device *devh, u32 vp_id);
@@ -275,6 +256,72 @@ void vxge_hw_device_wait_receive_idle(struct __vxge_hw_device *hldev)
275 } 256 }
276} 257}
277 258
259static enum vxge_hw_status
260vxge_hw_vpath_fw_api(struct __vxge_hw_virtualpath *vpath, u32 action,
261 u32 fw_memo, u32 offset, u64 *data0, u64 *data1,
262 u64 *steer_ctrl)
263{
264 struct vxge_hw_vpath_reg __iomem *vp_reg;
265 enum vxge_hw_status status;
266 u64 val64;
267 u32 retry = 0, max_retry = 100;
268
269 vp_reg = vpath->vp_reg;
270
271 if (vpath->vp_open) {
272 max_retry = 3;
273 spin_lock(&vpath->lock);
274 }
275
276 writeq(*data0, &vp_reg->rts_access_steer_data0);
277 writeq(*data1, &vp_reg->rts_access_steer_data1);
278 wmb();
279
280 val64 = VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION(action) |
281 VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL(fw_memo) |
282 VXGE_HW_RTS_ACCESS_STEER_CTRL_OFFSET(offset) |
283 VXGE_HW_RTS_ACCESS_STEER_CTRL_STROBE |
284 *steer_ctrl;
285
286 status = __vxge_hw_pio_mem_write64(val64,
287 &vp_reg->rts_access_steer_ctrl,
288 VXGE_HW_RTS_ACCESS_STEER_CTRL_STROBE,
289 VXGE_HW_DEF_DEVICE_POLL_MILLIS);
290
291 /* The __vxge_hw_device_register_poll can udelay for a significant
292 * amount of time, blocking other proccess from the CPU. If it delays
293 * for ~5secs, a NMI error can occur. A way around this is to give up
294 * the processor via msleep, but this is not allowed is under lock.
295 * So, only allow it to sleep for ~4secs if open. Otherwise, delay for
296 * 1sec and sleep for 10ms until the firmware operation has completed
297 * or timed-out.
298 */
299 while ((status != VXGE_HW_OK) && retry++ < max_retry) {
300 if (!vpath->vp_open)
301 msleep(20);
302 status = __vxge_hw_device_register_poll(
303 &vp_reg->rts_access_steer_ctrl,
304 VXGE_HW_RTS_ACCESS_STEER_CTRL_STROBE,
305 VXGE_HW_DEF_DEVICE_POLL_MILLIS);
306 }
307
308 if (status != VXGE_HW_OK)
309 goto out;
310
311 val64 = readq(&vp_reg->rts_access_steer_ctrl);
312 if (val64 & VXGE_HW_RTS_ACCESS_STEER_CTRL_RMACJ_STATUS) {
313 *data0 = readq(&vp_reg->rts_access_steer_data0);
314 *data1 = readq(&vp_reg->rts_access_steer_data1);
315 *steer_ctrl = val64;
316 } else
317 status = VXGE_HW_FAIL;
318
319out:
320 if (vpath->vp_open)
321 spin_unlock(&vpath->lock);
322 return status;
323}
324
278/* 325/*
279 * __vxge_hw_channel_allocate - Allocate memory for channel 326 * __vxge_hw_channel_allocate - Allocate memory for channel
280 * This function allocates required memory for the channel and various arrays 327 * This function allocates required memory for the channel and various arrays
@@ -650,10 +697,25 @@ __vxge_hw_device_is_privilaged(u32 host_type, u32 func_id)
650} 697}
651 698
652/* 699/*
700 * __vxge_hw_vpath_func_id_get - Get the function id of the vpath.
701 * Returns the function number of the vpath.
702 */
703static u32
704__vxge_hw_vpath_func_id_get(struct vxge_hw_vpmgmt_reg __iomem *vpmgmt_reg)
705{
706 u64 val64;
707
708 val64 = readq(&vpmgmt_reg->vpath_to_func_map_cfg1);
709
710 return
711 (u32)VXGE_HW_VPATH_TO_FUNC_MAP_CFG1_GET_VPATH_TO_FUNC_MAP_CFG1(val64);
712}
713
714/*
653 * __vxge_hw_device_host_info_get 715 * __vxge_hw_device_host_info_get
654 * This routine returns the host type assignments 716 * This routine returns the host type assignments
655 */ 717 */
656void __vxge_hw_device_host_info_get(struct __vxge_hw_device *hldev) 718static void __vxge_hw_device_host_info_get(struct __vxge_hw_device *hldev)
657{ 719{
658 u64 val64; 720 u64 val64;
659 u32 i; 721 u32 i;
@@ -666,16 +728,18 @@ void __vxge_hw_device_host_info_get(struct __vxge_hw_device *hldev)
666 hldev->vpath_assignments = readq(&hldev->common_reg->vpath_assignments); 728 hldev->vpath_assignments = readq(&hldev->common_reg->vpath_assignments);
667 729
668 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) { 730 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
669
670 if (!(hldev->vpath_assignments & vxge_mBIT(i))) 731 if (!(hldev->vpath_assignments & vxge_mBIT(i)))
671 continue; 732 continue;
672 733
673 hldev->func_id = 734 hldev->func_id =
674 __vxge_hw_vpath_func_id_get(i, hldev->vpmgmt_reg[i]); 735 __vxge_hw_vpath_func_id_get(hldev->vpmgmt_reg[i]);
675 736
676 hldev->access_rights = __vxge_hw_device_access_rights_get( 737 hldev->access_rights = __vxge_hw_device_access_rights_get(
677 hldev->host_type, hldev->func_id); 738 hldev->host_type, hldev->func_id);
678 739
740 hldev->virtual_paths[i].vp_open = VXGE_HW_VP_NOT_OPEN;
741 hldev->virtual_paths[i].vp_reg = hldev->vpath_reg[i];
742
679 hldev->first_vp_id = i; 743 hldev->first_vp_id = i;
680 break; 744 break;
681 } 745 }
@@ -732,6 +796,192 @@ exit:
732 return status; 796 return status;
733} 797}
734 798
799/*
800 * __vxge_hw_vpath_fw_ver_get - Get the fw version
801 * Returns FW Version
802 */
803static enum vxge_hw_status
804__vxge_hw_vpath_fw_ver_get(struct __vxge_hw_virtualpath *vpath,
805 struct vxge_hw_device_hw_info *hw_info)
806{
807 struct vxge_hw_device_version *fw_version = &hw_info->fw_version;
808 struct vxge_hw_device_date *fw_date = &hw_info->fw_date;
809 struct vxge_hw_device_version *flash_version = &hw_info->flash_version;
810 struct vxge_hw_device_date *flash_date = &hw_info->flash_date;
811 u64 data0, data1 = 0, steer_ctrl = 0;
812 enum vxge_hw_status status;
813
814 status = vxge_hw_vpath_fw_api(vpath,
815 VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION_READ_ENTRY,
816 VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_FW_MEMO,
817 0, &data0, &data1, &steer_ctrl);
818 if (status != VXGE_HW_OK)
819 goto exit;
820
821 fw_date->day =
822 (u32) VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_FW_VER_DAY(data0);
823 fw_date->month =
824 (u32) VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_FW_VER_MONTH(data0);
825 fw_date->year =
826 (u32) VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_FW_VER_YEAR(data0);
827
828 snprintf(fw_date->date, VXGE_HW_FW_STRLEN, "%2.2d/%2.2d/%4.4d",
829 fw_date->month, fw_date->day, fw_date->year);
830
831 fw_version->major =
832 (u32) VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_FW_VER_MAJOR(data0);
833 fw_version->minor =
834 (u32) VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_FW_VER_MINOR(data0);
835 fw_version->build =
836 (u32) VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_FW_VER_BUILD(data0);
837
838 snprintf(fw_version->version, VXGE_HW_FW_STRLEN, "%d.%d.%d",
839 fw_version->major, fw_version->minor, fw_version->build);
840
841 flash_date->day =
842 (u32) VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_FLASH_VER_DAY(data1);
843 flash_date->month =
844 (u32) VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_FLASH_VER_MONTH(data1);
845 flash_date->year =
846 (u32) VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_FLASH_VER_YEAR(data1);
847
848 snprintf(flash_date->date, VXGE_HW_FW_STRLEN, "%2.2d/%2.2d/%4.4d",
849 flash_date->month, flash_date->day, flash_date->year);
850
851 flash_version->major =
852 (u32) VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_FLASH_VER_MAJOR(data1);
853 flash_version->minor =
854 (u32) VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_FLASH_VER_MINOR(data1);
855 flash_version->build =
856 (u32) VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_FLASH_VER_BUILD(data1);
857
858 snprintf(flash_version->version, VXGE_HW_FW_STRLEN, "%d.%d.%d",
859 flash_version->major, flash_version->minor,
860 flash_version->build);
861
862exit:
863 return status;
864}
865
866/*
867 * __vxge_hw_vpath_card_info_get - Get the serial numbers,
868 * part number and product description.
869 */
870static enum vxge_hw_status
871__vxge_hw_vpath_card_info_get(struct __vxge_hw_virtualpath *vpath,
872 struct vxge_hw_device_hw_info *hw_info)
873{
874 enum vxge_hw_status status;
875 u64 data0, data1 = 0, steer_ctrl = 0;
876 u8 *serial_number = hw_info->serial_number;
877 u8 *part_number = hw_info->part_number;
878 u8 *product_desc = hw_info->product_desc;
879 u32 i, j = 0;
880
881 data0 = VXGE_HW_RTS_ACCESS_STEER_DATA0_MEMO_ITEM_SERIAL_NUMBER;
882
883 status = vxge_hw_vpath_fw_api(vpath,
884 VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION_READ_MEMO_ENTRY,
885 VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_FW_MEMO,
886 0, &data0, &data1, &steer_ctrl);
887 if (status != VXGE_HW_OK)
888 return status;
889
890 ((u64 *)serial_number)[0] = be64_to_cpu(data0);
891 ((u64 *)serial_number)[1] = be64_to_cpu(data1);
892
893 data0 = VXGE_HW_RTS_ACCESS_STEER_DATA0_MEMO_ITEM_PART_NUMBER;
894 data1 = steer_ctrl = 0;
895
896 status = vxge_hw_vpath_fw_api(vpath,
897 VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION_READ_MEMO_ENTRY,
898 VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_FW_MEMO,
899 0, &data0, &data1, &steer_ctrl);
900 if (status != VXGE_HW_OK)
901 return status;
902
903 ((u64 *)part_number)[0] = be64_to_cpu(data0);
904 ((u64 *)part_number)[1] = be64_to_cpu(data1);
905
906 for (i = VXGE_HW_RTS_ACCESS_STEER_DATA0_MEMO_ITEM_DESC_0;
907 i <= VXGE_HW_RTS_ACCESS_STEER_DATA0_MEMO_ITEM_DESC_3; i++) {
908 data0 = i;
909 data1 = steer_ctrl = 0;
910
911 status = vxge_hw_vpath_fw_api(vpath,
912 VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION_READ_MEMO_ENTRY,
913 VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_FW_MEMO,
914 0, &data0, &data1, &steer_ctrl);
915 if (status != VXGE_HW_OK)
916 return status;
917
918 ((u64 *)product_desc)[j++] = be64_to_cpu(data0);
919 ((u64 *)product_desc)[j++] = be64_to_cpu(data1);
920 }
921
922 return status;
923}
924
925/*
926 * __vxge_hw_vpath_pci_func_mode_get - Get the pci mode
927 * Returns pci function mode
928 */
929static u64
930__vxge_hw_vpath_pci_func_mode_get(struct __vxge_hw_virtualpath *vpath)
931{
932 u64 data0, data1 = 0, steer_ctrl = 0;
933 enum vxge_hw_status status;
934
935 data0 = VXGE_HW_RTS_ACCESS_STEER_DATA0_MEMO_ITEM_PCI_MODE;
936
937 status = vxge_hw_vpath_fw_api(vpath,
938 VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION_READ_MEMO_ENTRY,
939 VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_FW_MEMO,
940 0, &data0, &data1, &steer_ctrl);
941
942 return data0;
943}
944
945/*
946 * __vxge_hw_vpath_addr_get - Get the hw address entry for this vpath
947 * from MAC address table.
948 */
949static enum vxge_hw_status
950__vxge_hw_vpath_addr_get(struct __vxge_hw_virtualpath *vpath,
951 u8 *macaddr, u8 *macaddr_mask)
952{
953 u64 action = VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION_LIST_FIRST_ENTRY,
954 data0 = 0, data1 = 0, steer_ctrl = 0;
955 enum vxge_hw_status status;
956 int i;
957
958 do {
959 status = vxge_hw_vpath_fw_api(vpath, action,
960 VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_DA,
961 0, &data0, &data1, &steer_ctrl);
962 if (status != VXGE_HW_OK)
963 goto exit;
964
965 data0 = VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_DA_MAC_ADDR(data0);
966 data1 = VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_DA_MAC_ADDR_MASK(
967 data1);
968
969 for (i = ETH_ALEN; i > 0; i--) {
970 macaddr[i - 1] = (u8) (data0 & 0xFF);
971 data0 >>= 8;
972
973 macaddr_mask[i - 1] = (u8) (data1 & 0xFF);
974 data1 >>= 8;
975 }
976
977 action = VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION_LIST_NEXT_ENTRY;
978 data0 = 0, data1 = 0, steer_ctrl = 0;
979
980 } while (!is_valid_ether_addr(macaddr));
981exit:
982 return status;
983}
984
735/** 985/**
736 * vxge_hw_device_hw_info_get - Get the hw information 986 * vxge_hw_device_hw_info_get - Get the hw information
737 * Returns the vpath mask that has the bits set for each vpath allocated 987 * Returns the vpath mask that has the bits set for each vpath allocated
@@ -747,9 +997,9 @@ vxge_hw_device_hw_info_get(void __iomem *bar0,
747 struct vxge_hw_toc_reg __iomem *toc; 997 struct vxge_hw_toc_reg __iomem *toc;
748 struct vxge_hw_mrpcim_reg __iomem *mrpcim_reg; 998 struct vxge_hw_mrpcim_reg __iomem *mrpcim_reg;
749 struct vxge_hw_common_reg __iomem *common_reg; 999 struct vxge_hw_common_reg __iomem *common_reg;
750 struct vxge_hw_vpath_reg __iomem *vpath_reg;
751 struct vxge_hw_vpmgmt_reg __iomem *vpmgmt_reg; 1000 struct vxge_hw_vpmgmt_reg __iomem *vpmgmt_reg;
752 enum vxge_hw_status status; 1001 enum vxge_hw_status status;
1002 struct __vxge_hw_virtualpath vpath;
753 1003
754 memset(hw_info, 0, sizeof(struct vxge_hw_device_hw_info)); 1004 memset(hw_info, 0, sizeof(struct vxge_hw_device_hw_info));
755 1005
@@ -784,7 +1034,7 @@ vxge_hw_device_hw_info_get(void __iomem *bar0,
784 vpmgmt_reg = (struct vxge_hw_vpmgmt_reg __iomem *) 1034 vpmgmt_reg = (struct vxge_hw_vpmgmt_reg __iomem *)
785 (bar0 + val64); 1035 (bar0 + val64);
786 1036
787 hw_info->func_id = __vxge_hw_vpath_func_id_get(i, vpmgmt_reg); 1037 hw_info->func_id = __vxge_hw_vpath_func_id_get(vpmgmt_reg);
788 if (__vxge_hw_device_access_rights_get(hw_info->host_type, 1038 if (__vxge_hw_device_access_rights_get(hw_info->host_type,
789 hw_info->func_id) & 1039 hw_info->func_id) &
790 VXGE_HW_DEVICE_ACCESS_RIGHT_MRPCIM) { 1040 VXGE_HW_DEVICE_ACCESS_RIGHT_MRPCIM) {
@@ -800,16 +1050,18 @@ vxge_hw_device_hw_info_get(void __iomem *bar0,
800 1050
801 val64 = readq(&toc->toc_vpath_pointer[i]); 1051 val64 = readq(&toc->toc_vpath_pointer[i]);
802 1052
803 vpath_reg = (struct vxge_hw_vpath_reg __iomem *)(bar0 + val64); 1053 vpath.vp_reg = (struct vxge_hw_vpath_reg __iomem *)
1054 (bar0 + val64);
1055 vpath.vp_open = 0;
804 1056
805 hw_info->function_mode = 1057 hw_info->function_mode =
806 __vxge_hw_vpath_pci_func_mode_get(i, vpath_reg); 1058 __vxge_hw_vpath_pci_func_mode_get(&vpath);
807 1059
808 status = __vxge_hw_vpath_fw_ver_get(i, vpath_reg, hw_info); 1060 status = __vxge_hw_vpath_fw_ver_get(&vpath, hw_info);
809 if (status != VXGE_HW_OK) 1061 if (status != VXGE_HW_OK)
810 goto exit; 1062 goto exit;
811 1063
812 status = __vxge_hw_vpath_card_info_get(i, vpath_reg, hw_info); 1064 status = __vxge_hw_vpath_card_info_get(&vpath, hw_info);
813 if (status != VXGE_HW_OK) 1065 if (status != VXGE_HW_OK)
814 goto exit; 1066 goto exit;
815 1067
@@ -817,14 +1069,15 @@ vxge_hw_device_hw_info_get(void __iomem *bar0,
817 } 1069 }
818 1070
819 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) { 1071 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
820
821 if (!((hw_info->vpath_mask) & vxge_mBIT(i))) 1072 if (!((hw_info->vpath_mask) & vxge_mBIT(i)))
822 continue; 1073 continue;
823 1074
824 val64 = readq(&toc->toc_vpath_pointer[i]); 1075 val64 = readq(&toc->toc_vpath_pointer[i]);
825 vpath_reg = (struct vxge_hw_vpath_reg __iomem *)(bar0 + val64); 1076 vpath.vp_reg = (struct vxge_hw_vpath_reg __iomem *)
1077 (bar0 + val64);
1078 vpath.vp_open = 0;
826 1079
827 status = __vxge_hw_vpath_addr_get(i, vpath_reg, 1080 status = __vxge_hw_vpath_addr_get(&vpath,
828 hw_info->mac_addrs[i], 1081 hw_info->mac_addrs[i],
829 hw_info->mac_addr_masks[i]); 1082 hw_info->mac_addr_masks[i]);
830 if (status != VXGE_HW_OK) 1083 if (status != VXGE_HW_OK)
@@ -896,7 +1149,6 @@ vxge_hw_device_initialize(
896 nblocks++; 1149 nblocks++;
897 1150
898 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) { 1151 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
899
900 if (!(hldev->vpath_assignments & vxge_mBIT(i))) 1152 if (!(hldev->vpath_assignments & vxge_mBIT(i)))
901 continue; 1153 continue;
902 1154
@@ -921,7 +1173,6 @@ vxge_hw_device_initialize(
921 } 1173 }
922 1174
923 status = __vxge_hw_device_initialize(hldev); 1175 status = __vxge_hw_device_initialize(hldev);
924
925 if (status != VXGE_HW_OK) { 1176 if (status != VXGE_HW_OK) {
926 vxge_hw_device_terminate(hldev); 1177 vxge_hw_device_terminate(hldev);
927 goto exit; 1178 goto exit;
@@ -958,7 +1209,6 @@ vxge_hw_device_stats_get(struct __vxge_hw_device *hldev,
958 enum vxge_hw_status status = VXGE_HW_OK; 1209 enum vxge_hw_status status = VXGE_HW_OK;
959 1210
960 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) { 1211 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
961
962 if (!(hldev->vpaths_deployed & vxge_mBIT(i)) || 1212 if (!(hldev->vpaths_deployed & vxge_mBIT(i)) ||
963 (hldev->virtual_paths[i].vp_open == 1213 (hldev->virtual_paths[i].vp_open ==
964 VXGE_HW_VP_NOT_OPEN)) 1214 VXGE_HW_VP_NOT_OPEN))
@@ -2755,297 +3005,6 @@ exit:
2755 return status; 3005 return status;
2756} 3006}
2757 3007
2758/*
2759 * __vxge_hw_vpath_func_id_get - Get the function id of the vpath.
2760 * Returns the function number of the vpath.
2761 */
2762static u32
2763__vxge_hw_vpath_func_id_get(u32 vp_id,
2764 struct vxge_hw_vpmgmt_reg __iomem *vpmgmt_reg)
2765{
2766 u64 val64;
2767
2768 val64 = readq(&vpmgmt_reg->vpath_to_func_map_cfg1);
2769
2770 return
2771 (u32)VXGE_HW_VPATH_TO_FUNC_MAP_CFG1_GET_VPATH_TO_FUNC_MAP_CFG1(val64);
2772}
2773
2774/*
2775 * __vxge_hw_read_rts_ds - Program RTS steering critieria
2776 */
2777static inline void
2778__vxge_hw_read_rts_ds(struct vxge_hw_vpath_reg __iomem *vpath_reg,
2779 u64 dta_struct_sel)
2780{
2781 writeq(0, &vpath_reg->rts_access_steer_ctrl);
2782 wmb();
2783 writeq(dta_struct_sel, &vpath_reg->rts_access_steer_data0);
2784 writeq(0, &vpath_reg->rts_access_steer_data1);
2785 wmb();
2786}
2787
2788
2789/*
2790 * __vxge_hw_vpath_card_info_get - Get the serial numbers,
2791 * part number and product description.
2792 */
2793static enum vxge_hw_status
2794__vxge_hw_vpath_card_info_get(
2795 u32 vp_id,
2796 struct vxge_hw_vpath_reg __iomem *vpath_reg,
2797 struct vxge_hw_device_hw_info *hw_info)
2798{
2799 u32 i, j;
2800 u64 val64;
2801 u64 data1 = 0ULL;
2802 u64 data2 = 0ULL;
2803 enum vxge_hw_status status = VXGE_HW_OK;
2804 u8 *serial_number = hw_info->serial_number;
2805 u8 *part_number = hw_info->part_number;
2806 u8 *product_desc = hw_info->product_desc;
2807
2808 __vxge_hw_read_rts_ds(vpath_reg,
2809 VXGE_HW_RTS_ACCESS_STEER_DATA0_MEMO_ITEM_SERIAL_NUMBER);
2810
2811 val64 = VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION(
2812 VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION_READ_MEMO_ENTRY) |
2813 VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL(
2814 VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_FW_MEMO) |
2815 VXGE_HW_RTS_ACCESS_STEER_CTRL_STROBE |
2816 VXGE_HW_RTS_ACCESS_STEER_CTRL_OFFSET(0);
2817
2818 status = __vxge_hw_pio_mem_write64(val64,
2819 &vpath_reg->rts_access_steer_ctrl,
2820 VXGE_HW_RTS_ACCESS_STEER_CTRL_STROBE,
2821 VXGE_HW_DEF_DEVICE_POLL_MILLIS);
2822
2823 if (status != VXGE_HW_OK)
2824 return status;
2825
2826 val64 = readq(&vpath_reg->rts_access_steer_ctrl);
2827
2828 if (val64 & VXGE_HW_RTS_ACCESS_STEER_CTRL_RMACJ_STATUS) {
2829 data1 = readq(&vpath_reg->rts_access_steer_data0);
2830 ((u64 *)serial_number)[0] = be64_to_cpu(data1);
2831
2832 data2 = readq(&vpath_reg->rts_access_steer_data1);
2833 ((u64 *)serial_number)[1] = be64_to_cpu(data2);
2834 status = VXGE_HW_OK;
2835 } else
2836 *serial_number = 0;
2837
2838 __vxge_hw_read_rts_ds(vpath_reg,
2839 VXGE_HW_RTS_ACCESS_STEER_DATA0_MEMO_ITEM_PART_NUMBER);
2840
2841 val64 = VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION(
2842 VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION_READ_MEMO_ENTRY) |
2843 VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL(
2844 VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_FW_MEMO) |
2845 VXGE_HW_RTS_ACCESS_STEER_CTRL_STROBE |
2846 VXGE_HW_RTS_ACCESS_STEER_CTRL_OFFSET(0);
2847
2848 status = __vxge_hw_pio_mem_write64(val64,
2849 &vpath_reg->rts_access_steer_ctrl,
2850 VXGE_HW_RTS_ACCESS_STEER_CTRL_STROBE,
2851 VXGE_HW_DEF_DEVICE_POLL_MILLIS);
2852
2853 if (status != VXGE_HW_OK)
2854 return status;
2855
2856 val64 = readq(&vpath_reg->rts_access_steer_ctrl);
2857
2858 if (val64 & VXGE_HW_RTS_ACCESS_STEER_CTRL_RMACJ_STATUS) {
2859
2860 data1 = readq(&vpath_reg->rts_access_steer_data0);
2861 ((u64 *)part_number)[0] = be64_to_cpu(data1);
2862
2863 data2 = readq(&vpath_reg->rts_access_steer_data1);
2864 ((u64 *)part_number)[1] = be64_to_cpu(data2);
2865
2866 status = VXGE_HW_OK;
2867
2868 } else
2869 *part_number = 0;
2870
2871 j = 0;
2872
2873 for (i = VXGE_HW_RTS_ACCESS_STEER_DATA0_MEMO_ITEM_DESC_0;
2874 i <= VXGE_HW_RTS_ACCESS_STEER_DATA0_MEMO_ITEM_DESC_3; i++) {
2875
2876 __vxge_hw_read_rts_ds(vpath_reg, i);
2877
2878 val64 = VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION(
2879 VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION_READ_MEMO_ENTRY) |
2880 VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL(
2881 VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_FW_MEMO) |
2882 VXGE_HW_RTS_ACCESS_STEER_CTRL_STROBE |
2883 VXGE_HW_RTS_ACCESS_STEER_CTRL_OFFSET(0);
2884
2885 status = __vxge_hw_pio_mem_write64(val64,
2886 &vpath_reg->rts_access_steer_ctrl,
2887 VXGE_HW_RTS_ACCESS_STEER_CTRL_STROBE,
2888 VXGE_HW_DEF_DEVICE_POLL_MILLIS);
2889
2890 if (status != VXGE_HW_OK)
2891 return status;
2892
2893 val64 = readq(&vpath_reg->rts_access_steer_ctrl);
2894
2895 if (val64 & VXGE_HW_RTS_ACCESS_STEER_CTRL_RMACJ_STATUS) {
2896
2897 data1 = readq(&vpath_reg->rts_access_steer_data0);
2898 ((u64 *)product_desc)[j++] = be64_to_cpu(data1);
2899
2900 data2 = readq(&vpath_reg->rts_access_steer_data1);
2901 ((u64 *)product_desc)[j++] = be64_to_cpu(data2);
2902
2903 status = VXGE_HW_OK;
2904 } else
2905 *product_desc = 0;
2906 }
2907
2908 return status;
2909}
2910
2911/*
2912 * __vxge_hw_vpath_fw_ver_get - Get the fw version
2913 * Returns FW Version
2914 */
2915static enum vxge_hw_status
2916__vxge_hw_vpath_fw_ver_get(
2917 u32 vp_id,
2918 struct vxge_hw_vpath_reg __iomem *vpath_reg,
2919 struct vxge_hw_device_hw_info *hw_info)
2920{
2921 u64 val64;
2922 u64 data1 = 0ULL;
2923 u64 data2 = 0ULL;
2924 struct vxge_hw_device_version *fw_version = &hw_info->fw_version;
2925 struct vxge_hw_device_date *fw_date = &hw_info->fw_date;
2926 struct vxge_hw_device_version *flash_version = &hw_info->flash_version;
2927 struct vxge_hw_device_date *flash_date = &hw_info->flash_date;
2928 enum vxge_hw_status status = VXGE_HW_OK;
2929
2930 val64 = VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION(
2931 VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION_READ_ENTRY) |
2932 VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL(
2933 VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_FW_MEMO) |
2934 VXGE_HW_RTS_ACCESS_STEER_CTRL_STROBE |
2935 VXGE_HW_RTS_ACCESS_STEER_CTRL_OFFSET(0);
2936
2937 status = __vxge_hw_pio_mem_write64(val64,
2938 &vpath_reg->rts_access_steer_ctrl,
2939 VXGE_HW_RTS_ACCESS_STEER_CTRL_STROBE,
2940 VXGE_HW_DEF_DEVICE_POLL_MILLIS);
2941
2942 if (status != VXGE_HW_OK)
2943 goto exit;
2944
2945 val64 = readq(&vpath_reg->rts_access_steer_ctrl);
2946
2947 if (val64 & VXGE_HW_RTS_ACCESS_STEER_CTRL_RMACJ_STATUS) {
2948
2949 data1 = readq(&vpath_reg->rts_access_steer_data0);
2950 data2 = readq(&vpath_reg->rts_access_steer_data1);
2951
2952 fw_date->day =
2953 (u32)VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_FW_VER_DAY(
2954 data1);
2955 fw_date->month =
2956 (u32)VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_FW_VER_MONTH(
2957 data1);
2958 fw_date->year =
2959 (u32)VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_FW_VER_YEAR(
2960 data1);
2961
2962 snprintf(fw_date->date, VXGE_HW_FW_STRLEN, "%2.2d/%2.2d/%4.4d",
2963 fw_date->month, fw_date->day, fw_date->year);
2964
2965 fw_version->major =
2966 (u32)VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_FW_VER_MAJOR(data1);
2967 fw_version->minor =
2968 (u32)VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_FW_VER_MINOR(data1);
2969 fw_version->build =
2970 (u32)VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_FW_VER_BUILD(data1);
2971
2972 snprintf(fw_version->version, VXGE_HW_FW_STRLEN, "%d.%d.%d",
2973 fw_version->major, fw_version->minor, fw_version->build);
2974
2975 flash_date->day =
2976 (u32)VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_FLASH_VER_DAY(data2);
2977 flash_date->month =
2978 (u32)VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_FLASH_VER_MONTH(data2);
2979 flash_date->year =
2980 (u32)VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_FLASH_VER_YEAR(data2);
2981
2982 snprintf(flash_date->date, VXGE_HW_FW_STRLEN,
2983 "%2.2d/%2.2d/%4.4d",
2984 flash_date->month, flash_date->day, flash_date->year);
2985
2986 flash_version->major =
2987 (u32)VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_FLASH_VER_MAJOR(data2);
2988 flash_version->minor =
2989 (u32)VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_FLASH_VER_MINOR(data2);
2990 flash_version->build =
2991 (u32)VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_FLASH_VER_BUILD(data2);
2992
2993 snprintf(flash_version->version, VXGE_HW_FW_STRLEN, "%d.%d.%d",
2994 flash_version->major, flash_version->minor,
2995 flash_version->build);
2996
2997 status = VXGE_HW_OK;
2998
2999 } else
3000 status = VXGE_HW_FAIL;
3001exit:
3002 return status;
3003}
3004
3005/*
3006 * __vxge_hw_vpath_pci_func_mode_get - Get the pci mode
3007 * Returns pci function mode
3008 */
3009static u64
3010__vxge_hw_vpath_pci_func_mode_get(
3011 u32 vp_id,
3012 struct vxge_hw_vpath_reg __iomem *vpath_reg)
3013{
3014 u64 val64;
3015 u64 data1 = 0ULL;
3016 enum vxge_hw_status status = VXGE_HW_OK;
3017
3018 __vxge_hw_read_rts_ds(vpath_reg,
3019 VXGE_HW_RTS_ACCESS_STEER_DATA0_MEMO_ITEM_PCI_MODE);
3020
3021 val64 = VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION(
3022 VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION_READ_MEMO_ENTRY) |
3023 VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL(
3024 VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_FW_MEMO) |
3025 VXGE_HW_RTS_ACCESS_STEER_CTRL_STROBE |
3026 VXGE_HW_RTS_ACCESS_STEER_CTRL_OFFSET(0);
3027
3028 status = __vxge_hw_pio_mem_write64(val64,
3029 &vpath_reg->rts_access_steer_ctrl,
3030 VXGE_HW_RTS_ACCESS_STEER_CTRL_STROBE,
3031 VXGE_HW_DEF_DEVICE_POLL_MILLIS);
3032
3033 if (status != VXGE_HW_OK)
3034 goto exit;
3035
3036 val64 = readq(&vpath_reg->rts_access_steer_ctrl);
3037
3038 if (val64 & VXGE_HW_RTS_ACCESS_STEER_CTRL_RMACJ_STATUS) {
3039 data1 = readq(&vpath_reg->rts_access_steer_data0);
3040 status = VXGE_HW_OK;
3041 } else {
3042 data1 = 0;
3043 status = VXGE_HW_FAIL;
3044 }
3045exit:
3046 return data1;
3047}
3048
3049/** 3008/**
3050 * vxge_hw_device_flick_link_led - Flick (blink) link LED. 3009 * vxge_hw_device_flick_link_led - Flick (blink) link LED.
3051 * @hldev: HW device. 3010 * @hldev: HW device.
@@ -3054,37 +3013,24 @@ exit:
3054 * Flicker the link LED. 3013 * Flicker the link LED.
3055 */ 3014 */
3056enum vxge_hw_status 3015enum vxge_hw_status
3057vxge_hw_device_flick_link_led(struct __vxge_hw_device *hldev, 3016vxge_hw_device_flick_link_led(struct __vxge_hw_device *hldev, u64 on_off)
3058 u64 on_off)
3059{ 3017{
3060 u64 val64; 3018 struct __vxge_hw_virtualpath *vpath;
3061 enum vxge_hw_status status = VXGE_HW_OK; 3019 u64 data0, data1 = 0, steer_ctrl = 0;
3062 struct vxge_hw_vpath_reg __iomem *vp_reg; 3020 enum vxge_hw_status status;
3063 3021
3064 if (hldev == NULL) { 3022 if (hldev == NULL) {
3065 status = VXGE_HW_ERR_INVALID_DEVICE; 3023 status = VXGE_HW_ERR_INVALID_DEVICE;
3066 goto exit; 3024 goto exit;
3067 } 3025 }
3068 3026
3069 vp_reg = hldev->vpath_reg[hldev->first_vp_id]; 3027 vpath = &hldev->virtual_paths[hldev->first_vp_id];
3070 3028
3071 writeq(0, &vp_reg->rts_access_steer_ctrl); 3029 data0 = on_off;
3072 wmb(); 3030 status = vxge_hw_vpath_fw_api(vpath,
3073 writeq(on_off, &vp_reg->rts_access_steer_data0); 3031 VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION_LED_CONTROL,
3074 writeq(0, &vp_reg->rts_access_steer_data1); 3032 VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_FW_MEMO,
3075 wmb(); 3033 0, &data0, &data1, &steer_ctrl);
3076
3077 val64 = VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION(
3078 VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION_LED_CONTROL) |
3079 VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL(
3080 VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_FW_MEMO) |
3081 VXGE_HW_RTS_ACCESS_STEER_CTRL_STROBE |
3082 VXGE_HW_RTS_ACCESS_STEER_CTRL_OFFSET(0);
3083
3084 status = __vxge_hw_pio_mem_write64(val64,
3085 &vp_reg->rts_access_steer_ctrl,
3086 VXGE_HW_RTS_ACCESS_STEER_CTRL_STROBE,
3087 VXGE_HW_DEF_DEVICE_POLL_MILLIS);
3088exit: 3034exit:
3089 return status; 3035 return status;
3090} 3036}
@@ -3093,63 +3039,38 @@ exit:
3093 * __vxge_hw_vpath_rts_table_get - Get the entries from RTS access tables 3039 * __vxge_hw_vpath_rts_table_get - Get the entries from RTS access tables
3094 */ 3040 */
3095enum vxge_hw_status 3041enum vxge_hw_status
3096__vxge_hw_vpath_rts_table_get( 3042__vxge_hw_vpath_rts_table_get(struct __vxge_hw_vpath_handle *vp,
3097 struct __vxge_hw_vpath_handle *vp, 3043 u32 action, u32 rts_table, u32 offset,
3098 u32 action, u32 rts_table, u32 offset, u64 *data1, u64 *data2) 3044 u64 *data0, u64 *data1)
3099{ 3045{
3100 u64 val64; 3046 enum vxge_hw_status status;
3101 struct __vxge_hw_virtualpath *vpath; 3047 u64 steer_ctrl = 0;
3102 struct vxge_hw_vpath_reg __iomem *vp_reg;
3103
3104 enum vxge_hw_status status = VXGE_HW_OK;
3105 3048
3106 if (vp == NULL) { 3049 if (vp == NULL) {
3107 status = VXGE_HW_ERR_INVALID_HANDLE; 3050 status = VXGE_HW_ERR_INVALID_HANDLE;
3108 goto exit; 3051 goto exit;
3109 } 3052 }
3110 3053
3111 vpath = vp->vpath;
3112 vp_reg = vpath->vp_reg;
3113
3114 val64 = VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION(action) |
3115 VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL(rts_table) |
3116 VXGE_HW_RTS_ACCESS_STEER_CTRL_STROBE |
3117 VXGE_HW_RTS_ACCESS_STEER_CTRL_OFFSET(offset);
3118
3119 if ((rts_table == 3054 if ((rts_table ==
3120 VXGE_HW_RTS_ACS_STEER_CTRL_DATA_STRUCT_SEL_RTH_SOLO_IT) || 3055 VXGE_HW_RTS_ACS_STEER_CTRL_DATA_STRUCT_SEL_RTH_SOLO_IT) ||
3121 (rts_table == 3056 (rts_table ==
3122 VXGE_HW_RTS_ACS_STEER_CTRL_DATA_STRUCT_SEL_RTH_MULTI_IT) || 3057 VXGE_HW_RTS_ACS_STEER_CTRL_DATA_STRUCT_SEL_RTH_MULTI_IT) ||
3123 (rts_table == 3058 (rts_table ==
3124 VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_RTH_MASK) || 3059 VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_RTH_MASK) ||
3125 (rts_table == 3060 (rts_table ==
3126 VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_RTH_KEY)) { 3061 VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_RTH_KEY)) {
3127 val64 = val64 | VXGE_HW_RTS_ACCESS_STEER_CTRL_TABLE_SEL; 3062 steer_ctrl = VXGE_HW_RTS_ACCESS_STEER_CTRL_TABLE_SEL;
3128 } 3063 }
3129 3064
3130 status = __vxge_hw_pio_mem_write64(val64, 3065 status = vxge_hw_vpath_fw_api(vp->vpath, action, rts_table, offset,
3131 &vp_reg->rts_access_steer_ctrl, 3066 data0, data1, &steer_ctrl);
3132 VXGE_HW_RTS_ACCESS_STEER_CTRL_STROBE,
3133 vpath->hldev->config.device_poll_millis);
3134
3135 if (status != VXGE_HW_OK) 3067 if (status != VXGE_HW_OK)
3136 goto exit; 3068 goto exit;
3137 3069
3138 val64 = readq(&vp_reg->rts_access_steer_ctrl); 3070 if ((rts_table != VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_DA) ||
3139 3071 (rts_table !=
3140 if (val64 & VXGE_HW_RTS_ACCESS_STEER_CTRL_RMACJ_STATUS) { 3072 VXGE_HW_RTS_ACS_STEER_CTRL_DATA_STRUCT_SEL_RTH_MULTI_IT))
3141 3073 *data1 = 0;
3142 *data1 = readq(&vp_reg->rts_access_steer_data0);
3143
3144 if ((rts_table ==
3145 VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_DA) ||
3146 (rts_table ==
3147 VXGE_HW_RTS_ACS_STEER_CTRL_DATA_STRUCT_SEL_RTH_MULTI_IT)) {
3148 *data2 = readq(&vp_reg->rts_access_steer_data1);
3149 }
3150 status = VXGE_HW_OK;
3151 } else
3152 status = VXGE_HW_FAIL;
3153exit: 3074exit:
3154 return status; 3075 return status;
3155} 3076}
@@ -3158,107 +3079,27 @@ exit:
3158 * __vxge_hw_vpath_rts_table_set - Set the entries of RTS access tables 3079 * __vxge_hw_vpath_rts_table_set - Set the entries of RTS access tables
3159 */ 3080 */
3160enum vxge_hw_status 3081enum vxge_hw_status
3161__vxge_hw_vpath_rts_table_set( 3082__vxge_hw_vpath_rts_table_set(struct __vxge_hw_vpath_handle *vp, u32 action,
3162 struct __vxge_hw_vpath_handle *vp, u32 action, u32 rts_table, 3083 u32 rts_table, u32 offset, u64 steer_data0,
3163 u32 offset, u64 data1, u64 data2) 3084 u64 steer_data1)
3164{ 3085{
3165 u64 val64; 3086 u64 data0, data1 = 0, steer_ctrl = 0;
3166 struct __vxge_hw_virtualpath *vpath; 3087 enum vxge_hw_status status;
3167 enum vxge_hw_status status = VXGE_HW_OK;
3168 struct vxge_hw_vpath_reg __iomem *vp_reg;
3169 3088
3170 if (vp == NULL) { 3089 if (vp == NULL) {
3171 status = VXGE_HW_ERR_INVALID_HANDLE; 3090 status = VXGE_HW_ERR_INVALID_HANDLE;
3172 goto exit; 3091 goto exit;
3173 } 3092 }
3174 3093
3175 vpath = vp->vpath; 3094 data0 = steer_data0;
3176 vp_reg = vpath->vp_reg;
3177
3178 writeq(data1, &vp_reg->rts_access_steer_data0);
3179 wmb();
3180 3095
3181 if ((rts_table == VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_DA) || 3096 if ((rts_table == VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_DA) ||
3182 (rts_table == 3097 (rts_table ==
3183 VXGE_HW_RTS_ACS_STEER_CTRL_DATA_STRUCT_SEL_RTH_MULTI_IT)) { 3098 VXGE_HW_RTS_ACS_STEER_CTRL_DATA_STRUCT_SEL_RTH_MULTI_IT))
3184 writeq(data2, &vp_reg->rts_access_steer_data1); 3099 data1 = steer_data1;
3185 wmb();
3186 }
3187 3100
3188 val64 = VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION(action) | 3101 status = vxge_hw_vpath_fw_api(vp->vpath, action, rts_table, offset,
3189 VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL(rts_table) | 3102 &data0, &data1, &steer_ctrl);
3190 VXGE_HW_RTS_ACCESS_STEER_CTRL_STROBE |
3191 VXGE_HW_RTS_ACCESS_STEER_CTRL_OFFSET(offset);
3192
3193 status = __vxge_hw_pio_mem_write64(val64,
3194 &vp_reg->rts_access_steer_ctrl,
3195 VXGE_HW_RTS_ACCESS_STEER_CTRL_STROBE,
3196 vpath->hldev->config.device_poll_millis);
3197
3198 if (status != VXGE_HW_OK)
3199 goto exit;
3200
3201 val64 = readq(&vp_reg->rts_access_steer_ctrl);
3202
3203 if (val64 & VXGE_HW_RTS_ACCESS_STEER_CTRL_RMACJ_STATUS)
3204 status = VXGE_HW_OK;
3205 else
3206 status = VXGE_HW_FAIL;
3207exit:
3208 return status;
3209}
3210
3211/*
3212 * __vxge_hw_vpath_addr_get - Get the hw address entry for this vpath
3213 * from MAC address table.
3214 */
3215static enum vxge_hw_status
3216__vxge_hw_vpath_addr_get(
3217 u32 vp_id, struct vxge_hw_vpath_reg __iomem *vpath_reg,
3218 u8 (macaddr)[ETH_ALEN], u8 (macaddr_mask)[ETH_ALEN])
3219{
3220 u32 i;
3221 u64 val64;
3222 u64 data1 = 0ULL;
3223 u64 data2 = 0ULL;
3224 enum vxge_hw_status status = VXGE_HW_OK;
3225
3226 val64 = VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION(
3227 VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION_LIST_FIRST_ENTRY) |
3228 VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL(
3229 VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_DA) |
3230 VXGE_HW_RTS_ACCESS_STEER_CTRL_STROBE |
3231 VXGE_HW_RTS_ACCESS_STEER_CTRL_OFFSET(0);
3232
3233 status = __vxge_hw_pio_mem_write64(val64,
3234 &vpath_reg->rts_access_steer_ctrl,
3235 VXGE_HW_RTS_ACCESS_STEER_CTRL_STROBE,
3236 VXGE_HW_DEF_DEVICE_POLL_MILLIS);
3237
3238 if (status != VXGE_HW_OK)
3239 goto exit;
3240
3241 val64 = readq(&vpath_reg->rts_access_steer_ctrl);
3242
3243 if (val64 & VXGE_HW_RTS_ACCESS_STEER_CTRL_RMACJ_STATUS) {
3244
3245 data1 = readq(&vpath_reg->rts_access_steer_data0);
3246 data2 = readq(&vpath_reg->rts_access_steer_data1);
3247
3248 data1 = VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_DA_MAC_ADDR(data1);
3249 data2 = VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_DA_MAC_ADDR_MASK(
3250 data2);
3251
3252 for (i = ETH_ALEN; i > 0; i--) {
3253 macaddr[i-1] = (u8)(data1 & 0xFF);
3254 data1 >>= 8;
3255
3256 macaddr_mask[i-1] = (u8)(data2 & 0xFF);
3257 data2 >>= 8;
3258 }
3259 status = VXGE_HW_OK;
3260 } else
3261 status = VXGE_HW_FAIL;
3262exit: 3103exit:
3263 return status; 3104 return status;
3264} 3105}
@@ -4199,6 +4040,7 @@ __vxge_hw_vp_initialize(struct __vxge_hw_device *hldev, u32 vp_id,
4199 4040
4200 vpath = &hldev->virtual_paths[vp_id]; 4041 vpath = &hldev->virtual_paths[vp_id];
4201 4042
4043 spin_lock_init(&hldev->virtual_paths[vp_id].lock);
4202 vpath->vp_id = vp_id; 4044 vpath->vp_id = vp_id;
4203 vpath->vp_open = VXGE_HW_VP_OPEN; 4045 vpath->vp_open = VXGE_HW_VP_OPEN;
4204 vpath->hldev = hldev; 4046 vpath->hldev = hldev;
@@ -4209,14 +4051,12 @@ __vxge_hw_vp_initialize(struct __vxge_hw_device *hldev, u32 vp_id,
4209 __vxge_hw_vpath_reset(hldev, vp_id); 4051 __vxge_hw_vpath_reset(hldev, vp_id);
4210 4052
4211 status = __vxge_hw_vpath_reset_check(vpath); 4053 status = __vxge_hw_vpath_reset_check(vpath);
4212
4213 if (status != VXGE_HW_OK) { 4054 if (status != VXGE_HW_OK) {
4214 memset(vpath, 0, sizeof(struct __vxge_hw_virtualpath)); 4055 memset(vpath, 0, sizeof(struct __vxge_hw_virtualpath));
4215 goto exit; 4056 goto exit;
4216 } 4057 }
4217 4058
4218 status = __vxge_hw_vpath_mgmt_read(hldev, vpath); 4059 status = __vxge_hw_vpath_mgmt_read(hldev, vpath);
4219
4220 if (status != VXGE_HW_OK) { 4060 if (status != VXGE_HW_OK) {
4221 memset(vpath, 0, sizeof(struct __vxge_hw_virtualpath)); 4061 memset(vpath, 0, sizeof(struct __vxge_hw_virtualpath));
4222 goto exit; 4062 goto exit;
@@ -4230,7 +4070,6 @@ __vxge_hw_vp_initialize(struct __vxge_hw_device *hldev, u32 vp_id,
4230 hldev->tim_int_mask1, vp_id); 4070 hldev->tim_int_mask1, vp_id);
4231 4071
4232 status = __vxge_hw_vpath_initialize(hldev, vp_id); 4072 status = __vxge_hw_vpath_initialize(hldev, vp_id);
4233
4234 if (status != VXGE_HW_OK) 4073 if (status != VXGE_HW_OK)
4235 __vxge_hw_vp_terminate(hldev, vp_id); 4074 __vxge_hw_vp_terminate(hldev, vp_id);
4236exit: 4075exit:
@@ -4496,7 +4335,9 @@ enum vxge_hw_status vxge_hw_vpath_close(struct __vxge_hw_vpath_handle *vp)
4496 4335
4497 __vxge_hw_vp_terminate(devh, vp_id); 4336 __vxge_hw_vp_terminate(devh, vp_id);
4498 4337
4338 spin_lock(&vpath->lock);
4499 vpath->vp_open = VXGE_HW_VP_NOT_OPEN; 4339 vpath->vp_open = VXGE_HW_VP_NOT_OPEN;
4340 spin_unlock(&vpath->lock);
4500 4341
4501vpath_close_exit: 4342vpath_close_exit:
4502 return status; 4343 return status;