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authorSteve Glendinning <steve.glendinning@shawell.net>2012-09-27 20:07:07 -0400
committerDavid S. Miller <davem@davemloft.net>2012-09-28 18:34:57 -0400
commitcf2acec2e90beffc20c8a63322f0a978ea4941df (patch)
tree118cf56ec3fc504f5c85f43a8af875975310dc58 /drivers/net/usb
parent6a06e5e1bb217be077e1f8ee2745b4c5b1aa02db (diff)
smsc95xx: sleep before read for lengthy operations
During init, the device reset is unexpected to complete immediately, so sleep before testing the condition rather than after it. Signed-off-by: Steve Glendinning <steve.glendinning@shawell.net> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/usb')
-rw-r--r--drivers/net/usb/smsc95xx.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/net/usb/smsc95xx.c b/drivers/net/usb/smsc95xx.c
index d45e539a84b7..ed1e551ff23b 100644
--- a/drivers/net/usb/smsc95xx.c
+++ b/drivers/net/usb/smsc95xx.c
@@ -763,12 +763,12 @@ static int smsc95xx_reset(struct usbnet *dev)
763 763
764 timeout = 0; 764 timeout = 0;
765 do { 765 do {
766 msleep(10);
766 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); 767 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
767 if (ret < 0) { 768 if (ret < 0) {
768 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret); 769 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
769 return ret; 770 return ret;
770 } 771 }
771 msleep(10);
772 timeout++; 772 timeout++;
773 } while ((read_buf & HW_CFG_LRST_) && (timeout < 100)); 773 } while ((read_buf & HW_CFG_LRST_) && (timeout < 100));
774 774
@@ -786,12 +786,12 @@ static int smsc95xx_reset(struct usbnet *dev)
786 786
787 timeout = 0; 787 timeout = 0;
788 do { 788 do {
789 msleep(10);
789 ret = smsc95xx_read_reg(dev, PM_CTRL, &read_buf); 790 ret = smsc95xx_read_reg(dev, PM_CTRL, &read_buf);
790 if (ret < 0) { 791 if (ret < 0) {
791 netdev_warn(dev->net, "Failed to read PM_CTRL: %d\n", ret); 792 netdev_warn(dev->net, "Failed to read PM_CTRL: %d\n", ret);
792 return ret; 793 return ret;
793 } 794 }
794 msleep(10);
795 timeout++; 795 timeout++;
796 } while ((read_buf & PM_CTL_PHY_RST_) && (timeout < 100)); 796 } while ((read_buf & PM_CTL_PHY_RST_) && (timeout < 100));
797 797