aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/net/usb
diff options
context:
space:
mode:
authorSteve Glendinning <steve.glendinning@shawell.net>2012-09-27 20:07:09 -0400
committerDavid S. Miller <davem@davemloft.net>2012-09-28 18:34:57 -0400
commit769ea6d89d5b915415a95432ff102c0aaf65e916 (patch)
tree7e6ce819f28f5b66b7a491eceea2ed97f0c5db45 /drivers/net/usb
parent4436761b63364201934d5511bb1199bee438345b (diff)
smsc95xx: check return code from control messages
This patch adds additional checks of the values returned by smsc95xx_(read|write)_reg, and wraps their common patterns in macros. Signed-off-by: Steve Glendinning <steve.glendinning@shawell.net> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/usb')
-rw-r--r--drivers/net/usb/smsc95xx.c331
1 files changed, 148 insertions, 183 deletions
diff --git a/drivers/net/usb/smsc95xx.c b/drivers/net/usb/smsc95xx.c
index 5d0256b5b8a9..d0ff01ee0b62 100644
--- a/drivers/net/usb/smsc95xx.c
+++ b/drivers/net/usb/smsc95xx.c
@@ -47,6 +47,15 @@
47#define SMSC95XX_TX_OVERHEAD (8) 47#define SMSC95XX_TX_OVERHEAD (8)
48#define SMSC95XX_TX_OVERHEAD_CSUM (12) 48#define SMSC95XX_TX_OVERHEAD_CSUM (12)
49 49
50#define check_warn(ret, fmt, args...) \
51 ({ if (ret < 0) netdev_warn(dev->net, fmt, ##args); })
52
53#define check_warn_return(ret, fmt, args...) \
54 ({ if (ret < 0) { netdev_warn(dev->net, fmt, ##args); return ret; } })
55
56#define check_warn_goto_done(ret, fmt, args...) \
57 ({ if (ret < 0) { netdev_warn(dev->net, fmt, ##args); goto done; } })
58
50struct smsc95xx_priv { 59struct smsc95xx_priv {
51 u32 mac_cr; 60 u32 mac_cr;
52 u32 hash_hi; 61 u32 hash_hi;
@@ -63,7 +72,8 @@ static bool turbo_mode = true;
63module_param(turbo_mode, bool, 0644); 72module_param(turbo_mode, bool, 0644);
64MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction"); 73MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction");
65 74
66static int smsc95xx_read_reg(struct usbnet *dev, u32 index, u32 *data) 75static int __must_check smsc95xx_read_reg(struct usbnet *dev, u32 index,
76 u32 *data)
67{ 77{
68 u32 *buf = kmalloc(4, GFP_KERNEL); 78 u32 *buf = kmalloc(4, GFP_KERNEL);
69 int ret; 79 int ret;
@@ -88,7 +98,8 @@ static int smsc95xx_read_reg(struct usbnet *dev, u32 index, u32 *data)
88 return ret; 98 return ret;
89} 99}
90 100
91static int smsc95xx_write_reg(struct usbnet *dev, u32 index, u32 data) 101static int __must_check smsc95xx_write_reg(struct usbnet *dev, u32 index,
102 u32 data)
92{ 103{
93 u32 *buf = kmalloc(4, GFP_KERNEL); 104 u32 *buf = kmalloc(4, GFP_KERNEL);
94 int ret; 105 int ret;
@@ -116,13 +127,15 @@ static int smsc95xx_write_reg(struct usbnet *dev, u32 index, u32 data)
116 127
117/* Loop until the read is completed with timeout 128/* Loop until the read is completed with timeout
118 * called with phy_mutex held */ 129 * called with phy_mutex held */
119static int smsc95xx_phy_wait_not_busy(struct usbnet *dev) 130static int __must_check smsc95xx_phy_wait_not_busy(struct usbnet *dev)
120{ 131{
121 unsigned long start_time = jiffies; 132 unsigned long start_time = jiffies;
122 u32 val; 133 u32 val;
134 int ret;
123 135
124 do { 136 do {
125 smsc95xx_read_reg(dev, MII_ADDR, &val); 137 ret = smsc95xx_read_reg(dev, MII_ADDR, &val);
138 check_warn_return(ret, "Error reading MII_ACCESS");
126 if (!(val & MII_BUSY_)) 139 if (!(val & MII_BUSY_))
127 return 0; 140 return 0;
128 } while (!time_after(jiffies, start_time + HZ)); 141 } while (!time_after(jiffies, start_time + HZ));
@@ -134,33 +147,32 @@ static int smsc95xx_mdio_read(struct net_device *netdev, int phy_id, int idx)
134{ 147{
135 struct usbnet *dev = netdev_priv(netdev); 148 struct usbnet *dev = netdev_priv(netdev);
136 u32 val, addr; 149 u32 val, addr;
150 int ret;
137 151
138 mutex_lock(&dev->phy_mutex); 152 mutex_lock(&dev->phy_mutex);
139 153
140 /* confirm MII not busy */ 154 /* confirm MII not busy */
141 if (smsc95xx_phy_wait_not_busy(dev)) { 155 ret = smsc95xx_phy_wait_not_busy(dev);
142 netdev_warn(dev->net, "MII is busy in smsc95xx_mdio_read\n"); 156 check_warn_goto_done(ret, "MII is busy in smsc95xx_mdio_read");
143 mutex_unlock(&dev->phy_mutex);
144 return -EIO;
145 }
146 157
147 /* set the address, index & direction (read from PHY) */ 158 /* set the address, index & direction (read from PHY) */
148 phy_id &= dev->mii.phy_id_mask; 159 phy_id &= dev->mii.phy_id_mask;
149 idx &= dev->mii.reg_num_mask; 160 idx &= dev->mii.reg_num_mask;
150 addr = (phy_id << 11) | (idx << 6) | MII_READ_; 161 addr = (phy_id << 11) | (idx << 6) | MII_READ_;
151 smsc95xx_write_reg(dev, MII_ADDR, addr); 162 ret = smsc95xx_write_reg(dev, MII_ADDR, addr);
163 check_warn_goto_done(ret, "Error writing MII_ADDR");
152 164
153 if (smsc95xx_phy_wait_not_busy(dev)) { 165 ret = smsc95xx_phy_wait_not_busy(dev);
154 netdev_warn(dev->net, "Timed out reading MII reg %02X\n", idx); 166 check_warn_goto_done(ret, "Timed out reading MII reg %02X", idx);
155 mutex_unlock(&dev->phy_mutex);
156 return -EIO;
157 }
158 167
159 smsc95xx_read_reg(dev, MII_DATA, &val); 168 ret = smsc95xx_read_reg(dev, MII_DATA, &val);
169 check_warn_goto_done(ret, "Error reading MII_DATA");
160 170
161 mutex_unlock(&dev->phy_mutex); 171 ret = (u16)(val & 0xFFFF);
162 172
163 return (u16)(val & 0xFFFF); 173done:
174 mutex_unlock(&dev->phy_mutex);
175 return ret;
164} 176}
165 177
166static void smsc95xx_mdio_write(struct net_device *netdev, int phy_id, int idx, 178static void smsc95xx_mdio_write(struct net_device *netdev, int phy_id, int idx,
@@ -168,38 +180,41 @@ static void smsc95xx_mdio_write(struct net_device *netdev, int phy_id, int idx,
168{ 180{
169 struct usbnet *dev = netdev_priv(netdev); 181 struct usbnet *dev = netdev_priv(netdev);
170 u32 val, addr; 182 u32 val, addr;
183 int ret;
171 184
172 mutex_lock(&dev->phy_mutex); 185 mutex_lock(&dev->phy_mutex);
173 186
174 /* confirm MII not busy */ 187 /* confirm MII not busy */
175 if (smsc95xx_phy_wait_not_busy(dev)) { 188 ret = smsc95xx_phy_wait_not_busy(dev);
176 netdev_warn(dev->net, "MII is busy in smsc95xx_mdio_write\n"); 189 check_warn_goto_done(ret, "MII is busy in smsc95xx_mdio_write");
177 mutex_unlock(&dev->phy_mutex);
178 return;
179 }
180 190
181 val = regval; 191 val = regval;
182 smsc95xx_write_reg(dev, MII_DATA, val); 192 ret = smsc95xx_write_reg(dev, MII_DATA, val);
193 check_warn_goto_done(ret, "Error writing MII_DATA");
183 194
184 /* set the address, index & direction (write to PHY) */ 195 /* set the address, index & direction (write to PHY) */
185 phy_id &= dev->mii.phy_id_mask; 196 phy_id &= dev->mii.phy_id_mask;
186 idx &= dev->mii.reg_num_mask; 197 idx &= dev->mii.reg_num_mask;
187 addr = (phy_id << 11) | (idx << 6) | MII_WRITE_; 198 addr = (phy_id << 11) | (idx << 6) | MII_WRITE_;
188 smsc95xx_write_reg(dev, MII_ADDR, addr); 199 ret = smsc95xx_write_reg(dev, MII_ADDR, addr);
200 check_warn_goto_done(ret, "Error writing MII_ADDR");
189 201
190 if (smsc95xx_phy_wait_not_busy(dev)) 202 ret = smsc95xx_phy_wait_not_busy(dev);
191 netdev_warn(dev->net, "Timed out writing MII reg %02X\n", idx); 203 check_warn_goto_done(ret, "Timed out writing MII reg %02X", idx);
192 204
205done:
193 mutex_unlock(&dev->phy_mutex); 206 mutex_unlock(&dev->phy_mutex);
194} 207}
195 208
196static int smsc95xx_wait_eeprom(struct usbnet *dev) 209static int __must_check smsc95xx_wait_eeprom(struct usbnet *dev)
197{ 210{
198 unsigned long start_time = jiffies; 211 unsigned long start_time = jiffies;
199 u32 val; 212 u32 val;
213 int ret;
200 214
201 do { 215 do {
202 smsc95xx_read_reg(dev, E2P_CMD, &val); 216 ret = smsc95xx_read_reg(dev, E2P_CMD, &val);
217 check_warn_return(ret, "Error reading E2P_CMD");
203 if (!(val & E2P_CMD_BUSY_) || (val & E2P_CMD_TIMEOUT_)) 218 if (!(val & E2P_CMD_BUSY_) || (val & E2P_CMD_TIMEOUT_))
204 break; 219 break;
205 udelay(40); 220 udelay(40);
@@ -213,13 +228,15 @@ static int smsc95xx_wait_eeprom(struct usbnet *dev)
213 return 0; 228 return 0;
214} 229}
215 230
216static int smsc95xx_eeprom_confirm_not_busy(struct usbnet *dev) 231static int __must_check smsc95xx_eeprom_confirm_not_busy(struct usbnet *dev)
217{ 232{
218 unsigned long start_time = jiffies; 233 unsigned long start_time = jiffies;
219 u32 val; 234 u32 val;
235 int ret;
220 236
221 do { 237 do {
222 smsc95xx_read_reg(dev, E2P_CMD, &val); 238 ret = smsc95xx_read_reg(dev, E2P_CMD, &val);
239 check_warn_return(ret, "Error reading E2P_CMD");
223 240
224 if (!(val & E2P_CMD_BUSY_)) 241 if (!(val & E2P_CMD_BUSY_))
225 return 0; 242 return 0;
@@ -246,13 +263,15 @@ static int smsc95xx_read_eeprom(struct usbnet *dev, u32 offset, u32 length,
246 263
247 for (i = 0; i < length; i++) { 264 for (i = 0; i < length; i++) {
248 val = E2P_CMD_BUSY_ | E2P_CMD_READ_ | (offset & E2P_CMD_ADDR_); 265 val = E2P_CMD_BUSY_ | E2P_CMD_READ_ | (offset & E2P_CMD_ADDR_);
249 smsc95xx_write_reg(dev, E2P_CMD, val); 266 ret = smsc95xx_write_reg(dev, E2P_CMD, val);
267 check_warn_return(ret, "Error writing E2P_CMD");
250 268
251 ret = smsc95xx_wait_eeprom(dev); 269 ret = smsc95xx_wait_eeprom(dev);
252 if (ret < 0) 270 if (ret < 0)
253 return ret; 271 return ret;
254 272
255 smsc95xx_read_reg(dev, E2P_DATA, &val); 273 ret = smsc95xx_read_reg(dev, E2P_DATA, &val);
274 check_warn_return(ret, "Error reading E2P_DATA");
256 275
257 data[i] = val & 0xFF; 276 data[i] = val & 0xFF;
258 offset++; 277 offset++;
@@ -276,7 +295,8 @@ static int smsc95xx_write_eeprom(struct usbnet *dev, u32 offset, u32 length,
276 295
277 /* Issue write/erase enable command */ 296 /* Issue write/erase enable command */
278 val = E2P_CMD_BUSY_ | E2P_CMD_EWEN_; 297 val = E2P_CMD_BUSY_ | E2P_CMD_EWEN_;
279 smsc95xx_write_reg(dev, E2P_CMD, val); 298 ret = smsc95xx_write_reg(dev, E2P_CMD, val);
299 check_warn_return(ret, "Error writing E2P_DATA");
280 300
281 ret = smsc95xx_wait_eeprom(dev); 301 ret = smsc95xx_wait_eeprom(dev);
282 if (ret < 0) 302 if (ret < 0)
@@ -286,11 +306,13 @@ static int smsc95xx_write_eeprom(struct usbnet *dev, u32 offset, u32 length,
286 306
287 /* Fill data register */ 307 /* Fill data register */
288 val = data[i]; 308 val = data[i];
289 smsc95xx_write_reg(dev, E2P_DATA, val); 309 ret = smsc95xx_write_reg(dev, E2P_DATA, val);
310 check_warn_return(ret, "Error writing E2P_DATA");
290 311
291 /* Send "write" command */ 312 /* Send "write" command */
292 val = E2P_CMD_BUSY_ | E2P_CMD_WRITE_ | (offset & E2P_CMD_ADDR_); 313 val = E2P_CMD_BUSY_ | E2P_CMD_WRITE_ | (offset & E2P_CMD_ADDR_);
293 smsc95xx_write_reg(dev, E2P_CMD, val); 314 ret = smsc95xx_write_reg(dev, E2P_CMD, val);
315 check_warn_return(ret, "Error writing E2P_CMD");
294 316
295 ret = smsc95xx_wait_eeprom(dev); 317 ret = smsc95xx_wait_eeprom(dev);
296 if (ret < 0) 318 if (ret < 0)
@@ -308,14 +330,14 @@ static void smsc95xx_async_cmd_callback(struct urb *urb)
308 struct usbnet *dev = usb_context->dev; 330 struct usbnet *dev = usb_context->dev;
309 int status = urb->status; 331 int status = urb->status;
310 332
311 if (status < 0) 333 check_warn(status, "async callback failed with %d\n", status);
312 netdev_warn(dev->net, "async callback failed with %d\n", status);
313 334
314 kfree(usb_context); 335 kfree(usb_context);
315 usb_free_urb(urb); 336 usb_free_urb(urb);
316} 337}
317 338
318static int smsc95xx_write_reg_async(struct usbnet *dev, u16 index, u32 *data) 339static int __must_check smsc95xx_write_reg_async(struct usbnet *dev, u16 index,
340 u32 *data)
319{ 341{
320 struct usb_context *usb_context; 342 struct usb_context *usb_context;
321 int status; 343 int status;
@@ -371,6 +393,7 @@ static void smsc95xx_set_multicast(struct net_device *netdev)
371 struct usbnet *dev = netdev_priv(netdev); 393 struct usbnet *dev = netdev_priv(netdev);
372 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 394 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
373 unsigned long flags; 395 unsigned long flags;
396 int ret;
374 397
375 pdata->hash_hi = 0; 398 pdata->hash_hi = 0;
376 pdata->hash_lo = 0; 399 pdata->hash_lo = 0;
@@ -411,21 +434,23 @@ static void smsc95xx_set_multicast(struct net_device *netdev)
411 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags); 434 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
412 435
413 /* Initiate async writes, as we can't wait for completion here */ 436 /* Initiate async writes, as we can't wait for completion here */
414 smsc95xx_write_reg_async(dev, HASHH, &pdata->hash_hi); 437 ret = smsc95xx_write_reg_async(dev, HASHH, &pdata->hash_hi);
415 smsc95xx_write_reg_async(dev, HASHL, &pdata->hash_lo); 438 check_warn(ret, "failed to initiate async write to HASHH");
416 smsc95xx_write_reg_async(dev, MAC_CR, &pdata->mac_cr); 439
440 ret = smsc95xx_write_reg_async(dev, HASHL, &pdata->hash_lo);
441 check_warn(ret, "failed to initiate async write to HASHL");
442
443 ret = smsc95xx_write_reg_async(dev, MAC_CR, &pdata->mac_cr);
444 check_warn(ret, "failed to initiate async write to MAC_CR");
417} 445}
418 446
419static void smsc95xx_phy_update_flowcontrol(struct usbnet *dev, u8 duplex, 447static int smsc95xx_phy_update_flowcontrol(struct usbnet *dev, u8 duplex,
420 u16 lcladv, u16 rmtadv) 448 u16 lcladv, u16 rmtadv)
421{ 449{
422 u32 flow, afc_cfg = 0; 450 u32 flow, afc_cfg = 0;
423 451
424 int ret = smsc95xx_read_reg(dev, AFC_CFG, &afc_cfg); 452 int ret = smsc95xx_read_reg(dev, AFC_CFG, &afc_cfg);
425 if (ret < 0) { 453 check_warn_return(ret, "Error reading AFC_CFG");
426 netdev_warn(dev->net, "error reading AFC_CFG\n");
427 return;
428 }
429 454
430 if (duplex == DUPLEX_FULL) { 455 if (duplex == DUPLEX_FULL) {
431 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv); 456 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
@@ -449,8 +474,13 @@ static void smsc95xx_phy_update_flowcontrol(struct usbnet *dev, u8 duplex,
449 afc_cfg |= 0xF; 474 afc_cfg |= 0xF;
450 } 475 }
451 476
452 smsc95xx_write_reg(dev, FLOW, flow); 477 ret = smsc95xx_write_reg(dev, FLOW, flow);
453 smsc95xx_write_reg(dev, AFC_CFG, afc_cfg); 478 check_warn_return(ret, "Error writing FLOW");
479
480 ret = smsc95xx_write_reg(dev, AFC_CFG, afc_cfg);
481 check_warn_return(ret, "Error writing AFC_CFG");
482
483 return 0;
454} 484}
455 485
456static int smsc95xx_link_reset(struct usbnet *dev) 486static int smsc95xx_link_reset(struct usbnet *dev)
@@ -460,10 +490,14 @@ static int smsc95xx_link_reset(struct usbnet *dev)
460 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET }; 490 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
461 unsigned long flags; 491 unsigned long flags;
462 u16 lcladv, rmtadv; 492 u16 lcladv, rmtadv;
493 int ret;
463 494
464 /* clear interrupt status */ 495 /* clear interrupt status */
465 smsc95xx_mdio_read(dev->net, mii->phy_id, PHY_INT_SRC); 496 ret = smsc95xx_mdio_read(dev->net, mii->phy_id, PHY_INT_SRC);
466 smsc95xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_); 497 check_warn_return(ret, "Error reading PHY_INT_SRC");
498
499 ret = smsc95xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_);
500 check_warn_return(ret, "Error writing INT_STS");
467 501
468 mii_check_media(mii, 1, 1); 502 mii_check_media(mii, 1, 1);
469 mii_ethtool_gset(&dev->mii, &ecmd); 503 mii_ethtool_gset(&dev->mii, &ecmd);
@@ -484,9 +518,11 @@ static int smsc95xx_link_reset(struct usbnet *dev)
484 } 518 }
485 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags); 519 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
486 520
487 smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr); 521 ret = smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
522 check_warn_return(ret, "Error writing MAC_CR");
488 523
489 smsc95xx_phy_update_flowcontrol(dev, ecmd.duplex, lcladv, rmtadv); 524 ret = smsc95xx_phy_update_flowcontrol(dev, ecmd.duplex, lcladv, rmtadv);
525 check_warn_return(ret, "Error updating PHY flow control");
490 526
491 return 0; 527 return 0;
492} 528}
@@ -522,10 +558,7 @@ static int smsc95xx_set_features(struct net_device *netdev,
522 int ret; 558 int ret;
523 559
524 ret = smsc95xx_read_reg(dev, COE_CR, &read_buf); 560 ret = smsc95xx_read_reg(dev, COE_CR, &read_buf);
525 if (ret < 0) { 561 check_warn_return(ret, "Failed to read COE_CR: %d\n", ret);
526 netdev_warn(dev->net, "Failed to read COE_CR: %d\n", ret);
527 return ret;
528 }
529 562
530 if (features & NETIF_F_HW_CSUM) 563 if (features & NETIF_F_HW_CSUM)
531 read_buf |= Tx_COE_EN_; 564 read_buf |= Tx_COE_EN_;
@@ -538,10 +571,7 @@ static int smsc95xx_set_features(struct net_device *netdev,
538 read_buf &= ~Rx_COE_EN_; 571 read_buf &= ~Rx_COE_EN_;
539 572
540 ret = smsc95xx_write_reg(dev, COE_CR, read_buf); 573 ret = smsc95xx_write_reg(dev, COE_CR, read_buf);
541 if (ret < 0) { 574 check_warn_return(ret, "Failed to write COE_CR: %d\n", ret);
542 netdev_warn(dev->net, "Failed to write COE_CR: %d\n", ret);
543 return ret;
544 }
545 575
546 netif_dbg(dev, hw, dev->net, "COE_CR = 0x%08x\n", read_buf); 576 netif_dbg(dev, hw, dev->net, "COE_CR = 0x%08x\n", read_buf);
547 return 0; 577 return 0;
@@ -656,53 +686,56 @@ static int smsc95xx_set_mac_address(struct usbnet *dev)
656 int ret; 686 int ret;
657 687
658 ret = smsc95xx_write_reg(dev, ADDRL, addr_lo); 688 ret = smsc95xx_write_reg(dev, ADDRL, addr_lo);
659 if (ret < 0) { 689 check_warn_return(ret, "Failed to write ADDRL: %d\n", ret);
660 netdev_warn(dev->net, "Failed to write ADDRL: %d\n", ret);
661 return ret;
662 }
663 690
664 ret = smsc95xx_write_reg(dev, ADDRH, addr_hi); 691 ret = smsc95xx_write_reg(dev, ADDRH, addr_hi);
665 if (ret < 0) { 692 check_warn_return(ret, "Failed to write ADDRH: %d\n", ret);
666 netdev_warn(dev->net, "Failed to write ADDRH: %d\n", ret);
667 return ret;
668 }
669 693
670 return 0; 694 return 0;
671} 695}
672 696
673/* starts the TX path */ 697/* starts the TX path */
674static void smsc95xx_start_tx_path(struct usbnet *dev) 698static int smsc95xx_start_tx_path(struct usbnet *dev)
675{ 699{
676 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 700 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
677 unsigned long flags; 701 unsigned long flags;
702 int ret;
678 703
679 /* Enable Tx at MAC */ 704 /* Enable Tx at MAC */
680 spin_lock_irqsave(&pdata->mac_cr_lock, flags); 705 spin_lock_irqsave(&pdata->mac_cr_lock, flags);
681 pdata->mac_cr |= MAC_CR_TXEN_; 706 pdata->mac_cr |= MAC_CR_TXEN_;
682 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags); 707 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
683 708
684 smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr); 709 ret = smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
710 check_warn_return(ret, "Failed to write MAC_CR: %d\n", ret);
685 711
686 /* Enable Tx at SCSRs */ 712 /* Enable Tx at SCSRs */
687 smsc95xx_write_reg(dev, TX_CFG, TX_CFG_ON_); 713 ret = smsc95xx_write_reg(dev, TX_CFG, TX_CFG_ON_);
714 check_warn_return(ret, "Failed to write TX_CFG: %d\n", ret);
715
716 return 0;
688} 717}
689 718
690/* Starts the Receive path */ 719/* Starts the Receive path */
691static void smsc95xx_start_rx_path(struct usbnet *dev) 720static int smsc95xx_start_rx_path(struct usbnet *dev)
692{ 721{
693 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 722 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
694 unsigned long flags; 723 unsigned long flags;
724 int ret;
695 725
696 spin_lock_irqsave(&pdata->mac_cr_lock, flags); 726 spin_lock_irqsave(&pdata->mac_cr_lock, flags);
697 pdata->mac_cr |= MAC_CR_RXEN_; 727 pdata->mac_cr |= MAC_CR_RXEN_;
698 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags); 728 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
699 729
700 smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr); 730 ret = smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
731 check_warn_return(ret, "Failed to write MAC_CR: %d\n", ret);
732
733 return 0;
701} 734}
702 735
703static int smsc95xx_phy_initialize(struct usbnet *dev) 736static int smsc95xx_phy_initialize(struct usbnet *dev)
704{ 737{
705 int bmcr, timeout = 0; 738 int bmcr, ret, timeout = 0;
706 739
707 /* Initialize MII structure */ 740 /* Initialize MII structure */
708 dev->mii.dev = dev->net; 741 dev->mii.dev = dev->net;
@@ -731,7 +764,8 @@ static int smsc95xx_phy_initialize(struct usbnet *dev)
731 ADVERTISE_PAUSE_ASYM); 764 ADVERTISE_PAUSE_ASYM);
732 765
733 /* read to clear */ 766 /* read to clear */
734 smsc95xx_mdio_read(dev->net, dev->mii.phy_id, PHY_INT_SRC); 767 ret = smsc95xx_mdio_read(dev->net, dev->mii.phy_id, PHY_INT_SRC);
768 check_warn_return(ret, "Failed to read PHY_INT_SRC during init");
735 769
736 smsc95xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_MASK, 770 smsc95xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_MASK,
737 PHY_INT_MASK_DEFAULT_); 771 PHY_INT_MASK_DEFAULT_);
@@ -750,20 +784,13 @@ static int smsc95xx_reset(struct usbnet *dev)
750 netif_dbg(dev, ifup, dev->net, "entering smsc95xx_reset\n"); 784 netif_dbg(dev, ifup, dev->net, "entering smsc95xx_reset\n");
751 785
752 ret = smsc95xx_write_reg(dev, HW_CFG, HW_CFG_LRST_); 786 ret = smsc95xx_write_reg(dev, HW_CFG, HW_CFG_LRST_);
753 if (ret < 0) { 787 check_warn_return(ret, "Failed to write HW_CFG_LRST_ bit in HW_CFG\n");
754 netdev_warn(dev->net, "Failed to write HW_CFG_LRST_ bit in HW_CFG register, ret = %d\n",
755 ret);
756 return ret;
757 }
758 788
759 timeout = 0; 789 timeout = 0;
760 do { 790 do {
761 msleep(10); 791 msleep(10);
762 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); 792 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
763 if (ret < 0) { 793 check_warn_return(ret, "Failed to read HW_CFG: %d\n", ret);
764 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
765 return ret;
766 }
767 timeout++; 794 timeout++;
768 } while ((read_buf & HW_CFG_LRST_) && (timeout < 100)); 795 } while ((read_buf & HW_CFG_LRST_) && (timeout < 100));
769 796
@@ -773,19 +800,13 @@ static int smsc95xx_reset(struct usbnet *dev)
773 } 800 }
774 801
775 ret = smsc95xx_write_reg(dev, PM_CTRL, PM_CTL_PHY_RST_); 802 ret = smsc95xx_write_reg(dev, PM_CTRL, PM_CTL_PHY_RST_);
776 if (ret < 0) { 803 check_warn_return(ret, "Failed to write PM_CTRL: %d\n", ret);
777 netdev_warn(dev->net, "Failed to write PM_CTRL: %d\n", ret);
778 return ret;
779 }
780 804
781 timeout = 0; 805 timeout = 0;
782 do { 806 do {
783 msleep(10); 807 msleep(10);
784 ret = smsc95xx_read_reg(dev, PM_CTRL, &read_buf); 808 ret = smsc95xx_read_reg(dev, PM_CTRL, &read_buf);
785 if (ret < 0) { 809 check_warn_return(ret, "Failed to read PM_CTRL: %d\n", ret);
786 netdev_warn(dev->net, "Failed to read PM_CTRL: %d\n", ret);
787 return ret;
788 }
789 timeout++; 810 timeout++;
790 } while ((read_buf & PM_CTL_PHY_RST_) && (timeout < 100)); 811 } while ((read_buf & PM_CTL_PHY_RST_) && (timeout < 100));
791 812
@@ -802,10 +823,7 @@ static int smsc95xx_reset(struct usbnet *dev)
802 "MAC Address: %pM\n", dev->net->dev_addr); 823 "MAC Address: %pM\n", dev->net->dev_addr);
803 824
804 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); 825 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
805 if (ret < 0) { 826 check_warn_return(ret, "Failed to read HW_CFG: %d\n", ret);
806 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
807 return ret;
808 }
809 827
810 netif_dbg(dev, ifup, dev->net, 828 netif_dbg(dev, ifup, dev->net,
811 "Read Value from HW_CFG : 0x%08x\n", read_buf); 829 "Read Value from HW_CFG : 0x%08x\n", read_buf);
@@ -813,17 +831,10 @@ static int smsc95xx_reset(struct usbnet *dev)
813 read_buf |= HW_CFG_BIR_; 831 read_buf |= HW_CFG_BIR_;
814 832
815 ret = smsc95xx_write_reg(dev, HW_CFG, read_buf); 833 ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);
816 if (ret < 0) { 834 check_warn_return(ret, "Failed to write HW_CFG_BIR_ bit in HW_CFG\n");
817 netdev_warn(dev->net, "Failed to write HW_CFG_BIR_ bit in HW_CFG register, ret = %d\n",
818 ret);
819 return ret;
820 }
821 835
822 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); 836 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
823 if (ret < 0) { 837 check_warn_return(ret, "Failed to read HW_CFG: %d\n", ret);
824 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
825 return ret;
826 }
827 netif_dbg(dev, ifup, dev->net, 838 netif_dbg(dev, ifup, dev->net,
828 "Read Value from HW_CFG after writing HW_CFG_BIR_: 0x%08x\n", 839 "Read Value from HW_CFG after writing HW_CFG_BIR_: 0x%08x\n",
829 read_buf); 840 read_buf);
@@ -843,40 +854,28 @@ static int smsc95xx_reset(struct usbnet *dev)
843 "rx_urb_size=%ld\n", (ulong)dev->rx_urb_size); 854 "rx_urb_size=%ld\n", (ulong)dev->rx_urb_size);
844 855
845 ret = smsc95xx_write_reg(dev, BURST_CAP, burst_cap); 856 ret = smsc95xx_write_reg(dev, BURST_CAP, burst_cap);
846 if (ret < 0) { 857 check_warn_return(ret, "Failed to write BURST_CAP: %d\n", ret);
847 netdev_warn(dev->net, "Failed to write BURST_CAP: %d\n", ret);
848 return ret;
849 }
850 858
851 ret = smsc95xx_read_reg(dev, BURST_CAP, &read_buf); 859 ret = smsc95xx_read_reg(dev, BURST_CAP, &read_buf);
852 if (ret < 0) { 860 check_warn_return(ret, "Failed to read BURST_CAP: %d\n", ret);
853 netdev_warn(dev->net, "Failed to read BURST_CAP: %d\n", ret); 861
854 return ret;
855 }
856 netif_dbg(dev, ifup, dev->net, 862 netif_dbg(dev, ifup, dev->net,
857 "Read Value from BURST_CAP after writing: 0x%08x\n", 863 "Read Value from BURST_CAP after writing: 0x%08x\n",
858 read_buf); 864 read_buf);
859 865
860 ret = smsc95xx_write_reg(dev, BULK_IN_DLY, DEFAULT_BULK_IN_DELAY); 866 ret = smsc95xx_write_reg(dev, BULK_IN_DLY, DEFAULT_BULK_IN_DELAY);
861 if (ret < 0) { 867 check_warn_return(ret, "Failed to write BULK_IN_DLY: %d\n", ret);
862 netdev_warn(dev->net, "ret = %d\n", ret);
863 return ret;
864 }
865 868
866 ret = smsc95xx_read_reg(dev, BULK_IN_DLY, &read_buf); 869 ret = smsc95xx_read_reg(dev, BULK_IN_DLY, &read_buf);
867 if (ret < 0) { 870 check_warn_return(ret, "Failed to read BULK_IN_DLY: %d\n", ret);
868 netdev_warn(dev->net, "Failed to read BULK_IN_DLY: %d\n", ret); 871
869 return ret;
870 }
871 netif_dbg(dev, ifup, dev->net, 872 netif_dbg(dev, ifup, dev->net,
872 "Read Value from BULK_IN_DLY after writing: 0x%08x\n", 873 "Read Value from BULK_IN_DLY after writing: 0x%08x\n",
873 read_buf); 874 read_buf);
874 875
875 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); 876 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
876 if (ret < 0) { 877 check_warn_return(ret, "Failed to read HW_CFG: %d\n", ret);
877 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret); 878
878 return ret;
879 }
880 netif_dbg(dev, ifup, dev->net, 879 netif_dbg(dev, ifup, dev->net,
881 "Read Value from HW_CFG: 0x%08x\n", read_buf); 880 "Read Value from HW_CFG: 0x%08x\n", read_buf);
882 881
@@ -889,97 +888,66 @@ static int smsc95xx_reset(struct usbnet *dev)
889 read_buf |= NET_IP_ALIGN << 9; 888 read_buf |= NET_IP_ALIGN << 9;
890 889
891 ret = smsc95xx_write_reg(dev, HW_CFG, read_buf); 890 ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);
892 if (ret < 0) { 891 check_warn_return(ret, "Failed to write HW_CFG: %d\n", ret);
893 netdev_warn(dev->net, "Failed to write HW_CFG register, ret=%d\n",
894 ret);
895 return ret;
896 }
897 892
898 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); 893 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
899 if (ret < 0) { 894 check_warn_return(ret, "Failed to read HW_CFG: %d\n", ret);
900 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret); 895
901 return ret;
902 }
903 netif_dbg(dev, ifup, dev->net, 896 netif_dbg(dev, ifup, dev->net,
904 "Read Value from HW_CFG after writing: 0x%08x\n", read_buf); 897 "Read Value from HW_CFG after writing: 0x%08x\n", read_buf);
905 898
906 ret = smsc95xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_); 899 ret = smsc95xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_);
907 if (ret < 0) { 900 check_warn_return(ret, "Failed to write INT_STS: %d\n", ret);
908 netdev_warn(dev->net, "Failed to write INT_STS register, ret=%d\n",
909 ret);
910 return ret;
911 }
912 901
913 ret = smsc95xx_read_reg(dev, ID_REV, &read_buf); 902 ret = smsc95xx_read_reg(dev, ID_REV, &read_buf);
914 if (ret < 0) { 903 check_warn_return(ret, "Failed to read ID_REV: %d\n", ret);
915 netdev_warn(dev->net, "Failed to read ID_REV: %d\n", ret);
916 return ret;
917 }
918 netif_dbg(dev, ifup, dev->net, "ID_REV = 0x%08x\n", read_buf); 904 netif_dbg(dev, ifup, dev->net, "ID_REV = 0x%08x\n", read_buf);
919 905
920 /* Configure GPIO pins as LED outputs */ 906 /* Configure GPIO pins as LED outputs */
921 write_buf = LED_GPIO_CFG_SPD_LED | LED_GPIO_CFG_LNK_LED | 907 write_buf = LED_GPIO_CFG_SPD_LED | LED_GPIO_CFG_LNK_LED |
922 LED_GPIO_CFG_FDX_LED; 908 LED_GPIO_CFG_FDX_LED;
923 ret = smsc95xx_write_reg(dev, LED_GPIO_CFG, write_buf); 909 ret = smsc95xx_write_reg(dev, LED_GPIO_CFG, write_buf);
924 if (ret < 0) { 910 check_warn_return(ret, "Failed to write LED_GPIO_CFG: %d\n", ret);
925 netdev_warn(dev->net, "Failed to write LED_GPIO_CFG register, ret=%d\n",
926 ret);
927 return ret;
928 }
929 911
930 /* Init Tx */ 912 /* Init Tx */
931 ret = smsc95xx_write_reg(dev, FLOW, 0); 913 ret = smsc95xx_write_reg(dev, FLOW, 0);
932 if (ret < 0) { 914 check_warn_return(ret, "Failed to write FLOW: %d\n", ret);
933 netdev_warn(dev->net, "Failed to write FLOW: %d\n", ret);
934 return ret;
935 }
936 915
937 ret = smsc95xx_write_reg(dev, AFC_CFG, AFC_CFG_DEFAULT); 916 ret = smsc95xx_write_reg(dev, AFC_CFG, AFC_CFG_DEFAULT);
938 if (ret < 0) { 917 check_warn_return(ret, "Failed to write AFC_CFG: %d\n", ret);
939 netdev_warn(dev->net, "Failed to write AFC_CFG: %d\n", ret);
940 return ret;
941 }
942 918
943 /* Don't need mac_cr_lock during initialisation */ 919 /* Don't need mac_cr_lock during initialisation */
944 ret = smsc95xx_read_reg(dev, MAC_CR, &pdata->mac_cr); 920 ret = smsc95xx_read_reg(dev, MAC_CR, &pdata->mac_cr);
945 if (ret < 0) { 921 check_warn_return(ret, "Failed to read MAC_CR: %d\n", ret);
946 netdev_warn(dev->net, "Failed to read MAC_CR: %d\n", ret);
947 return ret;
948 }
949 922
950 /* Init Rx */ 923 /* Init Rx */
951 /* Set Vlan */ 924 /* Set Vlan */
952 ret = smsc95xx_write_reg(dev, VLAN1, (u32)ETH_P_8021Q); 925 ret = smsc95xx_write_reg(dev, VLAN1, (u32)ETH_P_8021Q);
953 if (ret < 0) { 926 check_warn_return(ret, "Failed to write VLAN1: %d\n", ret);
954 netdev_warn(dev->net, "Failed to write VAN1: %d\n", ret);
955 return ret;
956 }
957 927
958 /* Enable or disable checksum offload engines */ 928 /* Enable or disable checksum offload engines */
959 smsc95xx_set_features(dev->net, dev->net->features); 929 ret = smsc95xx_set_features(dev->net, dev->net->features);
930 check_warn_return(ret, "Failed to set checksum offload features");
960 931
961 smsc95xx_set_multicast(dev->net); 932 smsc95xx_set_multicast(dev->net);
962 933
963 if (smsc95xx_phy_initialize(dev) < 0) 934 ret = smsc95xx_phy_initialize(dev);
964 return -EIO; 935 check_warn_return(ret, "Failed to init PHY");
965 936
966 ret = smsc95xx_read_reg(dev, INT_EP_CTL, &read_buf); 937 ret = smsc95xx_read_reg(dev, INT_EP_CTL, &read_buf);
967 if (ret < 0) { 938 check_warn_return(ret, "Failed to read INT_EP_CTL: %d\n", ret);
968 netdev_warn(dev->net, "Failed to read INT_EP_CTL: %d\n", ret);
969 return ret;
970 }
971 939
972 /* enable PHY interrupts */ 940 /* enable PHY interrupts */
973 read_buf |= INT_EP_CTL_PHY_INT_; 941 read_buf |= INT_EP_CTL_PHY_INT_;
974 942
975 ret = smsc95xx_write_reg(dev, INT_EP_CTL, read_buf); 943 ret = smsc95xx_write_reg(dev, INT_EP_CTL, read_buf);
976 if (ret < 0) { 944 check_warn_return(ret, "Failed to write INT_EP_CTL: %d\n", ret);
977 netdev_warn(dev->net, "Failed to write INT_EP_CTL: %d\n", ret);
978 return ret;
979 }
980 945
981 smsc95xx_start_tx_path(dev); 946 ret = smsc95xx_start_tx_path(dev);
982 smsc95xx_start_rx_path(dev); 947 check_warn_return(ret, "Failed to start TX path");
948
949 ret = smsc95xx_start_rx_path(dev);
950 check_warn_return(ret, "Failed to start RX path");
983 951
984 netif_dbg(dev, ifup, dev->net, "smsc95xx_reset, return 0\n"); 952 netif_dbg(dev, ifup, dev->net, "smsc95xx_reset, return 0\n");
985 return 0; 953 return 0;
@@ -1006,10 +974,7 @@ static int smsc95xx_bind(struct usbnet *dev, struct usb_interface *intf)
1006 printk(KERN_INFO SMSC_CHIPNAME " v" SMSC_DRIVER_VERSION "\n"); 974 printk(KERN_INFO SMSC_CHIPNAME " v" SMSC_DRIVER_VERSION "\n");
1007 975
1008 ret = usbnet_get_endpoints(dev, intf); 976 ret = usbnet_get_endpoints(dev, intf);
1009 if (ret < 0) { 977 check_warn_return(ret, "usbnet_get_endpoints failed: %d\n", ret);
1010 netdev_warn(dev->net, "usbnet_get_endpoints failed: %d\n", ret);
1011 return ret;
1012 }
1013 978
1014 dev->data[0] = (unsigned long)kzalloc(sizeof(struct smsc95xx_priv), 979 dev->data[0] = (unsigned long)kzalloc(sizeof(struct smsc95xx_priv),
1015 GFP_KERNEL); 980 GFP_KERNEL);