aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/net/tulip/de4x5.c
diff options
context:
space:
mode:
authorJeff Garzik <jeff@garzik.org>2006-05-26 21:39:03 -0400
committerJeff Garzik <jeff@garzik.org>2006-05-26 21:39:03 -0400
commitf3b197ac26ed0e57989856494c495818dcc7f9ac (patch)
tree5451adb0bc6c219d0a794ea32e3c598740c82bdf /drivers/net/tulip/de4x5.c
parent4c0c2fd486b6598e37c77b5d81a08bc2d948aa7b (diff)
[netdrvr] trim trailing whitespace: 8139*.c, epic100, forcedeth, tulip/*
Diffstat (limited to 'drivers/net/tulip/de4x5.c')
-rw-r--r--drivers/net/tulip/de4x5.c716
1 files changed, 358 insertions, 358 deletions
diff --git a/drivers/net/tulip/de4x5.c b/drivers/net/tulip/de4x5.c
index f56094102042..da8bd0d62a3f 100644
--- a/drivers/net/tulip/de4x5.c
+++ b/drivers/net/tulip/de4x5.c
@@ -41,11 +41,11 @@
41 Digital Semiconductor SROM Specification. The driver currently 41 Digital Semiconductor SROM Specification. The driver currently
42 recognises the following chips: 42 recognises the following chips:
43 43
44 DC21040 (no SROM) 44 DC21040 (no SROM)
45 DC21041[A] 45 DC21041[A]
46 DC21140[A] 46 DC21140[A]
47 DC21142 47 DC21142
48 DC21143 48 DC21143
49 49
50 So far the driver is known to work with the following cards: 50 So far the driver is known to work with the following cards:
51 51
@@ -55,7 +55,7 @@
55 SMC8432 55 SMC8432
56 SMC9332 (w/new SROM) 56 SMC9332 (w/new SROM)
57 ZNYX31[45] 57 ZNYX31[45]
58 ZNYX346 10/100 4 port (can act as a 10/100 bridge!) 58 ZNYX346 10/100 4 port (can act as a 10/100 bridge!)
59 59
60 The driver has been tested on a relatively busy network using the DE425, 60 The driver has been tested on a relatively busy network using the DE425,
61 DE434, DE435 and DE500 cards and benchmarked with 'ttcp': it transferred 61 DE434, DE435 and DE500 cards and benchmarked with 'ttcp': it transferred
@@ -106,7 +106,7 @@
106 loading by: 106 loading by:
107 107
108 insmod de4x5 io=0xghh where g = bus number 108 insmod de4x5 io=0xghh where g = bus number
109 hh = device number 109 hh = device number
110 110
111 NB: autoprobing for modules is now supported by default. You may just 111 NB: autoprobing for modules is now supported by default. You may just
112 use: 112 use:
@@ -120,11 +120,11 @@
120 4) if you are wanting to add a new card, goto 5. Otherwise, recompile a 120 4) if you are wanting to add a new card, goto 5. Otherwise, recompile a
121 kernel with the de4x5 configuration turned off and reboot. 121 kernel with the de4x5 configuration turned off and reboot.
122 5) insmod de4x5 [io=0xghh] 122 5) insmod de4x5 [io=0xghh]
123 6) run the net startup bits for your new eth?? interface(s) manually 123 6) run the net startup bits for your new eth?? interface(s) manually
124 (usually /etc/rc.inet[12] at boot time). 124 (usually /etc/rc.inet[12] at boot time).
125 7) enjoy! 125 7) enjoy!
126 126
127 To unload a module, turn off the associated interface(s) 127 To unload a module, turn off the associated interface(s)
128 'ifconfig eth?? down' then 'rmmod de4x5'. 128 'ifconfig eth?? down' then 'rmmod de4x5'.
129 129
130 Automedia detection is included so that in principal you can disconnect 130 Automedia detection is included so that in principal you can disconnect
@@ -135,7 +135,7 @@
135 By default, the driver will now autodetect any DECchip based card. 135 By default, the driver will now autodetect any DECchip based card.
136 Should you have a need to restrict the driver to DIGITAL only cards, you 136 Should you have a need to restrict the driver to DIGITAL only cards, you
137 can compile with a DEC_ONLY define, or if loading as a module, use the 137 can compile with a DEC_ONLY define, or if loading as a module, use the
138 'dec_only=1' parameter. 138 'dec_only=1' parameter.
139 139
140 I've changed the timing routines to use the kernel timer and scheduling 140 I've changed the timing routines to use the kernel timer and scheduling
141 functions so that the hangs and other assorted problems that occurred 141 functions so that the hangs and other assorted problems that occurred
@@ -204,7 +204,7 @@
204 following parameters are allowed: 204 following parameters are allowed:
205 205
206 fdx for full duplex 206 fdx for full duplex
207 autosense to set the media/speed; with the following 207 autosense to set the media/speed; with the following
208 sub-parameters: 208 sub-parameters:
209 TP, TP_NW, BNC, AUI, BNC_AUI, 100Mb, 10Mb, AUTO 209 TP, TP_NW, BNC, AUI, BNC_AUI, 100Mb, 10Mb, AUTO
210 210
@@ -235,14 +235,14 @@
235 this automatically or include #define DE4X5_FORCE_EISA on or before 235 this automatically or include #define DE4X5_FORCE_EISA on or before
236 line 1040 in the driver. 236 line 1040 in the driver.
237 237
238 TO DO: 238 TO DO:
239 ------ 239 ------
240 240
241 Revision History 241 Revision History
242 ---------------- 242 ----------------
243 243
244 Version Date Description 244 Version Date Description
245 245
246 0.1 17-Nov-94 Initial writing. ALPHA code release. 246 0.1 17-Nov-94 Initial writing. ALPHA code release.
247 0.2 13-Jan-95 Added PCI support for DE435's. 247 0.2 13-Jan-95 Added PCI support for DE435's.
248 0.21 19-Jan-95 Added auto media detection. 248 0.21 19-Jan-95 Added auto media detection.
@@ -251,7 +251,7 @@
251 Add request/release_region code. 251 Add request/release_region code.
252 Add loadable modules support for PCI. 252 Add loadable modules support for PCI.
253 Clean up loadable modules support. 253 Clean up loadable modules support.
254 0.23 28-Feb-95 Added DC21041 and DC21140 support. 254 0.23 28-Feb-95 Added DC21041 and DC21140 support.
255 Fix missed frame counter value and initialisation. 255 Fix missed frame counter value and initialisation.
256 Fixed EISA probe. 256 Fixed EISA probe.
257 0.24 11-Apr-95 Change delay routine to use <linux/udelay>. 257 0.24 11-Apr-95 Change delay routine to use <linux/udelay>.
@@ -280,7 +280,7 @@
280 Add kernel timer code (h/w is too flaky). 280 Add kernel timer code (h/w is too flaky).
281 Add MII based PHY autosense. 281 Add MII based PHY autosense.
282 Add new multicasting code. 282 Add new multicasting code.
283 Add new autosense algorithms for media/mode 283 Add new autosense algorithms for media/mode
284 selection using kernel scheduling/timing. 284 selection using kernel scheduling/timing.
285 Re-formatted. 285 Re-formatted.
286 Made changes suggested by <jeff@router.patch.net>: 286 Made changes suggested by <jeff@router.patch.net>:
@@ -307,10 +307,10 @@
307 Add Accton to the list of broken cards. 307 Add Accton to the list of broken cards.
308 Fix TX under-run bug for non DC21140 chips. 308 Fix TX under-run bug for non DC21140 chips.
309 Fix boot command probe bug in alloc_device() as 309 Fix boot command probe bug in alloc_device() as
310 reported by <koen.gadeyne@barco.com> and 310 reported by <koen.gadeyne@barco.com> and
311 <orava@nether.tky.hut.fi>. 311 <orava@nether.tky.hut.fi>.
312 Add cache locks to prevent a race condition as 312 Add cache locks to prevent a race condition as
313 reported by <csd@microplex.com> and 313 reported by <csd@microplex.com> and
314 <baba@beckman.uiuc.edu>. 314 <baba@beckman.uiuc.edu>.
315 Upgraded alloc_device() code. 315 Upgraded alloc_device() code.
316 0.431 28-Jun-96 Fix potential bug in queue_pkt() from discussion 316 0.431 28-Jun-96 Fix potential bug in queue_pkt() from discussion
@@ -322,7 +322,7 @@
322 with a loopback packet. 322 with a loopback packet.
323 0.442 9-Sep-96 Include AUI in dc21041 media printout. Bug reported 323 0.442 9-Sep-96 Include AUI in dc21041 media printout. Bug reported
324 by <bhat@mundook.cs.mu.OZ.AU> 324 by <bhat@mundook.cs.mu.OZ.AU>
325 0.45 8-Dec-96 Include endian functions for PPC use, from work 325 0.45 8-Dec-96 Include endian functions for PPC use, from work
326 by <cort@cs.nmt.edu> and <g.thomas@opengroup.org>. 326 by <cort@cs.nmt.edu> and <g.thomas@opengroup.org>.
327 0.451 28-Dec-96 Added fix to allow autoprobe for modules after 327 0.451 28-Dec-96 Added fix to allow autoprobe for modules after
328 suggestion from <mjacob@feral.com>. 328 suggestion from <mjacob@feral.com>.
@@ -346,14 +346,14 @@
346 <paubert@iram.es>. 346 <paubert@iram.es>.
347 0.52 26-Apr-97 Some changes may not credit the right people - 347 0.52 26-Apr-97 Some changes may not credit the right people -
348 a disk crash meant I lost some mail. 348 a disk crash meant I lost some mail.
349 Change RX interrupt routine to drop rather than 349 Change RX interrupt routine to drop rather than
350 defer packets to avoid hang reported by 350 defer packets to avoid hang reported by
351 <g.thomas@opengroup.org>. 351 <g.thomas@opengroup.org>.
352 Fix srom_exec() to return for COMPACT and type 1 352 Fix srom_exec() to return for COMPACT and type 1
353 infoblocks. 353 infoblocks.
354 Added DC21142 and DC21143 functions. 354 Added DC21142 and DC21143 functions.
355 Added byte counters from <phil@tazenda.demon.co.uk> 355 Added byte counters from <phil@tazenda.demon.co.uk>
356 Added SA_INTERRUPT temporary fix from 356 Added SA_INTERRUPT temporary fix from
357 <mjacob@feral.com>. 357 <mjacob@feral.com>.
358 0.53 12-Nov-97 Fix the *_probe() to include 'eth??' name during 358 0.53 12-Nov-97 Fix the *_probe() to include 'eth??' name during
359 module load: bug reported by 359 module load: bug reported by
@@ -363,10 +363,10 @@
363 Make above search independent of BIOS device scan 363 Make above search independent of BIOS device scan
364 direction. 364 direction.
365 Completed DC2114[23] autosense functions. 365 Completed DC2114[23] autosense functions.
366 0.531 21-Dec-97 Fix DE500-XA 100Mb/s bug reported by 366 0.531 21-Dec-97 Fix DE500-XA 100Mb/s bug reported by
367 <robin@intercore.com 367 <robin@intercore.com
368 Fix type1_infoblock() bug introduced in 0.53, from 368 Fix type1_infoblock() bug introduced in 0.53, from
369 problem reports by 369 problem reports by
370 <parmee@postecss.ncrfran.france.ncr.com> and 370 <parmee@postecss.ncrfran.france.ncr.com> and
371 <jo@ice.dillingen.baynet.de>. 371 <jo@ice.dillingen.baynet.de>.
372 Added argument list to set up each board from either 372 Added argument list to set up each board from either
@@ -374,7 +374,7 @@
374 Added generic MII PHY functionality to deal with 374 Added generic MII PHY functionality to deal with
375 newer PHY chips. 375 newer PHY chips.
376 Fix the mess in 2.1.67. 376 Fix the mess in 2.1.67.
377 0.532 5-Jan-98 Fix bug in mii_get_phy() reported by 377 0.532 5-Jan-98 Fix bug in mii_get_phy() reported by
378 <redhat@cococo.net>. 378 <redhat@cococo.net>.
379 Fix bug in pci_probe() for 64 bit systems reported 379 Fix bug in pci_probe() for 64 bit systems reported
380 by <belliott@accessone.com>. 380 by <belliott@accessone.com>.
@@ -398,7 +398,7 @@
398 version. I hope nothing is broken... 398 version. I hope nothing is broken...
399 Add TX done interrupt modification from suggestion 399 Add TX done interrupt modification from suggestion
400 by <Austin.Donnelly@cl.cam.ac.uk>. 400 by <Austin.Donnelly@cl.cam.ac.uk>.
401 Fix is_anc_capable() bug reported by 401 Fix is_anc_capable() bug reported by
402 <Austin.Donnelly@cl.cam.ac.uk>. 402 <Austin.Donnelly@cl.cam.ac.uk>.
403 Fix type[13]_infoblock() bug: during MII search, PHY 403 Fix type[13]_infoblock() bug: during MII search, PHY
404 lp->rst not run because lp->ibn not initialised - 404 lp->rst not run because lp->ibn not initialised -
@@ -413,7 +413,7 @@
413 Add an_exception() for old ZYNX346 and fix compile 413 Add an_exception() for old ZYNX346 and fix compile
414 warning on PPC & SPARC, from <ecd@skynet.be>. 414 warning on PPC & SPARC, from <ecd@skynet.be>.
415 Fix lastPCI to correctly work with compiled in 415 Fix lastPCI to correctly work with compiled in
416 kernels and modules from bug report by 416 kernels and modules from bug report by
417 <Zlatko.Calusic@CARNet.hr> et al. 417 <Zlatko.Calusic@CARNet.hr> et al.
418 0.542 15-Sep-98 Fix dc2114x_autoconf() to stop multiple messages 418 0.542 15-Sep-98 Fix dc2114x_autoconf() to stop multiple messages
419 when media is unconnected. 419 when media is unconnected.
@@ -425,7 +425,7 @@
425 0.544 8-May-99 Fix for buggy SROM in Motorola embedded boards using 425 0.544 8-May-99 Fix for buggy SROM in Motorola embedded boards using
426 a 21143 by <mmporter@home.com>. 426 a 21143 by <mmporter@home.com>.
427 Change PCI/EISA bus probing order. 427 Change PCI/EISA bus probing order.
428 0.545 28-Nov-99 Further Moto SROM bug fix from 428 0.545 28-Nov-99 Further Moto SROM bug fix from
429 <mporter@eng.mcd.mot.com> 429 <mporter@eng.mcd.mot.com>
430 Remove double checking for DEBUG_RX in de4x5_dbg_rx() 430 Remove double checking for DEBUG_RX in de4x5_dbg_rx()
431 from report by <geert@linux-m68k.org> 431 from report by <geert@linux-m68k.org>
@@ -434,8 +434,8 @@
434 variable 'pb', on a non de4x5 PCI device, in this 434 variable 'pb', on a non de4x5 PCI device, in this
435 case a PCI bridge (DEC chip 21152). The value of 435 case a PCI bridge (DEC chip 21152). The value of
436 'pb' is now only initialized if a de4x5 chip is 436 'pb' is now only initialized if a de4x5 chip is
437 present. 437 present.
438 <france@handhelds.org> 438 <france@handhelds.org>
439 0.547 08-Nov-01 Use library crc32 functions by <Matt_Domsch@dell.com> 439 0.547 08-Nov-01 Use library crc32 functions by <Matt_Domsch@dell.com>
440 0.548 30-Aug-03 Big 2.6 cleanup. Ported to PCI/EISA probing and 440 0.548 30-Aug-03 Big 2.6 cleanup. Ported to PCI/EISA probing and
441 generic DMA APIs. Fixed DE425 support on Alpha. 441 generic DMA APIs. Fixed DE425 support on Alpha.
@@ -584,7 +584,7 @@ static int de4x5_debug = (DEBUG_MEDIA | DEBUG_VERSION);
584 584
585/* 585/*
586** Allow per adapter set up. For modules this is simply a command line 586** Allow per adapter set up. For modules this is simply a command line
587** parameter, e.g.: 587** parameter, e.g.:
588** insmod de4x5 args='eth1:fdx autosense=BNC eth0:autosense=100Mb'. 588** insmod de4x5 args='eth1:fdx autosense=BNC eth0:autosense=100Mb'.
589** 589**
590** For a compiled in driver, place e.g. 590** For a compiled in driver, place e.g.
@@ -655,7 +655,7 @@ static c_char *de4x5_signatures[] = DE4X5_SIGNATURE;
655** Memory Alignment. Each descriptor is 4 longwords long. To force a 655** Memory Alignment. Each descriptor is 4 longwords long. To force a
656** particular alignment on the TX descriptor, adjust DESC_SKIP_LEN and 656** particular alignment on the TX descriptor, adjust DESC_SKIP_LEN and
657** DESC_ALIGN. ALIGN aligns the start address of the private memory area 657** DESC_ALIGN. ALIGN aligns the start address of the private memory area
658** and hence the RX descriptor ring's first entry. 658** and hence the RX descriptor ring's first entry.
659*/ 659*/
660#define DE4X5_ALIGN4 ((u_long)4 - 1) /* 1 longword align */ 660#define DE4X5_ALIGN4 ((u_long)4 - 1) /* 1 longword align */
661#define DE4X5_ALIGN8 ((u_long)8 - 1) /* 2 longword align */ 661#define DE4X5_ALIGN8 ((u_long)8 - 1) /* 2 longword align */
@@ -1081,8 +1081,8 @@ static int (*dc_infoblock[])(struct net_device *dev, u_char, u_char *) = {
1081 mdelay(2); /* Wait for 2ms */\ 1081 mdelay(2); /* Wait for 2ms */\
1082} 1082}
1083 1083
1084 1084
1085static int __devinit 1085static int __devinit
1086de4x5_hw_init(struct net_device *dev, u_long iobase, struct device *gendev) 1086de4x5_hw_init(struct net_device *dev, u_long iobase, struct device *gendev)
1087{ 1087{
1088 char name[DE4X5_NAME_LENGTH + 1]; 1088 char name[DE4X5_NAME_LENGTH + 1];
@@ -1102,12 +1102,12 @@ de4x5_hw_init(struct net_device *dev, u_long iobase, struct device *gendev)
1102 mdelay(10); 1102 mdelay(10);
1103 1103
1104 RESET_DE4X5; 1104 RESET_DE4X5;
1105 1105
1106 if ((inl(DE4X5_STS) & (STS_TS | STS_RS)) != 0) { 1106 if ((inl(DE4X5_STS) & (STS_TS | STS_RS)) != 0) {
1107 return -ENXIO; /* Hardware could not reset */ 1107 return -ENXIO; /* Hardware could not reset */
1108 } 1108 }
1109 1109
1110 /* 1110 /*
1111 ** Now find out what kind of DC21040/DC21041/DC21140 board we have. 1111 ** Now find out what kind of DC21040/DC21041/DC21140 board we have.
1112 */ 1112 */
1113 lp->useSROM = FALSE; 1113 lp->useSROM = FALSE;
@@ -1116,21 +1116,21 @@ de4x5_hw_init(struct net_device *dev, u_long iobase, struct device *gendev)
1116 } else { 1116 } else {
1117 EISA_signature(name, gendev); 1117 EISA_signature(name, gendev);
1118 } 1118 }
1119 1119
1120 if (*name == '\0') { /* Not found a board signature */ 1120 if (*name == '\0') { /* Not found a board signature */
1121 return -ENXIO; 1121 return -ENXIO;
1122 } 1122 }
1123 1123
1124 dev->base_addr = iobase; 1124 dev->base_addr = iobase;
1125 printk ("%s: %s at 0x%04lx", gendev->bus_id, name, iobase); 1125 printk ("%s: %s at 0x%04lx", gendev->bus_id, name, iobase);
1126 1126
1127 printk(", h/w address "); 1127 printk(", h/w address ");
1128 status = get_hw_addr(dev); 1128 status = get_hw_addr(dev);
1129 for (i = 0; i < ETH_ALEN - 1; i++) { /* get the ethernet addr. */ 1129 for (i = 0; i < ETH_ALEN - 1; i++) { /* get the ethernet addr. */
1130 printk("%2.2x:", dev->dev_addr[i]); 1130 printk("%2.2x:", dev->dev_addr[i]);
1131 } 1131 }
1132 printk("%2.2x,\n", dev->dev_addr[i]); 1132 printk("%2.2x,\n", dev->dev_addr[i]);
1133 1133
1134 if (status != 0) { 1134 if (status != 0) {
1135 printk(" which has an Ethernet PROM CRC error.\n"); 1135 printk(" which has an Ethernet PROM CRC error.\n");
1136 return -ENXIO; 1136 return -ENXIO;
@@ -1171,10 +1171,10 @@ de4x5_hw_init(struct net_device *dev, u_long iobase, struct device *gendev)
1171 } 1171 }
1172 1172
1173 lp->tx_ring = lp->rx_ring + NUM_RX_DESC; 1173 lp->tx_ring = lp->rx_ring + NUM_RX_DESC;
1174 1174
1175 /* 1175 /*
1176 ** Set up the RX descriptor ring (Intels) 1176 ** Set up the RX descriptor ring (Intels)
1177 ** Allocate contiguous receive buffers, long word aligned (Alphas) 1177 ** Allocate contiguous receive buffers, long word aligned (Alphas)
1178 */ 1178 */
1179#if !defined(__alpha__) && !defined(__powerpc__) && !defined(__sparc_v9__) && !defined(DE4X5_DO_MEMCPY) 1179#if !defined(__alpha__) && !defined(__powerpc__) && !defined(__sparc_v9__) && !defined(DE4X5_DO_MEMCPY)
1180 for (i=0; i<NUM_RX_DESC; i++) { 1180 for (i=0; i<NUM_RX_DESC; i++) {
@@ -1210,7 +1210,7 @@ de4x5_hw_init(struct net_device *dev, u_long iobase, struct device *gendev)
1210 1210
1211 lp->rxRingSize = NUM_RX_DESC; 1211 lp->rxRingSize = NUM_RX_DESC;
1212 lp->txRingSize = NUM_TX_DESC; 1212 lp->txRingSize = NUM_TX_DESC;
1213 1213
1214 /* Write the end of list marker to the descriptor lists */ 1214 /* Write the end of list marker to the descriptor lists */
1215 lp->rx_ring[lp->rxRingSize - 1].des1 |= cpu_to_le32(RD_RER); 1215 lp->rx_ring[lp->rxRingSize - 1].des1 |= cpu_to_le32(RD_RER);
1216 lp->tx_ring[lp->txRingSize - 1].des1 |= cpu_to_le32(TD_TER); 1216 lp->tx_ring[lp->txRingSize - 1].des1 |= cpu_to_le32(TD_TER);
@@ -1219,7 +1219,7 @@ de4x5_hw_init(struct net_device *dev, u_long iobase, struct device *gendev)
1219 outl(lp->dma_rings, DE4X5_RRBA); 1219 outl(lp->dma_rings, DE4X5_RRBA);
1220 outl(lp->dma_rings + NUM_RX_DESC * sizeof(struct de4x5_desc), 1220 outl(lp->dma_rings + NUM_RX_DESC * sizeof(struct de4x5_desc),
1221 DE4X5_TRBA); 1221 DE4X5_TRBA);
1222 1222
1223 /* Initialise the IRQ mask and Enable/Disable */ 1223 /* Initialise the IRQ mask and Enable/Disable */
1224 lp->irq_mask = IMR_RIM | IMR_TIM | IMR_TUM | IMR_UNM; 1224 lp->irq_mask = IMR_RIM | IMR_TIM | IMR_TUM | IMR_UNM;
1225 lp->irq_en = IMR_NIM | IMR_AIM; 1225 lp->irq_en = IMR_NIM | IMR_AIM;
@@ -1252,7 +1252,7 @@ de4x5_hw_init(struct net_device *dev, u_long iobase, struct device *gendev)
1252 if ((lp->chipset != DC21040) && (lp->chipset != DC21041)) { 1252 if ((lp->chipset != DC21040) && (lp->chipset != DC21041)) {
1253 mii_get_phy(dev); 1253 mii_get_phy(dev);
1254 } 1254 }
1255 1255
1256#ifndef __sparc_v9__ 1256#ifndef __sparc_v9__
1257 printk(" and requires IRQ%d (provided by %s).\n", dev->irq, 1257 printk(" and requires IRQ%d (provided by %s).\n", dev->irq,
1258#else 1258#else
@@ -1260,11 +1260,11 @@ de4x5_hw_init(struct net_device *dev, u_long iobase, struct device *gendev)
1260#endif 1260#endif
1261 ((lp->bus == PCI) ? "PCI BIOS" : "EISA CNFG")); 1261 ((lp->bus == PCI) ? "PCI BIOS" : "EISA CNFG"));
1262 } 1262 }
1263 1263
1264 if (de4x5_debug & DEBUG_VERSION) { 1264 if (de4x5_debug & DEBUG_VERSION) {
1265 printk(version); 1265 printk(version);
1266 } 1266 }
1267 1267
1268 /* The DE4X5-specific entries in the device structure. */ 1268 /* The DE4X5-specific entries in the device structure. */
1269 SET_MODULE_OWNER(dev); 1269 SET_MODULE_OWNER(dev);
1270 SET_NETDEV_DEV(dev, gendev); 1270 SET_NETDEV_DEV(dev, gendev);
@@ -1274,23 +1274,23 @@ de4x5_hw_init(struct net_device *dev, u_long iobase, struct device *gendev)
1274 dev->get_stats = &de4x5_get_stats; 1274 dev->get_stats = &de4x5_get_stats;
1275 dev->set_multicast_list = &set_multicast_list; 1275 dev->set_multicast_list = &set_multicast_list;
1276 dev->do_ioctl = &de4x5_ioctl; 1276 dev->do_ioctl = &de4x5_ioctl;
1277 1277
1278 dev->mem_start = 0; 1278 dev->mem_start = 0;
1279 1279
1280 /* Fill in the generic fields of the device structure. */ 1280 /* Fill in the generic fields of the device structure. */
1281 if ((status = register_netdev (dev))) { 1281 if ((status = register_netdev (dev))) {
1282 dma_free_coherent (gendev, lp->dma_size, 1282 dma_free_coherent (gendev, lp->dma_size,
1283 lp->rx_ring, lp->dma_rings); 1283 lp->rx_ring, lp->dma_rings);
1284 return status; 1284 return status;
1285 } 1285 }
1286 1286
1287 /* Let the adapter sleep to save power */ 1287 /* Let the adapter sleep to save power */
1288 yawn(dev, SLEEP); 1288 yawn(dev, SLEEP);
1289 1289
1290 return status; 1290 return status;
1291} 1291}
1292 1292
1293 1293
1294static int 1294static int
1295de4x5_open(struct net_device *dev) 1295de4x5_open(struct net_device *dev)
1296{ 1296{
@@ -1312,15 +1312,15 @@ de4x5_open(struct net_device *dev)
1312 */ 1312 */
1313 yawn(dev, WAKEUP); 1313 yawn(dev, WAKEUP);
1314 1314
1315 /* 1315 /*
1316 ** Re-initialize the DE4X5... 1316 ** Re-initialize the DE4X5...
1317 */ 1317 */
1318 status = de4x5_init(dev); 1318 status = de4x5_init(dev);
1319 spin_lock_init(&lp->lock); 1319 spin_lock_init(&lp->lock);
1320 lp->state = OPEN; 1320 lp->state = OPEN;
1321 de4x5_dbg_open(dev); 1321 de4x5_dbg_open(dev);
1322 1322
1323 if (request_irq(dev->irq, (void *)de4x5_interrupt, SA_SHIRQ, 1323 if (request_irq(dev->irq, (void *)de4x5_interrupt, SA_SHIRQ,
1324 lp->adapter_name, dev)) { 1324 lp->adapter_name, dev)) {
1325 printk("de4x5_open(): Requested IRQ%d is busy - attemping FAST/SHARE...", dev->irq); 1325 printk("de4x5_open(): Requested IRQ%d is busy - attemping FAST/SHARE...", dev->irq);
1326 if (request_irq(dev->irq, de4x5_interrupt, SA_INTERRUPT | SA_SHIRQ, 1326 if (request_irq(dev->irq, de4x5_interrupt, SA_INTERRUPT | SA_SHIRQ,
@@ -1340,11 +1340,11 @@ de4x5_open(struct net_device *dev)
1340 1340
1341 lp->interrupt = UNMASK_INTERRUPTS; 1341 lp->interrupt = UNMASK_INTERRUPTS;
1342 dev->trans_start = jiffies; 1342 dev->trans_start = jiffies;
1343 1343
1344 START_DE4X5; 1344 START_DE4X5;
1345 1345
1346 de4x5_setup_intr(dev); 1346 de4x5_setup_intr(dev);
1347 1347
1348 if (de4x5_debug & DEBUG_OPEN) { 1348 if (de4x5_debug & DEBUG_OPEN) {
1349 printk("\tsts: 0x%08x\n", inl(DE4X5_STS)); 1349 printk("\tsts: 0x%08x\n", inl(DE4X5_STS));
1350 printk("\tbmr: 0x%08x\n", inl(DE4X5_BMR)); 1350 printk("\tbmr: 0x%08x\n", inl(DE4X5_BMR));
@@ -1355,7 +1355,7 @@ de4x5_open(struct net_device *dev)
1355 printk("\tstrr: 0x%08x\n", inl(DE4X5_STRR)); 1355 printk("\tstrr: 0x%08x\n", inl(DE4X5_STRR));
1356 printk("\tsigr: 0x%08x\n", inl(DE4X5_SIGR)); 1356 printk("\tsigr: 0x%08x\n", inl(DE4X5_SIGR));
1357 } 1357 }
1358 1358
1359 return status; 1359 return status;
1360} 1360}
1361 1361
@@ -1369,15 +1369,15 @@ de4x5_open(struct net_device *dev)
1369*/ 1369*/
1370static int 1370static int
1371de4x5_init(struct net_device *dev) 1371de4x5_init(struct net_device *dev)
1372{ 1372{
1373 /* Lock out other processes whilst setting up the hardware */ 1373 /* Lock out other processes whilst setting up the hardware */
1374 netif_stop_queue(dev); 1374 netif_stop_queue(dev);
1375 1375
1376 de4x5_sw_reset(dev); 1376 de4x5_sw_reset(dev);
1377 1377
1378 /* Autoconfigure the connected port */ 1378 /* Autoconfigure the connected port */
1379 autoconf_media(dev); 1379 autoconf_media(dev);
1380 1380
1381 return 0; 1381 return 0;
1382} 1382}
1383 1383
@@ -1388,7 +1388,7 @@ de4x5_sw_reset(struct net_device *dev)
1388 u_long iobase = dev->base_addr; 1388 u_long iobase = dev->base_addr;
1389 int i, j, status = 0; 1389 int i, j, status = 0;
1390 s32 bmr, omr; 1390 s32 bmr, omr;
1391 1391
1392 /* Select the MII or SRL port now and RESET the MAC */ 1392 /* Select the MII or SRL port now and RESET the MAC */
1393 if (!lp->useSROM) { 1393 if (!lp->useSROM) {
1394 if (lp->phy[lp->active].id != 0) { 1394 if (lp->phy[lp->active].id != 0) {
@@ -1399,7 +1399,7 @@ de4x5_sw_reset(struct net_device *dev)
1399 de4x5_switch_mac_port(dev); 1399 de4x5_switch_mac_port(dev);
1400 } 1400 }
1401 1401
1402 /* 1402 /*
1403 ** Set the programmable burst length to 8 longwords for all the DC21140 1403 ** Set the programmable burst length to 8 longwords for all the DC21140
1404 ** Fasternet chips and 4 longwords for all others: DMA errors result 1404 ** Fasternet chips and 4 longwords for all others: DMA errors result
1405 ** without these values. Cache align 16 long. 1405 ** without these values. Cache align 16 long.
@@ -1416,23 +1416,23 @@ de4x5_sw_reset(struct net_device *dev)
1416 outl(lp->dma_rings, DE4X5_RRBA); 1416 outl(lp->dma_rings, DE4X5_RRBA);
1417 outl(lp->dma_rings + NUM_RX_DESC * sizeof(struct de4x5_desc), 1417 outl(lp->dma_rings + NUM_RX_DESC * sizeof(struct de4x5_desc),
1418 DE4X5_TRBA); 1418 DE4X5_TRBA);
1419 1419
1420 lp->rx_new = lp->rx_old = 0; 1420 lp->rx_new = lp->rx_old = 0;
1421 lp->tx_new = lp->tx_old = 0; 1421 lp->tx_new = lp->tx_old = 0;
1422 1422
1423 for (i = 0; i < lp->rxRingSize; i++) { 1423 for (i = 0; i < lp->rxRingSize; i++) {
1424 lp->rx_ring[i].status = cpu_to_le32(R_OWN); 1424 lp->rx_ring[i].status = cpu_to_le32(R_OWN);
1425 } 1425 }
1426 1426
1427 for (i = 0; i < lp->txRingSize; i++) { 1427 for (i = 0; i < lp->txRingSize; i++) {
1428 lp->tx_ring[i].status = cpu_to_le32(0); 1428 lp->tx_ring[i].status = cpu_to_le32(0);
1429 } 1429 }
1430 1430
1431 barrier(); 1431 barrier();
1432 1432
1433 /* Build the setup frame depending on filtering mode */ 1433 /* Build the setup frame depending on filtering mode */
1434 SetMulticastFilter(dev); 1434 SetMulticastFilter(dev);
1435 1435
1436 load_packet(dev, lp->setup_frame, PERFECT_F|TD_SET|SETUP_FRAME_LEN, (struct sk_buff *)1); 1436 load_packet(dev, lp->setup_frame, PERFECT_F|TD_SET|SETUP_FRAME_LEN, (struct sk_buff *)1);
1437 outl(omr|OMR_ST, DE4X5_OMR); 1437 outl(omr|OMR_ST, DE4X5_OMR);
1438 1438
@@ -1445,18 +1445,18 @@ de4x5_sw_reset(struct net_device *dev)
1445 outl(omr, DE4X5_OMR); /* Stop everything! */ 1445 outl(omr, DE4X5_OMR); /* Stop everything! */
1446 1446
1447 if (j == 0) { 1447 if (j == 0) {
1448 printk("%s: Setup frame timed out, status %08x\n", dev->name, 1448 printk("%s: Setup frame timed out, status %08x\n", dev->name,
1449 inl(DE4X5_STS)); 1449 inl(DE4X5_STS));
1450 status = -EIO; 1450 status = -EIO;
1451 } 1451 }
1452 1452
1453 lp->tx_new = (++lp->tx_new) % lp->txRingSize; 1453 lp->tx_new = (++lp->tx_new) % lp->txRingSize;
1454 lp->tx_old = lp->tx_new; 1454 lp->tx_old = lp->tx_new;
1455 1455
1456 return status; 1456 return status;
1457} 1457}
1458 1458
1459/* 1459/*
1460** Writes a socket buffer address to the next available transmit descriptor. 1460** Writes a socket buffer address to the next available transmit descriptor.
1461*/ 1461*/
1462static int 1462static int
@@ -1469,9 +1469,9 @@ de4x5_queue_pkt(struct sk_buff *skb, struct net_device *dev)
1469 1469
1470 netif_stop_queue(dev); 1470 netif_stop_queue(dev);
1471 if (lp->tx_enable == NO) { /* Cannot send for now */ 1471 if (lp->tx_enable == NO) { /* Cannot send for now */
1472 return -1; 1472 return -1;
1473 } 1473 }
1474 1474
1475 /* 1475 /*
1476 ** Clean out the TX ring asynchronously to interrupts - sometimes the 1476 ** Clean out the TX ring asynchronously to interrupts - sometimes the
1477 ** interrupts are lost by delayed descriptor status updates relative to 1477 ** interrupts are lost by delayed descriptor status updates relative to
@@ -1482,7 +1482,7 @@ de4x5_queue_pkt(struct sk_buff *skb, struct net_device *dev)
1482 spin_unlock_irqrestore(&lp->lock, flags); 1482 spin_unlock_irqrestore(&lp->lock, flags);
1483 1483
1484 /* Test if cache is already locked - requeue skb if so */ 1484 /* Test if cache is already locked - requeue skb if so */
1485 if (test_and_set_bit(0, (void *)&lp->cache.lock) && !lp->interrupt) 1485 if (test_and_set_bit(0, (void *)&lp->cache.lock) && !lp->interrupt)
1486 return -1; 1486 return -1;
1487 1487
1488 /* Transmit descriptor ring full or stale skb */ 1488 /* Transmit descriptor ring full or stale skb */
@@ -1509,10 +1509,10 @@ de4x5_queue_pkt(struct sk_buff *skb, struct net_device *dev)
1509 load_packet(dev, skb->data, TD_IC | TD_LS | TD_FS | skb->len, skb); 1509 load_packet(dev, skb->data, TD_IC | TD_LS | TD_FS | skb->len, skb);
1510 lp->stats.tx_bytes += skb->len; 1510 lp->stats.tx_bytes += skb->len;
1511 outl(POLL_DEMAND, DE4X5_TPD);/* Start the TX */ 1511 outl(POLL_DEMAND, DE4X5_TPD);/* Start the TX */
1512 1512
1513 lp->tx_new = (++lp->tx_new) % lp->txRingSize; 1513 lp->tx_new = (++lp->tx_new) % lp->txRingSize;
1514 dev->trans_start = jiffies; 1514 dev->trans_start = jiffies;
1515 1515
1516 if (TX_BUFFS_AVAIL) { 1516 if (TX_BUFFS_AVAIL) {
1517 netif_start_queue(dev); /* Another pkt may be queued */ 1517 netif_start_queue(dev); /* Another pkt may be queued */
1518 } 1518 }
@@ -1521,15 +1521,15 @@ de4x5_queue_pkt(struct sk_buff *skb, struct net_device *dev)
1521 } 1521 }
1522 if (skb) de4x5_putb_cache(dev, skb); 1522 if (skb) de4x5_putb_cache(dev, skb);
1523 } 1523 }
1524 1524
1525 lp->cache.lock = 0; 1525 lp->cache.lock = 0;
1526 1526
1527 return status; 1527 return status;
1528} 1528}
1529 1529
1530/* 1530/*
1531** The DE4X5 interrupt handler. 1531** The DE4X5 interrupt handler.
1532** 1532**
1533** I/O Read/Writes through intermediate PCI bridges are never 'posted', 1533** I/O Read/Writes through intermediate PCI bridges are never 'posted',
1534** so that the asserted interrupt always has some real data to work with - 1534** so that the asserted interrupt always has some real data to work with -
1535** if these I/O accesses are ever changed to memory accesses, ensure the 1535** if these I/O accesses are ever changed to memory accesses, ensure the
@@ -1546,7 +1546,7 @@ de4x5_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1546 s32 imr, omr, sts, limit; 1546 s32 imr, omr, sts, limit;
1547 u_long iobase; 1547 u_long iobase;
1548 unsigned int handled = 0; 1548 unsigned int handled = 0;
1549 1549
1550 if (dev == NULL) { 1550 if (dev == NULL) {
1551 printk ("de4x5_interrupt(): irq %d for unknown device.\n", irq); 1551 printk ("de4x5_interrupt(): irq %d for unknown device.\n", irq);
1552 return IRQ_NONE; 1552 return IRQ_NONE;
@@ -1554,35 +1554,35 @@ de4x5_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1554 lp = netdev_priv(dev); 1554 lp = netdev_priv(dev);
1555 spin_lock(&lp->lock); 1555 spin_lock(&lp->lock);
1556 iobase = dev->base_addr; 1556 iobase = dev->base_addr;
1557 1557
1558 DISABLE_IRQs; /* Ensure non re-entrancy */ 1558 DISABLE_IRQs; /* Ensure non re-entrancy */
1559 1559
1560 if (test_and_set_bit(MASK_INTERRUPTS, (void*) &lp->interrupt)) 1560 if (test_and_set_bit(MASK_INTERRUPTS, (void*) &lp->interrupt))
1561 printk("%s: Re-entering the interrupt handler.\n", dev->name); 1561 printk("%s: Re-entering the interrupt handler.\n", dev->name);
1562 1562
1563 synchronize_irq(dev->irq); 1563 synchronize_irq(dev->irq);
1564 1564
1565 for (limit=0; limit<8; limit++) { 1565 for (limit=0; limit<8; limit++) {
1566 sts = inl(DE4X5_STS); /* Read IRQ status */ 1566 sts = inl(DE4X5_STS); /* Read IRQ status */
1567 outl(sts, DE4X5_STS); /* Reset the board interrupts */ 1567 outl(sts, DE4X5_STS); /* Reset the board interrupts */
1568 1568
1569 if (!(sts & lp->irq_mask)) break;/* All done */ 1569 if (!(sts & lp->irq_mask)) break;/* All done */
1570 handled = 1; 1570 handled = 1;
1571 1571
1572 if (sts & (STS_RI | STS_RU)) /* Rx interrupt (packet[s] arrived) */ 1572 if (sts & (STS_RI | STS_RU)) /* Rx interrupt (packet[s] arrived) */
1573 de4x5_rx(dev); 1573 de4x5_rx(dev);
1574 1574
1575 if (sts & (STS_TI | STS_TU)) /* Tx interrupt (packet sent) */ 1575 if (sts & (STS_TI | STS_TU)) /* Tx interrupt (packet sent) */
1576 de4x5_tx(dev); 1576 de4x5_tx(dev);
1577 1577
1578 if (sts & STS_LNF) { /* TP Link has failed */ 1578 if (sts & STS_LNF) { /* TP Link has failed */
1579 lp->irq_mask &= ~IMR_LFM; 1579 lp->irq_mask &= ~IMR_LFM;
1580 } 1580 }
1581 1581
1582 if (sts & STS_UNF) { /* Transmit underrun */ 1582 if (sts & STS_UNF) { /* Transmit underrun */
1583 de4x5_txur(dev); 1583 de4x5_txur(dev);
1584 } 1584 }
1585 1585
1586 if (sts & STS_SE) { /* Bus Error */ 1586 if (sts & STS_SE) { /* Bus Error */
1587 STOP_DE4X5; 1587 STOP_DE4X5;
1588 printk("%s: Fatal bus error occurred, sts=%#8x, device stopped.\n", 1588 printk("%s: Fatal bus error occurred, sts=%#8x, device stopped.\n",
@@ -1603,7 +1603,7 @@ de4x5_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1603 lp->interrupt = UNMASK_INTERRUPTS; 1603 lp->interrupt = UNMASK_INTERRUPTS;
1604 ENABLE_IRQs; 1604 ENABLE_IRQs;
1605 spin_unlock(&lp->lock); 1605 spin_unlock(&lp->lock);
1606 1606
1607 return IRQ_RETVAL(handled); 1607 return IRQ_RETVAL(handled);
1608} 1608}
1609 1609
@@ -1614,11 +1614,11 @@ de4x5_rx(struct net_device *dev)
1614 u_long iobase = dev->base_addr; 1614 u_long iobase = dev->base_addr;
1615 int entry; 1615 int entry;
1616 s32 status; 1616 s32 status;
1617 1617
1618 for (entry=lp->rx_new; (s32)le32_to_cpu(lp->rx_ring[entry].status)>=0; 1618 for (entry=lp->rx_new; (s32)le32_to_cpu(lp->rx_ring[entry].status)>=0;
1619 entry=lp->rx_new) { 1619 entry=lp->rx_new) {
1620 status = (s32)le32_to_cpu(lp->rx_ring[entry].status); 1620 status = (s32)le32_to_cpu(lp->rx_ring[entry].status);
1621 1621
1622 if (lp->rx_ovf) { 1622 if (lp->rx_ovf) {
1623 if (inl(DE4X5_MFC) & MFC_FOCM) { 1623 if (inl(DE4X5_MFC) & MFC_FOCM) {
1624 de4x5_rx_ovfc(dev); 1624 de4x5_rx_ovfc(dev);
@@ -1629,7 +1629,7 @@ de4x5_rx(struct net_device *dev)
1629 if (status & RD_FS) { /* Remember the start of frame */ 1629 if (status & RD_FS) { /* Remember the start of frame */
1630 lp->rx_old = entry; 1630 lp->rx_old = entry;
1631 } 1631 }
1632 1632
1633 if (status & RD_LS) { /* Valid frame status */ 1633 if (status & RD_LS) { /* Valid frame status */
1634 if (lp->tx_enable) lp->linkOK++; 1634 if (lp->tx_enable) lp->linkOK++;
1635 if (status & RD_ES) { /* There was an error. */ 1635 if (status & RD_ES) { /* There was an error. */
@@ -1646,9 +1646,9 @@ de4x5_rx(struct net_device *dev)
1646 struct sk_buff *skb; 1646 struct sk_buff *skb;
1647 short pkt_len = (short)(le32_to_cpu(lp->rx_ring[entry].status) 1647 short pkt_len = (short)(le32_to_cpu(lp->rx_ring[entry].status)
1648 >> 16) - 4; 1648 >> 16) - 4;
1649 1649
1650 if ((skb = de4x5_alloc_rx_buff(dev, entry, pkt_len)) == NULL) { 1650 if ((skb = de4x5_alloc_rx_buff(dev, entry, pkt_len)) == NULL) {
1651 printk("%s: Insufficient memory; nuking packet.\n", 1651 printk("%s: Insufficient memory; nuking packet.\n",
1652 dev->name); 1652 dev->name);
1653 lp->stats.rx_dropped++; 1653 lp->stats.rx_dropped++;
1654 } else { 1654 } else {
@@ -1658,14 +1658,14 @@ de4x5_rx(struct net_device *dev)
1658 skb->protocol=eth_type_trans(skb,dev); 1658 skb->protocol=eth_type_trans(skb,dev);
1659 de4x5_local_stats(dev, skb->data, pkt_len); 1659 de4x5_local_stats(dev, skb->data, pkt_len);
1660 netif_rx(skb); 1660 netif_rx(skb);
1661 1661
1662 /* Update stats */ 1662 /* Update stats */
1663 dev->last_rx = jiffies; 1663 dev->last_rx = jiffies;
1664 lp->stats.rx_packets++; 1664 lp->stats.rx_packets++;
1665 lp->stats.rx_bytes += pkt_len; 1665 lp->stats.rx_bytes += pkt_len;
1666 } 1666 }
1667 } 1667 }
1668 1668
1669 /* Change buffer ownership for this frame, back to the adapter */ 1669 /* Change buffer ownership for this frame, back to the adapter */
1670 for (;lp->rx_old!=entry;lp->rx_old=(++lp->rx_old)%lp->rxRingSize) { 1670 for (;lp->rx_old!=entry;lp->rx_old=(++lp->rx_old)%lp->rxRingSize) {
1671 lp->rx_ring[lp->rx_old].status = cpu_to_le32(R_OWN); 1671 lp->rx_ring[lp->rx_old].status = cpu_to_le32(R_OWN);
@@ -1674,13 +1674,13 @@ de4x5_rx(struct net_device *dev)
1674 lp->rx_ring[entry].status = cpu_to_le32(R_OWN); 1674 lp->rx_ring[entry].status = cpu_to_le32(R_OWN);
1675 barrier(); 1675 barrier();
1676 } 1676 }
1677 1677
1678 /* 1678 /*
1679 ** Update entry information 1679 ** Update entry information
1680 */ 1680 */
1681 lp->rx_new = (++lp->rx_new) % lp->rxRingSize; 1681 lp->rx_new = (++lp->rx_new) % lp->rxRingSize;
1682 } 1682 }
1683 1683
1684 return 0; 1684 return 0;
1685} 1685}
1686 1686
@@ -1705,20 +1705,20 @@ de4x5_tx(struct net_device *dev)
1705 u_long iobase = dev->base_addr; 1705 u_long iobase = dev->base_addr;
1706 int entry; 1706 int entry;
1707 s32 status; 1707 s32 status;
1708 1708
1709 for (entry = lp->tx_old; entry != lp->tx_new; entry = lp->tx_old) { 1709 for (entry = lp->tx_old; entry != lp->tx_new; entry = lp->tx_old) {
1710 status = (s32)le32_to_cpu(lp->tx_ring[entry].status); 1710 status = (s32)le32_to_cpu(lp->tx_ring[entry].status);
1711 if (status < 0) { /* Buffer not sent yet */ 1711 if (status < 0) { /* Buffer not sent yet */
1712 break; 1712 break;
1713 } else if (status != 0x7fffffff) { /* Not setup frame */ 1713 } else if (status != 0x7fffffff) { /* Not setup frame */
1714 if (status & TD_ES) { /* An error happened */ 1714 if (status & TD_ES) { /* An error happened */
1715 lp->stats.tx_errors++; 1715 lp->stats.tx_errors++;
1716 if (status & TD_NC) lp->stats.tx_carrier_errors++; 1716 if (status & TD_NC) lp->stats.tx_carrier_errors++;
1717 if (status & TD_LC) lp->stats.tx_window_errors++; 1717 if (status & TD_LC) lp->stats.tx_window_errors++;
1718 if (status & TD_UF) lp->stats.tx_fifo_errors++; 1718 if (status & TD_UF) lp->stats.tx_fifo_errors++;
1719 if (status & TD_EC) lp->pktStats.excessive_collisions++; 1719 if (status & TD_EC) lp->pktStats.excessive_collisions++;
1720 if (status & TD_DE) lp->stats.tx_aborted_errors++; 1720 if (status & TD_DE) lp->stats.tx_aborted_errors++;
1721 1721
1722 if (TX_PKT_PENDING) { 1722 if (TX_PKT_PENDING) {
1723 outl(POLL_DEMAND, DE4X5_TPD);/* Restart a stalled TX */ 1723 outl(POLL_DEMAND, DE4X5_TPD);/* Restart a stalled TX */
1724 } 1724 }
@@ -1727,14 +1727,14 @@ de4x5_tx(struct net_device *dev)
1727 if (lp->tx_enable) lp->linkOK++; 1727 if (lp->tx_enable) lp->linkOK++;
1728 } 1728 }
1729 /* Update the collision counter */ 1729 /* Update the collision counter */
1730 lp->stats.collisions += ((status & TD_EC) ? 16 : 1730 lp->stats.collisions += ((status & TD_EC) ? 16 :
1731 ((status & TD_CC) >> 3)); 1731 ((status & TD_CC) >> 3));
1732 1732
1733 /* Free the buffer. */ 1733 /* Free the buffer. */
1734 if (lp->tx_skb[entry] != NULL) 1734 if (lp->tx_skb[entry] != NULL)
1735 de4x5_free_tx_buff(lp, entry); 1735 de4x5_free_tx_buff(lp, entry);
1736 } 1736 }
1737 1737
1738 /* Update all the pointers */ 1738 /* Update all the pointers */
1739 lp->tx_old = (++lp->tx_old) % lp->txRingSize; 1739 lp->tx_old = (++lp->tx_old) % lp->txRingSize;
1740 } 1740 }
@@ -1746,7 +1746,7 @@ de4x5_tx(struct net_device *dev)
1746 else 1746 else
1747 netif_start_queue(dev); 1747 netif_start_queue(dev);
1748 } 1748 }
1749 1749
1750 return 0; 1750 return 0;
1751} 1751}
1752 1752
@@ -1755,9 +1755,9 @@ de4x5_ast(struct net_device *dev)
1755{ 1755{
1756 struct de4x5_private *lp = netdev_priv(dev); 1756 struct de4x5_private *lp = netdev_priv(dev);
1757 int next_tick = DE4X5_AUTOSENSE_MS; 1757 int next_tick = DE4X5_AUTOSENSE_MS;
1758 1758
1759 disable_ast(dev); 1759 disable_ast(dev);
1760 1760
1761 if (lp->useSROM) { 1761 if (lp->useSROM) {
1762 next_tick = srom_autoconf(dev); 1762 next_tick = srom_autoconf(dev);
1763 } else if (lp->chipset == DC21140) { 1763 } else if (lp->chipset == DC21140) {
@@ -1769,7 +1769,7 @@ de4x5_ast(struct net_device *dev)
1769 } 1769 }
1770 lp->linkOK = 0; 1770 lp->linkOK = 0;
1771 enable_ast(dev, next_tick); 1771 enable_ast(dev, next_tick);
1772 1772
1773 return 0; 1773 return 0;
1774} 1774}
1775 1775
@@ -1792,11 +1792,11 @@ de4x5_txur(struct net_device *dev)
1792 } 1792 }
1793 outl(omr | OMR_ST | OMR_SR, DE4X5_OMR); 1793 outl(omr | OMR_ST | OMR_SR, DE4X5_OMR);
1794 } 1794 }
1795 1795
1796 return 0; 1796 return 0;
1797} 1797}
1798 1798
1799static int 1799static int
1800de4x5_rx_ovfc(struct net_device *dev) 1800de4x5_rx_ovfc(struct net_device *dev)
1801{ 1801{
1802 struct de4x5_private *lp = netdev_priv(dev); 1802 struct de4x5_private *lp = netdev_priv(dev);
@@ -1813,7 +1813,7 @@ de4x5_rx_ovfc(struct net_device *dev)
1813 } 1813 }
1814 1814
1815 outl(omr, DE4X5_OMR); 1815 outl(omr, DE4X5_OMR);
1816 1816
1817 return 0; 1817 return 0;
1818} 1818}
1819 1819
@@ -1823,22 +1823,22 @@ de4x5_close(struct net_device *dev)
1823 struct de4x5_private *lp = netdev_priv(dev); 1823 struct de4x5_private *lp = netdev_priv(dev);
1824 u_long iobase = dev->base_addr; 1824 u_long iobase = dev->base_addr;
1825 s32 imr, omr; 1825 s32 imr, omr;
1826 1826
1827 disable_ast(dev); 1827 disable_ast(dev);
1828 1828
1829 netif_stop_queue(dev); 1829 netif_stop_queue(dev);
1830 1830
1831 if (de4x5_debug & DEBUG_CLOSE) { 1831 if (de4x5_debug & DEBUG_CLOSE) {
1832 printk("%s: Shutting down ethercard, status was %8.8x.\n", 1832 printk("%s: Shutting down ethercard, status was %8.8x.\n",
1833 dev->name, inl(DE4X5_STS)); 1833 dev->name, inl(DE4X5_STS));
1834 } 1834 }
1835 1835
1836 /* 1836 /*
1837 ** We stop the DE4X5 here... mask interrupts and stop TX & RX 1837 ** We stop the DE4X5 here... mask interrupts and stop TX & RX
1838 */ 1838 */
1839 DISABLE_IRQs; 1839 DISABLE_IRQs;
1840 STOP_DE4X5; 1840 STOP_DE4X5;
1841 1841
1842 /* Free the associated irq */ 1842 /* Free the associated irq */
1843 free_irq(dev->irq, dev); 1843 free_irq(dev->irq, dev);
1844 lp->state = CLOSED; 1844 lp->state = CLOSED;
@@ -1846,10 +1846,10 @@ de4x5_close(struct net_device *dev)
1846 /* Free any socket buffers */ 1846 /* Free any socket buffers */
1847 de4x5_free_rx_buffs(dev); 1847 de4x5_free_rx_buffs(dev);
1848 de4x5_free_tx_buffs(dev); 1848 de4x5_free_tx_buffs(dev);
1849 1849
1850 /* Put the adapter to sleep to save power */ 1850 /* Put the adapter to sleep to save power */
1851 yawn(dev, SLEEP); 1851 yawn(dev, SLEEP);
1852 1852
1853 return 0; 1853 return 0;
1854} 1854}
1855 1855
@@ -1858,9 +1858,9 @@ de4x5_get_stats(struct net_device *dev)
1858{ 1858{
1859 struct de4x5_private *lp = netdev_priv(dev); 1859 struct de4x5_private *lp = netdev_priv(dev);
1860 u_long iobase = dev->base_addr; 1860 u_long iobase = dev->base_addr;
1861 1861
1862 lp->stats.rx_missed_errors = (int)(inl(DE4X5_MFC) & (MFC_OVFL | MFC_CNTR)); 1862 lp->stats.rx_missed_errors = (int)(inl(DE4X5_MFC) & (MFC_OVFL | MFC_CNTR));
1863 1863
1864 return &lp->stats; 1864 return &lp->stats;
1865} 1865}
1866 1866
@@ -1886,7 +1886,7 @@ de4x5_local_stats(struct net_device *dev, char *buf, int pkt_len)
1886 (*(s16 *)&buf[4] == *(s16 *)&dev->dev_addr[4])) { 1886 (*(s16 *)&buf[4] == *(s16 *)&dev->dev_addr[4])) {
1887 lp->pktStats.unicast++; 1887 lp->pktStats.unicast++;
1888 } 1888 }
1889 1889
1890 lp->pktStats.bins[0]++; /* Duplicates stats.rx_packets */ 1890 lp->pktStats.bins[0]++; /* Duplicates stats.rx_packets */
1891 if (lp->pktStats.bins[0] == 0) { /* Reset counters */ 1891 if (lp->pktStats.bins[0] == 0) { /* Reset counters */
1892 memset((char *)&lp->pktStats, 0, sizeof(lp->pktStats)); 1892 memset((char *)&lp->pktStats, 0, sizeof(lp->pktStats));
@@ -1937,11 +1937,11 @@ set_multicast_list(struct net_device *dev)
1937 omr = inl(DE4X5_OMR); 1937 omr = inl(DE4X5_OMR);
1938 omr |= OMR_PR; 1938 omr |= OMR_PR;
1939 outl(omr, DE4X5_OMR); 1939 outl(omr, DE4X5_OMR);
1940 } else { 1940 } else {
1941 SetMulticastFilter(dev); 1941 SetMulticastFilter(dev);
1942 load_packet(dev, lp->setup_frame, TD_IC | PERFECT_F | TD_SET | 1942 load_packet(dev, lp->setup_frame, TD_IC | PERFECT_F | TD_SET |
1943 SETUP_FRAME_LEN, (struct sk_buff *)1); 1943 SETUP_FRAME_LEN, (struct sk_buff *)1);
1944 1944
1945 lp->tx_new = (++lp->tx_new) % lp->txRingSize; 1945 lp->tx_new = (++lp->tx_new) % lp->txRingSize;
1946 outl(POLL_DEMAND, DE4X5_TPD); /* Start the TX */ 1946 outl(POLL_DEMAND, DE4X5_TPD); /* Start the TX */
1947 dev->trans_start = jiffies; 1947 dev->trans_start = jiffies;
@@ -1969,20 +1969,20 @@ SetMulticastFilter(struct net_device *dev)
1969 omr = inl(DE4X5_OMR); 1969 omr = inl(DE4X5_OMR);
1970 omr &= ~(OMR_PR | OMR_PM); 1970 omr &= ~(OMR_PR | OMR_PM);
1971 pa = build_setup_frame(dev, ALL); /* Build the basic frame */ 1971 pa = build_setup_frame(dev, ALL); /* Build the basic frame */
1972 1972
1973 if ((dev->flags & IFF_ALLMULTI) || (dev->mc_count > 14)) { 1973 if ((dev->flags & IFF_ALLMULTI) || (dev->mc_count > 14)) {
1974 omr |= OMR_PM; /* Pass all multicasts */ 1974 omr |= OMR_PM; /* Pass all multicasts */
1975 } else if (lp->setup_f == HASH_PERF) { /* Hash Filtering */ 1975 } else if (lp->setup_f == HASH_PERF) { /* Hash Filtering */
1976 for (i=0;i<dev->mc_count;i++) { /* for each address in the list */ 1976 for (i=0;i<dev->mc_count;i++) { /* for each address in the list */
1977 addrs=dmi->dmi_addr; 1977 addrs=dmi->dmi_addr;
1978 dmi=dmi->next; 1978 dmi=dmi->next;
1979 if ((*addrs & 0x01) == 1) { /* multicast address? */ 1979 if ((*addrs & 0x01) == 1) { /* multicast address? */
1980 crc = ether_crc_le(ETH_ALEN, addrs); 1980 crc = ether_crc_le(ETH_ALEN, addrs);
1981 hashcode = crc & HASH_BITS; /* hashcode is 9 LSb of CRC */ 1981 hashcode = crc & HASH_BITS; /* hashcode is 9 LSb of CRC */
1982 1982
1983 byte = hashcode >> 3; /* bit[3-8] -> byte in filter */ 1983 byte = hashcode >> 3; /* bit[3-8] -> byte in filter */
1984 bit = 1 << (hashcode & 0x07);/* bit[0-2] -> bit in byte */ 1984 bit = 1 << (hashcode & 0x07);/* bit[0-2] -> bit in byte */
1985 1985
1986 byte <<= 1; /* calc offset into setup frame */ 1986 byte <<= 1; /* calc offset into setup frame */
1987 if (byte & 0x02) { 1987 if (byte & 0x02) {
1988 byte -= 1; 1988 byte -= 1;
@@ -1994,14 +1994,14 @@ SetMulticastFilter(struct net_device *dev)
1994 for (j=0; j<dev->mc_count; j++) { 1994 for (j=0; j<dev->mc_count; j++) {
1995 addrs=dmi->dmi_addr; 1995 addrs=dmi->dmi_addr;
1996 dmi=dmi->next; 1996 dmi=dmi->next;
1997 for (i=0; i<ETH_ALEN; i++) { 1997 for (i=0; i<ETH_ALEN; i++) {
1998 *(pa + (i&1)) = *addrs++; 1998 *(pa + (i&1)) = *addrs++;
1999 if (i & 0x01) pa += 4; 1999 if (i & 0x01) pa += 4;
2000 } 2000 }
2001 } 2001 }
2002 } 2002 }
2003 outl(omr, DE4X5_OMR); 2003 outl(omr, DE4X5_OMR);
2004 2004
2005 return; 2005 return;
2006} 2006}
2007 2007
@@ -2031,18 +2031,18 @@ static int __init de4x5_eisa_probe (struct device *gendev)
2031 status = -EBUSY; 2031 status = -EBUSY;
2032 goto release_reg_1; 2032 goto release_reg_1;
2033 } 2033 }
2034 2034
2035 if (!(dev = alloc_etherdev (sizeof (struct de4x5_private)))) { 2035 if (!(dev = alloc_etherdev (sizeof (struct de4x5_private)))) {
2036 status = -ENOMEM; 2036 status = -ENOMEM;
2037 goto release_reg_2; 2037 goto release_reg_2;
2038 } 2038 }
2039 lp = netdev_priv(dev); 2039 lp = netdev_priv(dev);
2040 2040
2041 cfid = (u32) inl(PCI_CFID); 2041 cfid = (u32) inl(PCI_CFID);
2042 lp->cfrv = (u_short) inl(PCI_CFRV); 2042 lp->cfrv = (u_short) inl(PCI_CFRV);
2043 device = (cfid >> 8) & 0x00ffff00; 2043 device = (cfid >> 8) & 0x00ffff00;
2044 vendor = (u_short) cfid; 2044 vendor = (u_short) cfid;
2045 2045
2046 /* Read the EISA Configuration Registers */ 2046 /* Read the EISA Configuration Registers */
2047 regval = inb(EISA_REG0) & (ER0_INTL | ER0_INTT); 2047 regval = inb(EISA_REG0) & (ER0_INTL | ER0_INTT);
2048#ifdef CONFIG_ALPHA 2048#ifdef CONFIG_ALPHA
@@ -2050,7 +2050,7 @@ static int __init de4x5_eisa_probe (struct device *gendev)
2050 * care about the EISA configuration, and thus doesn't 2050 * care about the EISA configuration, and thus doesn't
2051 * configure the PLX bridge properly. Oh well... Simply mimic 2051 * configure the PLX bridge properly. Oh well... Simply mimic
2052 * the EISA config file to sort it out. */ 2052 * the EISA config file to sort it out. */
2053 2053
2054 /* EISA REG1: Assert DecChip 21040 HW Reset */ 2054 /* EISA REG1: Assert DecChip 21040 HW Reset */
2055 outb (ER1_IAM | 1, EISA_REG1); 2055 outb (ER1_IAM | 1, EISA_REG1);
2056 mdelay (1); 2056 mdelay (1);
@@ -2061,12 +2061,12 @@ static int __init de4x5_eisa_probe (struct device *gendev)
2061 2061
2062 /* EISA REG3: R/W Burst Transfer Enable */ 2062 /* EISA REG3: R/W Burst Transfer Enable */
2063 outb (ER3_BWE | ER3_BRE, EISA_REG3); 2063 outb (ER3_BWE | ER3_BRE, EISA_REG3);
2064 2064
2065 /* 32_bit slave/master, Preempt Time=23 bclks, Unlatched Interrupt */ 2065 /* 32_bit slave/master, Preempt Time=23 bclks, Unlatched Interrupt */
2066 outb (ER0_BSW | ER0_BMW | ER0_EPT | regval, EISA_REG0); 2066 outb (ER0_BSW | ER0_BMW | ER0_EPT | regval, EISA_REG0);
2067#endif 2067#endif
2068 irq = de4x5_irq[(regval >> 1) & 0x03]; 2068 irq = de4x5_irq[(regval >> 1) & 0x03];
2069 2069
2070 if (is_DC2114x) { 2070 if (is_DC2114x) {
2071 device = ((lp->cfrv & CFRV_RN) < DC2114x_BRK ? DC21142 : DC21143); 2071 device = ((lp->cfrv & CFRV_RN) < DC2114x_BRK ? DC21142 : DC21143);
2072 } 2072 }
@@ -2077,7 +2077,7 @@ static int __init de4x5_eisa_probe (struct device *gendev)
2077 outl(PCI_COMMAND_IO | PCI_COMMAND_MASTER, PCI_CFCS); 2077 outl(PCI_COMMAND_IO | PCI_COMMAND_MASTER, PCI_CFCS);
2078 outl(0x00006000, PCI_CFLT); 2078 outl(0x00006000, PCI_CFLT);
2079 outl(iobase, PCI_CBIO); 2079 outl(iobase, PCI_CBIO);
2080 2080
2081 DevicePresent(dev, EISA_APROM); 2081 DevicePresent(dev, EISA_APROM);
2082 2082
2083 dev->irq = irq; 2083 dev->irq = irq;
@@ -2102,7 +2102,7 @@ static int __devexit de4x5_eisa_remove (struct device *device)
2102 2102
2103 dev = device->driver_data; 2103 dev = device->driver_data;
2104 iobase = dev->base_addr; 2104 iobase = dev->base_addr;
2105 2105
2106 unregister_netdev (dev); 2106 unregister_netdev (dev);
2107 free_netdev (dev); 2107 free_netdev (dev);
2108 release_region (iobase + DE4X5_EISA_IO_PORTS, DE4X5_EISA_TOTAL_SIZE); 2108 release_region (iobase + DE4X5_EISA_IO_PORTS, DE4X5_EISA_TOTAL_SIZE);
@@ -2131,11 +2131,11 @@ MODULE_DEVICE_TABLE(eisa, de4x5_eisa_ids);
2131 2131
2132/* 2132/*
2133** This function searches the current bus (which is >0) for a DECchip with an 2133** This function searches the current bus (which is >0) for a DECchip with an
2134** SROM, so that in multiport cards that have one SROM shared between multiple 2134** SROM, so that in multiport cards that have one SROM shared between multiple
2135** DECchips, we can find the base SROM irrespective of the BIOS scan direction. 2135** DECchips, we can find the base SROM irrespective of the BIOS scan direction.
2136** For single port cards this is a time waster... 2136** For single port cards this is a time waster...
2137*/ 2137*/
2138static void __devinit 2138static void __devinit
2139srom_search(struct net_device *dev, struct pci_dev *pdev) 2139srom_search(struct net_device *dev, struct pci_dev *pdev)
2140{ 2140{
2141 u_char pb; 2141 u_char pb;
@@ -2163,7 +2163,7 @@ srom_search(struct net_device *dev, struct pci_dev *pdev)
2163 /* Set the device number information */ 2163 /* Set the device number information */
2164 lp->device = PCI_SLOT(this_dev->devfn); 2164 lp->device = PCI_SLOT(this_dev->devfn);
2165 lp->bus_num = pb; 2165 lp->bus_num = pb;
2166 2166
2167 /* Set the chipset information */ 2167 /* Set the chipset information */
2168 if (is_DC2114x) { 2168 if (is_DC2114x) {
2169 device = ((cfrv & CFRV_RN) < DC2114x_BRK ? DC21142 : DC21143); 2169 device = ((cfrv & CFRV_RN) < DC2114x_BRK ? DC21142 : DC21143);
@@ -2176,7 +2176,7 @@ srom_search(struct net_device *dev, struct pci_dev *pdev)
2176 /* Fetch the IRQ to be used */ 2176 /* Fetch the IRQ to be used */
2177 irq = this_dev->irq; 2177 irq = this_dev->irq;
2178 if ((irq == 0) || (irq == 0xff) || ((int)irq == -1)) continue; 2178 if ((irq == 0) || (irq == 0xff) || ((int)irq == -1)) continue;
2179 2179
2180 /* Check if I/O accesses are enabled */ 2180 /* Check if I/O accesses are enabled */
2181 pci_read_config_word(this_dev, PCI_COMMAND, &status); 2181 pci_read_config_word(this_dev, PCI_COMMAND, &status);
2182 if (!(status & PCI_COMMAND_IO)) continue; 2182 if (!(status & PCI_COMMAND_IO)) continue;
@@ -2254,7 +2254,7 @@ static int __devinit de4x5_pci_probe (struct pci_dev *pdev,
2254 lp = netdev_priv(dev); 2254 lp = netdev_priv(dev);
2255 lp->bus = PCI; 2255 lp->bus = PCI;
2256 lp->bus_num = 0; 2256 lp->bus_num = 0;
2257 2257
2258 /* Search for an SROM on this bus */ 2258 /* Search for an SROM on this bus */
2259 if (lp->bus_num != pb) { 2259 if (lp->bus_num != pb) {
2260 lp->bus_num = pb; 2260 lp->bus_num = pb;
@@ -2267,7 +2267,7 @@ static int __devinit de4x5_pci_probe (struct pci_dev *pdev,
2267 /* Set the device number information */ 2267 /* Set the device number information */
2268 lp->device = dev_num; 2268 lp->device = dev_num;
2269 lp->bus_num = pb; 2269 lp->bus_num = pb;
2270 2270
2271 /* Set the chipset information */ 2271 /* Set the chipset information */
2272 if (is_DC2114x) { 2272 if (is_DC2114x) {
2273 device = ((lp->cfrv & CFRV_RN) < DC2114x_BRK ? DC21142 : DC21143); 2273 device = ((lp->cfrv & CFRV_RN) < DC2114x_BRK ? DC21142 : DC21143);
@@ -2283,7 +2283,7 @@ static int __devinit de4x5_pci_probe (struct pci_dev *pdev,
2283 error = -ENODEV; 2283 error = -ENODEV;
2284 goto free_dev; 2284 goto free_dev;
2285 } 2285 }
2286 2286
2287 /* Check if I/O accesses and Bus Mastering are enabled */ 2287 /* Check if I/O accesses and Bus Mastering are enabled */
2288 pci_read_config_word(pdev, PCI_COMMAND, &status); 2288 pci_read_config_word(pdev, PCI_COMMAND, &status);
2289#ifdef __powerpc__ 2289#ifdef __powerpc__
@@ -2322,7 +2322,7 @@ static int __devinit de4x5_pci_probe (struct pci_dev *pdev,
2322 } 2322 }
2323 2323
2324 dev->irq = irq; 2324 dev->irq = irq;
2325 2325
2326 if ((error = de4x5_hw_init(dev, iobase, &pdev->dev))) { 2326 if ((error = de4x5_hw_init(dev, iobase, &pdev->dev))) {
2327 goto release; 2327 goto release;
2328 } 2328 }
@@ -2377,7 +2377,7 @@ static struct pci_driver de4x5_pci_driver = {
2377** Auto configure the media here rather than setting the port at compile 2377** Auto configure the media here rather than setting the port at compile
2378** time. This routine is called by de4x5_init() and when a loss of media is 2378** time. This routine is called by de4x5_init() and when a loss of media is
2379** detected (excessive collisions, loss of carrier, no carrier or link fail 2379** detected (excessive collisions, loss of carrier, no carrier or link fail
2380** [TP] or no recent receive activity) to check whether the user has been 2380** [TP] or no recent receive activity) to check whether the user has been
2381** sneaky and changed the port on us. 2381** sneaky and changed the port on us.
2382*/ 2382*/
2383static int 2383static int
@@ -2405,7 +2405,7 @@ autoconf_media(struct net_device *dev)
2405 } 2405 }
2406 2406
2407 enable_ast(dev, next_tick); 2407 enable_ast(dev, next_tick);
2408 2408
2409 return (lp->media); 2409 return (lp->media);
2410} 2410}
2411 2411
@@ -2428,7 +2428,7 @@ dc21040_autoconf(struct net_device *dev)
2428 u_long iobase = dev->base_addr; 2428 u_long iobase = dev->base_addr;
2429 int next_tick = DE4X5_AUTOSENSE_MS; 2429 int next_tick = DE4X5_AUTOSENSE_MS;
2430 s32 imr; 2430 s32 imr;
2431 2431
2432 switch (lp->media) { 2432 switch (lp->media) {
2433 case INIT: 2433 case INIT:
2434 DISABLE_IRQs; 2434 DISABLE_IRQs;
@@ -2447,36 +2447,36 @@ dc21040_autoconf(struct net_device *dev)
2447 lp->local_state = 0; 2447 lp->local_state = 0;
2448 next_tick = dc21040_autoconf(dev); 2448 next_tick = dc21040_autoconf(dev);
2449 break; 2449 break;
2450 2450
2451 case TP: 2451 case TP:
2452 next_tick = dc21040_state(dev, 0x8f01, 0xffff, 0x0000, 3000, BNC_AUI, 2452 next_tick = dc21040_state(dev, 0x8f01, 0xffff, 0x0000, 3000, BNC_AUI,
2453 TP_SUSPECT, test_tp); 2453 TP_SUSPECT, test_tp);
2454 break; 2454 break;
2455 2455
2456 case TP_SUSPECT: 2456 case TP_SUSPECT:
2457 next_tick = de4x5_suspect_state(dev, 1000, TP, test_tp, dc21040_autoconf); 2457 next_tick = de4x5_suspect_state(dev, 1000, TP, test_tp, dc21040_autoconf);
2458 break; 2458 break;
2459 2459
2460 case BNC: 2460 case BNC:
2461 case AUI: 2461 case AUI:
2462 case BNC_AUI: 2462 case BNC_AUI:
2463 next_tick = dc21040_state(dev, 0x8f09, 0x0705, 0x0006, 3000, EXT_SIA, 2463 next_tick = dc21040_state(dev, 0x8f09, 0x0705, 0x0006, 3000, EXT_SIA,
2464 BNC_AUI_SUSPECT, ping_media); 2464 BNC_AUI_SUSPECT, ping_media);
2465 break; 2465 break;
2466 2466
2467 case BNC_AUI_SUSPECT: 2467 case BNC_AUI_SUSPECT:
2468 next_tick = de4x5_suspect_state(dev, 1000, BNC_AUI, ping_media, dc21040_autoconf); 2468 next_tick = de4x5_suspect_state(dev, 1000, BNC_AUI, ping_media, dc21040_autoconf);
2469 break; 2469 break;
2470 2470
2471 case EXT_SIA: 2471 case EXT_SIA:
2472 next_tick = dc21040_state(dev, 0x3041, 0x0000, 0x0006, 3000, 2472 next_tick = dc21040_state(dev, 0x3041, 0x0000, 0x0006, 3000,
2473 NC, EXT_SIA_SUSPECT, ping_media); 2473 NC, EXT_SIA_SUSPECT, ping_media);
2474 break; 2474 break;
2475 2475
2476 case EXT_SIA_SUSPECT: 2476 case EXT_SIA_SUSPECT:
2477 next_tick = de4x5_suspect_state(dev, 1000, EXT_SIA, ping_media, dc21040_autoconf); 2477 next_tick = de4x5_suspect_state(dev, 1000, EXT_SIA, ping_media, dc21040_autoconf);
2478 break; 2478 break;
2479 2479
2480 case NC: 2480 case NC:
2481 /* default to TP for all */ 2481 /* default to TP for all */
2482 reset_init_sia(dev, 0x8f01, 0xffff, 0x0000); 2482 reset_init_sia(dev, 0x8f01, 0xffff, 0x0000);
@@ -2488,13 +2488,13 @@ dc21040_autoconf(struct net_device *dev)
2488 lp->tx_enable = NO; 2488 lp->tx_enable = NO;
2489 break; 2489 break;
2490 } 2490 }
2491 2491
2492 return next_tick; 2492 return next_tick;
2493} 2493}
2494 2494
2495static int 2495static int
2496dc21040_state(struct net_device *dev, int csr13, int csr14, int csr15, int timeout, 2496dc21040_state(struct net_device *dev, int csr13, int csr14, int csr15, int timeout,
2497 int next_state, int suspect_state, 2497 int next_state, int suspect_state,
2498 int (*fn)(struct net_device *, int)) 2498 int (*fn)(struct net_device *, int))
2499{ 2499{
2500 struct de4x5_private *lp = netdev_priv(dev); 2500 struct de4x5_private *lp = netdev_priv(dev);
@@ -2507,7 +2507,7 @@ dc21040_state(struct net_device *dev, int csr13, int csr14, int csr15, int timeo
2507 lp->local_state++; 2507 lp->local_state++;
2508 next_tick = 500; 2508 next_tick = 500;
2509 break; 2509 break;
2510 2510
2511 case 1: 2511 case 1:
2512 if (!lp->tx_enable) { 2512 if (!lp->tx_enable) {
2513 linkBad = fn(dev, timeout); 2513 linkBad = fn(dev, timeout);
@@ -2527,7 +2527,7 @@ dc21040_state(struct net_device *dev, int csr13, int csr14, int csr15, int timeo
2527 } 2527 }
2528 break; 2528 break;
2529 } 2529 }
2530 2530
2531 return next_tick; 2531 return next_tick;
2532} 2532}
2533 2533
@@ -2582,7 +2582,7 @@ dc21041_autoconf(struct net_device *dev)
2582 u_long iobase = dev->base_addr; 2582 u_long iobase = dev->base_addr;
2583 s32 sts, irqs, irq_mask, imr, omr; 2583 s32 sts, irqs, irq_mask, imr, omr;
2584 int next_tick = DE4X5_AUTOSENSE_MS; 2584 int next_tick = DE4X5_AUTOSENSE_MS;
2585 2585
2586 switch (lp->media) { 2586 switch (lp->media) {
2587 case INIT: 2587 case INIT:
2588 DISABLE_IRQs; 2588 DISABLE_IRQs;
@@ -2603,7 +2603,7 @@ dc21041_autoconf(struct net_device *dev)
2603 lp->local_state = 0; 2603 lp->local_state = 0;
2604 next_tick = dc21041_autoconf(dev); 2604 next_tick = dc21041_autoconf(dev);
2605 break; 2605 break;
2606 2606
2607 case TP_NW: 2607 case TP_NW:
2608 if (lp->timeout < 0) { 2608 if (lp->timeout < 0) {
2609 omr = inl(DE4X5_OMR);/* Set up full duplex for the autonegotiate */ 2609 omr = inl(DE4X5_OMR);/* Set up full duplex for the autonegotiate */
@@ -2623,7 +2623,7 @@ dc21041_autoconf(struct net_device *dev)
2623 next_tick = dc21041_autoconf(dev); 2623 next_tick = dc21041_autoconf(dev);
2624 } 2624 }
2625 break; 2625 break;
2626 2626
2627 case ANS: 2627 case ANS:
2628 if (!lp->tx_enable) { 2628 if (!lp->tx_enable) {
2629 irqs = STS_LNP; 2629 irqs = STS_LNP;
@@ -2645,11 +2645,11 @@ dc21041_autoconf(struct net_device *dev)
2645 next_tick = 3000; 2645 next_tick = 3000;
2646 } 2646 }
2647 break; 2647 break;
2648 2648
2649 case ANS_SUSPECT: 2649 case ANS_SUSPECT:
2650 next_tick = de4x5_suspect_state(dev, 1000, ANS, test_tp, dc21041_autoconf); 2650 next_tick = de4x5_suspect_state(dev, 1000, ANS, test_tp, dc21041_autoconf);
2651 break; 2651 break;
2652 2652
2653 case TP: 2653 case TP:
2654 if (!lp->tx_enable) { 2654 if (!lp->tx_enable) {
2655 if (lp->timeout < 0) { 2655 if (lp->timeout < 0) {
@@ -2679,11 +2679,11 @@ dc21041_autoconf(struct net_device *dev)
2679 next_tick = 3000; 2679 next_tick = 3000;
2680 } 2680 }
2681 break; 2681 break;
2682 2682
2683 case TP_SUSPECT: 2683 case TP_SUSPECT:
2684 next_tick = de4x5_suspect_state(dev, 1000, TP, test_tp, dc21041_autoconf); 2684 next_tick = de4x5_suspect_state(dev, 1000, TP, test_tp, dc21041_autoconf);
2685 break; 2685 break;
2686 2686
2687 case AUI: 2687 case AUI:
2688 if (!lp->tx_enable) { 2688 if (!lp->tx_enable) {
2689 if (lp->timeout < 0) { 2689 if (lp->timeout < 0) {
@@ -2709,11 +2709,11 @@ dc21041_autoconf(struct net_device *dev)
2709 next_tick = 3000; 2709 next_tick = 3000;
2710 } 2710 }
2711 break; 2711 break;
2712 2712
2713 case AUI_SUSPECT: 2713 case AUI_SUSPECT:
2714 next_tick = de4x5_suspect_state(dev, 1000, AUI, ping_media, dc21041_autoconf); 2714 next_tick = de4x5_suspect_state(dev, 1000, AUI, ping_media, dc21041_autoconf);
2715 break; 2715 break;
2716 2716
2717 case BNC: 2717 case BNC:
2718 switch (lp->local_state) { 2718 switch (lp->local_state) {
2719 case 0: 2719 case 0:
@@ -2731,7 +2731,7 @@ dc21041_autoconf(struct net_device *dev)
2731 next_tick = dc21041_autoconf(dev); 2731 next_tick = dc21041_autoconf(dev);
2732 } 2732 }
2733 break; 2733 break;
2734 2734
2735 case 1: 2735 case 1:
2736 if (!lp->tx_enable) { 2736 if (!lp->tx_enable) {
2737 if ((sts = ping_media(dev, 3000)) < 0) { 2737 if ((sts = ping_media(dev, 3000)) < 0) {
@@ -2751,11 +2751,11 @@ dc21041_autoconf(struct net_device *dev)
2751 break; 2751 break;
2752 } 2752 }
2753 break; 2753 break;
2754 2754
2755 case BNC_SUSPECT: 2755 case BNC_SUSPECT:
2756 next_tick = de4x5_suspect_state(dev, 1000, BNC, ping_media, dc21041_autoconf); 2756 next_tick = de4x5_suspect_state(dev, 1000, BNC, ping_media, dc21041_autoconf);
2757 break; 2757 break;
2758 2758
2759 case NC: 2759 case NC:
2760 omr = inl(DE4X5_OMR); /* Set up full duplex for the autonegotiate */ 2760 omr = inl(DE4X5_OMR); /* Set up full duplex for the autonegotiate */
2761 outl(omr | OMR_FDX, DE4X5_OMR); 2761 outl(omr | OMR_FDX, DE4X5_OMR);
@@ -2768,7 +2768,7 @@ dc21041_autoconf(struct net_device *dev)
2768 lp->tx_enable = NO; 2768 lp->tx_enable = NO;
2769 break; 2769 break;
2770 } 2770 }
2771 2771
2772 return next_tick; 2772 return next_tick;
2773} 2773}
2774 2774
@@ -2784,9 +2784,9 @@ dc21140m_autoconf(struct net_device *dev)
2784 int ana, anlpa, cap, cr, slnk, sr; 2784 int ana, anlpa, cap, cr, slnk, sr;
2785 int next_tick = DE4X5_AUTOSENSE_MS; 2785 int next_tick = DE4X5_AUTOSENSE_MS;
2786 u_long imr, omr, iobase = dev->base_addr; 2786 u_long imr, omr, iobase = dev->base_addr;
2787 2787
2788 switch(lp->media) { 2788 switch(lp->media) {
2789 case INIT: 2789 case INIT:
2790 if (lp->timeout < 0) { 2790 if (lp->timeout < 0) {
2791 DISABLE_IRQs; 2791 DISABLE_IRQs;
2792 lp->tx_enable = FALSE; 2792 lp->tx_enable = FALSE;
@@ -2813,7 +2813,7 @@ dc21140m_autoconf(struct net_device *dev)
2813 lp->media = _100Mb; 2813 lp->media = _100Mb;
2814 } else if (lp->autosense == _10Mb) { 2814 } else if (lp->autosense == _10Mb) {
2815 lp->media = _10Mb; 2815 lp->media = _10Mb;
2816 } else if ((lp->autosense == AUTO) && 2816 } else if ((lp->autosense == AUTO) &&
2817 ((sr=is_anc_capable(dev)) & MII_SR_ANC)) { 2817 ((sr=is_anc_capable(dev)) & MII_SR_ANC)) {
2818 ana = (((sr >> 6) & MII_ANA_TAF) | MII_ANA_CSMA); 2818 ana = (((sr >> 6) & MII_ANA_TAF) | MII_ANA_CSMA);
2819 ana &= (lp->fdx ? ~0 : ~MII_ANA_FDAM); 2819 ana &= (lp->fdx ? ~0 : ~MII_ANA_FDAM);
@@ -2831,7 +2831,7 @@ dc21140m_autoconf(struct net_device *dev)
2831 next_tick = dc21140m_autoconf(dev); 2831 next_tick = dc21140m_autoconf(dev);
2832 } 2832 }
2833 break; 2833 break;
2834 2834
2835 case ANS: 2835 case ANS:
2836 switch (lp->local_state) { 2836 switch (lp->local_state) {
2837 case 0: 2837 case 0:
@@ -2851,7 +2851,7 @@ dc21140m_autoconf(struct net_device *dev)
2851 next_tick = dc21140m_autoconf(dev); 2851 next_tick = dc21140m_autoconf(dev);
2852 } 2852 }
2853 break; 2853 break;
2854 2854
2855 case 1: 2855 case 1:
2856 if ((sr=test_mii_reg(dev, MII_SR, MII_SR_ASSC, TRUE, 2000)) < 0) { 2856 if ((sr=test_mii_reg(dev, MII_SR, MII_SR_ASSC, TRUE, 2000)) < 0) {
2857 next_tick = sr & ~TIMER_CB; 2857 next_tick = sr & ~TIMER_CB;
@@ -2862,7 +2862,7 @@ dc21140m_autoconf(struct net_device *dev)
2862 lp->tmp = MII_SR_ASSC; 2862 lp->tmp = MII_SR_ASSC;
2863 anlpa = mii_rd(MII_ANLPA, lp->phy[lp->active].addr, DE4X5_MII); 2863 anlpa = mii_rd(MII_ANLPA, lp->phy[lp->active].addr, DE4X5_MII);
2864 ana = mii_rd(MII_ANA, lp->phy[lp->active].addr, DE4X5_MII); 2864 ana = mii_rd(MII_ANA, lp->phy[lp->active].addr, DE4X5_MII);
2865 if (!(anlpa & MII_ANLPA_RF) && 2865 if (!(anlpa & MII_ANLPA_RF) &&
2866 (cap = anlpa & MII_ANLPA_TAF & ana)) { 2866 (cap = anlpa & MII_ANLPA_TAF & ana)) {
2867 if (cap & MII_ANA_100M) { 2867 if (cap & MII_ANA_100M) {
2868 lp->fdx = ((ana & anlpa & MII_ANA_FDAM & MII_ANA_100M) ? TRUE : FALSE); 2868 lp->fdx = ((ana & anlpa & MII_ANA_FDAM & MII_ANA_100M) ? TRUE : FALSE);
@@ -2879,10 +2879,10 @@ dc21140m_autoconf(struct net_device *dev)
2879 break; 2879 break;
2880 } 2880 }
2881 break; 2881 break;
2882 2882
2883 case SPD_DET: /* Choose 10Mb/s or 100Mb/s */ 2883 case SPD_DET: /* Choose 10Mb/s or 100Mb/s */
2884 if (lp->timeout < 0) { 2884 if (lp->timeout < 0) {
2885 lp->tmp = (lp->phy[lp->active].id ? MII_SR_LKS : 2885 lp->tmp = (lp->phy[lp->active].id ? MII_SR_LKS :
2886 (~gep_rd(dev) & GEP_LNP)); 2886 (~gep_rd(dev) & GEP_LNP));
2887 SET_100Mb_PDET; 2887 SET_100Mb_PDET;
2888 } 2888 }
@@ -2899,7 +2899,7 @@ dc21140m_autoconf(struct net_device *dev)
2899 next_tick = dc21140m_autoconf(dev); 2899 next_tick = dc21140m_autoconf(dev);
2900 } 2900 }
2901 break; 2901 break;
2902 2902
2903 case _100Mb: /* Set 100Mb/s */ 2903 case _100Mb: /* Set 100Mb/s */
2904 next_tick = 3000; 2904 next_tick = 3000;
2905 if (!lp->tx_enable) { 2905 if (!lp->tx_enable) {
@@ -2933,7 +2933,7 @@ dc21140m_autoconf(struct net_device *dev)
2933 } 2933 }
2934 } 2934 }
2935 break; 2935 break;
2936 2936
2937 case NC: 2937 case NC:
2938 if (lp->media != lp->c_media) { 2938 if (lp->media != lp->c_media) {
2939 de4x5_dbg_media(dev); 2939 de4x5_dbg_media(dev);
@@ -2943,7 +2943,7 @@ dc21140m_autoconf(struct net_device *dev)
2943 lp->tx_enable = FALSE; 2943 lp->tx_enable = FALSE;
2944 break; 2944 break;
2945 } 2945 }
2946 2946
2947 return next_tick; 2947 return next_tick;
2948} 2948}
2949 2949
@@ -3002,7 +3002,7 @@ dc2114x_autoconf(struct net_device *dev)
3002 lp->media = AUI; 3002 lp->media = AUI;
3003 } else { 3003 } else {
3004 lp->media = SPD_DET; 3004 lp->media = SPD_DET;
3005 if ((lp->infoblock_media == ANS) && 3005 if ((lp->infoblock_media == ANS) &&
3006 ((sr=is_anc_capable(dev)) & MII_SR_ANC)) { 3006 ((sr=is_anc_capable(dev)) & MII_SR_ANC)) {
3007 ana = (((sr >> 6) & MII_ANA_TAF) | MII_ANA_CSMA); 3007 ana = (((sr >> 6) & MII_ANA_TAF) | MII_ANA_CSMA);
3008 ana &= (lp->fdx ? ~0 : ~MII_ANA_FDAM); 3008 ana &= (lp->fdx ? ~0 : ~MII_ANA_FDAM);
@@ -3014,7 +3014,7 @@ dc2114x_autoconf(struct net_device *dev)
3014 next_tick = dc2114x_autoconf(dev); 3014 next_tick = dc2114x_autoconf(dev);
3015 } 3015 }
3016 break; 3016 break;
3017 3017
3018 case ANS: 3018 case ANS:
3019 switch (lp->local_state) { 3019 switch (lp->local_state) {
3020 case 0: 3020 case 0:
@@ -3034,7 +3034,7 @@ dc2114x_autoconf(struct net_device *dev)
3034 next_tick = dc2114x_autoconf(dev); 3034 next_tick = dc2114x_autoconf(dev);
3035 } 3035 }
3036 break; 3036 break;
3037 3037
3038 case 1: 3038 case 1:
3039 if ((sr=test_mii_reg(dev, MII_SR, MII_SR_ASSC, TRUE, 2000)) < 0) { 3039 if ((sr=test_mii_reg(dev, MII_SR, MII_SR_ASSC, TRUE, 2000)) < 0) {
3040 next_tick = sr & ~TIMER_CB; 3040 next_tick = sr & ~TIMER_CB;
@@ -3045,7 +3045,7 @@ dc2114x_autoconf(struct net_device *dev)
3045 lp->tmp = MII_SR_ASSC; 3045 lp->tmp = MII_SR_ASSC;
3046 anlpa = mii_rd(MII_ANLPA, lp->phy[lp->active].addr, DE4X5_MII); 3046 anlpa = mii_rd(MII_ANLPA, lp->phy[lp->active].addr, DE4X5_MII);
3047 ana = mii_rd(MII_ANA, lp->phy[lp->active].addr, DE4X5_MII); 3047 ana = mii_rd(MII_ANA, lp->phy[lp->active].addr, DE4X5_MII);
3048 if (!(anlpa & MII_ANLPA_RF) && 3048 if (!(anlpa & MII_ANLPA_RF) &&
3049 (cap = anlpa & MII_ANLPA_TAF & ana)) { 3049 (cap = anlpa & MII_ANLPA_TAF & ana)) {
3050 if (cap & MII_ANA_100M) { 3050 if (cap & MII_ANA_100M) {
3051 lp->fdx = ((ana & anlpa & MII_ANA_FDAM & MII_ANA_100M) ? TRUE : FALSE); 3051 lp->fdx = ((ana & anlpa & MII_ANA_FDAM & MII_ANA_100M) ? TRUE : FALSE);
@@ -3087,11 +3087,11 @@ dc2114x_autoconf(struct net_device *dev)
3087 next_tick = 3000; 3087 next_tick = 3000;
3088 } 3088 }
3089 break; 3089 break;
3090 3090
3091 case AUI_SUSPECT: 3091 case AUI_SUSPECT:
3092 next_tick = de4x5_suspect_state(dev, 1000, AUI, ping_media, dc2114x_autoconf); 3092 next_tick = de4x5_suspect_state(dev, 1000, AUI, ping_media, dc2114x_autoconf);
3093 break; 3093 break;
3094 3094
3095 case BNC: 3095 case BNC:
3096 switch (lp->local_state) { 3096 switch (lp->local_state) {
3097 case 0: 3097 case 0:
@@ -3109,7 +3109,7 @@ dc2114x_autoconf(struct net_device *dev)
3109 next_tick = dc2114x_autoconf(dev); 3109 next_tick = dc2114x_autoconf(dev);
3110 } 3110 }
3111 break; 3111 break;
3112 3112
3113 case 1: 3113 case 1:
3114 if (!lp->tx_enable) { 3114 if (!lp->tx_enable) {
3115 if ((sts = ping_media(dev, 3000)) < 0) { 3115 if ((sts = ping_media(dev, 3000)) < 0) {
@@ -3130,11 +3130,11 @@ dc2114x_autoconf(struct net_device *dev)
3130 break; 3130 break;
3131 } 3131 }
3132 break; 3132 break;
3133 3133
3134 case BNC_SUSPECT: 3134 case BNC_SUSPECT:
3135 next_tick = de4x5_suspect_state(dev, 1000, BNC, ping_media, dc2114x_autoconf); 3135 next_tick = de4x5_suspect_state(dev, 1000, BNC, ping_media, dc2114x_autoconf);
3136 break; 3136 break;
3137 3137
3138 case SPD_DET: /* Choose 10Mb/s or 100Mb/s */ 3138 case SPD_DET: /* Choose 10Mb/s or 100Mb/s */
3139 if (srom_map_media(dev) < 0) { 3139 if (srom_map_media(dev) < 0) {
3140 lp->tcount++; 3140 lp->tcount++;
@@ -3161,7 +3161,7 @@ dc2114x_autoconf(struct net_device *dev)
3161 next_tick = dc2114x_autoconf(dev); 3161 next_tick = dc2114x_autoconf(dev);
3162 } else if (((lp->media == _100Mb) && is_100_up(dev)) || 3162 } else if (((lp->media == _100Mb) && is_100_up(dev)) ||
3163 (((lp->media == _10Mb) || (lp->media == TP) || 3163 (((lp->media == _10Mb) || (lp->media == TP) ||
3164 (lp->media == BNC) || (lp->media == AUI)) && 3164 (lp->media == BNC) || (lp->media == AUI)) &&
3165 is_10_up(dev))) { 3165 is_10_up(dev))) {
3166 next_tick = dc2114x_autoconf(dev); 3166 next_tick = dc2114x_autoconf(dev);
3167 } else { 3167 } else {
@@ -3169,7 +3169,7 @@ dc2114x_autoconf(struct net_device *dev)
3169 lp->media = INIT; 3169 lp->media = INIT;
3170 } 3170 }
3171 break; 3171 break;
3172 3172
3173 case _10Mb: 3173 case _10Mb:
3174 next_tick = 3000; 3174 next_tick = 3000;
3175 if (!lp->tx_enable) { 3175 if (!lp->tx_enable) {
@@ -3208,7 +3208,7 @@ printk("Huh?: media:%02x\n", lp->media);
3208 lp->media = INIT; 3208 lp->media = INIT;
3209 break; 3209 break;
3210 } 3210 }
3211 3211
3212 return next_tick; 3212 return next_tick;
3213} 3213}
3214 3214
@@ -3231,7 +3231,7 @@ srom_map_media(struct net_device *dev)
3231 struct de4x5_private *lp = netdev_priv(dev); 3231 struct de4x5_private *lp = netdev_priv(dev);
3232 3232
3233 lp->fdx = 0; 3233 lp->fdx = 0;
3234 if (lp->infoblock_media == lp->media) 3234 if (lp->infoblock_media == lp->media)
3235 return 0; 3235 return 0;
3236 3236
3237 switch(lp->infoblock_media) { 3237 switch(lp->infoblock_media) {
@@ -3270,7 +3270,7 @@ srom_map_media(struct net_device *dev)
3270 case SROM_100BASEFF: 3270 case SROM_100BASEFF:
3271 if (!lp->params.fdx) return -1; 3271 if (!lp->params.fdx) return -1;
3272 lp->fdx = TRUE; 3272 lp->fdx = TRUE;
3273 case SROM_100BASEF: 3273 case SROM_100BASEF:
3274 if (lp->params.fdx && !lp->fdx) return -1; 3274 if (lp->params.fdx && !lp->fdx) return -1;
3275 lp->media = _100Mb; 3275 lp->media = _100Mb;
3276 break; 3276 break;
@@ -3280,8 +3280,8 @@ srom_map_media(struct net_device *dev)
3280 lp->fdx = lp->params.fdx; 3280 lp->fdx = lp->params.fdx;
3281 break; 3281 break;
3282 3282
3283 default: 3283 default:
3284 printk("%s: Bad media code [%d] detected in SROM!\n", dev->name, 3284 printk("%s: Bad media code [%d] detected in SROM!\n", dev->name,
3285 lp->infoblock_media); 3285 lp->infoblock_media);
3286 return -1; 3286 return -1;
3287 break; 3287 break;
@@ -3359,7 +3359,7 @@ test_media(struct net_device *dev, s32 irqs, s32 irq_mask, s32 csr13, s32 csr14,
3359 struct de4x5_private *lp = netdev_priv(dev); 3359 struct de4x5_private *lp = netdev_priv(dev);
3360 u_long iobase = dev->base_addr; 3360 u_long iobase = dev->base_addr;
3361 s32 sts, csr12; 3361 s32 sts, csr12;
3362 3362
3363 if (lp->timeout < 0) { 3363 if (lp->timeout < 0) {
3364 lp->timeout = msec/100; 3364 lp->timeout = msec/100;
3365 if (!lp->useSROM) { /* Already done if by SROM, else dc2104[01] */ 3365 if (!lp->useSROM) { /* Already done if by SROM, else dc2104[01] */
@@ -3372,22 +3372,22 @@ test_media(struct net_device *dev, s32 irqs, s32 irq_mask, s32 csr13, s32 csr14,
3372 /* clear all pending interrupts */ 3372 /* clear all pending interrupts */
3373 sts = inl(DE4X5_STS); 3373 sts = inl(DE4X5_STS);
3374 outl(sts, DE4X5_STS); 3374 outl(sts, DE4X5_STS);
3375 3375
3376 /* clear csr12 NRA and SRA bits */ 3376 /* clear csr12 NRA and SRA bits */
3377 if ((lp->chipset == DC21041) || lp->useSROM) { 3377 if ((lp->chipset == DC21041) || lp->useSROM) {
3378 csr12 = inl(DE4X5_SISR); 3378 csr12 = inl(DE4X5_SISR);
3379 outl(csr12, DE4X5_SISR); 3379 outl(csr12, DE4X5_SISR);
3380 } 3380 }
3381 } 3381 }
3382 3382
3383 sts = inl(DE4X5_STS) & ~TIMER_CB; 3383 sts = inl(DE4X5_STS) & ~TIMER_CB;
3384 3384
3385 if (!(sts & irqs) && --lp->timeout) { 3385 if (!(sts & irqs) && --lp->timeout) {
3386 sts = 100 | TIMER_CB; 3386 sts = 100 | TIMER_CB;
3387 } else { 3387 } else {
3388 lp->timeout = -1; 3388 lp->timeout = -1;
3389 } 3389 }
3390 3390
3391 return sts; 3391 return sts;
3392} 3392}
3393 3393
@@ -3397,11 +3397,11 @@ test_tp(struct net_device *dev, s32 msec)
3397 struct de4x5_private *lp = netdev_priv(dev); 3397 struct de4x5_private *lp = netdev_priv(dev);
3398 u_long iobase = dev->base_addr; 3398 u_long iobase = dev->base_addr;
3399 int sisr; 3399 int sisr;
3400 3400
3401 if (lp->timeout < 0) { 3401 if (lp->timeout < 0) {
3402 lp->timeout = msec/100; 3402 lp->timeout = msec/100;
3403 } 3403 }
3404 3404
3405 sisr = (inl(DE4X5_SISR) & ~TIMER_CB) & (SISR_LKF | SISR_NCR); 3405 sisr = (inl(DE4X5_SISR) & ~TIMER_CB) & (SISR_LKF | SISR_NCR);
3406 3406
3407 if (sisr && --lp->timeout) { 3407 if (sisr && --lp->timeout) {
@@ -3409,7 +3409,7 @@ test_tp(struct net_device *dev, s32 msec)
3409 } else { 3409 } else {
3410 lp->timeout = -1; 3410 lp->timeout = -1;
3411 } 3411 }
3412 3412
3413 return sisr; 3413 return sisr;
3414} 3414}
3415 3415
@@ -3436,7 +3436,7 @@ test_for_100Mb(struct net_device *dev, int msec)
3436 lp->timeout = msec/SAMPLE_INTERVAL; 3436 lp->timeout = msec/SAMPLE_INTERVAL;
3437 } 3437 }
3438 } 3438 }
3439 3439
3440 if (lp->phy[lp->active].id || lp->useSROM) { 3440 if (lp->phy[lp->active].id || lp->useSROM) {
3441 gep = is_100_up(dev) | is_spd_100(dev); 3441 gep = is_100_up(dev) | is_spd_100(dev);
3442 } else { 3442 } else {
@@ -3447,7 +3447,7 @@ test_for_100Mb(struct net_device *dev, int msec)
3447 } else { 3447 } else {
3448 lp->timeout = -1; 3448 lp->timeout = -1;
3449 } 3449 }
3450 3450
3451 return gep; 3451 return gep;
3452} 3452}
3453 3453
@@ -3459,13 +3459,13 @@ wait_for_link(struct net_device *dev)
3459 if (lp->timeout < 0) { 3459 if (lp->timeout < 0) {
3460 lp->timeout = 1; 3460 lp->timeout = 1;
3461 } 3461 }
3462 3462
3463 if (lp->timeout--) { 3463 if (lp->timeout--) {
3464 return TIMER_CB; 3464 return TIMER_CB;
3465 } else { 3465 } else {
3466 lp->timeout = -1; 3466 lp->timeout = -1;
3467 } 3467 }
3468 3468
3469 return 0; 3469 return 0;
3470} 3470}
3471 3471
@@ -3479,21 +3479,21 @@ test_mii_reg(struct net_device *dev, int reg, int mask, int pol, long msec)
3479 struct de4x5_private *lp = netdev_priv(dev); 3479 struct de4x5_private *lp = netdev_priv(dev);
3480 int test; 3480 int test;
3481 u_long iobase = dev->base_addr; 3481 u_long iobase = dev->base_addr;
3482 3482
3483 if (lp->timeout < 0) { 3483 if (lp->timeout < 0) {
3484 lp->timeout = msec/100; 3484 lp->timeout = msec/100;
3485 } 3485 }
3486 3486
3487 if (pol) pol = ~0; 3487 if (pol) pol = ~0;
3488 reg = mii_rd((u_char)reg, lp->phy[lp->active].addr, DE4X5_MII) & mask; 3488 reg = mii_rd((u_char)reg, lp->phy[lp->active].addr, DE4X5_MII) & mask;
3489 test = (reg ^ pol) & mask; 3489 test = (reg ^ pol) & mask;
3490 3490
3491 if (test && --lp->timeout) { 3491 if (test && --lp->timeout) {
3492 reg = 100 | TIMER_CB; 3492 reg = 100 | TIMER_CB;
3493 } else { 3493 } else {
3494 lp->timeout = -1; 3494 lp->timeout = -1;
3495 } 3495 }
3496 3496
3497 return reg; 3497 return reg;
3498} 3498}
3499 3499
@@ -3503,7 +3503,7 @@ is_spd_100(struct net_device *dev)
3503 struct de4x5_private *lp = netdev_priv(dev); 3503 struct de4x5_private *lp = netdev_priv(dev);
3504 u_long iobase = dev->base_addr; 3504 u_long iobase = dev->base_addr;
3505 int spd; 3505 int spd;
3506 3506
3507 if (lp->useMII) { 3507 if (lp->useMII) {
3508 spd = mii_rd(lp->phy[lp->active].spd.reg, lp->phy[lp->active].addr, DE4X5_MII); 3508 spd = mii_rd(lp->phy[lp->active].spd.reg, lp->phy[lp->active].addr, DE4X5_MII);
3509 spd = ~(spd ^ lp->phy[lp->active].spd.value); 3509 spd = ~(spd ^ lp->phy[lp->active].spd.value);
@@ -3517,7 +3517,7 @@ is_spd_100(struct net_device *dev)
3517 spd = (lp->asBitValid & (lp->asPolarity ^ (gep_rd(dev) & lp->asBit))) | 3517 spd = (lp->asBitValid & (lp->asPolarity ^ (gep_rd(dev) & lp->asBit))) |
3518 (lp->linkOK & ~lp->asBitValid); 3518 (lp->linkOK & ~lp->asBitValid);
3519 } 3519 }
3520 3520
3521 return spd; 3521 return spd;
3522} 3522}
3523 3523
@@ -3526,7 +3526,7 @@ is_100_up(struct net_device *dev)
3526{ 3526{
3527 struct de4x5_private *lp = netdev_priv(dev); 3527 struct de4x5_private *lp = netdev_priv(dev);
3528 u_long iobase = dev->base_addr; 3528 u_long iobase = dev->base_addr;
3529 3529
3530 if (lp->useMII) { 3530 if (lp->useMII) {
3531 /* Double read for sticky bits & temporary drops */ 3531 /* Double read for sticky bits & temporary drops */
3532 mii_rd(MII_SR, lp->phy[lp->active].addr, DE4X5_MII); 3532 mii_rd(MII_SR, lp->phy[lp->active].addr, DE4X5_MII);
@@ -3547,7 +3547,7 @@ is_10_up(struct net_device *dev)
3547{ 3547{
3548 struct de4x5_private *lp = netdev_priv(dev); 3548 struct de4x5_private *lp = netdev_priv(dev);
3549 u_long iobase = dev->base_addr; 3549 u_long iobase = dev->base_addr;
3550 3550
3551 if (lp->useMII) { 3551 if (lp->useMII) {
3552 /* Double read for sticky bits & temporary drops */ 3552 /* Double read for sticky bits & temporary drops */
3553 mii_rd(MII_SR, lp->phy[lp->active].addr, DE4X5_MII); 3553 mii_rd(MII_SR, lp->phy[lp->active].addr, DE4X5_MII);
@@ -3570,7 +3570,7 @@ is_anc_capable(struct net_device *dev)
3570{ 3570{
3571 struct de4x5_private *lp = netdev_priv(dev); 3571 struct de4x5_private *lp = netdev_priv(dev);
3572 u_long iobase = dev->base_addr; 3572 u_long iobase = dev->base_addr;
3573 3573
3574 if (lp->phy[lp->active].id && (!lp->useSROM || lp->useMII)) { 3574 if (lp->phy[lp->active].id && (!lp->useSROM || lp->useMII)) {
3575 return (mii_rd(MII_SR, lp->phy[lp->active].addr, DE4X5_MII)); 3575 return (mii_rd(MII_SR, lp->phy[lp->active].addr, DE4X5_MII));
3576 } else if ((lp->chipset & ~0x00ff) == DC2114x) { 3576 } else if ((lp->chipset & ~0x00ff) == DC2114x) {
@@ -3590,24 +3590,24 @@ ping_media(struct net_device *dev, int msec)
3590 struct de4x5_private *lp = netdev_priv(dev); 3590 struct de4x5_private *lp = netdev_priv(dev);
3591 u_long iobase = dev->base_addr; 3591 u_long iobase = dev->base_addr;
3592 int sisr; 3592 int sisr;
3593 3593
3594 if (lp->timeout < 0) { 3594 if (lp->timeout < 0) {
3595 lp->timeout = msec/100; 3595 lp->timeout = msec/100;
3596 3596
3597 lp->tmp = lp->tx_new; /* Remember the ring position */ 3597 lp->tmp = lp->tx_new; /* Remember the ring position */
3598 load_packet(dev, lp->frame, TD_LS | TD_FS | sizeof(lp->frame), (struct sk_buff *)1); 3598 load_packet(dev, lp->frame, TD_LS | TD_FS | sizeof(lp->frame), (struct sk_buff *)1);
3599 lp->tx_new = (++lp->tx_new) % lp->txRingSize; 3599 lp->tx_new = (++lp->tx_new) % lp->txRingSize;
3600 outl(POLL_DEMAND, DE4X5_TPD); 3600 outl(POLL_DEMAND, DE4X5_TPD);
3601 } 3601 }
3602 3602
3603 sisr = inl(DE4X5_SISR); 3603 sisr = inl(DE4X5_SISR);
3604 3604
3605 if ((!(sisr & SISR_NCR)) && 3605 if ((!(sisr & SISR_NCR)) &&
3606 ((s32)le32_to_cpu(lp->tx_ring[lp->tmp].status) < 0) && 3606 ((s32)le32_to_cpu(lp->tx_ring[lp->tmp].status) < 0) &&
3607 (--lp->timeout)) { 3607 (--lp->timeout)) {
3608 sisr = 100 | TIMER_CB; 3608 sisr = 100 | TIMER_CB;
3609 } else { 3609 } else {
3610 if ((!(sisr & SISR_NCR)) && 3610 if ((!(sisr & SISR_NCR)) &&
3611 !(le32_to_cpu(lp->tx_ring[lp->tmp].status) & (T_OWN | TD_ES)) && 3611 !(le32_to_cpu(lp->tx_ring[lp->tmp].status) & (T_OWN | TD_ES)) &&
3612 lp->timeout) { 3612 lp->timeout) {
3613 sisr = 0; 3613 sisr = 0;
@@ -3616,7 +3616,7 @@ ping_media(struct net_device *dev, int msec)
3616 } 3616 }
3617 lp->timeout = -1; 3617 lp->timeout = -1;
3618 } 3618 }
3619 3619
3620 return sisr; 3620 return sisr;
3621} 3621}
3622 3622
@@ -3668,7 +3668,7 @@ de4x5_alloc_rx_buff(struct net_device *dev, int index, int len)
3668 } else { /* Linear buffer */ 3668 } else { /* Linear buffer */
3669 memcpy(skb_put(p,len),lp->rx_bufs + lp->rx_old * RX_BUFF_SZ,len); 3669 memcpy(skb_put(p,len),lp->rx_bufs + lp->rx_old * RX_BUFF_SZ,len);
3670 } 3670 }
3671 3671
3672 return p; 3672 return p;
3673#endif 3673#endif
3674} 3674}
@@ -3751,23 +3751,23 @@ de4x5_rst_desc_ring(struct net_device *dev)
3751 outl(lp->dma_rings, DE4X5_RRBA); 3751 outl(lp->dma_rings, DE4X5_RRBA);
3752 outl(lp->dma_rings + NUM_RX_DESC * sizeof(struct de4x5_desc), 3752 outl(lp->dma_rings + NUM_RX_DESC * sizeof(struct de4x5_desc),
3753 DE4X5_TRBA); 3753 DE4X5_TRBA);
3754 3754
3755 lp->rx_new = lp->rx_old = 0; 3755 lp->rx_new = lp->rx_old = 0;
3756 lp->tx_new = lp->tx_old = 0; 3756 lp->tx_new = lp->tx_old = 0;
3757 3757
3758 for (i = 0; i < lp->rxRingSize; i++) { 3758 for (i = 0; i < lp->rxRingSize; i++) {
3759 lp->rx_ring[i].status = cpu_to_le32(R_OWN); 3759 lp->rx_ring[i].status = cpu_to_le32(R_OWN);
3760 } 3760 }
3761 3761
3762 for (i = 0; i < lp->txRingSize; i++) { 3762 for (i = 0; i < lp->txRingSize; i++) {
3763 lp->tx_ring[i].status = cpu_to_le32(0); 3763 lp->tx_ring[i].status = cpu_to_le32(0);
3764 } 3764 }
3765 3765
3766 barrier(); 3766 barrier();
3767 lp->cache.save_cnt--; 3767 lp->cache.save_cnt--;
3768 START_DE4X5; 3768 START_DE4X5;
3769 } 3769 }
3770 3770
3771 return; 3771 return;
3772} 3772}
3773 3773
@@ -3792,7 +3792,7 @@ de4x5_cache_state(struct net_device *dev, int flag)
3792 gep_wr(lp->cache.gepc, dev); 3792 gep_wr(lp->cache.gepc, dev);
3793 gep_wr(lp->cache.gep, dev); 3793 gep_wr(lp->cache.gep, dev);
3794 } else { 3794 } else {
3795 reset_init_sia(dev, lp->cache.csr13, lp->cache.csr14, 3795 reset_init_sia(dev, lp->cache.csr13, lp->cache.csr14,
3796 lp->cache.csr15); 3796 lp->cache.csr15);
3797 } 3797 }
3798 break; 3798 break;
@@ -3854,25 +3854,25 @@ test_ans(struct net_device *dev, s32 irqs, s32 irq_mask, s32 msec)
3854 struct de4x5_private *lp = netdev_priv(dev); 3854 struct de4x5_private *lp = netdev_priv(dev);
3855 u_long iobase = dev->base_addr; 3855 u_long iobase = dev->base_addr;
3856 s32 sts, ans; 3856 s32 sts, ans;
3857 3857
3858 if (lp->timeout < 0) { 3858 if (lp->timeout < 0) {
3859 lp->timeout = msec/100; 3859 lp->timeout = msec/100;
3860 outl(irq_mask, DE4X5_IMR); 3860 outl(irq_mask, DE4X5_IMR);
3861 3861
3862 /* clear all pending interrupts */ 3862 /* clear all pending interrupts */
3863 sts = inl(DE4X5_STS); 3863 sts = inl(DE4X5_STS);
3864 outl(sts, DE4X5_STS); 3864 outl(sts, DE4X5_STS);
3865 } 3865 }
3866 3866
3867 ans = inl(DE4X5_SISR) & SISR_ANS; 3867 ans = inl(DE4X5_SISR) & SISR_ANS;
3868 sts = inl(DE4X5_STS) & ~TIMER_CB; 3868 sts = inl(DE4X5_STS) & ~TIMER_CB;
3869 3869
3870 if (!(sts & irqs) && (ans ^ ANS_NWOK) && --lp->timeout) { 3870 if (!(sts & irqs) && (ans ^ ANS_NWOK) && --lp->timeout) {
3871 sts = 100 | TIMER_CB; 3871 sts = 100 | TIMER_CB;
3872 } else { 3872 } else {
3873 lp->timeout = -1; 3873 lp->timeout = -1;
3874 } 3874 }
3875 3875
3876 return sts; 3876 return sts;
3877} 3877}
3878 3878
@@ -3882,7 +3882,7 @@ de4x5_setup_intr(struct net_device *dev)
3882 struct de4x5_private *lp = netdev_priv(dev); 3882 struct de4x5_private *lp = netdev_priv(dev);
3883 u_long iobase = dev->base_addr; 3883 u_long iobase = dev->base_addr;
3884 s32 imr, sts; 3884 s32 imr, sts;
3885 3885
3886 if (inl(DE4X5_OMR) & OMR_SR) { /* Only unmask if TX/RX is enabled */ 3886 if (inl(DE4X5_OMR) & OMR_SR) { /* Only unmask if TX/RX is enabled */
3887 imr = 0; 3887 imr = 0;
3888 UNMASK_IRQs; 3888 UNMASK_IRQs;
@@ -3890,7 +3890,7 @@ de4x5_setup_intr(struct net_device *dev)
3890 outl(sts, DE4X5_STS); 3890 outl(sts, DE4X5_STS);
3891 ENABLE_IRQs; 3891 ENABLE_IRQs;
3892 } 3892 }
3893 3893
3894 return; 3894 return;
3895} 3895}
3896 3896
@@ -3936,17 +3936,17 @@ create_packet(struct net_device *dev, char *frame, int len)
3936{ 3936{
3937 int i; 3937 int i;
3938 char *buf = frame; 3938 char *buf = frame;
3939 3939
3940 for (i=0; i<ETH_ALEN; i++) { /* Use this source address */ 3940 for (i=0; i<ETH_ALEN; i++) { /* Use this source address */
3941 *buf++ = dev->dev_addr[i]; 3941 *buf++ = dev->dev_addr[i];
3942 } 3942 }
3943 for (i=0; i<ETH_ALEN; i++) { /* Use this destination address */ 3943 for (i=0; i<ETH_ALEN; i++) { /* Use this destination address */
3944 *buf++ = dev->dev_addr[i]; 3944 *buf++ = dev->dev_addr[i];
3945 } 3945 }
3946 3946
3947 *buf++ = 0; /* Packet length (2 bytes) */ 3947 *buf++ = 0; /* Packet length (2 bytes) */
3948 *buf++ = 1; 3948 *buf++ = 1;
3949 3949
3950 return; 3950 return;
3951} 3951}
3952 3952
@@ -3978,7 +3978,7 @@ static int
3978PCI_signature(char *name, struct de4x5_private *lp) 3978PCI_signature(char *name, struct de4x5_private *lp)
3979{ 3979{
3980 int i, status = 0, siglen = sizeof(de4x5_signatures)/sizeof(c_char *); 3980 int i, status = 0, siglen = sizeof(de4x5_signatures)/sizeof(c_char *);
3981 3981
3982 if (lp->chipset == DC21040) { 3982 if (lp->chipset == DC21040) {
3983 strcpy(name, "DE434/5"); 3983 strcpy(name, "DE434/5");
3984 return status; 3984 return status;
@@ -4007,7 +4007,7 @@ PCI_signature(char *name, struct de4x5_private *lp)
4007 } else if ((lp->chipset & ~0x00ff) == DC2114x) { 4007 } else if ((lp->chipset & ~0x00ff) == DC2114x) {
4008 lp->useSROM = TRUE; 4008 lp->useSROM = TRUE;
4009 } 4009 }
4010 4010
4011 return status; 4011 return status;
4012} 4012}
4013 4013
@@ -4024,7 +4024,7 @@ DevicePresent(struct net_device *dev, u_long aprom_addr)
4024{ 4024{
4025 int i, j=0; 4025 int i, j=0;
4026 struct de4x5_private *lp = netdev_priv(dev); 4026 struct de4x5_private *lp = netdev_priv(dev);
4027 4027
4028 if (lp->chipset == DC21040) { 4028 if (lp->chipset == DC21040) {
4029 if (lp->bus == EISA) { 4029 if (lp->bus == EISA) {
4030 enet_addr_rst(aprom_addr); /* Reset Ethernet Address ROM Pointer */ 4030 enet_addr_rst(aprom_addr); /* Reset Ethernet Address ROM Pointer */
@@ -4049,7 +4049,7 @@ DevicePresent(struct net_device *dev, u_long aprom_addr)
4049 } 4049 }
4050 de4x5_dbg_srom((struct de4x5_srom *)&lp->srom); 4050 de4x5_dbg_srom((struct de4x5_srom *)&lp->srom);
4051 } 4051 }
4052 4052
4053 return; 4053 return;
4054} 4054}
4055 4055
@@ -4071,11 +4071,11 @@ enet_addr_rst(u_long aprom_addr)
4071 short sigLength=0; 4071 short sigLength=0;
4072 s8 data; 4072 s8 data;
4073 int i, j; 4073 int i, j;
4074 4074
4075 dev.llsig.a = ETH_PROM_SIG; 4075 dev.llsig.a = ETH_PROM_SIG;
4076 dev.llsig.b = ETH_PROM_SIG; 4076 dev.llsig.b = ETH_PROM_SIG;
4077 sigLength = sizeof(u32) << 1; 4077 sigLength = sizeof(u32) << 1;
4078 4078
4079 for (i=0,j=0;j<sigLength && i<PROBE_LENGTH+sigLength-1;i++) { 4079 for (i=0,j=0;j<sigLength && i<PROBE_LENGTH+sigLength-1;i++) {
4080 data = inb(aprom_addr); 4080 data = inb(aprom_addr);
4081 if (dev.Sig[j] == data) { /* track signature */ 4081 if (dev.Sig[j] == data) { /* track signature */
@@ -4088,7 +4088,7 @@ enet_addr_rst(u_long aprom_addr)
4088 } 4088 }
4089 } 4089 }
4090 } 4090 }
4091 4091
4092 return; 4092 return;
4093} 4093}
4094 4094
@@ -4111,7 +4111,7 @@ get_hw_addr(struct net_device *dev)
4111 for (i=0,k=0,j=0;j<3;j++) { 4111 for (i=0,k=0,j=0;j<3;j++) {
4112 k <<= 1; 4112 k <<= 1;
4113 if (k > 0xffff) k-=0xffff; 4113 if (k > 0xffff) k-=0xffff;
4114 4114
4115 if (lp->bus == PCI) { 4115 if (lp->bus == PCI) {
4116 if (lp->chipset == DC21040) { 4116 if (lp->chipset == DC21040) {
4117 while ((tmp = inl(DE4X5_APROM)) < 0); 4117 while ((tmp = inl(DE4X5_APROM)) < 0);
@@ -4133,11 +4133,11 @@ get_hw_addr(struct net_device *dev)
4133 k += (u_short) ((tmp = inb(EISA_APROM)) << 8); 4133 k += (u_short) ((tmp = inb(EISA_APROM)) << 8);
4134 dev->dev_addr[i++] = (u_char) tmp; 4134 dev->dev_addr[i++] = (u_char) tmp;
4135 } 4135 }
4136 4136
4137 if (k > 0xffff) k-=0xffff; 4137 if (k > 0xffff) k-=0xffff;
4138 } 4138 }
4139 if (k == 0xffff) k=0; 4139 if (k == 0xffff) k=0;
4140 4140
4141 if (lp->bus == PCI) { 4141 if (lp->bus == PCI) {
4142 if (lp->chipset == DC21040) { 4142 if (lp->chipset == DC21040) {
4143 while ((tmp = inl(DE4X5_APROM)) < 0); 4143 while ((tmp = inl(DE4X5_APROM)) < 0);
@@ -4156,7 +4156,7 @@ get_hw_addr(struct net_device *dev)
4156 srom_repair(dev, broken); 4156 srom_repair(dev, broken);
4157 4157
4158#ifdef CONFIG_PPC_MULTIPLATFORM 4158#ifdef CONFIG_PPC_MULTIPLATFORM
4159 /* 4159 /*
4160 ** If the address starts with 00 a0, we have to bit-reverse 4160 ** If the address starts with 00 a0, we have to bit-reverse
4161 ** each byte of the address. 4161 ** each byte of the address.
4162 */ 4162 */
@@ -4245,7 +4245,7 @@ test_bad_enet(struct net_device *dev, int status)
4245 4245
4246 for (tmp=0,i=0; i<ETH_ALEN; i++) tmp += (u_char)dev->dev_addr[i]; 4246 for (tmp=0,i=0; i<ETH_ALEN; i++) tmp += (u_char)dev->dev_addr[i];
4247 if ((tmp == 0) || (tmp == 0x5fa)) { 4247 if ((tmp == 0) || (tmp == 0x5fa)) {
4248 if ((lp->chipset == last.chipset) && 4248 if ((lp->chipset == last.chipset) &&
4249 (lp->bus_num == last.bus) && (lp->bus_num > 0)) { 4249 (lp->bus_num == last.bus) && (lp->bus_num > 0)) {
4250 for (i=0; i<ETH_ALEN; i++) dev->dev_addr[i] = last.addr[i]; 4250 for (i=0; i<ETH_ALEN; i++) dev->dev_addr[i] = last.addr[i];
4251 for (i=ETH_ALEN-1; i>2; --i) { 4251 for (i=ETH_ALEN-1; i>2; --i) {
@@ -4275,7 +4275,7 @@ test_bad_enet(struct net_device *dev, int status)
4275static int 4275static int
4276an_exception(struct de4x5_private *lp) 4276an_exception(struct de4x5_private *lp)
4277{ 4277{
4278 if ((*(u_short *)lp->srom.sub_vendor_id == 0x00c0) && 4278 if ((*(u_short *)lp->srom.sub_vendor_id == 0x00c0) &&
4279 (*(u_short *)lp->srom.sub_system_id == 0x95e0)) { 4279 (*(u_short *)lp->srom.sub_system_id == 0x95e0)) {
4280 return -1; 4280 return -1;
4281 } 4281 }
@@ -4290,11 +4290,11 @@ static short
4290srom_rd(u_long addr, u_char offset) 4290srom_rd(u_long addr, u_char offset)
4291{ 4291{
4292 sendto_srom(SROM_RD | SROM_SR, addr); 4292 sendto_srom(SROM_RD | SROM_SR, addr);
4293 4293
4294 srom_latch(SROM_RD | SROM_SR | DT_CS, addr); 4294 srom_latch(SROM_RD | SROM_SR | DT_CS, addr);
4295 srom_command(SROM_RD | SROM_SR | DT_IN | DT_CS, addr); 4295 srom_command(SROM_RD | SROM_SR | DT_IN | DT_CS, addr);
4296 srom_address(SROM_RD | SROM_SR | DT_CS, addr, offset); 4296 srom_address(SROM_RD | SROM_SR | DT_CS, addr, offset);
4297 4297
4298 return srom_data(SROM_RD | SROM_SR | DT_CS, addr); 4298 return srom_data(SROM_RD | SROM_SR | DT_CS, addr);
4299} 4299}
4300 4300
@@ -4304,7 +4304,7 @@ srom_latch(u_int command, u_long addr)
4304 sendto_srom(command, addr); 4304 sendto_srom(command, addr);
4305 sendto_srom(command | DT_CLK, addr); 4305 sendto_srom(command | DT_CLK, addr);
4306 sendto_srom(command, addr); 4306 sendto_srom(command, addr);
4307 4307
4308 return; 4308 return;
4309} 4309}
4310 4310
@@ -4314,7 +4314,7 @@ srom_command(u_int command, u_long addr)
4314 srom_latch(command, addr); 4314 srom_latch(command, addr);
4315 srom_latch(command, addr); 4315 srom_latch(command, addr);
4316 srom_latch((command & 0x0000ff00) | DT_CS, addr); 4316 srom_latch((command & 0x0000ff00) | DT_CS, addr);
4317 4317
4318 return; 4318 return;
4319} 4319}
4320 4320
@@ -4322,15 +4322,15 @@ static void
4322srom_address(u_int command, u_long addr, u_char offset) 4322srom_address(u_int command, u_long addr, u_char offset)
4323{ 4323{
4324 int i, a; 4324 int i, a;
4325 4325
4326 a = offset << 2; 4326 a = offset << 2;
4327 for (i=0; i<6; i++, a <<= 1) { 4327 for (i=0; i<6; i++, a <<= 1) {
4328 srom_latch(command | ((a & 0x80) ? DT_IN : 0), addr); 4328 srom_latch(command | ((a & 0x80) ? DT_IN : 0), addr);
4329 } 4329 }
4330 udelay(1); 4330 udelay(1);
4331 4331
4332 i = (getfrom_srom(addr) >> 3) & 0x01; 4332 i = (getfrom_srom(addr) >> 3) & 0x01;
4333 4333
4334 return; 4334 return;
4335} 4335}
4336 4336
@@ -4340,17 +4340,17 @@ srom_data(u_int command, u_long addr)
4340 int i; 4340 int i;
4341 short word = 0; 4341 short word = 0;
4342 s32 tmp; 4342 s32 tmp;
4343 4343
4344 for (i=0; i<16; i++) { 4344 for (i=0; i<16; i++) {
4345 sendto_srom(command | DT_CLK, addr); 4345 sendto_srom(command | DT_CLK, addr);
4346 tmp = getfrom_srom(addr); 4346 tmp = getfrom_srom(addr);
4347 sendto_srom(command, addr); 4347 sendto_srom(command, addr);
4348 4348
4349 word = (word << 1) | ((tmp >> 3) & 0x01); 4349 word = (word << 1) | ((tmp >> 3) & 0x01);
4350 } 4350 }
4351 4351
4352 sendto_srom(command & 0x0000ff00, addr); 4352 sendto_srom(command & 0x0000ff00, addr);
4353 4353
4354 return word; 4354 return word;
4355} 4355}
4356 4356
@@ -4359,13 +4359,13 @@ static void
4359srom_busy(u_int command, u_long addr) 4359srom_busy(u_int command, u_long addr)
4360{ 4360{
4361 sendto_srom((command & 0x0000ff00) | DT_CS, addr); 4361 sendto_srom((command & 0x0000ff00) | DT_CS, addr);
4362 4362
4363 while (!((getfrom_srom(addr) >> 3) & 0x01)) { 4363 while (!((getfrom_srom(addr) >> 3) & 0x01)) {
4364 mdelay(1); 4364 mdelay(1);
4365 } 4365 }
4366 4366
4367 sendto_srom(command & 0x0000ff00, addr); 4367 sendto_srom(command & 0x0000ff00, addr);
4368 4368
4369 return; 4369 return;
4370} 4370}
4371*/ 4371*/
@@ -4375,7 +4375,7 @@ sendto_srom(u_int command, u_long addr)
4375{ 4375{
4376 outl(command, addr); 4376 outl(command, addr);
4377 udelay(1); 4377 udelay(1);
4378 4378
4379 return; 4379 return;
4380} 4380}
4381 4381
@@ -4383,10 +4383,10 @@ static int
4383getfrom_srom(u_long addr) 4383getfrom_srom(u_long addr)
4384{ 4384{
4385 s32 tmp; 4385 s32 tmp;
4386 4386
4387 tmp = inl(addr); 4387 tmp = inl(addr);
4388 udelay(1); 4388 udelay(1);
4389 4389
4390 return tmp; 4390 return tmp;
4391} 4391}
4392 4392
@@ -4403,7 +4403,7 @@ srom_infoleaf_info(struct net_device *dev)
4403 } 4403 }
4404 if (i == INFOLEAF_SIZE) { 4404 if (i == INFOLEAF_SIZE) {
4405 lp->useSROM = FALSE; 4405 lp->useSROM = FALSE;
4406 printk("%s: Cannot find correct chipset for SROM decoding!\n", 4406 printk("%s: Cannot find correct chipset for SROM decoding!\n",
4407 dev->name); 4407 dev->name);
4408 return -ENXIO; 4408 return -ENXIO;
4409 } 4409 }
@@ -4420,7 +4420,7 @@ srom_infoleaf_info(struct net_device *dev)
4420 } 4420 }
4421 if (i == 0) { 4421 if (i == 0) {
4422 lp->useSROM = FALSE; 4422 lp->useSROM = FALSE;
4423 printk("%s: Cannot find correct PCI device [%d] for SROM decoding!\n", 4423 printk("%s: Cannot find correct PCI device [%d] for SROM decoding!\n",
4424 dev->name, lp->device); 4424 dev->name, lp->device);
4425 return -ENXIO; 4425 return -ENXIO;
4426 } 4426 }
@@ -4494,9 +4494,9 @@ srom_exec(struct net_device *dev, u_char *p)
4494 if (((lp->ibn != 1) && (lp->ibn != 3) && (lp->ibn != 5)) || !count) return; 4494 if (((lp->ibn != 1) && (lp->ibn != 3) && (lp->ibn != 5)) || !count) return;
4495 4495
4496 if (lp->chipset != DC21140) RESET_SIA; 4496 if (lp->chipset != DC21140) RESET_SIA;
4497 4497
4498 while (count--) { 4498 while (count--) {
4499 gep_wr(((lp->chipset==DC21140) && (lp->ibn!=5) ? 4499 gep_wr(((lp->chipset==DC21140) && (lp->ibn!=5) ?
4500 *p++ : TWIDDLE(w++)), dev); 4500 *p++ : TWIDDLE(w++)), dev);
4501 mdelay(2); /* 2ms per action */ 4501 mdelay(2); /* 2ms per action */
4502 } 4502 }
@@ -4514,13 +4514,13 @@ srom_exec(struct net_device *dev, u_char *p)
4514** unless I implement the DC21041 SROM functions. There's no need 4514** unless I implement the DC21041 SROM functions. There's no need
4515** since the existing code will be satisfactory for all boards. 4515** since the existing code will be satisfactory for all boards.
4516*/ 4516*/
4517static int 4517static int
4518dc21041_infoleaf(struct net_device *dev) 4518dc21041_infoleaf(struct net_device *dev)
4519{ 4519{
4520 return DE4X5_AUTOSENSE_MS; 4520 return DE4X5_AUTOSENSE_MS;
4521} 4521}
4522 4522
4523static int 4523static int
4524dc21140_infoleaf(struct net_device *dev) 4524dc21140_infoleaf(struct net_device *dev)
4525{ 4525{
4526 struct de4x5_private *lp = netdev_priv(dev); 4526 struct de4x5_private *lp = netdev_priv(dev);
@@ -4558,7 +4558,7 @@ dc21140_infoleaf(struct net_device *dev)
4558 return next_tick & ~TIMER_CB; 4558 return next_tick & ~TIMER_CB;
4559} 4559}
4560 4560
4561static int 4561static int
4562dc21142_infoleaf(struct net_device *dev) 4562dc21142_infoleaf(struct net_device *dev)
4563{ 4563{
4564 struct de4x5_private *lp = netdev_priv(dev); 4564 struct de4x5_private *lp = netdev_priv(dev);
@@ -4593,7 +4593,7 @@ dc21142_infoleaf(struct net_device *dev)
4593 return next_tick & ~TIMER_CB; 4593 return next_tick & ~TIMER_CB;
4594} 4594}
4595 4595
4596static int 4596static int
4597dc21143_infoleaf(struct net_device *dev) 4597dc21143_infoleaf(struct net_device *dev)
4598{ 4598{
4599 struct de4x5_private *lp = netdev_priv(dev); 4599 struct de4x5_private *lp = netdev_priv(dev);
@@ -4631,7 +4631,7 @@ dc21143_infoleaf(struct net_device *dev)
4631** The compact infoblock is only designed for DC21140[A] chips, so 4631** The compact infoblock is only designed for DC21140[A] chips, so
4632** we'll reuse the dc21140m_autoconf function. Non MII media only. 4632** we'll reuse the dc21140m_autoconf function. Non MII media only.
4633*/ 4633*/
4634static int 4634static int
4635compact_infoblock(struct net_device *dev, u_char count, u_char *p) 4635compact_infoblock(struct net_device *dev, u_char count, u_char *p)
4636{ 4636{
4637 struct de4x5_private *lp = netdev_priv(dev); 4637 struct de4x5_private *lp = netdev_priv(dev);
@@ -4671,7 +4671,7 @@ compact_infoblock(struct net_device *dev, u_char count, u_char *p)
4671/* 4671/*
4672** This block describes non MII media for the DC21140[A] only. 4672** This block describes non MII media for the DC21140[A] only.
4673*/ 4673*/
4674static int 4674static int
4675type0_infoblock(struct net_device *dev, u_char count, u_char *p) 4675type0_infoblock(struct net_device *dev, u_char count, u_char *p)
4676{ 4676{
4677 struct de4x5_private *lp = netdev_priv(dev); 4677 struct de4x5_private *lp = netdev_priv(dev);
@@ -4711,7 +4711,7 @@ type0_infoblock(struct net_device *dev, u_char count, u_char *p)
4711 4711
4712/* These functions are under construction! */ 4712/* These functions are under construction! */
4713 4713
4714static int 4714static int
4715type1_infoblock(struct net_device *dev, u_char count, u_char *p) 4715type1_infoblock(struct net_device *dev, u_char count, u_char *p)
4716{ 4716{
4717 struct de4x5_private *lp = netdev_priv(dev); 4717 struct de4x5_private *lp = netdev_priv(dev);
@@ -4750,7 +4750,7 @@ type1_infoblock(struct net_device *dev, u_char count, u_char *p)
4750 return dc21140m_autoconf(dev); 4750 return dc21140m_autoconf(dev);
4751} 4751}
4752 4752
4753static int 4753static int
4754type2_infoblock(struct net_device *dev, u_char count, u_char *p) 4754type2_infoblock(struct net_device *dev, u_char count, u_char *p)
4755{ 4755{
4756 struct de4x5_private *lp = netdev_priv(dev); 4756 struct de4x5_private *lp = netdev_priv(dev);
@@ -4791,7 +4791,7 @@ type2_infoblock(struct net_device *dev, u_char count, u_char *p)
4791 return dc2114x_autoconf(dev); 4791 return dc2114x_autoconf(dev);
4792} 4792}
4793 4793
4794static int 4794static int
4795type3_infoblock(struct net_device *dev, u_char count, u_char *p) 4795type3_infoblock(struct net_device *dev, u_char count, u_char *p)
4796{ 4796{
4797 struct de4x5_private *lp = netdev_priv(dev); 4797 struct de4x5_private *lp = netdev_priv(dev);
@@ -4833,7 +4833,7 @@ type3_infoblock(struct net_device *dev, u_char count, u_char *p)
4833 return dc2114x_autoconf(dev); 4833 return dc2114x_autoconf(dev);
4834} 4834}
4835 4835
4836static int 4836static int
4837type4_infoblock(struct net_device *dev, u_char count, u_char *p) 4837type4_infoblock(struct net_device *dev, u_char count, u_char *p)
4838{ 4838{
4839 struct de4x5_private *lp = netdev_priv(dev); 4839 struct de4x5_private *lp = netdev_priv(dev);
@@ -4878,7 +4878,7 @@ type4_infoblock(struct net_device *dev, u_char count, u_char *p)
4878** This block type provides information for resetting external devices 4878** This block type provides information for resetting external devices
4879** (chips) through the General Purpose Register. 4879** (chips) through the General Purpose Register.
4880*/ 4880*/
4881static int 4881static int
4882type5_infoblock(struct net_device *dev, u_char count, u_char *p) 4882type5_infoblock(struct net_device *dev, u_char count, u_char *p)
4883{ 4883{
4884 struct de4x5_private *lp = netdev_priv(dev); 4884 struct de4x5_private *lp = netdev_priv(dev);
@@ -4916,7 +4916,7 @@ mii_rd(u_char phyreg, u_char phyaddr, u_long ioaddr)
4916 mii_address(phyaddr, ioaddr); /* PHY address to be accessed */ 4916 mii_address(phyaddr, ioaddr); /* PHY address to be accessed */
4917 mii_address(phyreg, ioaddr); /* PHY Register to read */ 4917 mii_address(phyreg, ioaddr); /* PHY Register to read */
4918 mii_ta(MII_STRD, ioaddr); /* Turn around time - 2 MDC */ 4918 mii_ta(MII_STRD, ioaddr); /* Turn around time - 2 MDC */
4919 4919
4920 return mii_rdata(ioaddr); /* Read data */ 4920 return mii_rdata(ioaddr); /* Read data */
4921} 4921}
4922 4922
@@ -4931,7 +4931,7 @@ mii_wr(int data, u_char phyreg, u_char phyaddr, u_long ioaddr)
4931 mii_ta(MII_STWR, ioaddr); /* Turn around time - 2 MDC */ 4931 mii_ta(MII_STWR, ioaddr); /* Turn around time - 2 MDC */
4932 data = mii_swap(data, 16); /* Swap data bit ordering */ 4932 data = mii_swap(data, 16); /* Swap data bit ordering */
4933 mii_wdata(data, 16, ioaddr); /* Write data */ 4933 mii_wdata(data, 16, ioaddr); /* Write data */
4934 4934
4935 return; 4935 return;
4936} 4936}
4937 4937
@@ -4940,12 +4940,12 @@ mii_rdata(u_long ioaddr)
4940{ 4940{
4941 int i; 4941 int i;
4942 s32 tmp = 0; 4942 s32 tmp = 0;
4943 4943
4944 for (i=0; i<16; i++) { 4944 for (i=0; i<16; i++) {
4945 tmp <<= 1; 4945 tmp <<= 1;
4946 tmp |= getfrom_mii(MII_MRD | MII_RD, ioaddr); 4946 tmp |= getfrom_mii(MII_MRD | MII_RD, ioaddr);
4947 } 4947 }
4948 4948
4949 return tmp; 4949 return tmp;
4950} 4950}
4951 4951
@@ -4953,12 +4953,12 @@ static void
4953mii_wdata(int data, int len, u_long ioaddr) 4953mii_wdata(int data, int len, u_long ioaddr)
4954{ 4954{
4955 int i; 4955 int i;
4956 4956
4957 for (i=0; i<len; i++) { 4957 for (i=0; i<len; i++) {
4958 sendto_mii(MII_MWR | MII_WR, data, ioaddr); 4958 sendto_mii(MII_MWR | MII_WR, data, ioaddr);
4959 data >>= 1; 4959 data >>= 1;
4960 } 4960 }
4961 4961
4962 return; 4962 return;
4963} 4963}
4964 4964
@@ -4966,13 +4966,13 @@ static void
4966mii_address(u_char addr, u_long ioaddr) 4966mii_address(u_char addr, u_long ioaddr)
4967{ 4967{
4968 int i; 4968 int i;
4969 4969
4970 addr = mii_swap(addr, 5); 4970 addr = mii_swap(addr, 5);
4971 for (i=0; i<5; i++) { 4971 for (i=0; i<5; i++) {
4972 sendto_mii(MII_MWR | MII_WR, addr, ioaddr); 4972 sendto_mii(MII_MWR | MII_WR, addr, ioaddr);
4973 addr >>= 1; 4973 addr >>= 1;
4974 } 4974 }
4975 4975
4976 return; 4976 return;
4977} 4977}
4978 4978
@@ -4980,12 +4980,12 @@ static void
4980mii_ta(u_long rw, u_long ioaddr) 4980mii_ta(u_long rw, u_long ioaddr)
4981{ 4981{
4982 if (rw == MII_STWR) { 4982 if (rw == MII_STWR) {
4983 sendto_mii(MII_MWR | MII_WR, 1, ioaddr); 4983 sendto_mii(MII_MWR | MII_WR, 1, ioaddr);
4984 sendto_mii(MII_MWR | MII_WR, 0, ioaddr); 4984 sendto_mii(MII_MWR | MII_WR, 0, ioaddr);
4985 } else { 4985 } else {
4986 getfrom_mii(MII_MRD | MII_RD, ioaddr); /* Tri-state MDIO */ 4986 getfrom_mii(MII_MRD | MII_RD, ioaddr); /* Tri-state MDIO */
4987 } 4987 }
4988 4988
4989 return; 4989 return;
4990} 4990}
4991 4991
@@ -4993,13 +4993,13 @@ static int
4993mii_swap(int data, int len) 4993mii_swap(int data, int len)
4994{ 4994{
4995 int i, tmp = 0; 4995 int i, tmp = 0;
4996 4996
4997 for (i=0; i<len; i++) { 4997 for (i=0; i<len; i++) {
4998 tmp <<= 1; 4998 tmp <<= 1;
4999 tmp |= (data & 1); 4999 tmp |= (data & 1);
5000 data >>= 1; 5000 data >>= 1;
5001 } 5001 }
5002 5002
5003 return tmp; 5003 return tmp;
5004} 5004}
5005 5005
@@ -5007,13 +5007,13 @@ static void
5007sendto_mii(u32 command, int data, u_long ioaddr) 5007sendto_mii(u32 command, int data, u_long ioaddr)
5008{ 5008{
5009 u32 j; 5009 u32 j;
5010 5010
5011 j = (data & 1) << 17; 5011 j = (data & 1) << 17;
5012 outl(command | j, ioaddr); 5012 outl(command | j, ioaddr);
5013 udelay(1); 5013 udelay(1);
5014 outl(command | MII_MDC | j, ioaddr); 5014 outl(command | MII_MDC | j, ioaddr);
5015 udelay(1); 5015 udelay(1);
5016 5016
5017 return; 5017 return;
5018} 5018}
5019 5019
@@ -5024,7 +5024,7 @@ getfrom_mii(u32 command, u_long ioaddr)
5024 udelay(1); 5024 udelay(1);
5025 outl(command | MII_MDC, ioaddr); 5025 outl(command | MII_MDC, ioaddr);
5026 udelay(1); 5026 udelay(1);
5027 5027
5028 return ((inl(ioaddr) >> 19) & 1); 5028 return ((inl(ioaddr) >> 19) & 1);
5029} 5029}
5030 5030
@@ -5085,7 +5085,7 @@ mii_get_phy(struct net_device *dev)
5085 u_long iobase = dev->base_addr; 5085 u_long iobase = dev->base_addr;
5086 int i, j, k, n, limit=sizeof(phy_info)/sizeof(struct phy_table); 5086 int i, j, k, n, limit=sizeof(phy_info)/sizeof(struct phy_table);
5087 int id; 5087 int id;
5088 5088
5089 lp->active = 0; 5089 lp->active = 0;
5090 lp->useMII = TRUE; 5090 lp->useMII = TRUE;
5091 5091
@@ -5094,7 +5094,7 @@ mii_get_phy(struct net_device *dev)
5094 lp->phy[lp->active].addr = i; 5094 lp->phy[lp->active].addr = i;
5095 if (i==0) n++; /* Count cycles */ 5095 if (i==0) n++; /* Count cycles */
5096 while (de4x5_reset_phy(dev)<0) udelay(100);/* Wait for reset */ 5096 while (de4x5_reset_phy(dev)<0) udelay(100);/* Wait for reset */
5097 id = mii_get_oui(i, DE4X5_MII); 5097 id = mii_get_oui(i, DE4X5_MII);
5098 if ((id == 0) || (id == 65535)) continue; /* Valid ID? */ 5098 if ((id == 0) || (id == 65535)) continue; /* Valid ID? */
5099 for (j=0; j<limit; j++) { /* Search PHY table */ 5099 for (j=0; j<limit; j++) { /* Search PHY table */
5100 if (id != phy_info[j].id) continue; /* ID match? */ 5100 if (id != phy_info[j].id) continue; /* ID match? */
@@ -5133,7 +5133,7 @@ mii_get_phy(struct net_device *dev)
5133 for (k=0; lp->phy[k].id && (k < DE4X5_MAX_PHY); k++) { /*For each PHY*/ 5133 for (k=0; lp->phy[k].id && (k < DE4X5_MAX_PHY); k++) { /*For each PHY*/
5134 mii_wr(MII_CR_RST, MII_CR, lp->phy[k].addr, DE4X5_MII); 5134 mii_wr(MII_CR_RST, MII_CR, lp->phy[k].addr, DE4X5_MII);
5135 while (mii_rd(MII_CR, lp->phy[k].addr, DE4X5_MII) & MII_CR_RST); 5135 while (mii_rd(MII_CR, lp->phy[k].addr, DE4X5_MII) & MII_CR_RST);
5136 5136
5137 de4x5_dbg_mii(dev, k); 5137 de4x5_dbg_mii(dev, k);
5138 } 5138 }
5139 } 5139 }
@@ -5148,12 +5148,12 @@ build_setup_frame(struct net_device *dev, int mode)
5148 struct de4x5_private *lp = netdev_priv(dev); 5148 struct de4x5_private *lp = netdev_priv(dev);
5149 int i; 5149 int i;
5150 char *pa = lp->setup_frame; 5150 char *pa = lp->setup_frame;
5151 5151
5152 /* Initialise the setup frame */ 5152 /* Initialise the setup frame */
5153 if (mode == ALL) { 5153 if (mode == ALL) {
5154 memset(lp->setup_frame, 0, SETUP_FRAME_LEN); 5154 memset(lp->setup_frame, 0, SETUP_FRAME_LEN);
5155 } 5155 }
5156 5156
5157 if (lp->setup_f == HASH_PERF) { 5157 if (lp->setup_f == HASH_PERF) {
5158 for (pa=lp->setup_frame+IMPERF_PA_OFFSET, i=0; i<ETH_ALEN; i++) { 5158 for (pa=lp->setup_frame+IMPERF_PA_OFFSET, i=0; i<ETH_ALEN; i++) {
5159 *(pa + i) = dev->dev_addr[i]; /* Host address */ 5159 *(pa + i) = dev->dev_addr[i]; /* Host address */
@@ -5170,7 +5170,7 @@ build_setup_frame(struct net_device *dev, int mode)
5170 if (i & 0x01) pa += 4; 5170 if (i & 0x01) pa += 4;
5171 } 5171 }
5172 } 5172 }
5173 5173
5174 return pa; /* Points to the next entry */ 5174 return pa; /* Points to the next entry */
5175} 5175}
5176 5176
@@ -5178,7 +5178,7 @@ static void
5178enable_ast(struct net_device *dev, u32 time_out) 5178enable_ast(struct net_device *dev, u32 time_out)
5179{ 5179{
5180 timeout(dev, (void *)&de4x5_ast, (u_long)dev, time_out); 5180 timeout(dev, (void *)&de4x5_ast, (u_long)dev, time_out);
5181 5181
5182 return; 5182 return;
5183} 5183}
5184 5184
@@ -5186,9 +5186,9 @@ static void
5186disable_ast(struct net_device *dev) 5186disable_ast(struct net_device *dev)
5187{ 5187{
5188 struct de4x5_private *lp = netdev_priv(dev); 5188 struct de4x5_private *lp = netdev_priv(dev);
5189 5189
5190 del_timer(&lp->timer); 5190 del_timer(&lp->timer);
5191 5191
5192 return; 5192 return;
5193} 5193}
5194 5194
@@ -5207,10 +5207,10 @@ de4x5_switch_mac_port(struct net_device *dev)
5207 omr |= lp->infoblock_csr6; 5207 omr |= lp->infoblock_csr6;
5208 if (omr & OMR_PS) omr |= OMR_HBD; 5208 if (omr & OMR_PS) omr |= OMR_HBD;
5209 outl(omr, DE4X5_OMR); 5209 outl(omr, DE4X5_OMR);
5210 5210
5211 /* Soft Reset */ 5211 /* Soft Reset */
5212 RESET_DE4X5; 5212 RESET_DE4X5;
5213 5213
5214 /* Restore the GEP - especially for COMPACT and Type 0 Infoblocks */ 5214 /* Restore the GEP - especially for COMPACT and Type 0 Infoblocks */
5215 if (lp->chipset == DC21140) { 5215 if (lp->chipset == DC21140) {
5216 gep_wr(lp->cache.gepc, dev); 5216 gep_wr(lp->cache.gepc, dev);
@@ -5263,21 +5263,21 @@ timeout(struct net_device *dev, void (*fn)(u_long data), u_long data, u_long mse
5263{ 5263{
5264 struct de4x5_private *lp = netdev_priv(dev); 5264 struct de4x5_private *lp = netdev_priv(dev);
5265 int dt; 5265 int dt;
5266 5266
5267 /* First, cancel any pending timer events */ 5267 /* First, cancel any pending timer events */
5268 del_timer(&lp->timer); 5268 del_timer(&lp->timer);
5269 5269
5270 /* Convert msec to ticks */ 5270 /* Convert msec to ticks */
5271 dt = (msec * HZ) / 1000; 5271 dt = (msec * HZ) / 1000;
5272 if (dt==0) dt=1; 5272 if (dt==0) dt=1;
5273 5273
5274 /* Set up timer */ 5274 /* Set up timer */
5275 init_timer(&lp->timer); 5275 init_timer(&lp->timer);
5276 lp->timer.expires = jiffies + dt; 5276 lp->timer.expires = jiffies + dt;
5277 lp->timer.function = fn; 5277 lp->timer.function = fn;
5278 lp->timer.data = data; 5278 lp->timer.data = data;
5279 add_timer(&lp->timer); 5279 add_timer(&lp->timer);
5280 5280
5281 return; 5281 return;
5282} 5282}
5283 5283
@@ -5375,7 +5375,7 @@ de4x5_dbg_open(struct net_device *dev)
5375{ 5375{
5376 struct de4x5_private *lp = netdev_priv(dev); 5376 struct de4x5_private *lp = netdev_priv(dev);
5377 int i; 5377 int i;
5378 5378
5379 if (de4x5_debug & DEBUG_OPEN) { 5379 if (de4x5_debug & DEBUG_OPEN) {
5380 printk("%s: de4x5 opening with irq %d\n",dev->name,dev->irq); 5380 printk("%s: de4x5 opening with irq %d\n",dev->name,dev->irq);
5381 printk("\tphysical address: "); 5381 printk("\tphysical address: ");
@@ -5413,11 +5413,11 @@ de4x5_dbg_open(struct net_device *dev)
5413 } 5413 }
5414 } 5414 }
5415 printk("...0x%8.8x\n", le32_to_cpu(lp->tx_ring[i].buf)); 5415 printk("...0x%8.8x\n", le32_to_cpu(lp->tx_ring[i].buf));
5416 printk("Ring size: \nRX: %d\nTX: %d\n", 5416 printk("Ring size: \nRX: %d\nTX: %d\n",
5417 (short)lp->rxRingSize, 5417 (short)lp->rxRingSize,
5418 (short)lp->txRingSize); 5418 (short)lp->txRingSize);
5419 } 5419 }
5420 5420
5421 return; 5421 return;
5422} 5422}
5423 5423
@@ -5426,7 +5426,7 @@ de4x5_dbg_mii(struct net_device *dev, int k)
5426{ 5426{
5427 struct de4x5_private *lp = netdev_priv(dev); 5427 struct de4x5_private *lp = netdev_priv(dev);
5428 u_long iobase = dev->base_addr; 5428 u_long iobase = dev->base_addr;
5429 5429
5430 if (de4x5_debug & DEBUG_MII) { 5430 if (de4x5_debug & DEBUG_MII) {
5431 printk("\nMII device address: %d\n", lp->phy[k].addr); 5431 printk("\nMII device address: %d\n", lp->phy[k].addr);
5432 printk("MII CR: %x\n",mii_rd(MII_CR,lp->phy[k].addr,DE4X5_MII)); 5432 printk("MII CR: %x\n",mii_rd(MII_CR,lp->phy[k].addr,DE4X5_MII));
@@ -5445,7 +5445,7 @@ de4x5_dbg_mii(struct net_device *dev, int k)
5445 printk("MII 20: %x\n",mii_rd(0x14,lp->phy[k].addr,DE4X5_MII)); 5445 printk("MII 20: %x\n",mii_rd(0x14,lp->phy[k].addr,DE4X5_MII));
5446 } 5446 }
5447 } 5447 }
5448 5448
5449 return; 5449 return;
5450} 5450}
5451 5451
@@ -5453,17 +5453,17 @@ static void
5453de4x5_dbg_media(struct net_device *dev) 5453de4x5_dbg_media(struct net_device *dev)
5454{ 5454{
5455 struct de4x5_private *lp = netdev_priv(dev); 5455 struct de4x5_private *lp = netdev_priv(dev);
5456 5456
5457 if (lp->media != lp->c_media) { 5457 if (lp->media != lp->c_media) {
5458 if (de4x5_debug & DEBUG_MEDIA) { 5458 if (de4x5_debug & DEBUG_MEDIA) {
5459 printk("%s: media is %s%s\n", dev->name, 5459 printk("%s: media is %s%s\n", dev->name,
5460 (lp->media == NC ? "unconnected, link down or incompatible connection" : 5460 (lp->media == NC ? "unconnected, link down or incompatible connection" :
5461 (lp->media == TP ? "TP" : 5461 (lp->media == TP ? "TP" :
5462 (lp->media == ANS ? "TP/Nway" : 5462 (lp->media == ANS ? "TP/Nway" :
5463 (lp->media == BNC ? "BNC" : 5463 (lp->media == BNC ? "BNC" :
5464 (lp->media == AUI ? "AUI" : 5464 (lp->media == AUI ? "AUI" :
5465 (lp->media == BNC_AUI ? "BNC/AUI" : 5465 (lp->media == BNC_AUI ? "BNC/AUI" :
5466 (lp->media == EXT_SIA ? "EXT SIA" : 5466 (lp->media == EXT_SIA ? "EXT SIA" :
5467 (lp->media == _100Mb ? "100Mb/s" : 5467 (lp->media == _100Mb ? "100Mb/s" :
5468 (lp->media == _10Mb ? "10Mb/s" : 5468 (lp->media == _10Mb ? "10Mb/s" :
5469 "???" 5469 "???"
@@ -5471,7 +5471,7 @@ de4x5_dbg_media(struct net_device *dev)
5471 } 5471 }
5472 lp->c_media = lp->media; 5472 lp->c_media = lp->media;
5473 } 5473 }
5474 5474
5475 return; 5475 return;
5476} 5476}
5477 5477
@@ -5554,7 +5554,7 @@ de4x5_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
5554 u32 lval[36]; 5554 u32 lval[36];
5555 } tmp; 5555 } tmp;
5556 u_long flags = 0; 5556 u_long flags = 0;
5557 5557
5558 switch(ioc->cmd) { 5558 switch(ioc->cmd) {
5559 case DE4X5_GET_HWADDR: /* Get the hardware address */ 5559 case DE4X5_GET_HWADDR: /* Get the hardware address */
5560 ioc->len = ETH_ALEN; 5560 ioc->len = ETH_ALEN;
@@ -5575,7 +5575,7 @@ de4x5_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
5575 } 5575 }
5576 build_setup_frame(dev, PHYS_ADDR_ONLY); 5576 build_setup_frame(dev, PHYS_ADDR_ONLY);
5577 /* Set up the descriptor and give ownership to the card */ 5577 /* Set up the descriptor and give ownership to the card */
5578 load_packet(dev, lp->setup_frame, TD_IC | PERFECT_F | TD_SET | 5578 load_packet(dev, lp->setup_frame, TD_IC | PERFECT_F | TD_SET |
5579 SETUP_FRAME_LEN, (struct sk_buff *)1); 5579 SETUP_FRAME_LEN, (struct sk_buff *)1);
5580 lp->tx_new = (++lp->tx_new) % lp->txRingSize; 5580 lp->tx_new = (++lp->tx_new) % lp->txRingSize;
5581 outl(POLL_DEMAND, DE4X5_TPD); /* Start the TX */ 5581 outl(POLL_DEMAND, DE4X5_TPD); /* Start the TX */
@@ -5617,8 +5617,8 @@ de4x5_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
5617 spin_lock_irqsave(&lp->lock, flags); 5617 spin_lock_irqsave(&lp->lock, flags);
5618 memcpy(&statbuf, &lp->pktStats, ioc->len); 5618 memcpy(&statbuf, &lp->pktStats, ioc->len);
5619 spin_unlock_irqrestore(&lp->lock, flags); 5619 spin_unlock_irqrestore(&lp->lock, flags);
5620 if (copy_to_user(ioc->data, &statbuf, ioc->len)) 5620 if (copy_to_user(ioc->data, &statbuf, ioc->len))
5621 return -EFAULT; 5621 return -EFAULT;
5622 break; 5622 break;
5623 } 5623 }
5624 case DE4X5_CLR_STATS: /* Zero out the driver statistics */ 5624 case DE4X5_CLR_STATS: /* Zero out the driver statistics */
@@ -5652,9 +5652,9 @@ de4x5_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
5652 ioc->len = j; 5652 ioc->len = j;
5653 if (copy_to_user(ioc->data, tmp.addr, ioc->len)) return -EFAULT; 5653 if (copy_to_user(ioc->data, tmp.addr, ioc->len)) return -EFAULT;
5654 break; 5654 break;
5655 5655
5656#define DE4X5_DUMP 0x0f /* Dump the DE4X5 Status */ 5656#define DE4X5_DUMP 0x0f /* Dump the DE4X5 Status */
5657/* 5657/*
5658 case DE4X5_DUMP: 5658 case DE4X5_DUMP:
5659 j = 0; 5659 j = 0;
5660 tmp.addr[j++] = dev->irq; 5660 tmp.addr[j++] = dev->irq;
@@ -5664,7 +5664,7 @@ de4x5_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
5664 tmp.addr[j++] = lp->rxRingSize; 5664 tmp.addr[j++] = lp->rxRingSize;
5665 tmp.lval[j>>2] = (long)lp->rx_ring; j+=4; 5665 tmp.lval[j>>2] = (long)lp->rx_ring; j+=4;
5666 tmp.lval[j>>2] = (long)lp->tx_ring; j+=4; 5666 tmp.lval[j>>2] = (long)lp->tx_ring; j+=4;
5667 5667
5668 for (i=0;i<lp->rxRingSize-1;i++){ 5668 for (i=0;i<lp->rxRingSize-1;i++){
5669 if (i < 3) { 5669 if (i < 3) {
5670 tmp.lval[j>>2] = (long)&lp->rx_ring[i].status; j+=4; 5670 tmp.lval[j>>2] = (long)&lp->rx_ring[i].status; j+=4;
@@ -5677,7 +5677,7 @@ de4x5_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
5677 } 5677 }
5678 } 5678 }
5679 tmp.lval[j>>2] = (long)&lp->tx_ring[i].status; j+=4; 5679 tmp.lval[j>>2] = (long)&lp->tx_ring[i].status; j+=4;
5680 5680
5681 for (i=0;i<lp->rxRingSize-1;i++){ 5681 for (i=0;i<lp->rxRingSize-1;i++){
5682 if (i < 3) { 5682 if (i < 3) {
5683 tmp.lval[j>>2] = (s32)le32_to_cpu(lp->rx_ring[i].buf); j+=4; 5683 tmp.lval[j>>2] = (s32)le32_to_cpu(lp->rx_ring[i].buf); j+=4;
@@ -5690,14 +5690,14 @@ de4x5_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
5690 } 5690 }
5691 } 5691 }
5692 tmp.lval[j>>2] = (s32)le32_to_cpu(lp->tx_ring[i].buf); j+=4; 5692 tmp.lval[j>>2] = (s32)le32_to_cpu(lp->tx_ring[i].buf); j+=4;
5693 5693
5694 for (i=0;i<lp->rxRingSize;i++){ 5694 for (i=0;i<lp->rxRingSize;i++){
5695 tmp.lval[j>>2] = le32_to_cpu(lp->rx_ring[i].status); j+=4; 5695 tmp.lval[j>>2] = le32_to_cpu(lp->rx_ring[i].status); j+=4;
5696 } 5696 }
5697 for (i=0;i<lp->txRingSize;i++){ 5697 for (i=0;i<lp->txRingSize;i++){
5698 tmp.lval[j>>2] = le32_to_cpu(lp->tx_ring[i].status); j+=4; 5698 tmp.lval[j>>2] = le32_to_cpu(lp->tx_ring[i].status); j+=4;
5699 } 5699 }
5700 5700
5701 tmp.lval[j>>2] = inl(DE4X5_BMR); j+=4; 5701 tmp.lval[j>>2] = inl(DE4X5_BMR); j+=4;
5702 tmp.lval[j>>2] = inl(DE4X5_TPD); j+=4; 5702 tmp.lval[j>>2] = inl(DE4X5_TPD); j+=4;
5703 tmp.lval[j>>2] = inl(DE4X5_RPD); j+=4; 5703 tmp.lval[j>>2] = inl(DE4X5_RPD); j+=4;
@@ -5706,18 +5706,18 @@ de4x5_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
5706 tmp.lval[j>>2] = inl(DE4X5_STS); j+=4; 5706 tmp.lval[j>>2] = inl(DE4X5_STS); j+=4;
5707 tmp.lval[j>>2] = inl(DE4X5_OMR); j+=4; 5707 tmp.lval[j>>2] = inl(DE4X5_OMR); j+=4;
5708 tmp.lval[j>>2] = inl(DE4X5_IMR); j+=4; 5708 tmp.lval[j>>2] = inl(DE4X5_IMR); j+=4;
5709 tmp.lval[j>>2] = lp->chipset; j+=4; 5709 tmp.lval[j>>2] = lp->chipset; j+=4;
5710 if (lp->chipset == DC21140) { 5710 if (lp->chipset == DC21140) {
5711 tmp.lval[j>>2] = gep_rd(dev); j+=4; 5711 tmp.lval[j>>2] = gep_rd(dev); j+=4;
5712 } else { 5712 } else {
5713 tmp.lval[j>>2] = inl(DE4X5_SISR); j+=4; 5713 tmp.lval[j>>2] = inl(DE4X5_SISR); j+=4;
5714 tmp.lval[j>>2] = inl(DE4X5_SICR); j+=4; 5714 tmp.lval[j>>2] = inl(DE4X5_SICR); j+=4;
5715 tmp.lval[j>>2] = inl(DE4X5_STRR); j+=4; 5715 tmp.lval[j>>2] = inl(DE4X5_STRR); j+=4;
5716 tmp.lval[j>>2] = inl(DE4X5_SIGR); j+=4; 5716 tmp.lval[j>>2] = inl(DE4X5_SIGR); j+=4;
5717 } 5717 }
5718 tmp.lval[j>>2] = lp->phy[lp->active].id; j+=4; 5718 tmp.lval[j>>2] = lp->phy[lp->active].id; j+=4;
5719 if (lp->phy[lp->active].id && (!lp->useSROM || lp->useMII)) { 5719 if (lp->phy[lp->active].id && (!lp->useSROM || lp->useMII)) {
5720 tmp.lval[j>>2] = lp->active; j+=4; 5720 tmp.lval[j>>2] = lp->active; j+=4;
5721 tmp.lval[j>>2]=mii_rd(MII_CR,lp->phy[lp->active].addr,DE4X5_MII); j+=4; 5721 tmp.lval[j>>2]=mii_rd(MII_CR,lp->phy[lp->active].addr,DE4X5_MII); j+=4;
5722 tmp.lval[j>>2]=mii_rd(MII_SR,lp->phy[lp->active].addr,DE4X5_MII); j+=4; 5722 tmp.lval[j>>2]=mii_rd(MII_SR,lp->phy[lp->active].addr,DE4X5_MII); j+=4;
5723 tmp.lval[j>>2]=mii_rd(MII_ID0,lp->phy[lp->active].addr,DE4X5_MII); j+=4; 5723 tmp.lval[j>>2]=mii_rd(MII_ID0,lp->phy[lp->active].addr,DE4X5_MII); j+=4;
@@ -5734,10 +5734,10 @@ de4x5_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
5734 tmp.lval[j>>2]=mii_rd(0x14,lp->phy[lp->active].addr,DE4X5_MII); j+=4; 5734 tmp.lval[j>>2]=mii_rd(0x14,lp->phy[lp->active].addr,DE4X5_MII); j+=4;
5735 } 5735 }
5736 } 5736 }
5737 5737
5738 tmp.addr[j++] = lp->txRingSize; 5738 tmp.addr[j++] = lp->txRingSize;
5739 tmp.addr[j++] = netif_queue_stopped(dev); 5739 tmp.addr[j++] = netif_queue_stopped(dev);
5740 5740
5741 ioc->len = j; 5741 ioc->len = j;
5742 if (copy_to_user(ioc->data, tmp.addr, ioc->len)) return -EFAULT; 5742 if (copy_to_user(ioc->data, tmp.addr, ioc->len)) return -EFAULT;
5743 break; 5743 break;
@@ -5746,7 +5746,7 @@ de4x5_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
5746 default: 5746 default:
5747 return -EOPNOTSUPP; 5747 return -EOPNOTSUPP;
5748 } 5748 }
5749 5749
5750 return status; 5750 return status;
5751} 5751}
5752 5752