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authorMatt Carlson <mcarlson@broadcom.com>2007-11-13 00:10:06 -0500
committerDavid S. Miller <davem@davemloft.net>2007-11-13 00:10:06 -0500
commit9acb961e7d780291659bf950b3b718ff9e085620 (patch)
tree4d85bccc795eae5ba9d4061de8a73cb443e708c8 /drivers/net/tg3.h
parent84af67fdf07c4fce664dbca87a8d5e2802901bff (diff)
[TG3]: 5784 / 5764 DMA engine lockup fix
5784 and 5764 devices lock up when the link speed is 10Mbps, the CPMU link speed mode is enabled, and the MAC clock is running at 1.5Mhz. The fix is to run the MAC clock at faster speeds. Signed-off-by: Matt Carlson <mcarlson@broadcom.com> Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/tg3.h')
-rw-r--r--drivers/net/tg3.h15
1 files changed, 13 insertions, 2 deletions
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index 4659697beb4b..c6aad49a375d 100644
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -857,13 +857,24 @@
857#define CPMU_CTRL_LINK_IDLE_MODE 0x00000200 857#define CPMU_CTRL_LINK_IDLE_MODE 0x00000200
858#define CPMU_CTRL_LINK_AWARE_MODE 0x00000400 858#define CPMU_CTRL_LINK_AWARE_MODE 0x00000400
859#define CPMU_CTRL_LINK_SPEED_MODE 0x00004000 859#define CPMU_CTRL_LINK_SPEED_MODE 0x00004000
860/* 0x3604 --> 0x360c unused */ 860#define TG3_CPMU_LSPD_10MB_CLK 0x00003604
861#define CPMU_LSPD_10MB_MACCLK_MASK 0x001f0000
862#define CPMU_LSPD_10MB_MACCLK_6_25 0x00130000
863/* 0x3608 --> 0x360c unused */
861 864
862#define TG3_CPMU_LSPD_1000MB_CLK 0x0000360c 865#define TG3_CPMU_LSPD_1000MB_CLK 0x0000360c
863#define CPMU_LSPD_1000MB_MACCLK_62_5 0x00000000 866#define CPMU_LSPD_1000MB_MACCLK_62_5 0x00000000
864#define CPMU_LSPD_1000MB_MACCLK_12_5 0x00110000 867#define CPMU_LSPD_1000MB_MACCLK_12_5 0x00110000
865#define CPMU_LSPD_1000MB_MACCLK_MASK 0x001f0000 868#define CPMU_LSPD_1000MB_MACCLK_MASK 0x001f0000
866/* 0x3610 --> 0x365c unused */ 869#define TG3_CPMU_LNK_AWARE_PWRMD 0x00003610
870#define CPMU_LNK_AWARE_MACCLK_MASK 0x001f0000
871#define CPMU_LNK_AWARE_MACCLK_6_25 0x00130000
872/* 0x3614 --> 0x361c unused */
873
874#define TG3_CPMU_HST_ACC 0x0000361c
875#define CPMU_HST_ACC_MACCLK_MASK 0x001f0000
876#define CPMU_HST_ACC_MACCLK_6_25 0x00130000
877/* 0x3620 --> 0x365c unused */
867 878
868#define TG3_CPMU_MUTEX_REQ 0x0000365c 879#define TG3_CPMU_MUTEX_REQ 0x0000365c
869#define CPMU_MUTEX_REQ_DRIVER 0x00001000 880#define CPMU_MUTEX_REQ_DRIVER 0x00001000