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authorDave Airlie <airlied@starflyer.(none)>2006-01-03 02:18:01 -0500
committerDave Airlie <airlied@linux.ie>2006-01-03 02:18:01 -0500
commit97f2aab6698f3ab2552c41c1024a65ffd0763a6d (patch)
treebb6e3b2949459f54f884c710fc74d40eef00d834 /drivers/net/tg3.h
parentd985c1088146607532093d9eaaaf99758f6a4d21 (diff)
parent88026842b0a760145aa71d69e74fbc9ec118ca44 (diff)
drm: merge in Linus mainline
Diffstat (limited to 'drivers/net/tg3.h')
-rw-r--r--drivers/net/tg3.h14
1 files changed, 14 insertions, 0 deletions
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index fb7e2a5f4a08..890e1635996b 100644
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -1124,7 +1124,14 @@
1124/* 0x280 --> 0x400 unused */ 1124/* 0x280 --> 0x400 unused */
1125 1125
1126#define RX_CPU_BASE 0x00005000 1126#define RX_CPU_BASE 0x00005000
1127#define RX_CPU_MODE 0x00005000
1128#define RX_CPU_STATE 0x00005004
1129#define RX_CPU_PGMCTR 0x0000501c
1130#define RX_CPU_HWBKPT 0x00005034
1127#define TX_CPU_BASE 0x00005400 1131#define TX_CPU_BASE 0x00005400
1132#define TX_CPU_MODE 0x00005400
1133#define TX_CPU_STATE 0x00005404
1134#define TX_CPU_PGMCTR 0x0000541c
1128 1135
1129/* Mailboxes */ 1136/* Mailboxes */
1130#define GRCMBOX_INTERRUPT_0 0x00005800 /* 64-bit */ 1137#define GRCMBOX_INTERRUPT_0 0x00005800 /* 64-bit */
@@ -1529,6 +1536,12 @@
1529#define NIC_SRAM_MAC_ADDR_HIGH_MBOX 0x00000c14 1536#define NIC_SRAM_MAC_ADDR_HIGH_MBOX 0x00000c14
1530#define NIC_SRAM_MAC_ADDR_LOW_MBOX 0x00000c18 1537#define NIC_SRAM_MAC_ADDR_LOW_MBOX 0x00000c18
1531 1538
1539#define NIC_SRAM_WOL_MBOX 0x00000d30
1540#define WOL_SIGNATURE 0x474c0000
1541#define WOL_DRV_STATE_SHUTDOWN 0x00000001
1542#define WOL_DRV_WOL 0x00000002
1543#define WOL_SET_MAGIC_PKT 0x00000004
1544
1532#define NIC_SRAM_DATA_CFG_2 0x00000d38 1545#define NIC_SRAM_DATA_CFG_2 0x00000d38
1533 1546
1534#define SHASTA_EXT_LED_MODE_MASK 0x00018000 1547#define SHASTA_EXT_LED_MODE_MASK 0x00018000
@@ -1565,6 +1578,7 @@
1565#define MII_TG3_EXT_CTRL 0x10 /* Extended control register */ 1578#define MII_TG3_EXT_CTRL 0x10 /* Extended control register */
1566#define MII_TG3_EXT_CTRL_FIFO_ELASTIC 0x0001 1579#define MII_TG3_EXT_CTRL_FIFO_ELASTIC 0x0001
1567#define MII_TG3_EXT_CTRL_LNK3_LED_MODE 0x0002 1580#define MII_TG3_EXT_CTRL_LNK3_LED_MODE 0x0002
1581#define MII_TG3_EXT_CTRL_FORCE_LED_OFF 0x0008
1568#define MII_TG3_EXT_CTRL_TBI 0x8000 1582#define MII_TG3_EXT_CTRL_TBI 0x8000
1569 1583
1570#define MII_TG3_EXT_STAT 0x11 /* Extended status register */ 1584#define MII_TG3_EXT_STAT 0x11 /* Extended status register */