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authorMatt Carlson <mcarlson@broadcom.com>2008-08-15 17:08:22 -0400
committerDavid S. Miller <davem@davemloft.net>2008-08-15 17:08:22 -0400
commit3bda12589646caa22b2ed4ef7cf82d17ea59d7a6 (patch)
treeabe2d161b442821ac245a61833e24b61fae954b1 /drivers/net/tg3.c
parent731fd79c133dc04cabee17ecfa7661189a8df5c8 (diff)
tg3: Preserve register settings for DASH
Broadcom's DASH (Desktop and mobile Architecture for System Hardware) implementation requires that the driver preserve particular register settings. If the driver does not preserve them, communication with the DASH firmware will be lost. Signed-off-by: Matt Carlson <mcarlson@broadcom.com> Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/tg3.c')
-rw-r--r--drivers/net/tg3.c26
1 files changed, 24 insertions, 2 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 13640f1cab3b..0ebf2ff60c4b 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -2126,6 +2126,13 @@ static int tg3_set_power_state(struct tg3 *tp, pci_power_t state)
2126 (tp->tg3_flags & TG3_FLAG_WOL_ENABLE)) 2126 (tp->tg3_flags & TG3_FLAG_WOL_ENABLE))
2127 mac_mode |= MAC_MODE_MAGIC_PKT_ENABLE; 2127 mac_mode |= MAC_MODE_MAGIC_PKT_ENABLE;
2128 2128
2129 if (tp->tg3_flags3 & TG3_FLG3_ENABLE_APE) {
2130 mac_mode |= tp->mac_mode &
2131 (MAC_MODE_APE_TX_EN | MAC_MODE_APE_RX_EN);
2132 if (mac_mode & MAC_MODE_APE_TX_EN)
2133 mac_mode |= MAC_MODE_TDE_ENABLE;
2134 }
2135
2129 tw32_f(MAC_MODE, mac_mode); 2136 tw32_f(MAC_MODE, mac_mode);
2130 udelay(100); 2137 udelay(100);
2131 2138
@@ -5912,6 +5919,11 @@ static int tg3_chip_reset(struct tg3 *tp)
5912 } else if (tp->tg3_flags2 & TG3_FLG2_MII_SERDES) { 5919 } else if (tp->tg3_flags2 & TG3_FLG2_MII_SERDES) {
5913 tp->mac_mode = MAC_MODE_PORT_MODE_GMII; 5920 tp->mac_mode = MAC_MODE_PORT_MODE_GMII;
5914 tw32_f(MAC_MODE, tp->mac_mode); 5921 tw32_f(MAC_MODE, tp->mac_mode);
5922 } else if (tp->tg3_flags3 & TG3_FLG3_ENABLE_APE) {
5923 tp->mac_mode &= (MAC_MODE_APE_TX_EN | MAC_MODE_APE_RX_EN);
5924 if (tp->mac_mode & MAC_MODE_APE_TX_EN)
5925 tp->mac_mode |= MAC_MODE_TDE_ENABLE;
5926 tw32_f(MAC_MODE, tp->mac_mode);
5915 } else 5927 } else
5916 tw32_f(MAC_MODE, 0); 5928 tw32_f(MAC_MODE, 0);
5917 udelay(40); 5929 udelay(40);
@@ -7412,7 +7424,11 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
7412 udelay(10); 7424 udelay(10);
7413 } 7425 }
7414 7426
7415 tp->mac_mode = MAC_MODE_TXSTAT_ENABLE | MAC_MODE_RXSTAT_ENABLE | 7427 if (tp->tg3_flags3 & TG3_FLG3_ENABLE_APE)
7428 tp->mac_mode &= MAC_MODE_APE_TX_EN | MAC_MODE_APE_RX_EN;
7429 else
7430 tp->mac_mode = 0;
7431 tp->mac_mode |= MAC_MODE_TXSTAT_ENABLE | MAC_MODE_RXSTAT_ENABLE |
7416 MAC_MODE_TDE_ENABLE | MAC_MODE_RDE_ENABLE | MAC_MODE_FHDE_ENABLE; 7432 MAC_MODE_TDE_ENABLE | MAC_MODE_RDE_ENABLE | MAC_MODE_FHDE_ENABLE;
7417 if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS) && 7433 if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS) &&
7418 !(tp->tg3_flags2 & TG3_FLG2_PHY_SERDES) && 7434 !(tp->tg3_flags2 & TG3_FLG2_PHY_SERDES) &&
@@ -12422,6 +12438,13 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
12422 tp->misc_host_ctrl); 12438 tp->misc_host_ctrl);
12423 } 12439 }
12424 12440
12441 /* Preserve the APE MAC_MODE bits */
12442 if (tp->tg3_flags3 & TG3_FLG3_ENABLE_APE)
12443 tp->mac_mode = tr32(MAC_MODE) |
12444 MAC_MODE_APE_TX_EN | MAC_MODE_APE_RX_EN;
12445 else
12446 tp->mac_mode = TG3_DEF_MAC_MODE;
12447
12425 /* these are limited to 10/100 only */ 12448 /* these are limited to 10/100 only */
12426 if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5703 && 12449 if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5703 &&
12427 (grc_misc_cfg == 0x8000 || grc_misc_cfg == 0x4000)) || 12450 (grc_misc_cfg == 0x8000 || grc_misc_cfg == 0x4000)) ||
@@ -13281,7 +13304,6 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,
13281 tp->pdev = pdev; 13304 tp->pdev = pdev;
13282 tp->dev = dev; 13305 tp->dev = dev;
13283 tp->pm_cap = pm_cap; 13306 tp->pm_cap = pm_cap;
13284 tp->mac_mode = TG3_DEF_MAC_MODE;
13285 tp->rx_mode = TG3_DEF_RX_MODE; 13307 tp->rx_mode = TG3_DEF_RX_MODE;
13286 tp->tx_mode = TG3_DEF_TX_MODE; 13308 tp->tx_mode = TG3_DEF_TX_MODE;
13287 13309