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authorMatt Carlson <mcarlson@broadcom.com>2011-04-25 08:42:45 -0400
committerDavid S. Miller <davem@davemloft.net>2011-04-26 03:07:01 -0400
commit0aebff4871d26410ae485b521870bb0ffe1736f0 (patch)
tree48b869f07b111561307a26199bcec47b473c548d /drivers/net/tg3.c
parentbf734843120b905bacc3d24c88d7455ae70bf6e1 (diff)
tg3: Fix int generation hw bug for 5719 / 5720
On the 5719 and 5720, there is a bug where the hardware will misinterpret a status tag update and leave interrupts permanently disabled. This patch enables a hardware fix that works around the issue. Signed-off-by: Matt Carlson <mcarlson@broadcom.com> Reviewed-by: Michael Chan <mchan@broadcom.com> Reviewed-by: Benjamin Li <benli@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/tg3.c')
-rw-r--r--drivers/net/tg3.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 693f36e94dab..a72d0314ca78 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -8198,6 +8198,9 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
8198 ~DMA_RWCTRL_DIS_CACHE_ALIGNMENT; 8198 ~DMA_RWCTRL_DIS_CACHE_ALIGNMENT;
8199 if (tp->pci_chip_rev_id == CHIPREV_ID_57765_A0) 8199 if (tp->pci_chip_rev_id == CHIPREV_ID_57765_A0)
8200 val &= ~DMA_RWCTRL_CRDRDR_RDMA_MRRS_MSK; 8200 val &= ~DMA_RWCTRL_CRDRDR_RDMA_MRRS_MSK;
8201 if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_57765 &&
8202 GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5717)
8203 val |= DMA_RWCTRL_TAGGED_STAT_WA;
8201 tw32(TG3PCI_DMA_RW_CTRL, val | tp->dma_rwctrl); 8204 tw32(TG3PCI_DMA_RW_CTRL, val | tp->dma_rwctrl);
8202 } else if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5784 && 8205 } else if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5784 &&
8203 GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5761) { 8206 GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5761) {