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authorGiuseppe CAVALLARO <peppe.cavallaro@st.com>2010-08-23 16:40:42 -0400
committerDavid S. Miller <davem@davemloft.net>2010-08-25 19:30:51 -0400
commitad01b7d480a4a135f974afd5c617c417e0b0542f (patch)
treebd69865fb4bb323e697d46c8b0365ec1774a9696 /drivers/net/stmmac/dwmac_lib.c
parentac75791aa943c7953521cb4fa7728bf51f9abd2d (diff)
stmmac: make ioaddr 'void __iomem *' rather than unsigned long
This avoids unnecessary casting and adds the ioaddr in the private structure. This patch also removes many warning when compile the driver. Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/stmmac/dwmac_lib.c')
-rw-r--r--drivers/net/stmmac/dwmac_lib.c22
1 files changed, 11 insertions, 11 deletions
diff --git a/drivers/net/stmmac/dwmac_lib.c b/drivers/net/stmmac/dwmac_lib.c
index a85415216ef4..d65fab1ba790 100644
--- a/drivers/net/stmmac/dwmac_lib.c
+++ b/drivers/net/stmmac/dwmac_lib.c
@@ -32,43 +32,43 @@
32#endif 32#endif
33 33
34/* CSR1 enables the transmit DMA to check for new descriptor */ 34/* CSR1 enables the transmit DMA to check for new descriptor */
35void dwmac_enable_dma_transmission(unsigned long ioaddr) 35void dwmac_enable_dma_transmission(void __iomem *ioaddr)
36{ 36{
37 writel(1, ioaddr + DMA_XMT_POLL_DEMAND); 37 writel(1, ioaddr + DMA_XMT_POLL_DEMAND);
38} 38}
39 39
40void dwmac_enable_dma_irq(unsigned long ioaddr) 40void dwmac_enable_dma_irq(void __iomem *ioaddr)
41{ 41{
42 writel(DMA_INTR_DEFAULT_MASK, ioaddr + DMA_INTR_ENA); 42 writel(DMA_INTR_DEFAULT_MASK, ioaddr + DMA_INTR_ENA);
43} 43}
44 44
45void dwmac_disable_dma_irq(unsigned long ioaddr) 45void dwmac_disable_dma_irq(void __iomem *ioaddr)
46{ 46{
47 writel(0, ioaddr + DMA_INTR_ENA); 47 writel(0, ioaddr + DMA_INTR_ENA);
48} 48}
49 49
50void dwmac_dma_start_tx(unsigned long ioaddr) 50void dwmac_dma_start_tx(void __iomem *ioaddr)
51{ 51{
52 u32 value = readl(ioaddr + DMA_CONTROL); 52 u32 value = readl(ioaddr + DMA_CONTROL);
53 value |= DMA_CONTROL_ST; 53 value |= DMA_CONTROL_ST;
54 writel(value, ioaddr + DMA_CONTROL); 54 writel(value, ioaddr + DMA_CONTROL);
55} 55}
56 56
57void dwmac_dma_stop_tx(unsigned long ioaddr) 57void dwmac_dma_stop_tx(void __iomem *ioaddr)
58{ 58{
59 u32 value = readl(ioaddr + DMA_CONTROL); 59 u32 value = readl(ioaddr + DMA_CONTROL);
60 value &= ~DMA_CONTROL_ST; 60 value &= ~DMA_CONTROL_ST;
61 writel(value, ioaddr + DMA_CONTROL); 61 writel(value, ioaddr + DMA_CONTROL);
62} 62}
63 63
64void dwmac_dma_start_rx(unsigned long ioaddr) 64void dwmac_dma_start_rx(void __iomem *ioaddr)
65{ 65{
66 u32 value = readl(ioaddr + DMA_CONTROL); 66 u32 value = readl(ioaddr + DMA_CONTROL);
67 value |= DMA_CONTROL_SR; 67 value |= DMA_CONTROL_SR;
68 writel(value, ioaddr + DMA_CONTROL); 68 writel(value, ioaddr + DMA_CONTROL);
69} 69}
70 70
71void dwmac_dma_stop_rx(unsigned long ioaddr) 71void dwmac_dma_stop_rx(void __iomem *ioaddr)
72{ 72{
73 u32 value = readl(ioaddr + DMA_CONTROL); 73 u32 value = readl(ioaddr + DMA_CONTROL);
74 value &= ~DMA_CONTROL_SR; 74 value &= ~DMA_CONTROL_SR;
@@ -145,7 +145,7 @@ static void show_rx_process_state(unsigned int status)
145} 145}
146#endif 146#endif
147 147
148int dwmac_dma_interrupt(unsigned long ioaddr, 148int dwmac_dma_interrupt(void __iomem *ioaddr,
149 struct stmmac_extra_stats *x) 149 struct stmmac_extra_stats *x)
150{ 150{
151 int ret = 0; 151 int ret = 0;
@@ -219,7 +219,7 @@ int dwmac_dma_interrupt(unsigned long ioaddr,
219 return ret; 219 return ret;
220} 220}
221 221
222void dwmac_dma_flush_tx_fifo(unsigned long ioaddr) 222void dwmac_dma_flush_tx_fifo(void __iomem *ioaddr)
223{ 223{
224 u32 csr6 = readl(ioaddr + DMA_CONTROL); 224 u32 csr6 = readl(ioaddr + DMA_CONTROL);
225 writel((csr6 | DMA_CONTROL_FTF), ioaddr + DMA_CONTROL); 225 writel((csr6 | DMA_CONTROL_FTF), ioaddr + DMA_CONTROL);
@@ -227,7 +227,7 @@ void dwmac_dma_flush_tx_fifo(unsigned long ioaddr)
227 do {} while ((readl(ioaddr + DMA_CONTROL) & DMA_CONTROL_FTF)); 227 do {} while ((readl(ioaddr + DMA_CONTROL) & DMA_CONTROL_FTF));
228} 228}
229 229
230void stmmac_set_mac_addr(unsigned long ioaddr, u8 addr[6], 230void stmmac_set_mac_addr(void __iomem *ioaddr, u8 addr[6],
231 unsigned int high, unsigned int low) 231 unsigned int high, unsigned int low)
232{ 232{
233 unsigned long data; 233 unsigned long data;
@@ -238,7 +238,7 @@ void stmmac_set_mac_addr(unsigned long ioaddr, u8 addr[6],
238 writel(data, ioaddr + low); 238 writel(data, ioaddr + low);
239} 239}
240 240
241void stmmac_get_mac_addr(unsigned long ioaddr, unsigned char *addr, 241void stmmac_get_mac_addr(void __iomem *ioaddr, unsigned char *addr,
242 unsigned int high, unsigned int low) 242 unsigned int high, unsigned int low)
243{ 243{
244 unsigned int hi_addr, lo_addr; 244 unsigned int hi_addr, lo_addr;