diff options
author | David Woodhouse <dwmw2@infradead.org> | 2007-10-13 09:43:54 -0400 |
---|---|---|
committer | David Woodhouse <dwmw2@infradead.org> | 2007-10-13 09:43:54 -0400 |
commit | b160292cc216a50fd0cd386b0bda2cd48352c73b (patch) | |
tree | ef07cf98f91353ee4c9ec1e1ca7a2a5d9d4b538a /drivers/net/sky2.h | |
parent | b37bde147890c8fea8369a5a4e230dabdea4ebfb (diff) | |
parent | bbf25010f1a6b761914430f5fca081ec8c7accd1 (diff) |
Merge Linux 2.6.23
Diffstat (limited to 'drivers/net/sky2.h')
-rw-r--r-- | drivers/net/sky2.h | 42 |
1 files changed, 34 insertions, 8 deletions
diff --git a/drivers/net/sky2.h b/drivers/net/sky2.h index dce4d276d443..8bc5c54e3efa 100644 --- a/drivers/net/sky2.h +++ b/drivers/net/sky2.h | |||
@@ -470,18 +470,24 @@ enum { | |||
470 | CHIP_ID_YUKON_EX = 0xb5, /* Chip ID for YUKON-2 Extreme */ | 470 | CHIP_ID_YUKON_EX = 0xb5, /* Chip ID for YUKON-2 Extreme */ |
471 | CHIP_ID_YUKON_EC = 0xb6, /* Chip ID for YUKON-2 EC */ | 471 | CHIP_ID_YUKON_EC = 0xb6, /* Chip ID for YUKON-2 EC */ |
472 | CHIP_ID_YUKON_FE = 0xb7, /* Chip ID for YUKON-2 FE */ | 472 | CHIP_ID_YUKON_FE = 0xb7, /* Chip ID for YUKON-2 FE */ |
473 | 473 | CHIP_ID_YUKON_FE_P = 0xb8, /* Chip ID for YUKON-2 FE+ */ | |
474 | }; | ||
475 | enum yukon_ec_rev { | ||
474 | CHIP_REV_YU_EC_A1 = 0, /* Chip Rev. for Yukon-EC A1/A0 */ | 476 | CHIP_REV_YU_EC_A1 = 0, /* Chip Rev. for Yukon-EC A1/A0 */ |
475 | CHIP_REV_YU_EC_A2 = 1, /* Chip Rev. for Yukon-EC A2 */ | 477 | CHIP_REV_YU_EC_A2 = 1, /* Chip Rev. for Yukon-EC A2 */ |
476 | CHIP_REV_YU_EC_A3 = 2, /* Chip Rev. for Yukon-EC A3 */ | 478 | CHIP_REV_YU_EC_A3 = 2, /* Chip Rev. for Yukon-EC A3 */ |
477 | 479 | }; | |
480 | enum yukon_ec_u_rev { | ||
478 | CHIP_REV_YU_EC_U_A0 = 1, | 481 | CHIP_REV_YU_EC_U_A0 = 1, |
479 | CHIP_REV_YU_EC_U_A1 = 2, | 482 | CHIP_REV_YU_EC_U_A1 = 2, |
480 | CHIP_REV_YU_EC_U_B0 = 3, | 483 | CHIP_REV_YU_EC_U_B0 = 3, |
481 | 484 | }; | |
485 | enum yukon_fe_rev { | ||
482 | CHIP_REV_YU_FE_A1 = 1, | 486 | CHIP_REV_YU_FE_A1 = 1, |
483 | CHIP_REV_YU_FE_A2 = 2, | 487 | CHIP_REV_YU_FE_A2 = 2, |
484 | 488 | }; | |
489 | enum yukon_fe_p_rev { | ||
490 | CHIP_REV_YU_FE2_A0 = 0, | ||
485 | }; | 491 | }; |
486 | enum yukon_ex_rev { | 492 | enum yukon_ex_rev { |
487 | CHIP_REV_YU_EX_A0 = 1, | 493 | CHIP_REV_YU_EX_A0 = 1, |
@@ -1668,7 +1674,7 @@ enum { | |||
1668 | 1674 | ||
1669 | /* Receive Frame Status Encoding */ | 1675 | /* Receive Frame Status Encoding */ |
1670 | enum { | 1676 | enum { |
1671 | GMR_FS_LEN = 0xffff<<16, /* Bit 31..16: Rx Frame Length */ | 1677 | GMR_FS_LEN = 0x7fff<<16, /* Bit 30..16: Rx Frame Length */ |
1672 | GMR_FS_VLAN = 1<<13, /* VLAN Packet */ | 1678 | GMR_FS_VLAN = 1<<13, /* VLAN Packet */ |
1673 | GMR_FS_JABBER = 1<<12, /* Jabber Packet */ | 1679 | GMR_FS_JABBER = 1<<12, /* Jabber Packet */ |
1674 | GMR_FS_UN_SIZE = 1<<11, /* Undersize Packet */ | 1680 | GMR_FS_UN_SIZE = 1<<11, /* Undersize Packet */ |
@@ -1729,6 +1735,10 @@ enum { | |||
1729 | GMF_RX_CTRL_DEF = GMF_OPER_ON | GMF_RX_F_FL_ON, | 1735 | GMF_RX_CTRL_DEF = GMF_OPER_ON | GMF_RX_F_FL_ON, |
1730 | }; | 1736 | }; |
1731 | 1737 | ||
1738 | /* TX_GMF_EA 32 bit Tx GMAC FIFO End Address */ | ||
1739 | enum { | ||
1740 | TX_DYN_WM_ENA = 3, /* Yukon-FE+ specific */ | ||
1741 | }; | ||
1732 | 1742 | ||
1733 | /* TX_GMF_CTRL_T 32 bit Tx GMAC FIFO Control/Test */ | 1743 | /* TX_GMF_CTRL_T 32 bit Tx GMAC FIFO Control/Test */ |
1734 | enum { | 1744 | enum { |
@@ -2017,6 +2027,14 @@ struct sky2_port { | |||
2017 | u16 rx_tag; | 2027 | u16 rx_tag; |
2018 | struct vlan_group *vlgrp; | 2028 | struct vlan_group *vlgrp; |
2019 | #endif | 2029 | #endif |
2030 | struct { | ||
2031 | unsigned long last; | ||
2032 | u32 mac_rp; | ||
2033 | u8 mac_lev; | ||
2034 | u8 fifo_rp; | ||
2035 | u8 fifo_lev; | ||
2036 | } check; | ||
2037 | |||
2020 | 2038 | ||
2021 | dma_addr_t rx_le_map; | 2039 | dma_addr_t rx_le_map; |
2022 | dma_addr_t tx_le_map; | 2040 | dma_addr_t tx_le_map; |
@@ -2040,6 +2058,15 @@ struct sky2_hw { | |||
2040 | void __iomem *regs; | 2058 | void __iomem *regs; |
2041 | struct pci_dev *pdev; | 2059 | struct pci_dev *pdev; |
2042 | struct net_device *dev[2]; | 2060 | struct net_device *dev[2]; |
2061 | unsigned long flags; | ||
2062 | #define SKY2_HW_USE_MSI 0x00000001 | ||
2063 | #define SKY2_HW_FIBRE_PHY 0x00000002 | ||
2064 | #define SKY2_HW_GIGABIT 0x00000004 | ||
2065 | #define SKY2_HW_NEWER_PHY 0x00000008 | ||
2066 | #define SKY2_HW_FIFO_HANG_CHECK 0x00000010 | ||
2067 | #define SKY2_HW_NEW_LE 0x00000020 /* new LSOv2 format */ | ||
2068 | #define SKY2_HW_AUTO_TX_SUM 0x00000040 /* new IP decode for Tx */ | ||
2069 | #define SKY2_HW_ADV_POWER_CTL 0x00000080 /* additional PHY power regs */ | ||
2043 | 2070 | ||
2044 | u8 chip_id; | 2071 | u8 chip_id; |
2045 | u8 chip_rev; | 2072 | u8 chip_rev; |
@@ -2050,15 +2077,14 @@ struct sky2_hw { | |||
2050 | u32 st_idx; | 2077 | u32 st_idx; |
2051 | dma_addr_t st_dma; | 2078 | dma_addr_t st_dma; |
2052 | 2079 | ||
2053 | struct timer_list idle_timer; | 2080 | struct timer_list watchdog_timer; |
2054 | struct work_struct restart_work; | 2081 | struct work_struct restart_work; |
2055 | int msi; | ||
2056 | wait_queue_head_t msi_wait; | 2082 | wait_queue_head_t msi_wait; |
2057 | }; | 2083 | }; |
2058 | 2084 | ||
2059 | static inline int sky2_is_copper(const struct sky2_hw *hw) | 2085 | static inline int sky2_is_copper(const struct sky2_hw *hw) |
2060 | { | 2086 | { |
2061 | return !(hw->pmd_type == 'L' || hw->pmd_type == 'S' || hw->pmd_type == 'P'); | 2087 | return !(hw->flags & SKY2_HW_FIBRE_PHY); |
2062 | } | 2088 | } |
2063 | 2089 | ||
2064 | /* Register accessor for memory mapped device */ | 2090 | /* Register accessor for memory mapped device */ |