[PATCH] sky2: use standard pci register capabilties for error register

Use the standard pci capability mechanism to access PCI express error
registers, rather than hard coding the offset. Mask off the PCI express
error from ever occuring on non-PCI express systems.

Signed-off-by: Stephen Hemminger <shemminger@osdl.org>
Signed-off-by: Jeff Garzik <jeff@garzik.org>

1 files changed, 2 insertions, 43 deletions

diff --git a/drivers/net/sky2.h b/drivers/net/sky2.h
index 4c13c371bc21..b2981565e9e3 100644
--- a/drivers/net/sky2.h
+++ b/drivers/net/sky2.h
@@ -4,24 +4,15 @@
 #ifndef _SKY2_H
 #define _SKY2_H
 
-/* PCI config registers */
+/* PCI device specific config registers */
 enum {
         PCI_DEV_REG1    = 0x40,
         PCI_DEV_REG2    = 0x44,
-        PCI_DEV_STATUS  = 0x7c,
         PCI_DEV_REG3    = 0x80,
         PCI_DEV_REG4    = 0x84,
         PCI_DEV_REG5    = 0x88,
 };
 
-enum {
-        PEX_DEV_CAP     = 0xe4,
-        PEX_DEV_CTRL    = 0xe8,
-        PEX_DEV_STA     = 0xea,
-        PEX_LNK_STAT    = 0xf2,
-        PEX_UNC_ERR_STAT= 0x104,
-};
-
 /* Yukon-2 */
 enum pci_dev_reg_1 {
         PCI_Y2_PIG_ENA   = 1<<31, /* Enable Plug-in-Go (YUKON-2) */
@@ -70,39 +61,6 @@ enum pci_dev_reg_4 {
                                PCI_STATUS_REC_MASTER_ABORT | \
                                PCI_STATUS_REC_TARGET_ABORT | \
                                PCI_STATUS_PARITY)
-
-enum pex_dev_ctrl {
-        PEX_DC_MAX_RRS_MSK      = 7<<12, /* Bit 14..12: Max. Read Request Size */
-        PEX_DC_EN_NO_SNOOP      = 1<<11,/* Enable No Snoop */
-        PEX_DC_EN_AUX_POW       = 1<<10,/* Enable AUX Power */
-        PEX_DC_EN_PHANTOM       = 1<<9, /* Enable Phantom Functions */
-        PEX_DC_EN_EXT_TAG       = 1<<8, /* Enable Extended Tag Field */
-        PEX_DC_MAX_PLS_MSK      = 7<<5, /* Bit  7.. 5:  Max. Payload Size Mask */
-        PEX_DC_EN_REL_ORD       = 1<<4, /* Enable Relaxed Ordering */
-        PEX_DC_EN_UNS_RQ_RP     = 1<<3, /* Enable Unsupported Request Reporting */
-        PEX_DC_EN_FAT_ER_RP     = 1<<2, /* Enable Fatal Error Reporting */
-        PEX_DC_EN_NFA_ER_RP     = 1<<1, /* Enable Non-Fatal Error Reporting */
-        PEX_DC_EN_COR_ER_RP     = 1<<0, /* Enable Correctable Error Reporting */
-};
-#define  PEX_DC_MAX_RD_RQ_SIZE(x) (((x)<<12) & PEX_DC_MAX_RRS_MSK)
-
-/* PEX_UNC_ERR_STAT      PEX Uncorrectable Errors Status Register (Yukon-2) */
-enum pex_err {
-        PEX_UNSUP_REQ   = 1<<20, /* Unsupported Request Error */
-
-        PEX_MALFOR_TLP  = 1<<18, /* Malformed TLP */
-
-        PEX_UNEXP_COMP  = 1<<16, /* Unexpected Completion */
-
-        PEX_COMP_TO     = 1<<14, /* Completion Timeout */
-        PEX_FLOW_CTRL_P = 1<<13, /* Flow Control Protocol Error */
-        PEX_POIS_TLP    = 1<<12, /* Poisoned TLP */
-
-        PEX_DATA_LINK_P = 1<<4, /* Data Link Protocol Error */
-        PEX_FATAL_ERRORS= (PEX_MALFOR_TLP | PEX_FLOW_CTRL_P | PEX_DATA_LINK_P),
-};
-
-
 enum csr_regs {
         B0_RAP          = 0x0000,
         B0_CTST         = 0x0004,
@@ -1873,6 +1831,7 @@ struct sky2_hw {
         struct net_device    *dev[2];
 
         int                  pm_cap;
+        int                  err_cap;
         u8                   chip_id;
         u8                   chip_rev;
         u8                   pmd_type;