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authorPaul Mackerras <paulus@samba.org>2008-05-16 09:13:42 -0400
committerPaul Mackerras <paulus@samba.org>2008-05-16 09:13:42 -0400
commitfcff474ea5cb17ff015aa40e92ed86fede41f1e2 (patch)
treea99c0e14daaf31cb078812fb2fbc6abadfcd738f /drivers/net/sfc
parent541b2755c2ef7dd2242ac606c115daa11e43ef69 (diff)
parentf26a3988917913b3d11b2bd741601a2c64ab9204 (diff)
Merge branch 'linux-2.6' into powerpc-next
Diffstat (limited to 'drivers/net/sfc')
-rw-r--r--drivers/net/sfc/Makefile4
-rw-r--r--drivers/net/sfc/boards.h2
-rw-r--r--drivers/net/sfc/efx.c4
-rw-r--r--drivers/net/sfc/enum.h49
-rw-r--r--drivers/net/sfc/ethtool.c259
-rw-r--r--drivers/net/sfc/falcon.c8
-rw-r--r--drivers/net/sfc/falcon_hwdefs.h16
-rw-r--r--drivers/net/sfc/falcon_xmac.c82
-rw-r--r--drivers/net/sfc/mdio_10g.c78
-rw-r--r--drivers/net/sfc/mdio_10g.h24
-rw-r--r--drivers/net/sfc/net_driver.h28
-rw-r--r--drivers/net/sfc/rx.c11
-rw-r--r--drivers/net/sfc/selftest.c717
-rw-r--r--drivers/net/sfc/selftest.h50
-rw-r--r--drivers/net/sfc/sfe4001.c14
-rw-r--r--drivers/net/sfc/tenxpress.c91
-rw-r--r--drivers/net/sfc/tx.c664
-rw-r--r--drivers/net/sfc/xfp_phy.c36
18 files changed, 2116 insertions, 21 deletions
diff --git a/drivers/net/sfc/Makefile b/drivers/net/sfc/Makefile
index 0f023447eafd..1d2daeec7ac1 100644
--- a/drivers/net/sfc/Makefile
+++ b/drivers/net/sfc/Makefile
@@ -1,5 +1,5 @@
1sfc-y += efx.o falcon.o tx.o rx.o falcon_xmac.o \ 1sfc-y += efx.o falcon.o tx.o rx.o falcon_xmac.o \
2 i2c-direct.o ethtool.o xfp_phy.o mdio_10g.o \ 2 i2c-direct.o selftest.o ethtool.o xfp_phy.o \
3 tenxpress.o boards.o sfe4001.o 3 mdio_10g.o tenxpress.o boards.o sfe4001.o
4 4
5obj-$(CONFIG_SFC) += sfc.o 5obj-$(CONFIG_SFC) += sfc.o
diff --git a/drivers/net/sfc/boards.h b/drivers/net/sfc/boards.h
index f56341d428e1..695764dc2e64 100644
--- a/drivers/net/sfc/boards.h
+++ b/drivers/net/sfc/boards.h
@@ -22,5 +22,7 @@ enum efx_board_type {
22extern int efx_set_board_info(struct efx_nic *efx, u16 revision_info); 22extern int efx_set_board_info(struct efx_nic *efx, u16 revision_info);
23extern int sfe4001_poweron(struct efx_nic *efx); 23extern int sfe4001_poweron(struct efx_nic *efx);
24extern void sfe4001_poweroff(struct efx_nic *efx); 24extern void sfe4001_poweroff(struct efx_nic *efx);
25/* Are we putting the PHY into flash config mode */
26extern unsigned int sfe4001_phy_flash_cfg;
25 27
26#endif 28#endif
diff --git a/drivers/net/sfc/efx.c b/drivers/net/sfc/efx.c
index 59edcf793c19..418f2e53a95b 100644
--- a/drivers/net/sfc/efx.c
+++ b/drivers/net/sfc/efx.c
@@ -1873,6 +1873,7 @@ static int efx_init_struct(struct efx_nic *efx, struct efx_nic_type *type,
1873 tx_queue->queue = i; 1873 tx_queue->queue = i;
1874 tx_queue->buffer = NULL; 1874 tx_queue->buffer = NULL;
1875 tx_queue->channel = &efx->channel[0]; /* for safety */ 1875 tx_queue->channel = &efx->channel[0]; /* for safety */
1876 tx_queue->tso_headers_free = NULL;
1876 } 1877 }
1877 for (i = 0; i < EFX_MAX_RX_QUEUES; i++) { 1878 for (i = 0; i < EFX_MAX_RX_QUEUES; i++) {
1878 rx_queue = &efx->rx_queue[i]; 1879 rx_queue = &efx->rx_queue[i];
@@ -2071,7 +2072,8 @@ static int __devinit efx_pci_probe(struct pci_dev *pci_dev,
2071 net_dev = alloc_etherdev(sizeof(*efx)); 2072 net_dev = alloc_etherdev(sizeof(*efx));
2072 if (!net_dev) 2073 if (!net_dev)
2073 return -ENOMEM; 2074 return -ENOMEM;
2074 net_dev->features |= NETIF_F_IP_CSUM | NETIF_F_SG | NETIF_F_HIGHDMA; 2075 net_dev->features |= (NETIF_F_IP_CSUM | NETIF_F_SG |
2076 NETIF_F_HIGHDMA | NETIF_F_TSO);
2075 if (lro) 2077 if (lro)
2076 net_dev->features |= NETIF_F_LRO; 2078 net_dev->features |= NETIF_F_LRO;
2077 efx = net_dev->priv; 2079 efx = net_dev->priv;
diff --git a/drivers/net/sfc/enum.h b/drivers/net/sfc/enum.h
index 43663a4619da..c53290d08e2b 100644
--- a/drivers/net/sfc/enum.h
+++ b/drivers/net/sfc/enum.h
@@ -10,6 +10,55 @@
10#ifndef EFX_ENUM_H 10#ifndef EFX_ENUM_H
11#define EFX_ENUM_H 11#define EFX_ENUM_H
12 12
13/**
14 * enum efx_loopback_mode - loopback modes
15 * @LOOPBACK_NONE: no loopback
16 * @LOOPBACK_XGMII: loopback within MAC at XGMII level
17 * @LOOPBACK_XGXS: loopback within MAC at XGXS level
18 * @LOOPBACK_XAUI: loopback within MAC at XAUI level
19 * @LOOPBACK_PHYXS: loopback within PHY at PHYXS level
20 * @LOOPBACK_PCS: loopback within PHY at PCS level
21 * @LOOPBACK_PMAPMD: loopback within PHY at PMAPMD level
22 * @LOOPBACK_NETWORK: reflecting loopback (even further than furthest!)
23 */
24/* Please keep in order and up-to-date w.r.t the following two #defines */
25enum efx_loopback_mode {
26 LOOPBACK_NONE = 0,
27 LOOPBACK_MAC = 1,
28 LOOPBACK_XGMII = 2,
29 LOOPBACK_XGXS = 3,
30 LOOPBACK_XAUI = 4,
31 LOOPBACK_PHY = 5,
32 LOOPBACK_PHYXS = 6,
33 LOOPBACK_PCS = 7,
34 LOOPBACK_PMAPMD = 8,
35 LOOPBACK_NETWORK = 9,
36 LOOPBACK_MAX
37};
38
39#define LOOPBACK_TEST_MAX LOOPBACK_PMAPMD
40
41extern const char *efx_loopback_mode_names[];
42#define LOOPBACK_MODE_NAME(mode) \
43 STRING_TABLE_LOOKUP(mode, efx_loopback_mode)
44#define LOOPBACK_MODE(efx) \
45 LOOPBACK_MODE_NAME(efx->loopback_mode)
46
47/* These loopbacks occur within the controller */
48#define LOOPBACKS_10G_INTERNAL ((1 << LOOPBACK_XGMII)| \
49 (1 << LOOPBACK_XGXS) | \
50 (1 << LOOPBACK_XAUI))
51
52#define LOOPBACK_MASK(_efx) \
53 (1 << (_efx)->loopback_mode)
54
55#define LOOPBACK_INTERNAL(_efx) \
56 ((LOOPBACKS_10G_INTERNAL & LOOPBACK_MASK(_efx)) ? 1 : 0)
57
58#define LOOPBACK_OUT_OF(_from, _to, _mask) \
59 (((LOOPBACK_MASK(_from) & (_mask)) && \
60 ((LOOPBACK_MASK(_to) & (_mask)) == 0)) ? 1 : 0)
61
13/*****************************************************************************/ 62/*****************************************************************************/
14 63
15/** 64/**
diff --git a/drivers/net/sfc/ethtool.c b/drivers/net/sfc/ethtool.c
index ad541badbd98..e2c75d101610 100644
--- a/drivers/net/sfc/ethtool.c
+++ b/drivers/net/sfc/ethtool.c
@@ -12,12 +12,26 @@
12#include <linux/ethtool.h> 12#include <linux/ethtool.h>
13#include <linux/rtnetlink.h> 13#include <linux/rtnetlink.h>
14#include "net_driver.h" 14#include "net_driver.h"
15#include "selftest.h"
15#include "efx.h" 16#include "efx.h"
16#include "ethtool.h" 17#include "ethtool.h"
17#include "falcon.h" 18#include "falcon.h"
18#include "gmii.h" 19#include "gmii.h"
19#include "mac.h" 20#include "mac.h"
20 21
22const char *efx_loopback_mode_names[] = {
23 [LOOPBACK_NONE] = "NONE",
24 [LOOPBACK_MAC] = "MAC",
25 [LOOPBACK_XGMII] = "XGMII",
26 [LOOPBACK_XGXS] = "XGXS",
27 [LOOPBACK_XAUI] = "XAUI",
28 [LOOPBACK_PHY] = "PHY",
29 [LOOPBACK_PHYXS] = "PHY(XS)",
30 [LOOPBACK_PCS] = "PHY(PCS)",
31 [LOOPBACK_PMAPMD] = "PHY(PMAPMD)",
32 [LOOPBACK_NETWORK] = "NETWORK",
33};
34
21static int efx_ethtool_set_tx_csum(struct net_device *net_dev, u32 enable); 35static int efx_ethtool_set_tx_csum(struct net_device *net_dev, u32 enable);
22 36
23struct ethtool_string { 37struct ethtool_string {
@@ -217,23 +231,179 @@ static void efx_ethtool_get_drvinfo(struct net_device *net_dev,
217 strlcpy(info->bus_info, pci_name(efx->pci_dev), sizeof(info->bus_info)); 231 strlcpy(info->bus_info, pci_name(efx->pci_dev), sizeof(info->bus_info));
218} 232}
219 233
234/**
235 * efx_fill_test - fill in an individual self-test entry
236 * @test_index: Index of the test
237 * @strings: Ethtool strings, or %NULL
238 * @data: Ethtool test results, or %NULL
239 * @test: Pointer to test result (used only if data != %NULL)
240 * @unit_format: Unit name format (e.g. "channel\%d")
241 * @unit_id: Unit id (e.g. 0 for "channel0")
242 * @test_format: Test name format (e.g. "loopback.\%s.tx.sent")
243 * @test_id: Test id (e.g. "PHY" for "loopback.PHY.tx_sent")
244 *
245 * Fill in an individual self-test entry.
246 */
247static void efx_fill_test(unsigned int test_index,
248 struct ethtool_string *strings, u64 *data,
249 int *test, const char *unit_format, int unit_id,
250 const char *test_format, const char *test_id)
251{
252 struct ethtool_string unit_str, test_str;
253
254 /* Fill data value, if applicable */
255 if (data)
256 data[test_index] = *test;
257
258 /* Fill string, if applicable */
259 if (strings) {
260 snprintf(unit_str.name, sizeof(unit_str.name),
261 unit_format, unit_id);
262 snprintf(test_str.name, sizeof(test_str.name),
263 test_format, test_id);
264 snprintf(strings[test_index].name,
265 sizeof(strings[test_index].name),
266 "%-9s%-17s", unit_str.name, test_str.name);
267 }
268}
269
270#define EFX_PORT_NAME "port%d", 0
271#define EFX_CHANNEL_NAME(_channel) "channel%d", _channel->channel
272#define EFX_TX_QUEUE_NAME(_tx_queue) "txq%d", _tx_queue->queue
273#define EFX_RX_QUEUE_NAME(_rx_queue) "rxq%d", _rx_queue->queue
274#define EFX_LOOPBACK_NAME(_mode, _counter) \
275 "loopback.%s." _counter, LOOPBACK_MODE_NAME(mode)
276
277/**
278 * efx_fill_loopback_test - fill in a block of loopback self-test entries
279 * @efx: Efx NIC
280 * @lb_tests: Efx loopback self-test results structure
281 * @mode: Loopback test mode
282 * @test_index: Starting index of the test
283 * @strings: Ethtool strings, or %NULL
284 * @data: Ethtool test results, or %NULL
285 */
286static int efx_fill_loopback_test(struct efx_nic *efx,
287 struct efx_loopback_self_tests *lb_tests,
288 enum efx_loopback_mode mode,
289 unsigned int test_index,
290 struct ethtool_string *strings, u64 *data)
291{
292 struct efx_tx_queue *tx_queue;
293
294 efx_for_each_tx_queue(tx_queue, efx) {
295 efx_fill_test(test_index++, strings, data,
296 &lb_tests->tx_sent[tx_queue->queue],
297 EFX_TX_QUEUE_NAME(tx_queue),
298 EFX_LOOPBACK_NAME(mode, "tx_sent"));
299 efx_fill_test(test_index++, strings, data,
300 &lb_tests->tx_done[tx_queue->queue],
301 EFX_TX_QUEUE_NAME(tx_queue),
302 EFX_LOOPBACK_NAME(mode, "tx_done"));
303 }
304 efx_fill_test(test_index++, strings, data,
305 &lb_tests->rx_good,
306 EFX_PORT_NAME,
307 EFX_LOOPBACK_NAME(mode, "rx_good"));
308 efx_fill_test(test_index++, strings, data,
309 &lb_tests->rx_bad,
310 EFX_PORT_NAME,
311 EFX_LOOPBACK_NAME(mode, "rx_bad"));
312
313 return test_index;
314}
315
316/**
317 * efx_ethtool_fill_self_tests - get self-test details
318 * @efx: Efx NIC
319 * @tests: Efx self-test results structure, or %NULL
320 * @strings: Ethtool strings, or %NULL
321 * @data: Ethtool test results, or %NULL
322 */
323static int efx_ethtool_fill_self_tests(struct efx_nic *efx,
324 struct efx_self_tests *tests,
325 struct ethtool_string *strings,
326 u64 *data)
327{
328 struct efx_channel *channel;
329 unsigned int n = 0;
330 enum efx_loopback_mode mode;
331
332 /* Interrupt */
333 efx_fill_test(n++, strings, data, &tests->interrupt,
334 "core", 0, "interrupt", NULL);
335
336 /* Event queues */
337 efx_for_each_channel(channel, efx) {
338 efx_fill_test(n++, strings, data,
339 &tests->eventq_dma[channel->channel],
340 EFX_CHANNEL_NAME(channel),
341 "eventq.dma", NULL);
342 efx_fill_test(n++, strings, data,
343 &tests->eventq_int[channel->channel],
344 EFX_CHANNEL_NAME(channel),
345 "eventq.int", NULL);
346 efx_fill_test(n++, strings, data,
347 &tests->eventq_poll[channel->channel],
348 EFX_CHANNEL_NAME(channel),
349 "eventq.poll", NULL);
350 }
351
352 /* PHY presence */
353 efx_fill_test(n++, strings, data, &tests->phy_ok,
354 EFX_PORT_NAME, "phy_ok", NULL);
355
356 /* Loopback tests */
357 efx_fill_test(n++, strings, data, &tests->loopback_speed,
358 EFX_PORT_NAME, "loopback.speed", NULL);
359 efx_fill_test(n++, strings, data, &tests->loopback_full_duplex,
360 EFX_PORT_NAME, "loopback.full_duplex", NULL);
361 for (mode = LOOPBACK_NONE; mode < LOOPBACK_TEST_MAX; mode++) {
362 if (!(efx->loopback_modes & (1 << mode)))
363 continue;
364 n = efx_fill_loopback_test(efx,
365 &tests->loopback[mode], mode, n,
366 strings, data);
367 }
368
369 return n;
370}
371
220static int efx_ethtool_get_stats_count(struct net_device *net_dev) 372static int efx_ethtool_get_stats_count(struct net_device *net_dev)
221{ 373{
222 return EFX_ETHTOOL_NUM_STATS; 374 return EFX_ETHTOOL_NUM_STATS;
223} 375}
224 376
377static int efx_ethtool_self_test_count(struct net_device *net_dev)
378{
379 struct efx_nic *efx = net_dev->priv;
380
381 return efx_ethtool_fill_self_tests(efx, NULL, NULL, NULL);
382}
383
225static void efx_ethtool_get_strings(struct net_device *net_dev, 384static void efx_ethtool_get_strings(struct net_device *net_dev,
226 u32 string_set, u8 *strings) 385 u32 string_set, u8 *strings)
227{ 386{
387 struct efx_nic *efx = net_dev->priv;
228 struct ethtool_string *ethtool_strings = 388 struct ethtool_string *ethtool_strings =
229 (struct ethtool_string *)strings; 389 (struct ethtool_string *)strings;
230 int i; 390 int i;
231 391
232 if (string_set == ETH_SS_STATS) 392 switch (string_set) {
393 case ETH_SS_STATS:
233 for (i = 0; i < EFX_ETHTOOL_NUM_STATS; i++) 394 for (i = 0; i < EFX_ETHTOOL_NUM_STATS; i++)
234 strncpy(ethtool_strings[i].name, 395 strncpy(ethtool_strings[i].name,
235 efx_ethtool_stats[i].name, 396 efx_ethtool_stats[i].name,
236 sizeof(ethtool_strings[i].name)); 397 sizeof(ethtool_strings[i].name));
398 break;
399 case ETH_SS_TEST:
400 efx_ethtool_fill_self_tests(efx, NULL,
401 ethtool_strings, NULL);
402 break;
403 default:
404 /* No other string sets */
405 break;
406 }
237} 407}
238 408
239static void efx_ethtool_get_stats(struct net_device *net_dev, 409static void efx_ethtool_get_stats(struct net_device *net_dev,
@@ -272,6 +442,22 @@ static void efx_ethtool_get_stats(struct net_device *net_dev,
272 } 442 }
273} 443}
274 444
445static int efx_ethtool_set_tso(struct net_device *net_dev, u32 enable)
446{
447 int rc;
448
449 /* Our TSO requires TX checksumming, so force TX checksumming
450 * on when TSO is enabled.
451 */
452 if (enable) {
453 rc = efx_ethtool_set_tx_csum(net_dev, 1);
454 if (rc)
455 return rc;
456 }
457
458 return ethtool_op_set_tso(net_dev, enable);
459}
460
275static int efx_ethtool_set_tx_csum(struct net_device *net_dev, u32 enable) 461static int efx_ethtool_set_tx_csum(struct net_device *net_dev, u32 enable)
276{ 462{
277 struct efx_nic *efx = net_dev->priv; 463 struct efx_nic *efx = net_dev->priv;
@@ -283,6 +469,15 @@ static int efx_ethtool_set_tx_csum(struct net_device *net_dev, u32 enable)
283 469
284 efx_flush_queues(efx); 470 efx_flush_queues(efx);
285 471
472 /* Our TSO requires TX checksumming, so disable TSO when
473 * checksumming is disabled
474 */
475 if (!enable) {
476 rc = efx_ethtool_set_tso(net_dev, 0);
477 if (rc)
478 return rc;
479 }
480
286 return 0; 481 return 0;
287} 482}
288 483
@@ -305,6 +500,64 @@ static u32 efx_ethtool_get_rx_csum(struct net_device *net_dev)
305 return efx->rx_checksum_enabled; 500 return efx->rx_checksum_enabled;
306} 501}
307 502
503static void efx_ethtool_self_test(struct net_device *net_dev,
504 struct ethtool_test *test, u64 *data)
505{
506 struct efx_nic *efx = net_dev->priv;
507 struct efx_self_tests efx_tests;
508 int offline, already_up;
509 int rc;
510
511 ASSERT_RTNL();
512 if (efx->state != STATE_RUNNING) {
513 rc = -EIO;
514 goto fail1;
515 }
516
517 /* We need rx buffers and interrupts. */
518 already_up = (efx->net_dev->flags & IFF_UP);
519 if (!already_up) {
520 rc = dev_open(efx->net_dev);
521 if (rc) {
522 EFX_ERR(efx, "failed opening device.\n");
523 goto fail2;
524 }
525 }
526
527 memset(&efx_tests, 0, sizeof(efx_tests));
528 offline = (test->flags & ETH_TEST_FL_OFFLINE);
529
530 /* Perform online self tests first */
531 rc = efx_online_test(efx, &efx_tests);
532 if (rc)
533 goto out;
534
535 /* Perform offline tests only if online tests passed */
536 if (offline) {
537 /* Stop the kernel from sending packets during the test. */
538 efx_stop_queue(efx);
539 rc = efx_flush_queues(efx);
540 if (!rc)
541 rc = efx_offline_test(efx, &efx_tests,
542 efx->loopback_modes);
543 efx_wake_queue(efx);
544 }
545
546 out:
547 if (!already_up)
548 dev_close(efx->net_dev);
549
550 EFX_LOG(efx, "%s all %sline self-tests\n",
551 rc == 0 ? "passed" : "failed", offline ? "off" : "on");
552
553 fail2:
554 fail1:
555 /* Fill ethtool results structures */
556 efx_ethtool_fill_self_tests(efx, &efx_tests, NULL, data);
557 if (rc)
558 test->flags |= ETH_TEST_FL_FAILED;
559}
560
308/* Restart autonegotiation */ 561/* Restart autonegotiation */
309static int efx_ethtool_nway_reset(struct net_device *net_dev) 562static int efx_ethtool_nway_reset(struct net_device *net_dev)
310{ 563{
@@ -451,8 +704,12 @@ struct ethtool_ops efx_ethtool_ops = {
451 .set_tx_csum = efx_ethtool_set_tx_csum, 704 .set_tx_csum = efx_ethtool_set_tx_csum,
452 .get_sg = ethtool_op_get_sg, 705 .get_sg = ethtool_op_get_sg,
453 .set_sg = ethtool_op_set_sg, 706 .set_sg = ethtool_op_set_sg,
707 .get_tso = ethtool_op_get_tso,
708 .set_tso = efx_ethtool_set_tso,
454 .get_flags = ethtool_op_get_flags, 709 .get_flags = ethtool_op_get_flags,
455 .set_flags = ethtool_op_set_flags, 710 .set_flags = ethtool_op_set_flags,
711 .self_test_count = efx_ethtool_self_test_count,
712 .self_test = efx_ethtool_self_test,
456 .get_strings = efx_ethtool_get_strings, 713 .get_strings = efx_ethtool_get_strings,
457 .phys_id = efx_ethtool_phys_id, 714 .phys_id = efx_ethtool_phys_id,
458 .get_stats_count = efx_ethtool_get_stats_count, 715 .get_stats_count = efx_ethtool_get_stats_count,
diff --git a/drivers/net/sfc/falcon.c b/drivers/net/sfc/falcon.c
index 46db549ce580..b57cc68058c0 100644
--- a/drivers/net/sfc/falcon.c
+++ b/drivers/net/sfc/falcon.c
@@ -1129,6 +1129,7 @@ static void falcon_handle_driver_event(struct efx_channel *channel,
1129 case RX_RECOVERY_EV_DECODE: 1129 case RX_RECOVERY_EV_DECODE:
1130 EFX_ERR(efx, "channel %d seen DRIVER RX_RESET event. " 1130 EFX_ERR(efx, "channel %d seen DRIVER RX_RESET event. "
1131 "Resetting.\n", channel->channel); 1131 "Resetting.\n", channel->channel);
1132 atomic_inc(&efx->rx_reset);
1132 efx_schedule_reset(efx, 1133 efx_schedule_reset(efx,
1133 EFX_WORKAROUND_6555(efx) ? 1134 EFX_WORKAROUND_6555(efx) ?
1134 RESET_TYPE_RX_RECOVERY : 1135 RESET_TYPE_RX_RECOVERY :
@@ -1731,7 +1732,8 @@ void falcon_drain_tx_fifo(struct efx_nic *efx)
1731 efx_oword_t temp; 1732 efx_oword_t temp;
1732 int count; 1733 int count;
1733 1734
1734 if (FALCON_REV(efx) < FALCON_REV_B0) 1735 if ((FALCON_REV(efx) < FALCON_REV_B0) ||
1736 (efx->loopback_mode != LOOPBACK_NONE))
1735 return; 1737 return;
1736 1738
1737 falcon_read(efx, &temp, MAC0_CTRL_REG_KER); 1739 falcon_read(efx, &temp, MAC0_CTRL_REG_KER);
@@ -2091,6 +2093,8 @@ static int falcon_probe_phy(struct efx_nic *efx)
2091 efx->phy_type); 2093 efx->phy_type);
2092 return -1; 2094 return -1;
2093 } 2095 }
2096
2097 efx->loopback_modes = LOOPBACKS_10G_INTERNAL | efx->phy_op->loopbacks;
2094 return 0; 2098 return 0;
2095} 2099}
2096 2100
@@ -2468,14 +2472,12 @@ int falcon_probe_nic(struct efx_nic *efx)
2468 fail5: 2472 fail5:
2469 falcon_free_buffer(efx, &efx->irq_status); 2473 falcon_free_buffer(efx, &efx->irq_status);
2470 fail4: 2474 fail4:
2471 /* fall-thru */
2472 fail3: 2475 fail3:
2473 if (nic_data->pci_dev2) { 2476 if (nic_data->pci_dev2) {
2474 pci_dev_put(nic_data->pci_dev2); 2477 pci_dev_put(nic_data->pci_dev2);
2475 nic_data->pci_dev2 = NULL; 2478 nic_data->pci_dev2 = NULL;
2476 } 2479 }
2477 fail2: 2480 fail2:
2478 /* fall-thru */
2479 fail1: 2481 fail1:
2480 kfree(efx->nic_data); 2482 kfree(efx->nic_data);
2481 return rc; 2483 return rc;
diff --git a/drivers/net/sfc/falcon_hwdefs.h b/drivers/net/sfc/falcon_hwdefs.h
index 0485a63eaff6..06e2d68fc3d1 100644
--- a/drivers/net/sfc/falcon_hwdefs.h
+++ b/drivers/net/sfc/falcon_hwdefs.h
@@ -636,6 +636,14 @@
636#define XX_HIDRVA_WIDTH 1 636#define XX_HIDRVA_WIDTH 1
637#define XX_LODRVA_LBN 8 637#define XX_LODRVA_LBN 8
638#define XX_LODRVA_WIDTH 1 638#define XX_LODRVA_WIDTH 1
639#define XX_LPBKD_LBN 3
640#define XX_LPBKD_WIDTH 1
641#define XX_LPBKC_LBN 2
642#define XX_LPBKC_WIDTH 1
643#define XX_LPBKB_LBN 1
644#define XX_LPBKB_WIDTH 1
645#define XX_LPBKA_LBN 0
646#define XX_LPBKA_WIDTH 1
639 647
640#define XX_TXDRV_CTL_REG_MAC 0x12 648#define XX_TXDRV_CTL_REG_MAC 0x12
641#define XX_DEQD_LBN 28 649#define XX_DEQD_LBN 28
@@ -656,8 +664,14 @@
656#define XX_DTXA_WIDTH 4 664#define XX_DTXA_WIDTH 4
657 665
658/* XAUI XGXS core status register */ 666/* XAUI XGXS core status register */
659#define XX_FORCE_SIG_DECODE_FORCED 0xff
660#define XX_CORE_STAT_REG_MAC 0x16 667#define XX_CORE_STAT_REG_MAC 0x16
668#define XX_FORCE_SIG_LBN 24
669#define XX_FORCE_SIG_WIDTH 8
670#define XX_FORCE_SIG_DECODE_FORCED 0xff
671#define XX_XGXS_LB_EN_LBN 23
672#define XX_XGXS_LB_EN_WIDTH 1
673#define XX_XGMII_LB_EN_LBN 22
674#define XX_XGMII_LB_EN_WIDTH 1
661#define XX_ALIGN_DONE_LBN 20 675#define XX_ALIGN_DONE_LBN 20
662#define XX_ALIGN_DONE_WIDTH 1 676#define XX_ALIGN_DONE_WIDTH 1
663#define XX_SYNC_STAT_LBN 16 677#define XX_SYNC_STAT_LBN 16
diff --git a/drivers/net/sfc/falcon_xmac.c b/drivers/net/sfc/falcon_xmac.c
index aa7521b24a5d..a74b7931a3c4 100644
--- a/drivers/net/sfc/falcon_xmac.c
+++ b/drivers/net/sfc/falcon_xmac.c
@@ -32,7 +32,7 @@
32 (FALCON_XMAC_REGBANK + ((mac_reg) * FALCON_XMAC_REG_SIZE)) 32 (FALCON_XMAC_REGBANK + ((mac_reg) * FALCON_XMAC_REG_SIZE))
33 33
34void falcon_xmac_writel(struct efx_nic *efx, 34void falcon_xmac_writel(struct efx_nic *efx,
35 efx_dword_t *value, unsigned int mac_reg) 35 efx_dword_t *value, unsigned int mac_reg)
36{ 36{
37 efx_oword_t temp; 37 efx_oword_t temp;
38 38
@@ -69,6 +69,10 @@ static int falcon_reset_xmac(struct efx_nic *efx)
69 udelay(10); 69 udelay(10);
70 } 70 }
71 71
72 /* This often fails when DSP is disabled, ignore it */
73 if (sfe4001_phy_flash_cfg != 0)
74 return 0;
75
72 EFX_ERR(efx, "timed out waiting for XMAC core reset\n"); 76 EFX_ERR(efx, "timed out waiting for XMAC core reset\n");
73 return -ETIMEDOUT; 77 return -ETIMEDOUT;
74} 78}
@@ -223,7 +227,7 @@ static int falcon_xgmii_status(struct efx_nic *efx)
223 /* The ISR latches, so clear it and re-read */ 227 /* The ISR latches, so clear it and re-read */
224 falcon_xmac_readl(efx, &reg, XM_MGT_INT_REG_MAC_B0); 228 falcon_xmac_readl(efx, &reg, XM_MGT_INT_REG_MAC_B0);
225 falcon_xmac_readl(efx, &reg, XM_MGT_INT_REG_MAC_B0); 229 falcon_xmac_readl(efx, &reg, XM_MGT_INT_REG_MAC_B0);
226 230
227 if (EFX_DWORD_FIELD(reg, XM_LCLFLT) || 231 if (EFX_DWORD_FIELD(reg, XM_LCLFLT) ||
228 EFX_DWORD_FIELD(reg, XM_RMTFLT)) { 232 EFX_DWORD_FIELD(reg, XM_RMTFLT)) {
229 EFX_INFO(efx, "MGT_INT: "EFX_DWORD_FMT"\n", EFX_DWORD_VAL(reg)); 233 EFX_INFO(efx, "MGT_INT: "EFX_DWORD_FMT"\n", EFX_DWORD_VAL(reg));
@@ -237,7 +241,7 @@ static void falcon_mask_status_intr(struct efx_nic *efx, int enable)
237{ 241{
238 efx_dword_t reg; 242 efx_dword_t reg;
239 243
240 if (FALCON_REV(efx) < FALCON_REV_B0) 244 if ((FALCON_REV(efx) < FALCON_REV_B0) || LOOPBACK_INTERNAL(efx))
241 return; 245 return;
242 246
243 /* Flush the ISR */ 247 /* Flush the ISR */
@@ -284,6 +288,9 @@ int falcon_xaui_link_ok(struct efx_nic *efx)
284 efx_dword_t reg; 288 efx_dword_t reg;
285 int align_done, sync_status, link_ok = 0; 289 int align_done, sync_status, link_ok = 0;
286 290
291 if (LOOPBACK_INTERNAL(efx))
292 return 1;
293
287 /* Read link status */ 294 /* Read link status */
288 falcon_xmac_readl(efx, &reg, XX_CORE_STAT_REG_MAC); 295 falcon_xmac_readl(efx, &reg, XX_CORE_STAT_REG_MAC);
289 296
@@ -374,6 +381,61 @@ static void falcon_reconfigure_xmac_core(struct efx_nic *efx)
374 falcon_xmac_writel(efx, &reg, XM_ADR_HI_REG_MAC); 381 falcon_xmac_writel(efx, &reg, XM_ADR_HI_REG_MAC);
375} 382}
376 383
384static void falcon_reconfigure_xgxs_core(struct efx_nic *efx)
385{
386 efx_dword_t reg;
387 int xgxs_loopback = (efx->loopback_mode == LOOPBACK_XGXS) ? 1 : 0;
388 int xaui_loopback = (efx->loopback_mode == LOOPBACK_XAUI) ? 1 : 0;
389 int xgmii_loopback =
390 (efx->loopback_mode == LOOPBACK_XGMII) ? 1 : 0;
391
392 /* XGXS block is flaky and will need to be reset if moving
393 * into our out of XGMII, XGXS or XAUI loopbacks. */
394 if (EFX_WORKAROUND_5147(efx)) {
395 int old_xgmii_loopback, old_xgxs_loopback, old_xaui_loopback;
396 int reset_xgxs;
397
398 falcon_xmac_readl(efx, &reg, XX_CORE_STAT_REG_MAC);
399 old_xgxs_loopback = EFX_DWORD_FIELD(reg, XX_XGXS_LB_EN);
400 old_xgmii_loopback = EFX_DWORD_FIELD(reg, XX_XGMII_LB_EN);
401
402 falcon_xmac_readl(efx, &reg, XX_SD_CTL_REG_MAC);
403 old_xaui_loopback = EFX_DWORD_FIELD(reg, XX_LPBKA);
404
405 /* The PHY driver may have turned XAUI off */
406 reset_xgxs = ((xgxs_loopback != old_xgxs_loopback) ||
407 (xaui_loopback != old_xaui_loopback) ||
408 (xgmii_loopback != old_xgmii_loopback));
409 if (reset_xgxs) {
410 falcon_xmac_readl(efx, &reg, XX_PWR_RST_REG_MAC);
411 EFX_SET_DWORD_FIELD(reg, XX_RSTXGXSTX_EN, 1);
412 EFX_SET_DWORD_FIELD(reg, XX_RSTXGXSRX_EN, 1);
413 falcon_xmac_writel(efx, &reg, XX_PWR_RST_REG_MAC);
414 udelay(1);
415 EFX_SET_DWORD_FIELD(reg, XX_RSTXGXSTX_EN, 0);
416 EFX_SET_DWORD_FIELD(reg, XX_RSTXGXSRX_EN, 0);
417 falcon_xmac_writel(efx, &reg, XX_PWR_RST_REG_MAC);
418 udelay(1);
419 }
420 }
421
422 falcon_xmac_readl(efx, &reg, XX_CORE_STAT_REG_MAC);
423 EFX_SET_DWORD_FIELD(reg, XX_FORCE_SIG,
424 (xgxs_loopback || xaui_loopback) ?
425 XX_FORCE_SIG_DECODE_FORCED : 0);
426 EFX_SET_DWORD_FIELD(reg, XX_XGXS_LB_EN, xgxs_loopback);
427 EFX_SET_DWORD_FIELD(reg, XX_XGMII_LB_EN, xgmii_loopback);
428 falcon_xmac_writel(efx, &reg, XX_CORE_STAT_REG_MAC);
429
430 falcon_xmac_readl(efx, &reg, XX_SD_CTL_REG_MAC);
431 EFX_SET_DWORD_FIELD(reg, XX_LPBKD, xaui_loopback);
432 EFX_SET_DWORD_FIELD(reg, XX_LPBKC, xaui_loopback);
433 EFX_SET_DWORD_FIELD(reg, XX_LPBKB, xaui_loopback);
434 EFX_SET_DWORD_FIELD(reg, XX_LPBKA, xaui_loopback);
435 falcon_xmac_writel(efx, &reg, XX_SD_CTL_REG_MAC);
436}
437
438
377/* Try and bring the Falcon side of the Falcon-Phy XAUI link fails 439/* Try and bring the Falcon side of the Falcon-Phy XAUI link fails
378 * to come back up. Bash it until it comes back up */ 440 * to come back up. Bash it until it comes back up */
379static int falcon_check_xaui_link_up(struct efx_nic *efx) 441static int falcon_check_xaui_link_up(struct efx_nic *efx)
@@ -382,7 +444,8 @@ static int falcon_check_xaui_link_up(struct efx_nic *efx)
382 tries = EFX_WORKAROUND_5147(efx) ? 5 : 1; 444 tries = EFX_WORKAROUND_5147(efx) ? 5 : 1;
383 max_tries = tries; 445 max_tries = tries;
384 446
385 if (efx->phy_type == PHY_TYPE_NONE) 447 if ((efx->loopback_mode == LOOPBACK_NETWORK) ||
448 (efx->phy_type == PHY_TYPE_NONE))
386 return 0; 449 return 0;
387 450
388 while (tries) { 451 while (tries) {
@@ -408,8 +471,13 @@ void falcon_reconfigure_xmac(struct efx_nic *efx)
408 falcon_mask_status_intr(efx, 0); 471 falcon_mask_status_intr(efx, 0);
409 472
410 falcon_deconfigure_mac_wrapper(efx); 473 falcon_deconfigure_mac_wrapper(efx);
474
475 efx->tx_disabled = LOOPBACK_INTERNAL(efx);
411 efx->phy_op->reconfigure(efx); 476 efx->phy_op->reconfigure(efx);
477
478 falcon_reconfigure_xgxs_core(efx);
412 falcon_reconfigure_xmac_core(efx); 479 falcon_reconfigure_xmac_core(efx);
480
413 falcon_reconfigure_mac_wrapper(efx); 481 falcon_reconfigure_mac_wrapper(efx);
414 482
415 /* Ensure XAUI link is up */ 483 /* Ensure XAUI link is up */
@@ -491,13 +559,15 @@ void falcon_update_stats_xmac(struct efx_nic *efx)
491 (mac_stats->rx_bytes - mac_stats->rx_good_bytes); 559 (mac_stats->rx_bytes - mac_stats->rx_good_bytes);
492} 560}
493 561
494#define EFX_XAUI_RETRAIN_MAX 8
495
496int falcon_check_xmac(struct efx_nic *efx) 562int falcon_check_xmac(struct efx_nic *efx)
497{ 563{
498 unsigned xaui_link_ok; 564 unsigned xaui_link_ok;
499 int rc; 565 int rc;
500 566
567 if ((efx->loopback_mode == LOOPBACK_NETWORK) ||
568 (efx->phy_type == PHY_TYPE_NONE))
569 return 0;
570
501 falcon_mask_status_intr(efx, 0); 571 falcon_mask_status_intr(efx, 0);
502 xaui_link_ok = falcon_xaui_link_ok(efx); 572 xaui_link_ok = falcon_xaui_link_ok(efx);
503 573
diff --git a/drivers/net/sfc/mdio_10g.c b/drivers/net/sfc/mdio_10g.c
index dc06bb0aa575..c4f540e93b79 100644
--- a/drivers/net/sfc/mdio_10g.c
+++ b/drivers/net/sfc/mdio_10g.c
@@ -44,6 +44,9 @@ static int mdio_clause45_check_mmd(struct efx_nic *efx, int mmd,
44 int status; 44 int status;
45 int phy_id = efx->mii.phy_id; 45 int phy_id = efx->mii.phy_id;
46 46
47 if (LOOPBACK_INTERNAL(efx))
48 return 0;
49
47 /* Read MMD STATUS2 to check it is responding. */ 50 /* Read MMD STATUS2 to check it is responding. */
48 status = mdio_clause45_read(efx, phy_id, mmd, MDIO_MMDREG_STAT2); 51 status = mdio_clause45_read(efx, phy_id, mmd, MDIO_MMDREG_STAT2);
49 if (((status >> MDIO_MMDREG_STAT2_PRESENT_LBN) & 52 if (((status >> MDIO_MMDREG_STAT2_PRESENT_LBN) &
@@ -164,6 +167,22 @@ int mdio_clause45_links_ok(struct efx_nic *efx, unsigned int mmd_mask)
164 int mmd = 0; 167 int mmd = 0;
165 int good; 168 int good;
166 169
170 /* If the port is in loopback, then we should only consider a subset
171 * of mmd's */
172 if (LOOPBACK_INTERNAL(efx))
173 return 1;
174 else if (efx->loopback_mode == LOOPBACK_NETWORK)
175 return 0;
176 else if (efx->loopback_mode == LOOPBACK_PHYXS)
177 mmd_mask &= ~(MDIO_MMDREG_DEVS0_PHYXS |
178 MDIO_MMDREG_DEVS0_PCS |
179 MDIO_MMDREG_DEVS0_PMAPMD);
180 else if (efx->loopback_mode == LOOPBACK_PCS)
181 mmd_mask &= ~(MDIO_MMDREG_DEVS0_PCS |
182 MDIO_MMDREG_DEVS0_PMAPMD);
183 else if (efx->loopback_mode == LOOPBACK_PMAPMD)
184 mmd_mask &= ~MDIO_MMDREG_DEVS0_PMAPMD;
185
167 while (mmd_mask) { 186 while (mmd_mask) {
168 if (mmd_mask & 1) { 187 if (mmd_mask & 1) {
169 /* Double reads because link state is latched, and a 188 /* Double reads because link state is latched, and a
@@ -182,6 +201,65 @@ int mdio_clause45_links_ok(struct efx_nic *efx, unsigned int mmd_mask)
182 return ok; 201 return ok;
183} 202}
184 203
204void mdio_clause45_transmit_disable(struct efx_nic *efx)
205{
206 int phy_id = efx->mii.phy_id;
207 int ctrl1, ctrl2;
208
209 ctrl1 = ctrl2 = mdio_clause45_read(efx, phy_id, MDIO_MMD_PMAPMD,
210 MDIO_MMDREG_TXDIS);
211 if (efx->tx_disabled)
212 ctrl2 |= (1 << MDIO_MMDREG_TXDIS_GLOBAL_LBN);
213 else
214 ctrl1 &= ~(1 << MDIO_MMDREG_TXDIS_GLOBAL_LBN);
215 if (ctrl1 != ctrl2)
216 mdio_clause45_write(efx, phy_id, MDIO_MMD_PMAPMD,
217 MDIO_MMDREG_TXDIS, ctrl2);
218}
219
220void mdio_clause45_phy_reconfigure(struct efx_nic *efx)
221{
222 int phy_id = efx->mii.phy_id;
223 int ctrl1, ctrl2;
224
225 /* Handle (with debouncing) PMA/PMD loopback */
226 ctrl1 = ctrl2 = mdio_clause45_read(efx, phy_id, MDIO_MMD_PMAPMD,
227 MDIO_MMDREG_CTRL1);
228
229 if (efx->loopback_mode == LOOPBACK_PMAPMD)
230 ctrl2 |= (1 << MDIO_PMAPMD_CTRL1_LBACK_LBN);
231 else
232 ctrl2 &= ~(1 << MDIO_PMAPMD_CTRL1_LBACK_LBN);
233
234 if (ctrl1 != ctrl2)
235 mdio_clause45_write(efx, phy_id, MDIO_MMD_PMAPMD,
236 MDIO_MMDREG_CTRL1, ctrl2);
237
238 /* Handle (with debouncing) PCS loopback */
239 ctrl1 = ctrl2 = mdio_clause45_read(efx, phy_id, MDIO_MMD_PCS,
240 MDIO_MMDREG_CTRL1);
241 if (efx->loopback_mode == LOOPBACK_PCS)
242 ctrl2 |= (1 << MDIO_MMDREG_CTRL1_LBACK_LBN);
243 else
244 ctrl2 &= ~(1 << MDIO_MMDREG_CTRL1_LBACK_LBN);
245
246 if (ctrl1 != ctrl2)
247 mdio_clause45_write(efx, phy_id, MDIO_MMD_PCS,
248 MDIO_MMDREG_CTRL1, ctrl2);
249
250 /* Handle (with debouncing) PHYXS network loopback */
251 ctrl1 = ctrl2 = mdio_clause45_read(efx, phy_id, MDIO_MMD_PHYXS,
252 MDIO_MMDREG_CTRL1);
253 if (efx->loopback_mode == LOOPBACK_NETWORK)
254 ctrl2 |= (1 << MDIO_MMDREG_CTRL1_LBACK_LBN);
255 else
256 ctrl2 &= ~(1 << MDIO_MMDREG_CTRL1_LBACK_LBN);
257
258 if (ctrl1 != ctrl2)
259 mdio_clause45_write(efx, phy_id, MDIO_MMD_PHYXS,
260 MDIO_MMDREG_CTRL1, ctrl2);
261}
262
185/** 263/**
186 * mdio_clause45_get_settings - Read (some of) the PHY settings over MDIO. 264 * mdio_clause45_get_settings - Read (some of) the PHY settings over MDIO.
187 * @efx: Efx NIC 265 * @efx: Efx NIC
diff --git a/drivers/net/sfc/mdio_10g.h b/drivers/net/sfc/mdio_10g.h
index 2214b6d820a7..cb99f3f4491c 100644
--- a/drivers/net/sfc/mdio_10g.h
+++ b/drivers/net/sfc/mdio_10g.h
@@ -44,11 +44,16 @@
44#define MDIO_MMDREG_DEVS1 (6) 44#define MDIO_MMDREG_DEVS1 (6)
45#define MDIO_MMDREG_CTRL2 (7) 45#define MDIO_MMDREG_CTRL2 (7)
46#define MDIO_MMDREG_STAT2 (8) 46#define MDIO_MMDREG_STAT2 (8)
47#define MDIO_MMDREG_TXDIS (9)
47 48
48/* Bits in MMDREG_CTRL1 */ 49/* Bits in MMDREG_CTRL1 */
49/* Reset */ 50/* Reset */
50#define MDIO_MMDREG_CTRL1_RESET_LBN (15) 51#define MDIO_MMDREG_CTRL1_RESET_LBN (15)
51#define MDIO_MMDREG_CTRL1_RESET_WIDTH (1) 52#define MDIO_MMDREG_CTRL1_RESET_WIDTH (1)
53/* Loopback */
54/* Loopback bit for WIS, PCS, PHYSX and DTEXS */
55#define MDIO_MMDREG_CTRL1_LBACK_LBN (14)
56#define MDIO_MMDREG_CTRL1_LBACK_WIDTH (1)
52 57
53/* Bits in MMDREG_STAT1 */ 58/* Bits in MMDREG_STAT1 */
54#define MDIO_MMDREG_STAT1_FAULT_LBN (7) 59#define MDIO_MMDREG_STAT1_FAULT_LBN (7)
@@ -56,6 +61,9 @@
56/* Link state */ 61/* Link state */
57#define MDIO_MMDREG_STAT1_LINK_LBN (2) 62#define MDIO_MMDREG_STAT1_LINK_LBN (2)
58#define MDIO_MMDREG_STAT1_LINK_WIDTH (1) 63#define MDIO_MMDREG_STAT1_LINK_WIDTH (1)
64/* Low power ability */
65#define MDIO_MMDREG_STAT1_LPABLE_LBN (1)
66#define MDIO_MMDREG_STAT1_LPABLE_WIDTH (1)
59 67
60/* Bits in ID reg */ 68/* Bits in ID reg */
61#define MDIO_ID_REV(_id32) (_id32 & 0xf) 69#define MDIO_ID_REV(_id32) (_id32 & 0xf)
@@ -76,6 +84,14 @@
76#define MDIO_MMDREG_STAT2_PRESENT_LBN (14) 84#define MDIO_MMDREG_STAT2_PRESENT_LBN (14)
77#define MDIO_MMDREG_STAT2_PRESENT_WIDTH (2) 85#define MDIO_MMDREG_STAT2_PRESENT_WIDTH (2)
78 86
87/* Bits in MMDREG_TXDIS */
88#define MDIO_MMDREG_TXDIS_GLOBAL_LBN (0)
89#define MDIO_MMDREG_TXDIS_GLOBAL_WIDTH (1)
90
91/* MMD-specific bits, ordered by MMD, then register */
92#define MDIO_PMAPMD_CTRL1_LBACK_LBN (0)
93#define MDIO_PMAPMD_CTRL1_LBACK_WIDTH (1)
94
79/* PMA type (4 bits) */ 95/* PMA type (4 bits) */
80#define MDIO_PMAPMD_CTRL2_10G_CX4 (0x0) 96#define MDIO_PMAPMD_CTRL2_10G_CX4 (0x0)
81#define MDIO_PMAPMD_CTRL2_10G_EW (0x1) 97#define MDIO_PMAPMD_CTRL2_10G_EW (0x1)
@@ -95,7 +111,7 @@
95#define MDIO_PMAPMD_CTRL2_10_BT (0xf) 111#define MDIO_PMAPMD_CTRL2_10_BT (0xf)
96#define MDIO_PMAPMD_CTRL2_TYPE_MASK (0xf) 112#define MDIO_PMAPMD_CTRL2_TYPE_MASK (0xf)
97 113
98/* /\* PHY XGXS lane state *\/ */ 114/* PHY XGXS lane state */
99#define MDIO_PHYXS_LANE_STATE (0x18) 115#define MDIO_PHYXS_LANE_STATE (0x18)
100#define MDIO_PHYXS_LANE_ALIGNED_LBN (12) 116#define MDIO_PHYXS_LANE_ALIGNED_LBN (12)
101 117
@@ -217,6 +233,12 @@ int mdio_clause45_check_mmds(struct efx_nic *efx,
217extern int mdio_clause45_links_ok(struct efx_nic *efx, 233extern int mdio_clause45_links_ok(struct efx_nic *efx,
218 unsigned int mmd_mask); 234 unsigned int mmd_mask);
219 235
236/* Generic transmit disable support though PMAPMD */
237extern void mdio_clause45_transmit_disable(struct efx_nic *efx);
238
239/* Generic part of reconfigure: set/clear loopback bits */
240extern void mdio_clause45_phy_reconfigure(struct efx_nic *efx);
241
220/* Read (some of) the PHY settings over MDIO */ 242/* Read (some of) the PHY settings over MDIO */
221extern void mdio_clause45_get_settings(struct efx_nic *efx, 243extern void mdio_clause45_get_settings(struct efx_nic *efx,
222 struct ethtool_cmd *ecmd); 244 struct ethtool_cmd *ecmd);
diff --git a/drivers/net/sfc/net_driver.h b/drivers/net/sfc/net_driver.h
index c505482c2520..59f261b4171f 100644
--- a/drivers/net/sfc/net_driver.h
+++ b/drivers/net/sfc/net_driver.h
@@ -134,6 +134,8 @@ struct efx_special_buffer {
134 * Set only on the final fragment of a packet; %NULL for all other 134 * Set only on the final fragment of a packet; %NULL for all other
135 * fragments. When this fragment completes, then we can free this 135 * fragments. When this fragment completes, then we can free this
136 * skb. 136 * skb.
137 * @tsoh: The associated TSO header structure, or %NULL if this
138 * buffer is not a TSO header.
137 * @dma_addr: DMA address of the fragment. 139 * @dma_addr: DMA address of the fragment.
138 * @len: Length of this fragment. 140 * @len: Length of this fragment.
139 * This field is zero when the queue slot is empty. 141 * This field is zero when the queue slot is empty.
@@ -144,6 +146,7 @@ struct efx_special_buffer {
144 */ 146 */
145struct efx_tx_buffer { 147struct efx_tx_buffer {
146 const struct sk_buff *skb; 148 const struct sk_buff *skb;
149 struct efx_tso_header *tsoh;
147 dma_addr_t dma_addr; 150 dma_addr_t dma_addr;
148 unsigned short len; 151 unsigned short len;
149 unsigned char continuation; 152 unsigned char continuation;
@@ -187,6 +190,13 @@ struct efx_tx_buffer {
187 * variable indicates that the queue is full. This is to 190 * variable indicates that the queue is full. This is to
188 * avoid cache-line ping-pong between the xmit path and the 191 * avoid cache-line ping-pong between the xmit path and the
189 * completion path. 192 * completion path.
193 * @tso_headers_free: A list of TSO headers allocated for this TX queue
194 * that are not in use, and so available for new TSO sends. The list
195 * is protected by the TX queue lock.
196 * @tso_bursts: Number of times TSO xmit invoked by kernel
197 * @tso_long_headers: Number of packets with headers too long for standard
198 * blocks
199 * @tso_packets: Number of packets via the TSO xmit path
190 */ 200 */
191struct efx_tx_queue { 201struct efx_tx_queue {
192 /* Members which don't change on the fast path */ 202 /* Members which don't change on the fast path */
@@ -206,6 +216,10 @@ struct efx_tx_queue {
206 unsigned int insert_count ____cacheline_aligned_in_smp; 216 unsigned int insert_count ____cacheline_aligned_in_smp;
207 unsigned int write_count; 217 unsigned int write_count;
208 unsigned int old_read_count; 218 unsigned int old_read_count;
219 struct efx_tso_header *tso_headers_free;
220 unsigned int tso_bursts;
221 unsigned int tso_long_headers;
222 unsigned int tso_packets;
209}; 223};
210 224
211/** 225/**
@@ -434,6 +448,9 @@ struct efx_board {
434 struct efx_blinker blinker; 448 struct efx_blinker blinker;
435}; 449};
436 450
451#define STRING_TABLE_LOOKUP(val, member) \
452 member ## _names[val]
453
437enum efx_int_mode { 454enum efx_int_mode {
438 /* Be careful if altering to correct macro below */ 455 /* Be careful if altering to correct macro below */
439 EFX_INT_MODE_MSIX = 0, 456 EFX_INT_MODE_MSIX = 0,
@@ -506,6 +523,7 @@ enum efx_fc_type {
506 * @check_hw: Check hardware 523 * @check_hw: Check hardware
507 * @reset_xaui: Reset XAUI side of PHY for (software sequenced reset) 524 * @reset_xaui: Reset XAUI side of PHY for (software sequenced reset)
508 * @mmds: MMD presence mask 525 * @mmds: MMD presence mask
526 * @loopbacks: Supported loopback modes mask
509 */ 527 */
510struct efx_phy_operations { 528struct efx_phy_operations {
511 int (*init) (struct efx_nic *efx); 529 int (*init) (struct efx_nic *efx);
@@ -515,6 +533,7 @@ struct efx_phy_operations {
515 int (*check_hw) (struct efx_nic *efx); 533 int (*check_hw) (struct efx_nic *efx);
516 void (*reset_xaui) (struct efx_nic *efx); 534 void (*reset_xaui) (struct efx_nic *efx);
517 int mmds; 535 int mmds;
536 unsigned loopbacks;
518}; 537};
519 538
520/* 539/*
@@ -653,7 +672,6 @@ union efx_multicast_hash {
653 * @phy_op: PHY interface 672 * @phy_op: PHY interface
654 * @phy_data: PHY private data (including PHY-specific stats) 673 * @phy_data: PHY private data (including PHY-specific stats)
655 * @mii: PHY interface 674 * @mii: PHY interface
656 * @phy_powered: PHY power state
657 * @tx_disabled: PHY transmitter turned off 675 * @tx_disabled: PHY transmitter turned off
658 * @link_up: Link status 676 * @link_up: Link status
659 * @link_options: Link options (MII/GMII format) 677 * @link_options: Link options (MII/GMII format)
@@ -662,6 +680,9 @@ union efx_multicast_hash {
662 * @multicast_hash: Multicast hash table 680 * @multicast_hash: Multicast hash table
663 * @flow_control: Flow control flags - separate RX/TX so can't use link_options 681 * @flow_control: Flow control flags - separate RX/TX so can't use link_options
664 * @reconfigure_work: work item for dealing with PHY events 682 * @reconfigure_work: work item for dealing with PHY events
683 * @loopback_mode: Loopback status
684 * @loopback_modes: Supported loopback mode bitmask
685 * @loopback_selftest: Offline self-test private state
665 * 686 *
666 * The @priv field of the corresponding &struct net_device points to 687 * The @priv field of the corresponding &struct net_device points to
667 * this. 688 * this.
@@ -721,6 +742,7 @@ struct efx_nic {
721 struct efx_phy_operations *phy_op; 742 struct efx_phy_operations *phy_op;
722 void *phy_data; 743 void *phy_data;
723 struct mii_if_info mii; 744 struct mii_if_info mii;
745 unsigned tx_disabled;
724 746
725 int link_up; 747 int link_up;
726 unsigned int link_options; 748 unsigned int link_options;
@@ -732,6 +754,10 @@ struct efx_nic {
732 struct work_struct reconfigure_work; 754 struct work_struct reconfigure_work;
733 755
734 atomic_t rx_reset; 756 atomic_t rx_reset;
757 enum efx_loopback_mode loopback_mode;
758 unsigned int loopback_modes;
759
760 void *loopback_selftest;
735}; 761};
736 762
737/** 763/**
diff --git a/drivers/net/sfc/rx.c b/drivers/net/sfc/rx.c
index 551299b462ae..670622373ddf 100644
--- a/drivers/net/sfc/rx.c
+++ b/drivers/net/sfc/rx.c
@@ -19,6 +19,7 @@
19#include "rx.h" 19#include "rx.h"
20#include "efx.h" 20#include "efx.h"
21#include "falcon.h" 21#include "falcon.h"
22#include "selftest.h"
22#include "workarounds.h" 23#include "workarounds.h"
23 24
24/* Number of RX descriptors pushed at once. */ 25/* Number of RX descriptors pushed at once. */
@@ -683,6 +684,15 @@ void __efx_rx_packet(struct efx_channel *channel,
683 struct sk_buff *skb; 684 struct sk_buff *skb;
684 int lro = efx->net_dev->features & NETIF_F_LRO; 685 int lro = efx->net_dev->features & NETIF_F_LRO;
685 686
687 /* If we're in loopback test, then pass the packet directly to the
688 * loopback layer, and free the rx_buf here
689 */
690 if (unlikely(efx->loopback_selftest)) {
691 efx_loopback_rx_packet(efx, rx_buf->data, rx_buf->len);
692 efx_free_rx_buffer(efx, rx_buf);
693 goto done;
694 }
695
686 if (rx_buf->skb) { 696 if (rx_buf->skb) {
687 prefetch(skb_shinfo(rx_buf->skb)); 697 prefetch(skb_shinfo(rx_buf->skb));
688 698
@@ -736,7 +746,6 @@ void __efx_rx_packet(struct efx_channel *channel,
736 /* Update allocation strategy method */ 746 /* Update allocation strategy method */
737 channel->rx_alloc_level += RX_ALLOC_FACTOR_SKB; 747 channel->rx_alloc_level += RX_ALLOC_FACTOR_SKB;
738 748
739 /* fall-thru */
740done: 749done:
741 efx->net_dev->last_rx = jiffies; 750 efx->net_dev->last_rx = jiffies;
742} 751}
diff --git a/drivers/net/sfc/selftest.c b/drivers/net/sfc/selftest.c
new file mode 100644
index 000000000000..cbda15946e8f
--- /dev/null
+++ b/drivers/net/sfc/selftest.c
@@ -0,0 +1,717 @@
1/****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2006-2008 Solarflare Communications Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
9 */
10
11#include <linux/netdevice.h>
12#include <linux/module.h>
13#include <linux/delay.h>
14#include <linux/kernel_stat.h>
15#include <linux/pci.h>
16#include <linux/ethtool.h>
17#include <linux/ip.h>
18#include <linux/in.h>
19#include <linux/udp.h>
20#include <linux/rtnetlink.h>
21#include <asm/io.h>
22#include "net_driver.h"
23#include "ethtool.h"
24#include "efx.h"
25#include "falcon.h"
26#include "selftest.h"
27#include "boards.h"
28#include "workarounds.h"
29#include "mac.h"
30
31/*
32 * Loopback test packet structure
33 *
34 * The self-test should stress every RSS vector, and unfortunately
35 * Falcon only performs RSS on TCP/UDP packets.
36 */
37struct efx_loopback_payload {
38 struct ethhdr header;
39 struct iphdr ip;
40 struct udphdr udp;
41 __be16 iteration;
42 const char msg[64];
43} __attribute__ ((packed));
44
45/* Loopback test source MAC address */
46static const unsigned char payload_source[ETH_ALEN] = {
47 0x00, 0x0f, 0x53, 0x1b, 0x1b, 0x1b,
48};
49
50static const char *payload_msg =
51 "Hello world! This is an Efx loopback test in progress!";
52
53/**
54 * efx_selftest_state - persistent state during a selftest
55 * @flush: Drop all packets in efx_loopback_rx_packet
56 * @packet_count: Number of packets being used in this test
57 * @skbs: An array of skbs transmitted
58 * @rx_good: RX good packet count
59 * @rx_bad: RX bad packet count
60 * @payload: Payload used in tests
61 */
62struct efx_selftest_state {
63 int flush;
64 int packet_count;
65 struct sk_buff **skbs;
66 atomic_t rx_good;
67 atomic_t rx_bad;
68 struct efx_loopback_payload payload;
69};
70
71/**************************************************************************
72 *
73 * Configurable values
74 *
75 **************************************************************************/
76
77/* Level of loopback testing
78 *
79 * The maximum packet burst length is 16**(n-1), i.e.
80 *
81 * - Level 0 : no packets
82 * - Level 1 : 1 packet
83 * - Level 2 : 17 packets (1 * 1 packet, 1 * 16 packets)
84 * - Level 3 : 273 packets (1 * 1 packet, 1 * 16 packet, 1 * 256 packets)
85 *
86 */
87static unsigned int loopback_test_level = 3;
88
89/**************************************************************************
90 *
91 * Interrupt and event queue testing
92 *
93 **************************************************************************/
94
95/* Test generation and receipt of interrupts */
96static int efx_test_interrupts(struct efx_nic *efx,
97 struct efx_self_tests *tests)
98{
99 struct efx_channel *channel;
100
101 EFX_LOG(efx, "testing interrupts\n");
102 tests->interrupt = -1;
103
104 /* Reset interrupt flag */
105 efx->last_irq_cpu = -1;
106 smp_wmb();
107
108 /* ACK each interrupting event queue. Receiving an interrupt due to
109 * traffic before a test event is raised is considered a pass */
110 efx_for_each_channel_with_interrupt(channel, efx) {
111 if (channel->work_pending)
112 efx_process_channel_now(channel);
113 if (efx->last_irq_cpu >= 0)
114 goto success;
115 }
116
117 falcon_generate_interrupt(efx);
118
119 /* Wait for arrival of test interrupt. */
120 EFX_LOG(efx, "waiting for test interrupt\n");
121 schedule_timeout_uninterruptible(HZ / 10);
122 if (efx->last_irq_cpu >= 0)
123 goto success;
124
125 EFX_ERR(efx, "timed out waiting for interrupt\n");
126 return -ETIMEDOUT;
127
128 success:
129 EFX_LOG(efx, "test interrupt (mode %d) seen on CPU%d\n",
130 efx->interrupt_mode, efx->last_irq_cpu);
131 tests->interrupt = 1;
132 return 0;
133}
134
135/* Test generation and receipt of non-interrupting events */
136static int efx_test_eventq(struct efx_channel *channel,
137 struct efx_self_tests *tests)
138{
139 unsigned int magic;
140
141 /* Channel specific code, limited to 20 bits */
142 magic = (0x00010150 + channel->channel);
143 EFX_LOG(channel->efx, "channel %d testing event queue with code %x\n",
144 channel->channel, magic);
145
146 tests->eventq_dma[channel->channel] = -1;
147 tests->eventq_int[channel->channel] = 1; /* fake pass */
148 tests->eventq_poll[channel->channel] = 1; /* fake pass */
149
150 /* Reset flag and zero magic word */
151 channel->efx->last_irq_cpu = -1;
152 channel->eventq_magic = 0;
153 smp_wmb();
154
155 falcon_generate_test_event(channel, magic);
156 udelay(1);
157
158 efx_process_channel_now(channel);
159 if (channel->eventq_magic != magic) {
160 EFX_ERR(channel->efx, "channel %d failed to see test event\n",
161 channel->channel);
162 return -ETIMEDOUT;
163 } else {
164 tests->eventq_dma[channel->channel] = 1;
165 }
166
167 return 0;
168}
169
170/* Test generation and receipt of interrupting events */
171static int efx_test_eventq_irq(struct efx_channel *channel,
172 struct efx_self_tests *tests)
173{
174 unsigned int magic, count;
175
176 /* Channel specific code, limited to 20 bits */
177 magic = (0x00010150 + channel->channel);
178 EFX_LOG(channel->efx, "channel %d testing event queue with code %x\n",
179 channel->channel, magic);
180
181 tests->eventq_dma[channel->channel] = -1;
182 tests->eventq_int[channel->channel] = -1;
183 tests->eventq_poll[channel->channel] = -1;
184
185 /* Reset flag and zero magic word */
186 channel->efx->last_irq_cpu = -1;
187 channel->eventq_magic = 0;
188 smp_wmb();
189
190 falcon_generate_test_event(channel, magic);
191
192 /* Wait for arrival of interrupt */
193 count = 0;
194 do {
195 schedule_timeout_uninterruptible(HZ / 100);
196
197 if (channel->work_pending)
198 efx_process_channel_now(channel);
199
200 if (channel->eventq_magic == magic)
201 goto eventq_ok;
202 } while (++count < 2);
203
204 EFX_ERR(channel->efx, "channel %d timed out waiting for event queue\n",
205 channel->channel);
206
207 /* See if interrupt arrived */
208 if (channel->efx->last_irq_cpu >= 0) {
209 EFX_ERR(channel->efx, "channel %d saw interrupt on CPU%d "
210 "during event queue test\n", channel->channel,
211 raw_smp_processor_id());
212 tests->eventq_int[channel->channel] = 1;
213 }
214
215 /* Check to see if event was received even if interrupt wasn't */
216 efx_process_channel_now(channel);
217 if (channel->eventq_magic == magic) {
218 EFX_ERR(channel->efx, "channel %d event was generated, but "
219 "failed to trigger an interrupt\n", channel->channel);
220 tests->eventq_dma[channel->channel] = 1;
221 }
222
223 return -ETIMEDOUT;
224 eventq_ok:
225 EFX_LOG(channel->efx, "channel %d event queue passed\n",
226 channel->channel);
227 tests->eventq_dma[channel->channel] = 1;
228 tests->eventq_int[channel->channel] = 1;
229 tests->eventq_poll[channel->channel] = 1;
230 return 0;
231}
232
233/**************************************************************************
234 *
235 * PHY testing
236 *
237 **************************************************************************/
238
239/* Check PHY presence by reading the PHY ID registers */
240static int efx_test_phy(struct efx_nic *efx,
241 struct efx_self_tests *tests)
242{
243 u16 physid1, physid2;
244 struct mii_if_info *mii = &efx->mii;
245 struct net_device *net_dev = efx->net_dev;
246
247 if (efx->phy_type == PHY_TYPE_NONE)
248 return 0;
249
250 EFX_LOG(efx, "testing PHY presence\n");
251 tests->phy_ok = -1;
252
253 physid1 = mii->mdio_read(net_dev, mii->phy_id, MII_PHYSID1);
254 physid2 = mii->mdio_read(net_dev, mii->phy_id, MII_PHYSID2);
255
256 if ((physid1 != 0x0000) && (physid1 != 0xffff) &&
257 (physid2 != 0x0000) && (physid2 != 0xffff)) {
258 EFX_LOG(efx, "found MII PHY %d ID 0x%x:%x\n",
259 mii->phy_id, physid1, physid2);
260 tests->phy_ok = 1;
261 return 0;
262 }
263
264 EFX_ERR(efx, "no MII PHY present with ID %d\n", mii->phy_id);
265 return -ENODEV;
266}
267
268/**************************************************************************
269 *
270 * Loopback testing
271 * NB Only one loopback test can be executing concurrently.
272 *
273 **************************************************************************/
274
275/* Loopback test RX callback
276 * This is called for each received packet during loopback testing.
277 */
278void efx_loopback_rx_packet(struct efx_nic *efx,
279 const char *buf_ptr, int pkt_len)
280{
281 struct efx_selftest_state *state = efx->loopback_selftest;
282 struct efx_loopback_payload *received;
283 struct efx_loopback_payload *payload;
284
285 BUG_ON(!buf_ptr);
286
287 /* If we are just flushing, then drop the packet */
288 if ((state == NULL) || state->flush)
289 return;
290
291 payload = &state->payload;
292
293 received = (struct efx_loopback_payload *)(char *) buf_ptr;
294 received->ip.saddr = payload->ip.saddr;
295 received->ip.check = payload->ip.check;
296
297 /* Check that header exists */
298 if (pkt_len < sizeof(received->header)) {
299 EFX_ERR(efx, "saw runt RX packet (length %d) in %s loopback "
300 "test\n", pkt_len, LOOPBACK_MODE(efx));
301 goto err;
302 }
303
304 /* Check that the ethernet header exists */
305 if (memcmp(&received->header, &payload->header, ETH_HLEN) != 0) {
306 EFX_ERR(efx, "saw non-loopback RX packet in %s loopback test\n",
307 LOOPBACK_MODE(efx));
308 goto err;
309 }
310
311 /* Check packet length */
312 if (pkt_len != sizeof(*payload)) {
313 EFX_ERR(efx, "saw incorrect RX packet length %d (wanted %d) in "
314 "%s loopback test\n", pkt_len, (int)sizeof(*payload),
315 LOOPBACK_MODE(efx));
316 goto err;
317 }
318
319 /* Check that IP header matches */
320 if (memcmp(&received->ip, &payload->ip, sizeof(payload->ip)) != 0) {
321 EFX_ERR(efx, "saw corrupted IP header in %s loopback test\n",
322 LOOPBACK_MODE(efx));
323 goto err;
324 }
325
326 /* Check that msg and padding matches */
327 if (memcmp(&received->msg, &payload->msg, sizeof(received->msg)) != 0) {
328 EFX_ERR(efx, "saw corrupted RX packet in %s loopback test\n",
329 LOOPBACK_MODE(efx));
330 goto err;
331 }
332
333 /* Check that iteration matches */
334 if (received->iteration != payload->iteration) {
335 EFX_ERR(efx, "saw RX packet from iteration %d (wanted %d) in "
336 "%s loopback test\n", ntohs(received->iteration),
337 ntohs(payload->iteration), LOOPBACK_MODE(efx));
338 goto err;
339 }
340
341 /* Increase correct RX count */
342 EFX_TRACE(efx, "got loopback RX in %s loopback test\n",
343 LOOPBACK_MODE(efx));
344
345 atomic_inc(&state->rx_good);
346 return;
347
348 err:
349#ifdef EFX_ENABLE_DEBUG
350 if (atomic_read(&state->rx_bad) == 0) {
351 EFX_ERR(efx, "received packet:\n");
352 print_hex_dump(KERN_ERR, "", DUMP_PREFIX_OFFSET, 0x10, 1,
353 buf_ptr, pkt_len, 0);
354 EFX_ERR(efx, "expected packet:\n");
355 print_hex_dump(KERN_ERR, "", DUMP_PREFIX_OFFSET, 0x10, 1,
356 &state->payload, sizeof(state->payload), 0);
357 }
358#endif
359 atomic_inc(&state->rx_bad);
360}
361
362/* Initialise an efx_selftest_state for a new iteration */
363static void efx_iterate_state(struct efx_nic *efx)
364{
365 struct efx_selftest_state *state = efx->loopback_selftest;
366 struct net_device *net_dev = efx->net_dev;
367 struct efx_loopback_payload *payload = &state->payload;
368
369 /* Initialise the layerII header */
370 memcpy(&payload->header.h_dest, net_dev->dev_addr, ETH_ALEN);
371 memcpy(&payload->header.h_source, &payload_source, ETH_ALEN);
372 payload->header.h_proto = htons(ETH_P_IP);
373
374 /* saddr set later and used as incrementing count */
375 payload->ip.daddr = htonl(INADDR_LOOPBACK);
376 payload->ip.ihl = 5;
377 payload->ip.check = htons(0xdead);
378 payload->ip.tot_len = htons(sizeof(*payload) - sizeof(struct ethhdr));
379 payload->ip.version = IPVERSION;
380 payload->ip.protocol = IPPROTO_UDP;
381
382 /* Initialise udp header */
383 payload->udp.source = 0;
384 payload->udp.len = htons(sizeof(*payload) - sizeof(struct ethhdr) -
385 sizeof(struct iphdr));
386 payload->udp.check = 0; /* checksum ignored */
387
388 /* Fill out payload */
389 payload->iteration = htons(ntohs(payload->iteration) + 1);
390 memcpy(&payload->msg, payload_msg, sizeof(payload_msg));
391
392 /* Fill out remaining state members */
393 atomic_set(&state->rx_good, 0);
394 atomic_set(&state->rx_bad, 0);
395 smp_wmb();
396}
397
398static int efx_tx_loopback(struct efx_tx_queue *tx_queue)
399{
400 struct efx_nic *efx = tx_queue->efx;
401 struct efx_selftest_state *state = efx->loopback_selftest;
402 struct efx_loopback_payload *payload;
403 struct sk_buff *skb;
404 int i, rc;
405
406 /* Transmit N copies of buffer */
407 for (i = 0; i < state->packet_count; i++) {
408 /* Allocate an skb, holding an extra reference for
409 * transmit completion counting */
410 skb = alloc_skb(sizeof(state->payload), GFP_KERNEL);
411 if (!skb)
412 return -ENOMEM;
413 state->skbs[i] = skb;
414 skb_get(skb);
415
416 /* Copy the payload in, incrementing the source address to
417 * exercise the rss vectors */
418 payload = ((struct efx_loopback_payload *)
419 skb_put(skb, sizeof(state->payload)));
420 memcpy(payload, &state->payload, sizeof(state->payload));
421 payload->ip.saddr = htonl(INADDR_LOOPBACK | (i << 2));
422
423 /* Ensure everything we've written is visible to the
424 * interrupt handler. */
425 smp_wmb();
426
427 if (NET_DEV_REGISTERED(efx))
428 netif_tx_lock_bh(efx->net_dev);
429 rc = efx_xmit(efx, tx_queue, skb);
430 if (NET_DEV_REGISTERED(efx))
431 netif_tx_unlock_bh(efx->net_dev);
432
433 if (rc != NETDEV_TX_OK) {
434 EFX_ERR(efx, "TX queue %d could not transmit packet %d "
435 "of %d in %s loopback test\n", tx_queue->queue,
436 i + 1, state->packet_count, LOOPBACK_MODE(efx));
437
438 /* Defer cleaning up the other skbs for the caller */
439 kfree_skb(skb);
440 return -EPIPE;
441 }
442 }
443
444 return 0;
445}
446
447static int efx_rx_loopback(struct efx_tx_queue *tx_queue,
448 struct efx_loopback_self_tests *lb_tests)
449{
450 struct efx_nic *efx = tx_queue->efx;
451 struct efx_selftest_state *state = efx->loopback_selftest;
452 struct sk_buff *skb;
453 int tx_done = 0, rx_good, rx_bad;
454 int i, rc = 0;
455
456 if (NET_DEV_REGISTERED(efx))
457 netif_tx_lock_bh(efx->net_dev);
458
459 /* Count the number of tx completions, and decrement the refcnt. Any
460 * skbs not already completed will be free'd when the queue is flushed */
461 for (i=0; i < state->packet_count; i++) {
462 skb = state->skbs[i];
463 if (skb && !skb_shared(skb))
464 ++tx_done;
465 dev_kfree_skb_any(skb);
466 }
467
468 if (NET_DEV_REGISTERED(efx))
469 netif_tx_unlock_bh(efx->net_dev);
470
471 /* Check TX completion and received packet counts */
472 rx_good = atomic_read(&state->rx_good);
473 rx_bad = atomic_read(&state->rx_bad);
474 if (tx_done != state->packet_count) {
475 /* Don't free the skbs; they will be picked up on TX
476 * overflow or channel teardown.
477 */
478 EFX_ERR(efx, "TX queue %d saw only %d out of an expected %d "
479 "TX completion events in %s loopback test\n",
480 tx_queue->queue, tx_done, state->packet_count,
481 LOOPBACK_MODE(efx));
482 rc = -ETIMEDOUT;
483 /* Allow to fall through so we see the RX errors as well */
484 }
485
486 /* We may always be up to a flush away from our desired packet total */
487 if (rx_good != state->packet_count) {
488 EFX_LOG(efx, "TX queue %d saw only %d out of an expected %d "
489 "received packets in %s loopback test\n",
490 tx_queue->queue, rx_good, state->packet_count,
491 LOOPBACK_MODE(efx));
492 rc = -ETIMEDOUT;
493 /* Fall through */
494 }
495
496 /* Update loopback test structure */
497 lb_tests->tx_sent[tx_queue->queue] += state->packet_count;
498 lb_tests->tx_done[tx_queue->queue] += tx_done;
499 lb_tests->rx_good += rx_good;
500 lb_tests->rx_bad += rx_bad;
501
502 return rc;
503}
504
505static int
506efx_test_loopback(struct efx_tx_queue *tx_queue,
507 struct efx_loopback_self_tests *lb_tests)
508{
509 struct efx_nic *efx = tx_queue->efx;
510 struct efx_selftest_state *state = efx->loopback_selftest;
511 struct efx_channel *channel;
512 int i, rc = 0;
513
514 for (i = 0; i < loopback_test_level; i++) {
515 /* Determine how many packets to send */
516 state->packet_count = (efx->type->txd_ring_mask + 1) / 3;
517 state->packet_count = min(1 << (i << 2), state->packet_count);
518 state->skbs = kzalloc(sizeof(state->skbs[0]) *
519 state->packet_count, GFP_KERNEL);
520 state->flush = 0;
521
522 EFX_LOG(efx, "TX queue %d testing %s loopback with %d "
523 "packets\n", tx_queue->queue, LOOPBACK_MODE(efx),
524 state->packet_count);
525
526 efx_iterate_state(efx);
527 rc = efx_tx_loopback(tx_queue);
528
529 /* NAPI polling is not enabled, so process channels synchronously */
530 schedule_timeout_uninterruptible(HZ / 50);
531 efx_for_each_channel_with_interrupt(channel, efx) {
532 if (channel->work_pending)
533 efx_process_channel_now(channel);
534 }
535
536 rc |= efx_rx_loopback(tx_queue, lb_tests);
537 kfree(state->skbs);
538
539 if (rc) {
540 /* Wait a while to ensure there are no packets
541 * floating around after a failure. */
542 schedule_timeout_uninterruptible(HZ / 10);
543 return rc;
544 }
545 }
546
547 EFX_LOG(efx, "TX queue %d passed %s loopback test with a burst length "
548 "of %d packets\n", tx_queue->queue, LOOPBACK_MODE(efx),
549 state->packet_count);
550
551 return rc;
552}
553
554static int efx_test_loopbacks(struct efx_nic *efx,
555 struct efx_self_tests *tests,
556 unsigned int loopback_modes)
557{
558 struct efx_selftest_state *state = efx->loopback_selftest;
559 struct ethtool_cmd ecmd, ecmd_loopback;
560 struct efx_tx_queue *tx_queue;
561 enum efx_loopback_mode old_mode, mode;
562 int count, rc = 0, link_up;
563
564 rc = efx_ethtool_get_settings(efx->net_dev, &ecmd);
565 if (rc) {
566 EFX_ERR(efx, "could not get GMII settings\n");
567 return rc;
568 }
569 old_mode = efx->loopback_mode;
570
571 /* Disable autonegotiation for the purposes of loopback */
572 memcpy(&ecmd_loopback, &ecmd, sizeof(ecmd_loopback));
573 if (ecmd_loopback.autoneg == AUTONEG_ENABLE) {
574 ecmd_loopback.autoneg = AUTONEG_DISABLE;
575 ecmd_loopback.duplex = DUPLEX_FULL;
576 ecmd_loopback.speed = SPEED_10000;
577 }
578
579 rc = efx_ethtool_set_settings(efx->net_dev, &ecmd_loopback);
580 if (rc) {
581 EFX_ERR(efx, "could not disable autonegotiation\n");
582 goto out;
583 }
584 tests->loopback_speed = ecmd_loopback.speed;
585 tests->loopback_full_duplex = ecmd_loopback.duplex;
586
587 /* Test all supported loopback modes */
588 for (mode = LOOPBACK_NONE; mode < LOOPBACK_TEST_MAX; mode++) {
589 if (!(loopback_modes & (1 << mode)))
590 continue;
591
592 /* Move the port into the specified loopback mode. */
593 state->flush = 1;
594 efx->loopback_mode = mode;
595 efx_reconfigure_port(efx);
596
597 /* Wait for the PHY to signal the link is up */
598 count = 0;
599 do {
600 struct efx_channel *channel = &efx->channel[0];
601
602 falcon_check_xmac(efx);
603 schedule_timeout_uninterruptible(HZ / 10);
604 if (channel->work_pending)
605 efx_process_channel_now(channel);
606 /* Wait for PHY events to be processed */
607 flush_workqueue(efx->workqueue);
608 rmb();
609
610 /* efx->link_up can be 1 even if the XAUI link is down,
611 * (bug5762). Usually, it's not worth bothering with the
612 * difference, but for selftests, we need that extra
613 * guarantee that the link is really, really, up.
614 */
615 link_up = efx->link_up;
616 if (!falcon_xaui_link_ok(efx))
617 link_up = 0;
618
619 } while ((++count < 20) && !link_up);
620
621 /* The link should now be up. If it isn't, there is no point
622 * in attempting a loopback test */
623 if (!link_up) {
624 EFX_ERR(efx, "loopback %s never came up\n",
625 LOOPBACK_MODE(efx));
626 rc = -EIO;
627 goto out;
628 }
629
630 EFX_LOG(efx, "link came up in %s loopback in %d iterations\n",
631 LOOPBACK_MODE(efx), count);
632
633 /* Test every TX queue */
634 efx_for_each_tx_queue(tx_queue, efx) {
635 rc |= efx_test_loopback(tx_queue,
636 &tests->loopback[mode]);
637 if (rc)
638 goto out;
639 }
640 }
641
642 out:
643 /* Take out of loopback and restore PHY settings */
644 state->flush = 1;
645 efx->loopback_mode = old_mode;
646 efx_ethtool_set_settings(efx->net_dev, &ecmd);
647
648 return rc;
649}
650
651/**************************************************************************
652 *
653 * Entry points
654 *
655 *************************************************************************/
656
657/* Online (i.e. non-disruptive) testing
658 * This checks interrupt generation, event delivery and PHY presence. */
659int efx_online_test(struct efx_nic *efx, struct efx_self_tests *tests)
660{
661 struct efx_channel *channel;
662 int rc = 0;
663
664 EFX_LOG(efx, "performing online self-tests\n");
665
666 rc |= efx_test_interrupts(efx, tests);
667 efx_for_each_channel(channel, efx) {
668 if (channel->has_interrupt)
669 rc |= efx_test_eventq_irq(channel, tests);
670 else
671 rc |= efx_test_eventq(channel, tests);
672 }
673 rc |= efx_test_phy(efx, tests);
674
675 if (rc)
676 EFX_ERR(efx, "failed online self-tests\n");
677
678 return rc;
679}
680
681/* Offline (i.e. disruptive) testing
682 * This checks MAC and PHY loopback on the specified port. */
683int efx_offline_test(struct efx_nic *efx,
684 struct efx_self_tests *tests, unsigned int loopback_modes)
685{
686 struct efx_selftest_state *state;
687 int rc = 0;
688
689 EFX_LOG(efx, "performing offline self-tests\n");
690
691 /* Create a selftest_state structure to hold state for the test */
692 state = kzalloc(sizeof(*state), GFP_KERNEL);
693 if (state == NULL) {
694 rc = -ENOMEM;
695 goto out;
696 }
697
698 /* Set the port loopback_selftest member. From this point on
699 * all received packets will be dropped. Mark the state as
700 * "flushing" so all inflight packets are dropped */
701 BUG_ON(efx->loopback_selftest);
702 state->flush = 1;
703 efx->loopback_selftest = (void *)state;
704
705 rc = efx_test_loopbacks(efx, tests, loopback_modes);
706
707 efx->loopback_selftest = NULL;
708 wmb();
709 kfree(state);
710
711 out:
712 if (rc)
713 EFX_ERR(efx, "failed offline self-tests\n");
714
715 return rc;
716}
717
diff --git a/drivers/net/sfc/selftest.h b/drivers/net/sfc/selftest.h
new file mode 100644
index 000000000000..f6999c2b622d
--- /dev/null
+++ b/drivers/net/sfc/selftest.h
@@ -0,0 +1,50 @@
1/****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2006-2008 Solarflare Communications Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
9 */
10
11#ifndef EFX_SELFTEST_H
12#define EFX_SELFTEST_H
13
14#include "net_driver.h"
15
16/*
17 * Self tests
18 */
19
20struct efx_loopback_self_tests {
21 int tx_sent[EFX_MAX_TX_QUEUES];
22 int tx_done[EFX_MAX_TX_QUEUES];
23 int rx_good;
24 int rx_bad;
25};
26
27/* Efx self test results
28 * For fields which are not counters, 1 indicates success and -1
29 * indicates failure.
30 */
31struct efx_self_tests {
32 int interrupt;
33 int eventq_dma[EFX_MAX_CHANNELS];
34 int eventq_int[EFX_MAX_CHANNELS];
35 int eventq_poll[EFX_MAX_CHANNELS];
36 int phy_ok;
37 int loopback_speed;
38 int loopback_full_duplex;
39 struct efx_loopback_self_tests loopback[LOOPBACK_TEST_MAX];
40};
41
42extern void efx_loopback_rx_packet(struct efx_nic *efx,
43 const char *buf_ptr, int pkt_len);
44extern int efx_online_test(struct efx_nic *efx,
45 struct efx_self_tests *tests);
46extern int efx_offline_test(struct efx_nic *efx,
47 struct efx_self_tests *tests,
48 unsigned int loopback_modes);
49
50#endif /* EFX_SELFTEST_H */
diff --git a/drivers/net/sfc/sfe4001.c b/drivers/net/sfc/sfe4001.c
index 11fa9fb8f48b..725d1a539c49 100644
--- a/drivers/net/sfc/sfe4001.c
+++ b/drivers/net/sfc/sfe4001.c
@@ -130,6 +130,15 @@ void sfe4001_poweroff(struct efx_nic *efx)
130 (void) efx_i2c_read(i2c, MAX6647, RSL, &in, 1); 130 (void) efx_i2c_read(i2c, MAX6647, RSL, &in, 1);
131} 131}
132 132
133/* The P0_EN_3V3X line on SFE4001 boards (from A2 onward) is connected
134 * to the FLASH_CFG_1 input on the DSP. We must keep it high at power-
135 * up to allow writing the flash (done through MDIO from userland).
136 */
137unsigned int sfe4001_phy_flash_cfg;
138module_param_named(phy_flash_cfg, sfe4001_phy_flash_cfg, uint, 0444);
139MODULE_PARM_DESC(phy_flash_cfg,
140 "Force PHY to enter flash configuration mode");
141
133/* This board uses an I2C expander to provider power to the PHY, which needs to 142/* This board uses an I2C expander to provider power to the PHY, which needs to
134 * be turned on before the PHY can be used. 143 * be turned on before the PHY can be used.
135 * Context: Process context, rtnl lock held 144 * Context: Process context, rtnl lock held
@@ -203,6 +212,8 @@ int sfe4001_poweron(struct efx_nic *efx)
203 out = 0xff & ~((1 << P0_EN_1V2_LBN) | (1 << P0_EN_2V5_LBN) | 212 out = 0xff & ~((1 << P0_EN_1V2_LBN) | (1 << P0_EN_2V5_LBN) |
204 (1 << P0_EN_3V3X_LBN) | (1 << P0_EN_5V_LBN) | 213 (1 << P0_EN_3V3X_LBN) | (1 << P0_EN_5V_LBN) |
205 (1 << P0_X_TRST_LBN)); 214 (1 << P0_X_TRST_LBN));
215 if (sfe4001_phy_flash_cfg)
216 out |= 1 << P0_EN_3V3X_LBN;
206 217
207 rc = efx_i2c_write(i2c, PCA9539, P0_OUT, &out, 1); 218 rc = efx_i2c_write(i2c, PCA9539, P0_OUT, &out, 1);
208 if (rc) 219 if (rc)
@@ -226,6 +237,9 @@ int sfe4001_poweron(struct efx_nic *efx)
226 if (in & (1 << P1_AFE_PWD_LBN)) 237 if (in & (1 << P1_AFE_PWD_LBN))
227 goto done; 238 goto done;
228 239
240 /* DSP doesn't look powered in flash config mode */
241 if (sfe4001_phy_flash_cfg)
242 goto done;
229 } while (++count < 20); 243 } while (++count < 20);
230 244
231 EFX_INFO(efx, "timed out waiting for power\n"); 245 EFX_INFO(efx, "timed out waiting for power\n");
diff --git a/drivers/net/sfc/tenxpress.c b/drivers/net/sfc/tenxpress.c
index a2e9f79e47b1..b1cd6deec01f 100644
--- a/drivers/net/sfc/tenxpress.c
+++ b/drivers/net/sfc/tenxpress.c
@@ -24,6 +24,11 @@
24 MDIO_MMDREG_DEVS0_PCS | \ 24 MDIO_MMDREG_DEVS0_PCS | \
25 MDIO_MMDREG_DEVS0_PHYXS) 25 MDIO_MMDREG_DEVS0_PHYXS)
26 26
27#define TENXPRESS_LOOPBACKS ((1 << LOOPBACK_PHYXS) | \
28 (1 << LOOPBACK_PCS) | \
29 (1 << LOOPBACK_PMAPMD) | \
30 (1 << LOOPBACK_NETWORK))
31
27/* We complain if we fail to see the link partner as 10G capable this many 32/* We complain if we fail to see the link partner as 10G capable this many
28 * times in a row (must be > 1 as sampling the autoneg. registers is racy) 33 * times in a row (must be > 1 as sampling the autoneg. registers is racy)
29 */ 34 */
@@ -72,6 +77,10 @@
72#define PMA_PMD_BIST_RXD_LBN (1) 77#define PMA_PMD_BIST_RXD_LBN (1)
73#define PMA_PMD_BIST_AFE_LBN (0) 78#define PMA_PMD_BIST_AFE_LBN (0)
74 79
80/* Special Software reset register */
81#define PMA_PMD_EXT_CTRL_REG 49152
82#define PMA_PMD_EXT_SSR_LBN 15
83
75#define BIST_MAX_DELAY (1000) 84#define BIST_MAX_DELAY (1000)
76#define BIST_POLL_DELAY (10) 85#define BIST_POLL_DELAY (10)
77 86
@@ -86,6 +95,11 @@
86#define PCS_TEST_SELECT_REG 0xd807 /* PRM 10.5.8 */ 95#define PCS_TEST_SELECT_REG 0xd807 /* PRM 10.5.8 */
87#define CLK312_EN_LBN 3 96#define CLK312_EN_LBN 3
88 97
98/* PHYXS registers */
99#define PHYXS_TEST1 (49162)
100#define LOOPBACK_NEAR_LBN (8)
101#define LOOPBACK_NEAR_WIDTH (1)
102
89/* Boot status register */ 103/* Boot status register */
90#define PCS_BOOT_STATUS_REG (0xd000) 104#define PCS_BOOT_STATUS_REG (0xd000)
91#define PCS_BOOT_FATAL_ERR_LBN (0) 105#define PCS_BOOT_FATAL_ERR_LBN (0)
@@ -106,7 +120,9 @@ MODULE_PARM_DESC(crc_error_reset_threshold,
106 120
107struct tenxpress_phy_data { 121struct tenxpress_phy_data {
108 enum tenxpress_state state; 122 enum tenxpress_state state;
123 enum efx_loopback_mode loopback_mode;
109 atomic_t bad_crc_count; 124 atomic_t bad_crc_count;
125 int tx_disabled;
110 int bad_lp_tries; 126 int bad_lp_tries;
111}; 127};
112 128
@@ -199,10 +215,12 @@ static int tenxpress_phy_init(struct efx_nic *efx)
199 215
200 tenxpress_set_state(efx, TENXPRESS_STATUS_NORMAL); 216 tenxpress_set_state(efx, TENXPRESS_STATUS_NORMAL);
201 217
202 rc = mdio_clause45_wait_reset_mmds(efx, 218 if (!sfe4001_phy_flash_cfg) {
203 TENXPRESS_REQUIRED_DEVS); 219 rc = mdio_clause45_wait_reset_mmds(efx,
204 if (rc < 0) 220 TENXPRESS_REQUIRED_DEVS);
205 goto fail; 221 if (rc < 0)
222 goto fail;
223 }
206 224
207 rc = mdio_clause45_check_mmds(efx, TENXPRESS_REQUIRED_DEVS, 0); 225 rc = mdio_clause45_check_mmds(efx, TENXPRESS_REQUIRED_DEVS, 0);
208 if (rc < 0) 226 if (rc < 0)
@@ -225,6 +243,35 @@ static int tenxpress_phy_init(struct efx_nic *efx)
225 return rc; 243 return rc;
226} 244}
227 245
246static int tenxpress_special_reset(struct efx_nic *efx)
247{
248 int rc, reg;
249
250 EFX_TRACE(efx, "%s\n", __func__);
251
252 /* Initiate reset */
253 reg = mdio_clause45_read(efx, efx->mii.phy_id,
254 MDIO_MMD_PMAPMD, PMA_PMD_EXT_CTRL_REG);
255 reg |= (1 << PMA_PMD_EXT_SSR_LBN);
256 mdio_clause45_write(efx, efx->mii.phy_id, MDIO_MMD_PMAPMD,
257 PMA_PMD_EXT_CTRL_REG, reg);
258
259 msleep(200);
260
261 /* Wait for the blocks to come out of reset */
262 rc = mdio_clause45_wait_reset_mmds(efx,
263 TENXPRESS_REQUIRED_DEVS);
264 if (rc < 0)
265 return rc;
266
267 /* Try and reconfigure the device */
268 rc = tenxpress_init(efx);
269 if (rc < 0)
270 return rc;
271
272 return 0;
273}
274
228static void tenxpress_set_bad_lp(struct efx_nic *efx, int bad_lp) 275static void tenxpress_set_bad_lp(struct efx_nic *efx, int bad_lp)
229{ 276{
230 struct tenxpress_phy_data *pd = efx->phy_data; 277 struct tenxpress_phy_data *pd = efx->phy_data;
@@ -299,11 +346,46 @@ static int tenxpress_link_ok(struct efx_nic *efx, int check_lp)
299 return ok; 346 return ok;
300} 347}
301 348
349static void tenxpress_phyxs_loopback(struct efx_nic *efx)
350{
351 int phy_id = efx->mii.phy_id;
352 int ctrl1, ctrl2;
353
354 ctrl1 = ctrl2 = mdio_clause45_read(efx, phy_id, MDIO_MMD_PHYXS,
355 PHYXS_TEST1);
356 if (efx->loopback_mode == LOOPBACK_PHYXS)
357 ctrl2 |= (1 << LOOPBACK_NEAR_LBN);
358 else
359 ctrl2 &= ~(1 << LOOPBACK_NEAR_LBN);
360 if (ctrl1 != ctrl2)
361 mdio_clause45_write(efx, phy_id, MDIO_MMD_PHYXS,
362 PHYXS_TEST1, ctrl2);
363}
364
302static void tenxpress_phy_reconfigure(struct efx_nic *efx) 365static void tenxpress_phy_reconfigure(struct efx_nic *efx)
303{ 366{
367 struct tenxpress_phy_data *phy_data = efx->phy_data;
368 int loop_change = LOOPBACK_OUT_OF(phy_data, efx,
369 TENXPRESS_LOOPBACKS);
370
304 if (!tenxpress_state_is(efx, TENXPRESS_STATUS_NORMAL)) 371 if (!tenxpress_state_is(efx, TENXPRESS_STATUS_NORMAL))
305 return; 372 return;
306 373
374 /* When coming out of transmit disable, coming out of low power
375 * mode, or moving out of any PHY internal loopback mode,
376 * perform a special software reset */
377 if ((phy_data->tx_disabled && !efx->tx_disabled) ||
378 loop_change) {
379 (void) tenxpress_special_reset(efx);
380 falcon_reset_xaui(efx);
381 }
382
383 mdio_clause45_transmit_disable(efx);
384 mdio_clause45_phy_reconfigure(efx);
385 tenxpress_phyxs_loopback(efx);
386
387 phy_data->tx_disabled = efx->tx_disabled;
388 phy_data->loopback_mode = efx->loopback_mode;
307 efx->link_up = tenxpress_link_ok(efx, 0); 389 efx->link_up = tenxpress_link_ok(efx, 0);
308 efx->link_options = GM_LPA_10000FULL; 390 efx->link_options = GM_LPA_10000FULL;
309} 391}
@@ -431,4 +513,5 @@ struct efx_phy_operations falcon_tenxpress_phy_ops = {
431 .clear_interrupt = tenxpress_phy_clear_interrupt, 513 .clear_interrupt = tenxpress_phy_clear_interrupt,
432 .reset_xaui = tenxpress_reset_xaui, 514 .reset_xaui = tenxpress_reset_xaui,
433 .mmds = TENXPRESS_REQUIRED_DEVS, 515 .mmds = TENXPRESS_REQUIRED_DEVS,
516 .loopbacks = TENXPRESS_LOOPBACKS,
434}; 517};
diff --git a/drivers/net/sfc/tx.c b/drivers/net/sfc/tx.c
index fbb866b2185e..9b436f5b4888 100644
--- a/drivers/net/sfc/tx.c
+++ b/drivers/net/sfc/tx.c
@@ -82,6 +82,46 @@ static inline void efx_dequeue_buffer(struct efx_tx_queue *tx_queue,
82 } 82 }
83} 83}
84 84
85/**
86 * struct efx_tso_header - a DMA mapped buffer for packet headers
87 * @next: Linked list of free ones.
88 * The list is protected by the TX queue lock.
89 * @dma_unmap_len: Length to unmap for an oversize buffer, or 0.
90 * @dma_addr: The DMA address of the header below.
91 *
92 * This controls the memory used for a TSO header. Use TSOH_DATA()
93 * to find the packet header data. Use TSOH_SIZE() to calculate the
94 * total size required for a given packet header length. TSO headers
95 * in the free list are exactly %TSOH_STD_SIZE bytes in size.
96 */
97struct efx_tso_header {
98 union {
99 struct efx_tso_header *next;
100 size_t unmap_len;
101 };
102 dma_addr_t dma_addr;
103};
104
105static int efx_enqueue_skb_tso(struct efx_tx_queue *tx_queue,
106 const struct sk_buff *skb);
107static void efx_fini_tso(struct efx_tx_queue *tx_queue);
108static void efx_tsoh_heap_free(struct efx_tx_queue *tx_queue,
109 struct efx_tso_header *tsoh);
110
111static inline void efx_tsoh_free(struct efx_tx_queue *tx_queue,
112 struct efx_tx_buffer *buffer)
113{
114 if (buffer->tsoh) {
115 if (likely(!buffer->tsoh->unmap_len)) {
116 buffer->tsoh->next = tx_queue->tso_headers_free;
117 tx_queue->tso_headers_free = buffer->tsoh;
118 } else {
119 efx_tsoh_heap_free(tx_queue, buffer->tsoh);
120 }
121 buffer->tsoh = NULL;
122 }
123}
124
85 125
86/* 126/*
87 * Add a socket buffer to a TX queue 127 * Add a socket buffer to a TX queue
@@ -114,6 +154,9 @@ static inline int efx_enqueue_skb(struct efx_tx_queue *tx_queue,
114 154
115 EFX_BUG_ON_PARANOID(tx_queue->write_count != tx_queue->insert_count); 155 EFX_BUG_ON_PARANOID(tx_queue->write_count != tx_queue->insert_count);
116 156
157 if (skb_shinfo((struct sk_buff *)skb)->gso_size)
158 return efx_enqueue_skb_tso(tx_queue, skb);
159
117 /* Get size of the initial fragment */ 160 /* Get size of the initial fragment */
118 len = skb_headlen(skb); 161 len = skb_headlen(skb);
119 162
@@ -166,6 +209,8 @@ static inline int efx_enqueue_skb(struct efx_tx_queue *tx_queue,
166 insert_ptr = (tx_queue->insert_count & 209 insert_ptr = (tx_queue->insert_count &
167 efx->type->txd_ring_mask); 210 efx->type->txd_ring_mask);
168 buffer = &tx_queue->buffer[insert_ptr]; 211 buffer = &tx_queue->buffer[insert_ptr];
212 efx_tsoh_free(tx_queue, buffer);
213 EFX_BUG_ON_PARANOID(buffer->tsoh);
169 EFX_BUG_ON_PARANOID(buffer->skb); 214 EFX_BUG_ON_PARANOID(buffer->skb);
170 EFX_BUG_ON_PARANOID(buffer->len); 215 EFX_BUG_ON_PARANOID(buffer->len);
171 EFX_BUG_ON_PARANOID(buffer->continuation != 1); 216 EFX_BUG_ON_PARANOID(buffer->continuation != 1);
@@ -432,6 +477,9 @@ void efx_fini_tx_queue(struct efx_tx_queue *tx_queue)
432 477
433 efx_release_tx_buffers(tx_queue); 478 efx_release_tx_buffers(tx_queue);
434 479
480 /* Free up TSO header cache */
481 efx_fini_tso(tx_queue);
482
435 /* Release queue's stop on port, if any */ 483 /* Release queue's stop on port, if any */
436 if (tx_queue->stopped) { 484 if (tx_queue->stopped) {
437 tx_queue->stopped = 0; 485 tx_queue->stopped = 0;
@@ -450,3 +498,619 @@ void efx_remove_tx_queue(struct efx_tx_queue *tx_queue)
450} 498}
451 499
452 500
501/* Efx TCP segmentation acceleration.
502 *
503 * Why? Because by doing it here in the driver we can go significantly
504 * faster than the GSO.
505 *
506 * Requires TX checksum offload support.
507 */
508
509/* Number of bytes inserted at the start of a TSO header buffer,
510 * similar to NET_IP_ALIGN.
511 */
512#if defined(__i386__) || defined(__x86_64__)
513#define TSOH_OFFSET 0
514#else
515#define TSOH_OFFSET NET_IP_ALIGN
516#endif
517
518#define TSOH_BUFFER(tsoh) ((u8 *)(tsoh + 1) + TSOH_OFFSET)
519
520/* Total size of struct efx_tso_header, buffer and padding */
521#define TSOH_SIZE(hdr_len) \
522 (sizeof(struct efx_tso_header) + TSOH_OFFSET + hdr_len)
523
524/* Size of blocks on free list. Larger blocks must be allocated from
525 * the heap.
526 */
527#define TSOH_STD_SIZE 128
528
529#define PTR_DIFF(p1, p2) ((u8 *)(p1) - (u8 *)(p2))
530#define ETH_HDR_LEN(skb) (skb_network_header(skb) - (skb)->data)
531#define SKB_TCP_OFF(skb) PTR_DIFF(tcp_hdr(skb), (skb)->data)
532#define SKB_IPV4_OFF(skb) PTR_DIFF(ip_hdr(skb), (skb)->data)
533
534/**
535 * struct tso_state - TSO state for an SKB
536 * @remaining_len: Bytes of data we've yet to segment
537 * @seqnum: Current sequence number
538 * @packet_space: Remaining space in current packet
539 * @ifc: Input fragment cursor.
540 * Where we are in the current fragment of the incoming SKB. These
541 * values get updated in place when we split a fragment over
542 * multiple packets.
543 * @p: Parameters.
544 * These values are set once at the start of the TSO send and do
545 * not get changed as the routine progresses.
546 *
547 * The state used during segmentation. It is put into this data structure
548 * just to make it easy to pass into inline functions.
549 */
550struct tso_state {
551 unsigned remaining_len;
552 unsigned seqnum;
553 unsigned packet_space;
554
555 struct {
556 /* DMA address of current position */
557 dma_addr_t dma_addr;
558 /* Remaining length */
559 unsigned int len;
560 /* DMA address and length of the whole fragment */
561 unsigned int unmap_len;
562 dma_addr_t unmap_addr;
563 struct page *page;
564 unsigned page_off;
565 } ifc;
566
567 struct {
568 /* The number of bytes of header */
569 unsigned int header_length;
570
571 /* The number of bytes to put in each outgoing segment. */
572 int full_packet_size;
573
574 /* Current IPv4 ID, host endian. */
575 unsigned ipv4_id;
576 } p;
577};
578
579
580/*
581 * Verify that our various assumptions about sk_buffs and the conditions
582 * under which TSO will be attempted hold true.
583 */
584static inline void efx_tso_check_safe(const struct sk_buff *skb)
585{
586 EFX_BUG_ON_PARANOID(skb->protocol != htons(ETH_P_IP));
587 EFX_BUG_ON_PARANOID(((struct ethhdr *)skb->data)->h_proto !=
588 skb->protocol);
589 EFX_BUG_ON_PARANOID(ip_hdr(skb)->protocol != IPPROTO_TCP);
590 EFX_BUG_ON_PARANOID((PTR_DIFF(tcp_hdr(skb), skb->data)
591 + (tcp_hdr(skb)->doff << 2u)) >
592 skb_headlen(skb));
593}
594
595
596/*
597 * Allocate a page worth of efx_tso_header structures, and string them
598 * into the tx_queue->tso_headers_free linked list. Return 0 or -ENOMEM.
599 */
600static int efx_tsoh_block_alloc(struct efx_tx_queue *tx_queue)
601{
602
603 struct pci_dev *pci_dev = tx_queue->efx->pci_dev;
604 struct efx_tso_header *tsoh;
605 dma_addr_t dma_addr;
606 u8 *base_kva, *kva;
607
608 base_kva = pci_alloc_consistent(pci_dev, PAGE_SIZE, &dma_addr);
609 if (base_kva == NULL) {
610 EFX_ERR(tx_queue->efx, "Unable to allocate page for TSO"
611 " headers\n");
612 return -ENOMEM;
613 }
614
615 /* pci_alloc_consistent() allocates pages. */
616 EFX_BUG_ON_PARANOID(dma_addr & (PAGE_SIZE - 1u));
617
618 for (kva = base_kva; kva < base_kva + PAGE_SIZE; kva += TSOH_STD_SIZE) {
619 tsoh = (struct efx_tso_header *)kva;
620 tsoh->dma_addr = dma_addr + (TSOH_BUFFER(tsoh) - base_kva);
621 tsoh->next = tx_queue->tso_headers_free;
622 tx_queue->tso_headers_free = tsoh;
623 }
624
625 return 0;
626}
627
628
629/* Free up a TSO header, and all others in the same page. */
630static void efx_tsoh_block_free(struct efx_tx_queue *tx_queue,
631 struct efx_tso_header *tsoh,
632 struct pci_dev *pci_dev)
633{
634 struct efx_tso_header **p;
635 unsigned long base_kva;
636 dma_addr_t base_dma;
637
638 base_kva = (unsigned long)tsoh & PAGE_MASK;
639 base_dma = tsoh->dma_addr & PAGE_MASK;
640
641 p = &tx_queue->tso_headers_free;
642 while (*p != NULL)
643 if (((unsigned long)*p & PAGE_MASK) == base_kva)
644 *p = (*p)->next;
645 else
646 p = &(*p)->next;
647
648 pci_free_consistent(pci_dev, PAGE_SIZE, (void *)base_kva, base_dma);
649}
650
651static struct efx_tso_header *
652efx_tsoh_heap_alloc(struct efx_tx_queue *tx_queue, size_t header_len)
653{
654 struct efx_tso_header *tsoh;
655
656 tsoh = kmalloc(TSOH_SIZE(header_len), GFP_ATOMIC | GFP_DMA);
657 if (unlikely(!tsoh))
658 return NULL;
659
660 tsoh->dma_addr = pci_map_single(tx_queue->efx->pci_dev,
661 TSOH_BUFFER(tsoh), header_len,
662 PCI_DMA_TODEVICE);
663 if (unlikely(pci_dma_mapping_error(tsoh->dma_addr))) {
664 kfree(tsoh);
665 return NULL;
666 }
667
668 tsoh->unmap_len = header_len;
669 return tsoh;
670}
671
672static void
673efx_tsoh_heap_free(struct efx_tx_queue *tx_queue, struct efx_tso_header *tsoh)
674{
675 pci_unmap_single(tx_queue->efx->pci_dev,
676 tsoh->dma_addr, tsoh->unmap_len,
677 PCI_DMA_TODEVICE);
678 kfree(tsoh);
679}
680
681/**
682 * efx_tx_queue_insert - push descriptors onto the TX queue
683 * @tx_queue: Efx TX queue
684 * @dma_addr: DMA address of fragment
685 * @len: Length of fragment
686 * @skb: Only non-null for end of last segment
687 * @end_of_packet: True if last fragment in a packet
688 * @unmap_addr: DMA address of fragment for unmapping
689 * @unmap_len: Only set this in last segment of a fragment
690 *
691 * Push descriptors onto the TX queue. Return 0 on success or 1 if
692 * @tx_queue full.
693 */
694static int efx_tx_queue_insert(struct efx_tx_queue *tx_queue,
695 dma_addr_t dma_addr, unsigned len,
696 const struct sk_buff *skb, int end_of_packet,
697 dma_addr_t unmap_addr, unsigned unmap_len)
698{
699 struct efx_tx_buffer *buffer;
700 struct efx_nic *efx = tx_queue->efx;
701 unsigned dma_len, fill_level, insert_ptr, misalign;
702 int q_space;
703
704 EFX_BUG_ON_PARANOID(len <= 0);
705
706 fill_level = tx_queue->insert_count - tx_queue->old_read_count;
707 /* -1 as there is no way to represent all descriptors used */
708 q_space = efx->type->txd_ring_mask - 1 - fill_level;
709
710 while (1) {
711 if (unlikely(q_space-- <= 0)) {
712 /* It might be that completions have happened
713 * since the xmit path last checked. Update
714 * the xmit path's copy of read_count.
715 */
716 ++tx_queue->stopped;
717 /* This memory barrier protects the change of
718 * stopped from the access of read_count. */
719 smp_mb();
720 tx_queue->old_read_count =
721 *(volatile unsigned *)&tx_queue->read_count;
722 fill_level = (tx_queue->insert_count
723 - tx_queue->old_read_count);
724 q_space = efx->type->txd_ring_mask - 1 - fill_level;
725 if (unlikely(q_space-- <= 0))
726 return 1;
727 smp_mb();
728 --tx_queue->stopped;
729 }
730
731 insert_ptr = tx_queue->insert_count & efx->type->txd_ring_mask;
732 buffer = &tx_queue->buffer[insert_ptr];
733 ++tx_queue->insert_count;
734
735 EFX_BUG_ON_PARANOID(tx_queue->insert_count -
736 tx_queue->read_count >
737 efx->type->txd_ring_mask);
738
739 efx_tsoh_free(tx_queue, buffer);
740 EFX_BUG_ON_PARANOID(buffer->len);
741 EFX_BUG_ON_PARANOID(buffer->unmap_len);
742 EFX_BUG_ON_PARANOID(buffer->skb);
743 EFX_BUG_ON_PARANOID(buffer->continuation != 1);
744 EFX_BUG_ON_PARANOID(buffer->tsoh);
745
746 buffer->dma_addr = dma_addr;
747
748 /* Ensure we do not cross a boundary unsupported by H/W */
749 dma_len = (~dma_addr & efx->type->tx_dma_mask) + 1;
750
751 misalign = (unsigned)dma_addr & efx->type->bug5391_mask;
752 if (misalign && dma_len + misalign > 512)
753 dma_len = 512 - misalign;
754
755 /* If there is enough space to send then do so */
756 if (dma_len >= len)
757 break;
758
759 buffer->len = dma_len; /* Don't set the other members */
760 dma_addr += dma_len;
761 len -= dma_len;
762 }
763
764 EFX_BUG_ON_PARANOID(!len);
765 buffer->len = len;
766 buffer->skb = skb;
767 buffer->continuation = !end_of_packet;
768 buffer->unmap_addr = unmap_addr;
769 buffer->unmap_len = unmap_len;
770 return 0;
771}
772
773
774/*
775 * Put a TSO header into the TX queue.
776 *
777 * This is special-cased because we know that it is small enough to fit in
778 * a single fragment, and we know it doesn't cross a page boundary. It
779 * also allows us to not worry about end-of-packet etc.
780 */
781static inline void efx_tso_put_header(struct efx_tx_queue *tx_queue,
782 struct efx_tso_header *tsoh, unsigned len)
783{
784 struct efx_tx_buffer *buffer;
785
786 buffer = &tx_queue->buffer[tx_queue->insert_count &
787 tx_queue->efx->type->txd_ring_mask];
788 efx_tsoh_free(tx_queue, buffer);
789 EFX_BUG_ON_PARANOID(buffer->len);
790 EFX_BUG_ON_PARANOID(buffer->unmap_len);
791 EFX_BUG_ON_PARANOID(buffer->skb);
792 EFX_BUG_ON_PARANOID(buffer->continuation != 1);
793 EFX_BUG_ON_PARANOID(buffer->tsoh);
794 buffer->len = len;
795 buffer->dma_addr = tsoh->dma_addr;
796 buffer->tsoh = tsoh;
797
798 ++tx_queue->insert_count;
799}
800
801
802/* Remove descriptors put into a tx_queue. */
803static void efx_enqueue_unwind(struct efx_tx_queue *tx_queue)
804{
805 struct efx_tx_buffer *buffer;
806
807 /* Work backwards until we hit the original insert pointer value */
808 while (tx_queue->insert_count != tx_queue->write_count) {
809 --tx_queue->insert_count;
810 buffer = &tx_queue->buffer[tx_queue->insert_count &
811 tx_queue->efx->type->txd_ring_mask];
812 efx_tsoh_free(tx_queue, buffer);
813 EFX_BUG_ON_PARANOID(buffer->skb);
814 buffer->len = 0;
815 buffer->continuation = 1;
816 if (buffer->unmap_len) {
817 pci_unmap_page(tx_queue->efx->pci_dev,
818 buffer->unmap_addr,
819 buffer->unmap_len, PCI_DMA_TODEVICE);
820 buffer->unmap_len = 0;
821 }
822 }
823}
824
825
826/* Parse the SKB header and initialise state. */
827static inline void tso_start(struct tso_state *st, const struct sk_buff *skb)
828{
829 /* All ethernet/IP/TCP headers combined size is TCP header size
830 * plus offset of TCP header relative to start of packet.
831 */
832 st->p.header_length = ((tcp_hdr(skb)->doff << 2u)
833 + PTR_DIFF(tcp_hdr(skb), skb->data));
834 st->p.full_packet_size = (st->p.header_length
835 + skb_shinfo(skb)->gso_size);
836
837 st->p.ipv4_id = ntohs(ip_hdr(skb)->id);
838 st->seqnum = ntohl(tcp_hdr(skb)->seq);
839
840 EFX_BUG_ON_PARANOID(tcp_hdr(skb)->urg);
841 EFX_BUG_ON_PARANOID(tcp_hdr(skb)->syn);
842 EFX_BUG_ON_PARANOID(tcp_hdr(skb)->rst);
843
844 st->packet_space = st->p.full_packet_size;
845 st->remaining_len = skb->len - st->p.header_length;
846}
847
848
849/**
850 * tso_get_fragment - record fragment details and map for DMA
851 * @st: TSO state
852 * @efx: Efx NIC
853 * @data: Pointer to fragment data
854 * @len: Length of fragment
855 *
856 * Record fragment details and map for DMA. Return 0 on success, or
857 * -%ENOMEM if DMA mapping fails.
858 */
859static inline int tso_get_fragment(struct tso_state *st, struct efx_nic *efx,
860 int len, struct page *page, int page_off)
861{
862
863 st->ifc.unmap_addr = pci_map_page(efx->pci_dev, page, page_off,
864 len, PCI_DMA_TODEVICE);
865 if (likely(!pci_dma_mapping_error(st->ifc.unmap_addr))) {
866 st->ifc.unmap_len = len;
867 st->ifc.len = len;
868 st->ifc.dma_addr = st->ifc.unmap_addr;
869 st->ifc.page = page;
870 st->ifc.page_off = page_off;
871 return 0;
872 }
873 return -ENOMEM;
874}
875
876
877/**
878 * tso_fill_packet_with_fragment - form descriptors for the current fragment
879 * @tx_queue: Efx TX queue
880 * @skb: Socket buffer
881 * @st: TSO state
882 *
883 * Form descriptors for the current fragment, until we reach the end
884 * of fragment or end-of-packet. Return 0 on success, 1 if not enough
885 * space in @tx_queue.
886 */
887static inline int tso_fill_packet_with_fragment(struct efx_tx_queue *tx_queue,
888 const struct sk_buff *skb,
889 struct tso_state *st)
890{
891
892 int n, end_of_packet, rc;
893
894 if (st->ifc.len == 0)
895 return 0;
896 if (st->packet_space == 0)
897 return 0;
898
899 EFX_BUG_ON_PARANOID(st->ifc.len <= 0);
900 EFX_BUG_ON_PARANOID(st->packet_space <= 0);
901
902 n = min(st->ifc.len, st->packet_space);
903
904 st->packet_space -= n;
905 st->remaining_len -= n;
906 st->ifc.len -= n;
907 st->ifc.page_off += n;
908 end_of_packet = st->remaining_len == 0 || st->packet_space == 0;
909
910 rc = efx_tx_queue_insert(tx_queue, st->ifc.dma_addr, n,
911 st->remaining_len ? NULL : skb,
912 end_of_packet, st->ifc.unmap_addr,
913 st->ifc.len ? 0 : st->ifc.unmap_len);
914
915 st->ifc.dma_addr += n;
916
917 return rc;
918}
919
920
921/**
922 * tso_start_new_packet - generate a new header and prepare for the new packet
923 * @tx_queue: Efx TX queue
924 * @skb: Socket buffer
925 * @st: TSO state
926 *
927 * Generate a new header and prepare for the new packet. Return 0 on
928 * success, or -1 if failed to alloc header.
929 */
930static inline int tso_start_new_packet(struct efx_tx_queue *tx_queue,
931 const struct sk_buff *skb,
932 struct tso_state *st)
933{
934 struct efx_tso_header *tsoh;
935 struct iphdr *tsoh_iph;
936 struct tcphdr *tsoh_th;
937 unsigned ip_length;
938 u8 *header;
939
940 /* Allocate a DMA-mapped header buffer. */
941 if (likely(TSOH_SIZE(st->p.header_length) <= TSOH_STD_SIZE)) {
942 if (tx_queue->tso_headers_free == NULL)
943 if (efx_tsoh_block_alloc(tx_queue))
944 return -1;
945 EFX_BUG_ON_PARANOID(!tx_queue->tso_headers_free);
946 tsoh = tx_queue->tso_headers_free;
947 tx_queue->tso_headers_free = tsoh->next;
948 tsoh->unmap_len = 0;
949 } else {
950 tx_queue->tso_long_headers++;
951 tsoh = efx_tsoh_heap_alloc(tx_queue, st->p.header_length);
952 if (unlikely(!tsoh))
953 return -1;
954 }
955
956 header = TSOH_BUFFER(tsoh);
957 tsoh_th = (struct tcphdr *)(header + SKB_TCP_OFF(skb));
958 tsoh_iph = (struct iphdr *)(header + SKB_IPV4_OFF(skb));
959
960 /* Copy and update the headers. */
961 memcpy(header, skb->data, st->p.header_length);
962
963 tsoh_th->seq = htonl(st->seqnum);
964 st->seqnum += skb_shinfo(skb)->gso_size;
965 if (st->remaining_len > skb_shinfo(skb)->gso_size) {
966 /* This packet will not finish the TSO burst. */
967 ip_length = st->p.full_packet_size - ETH_HDR_LEN(skb);
968 tsoh_th->fin = 0;
969 tsoh_th->psh = 0;
970 } else {
971 /* This packet will be the last in the TSO burst. */
972 ip_length = (st->p.header_length - ETH_HDR_LEN(skb)
973 + st->remaining_len);
974 tsoh_th->fin = tcp_hdr(skb)->fin;
975 tsoh_th->psh = tcp_hdr(skb)->psh;
976 }
977 tsoh_iph->tot_len = htons(ip_length);
978
979 /* Linux leaves suitable gaps in the IP ID space for us to fill. */
980 tsoh_iph->id = htons(st->p.ipv4_id);
981 st->p.ipv4_id++;
982
983 st->packet_space = skb_shinfo(skb)->gso_size;
984 ++tx_queue->tso_packets;
985
986 /* Form a descriptor for this header. */
987 efx_tso_put_header(tx_queue, tsoh, st->p.header_length);
988
989 return 0;
990}
991
992
993/**
994 * efx_enqueue_skb_tso - segment and transmit a TSO socket buffer
995 * @tx_queue: Efx TX queue
996 * @skb: Socket buffer
997 *
998 * Context: You must hold netif_tx_lock() to call this function.
999 *
1000 * Add socket buffer @skb to @tx_queue, doing TSO or return != 0 if
1001 * @skb was not enqueued. In all cases @skb is consumed. Return
1002 * %NETDEV_TX_OK or %NETDEV_TX_BUSY.
1003 */
1004static int efx_enqueue_skb_tso(struct efx_tx_queue *tx_queue,
1005 const struct sk_buff *skb)
1006{
1007 int frag_i, rc, rc2 = NETDEV_TX_OK;
1008 struct tso_state state;
1009 skb_frag_t *f;
1010
1011 /* Verify TSO is safe - these checks should never fail. */
1012 efx_tso_check_safe(skb);
1013
1014 EFX_BUG_ON_PARANOID(tx_queue->write_count != tx_queue->insert_count);
1015
1016 tso_start(&state, skb);
1017
1018 /* Assume that skb header area contains exactly the headers, and
1019 * all payload is in the frag list.
1020 */
1021 if (skb_headlen(skb) == state.p.header_length) {
1022 /* Grab the first payload fragment. */
1023 EFX_BUG_ON_PARANOID(skb_shinfo(skb)->nr_frags < 1);
1024 frag_i = 0;
1025 f = &skb_shinfo(skb)->frags[frag_i];
1026 rc = tso_get_fragment(&state, tx_queue->efx,
1027 f->size, f->page, f->page_offset);
1028 if (rc)
1029 goto mem_err;
1030 } else {
1031 /* It may look like this code fragment assumes that the
1032 * skb->data portion does not cross a page boundary, but
1033 * that is not the case. It is guaranteed to be direct
1034 * mapped memory, and therefore is physically contiguous,
1035 * and so DMA will work fine. kmap_atomic() on this region
1036 * will just return the direct mapping, so that will work
1037 * too.
1038 */
1039 int page_off = (unsigned long)skb->data & (PAGE_SIZE - 1);
1040 int hl = state.p.header_length;
1041 rc = tso_get_fragment(&state, tx_queue->efx,
1042 skb_headlen(skb) - hl,
1043 virt_to_page(skb->data), page_off + hl);
1044 if (rc)
1045 goto mem_err;
1046 frag_i = -1;
1047 }
1048
1049 if (tso_start_new_packet(tx_queue, skb, &state) < 0)
1050 goto mem_err;
1051
1052 while (1) {
1053 rc = tso_fill_packet_with_fragment(tx_queue, skb, &state);
1054 if (unlikely(rc))
1055 goto stop;
1056
1057 /* Move onto the next fragment? */
1058 if (state.ifc.len == 0) {
1059 if (++frag_i >= skb_shinfo(skb)->nr_frags)
1060 /* End of payload reached. */
1061 break;
1062 f = &skb_shinfo(skb)->frags[frag_i];
1063 rc = tso_get_fragment(&state, tx_queue->efx,
1064 f->size, f->page, f->page_offset);
1065 if (rc)
1066 goto mem_err;
1067 }
1068
1069 /* Start at new packet? */
1070 if (state.packet_space == 0 &&
1071 tso_start_new_packet(tx_queue, skb, &state) < 0)
1072 goto mem_err;
1073 }
1074
1075 /* Pass off to hardware */
1076 falcon_push_buffers(tx_queue);
1077
1078 tx_queue->tso_bursts++;
1079 return NETDEV_TX_OK;
1080
1081 mem_err:
1082 EFX_ERR(tx_queue->efx, "Out of memory for TSO headers, or PCI mapping"
1083 " error\n");
1084 dev_kfree_skb_any((struct sk_buff *)skb);
1085 goto unwind;
1086
1087 stop:
1088 rc2 = NETDEV_TX_BUSY;
1089
1090 /* Stop the queue if it wasn't stopped before. */
1091 if (tx_queue->stopped == 1)
1092 efx_stop_queue(tx_queue->efx);
1093
1094 unwind:
1095 efx_enqueue_unwind(tx_queue);
1096 return rc2;
1097}
1098
1099
1100/*
1101 * Free up all TSO datastructures associated with tx_queue. This
1102 * routine should be called only once the tx_queue is both empty and
1103 * will no longer be used.
1104 */
1105static void efx_fini_tso(struct efx_tx_queue *tx_queue)
1106{
1107 unsigned i;
1108
1109 if (tx_queue->buffer)
1110 for (i = 0; i <= tx_queue->efx->type->txd_ring_mask; ++i)
1111 efx_tsoh_free(tx_queue, &tx_queue->buffer[i]);
1112
1113 while (tx_queue->tso_headers_free != NULL)
1114 efx_tsoh_block_free(tx_queue, tx_queue->tso_headers_free,
1115 tx_queue->efx->pci_dev);
1116}
diff --git a/drivers/net/sfc/xfp_phy.c b/drivers/net/sfc/xfp_phy.c
index 66dd5bf1eaa9..3b9f9ddbc372 100644
--- a/drivers/net/sfc/xfp_phy.c
+++ b/drivers/net/sfc/xfp_phy.c
@@ -24,6 +24,10 @@
24 MDIO_MMDREG_DEVS0_PMAPMD | \ 24 MDIO_MMDREG_DEVS0_PMAPMD | \
25 MDIO_MMDREG_DEVS0_PHYXS) 25 MDIO_MMDREG_DEVS0_PHYXS)
26 26
27#define XFP_LOOPBACKS ((1 << LOOPBACK_PCS) | \
28 (1 << LOOPBACK_PMAPMD) | \
29 (1 << LOOPBACK_NETWORK))
30
27/****************************************************************************/ 31/****************************************************************************/
28/* Quake-specific MDIO registers */ 32/* Quake-specific MDIO registers */
29#define MDIO_QUAKE_LED0_REG (0xD006) 33#define MDIO_QUAKE_LED0_REG (0xD006)
@@ -35,6 +39,10 @@ void xfp_set_led(struct efx_nic *p, int led, int mode)
35 mode); 39 mode);
36} 40}
37 41
42struct xfp_phy_data {
43 int tx_disabled;
44};
45
38#define XFP_MAX_RESET_TIME 500 46#define XFP_MAX_RESET_TIME 500
39#define XFP_RESET_WAIT 10 47#define XFP_RESET_WAIT 10
40 48
@@ -72,18 +80,31 @@ static int xfp_reset_phy(struct efx_nic *efx)
72 80
73static int xfp_phy_init(struct efx_nic *efx) 81static int xfp_phy_init(struct efx_nic *efx)
74{ 82{
83 struct xfp_phy_data *phy_data;
75 u32 devid = mdio_clause45_read_id(efx, MDIO_MMD_PHYXS); 84 u32 devid = mdio_clause45_read_id(efx, MDIO_MMD_PHYXS);
76 int rc; 85 int rc;
77 86
87 phy_data = kzalloc(sizeof(struct xfp_phy_data), GFP_KERNEL);
88 efx->phy_data = (void *) phy_data;
89
78 EFX_INFO(efx, "XFP: PHY ID reg %x (OUI %x model %x revision" 90 EFX_INFO(efx, "XFP: PHY ID reg %x (OUI %x model %x revision"
79 " %x)\n", devid, MDIO_ID_OUI(devid), MDIO_ID_MODEL(devid), 91 " %x)\n", devid, MDIO_ID_OUI(devid), MDIO_ID_MODEL(devid),
80 MDIO_ID_REV(devid)); 92 MDIO_ID_REV(devid));
81 93
94 phy_data->tx_disabled = efx->tx_disabled;
95
82 rc = xfp_reset_phy(efx); 96 rc = xfp_reset_phy(efx);
83 97
84 EFX_INFO(efx, "XFP: PHY init %s.\n", 98 EFX_INFO(efx, "XFP: PHY init %s.\n",
85 rc ? "failed" : "successful"); 99 rc ? "failed" : "successful");
100 if (rc < 0)
101 goto fail;
86 102
103 return 0;
104
105 fail:
106 kfree(efx->phy_data);
107 efx->phy_data = NULL;
87 return rc; 108 return rc;
88} 109}
89 110
@@ -110,6 +131,16 @@ static int xfp_phy_check_hw(struct efx_nic *efx)
110 131
111static void xfp_phy_reconfigure(struct efx_nic *efx) 132static void xfp_phy_reconfigure(struct efx_nic *efx)
112{ 133{
134 struct xfp_phy_data *phy_data = efx->phy_data;
135
136 /* Reset the PHY when moving from tx off to tx on */
137 if (phy_data->tx_disabled && !efx->tx_disabled)
138 xfp_reset_phy(efx);
139
140 mdio_clause45_transmit_disable(efx);
141 mdio_clause45_phy_reconfigure(efx);
142
143 phy_data->tx_disabled = efx->tx_disabled;
113 efx->link_up = xfp_link_ok(efx); 144 efx->link_up = xfp_link_ok(efx);
114 efx->link_options = GM_LPA_10000FULL; 145 efx->link_options = GM_LPA_10000FULL;
115} 146}
@@ -119,6 +150,10 @@ static void xfp_phy_fini(struct efx_nic *efx)
119{ 150{
120 /* Clobber the LED if it was blinking */ 151 /* Clobber the LED if it was blinking */
121 efx->board_info.blink(efx, 0); 152 efx->board_info.blink(efx, 0);
153
154 /* Free the context block */
155 kfree(efx->phy_data);
156 efx->phy_data = NULL;
122} 157}
123 158
124struct efx_phy_operations falcon_xfp_phy_ops = { 159struct efx_phy_operations falcon_xfp_phy_ops = {
@@ -129,4 +164,5 @@ struct efx_phy_operations falcon_xfp_phy_ops = {
129 .clear_interrupt = xfp_phy_clear_interrupt, 164 .clear_interrupt = xfp_phy_clear_interrupt,
130 .reset_xaui = efx_port_dummy_op_void, 165 .reset_xaui = efx_port_dummy_op_void,
131 .mmds = XFP_REQUIRED_DEVS, 166 .mmds = XFP_REQUIRED_DEVS,
167 .loopbacks = XFP_LOOPBACKS,
132}; 168};
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-05 14:01:12 -0500