Merge branch 'mpi-master' into wip-k-fmlpwip-k-fmlp

Conflicts:
	litmus/sched_cedf.c

1 files changed, 428 insertions, 221 deletions

diff --git a/drivers/net/qlcnic/qlcnic.h b/drivers/net/qlcnic/qlcnic.h
index 970389331bbc..480ef5cb6ef9 100644
--- a/drivers/net/qlcnic/qlcnic.h
+++ b/drivers/net/qlcnic/qlcnic.h
@@ -1,25 +1,8 @@
 /*
- * Copyright (C) 2009 - QLogic Corporation.
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
- * MA  02111-1307, USA.
- *
- * The full GNU General Public License is included in this distribution
- * in the file called "COPYING".
+ * QLogic qlcnic NIC Driver
+ * Copyright (c)  2009-2010 QLogic Corporation
  *
+ * See LICENSE.qlcnic for copyright and licensing details.
  */
 
 #ifndef _QLCNIC_H_
@@ -46,14 +29,18 @@
 
 #include <linux/io.h>
 #include <asm/byteorder.h>
+#include <linux/bitops.h>
+#include <linux/if_vlan.h>
 
 #include "qlcnic_hdr.h"
 
 #define _QLCNIC_LINUX_MAJOR 5
 #define _QLCNIC_LINUX_MINOR 0
-#define _QLCNIC_LINUX_SUBVERSION 7
-#define QLCNIC_LINUX_VERSIONID  "5.0.7"
+#define _QLCNIC_LINUX_SUBVERSION 18
+#define QLCNIC_LINUX_VERSIONID  "5.0.18"
 #define QLCNIC_DRV_IDC_VER  0x01
+#define QLCNIC_DRIVER_VERSION  ((_QLCNIC_LINUX_MAJOR << 16) |\
+                 (_QLCNIC_LINUX_MINOR << 8) | (_QLCNIC_LINUX_SUBVERSION))
 
 #define QLCNIC_VERSION_CODE(a, b, c)    (((a) << 24) + ((b) << 16) + (c))
 #define _major(v)       (((v) >> 24) & 0xff)
@@ -92,11 +79,12 @@
 #define FIRST_PAGE_GROUP_START  0
 #define FIRST_PAGE_GROUP_END    0x100000
 
-#define P3_MAX_MTU                     (9600)
+#define P3P_MAX_MTU                     (9600)
+#define P3P_MIN_MTU                     (68)
 #define QLCNIC_MAX_ETHERHDR                32 /* This contains some padding */
 
-#define QLCNIC_P3_RX_BUF_MAX_LEN         (QLCNIC_MAX_ETHERHDR + ETH_DATA_LEN)
-#define QLCNIC_P3_RX_JUMBO_BUF_MAX_LEN   (QLCNIC_MAX_ETHERHDR + P3_MAX_MTU)
+#define QLCNIC_P3P_RX_BUF_MAX_LEN         (QLCNIC_MAX_ETHERHDR + ETH_DATA_LEN)
+#define QLCNIC_P3P_RX_JUMBO_BUF_MAX_LEN   (QLCNIC_MAX_ETHERHDR + P3P_MAX_MTU)
 #define QLCNIC_CT_DEFAULT_RX_BUF_LEN    2048
 #define QLCNIC_LRO_BUFFER_EXTRA         2048
 
@@ -107,12 +95,11 @@
 #define TX_IP_PKT       0x04
 #define TX_TCP_LSO      0x05
 #define TX_TCP_LSO6     0x06
-#define TX_IPSEC        0x07
-#define TX_IPSEC_CMD    0x0a
 #define TX_TCPV6_PKT    0x0b
 #define TX_UDPV6_PKT    0x0c
 
 /* Tx defines */
+#define QLCNIC_MAX_FRAGS_PER_TX 14
 #define MAX_TSO_HEADER_DESC     2
 #define MGMT_CMD_DESC_RESV      4
 #define TX_STOP_THRESH          ((MAX_SKB_FRAGS >> 2) + MAX_TSO_HEADER_DESC \
@@ -131,7 +118,6 @@
 #define PHAN_PEG_RCV_INITIALIZED        0xff01
 
 #define NUM_RCV_DESC_RINGS      3
-#define NUM_STS_DESC_RINGS      4
 
 #define RCV_RING_NORMAL 0
 #define RCV_RING_JUMBO  1
@@ -143,11 +129,14 @@
 #define MAX_CMD_DESCRIPTORS             1024
 #define MAX_RCV_DESCRIPTORS_1G          4096
 #define MAX_RCV_DESCRIPTORS_10G         8192
+#define MAX_RCV_DESCRIPTORS_VF          2048
 #define MAX_JUMBO_RCV_DESCRIPTORS_1G    512
 #define MAX_JUMBO_RCV_DESCRIPTORS_10G   1024
 
 #define DEFAULT_RCV_DESCRIPTORS_1G      2048
 #define DEFAULT_RCV_DESCRIPTORS_10G     4096
+#define DEFAULT_RCV_DESCRIPTORS_VF      1024
+#define MAX_RDS_RINGS                   2
 
 #define get_next_index(index, length)   \
         (((index) + 1) & ((length) - 1))
@@ -172,7 +161,7 @@
         ((_desc)->port_ctxid = ((_port) & 0xf) | (((_port) << 4) & 0xf0))
 
 #define qlcnic_set_tx_flags_opcode(_desc, _flags, _opcode) \
-        ((_desc)->flags_opcode = \
+        ((_desc)->flags_opcode |= \
         cpu_to_le16(((_flags) & 0x7f) | (((_opcode) & 0x3f) << 7)))
 
 #define qlcnic_set_tx_frags_len(_desc, _frags, _len) \
@@ -211,7 +200,7 @@ struct rcv_desc {
         __le16 reserved;
         __le32 buffer_length;   /* allocated buffer length (usually 2K) */
         __le64 addr_buffer;
-};
+} __packed;
 
 /* opcode field in status_desc */
 #define QLCNIC_SYN_OFFLOAD      0x03
@@ -221,7 +210,8 @@ struct rcv_desc {
 #define QLCNIC_LRO_DESC         0x12
 
 /* for status field in status_desc */
-#define STATUS_CKSUM_OK         (2)
+#define STATUS_CKSUM_LOOP       0
+#define STATUS_CKSUM_OK         2
 
 /* owner bits of status_desc */
 #define STATUS_OWNER_HOST       (0x1ULL << 56)
@@ -299,23 +289,44 @@ struct uni_data_desc{
         u32     reserved[5];
 };
 
+/* Flash Defines and Structures */
+#define QLCNIC_FLT_LOCATION     0x3F1000
+#define QLCNIC_FW_IMAGE_REGION  0x74
+#define QLCNIC_BOOTLD_REGION    0X72
+struct qlcnic_flt_header {
+        u16 version;
+        u16 len;
+        u16 checksum;
+        u16 reserved;
+};
+
+struct qlcnic_flt_entry {
+        u8 region;
+        u8 reserved0;
+        u8 attrib;
+        u8 reserved1;
+        u32 size;
+        u32 start_addr;
+        u32 end_addr;
+};
+
 /* Magic number to let user know flash is programmed */
 #define QLCNIC_BDINFO_MAGIC 0x12345678
 
-#define QLCNIC_BRDTYPE_P3_REF_QG        0x0021
-#define QLCNIC_BRDTYPE_P3_HMEZ          0x0022
-#define QLCNIC_BRDTYPE_P3_10G_CX4_LP    0x0023
-#define QLCNIC_BRDTYPE_P3_4_GB          0x0024
-#define QLCNIC_BRDTYPE_P3_IMEZ          0x0025
-#define QLCNIC_BRDTYPE_P3_10G_SFP_PLUS  0x0026
-#define QLCNIC_BRDTYPE_P3_10000_BASE_T  0x0027
-#define QLCNIC_BRDTYPE_P3_XG_LOM        0x0028
-#define QLCNIC_BRDTYPE_P3_4_GB_MM       0x0029
-#define QLCNIC_BRDTYPE_P3_10G_SFP_CT    0x002a
-#define QLCNIC_BRDTYPE_P3_10G_SFP_QT    0x002b
-#define QLCNIC_BRDTYPE_P3_10G_CX4       0x0031
-#define QLCNIC_BRDTYPE_P3_10G_XFP       0x0032
-#define QLCNIC_BRDTYPE_P3_10G_TP        0x0080
+#define QLCNIC_BRDTYPE_P3P_REF_QG       0x0021
+#define QLCNIC_BRDTYPE_P3P_HMEZ         0x0022
+#define QLCNIC_BRDTYPE_P3P_10G_CX4_LP   0x0023
+#define QLCNIC_BRDTYPE_P3P_4_GB         0x0024
+#define QLCNIC_BRDTYPE_P3P_IMEZ         0x0025
+#define QLCNIC_BRDTYPE_P3P_10G_SFP_PLUS 0x0026
+#define QLCNIC_BRDTYPE_P3P_10000_BASE_T 0x0027
+#define QLCNIC_BRDTYPE_P3P_XG_LOM       0x0028
+#define QLCNIC_BRDTYPE_P3P_4_GB_MM      0x0029
+#define QLCNIC_BRDTYPE_P3P_10G_SFP_CT   0x002a
+#define QLCNIC_BRDTYPE_P3P_10G_SFP_QT   0x002b
+#define QLCNIC_BRDTYPE_P3P_10G_CX4      0x0031
+#define QLCNIC_BRDTYPE_P3P_10G_XFP      0x0032
+#define QLCNIC_BRDTYPE_P3P_10G_TP       0x0080
 
 #define QLCNIC_MSIX_TABLE_OFFSET        0x44
 
@@ -355,12 +366,6 @@ struct qlcnic_skb_frag {
         u64 length;
 };
 
-struct qlcnic_recv_crb {
-        u32 crb_rcv_producer[NUM_RCV_DESC_RINGS];
-        u32 crb_sts_consumer[NUM_STS_DESC_RINGS];
-        u32 sw_int_mask[NUM_STS_DESC_RINGS];
-};
-
 /*    Following defines are for the state of the buffers    */
 #define QLCNIC_BUFFER_FREE      0
 #define QLCNIC_BUFFER_BUSY      1
@@ -377,10 +382,10 @@ struct qlcnic_cmd_buffer {
 
 /* In rx_buffer, we do not need multiple fragments as is a single buffer */
 struct qlcnic_rx_buffer {
-        struct list_head list;
+        u16 ref_handle;
         struct sk_buff *skb;
+        struct list_head list;
         u64 dma;
-        u16 ref_handle;
 };
 
 /* Board types */
@@ -388,6 +393,48 @@ struct qlcnic_rx_buffer {
 #define QLCNIC_XGBE     0x02
 
 /*
+ * Interrupt coalescing defaults. The defaults are for 1500 MTU. It is
+ * adjusted based on configured MTU.
+ */
+#define QLCNIC_DEFAULT_INTR_COALESCE_RX_TIME_US 3
+#define QLCNIC_DEFAULT_INTR_COALESCE_RX_PACKETS 256
+
+#define QLCNIC_INTR_DEFAULT                     0x04
+#define QLCNIC_CONFIG_INTR_COALESCE             3
+
+struct qlcnic_nic_intr_coalesce {
+        u8      type;
+        u8      sts_ring_mask;
+        u16     rx_packets;
+        u16     rx_time_us;
+        u16     flag;
+        u32     timer_out;
+};
+
+struct qlcnic_dump_template_hdr {
+        __le32  type;
+        __le32  offset;
+        __le32  size;
+        __le32  cap_mask;
+        __le32  num_entries;
+        __le32  version;
+        __le32  timestamp;
+        __le32  checksum;
+        __le32  drv_cap_mask;
+        __le32  sys_info[3];
+        __le32  saved_state[16];
+        __le32  cap_sizes[8];
+        __le32  rsvd[0];
+};
+
+struct qlcnic_fw_dump {
+        u8      clr;    /* flag to indicate if dump is cleared */
+        u32     size;   /* total size of the dump */
+        void    *data;  /* dump data area */
+        struct  qlcnic_dump_template_hdr *tmpl_hdr;
+};
+
+/*
  * One hardware_context{} per adapter
  * contains interrupt info as well shared hardware info.
  */
@@ -405,6 +452,9 @@ struct qlcnic_hardware_context {
         u8 linkup;
         u16 port_type;
         u16 board_type;
+
+        struct qlcnic_nic_intr_coalesce coal;
+        struct qlcnic_fw_dump fw_dump;
 };
 
 struct qlcnic_adapter_stats {
@@ -432,50 +482,49 @@ struct qlcnic_adapter_stats {
  * be one Rcv Descriptor for normal packets, one for jumbo and may be others.
  */
 struct qlcnic_host_rds_ring {
-        u32 producer;
+        void __iomem *crb_rcv_producer;
+        struct rcv_desc *desc_head;
+        struct qlcnic_rx_buffer *rx_buf_arr;
         u32 num_desc;
+        u32 producer;
         u32 dma_size;
         u32 skb_size;
         u32 flags;
-        void __iomem *crb_rcv_producer;
-        struct rcv_desc *desc_head;
-        struct qlcnic_rx_buffer *rx_buf_arr;
         struct list_head free_list;
         spinlock_t lock;
         dma_addr_t phys_addr;
-};
+} ____cacheline_internodealigned_in_smp;
 
 struct qlcnic_host_sds_ring {
         u32 consumer;
         u32 num_desc;
         void __iomem *crb_sts_consumer;
-        void __iomem *crb_intr_mask;
 
         struct status_desc *desc_head;
         struct qlcnic_adapter *adapter;
         struct napi_struct napi;
         struct list_head free_list[NUM_RCV_DESC_RINGS];
 
+        void __iomem *crb_intr_mask;
         int irq;
 
         dma_addr_t phys_addr;
         char name[IFNAMSIZ+4];
-};
+} ____cacheline_internodealigned_in_smp;
 
 struct qlcnic_host_tx_ring {
         u32 producer;
-        __le32 *hw_consumer;
         u32 sw_consumer;
-        void __iomem *crb_cmd_producer;
         u32 num_desc;
-
-        struct netdev_queue *txq;
-
-        struct qlcnic_cmd_buffer *cmd_buf_arr;
+        void __iomem *crb_cmd_producer;
         struct cmd_desc_type0 *desc_head;
+        struct qlcnic_cmd_buffer *cmd_buf_arr;
+        __le32 *hw_consumer;
+
         dma_addr_t phys_addr;
         dma_addr_t hw_cons_phys_addr;
-};
+        struct netdev_queue *txq;
+} ____cacheline_internodealigned_in_smp;
 
 /*
  * Receive context. There is one such structure per instance of the
@@ -484,12 +533,12 @@ struct qlcnic_host_tx_ring {
  * present elsewhere.
  */
 struct qlcnic_recv_context {
+        struct qlcnic_host_rds_ring *rds_rings;
+        struct qlcnic_host_sds_ring *sds_rings;
         u32 state;
         u16 context_id;
         u16 virt_port;
 
-        struct qlcnic_host_rds_ring *rds_rings;
-        struct qlcnic_host_sds_ring *sds_rings;
 };
 
 /* HW context creation */
@@ -528,9 +577,6 @@ struct qlcnic_recv_context {
 #define QLCNIC_CDRP_CMD_DESTROY_RX_CTX          0x00000008
 #define QLCNIC_CDRP_CMD_CREATE_TX_CTX           0x00000009
 #define QLCNIC_CDRP_CMD_DESTROY_TX_CTX          0x0000000a
-#define QLCNIC_CDRP_CMD_SETUP_STATISTICS        0x0000000e
-#define QLCNIC_CDRP_CMD_GET_STATISTICS          0x0000000f
-#define QLCNIC_CDRP_CMD_DELETE_STATISTICS       0x00000010
 #define QLCNIC_CDRP_CMD_SET_MTU                 0x00000012
 #define QLCNIC_CDRP_CMD_READ_PHY                0x00000013
 #define QLCNIC_CDRP_CMD_WRITE_PHY               0x00000014
@@ -539,24 +585,24 @@ struct qlcnic_recv_context {
 #define QLCNIC_CDRP_CMD_SET_FLOW_CTL            0x00000017
 #define QLCNIC_CDRP_CMD_READ_MAX_MTU            0x00000018
 #define QLCNIC_CDRP_CMD_READ_MAX_LRO            0x00000019
-#define QLCNIC_CDRP_CMD_CONFIGURE_TOE           0x0000001a
-#define QLCNIC_CDRP_CMD_FUNC_ATTRIB             0x0000001b
-#define QLCNIC_CDRP_CMD_READ_PEXQ_PARAMETERS    0x0000001c
-#define QLCNIC_CDRP_CMD_GET_LIC_CAPABILITIES    0x0000001d
-#define QLCNIC_CDRP_CMD_READ_MAX_LRO_PER_BOARD  0x0000001e
 #define QLCNIC_CDRP_CMD_MAC_ADDRESS             0x0000001f
 
 #define QLCNIC_CDRP_CMD_GET_PCI_INFO            0x00000020
 #define QLCNIC_CDRP_CMD_GET_NIC_INFO            0x00000021
 #define QLCNIC_CDRP_CMD_SET_NIC_INFO            0x00000022
-#define QLCNIC_CDRP_CMD_RESET_NPAR              0x00000023
 #define QLCNIC_CDRP_CMD_GET_ESWITCH_CAPABILITY  0x00000024
 #define QLCNIC_CDRP_CMD_TOGGLE_ESWITCH          0x00000025
 #define QLCNIC_CDRP_CMD_GET_ESWITCH_STATUS      0x00000026
 #define QLCNIC_CDRP_CMD_SET_PORTMIRRORING       0x00000027
 #define QLCNIC_CDRP_CMD_CONFIGURE_ESWITCH       0x00000028
+#define QLCNIC_CDRP_CMD_GET_ESWITCH_PORT_CONFIG 0x00000029
+#define QLCNIC_CDRP_CMD_GET_ESWITCH_STATS       0x0000002a
+#define QLCNIC_CDRP_CMD_CONFIG_PORT             0x0000002E
+#define QLCNIC_CDRP_CMD_TEMP_SIZE               0x0000002f
+#define QLCNIC_CDRP_CMD_GET_TEMP_HDR            0x00000030
 
 #define QLCNIC_RCODE_SUCCESS            0
+#define QLCNIC_RCODE_NOT_SUPPORTED      9
 #define QLCNIC_RCODE_TIMEOUT            17
 #define QLCNIC_DESTROY_CTX_RESET        0
 
@@ -585,14 +631,14 @@ struct qlcnic_hostrq_sds_ring {
         __le32 ring_size;               /* Ring entries */
         __le16 msi_index;
         __le16 rsvd;            /* Padding */
-};
+} __packed;
 
 struct qlcnic_hostrq_rds_ring {
         __le64 host_phys_addr;  /* Ring base addr */
         __le64 buff_size;               /* Packet buffer size */
         __le32 ring_size;               /* Ring entries */
         __le32 ring_kind;               /* Class of ring */
-};
+} __packed;
 
 struct qlcnic_hostrq_rx_ctx {
         __le64 host_rsp_dma_addr;       /* Response dma'd here */
@@ -613,17 +659,17 @@ struct qlcnic_hostrq_rx_ctx {
            - N hostrq_rds_rings
            - N hostrq_sds_rings */
         char data[0];
-};
+} __packed;
 
 struct qlcnic_cardrsp_rds_ring{
         __le32 host_producer_crb;       /* Crb to use */
         __le32 rsvd1;           /* Padding */
-};
+} __packed;
 
 struct qlcnic_cardrsp_sds_ring {
         __le32 host_consumer_crb;       /* Crb to use */
         __le32 interrupt_crb;   /* Crb to use */
-};
+} __packed;
 
 struct qlcnic_cardrsp_rx_ctx {
         /* These ring offsets are relative to data[0] below */
@@ -642,7 +688,7 @@ struct qlcnic_cardrsp_rx_ctx {
            - N cardrsp_rds_rings
            - N cardrs_sds_rings */
         char data[0];
-};
+} __packed;
 
 #define SIZEOF_HOSTRQ_RX(HOSTRQ_RX, rds_rings, sds_rings)       \
         (sizeof(HOSTRQ_RX) +                                    \
@@ -662,7 +708,7 @@ struct qlcnic_hostrq_cds_ring {
         __le64 host_phys_addr;  /* Ring base addr */
         __le32 ring_size;               /* Ring entries */
         __le32 rsvd;            /* Padding */
-};
+} __packed;
 
 struct qlcnic_hostrq_tx_ctx {
         __le64 host_rsp_dma_addr;       /* Response dma'd here */
@@ -677,12 +723,12 @@ struct qlcnic_hostrq_tx_ctx {
         __le16 rsvd3;           /* Padding */
         struct qlcnic_hostrq_cds_ring cds_ring; /* Desc of cds ring */
         u8  reserved[128];      /* future expansion */
-};
+} __packed;
 
 struct qlcnic_cardrsp_cds_ring {
         __le32 host_producer_crb;       /* Crb to use */
         __le32 interrupt_crb;   /* Crb to use */
-};
+} __packed;
 
 struct qlcnic_cardrsp_tx_ctx {
         __le32 host_ctx_state;  /* Starting state */
@@ -691,7 +737,7 @@ struct qlcnic_cardrsp_tx_ctx {
         u8  virt_port;          /* Virtual/Logical id of port */
         struct qlcnic_cardrsp_cds_ring cds_ring;        /* Card cds settings */
         u8  reserved[128];      /* future expansion */
-};
+} __packed;
 
 #define SIZEOF_HOSTRQ_TX(HOSTRQ_TX)     (sizeof(HOSTRQ_TX))
 #define SIZEOF_CARDRSP_TX(CARDRSP_TX)   (sizeof(CARDRSP_TX))
@@ -712,51 +758,19 @@ struct qlcnic_cardrsp_tx_ctx {
 
 /* MAC */
 
-#define MC_COUNT_P3     38
+#define MC_COUNT_P3P    38
 
 #define QLCNIC_MAC_NOOP 0
 #define QLCNIC_MAC_ADD  1
 #define QLCNIC_MAC_DEL  2
+#define QLCNIC_MAC_VLAN_ADD     3
+#define QLCNIC_MAC_VLAN_DEL     4
 
 struct qlcnic_mac_list_s {
         struct list_head list;
         uint8_t mac_addr[ETH_ALEN+2];
 };
 
-/*
- * Interrupt coalescing defaults. The defaults are for 1500 MTU. It is
- * adjusted based on configured MTU.
- */
-#define QLCNIC_DEFAULT_INTR_COALESCE_RX_TIME_US 3
-#define QLCNIC_DEFAULT_INTR_COALESCE_RX_PACKETS 256
-#define QLCNIC_DEFAULT_INTR_COALESCE_TX_PACKETS 64
-#define QLCNIC_DEFAULT_INTR_COALESCE_TX_TIME_US 4
-
-#define QLCNIC_INTR_DEFAULT                     0x04
-
-union qlcnic_nic_intr_coalesce_data {
-        struct {
-                u16     rx_packets;
-                u16     rx_time_us;
-                u16     tx_packets;
-                u16     tx_time_us;
-        } data;
-        u64             word;
-};
-
-struct qlcnic_nic_intr_coalesce {
-        u16             stats_time_us;
-        u16             rate_sample_time;
-        u16             flags;
-        u16             rsvd_1;
-        u32             low_threshold;
-        u32             high_threshold;
-        union qlcnic_nic_intr_coalesce_data     normal;
-        union qlcnic_nic_intr_coalesce_data     low;
-        union qlcnic_nic_intr_coalesce_data     high;
-        union qlcnic_nic_intr_coalesce_data     irq;
-};
-
 #define QLCNIC_HOST_REQUEST     0x13
 #define QLCNIC_REQUEST          0x14
 
@@ -768,51 +782,20 @@ struct qlcnic_nic_intr_coalesce {
 /*
  * Driver --> Firmware
  */
-#define QLCNIC_H2C_OPCODE_START                         0
-#define QLCNIC_H2C_OPCODE_CONFIG_RSS                    1
-#define QLCNIC_H2C_OPCODE_CONFIG_RSS_TBL                2
-#define QLCNIC_H2C_OPCODE_CONFIG_INTR_COALESCE          3
-#define QLCNIC_H2C_OPCODE_CONFIG_LED                    4
-#define QLCNIC_H2C_OPCODE_CONFIG_PROMISCUOUS            5
-#define QLCNIC_H2C_OPCODE_CONFIG_L2_MAC                 6
-#define QLCNIC_H2C_OPCODE_LRO_REQUEST                   7
-#define QLCNIC_H2C_OPCODE_GET_SNMP_STATS                8
-#define QLCNIC_H2C_OPCODE_PROXY_START_REQUEST           9
-#define QLCNIC_H2C_OPCODE_PROXY_STOP_REQUEST            10
-#define QLCNIC_H2C_OPCODE_PROXY_SET_MTU                 11
-#define QLCNIC_H2C_OPCODE_PROXY_SET_VPORT_MISS_MODE     12
-#define QLCNIC_H2C_OPCODE_GET_FINGER_PRINT_REQUEST      13
-#define QLCNIC_H2C_OPCODE_INSTALL_LICENSE_REQUEST       14
-#define QLCNIC_H2C_OPCODE_GET_LICENSE_CAPABILITY_REQUEST        15
-#define QLCNIC_H2C_OPCODE_GET_NET_STATS                 16
-#define QLCNIC_H2C_OPCODE_PROXY_UPDATE_P2V              17
-#define QLCNIC_H2C_OPCODE_CONFIG_IPADDR                 18
-#define QLCNIC_H2C_OPCODE_CONFIG_LOOPBACK               19
-#define QLCNIC_H2C_OPCODE_PROXY_STOP_DONE               20
-#define QLCNIC_H2C_OPCODE_GET_LINKEVENT                 21
-#define QLCNIC_C2C_OPCODE                               22
-#define QLCNIC_H2C_OPCODE_CONFIG_BRIDGING               23
-#define QLCNIC_H2C_OPCODE_CONFIG_HW_LRO                 24
-#define QLCNIC_H2C_OPCODE_LAST                          25
+#define QLCNIC_H2C_OPCODE_CONFIG_RSS                    0x1
+#define QLCNIC_H2C_OPCODE_CONFIG_INTR_COALESCE          0x3
+#define QLCNIC_H2C_OPCODE_CONFIG_LED                    0x4
+#define QLCNIC_H2C_OPCODE_LRO_REQUEST                   0x7
+#define QLCNIC_H2C_OPCODE_SET_MAC_RECEIVE_MODE          0xc
+#define QLCNIC_H2C_OPCODE_CONFIG_IPADDR         0x12
+#define QLCNIC_H2C_OPCODE_GET_LINKEVENT         0x15
+#define QLCNIC_H2C_OPCODE_CONFIG_BRIDGING               0x17
+#define QLCNIC_H2C_OPCODE_CONFIG_HW_LRO         0x18
 /*
  * Firmware --> Driver
  */
 
-#define QLCNIC_C2H_OPCODE_START                         128
-#define QLCNIC_C2H_OPCODE_CONFIG_RSS_RESPONSE           129
-#define QLCNIC_C2H_OPCODE_CONFIG_RSS_TBL_RESPONSE       130
-#define QLCNIC_C2H_OPCODE_CONFIG_MAC_RESPONSE           131
-#define QLCNIC_C2H_OPCODE_CONFIG_PROMISCUOUS_RESPONSE   132
-#define QLCNIC_C2H_OPCODE_CONFIG_L2_MAC_RESPONSE        133
-#define QLCNIC_C2H_OPCODE_LRO_DELETE_RESPONSE           134
-#define QLCNIC_C2H_OPCODE_LRO_ADD_FAILURE_RESPONSE      135
-#define QLCNIC_C2H_OPCODE_GET_SNMP_STATS                136
-#define QLCNIC_C2H_OPCODE_GET_FINGER_PRINT_REPLY        137
-#define QLCNIC_C2H_OPCODE_INSTALL_LICENSE_REPLY         138
-#define QLCNIC_C2H_OPCODE_GET_LICENSE_CAPABILITIES_REPLY 139
-#define QLCNIC_C2H_OPCODE_GET_NET_STATS_RESPONSE        140
 #define QLCNIC_C2H_OPCODE_GET_LINKEVENT_RESPONSE        141
-#define QLCNIC_C2H_OPCODE_LAST                          142
 
 #define VPORT_MISS_MODE_DROP            0 /* drop all unmatched */
 #define VPORT_MISS_MODE_ACCEPT_ALL      1 /* accept all packets */
@@ -854,7 +837,6 @@ struct qlcnic_nic_intr_coalesce {
 #define LINKEVENT_LINKSPEED_MBPS        0
 #define LINKEVENT_LINKSPEED_ENCODED     1
 
-#define AUTO_FW_RESET_ENABLED   0x01
 /* firmware response header:
  *      63:58 - message type
  *      57:56 - owner
@@ -882,7 +864,7 @@ struct qlcnic_nic_req {
         __le64 qhdr;
         __le64 req_hdr;
         __le64 words[6];
-};
+} __packed;
 
 struct qlcnic_mac_req {
         u8 op;
@@ -890,16 +872,34 @@ struct qlcnic_mac_req {
         u8 mac_addr[6];
 };
 
+struct qlcnic_vlan_req {
+        __le16 vlan_id;
+        __le16 rsvd[3];
+} __packed;
+
+struct qlcnic_ipaddr {
+        __be32 ipv4;
+        __be32 ipv6[4];
+};
+
 #define QLCNIC_MSI_ENABLED              0x02
 #define QLCNIC_MSIX_ENABLED             0x04
 #define QLCNIC_LRO_ENABLED              0x08
+#define QLCNIC_LRO_DISABLED             0x00
 #define QLCNIC_BRIDGE_ENABLED           0X10
 #define QLCNIC_DIAG_ENABLED             0x20
 #define QLCNIC_ESWITCH_ENABLED          0x40
+#define QLCNIC_ADAPTER_INITIALIZED      0x80
+#define QLCNIC_TAGGING_ENABLED          0x100
+#define QLCNIC_MACSPOOF                 0x200
+#define QLCNIC_MAC_OVERRIDE_DISABLED    0x400
+#define QLCNIC_PROMISC_DISABLED         0x800
+#define QLCNIC_NEED_FLR                 0x1000
 #define QLCNIC_IS_MSI_FAMILY(adapter) \
         ((adapter)->flags & (QLCNIC_MSI_ENABLED | QLCNIC_MSIX_ENABLED))
 
-#define MSIX_ENTRIES_PER_ADAPTER        NUM_STS_DESC_RINGS
+#define QLCNIC_DEF_NUM_STS_DESC_RINGS   4
+#define QLCNIC_MIN_NUM_RSS_RINGS        2
 #define QLCNIC_MSIX_TBL_SPACE           8192
 #define QLCNIC_PCI_REG_MSIX_TBL         0x44
 #define QLCNIC_MSIX_TBL_PGSIZE          4096
@@ -912,35 +912,54 @@ struct qlcnic_mac_req {
 #define __QLCNIC_RESETTING              2
 #define __QLCNIC_START_FW               4
 #define __QLCNIC_AER                    5
+#define __QLCNIC_DIAG_RES_ALLOC         6
 
 #define QLCNIC_INTERRUPT_TEST           1
 #define QLCNIC_LOOPBACK_TEST            2
+#define QLCNIC_LED_TEST         3
 
-struct qlcnic_adapter {
-        struct qlcnic_hardware_context ahw;
+#define QLCNIC_FILTER_AGE       80
+#define QLCNIC_READD_AGE        20
+#define QLCNIC_LB_MAX_FILTERS   64
+
+struct qlcnic_filter {
+        struct hlist_node fnode;
+        u8 faddr[ETH_ALEN];
+        __le16 vlan_id;
+        unsigned long ftime;
+};
+
+struct qlcnic_filter_hash {
+        struct hlist_head *fhead;
+        u8 fnum;
+        u8 fmax;
+};
 
+struct qlcnic_adapter {
+        struct qlcnic_hardware_context *ahw;
+        struct qlcnic_recv_context *recv_ctx;
+        struct qlcnic_host_tx_ring *tx_ring;
         struct net_device *netdev;
         struct pci_dev *pdev;
-        struct list_head mac_list;
 
-        spinlock_t tx_clean_lock;
+        unsigned long state;
+        u32 flags;
 
         u16 num_txd;
         u16 num_rxd;
         u16 num_jumbo_rxd;
+        u16 max_rxd;
+        u16 max_jumbo_rxd;
 
         u8 max_rds_rings;
         u8 max_sds_rings;
-        u8 driver_mismatch;
         u8 msix_supported;
-        u8 rx_csum;
         u8 portnum;
         u8 physical_port;
         u8 reset_context;
 
         u8 mc_enabled;
         u8 max_mc_count;
-        u8 rss_supported;
         u8 fw_wait_cnt;
         u8 fw_fail_cnt;
         u8 tx_timeo_cnt;
@@ -961,15 +980,15 @@ struct qlcnic_adapter {
         u16 max_tx_ques;
         u16 max_rx_ques;
         u16 max_mtu;
+        u16 pvid;
 
         u32 fw_hal_version;
         u32 capabilities;
-        u32 flags;
         u32 irq;
         u32 temp;
 
         u32 int_vec_bit;
-        u32 heartbit;
+        u32 heartbeat;
 
         u8 max_mac_filters;
         u8 dev_state;
@@ -982,28 +1001,29 @@ struct qlcnic_adapter {
         u8 mac_addr[ETH_ALEN];
 
         u64 dev_rst_time;
+        unsigned long vlans[BITS_TO_LONGS(VLAN_N_VID)];
 
         struct qlcnic_npar_info *npars;
         struct qlcnic_eswitch *eswitch;
         struct qlcnic_nic_template *nic_ops;
 
         struct qlcnic_adapter_stats stats;
-
-        struct qlcnic_recv_context recv_ctx;
-        struct qlcnic_host_tx_ring *tx_ring;
+        struct list_head mac_list;
 
         void __iomem    *tgt_mask_reg;
         void __iomem    *tgt_status_reg;
         void __iomem    *crb_int_state_reg;
         void __iomem    *isr_int_vec;
 
-        struct msix_entry msix_entries[MSIX_ENTRIES_PER_ADAPTER];
+        struct msix_entry *msix_entries;
 
         struct delayed_work fw_work;
 
-        struct qlcnic_nic_intr_coalesce coal;
 
-        unsigned long state;
+        struct qlcnic_filter_hash fhash;
+
+        spinlock_t tx_clean_lock;
+        spinlock_t mac_learn_lock;
         __le32 file_prd_off;    /*File fw product offset*/
         u32 fw_version;
         const struct firmware *fw;
@@ -1025,7 +1045,7 @@ struct qlcnic_info {
         __le16  min_tx_bw;
         __le16  max_tx_bw;
         u8      reserved2[104];
-};
+} __packed;
 
 struct qlcnic_pci_info {
         __le16  id; /* pci function id */
@@ -1039,10 +1059,10 @@ struct qlcnic_pci_info {
 
         u8      mac[ETH_ALEN];
         u8      reserved2[106];
-};
+} __packed;
 
 struct qlcnic_npar_info {
-        u16     vlan_id;
+        u16     pvid;
         u16     min_bw;
         u16     max_bw;
         u8      phy_port;
@@ -1050,11 +1070,13 @@ struct qlcnic_npar_info {
         u8      active;
         u8      enable_pm;
         u8      dest_npar;
-        u8      host_vlan_tag;
-        u8      promisc_mode;
         u8      discard_tagged;
-        u8      mac_learning;
+        u8      mac_override;
+        u8      mac_anti_spoof;
+        u8      promisc_mode;
+        u8      offload_flags;
 };
+
 struct qlcnic_eswitch {
         u8      port;
         u8      active_vports;
@@ -1074,19 +1096,13 @@ struct qlcnic_eswitch {
 /* Return codes for Error handling */
 #define QL_STATUS_INVALID_PARAM -1
 
-#define MAX_BW                  100
-#define MIN_BW                  1
+#define MAX_BW                  100     /* % of link speed */
 #define MAX_VLAN_ID             4095
 #define MIN_VLAN_ID             2
-#define MAX_TX_QUEUES           1
-#define MAX_RX_QUEUES           4
 #define DEFAULT_MAC_LEARN       1
 
-#define IS_VALID_VLAN(vlan)     (vlan >= MIN_VLAN_ID && vlan <= MAX_VLAN_ID)
-#define IS_VALID_BW(bw)         (bw >= MIN_BW && bw <= MAX_BW)
-#define IS_VALID_TX_QUEUES(que) (que > 0 && que <= MAX_TX_QUEUES)
-#define IS_VALID_RX_QUEUES(que) (que > 0 && que <= MAX_RX_QUEUES)
-#define IS_VALID_MODE(mode)     (mode == 0 || mode == 1)
+#define IS_VALID_VLAN(vlan)     (vlan >= MIN_VLAN_ID && vlan < MAX_VLAN_ID)
+#define IS_VALID_BW(bw)         (bw <= MAX_BW)
 
 struct qlcnic_pci_func_cfg {
         u16     func_type;
@@ -1118,16 +1134,202 @@ struct qlcnic_pm_func_cfg {
 
 struct qlcnic_esw_func_cfg {
         u16     vlan_id;
+        u8      op_mode;
+        u8      op_type;
         u8      pci_func;
         u8      host_vlan_tag;
         u8      promisc_mode;
         u8      discard_tagged;
-        u8      mac_learning;
-        u8      reserved;
+        u8      mac_override;
+        u8      mac_anti_spoof;
+        u8      offload_flags;
+        u8      reserved[5];
+};
+
+#define QLCNIC_STATS_VERSION            1
+#define QLCNIC_STATS_PORT               1
+#define QLCNIC_STATS_ESWITCH            2
+#define QLCNIC_QUERY_RX_COUNTER         0
+#define QLCNIC_QUERY_TX_COUNTER         1
+#define QLCNIC_ESW_STATS_NOT_AVAIL      0xffffffffffffffffULL
+
+#define QLCNIC_ADD_ESW_STATS(VAL1, VAL2)\
+do {    \
+        if (((VAL1) == QLCNIC_ESW_STATS_NOT_AVAIL) && \
+            ((VAL2) != QLCNIC_ESW_STATS_NOT_AVAIL)) \
+                (VAL1) = (VAL2); \
+        else if (((VAL1) != QLCNIC_ESW_STATS_NOT_AVAIL) && \
+                 ((VAL2) != QLCNIC_ESW_STATS_NOT_AVAIL)) \
+                        (VAL1) += (VAL2); \
+} while (0)
+
+struct __qlcnic_esw_statistics {
+        __le16 context_id;
+        __le16 version;
+        __le16 size;
+        __le16 unused;
+        __le64 unicast_frames;
+        __le64 multicast_frames;
+        __le64 broadcast_frames;
+        __le64 dropped_frames;
+        __le64 errors;
+        __le64 local_frames;
+        __le64 numbytes;
+        __le64 rsvd[3];
+} __packed;
+
+struct qlcnic_esw_statistics {
+        struct __qlcnic_esw_statistics rx;
+        struct __qlcnic_esw_statistics tx;
+};
+
+struct qlcnic_common_entry_hdr {
+        __le32  type;
+        __le32  offset;
+        __le32  cap_size;
+        u8      mask;
+        u8      rsvd[2];
+        u8      flags;
+} __packed;
+
+struct __crb {
+        __le32  addr;
+        u8      stride;
+        u8      rsvd1[3];
+        __le32  data_size;
+        __le32  no_ops;
+        __le32  rsvd2[4];
+} __packed;
+
+struct __ctrl {
+        __le32  addr;
+        u8      stride;
+        u8      index_a;
+        __le16  timeout;
+        __le32  data_size;
+        __le32  no_ops;
+        u8      opcode;
+        u8      index_v;
+        u8      shl_val;
+        u8      shr_val;
+        __le32  val1;
+        __le32  val2;
+        __le32  val3;
+} __packed;
+
+struct __cache {
+        __le32  addr;
+        u8      stride;
+        u8      rsvd;
+        __le16  init_tag_val;
+        __le32  size;
+        __le32  no_ops;
+        __le32  ctrl_addr;
+        __le32  ctrl_val;
+        __le32  read_addr;
+        u8      read_addr_stride;
+        u8      read_addr_num;
+        u8      rsvd1[2];
+} __packed;
+
+struct __ocm {
+        u8      rsvd[8];
+        __le32  size;
+        __le32  no_ops;
+        u8      rsvd1[8];
+        __le32  read_addr;
+        __le32  read_addr_stride;
+} __packed;
+
+struct __mem {
+        u8      rsvd[24];
+        __le32  addr;
+        __le32  size;
+} __packed;
+
+struct __mux {
+        __le32  addr;
+        u8      rsvd[4];
+        __le32  size;
+        __le32  no_ops;
+        __le32  val;
+        __le32  val_stride;
+        __le32  read_addr;
+        u8      rsvd2[4];
+} __packed;
+
+struct __queue {
+        __le32  sel_addr;
+        __le16  stride;
+        u8      rsvd[2];
+        __le32  size;
+        __le32  no_ops;
+        u8      rsvd2[8];
+        __le32  read_addr;
+        u8      read_addr_stride;
+        u8      read_addr_cnt;
+        u8      rsvd3[2];
+} __packed;
+
+struct qlcnic_dump_entry {
+        struct qlcnic_common_entry_hdr hdr;
+        union {
+                struct __crb    crb;
+                struct __cache  cache;
+                struct __ocm    ocm;
+                struct __mem    mem;
+                struct __mux    mux;
+                struct __queue  que;
+                struct __ctrl   ctrl;
+        } region;
+} __packed;
+
+enum op_codes {
+        QLCNIC_DUMP_NOP         = 0,
+        QLCNIC_DUMP_READ_CRB    = 1,
+        QLCNIC_DUMP_READ_MUX    = 2,
+        QLCNIC_DUMP_QUEUE       = 3,
+        QLCNIC_DUMP_BRD_CONFIG  = 4,
+        QLCNIC_DUMP_READ_OCM    = 6,
+        QLCNIC_DUMP_PEG_REG     = 7,
+        QLCNIC_DUMP_L1_DTAG     = 8,
+        QLCNIC_DUMP_L1_ITAG     = 9,
+        QLCNIC_DUMP_L1_DATA     = 11,
+        QLCNIC_DUMP_L1_INST     = 12,
+        QLCNIC_DUMP_L2_DTAG     = 21,
+        QLCNIC_DUMP_L2_ITAG     = 22,
+        QLCNIC_DUMP_L2_DATA     = 23,
+        QLCNIC_DUMP_L2_INST     = 24,
+        QLCNIC_DUMP_READ_ROM    = 71,
+        QLCNIC_DUMP_READ_MEM    = 72,
+        QLCNIC_DUMP_READ_CTRL   = 98,
+        QLCNIC_DUMP_TLHDR       = 99,
+        QLCNIC_DUMP_RDEND       = 255
+};
+
+#define QLCNIC_DUMP_WCRB        BIT_0
+#define QLCNIC_DUMP_RWCRB       BIT_1
+#define QLCNIC_DUMP_ANDCRB      BIT_2
+#define QLCNIC_DUMP_ORCRB       BIT_3
+#define QLCNIC_DUMP_POLLCRB     BIT_4
+#define QLCNIC_DUMP_RD_SAVE     BIT_5
+#define QLCNIC_DUMP_WRT_SAVED   BIT_6
+#define QLCNIC_DUMP_MOD_SAVE_ST BIT_7
+#define QLCNIC_DUMP_SKIP        BIT_7
+
+#define QLCNIC_DUMP_MASK_MIN            3
+#define QLCNIC_DUMP_MASK_DEF            0x0f
+#define QLCNIC_DUMP_MASK_MAX            0xff
+#define QLCNIC_FORCE_FW_DUMP_KEY        0xdeadfeed
+
+struct qlcnic_dump_operations {
+        enum op_codes opcode;
+        u32 (*handler)(struct qlcnic_adapter *,
+                        struct qlcnic_dump_entry *, u32 *);
 };
 
-int qlcnic_fw_cmd_query_phy(struct qlcnic_adapter *adapter, u32 reg, u32 *val);
-int qlcnic_fw_cmd_set_phy(struct qlcnic_adapter *adapter, u32 reg, u32 val);
+int qlcnic_fw_cmd_get_minidump_temp(struct qlcnic_adapter *adapter);
+int qlcnic_fw_cmd_set_port(struct qlcnic_adapter *adapter, u32 config);
 
 u32 qlcnic_hw_read_wx_2M(struct qlcnic_adapter *adapter, ulong off);
 int qlcnic_hw_write_wx_2M(struct qlcnic_adapter *, ulong off, u32 data);
@@ -1171,6 +1373,9 @@ void qlcnic_pcie_sem_unlock(struct qlcnic_adapter *, int);
 int qlcnic_get_board_info(struct qlcnic_adapter *adapter);
 int qlcnic_wol_supported(struct qlcnic_adapter *adapter);
 int qlcnic_config_led(struct qlcnic_adapter *adapter, u32 state, u32 rate);
+void qlcnic_prune_lb_filters(struct qlcnic_adapter *adapter);
+void qlcnic_delete_lb_filters(struct qlcnic_adapter *adapter);
+int qlcnic_dump_fw(struct qlcnic_adapter *);
 
 /* Functions from qlcnic_init.c */
 int qlcnic_load_firmware(struct qlcnic_adapter *adapter);
@@ -1181,7 +1386,7 @@ int qlcnic_pinit_from_rom(struct qlcnic_adapter *adapter);
 int qlcnic_setup_idc_param(struct qlcnic_adapter *adapter);
 int qlcnic_check_flash_fw_ver(struct qlcnic_adapter *adapter);
 
-int qlcnic_rom_fast_read(struct qlcnic_adapter *adapter, int addr, int *valp);
+int qlcnic_rom_fast_read(struct qlcnic_adapter *adapter, u32 addr, u32 *valp);
 int qlcnic_rom_fast_read_words(struct qlcnic_adapter *adapter, int addr,
                                 u8 *bytes, size_t size);
 int qlcnic_alloc_sw_resources(struct qlcnic_adapter *adapter);
@@ -1199,9 +1404,9 @@ void qlcnic_reset_rx_buffers_list(struct qlcnic_adapter *adapter);
 void qlcnic_release_rx_buffers(struct qlcnic_adapter *adapter);
 void qlcnic_release_tx_buffers(struct qlcnic_adapter *adapter);
 
-int qlcnic_init_firmware(struct qlcnic_adapter *adapter);
+int qlcnic_check_fw_status(struct qlcnic_adapter *adapter);
 void qlcnic_watchdog_task(struct work_struct *work);
-void qlcnic_post_rx_buffers(struct qlcnic_adapter *adapter, u32 ringid,
+void qlcnic_post_rx_buffers(struct qlcnic_adapter *adapter,
                 struct qlcnic_host_rds_ring *rds_ring);
 int qlcnic_process_rcv_ring(struct qlcnic_host_sds_ring *sds_ring, int max);
 void qlcnic_set_multi(struct net_device *netdev);
@@ -1209,20 +1414,19 @@ void qlcnic_free_mac_list(struct qlcnic_adapter *adapter);
 int qlcnic_nic_set_promisc(struct qlcnic_adapter *adapter, u32);
 int qlcnic_config_intr_coalesce(struct qlcnic_adapter *adapter);
 int qlcnic_config_rss(struct qlcnic_adapter *adapter, int enable);
-int qlcnic_config_ipaddr(struct qlcnic_adapter *adapter, u32 ip, int cmd);
+int qlcnic_config_ipaddr(struct qlcnic_adapter *adapter, __be32 ip, int cmd);
 int qlcnic_linkevent_request(struct qlcnic_adapter *adapter, int enable);
 void qlcnic_advert_link_change(struct qlcnic_adapter *adapter, int linkup);
 
 int qlcnic_fw_cmd_set_mtu(struct qlcnic_adapter *adapter, int mtu);
 int qlcnic_change_mtu(struct net_device *netdev, int new_mtu);
+u32 qlcnic_fix_features(struct net_device *netdev, u32 features);
+int qlcnic_set_features(struct net_device *netdev, u32 features);
 int qlcnic_config_hw_lro(struct qlcnic_adapter *adapter, int enable);
 int qlcnic_config_bridged_mode(struct qlcnic_adapter *adapter, u32 enable);
 int qlcnic_send_lro_cleanup(struct qlcnic_adapter *adapter);
 void qlcnic_update_cmd_producer(struct qlcnic_adapter *adapter,
                 struct qlcnic_host_tx_ring *tx_ring);
-int qlcnic_get_mac_addr(struct qlcnic_adapter *adapter, u8 *mac);
-void qlcnic_clear_ilb_mode(struct qlcnic_adapter *adapter);
-int qlcnic_set_ilb_mode(struct qlcnic_adapter *adapter);
 void qlcnic_fetch_mac(struct qlcnic_adapter *, u32, u32, u8, u8 *);
 
 /* Functions from qlcnic_main.c */
@@ -1231,27 +1435,28 @@ u32 qlcnic_issue_cmd(struct qlcnic_adapter *adapter,
         u32 pci_fn, u32 version, u32 arg1, u32 arg2, u32 arg3, u32 cmd);
 void qlcnic_diag_free_res(struct net_device *netdev, int max_sds_rings);
 int qlcnic_diag_alloc_res(struct net_device *netdev, int test);
-int qlcnic_check_loopback_buff(unsigned char *data);
 netdev_tx_t qlcnic_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
-void qlcnic_process_rcv_ring_diag(struct qlcnic_host_sds_ring *sds_ring);
+int qlcnic_validate_max_rss(struct net_device *netdev, u8 max_hw, u8 val);
+int qlcnic_set_max_rss(struct qlcnic_adapter *adapter, u8 data);
+void qlcnic_dev_request_reset(struct qlcnic_adapter *);
 
 /* Management functions */
-int qlcnic_set_mac_address(struct qlcnic_adapter *, u8*);
 int qlcnic_get_mac_address(struct qlcnic_adapter *, u8*);
 int qlcnic_get_nic_info(struct qlcnic_adapter *, struct qlcnic_info *, u8);
 int qlcnic_set_nic_info(struct qlcnic_adapter *, struct qlcnic_info *);
 int qlcnic_get_pci_info(struct qlcnic_adapter *, struct qlcnic_pci_info*);
-int qlcnic_reset_partition(struct qlcnic_adapter *, u8);
 
 /*  eSwitch management functions */
-int qlcnic_get_eswitch_capabilities(struct qlcnic_adapter *, u8,
-                                struct qlcnic_eswitch *);
-int qlcnic_get_eswitch_status(struct qlcnic_adapter *, u8,
-                                struct qlcnic_eswitch *);
-int qlcnic_toggle_eswitch(struct qlcnic_adapter *, u8, u8);
-int qlcnic_config_switch_port(struct qlcnic_adapter *, u8, int, u8, u8,
-                        u8, u8, u16);
+int qlcnic_config_switch_port(struct qlcnic_adapter *,
+                                struct qlcnic_esw_func_cfg *);
+int qlcnic_get_eswitch_port_config(struct qlcnic_adapter *,
+                                struct qlcnic_esw_func_cfg *);
 int qlcnic_config_port_mirroring(struct qlcnic_adapter *, u8, u8, u8);
+int qlcnic_get_port_stats(struct qlcnic_adapter *, const u8, const u8,
+                                        struct __qlcnic_esw_statistics *);
+int qlcnic_get_eswitch_stats(struct qlcnic_adapter *, const u8, u8,
+                                        struct __qlcnic_esw_statistics *);
+int qlcnic_clear_esw_stats(struct qlcnic_adapter *adapter, u8, u8, u8);
 extern int qlcnic_config_tso;
 
 /*
@@ -1280,6 +1485,10 @@ static const struct qlcnic_brdinfo qlcnic_boards[] = {
                 "3200 Series Quad Port 1Gb Intelligent Ethernet Adapter"},
         {0x1077, 0x8020, 0x1077, 0x20f,
                 "3200 Series Single Port 10Gb Intelligent Ethernet Adapter"},
+        {0x1077, 0x8020, 0x103c, 0x3733,
+                "NC523SFP 10Gb 2-port Server Adapter"},
+        {0x1077, 0x8020, 0x103c, 0x3346,
+                "CN1000Q Dual Port Converged Network Adapter"},
         {0x1077, 0x8020, 0x0, 0x0, "cLOM8214 1/10GbE Controller"},
 };
 
@@ -1287,8 +1496,7 @@ static const struct qlcnic_brdinfo qlcnic_boards[] = {
 
 static inline u32 qlcnic_tx_avail(struct qlcnic_host_tx_ring *tx_ring)
 {
-        smp_mb();
-        if (tx_ring->producer < tx_ring->sw_consumer)
+        if (likely(tx_ring->producer < tx_ring->sw_consumer))
                 return tx_ring->sw_consumer - tx_ring->producer;
         else
                 return tx_ring->sw_consumer + tx_ring->num_desc -
@@ -1298,7 +1506,6 @@ static inline u32 qlcnic_tx_avail(struct qlcnic_host_tx_ring *tx_ring)
 extern const struct ethtool_ops qlcnic_ethtool_ops;
 
 struct qlcnic_nic_template {
-        int (*get_mac_addr) (struct qlcnic_adapter *, u8*);
         int (*config_bridged_mode) (struct qlcnic_adapter *, u32);
         int (*config_led) (struct qlcnic_adapter *, u32, u32);
         int (*start_firmware) (struct qlcnic_adapter *);