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authorDavid McKay <david.mckay@st.com>2012-02-21 16:24:57 -0500
committerDavid S. Miller <davem@davemloft.net>2012-02-23 17:14:26 -0500
commitb8e3995af4c7da7707b1710332a31f66e06b74dc (patch)
tree486ef40d3989e1abcaabe32666dc0615bd90740e /drivers/net/phy
parent03606895cd98c0a628b17324fd7b5ff15db7e3cd (diff)
netdev/phy/icplus: Correct broken phy_init code
The code for ip1001_config_init() was totally broken if you were not using RGMII. Instead of returning an error code or zero it actually returned the value in the IP1001_SPEC_CTRL_STATUS_2 register. It was also trying to set the IP1001_APS_ON bit , but never actually wrote back the register. The error checking was also incorrect in both this function and the reset function, so this patch fixes that up in a consistent fashion. Signed-off-by: David McKay <david.mckay@st.com> Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/phy')
-rw-r--r--drivers/net/phy/icplus.c24
1 files changed, 18 insertions, 6 deletions
diff --git a/drivers/net/phy/icplus.c b/drivers/net/phy/icplus.c
index c81f136ae670..7ee4f5822bb9 100644
--- a/drivers/net/phy/icplus.c
+++ b/drivers/net/phy/icplus.c
@@ -98,20 +98,24 @@ static int ip175c_config_init(struct phy_device *phydev)
98 98
99static int ip1xx_reset(struct phy_device *phydev) 99static int ip1xx_reset(struct phy_device *phydev)
100{ 100{
101 int err, bmcr; 101 int bmcr;
102 102
103 /* Software Reset PHY */ 103 /* Software Reset PHY */
104 bmcr = phy_read(phydev, MII_BMCR); 104 bmcr = phy_read(phydev, MII_BMCR);
105 if (bmcr < 0)
106 return bmcr;
105 bmcr |= BMCR_RESET; 107 bmcr |= BMCR_RESET;
106 err = phy_write(phydev, MII_BMCR, bmcr); 108 bmcr = phy_write(phydev, MII_BMCR, bmcr);
107 if (err < 0) 109 if (bmcr < 0)
108 return err; 110 return bmcr;
109 111
110 do { 112 do {
111 bmcr = phy_read(phydev, MII_BMCR); 113 bmcr = phy_read(phydev, MII_BMCR);
114 if (bmcr < 0)
115 return bmcr;
112 } while (bmcr & BMCR_RESET); 116 } while (bmcr & BMCR_RESET);
113 117
114 return err; 118 return 0;
115} 119}
116 120
117static int ip1001_config_init(struct phy_device *phydev) 121static int ip1001_config_init(struct phy_device *phydev)
@@ -124,7 +128,10 @@ static int ip1001_config_init(struct phy_device *phydev)
124 128
125 /* Enable Auto Power Saving mode */ 129 /* Enable Auto Power Saving mode */
126 c = phy_read(phydev, IP1001_SPEC_CTRL_STATUS_2); 130 c = phy_read(phydev, IP1001_SPEC_CTRL_STATUS_2);
131 if (c < 0)
132 return c;
127 c |= IP1001_APS_ON; 133 c |= IP1001_APS_ON;
134 c = phy_write(phydev, IP1001_SPEC_CTRL_STATUS_2, c);
128 if (c < 0) 135 if (c < 0)
129 return c; 136 return c;
130 137
@@ -132,11 +139,16 @@ static int ip1001_config_init(struct phy_device *phydev)
132 /* Additional delay (2ns) used to adjust RX clock phase 139 /* Additional delay (2ns) used to adjust RX clock phase
133 * at RGMII interface */ 140 * at RGMII interface */
134 c = phy_read(phydev, IP10XX_SPEC_CTRL_STATUS); 141 c = phy_read(phydev, IP10XX_SPEC_CTRL_STATUS);
142 if (c < 0)
143 return c;
144
135 c |= IP1001_PHASE_SEL_MASK; 145 c |= IP1001_PHASE_SEL_MASK;
136 c = phy_write(phydev, IP10XX_SPEC_CTRL_STATUS, c); 146 c = phy_write(phydev, IP10XX_SPEC_CTRL_STATUS, c);
147 if (c < 0)
148 return c;
137 } 149 }
138 150
139 return c; 151 return 0;
140} 152}
141 153
142static int ip101a_config_init(struct phy_device *phydev) 154static int ip101a_config_init(struct phy_device *phydev)