[NIU]: Support for Marvell PHY

From: Mirko Lindner <mlindner@marvell.com>

This patch makes necessary changes in the Neptune driver to support 
the new Marvell PHY. It also adds support for the LED blinking
on Neptune cards with Marvell PHY. All registers are using defines
in the niu.h header file as is already done for the BCM8704 registers.

[ Coding style, etc. cleanups -DaveM ]

Signed-off-by: David S. Miller <davem@davemloft.net>

1 files changed, 33 insertions, 0 deletions

diff --git a/drivers/net/niu.h b/drivers/net/niu.h
index 10e3f111b6d5..0e8626adc573 100644
--- a/drivers/net/niu.h
+++ b/drivers/net/niu.h
@@ -2538,6 +2538,39 @@ struct fcram_hash_ipv6 {
 #define NIU_PHY_ID_MASK                 0xfffff0f0
 #define NIU_PHY_ID_BCM8704              0x00206030
 #define NIU_PHY_ID_BCM5464R             0x002060b0
+#define NIU_PHY_ID_MRVL88X2011          0x01410020
+
+/* MRVL88X2011 register addresses */
+#define MRVL88X2011_USER_DEV1_ADDR      1
+#define MRVL88X2011_USER_DEV2_ADDR      2
+#define MRVL88X2011_USER_DEV3_ADDR      3
+#define MRVL88X2011_USER_DEV4_ADDR      4
+#define MRVL88X2011_PMA_PMD_CTL_1       0x0000
+#define MRVL88X2011_PMA_PMD_STATUS_1    0x0001
+#define MRVL88X2011_10G_PMD_STATUS_2    0x0008
+#define MRVL88X2011_10G_PMD_TX_DIS      0x0009
+#define MRVL88X2011_10G_XGXS_LANE_STAT  0x0018
+#define MRVL88X2011_GENERAL_CTL         0x8300
+#define MRVL88X2011_LED_BLINK_CTL       0x8303
+#define MRVL88X2011_LED_8_TO_11_CTL     0x8306
+
+/* MRVL88X2011 register control */
+#define MRVL88X2011_ENA_XFPREFCLK       0x0001
+#define MRVL88X2011_ENA_PMDTX           0x0000
+#define MRVL88X2011_LOOPBACK            0x1
+#define MRVL88X2011_LED_ACT             0x1
+#define MRVL88X2011_LNK_STATUS_OK       0x4
+#define MRVL88X2011_LED_BLKRATE_MASK    0x70
+#define MRVL88X2011_LED_BLKRATE_034MS   0x0
+#define MRVL88X2011_LED_BLKRATE_067MS   0x1
+#define MRVL88X2011_LED_BLKRATE_134MS   0x2
+#define MRVL88X2011_LED_BLKRATE_269MS   0x3
+#define MRVL88X2011_LED_BLKRATE_538MS   0x4
+#define MRVL88X2011_LED_CTL_OFF         0x0
+#define MRVL88X2011_LED_CTL_PCS_ACT     0x5
+#define MRVL88X2011_LED_CTL_MASK        0x7
+#define MRVL88X2011_LED(n,v)            ((v)<<((n)*4))
+#define MRVL88X2011_LED_STAT(n,v)       ((v)>>((n)*4))
 
 #define BCM8704_PMA_PMD_DEV_ADDR        1
 #define BCM8704_PCS_DEV_ADDR            2