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authorDhananjay Phadke <dhananjay@netxen.com>2009-04-07 18:50:45 -0400
committerDavid S. Miller <davem@davemloft.net>2009-04-08 18:58:29 -0400
commitf98a9f693b5f4919d9c4085a2fd8d67c7e152f3e (patch)
treeef0acb778f9bdb7fed66de7f099f772ef7af1175 /drivers/net/netxen/netxen_nic_niu.c
parent1fbe63235893e5dce28fe91d8465dd231b0cb3d9 (diff)
netxen: sanitize function names
Replace superfluous wrapper functions with two macros: NXWR32 replaces netxen_nic_reg_write, netxen_nic_write_w0, netxen_nic_read_w1, netxen_crb_writelit_adapter. NXRD32 replaces netxen_nic_reg_read, netxen_nic_read_w0, netxen_nic_read_w1. Signed-off-by: Dhananjay Phadke <dhananjay@netxen.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/netxen/netxen_nic_niu.c')
-rw-r--r--drivers/net/netxen/netxen_nic_niu.c169
1 files changed, 59 insertions, 110 deletions
diff --git a/drivers/net/netxen/netxen_nic_niu.c b/drivers/net/netxen/netxen_nic_niu.c
index b54a63a64e7b..5e2698bf575a 100644
--- a/drivers/net/netxen/netxen_nic_niu.c
+++ b/drivers/net/netxen/netxen_nic_niu.c
@@ -43,8 +43,7 @@ static int phy_lock(struct netxen_adapter *adapter)
43 int done = 0, timeout = 0; 43 int done = 0, timeout = 0;
44 44
45 while (!done) { 45 while (!done) {
46 done = netxen_nic_reg_read(adapter, 46 done = NXRD32(adapter, NETXEN_PCIE_REG(PCIE_SEM3_LOCK));
47 NETXEN_PCIE_REG(PCIE_SEM3_LOCK));
48 if (done == 1) 47 if (done == 1)
49 break; 48 break;
50 if (timeout >= phy_lock_timeout) { 49 if (timeout >= phy_lock_timeout) {
@@ -59,8 +58,7 @@ static int phy_lock(struct netxen_adapter *adapter)
59 } 58 }
60 } 59 }
61 60
62 netxen_crb_writelit_adapter(adapter, 61 NXWR32(adapter, NETXEN_PHY_LOCK_ID, PHY_LOCK_DRIVER);
63 NETXEN_PHY_LOCK_ID, PHY_LOCK_DRIVER);
64 return 0; 62 return 0;
65} 63}
66 64
@@ -105,7 +103,7 @@ int netxen_niu_gbe_phy_read(struct netxen_adapter *adapter, long reg,
105 * so it cannot be in reset 103 * so it cannot be in reset
106 */ 104 */
107 105
108 mac_cfg0 = adapter->hw_read_wx(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(0)); 106 mac_cfg0 = NXRD32(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(0));
109 if (netxen_gb_get_soft_reset(mac_cfg0)) { 107 if (netxen_gb_get_soft_reset(mac_cfg0)) {
110 __u32 temp; 108 __u32 temp;
111 temp = 0; 109 temp = 0;
@@ -113,8 +111,7 @@ int netxen_niu_gbe_phy_read(struct netxen_adapter *adapter, long reg,
113 netxen_gb_rx_reset_pb(temp); 111 netxen_gb_rx_reset_pb(temp);
114 netxen_gb_tx_reset_mac(temp); 112 netxen_gb_tx_reset_mac(temp);
115 netxen_gb_rx_reset_mac(temp); 113 netxen_gb_rx_reset_mac(temp);
116 if (adapter->hw_write_wx(adapter, 114 if (NXWR32(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(0), temp))
117 NETXEN_NIU_GB_MAC_CONFIG_0(0), temp))
118 return -EIO; 115 return -EIO;
119 restore = 1; 116 restore = 1;
120 } 117 }
@@ -122,38 +119,32 @@ int netxen_niu_gbe_phy_read(struct netxen_adapter *adapter, long reg,
122 address = 0; 119 address = 0;
123 netxen_gb_mii_mgmt_reg_addr(address, reg); 120 netxen_gb_mii_mgmt_reg_addr(address, reg);
124 netxen_gb_mii_mgmt_phy_addr(address, phy); 121 netxen_gb_mii_mgmt_phy_addr(address, phy);
125 if (adapter->hw_write_wx(adapter, 122 if (NXWR32(adapter, NETXEN_NIU_GB_MII_MGMT_ADDR(0), address))
126 NETXEN_NIU_GB_MII_MGMT_ADDR(0), address))
127 return -EIO; 123 return -EIO;
128 command = 0; /* turn off any prior activity */ 124 command = 0; /* turn off any prior activity */
129 if (adapter->hw_write_wx(adapter, 125 if (NXWR32(adapter, NETXEN_NIU_GB_MII_MGMT_COMMAND(0), command))
130 NETXEN_NIU_GB_MII_MGMT_COMMAND(0), command))
131 return -EIO; 126 return -EIO;
132 /* send read command */ 127 /* send read command */
133 netxen_gb_mii_mgmt_set_read_cycle(command); 128 netxen_gb_mii_mgmt_set_read_cycle(command);
134 if (adapter->hw_write_wx(adapter, 129 if (NXWR32(adapter, NETXEN_NIU_GB_MII_MGMT_COMMAND(0), command))
135 NETXEN_NIU_GB_MII_MGMT_COMMAND(0), command))
136 return -EIO; 130 return -EIO;
137 131
138 status = 0; 132 status = 0;
139 do { 133 do {
140 status = adapter->hw_read_wx(adapter, 134 status = NXRD32(adapter, NETXEN_NIU_GB_MII_MGMT_INDICATE(0));
141 NETXEN_NIU_GB_MII_MGMT_INDICATE(0));
142 timeout++; 135 timeout++;
143 } while ((netxen_get_gb_mii_mgmt_busy(status) 136 } while ((netxen_get_gb_mii_mgmt_busy(status)
144 || netxen_get_gb_mii_mgmt_notvalid(status)) 137 || netxen_get_gb_mii_mgmt_notvalid(status))
145 && (timeout++ < NETXEN_NIU_PHY_WAITMAX)); 138 && (timeout++ < NETXEN_NIU_PHY_WAITMAX));
146 139
147 if (timeout < NETXEN_NIU_PHY_WAITMAX) { 140 if (timeout < NETXEN_NIU_PHY_WAITMAX) {
148 *readval = adapter->hw_read_wx(adapter, 141 *readval = NXRD32(adapter, NETXEN_NIU_GB_MII_MGMT_STATUS(0));
149 NETXEN_NIU_GB_MII_MGMT_STATUS(0));
150 result = 0; 142 result = 0;
151 } else 143 } else
152 result = -1; 144 result = -1;
153 145
154 if (restore) 146 if (restore)
155 if (adapter->hw_write_wx(adapter, 147 if (NXWR32(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(0), mac_cfg0))
156 NETXEN_NIU_GB_MAC_CONFIG_0(0), mac_cfg0))
157 return -EIO; 148 return -EIO;
158 phy_unlock(adapter); 149 phy_unlock(adapter);
159 return result; 150 return result;
@@ -189,7 +180,7 @@ int netxen_niu_gbe_phy_write(struct netxen_adapter *adapter, long reg,
189 * cannot be in reset 180 * cannot be in reset
190 */ 181 */
191 182
192 mac_cfg0 = adapter->hw_read_wx(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(0)); 183 mac_cfg0 = NXRD32(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(0));
193 if (netxen_gb_get_soft_reset(mac_cfg0)) { 184 if (netxen_gb_get_soft_reset(mac_cfg0)) {
194 __u32 temp; 185 __u32 temp;
195 temp = 0; 186 temp = 0;
@@ -198,32 +189,27 @@ int netxen_niu_gbe_phy_write(struct netxen_adapter *adapter, long reg,
198 netxen_gb_tx_reset_mac(temp); 189 netxen_gb_tx_reset_mac(temp);
199 netxen_gb_rx_reset_mac(temp); 190 netxen_gb_rx_reset_mac(temp);
200 191
201 if (adapter->hw_write_wx(adapter, 192 if (NXWR32(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(0), temp))
202 NETXEN_NIU_GB_MAC_CONFIG_0(0), temp))
203 return -EIO; 193 return -EIO;
204 restore = 1; 194 restore = 1;
205 } 195 }
206 196
207 command = 0; /* turn off any prior activity */ 197 command = 0; /* turn off any prior activity */
208 if (adapter->hw_write_wx(adapter, 198 if (NXWR32(adapter, NETXEN_NIU_GB_MII_MGMT_COMMAND(0), command))
209 NETXEN_NIU_GB_MII_MGMT_COMMAND(0), command))
210 return -EIO; 199 return -EIO;
211 200
212 address = 0; 201 address = 0;
213 netxen_gb_mii_mgmt_reg_addr(address, reg); 202 netxen_gb_mii_mgmt_reg_addr(address, reg);
214 netxen_gb_mii_mgmt_phy_addr(address, phy); 203 netxen_gb_mii_mgmt_phy_addr(address, phy);
215 if (adapter->hw_write_wx(adapter, 204 if (NXWR32(adapter, NETXEN_NIU_GB_MII_MGMT_ADDR(0), address))
216 NETXEN_NIU_GB_MII_MGMT_ADDR(0), address))
217 return -EIO; 205 return -EIO;
218 206
219 if (adapter->hw_write_wx(adapter, 207 if (NXWR32(adapter, NETXEN_NIU_GB_MII_MGMT_CTRL(0), val))
220 NETXEN_NIU_GB_MII_MGMT_CTRL(0), val))
221 return -EIO; 208 return -EIO;
222 209
223 status = 0; 210 status = 0;
224 do { 211 do {
225 status = adapter->hw_read_wx(adapter, 212 status = NXRD32(adapter, NETXEN_NIU_GB_MII_MGMT_INDICATE(0));
226 NETXEN_NIU_GB_MII_MGMT_INDICATE(0));
227 timeout++; 213 timeout++;
228 } while ((netxen_get_gb_mii_mgmt_busy(status)) 214 } while ((netxen_get_gb_mii_mgmt_busy(status))
229 && (timeout++ < NETXEN_NIU_PHY_WAITMAX)); 215 && (timeout++ < NETXEN_NIU_PHY_WAITMAX));
@@ -235,8 +221,7 @@ int netxen_niu_gbe_phy_write(struct netxen_adapter *adapter, long reg,
235 221
236 /* restore the state of port 0 MAC in case we tampered with it */ 222 /* restore the state of port 0 MAC in case we tampered with it */
237 if (restore) 223 if (restore)
238 if (adapter->hw_write_wx(adapter, 224 if (NXWR32(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(0), mac_cfg0))
239 NETXEN_NIU_GB_MAC_CONFIG_0(0), mac_cfg0))
240 return -EIO; 225 return -EIO;
241 226
242 return result; 227 return result;
@@ -244,7 +229,7 @@ int netxen_niu_gbe_phy_write(struct netxen_adapter *adapter, long reg,
244 229
245int netxen_niu_xgbe_enable_phy_interrupts(struct netxen_adapter *adapter) 230int netxen_niu_xgbe_enable_phy_interrupts(struct netxen_adapter *adapter)
246{ 231{
247 netxen_crb_writelit_adapter(adapter, NETXEN_NIU_INT_MASK, 0x3f); 232 NXWR32(adapter, NETXEN_NIU_INT_MASK, 0x3f);
248 return 0; 233 return 0;
249} 234}
250 235
@@ -267,7 +252,7 @@ int netxen_niu_gbe_enable_phy_interrupts(struct netxen_adapter *adapter)
267 252
268int netxen_niu_xgbe_disable_phy_interrupts(struct netxen_adapter *adapter) 253int netxen_niu_xgbe_disable_phy_interrupts(struct netxen_adapter *adapter)
269{ 254{
270 netxen_crb_writelit_adapter(adapter, NETXEN_NIU_INT_MASK, 0x7f); 255 NXWR32(adapter, NETXEN_NIU_INT_MASK, 0x7f);
271 return 0; 256 return 0;
272} 257}
273 258
@@ -301,30 +286,21 @@ static int netxen_niu_gbe_clear_phy_interrupts(struct netxen_adapter *adapter)
301static void netxen_niu_gbe_set_mii_mode(struct netxen_adapter *adapter, 286static void netxen_niu_gbe_set_mii_mode(struct netxen_adapter *adapter,
302 int port, long enable) 287 int port, long enable)
303{ 288{
304 netxen_crb_writelit_adapter(adapter, NETXEN_NIU_MODE, 0x2); 289 NXWR32(adapter, NETXEN_NIU_MODE, 0x2);
305 netxen_crb_writelit_adapter(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(port), 290 NXWR32(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(port), 0x80000000);
306 0x80000000); 291 NXWR32(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(port), 0x0000f0025);
307 netxen_crb_writelit_adapter(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(port), 292 NXWR32(adapter, NETXEN_NIU_GB_MAC_CONFIG_1(port), 0xf1ff);
308 0x0000f0025); 293 NXWR32(adapter, NETXEN_NIU_GB0_GMII_MODE + (port << 3), 0);
309 netxen_crb_writelit_adapter(adapter, NETXEN_NIU_GB_MAC_CONFIG_1(port), 294 NXWR32(adapter, NETXEN_NIU_GB0_MII_MODE + (port << 3), 1);
310 0xf1ff); 295 NXWR32(adapter, (NETXEN_NIU_GB0_HALF_DUPLEX + port * 4), 0);
311 netxen_crb_writelit_adapter(adapter, 296 NXWR32(adapter, NETXEN_NIU_GB_MII_MGMT_CONFIG(port), 0x7);
312 NETXEN_NIU_GB0_GMII_MODE + (port << 3), 0);
313 netxen_crb_writelit_adapter(adapter,
314 NETXEN_NIU_GB0_MII_MODE + (port << 3), 1);
315 netxen_crb_writelit_adapter(adapter,
316 (NETXEN_NIU_GB0_HALF_DUPLEX + port * 4), 0);
317 netxen_crb_writelit_adapter(adapter,
318 NETXEN_NIU_GB_MII_MGMT_CONFIG(port), 0x7);
319 297
320 if (enable) { 298 if (enable) {
321 /* 299 /*
322 * Do NOT enable flow control until a suitable solution for 300 * Do NOT enable flow control until a suitable solution for
323 * shutting down pause frames is found. 301 * shutting down pause frames is found.
324 */ 302 */
325 netxen_crb_writelit_adapter(adapter, 303 NXWR32(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(port), 0x5);
326 NETXEN_NIU_GB_MAC_CONFIG_0(port),
327 0x5);
328 } 304 }
329 305
330 if (netxen_niu_gbe_enable_phy_interrupts(adapter)) 306 if (netxen_niu_gbe_enable_phy_interrupts(adapter))
@@ -339,30 +315,21 @@ static void netxen_niu_gbe_set_mii_mode(struct netxen_adapter *adapter,
339static void netxen_niu_gbe_set_gmii_mode(struct netxen_adapter *adapter, 315static void netxen_niu_gbe_set_gmii_mode(struct netxen_adapter *adapter,
340 int port, long enable) 316 int port, long enable)
341{ 317{
342 netxen_crb_writelit_adapter(adapter, NETXEN_NIU_MODE, 0x2); 318 NXWR32(adapter, NETXEN_NIU_MODE, 0x2);
343 netxen_crb_writelit_adapter(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(port), 319 NXWR32(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(port), 0x80000000);
344 0x80000000); 320 NXWR32(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(port), 0x0000f0025);
345 netxen_crb_writelit_adapter(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(port), 321 NXWR32(adapter, NETXEN_NIU_GB_MAC_CONFIG_1(port), 0xf2ff);
346 0x0000f0025); 322 NXWR32(adapter, NETXEN_NIU_GB0_MII_MODE + (port << 3), 0);
347 netxen_crb_writelit_adapter(adapter, NETXEN_NIU_GB_MAC_CONFIG_1(port), 323 NXWR32(adapter, NETXEN_NIU_GB0_GMII_MODE + (port << 3), 1);
348 0xf2ff); 324 NXWR32(adapter, (NETXEN_NIU_GB0_HALF_DUPLEX + port * 4), 0);
349 netxen_crb_writelit_adapter(adapter, 325 NXWR32(adapter, NETXEN_NIU_GB_MII_MGMT_CONFIG(port), 0x7);
350 NETXEN_NIU_GB0_MII_MODE + (port << 3), 0);
351 netxen_crb_writelit_adapter(adapter,
352 NETXEN_NIU_GB0_GMII_MODE + (port << 3), 1);
353 netxen_crb_writelit_adapter(adapter,
354 (NETXEN_NIU_GB0_HALF_DUPLEX + port * 4), 0);
355 netxen_crb_writelit_adapter(adapter,
356 NETXEN_NIU_GB_MII_MGMT_CONFIG(port), 0x7);
357 326
358 if (enable) { 327 if (enable) {
359 /* 328 /*
360 * Do NOT enable flow control until a suitable solution for 329 * Do NOT enable flow control until a suitable solution for
361 * shutting down pause frames is found. 330 * shutting down pause frames is found.
362 */ 331 */
363 netxen_crb_writelit_adapter(adapter, 332 NXWR32(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(port), 0x5);
364 NETXEN_NIU_GB_MAC_CONFIG_0(port),
365 0x5);
366 } 333 }
367 334
368 if (netxen_niu_gbe_enable_phy_interrupts(adapter)) 335 if (netxen_niu_gbe_enable_phy_interrupts(adapter))
@@ -402,17 +369,12 @@ int netxen_niu_gbe_init_port(struct netxen_adapter *adapter, int port)
402 * plugged in. 369 * plugged in.
403 */ 370 */
404 371
405 netxen_crb_writelit_adapter(adapter, 372 NXWR32(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(port),
406 NETXEN_NIU_GB_MAC_CONFIG_0
407 (port),
408 NETXEN_GB_MAC_SOFT_RESET); 373 NETXEN_GB_MAC_SOFT_RESET);
409 netxen_crb_writelit_adapter(adapter, 374 NXWR32(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(port),
410 NETXEN_NIU_GB_MAC_CONFIG_0 375 NETXEN_GB_MAC_RESET_PROT_BLK |
411 (port), 376 NETXEN_GB_MAC_ENABLE_TX_RX |
412 NETXEN_GB_MAC_RESET_PROT_BLK 377 NETXEN_GB_MAC_PAUSED_FRMS);
413 | NETXEN_GB_MAC_ENABLE_TX_RX
414 |
415 NETXEN_GB_MAC_PAUSED_FRMS);
416 if (netxen_niu_gbe_clear_phy_interrupts(adapter)) 378 if (netxen_niu_gbe_clear_phy_interrupts(adapter))
417 printk(KERN_ERR 379 printk(KERN_ERR
418 "ERROR clearing PHY interrupts\n"); 380 "ERROR clearing PHY interrupts\n");
@@ -433,10 +395,8 @@ int netxen_niu_gbe_init_port(struct netxen_adapter *adapter, int port)
433int netxen_niu_xg_init_port(struct netxen_adapter *adapter, int port) 395int netxen_niu_xg_init_port(struct netxen_adapter *adapter, int port)
434{ 396{
435 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) { 397 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
436 netxen_crb_writelit_adapter(adapter, 398 NXWR32(adapter, NETXEN_NIU_XGE_CONFIG_1+(0x10000*port), 0x1447);
437 NETXEN_NIU_XGE_CONFIG_1+(0x10000*port), 0x1447); 399 NXWR32(adapter, NETXEN_NIU_XGE_CONFIG_0+(0x10000*port), 0x5);
438 netxen_crb_writelit_adapter(adapter,
439 NETXEN_NIU_XGE_CONFIG_0+(0x10000*port), 0x5);
440 } 400 }
441 401
442 return 0; 402 return 0;
@@ -459,10 +419,8 @@ static int netxen_niu_macaddr_get(struct netxen_adapter *adapter,
459 if ((phy < 0) || (phy > 3)) 419 if ((phy < 0) || (phy > 3))
460 return -EINVAL; 420 return -EINVAL;
461 421
462 stationhigh = adapter->hw_read_wx(adapter, 422 stationhigh = NXRD32(adapter, NETXEN_NIU_GB_STATION_ADDR_0(phy));
463 NETXEN_NIU_GB_STATION_ADDR_0(phy)); 423 stationlow = NXRD32(adapter, NETXEN_NIU_GB_STATION_ADDR_1(phy));
464 stationlow = adapter->hw_read_wx(adapter,
465 NETXEN_NIU_GB_STATION_ADDR_1(phy));
466 ((__le32 *)val)[1] = cpu_to_le32(stationhigh); 424 ((__le32 *)val)[1] = cpu_to_le32(stationhigh);
467 ((__le32 *)val)[0] = cpu_to_le32(stationlow); 425 ((__le32 *)val)[0] = cpu_to_le32(stationlow);
468 426
@@ -491,14 +449,12 @@ int netxen_niu_macaddr_set(struct netxen_adapter *adapter,
491 temp[0] = temp[1] = 0; 449 temp[0] = temp[1] = 0;
492 memcpy(temp + 2, addr, 2); 450 memcpy(temp + 2, addr, 2);
493 val = le32_to_cpu(*(__le32 *)temp); 451 val = le32_to_cpu(*(__le32 *)temp);
494 if (adapter->hw_write_wx(adapter, 452 if (NXWR32(adapter, NETXEN_NIU_GB_STATION_ADDR_1(phy), val))
495 NETXEN_NIU_GB_STATION_ADDR_1(phy), val))
496 return -EIO; 453 return -EIO;
497 454
498 memcpy(temp, ((u8 *) addr) + 2, sizeof(__le32)); 455 memcpy(temp, ((u8 *) addr) + 2, sizeof(__le32));
499 val = le32_to_cpu(*(__le32 *)temp); 456 val = le32_to_cpu(*(__le32 *)temp);
500 if (adapter->hw_write_wx(adapter, 457 if (NXWR32(adapter, NETXEN_NIU_GB_STATION_ADDR_0(phy), val))
501 NETXEN_NIU_GB_STATION_ADDR_0(phy), val))
502 return -2; 458 return -2;
503 459
504 netxen_niu_macaddr_get(adapter, 460 netxen_niu_macaddr_get(adapter,
@@ -529,8 +485,7 @@ int netxen_niu_disable_gbe_port(struct netxen_adapter *adapter)
529 return -EINVAL; 485 return -EINVAL;
530 mac_cfg0 = 0; 486 mac_cfg0 = 0;
531 netxen_gb_soft_reset(mac_cfg0); 487 netxen_gb_soft_reset(mac_cfg0);
532 if (adapter->hw_write_wx(adapter, 488 if (NXWR32(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(port), mac_cfg0))
533 NETXEN_NIU_GB_MAC_CONFIG_0(port), mac_cfg0))
534 return -EIO; 489 return -EIO;
535 return 0; 490 return 0;
536} 491}
@@ -548,8 +503,8 @@ int netxen_niu_disable_xg_port(struct netxen_adapter *adapter)
548 return -EINVAL; 503 return -EINVAL;
549 504
550 mac_cfg = 0; 505 mac_cfg = 0;
551 if (adapter->hw_write_wx(adapter, 506 if (NXWR32(adapter,
552 NETXEN_NIU_XGE_CONFIG_0 + (0x10000 * port), mac_cfg)) 507 NETXEN_NIU_XGE_CONFIG_0 + (0x10000 * port), mac_cfg))
553 return -EIO; 508 return -EIO;
554 return 0; 509 return 0;
555} 510}
@@ -565,7 +520,7 @@ int netxen_niu_set_promiscuous_mode(struct netxen_adapter *adapter,
565 return -EINVAL; 520 return -EINVAL;
566 521
567 /* save previous contents */ 522 /* save previous contents */
568 reg = adapter->hw_read_wx(adapter, NETXEN_NIU_GB_DROP_WRONGADDR); 523 reg = NXRD32(adapter, NETXEN_NIU_GB_DROP_WRONGADDR);
569 if (mode == NETXEN_NIU_PROMISC_MODE) { 524 if (mode == NETXEN_NIU_PROMISC_MODE) {
570 switch (port) { 525 switch (port) {
571 case 0: 526 case 0:
@@ -601,7 +556,7 @@ int netxen_niu_set_promiscuous_mode(struct netxen_adapter *adapter,
601 return -EIO; 556 return -EIO;
602 } 557 }
603 } 558 }
604 if (adapter->hw_write_wx(adapter, NETXEN_NIU_GB_DROP_WRONGADDR, reg)) 559 if (NXWR32(adapter, NETXEN_NIU_GB_DROP_WRONGADDR, reg))
605 return -EIO; 560 return -EIO;
606 return 0; 561 return 0;
607} 562}
@@ -628,28 +583,24 @@ int netxen_niu_xg_macaddr_set(struct netxen_adapter *adapter,
628 case 0: 583 case 0:
629 memcpy(temp + 2, addr, 2); 584 memcpy(temp + 2, addr, 2);
630 val = le32_to_cpu(*(__le32 *)temp); 585 val = le32_to_cpu(*(__le32 *)temp);
631 if (adapter->hw_write_wx(adapter, 586 if (NXWR32(adapter, NETXEN_NIU_XGE_STATION_ADDR_0_1, val))
632 NETXEN_NIU_XGE_STATION_ADDR_0_1, val))
633 return -EIO; 587 return -EIO;
634 588
635 memcpy(&temp, ((u8 *) addr) + 2, sizeof(__le32)); 589 memcpy(&temp, ((u8 *) addr) + 2, sizeof(__le32));
636 val = le32_to_cpu(*(__le32 *)temp); 590 val = le32_to_cpu(*(__le32 *)temp);
637 if (adapter->hw_write_wx(adapter, 591 if (NXWR32(adapter, NETXEN_NIU_XGE_STATION_ADDR_0_HI, val))
638 NETXEN_NIU_XGE_STATION_ADDR_0_HI, val))
639 return -EIO; 592 return -EIO;
640 break; 593 break;
641 594
642 case 1: 595 case 1:
643 memcpy(temp + 2, addr, 2); 596 memcpy(temp + 2, addr, 2);
644 val = le32_to_cpu(*(__le32 *)temp); 597 val = le32_to_cpu(*(__le32 *)temp);
645 if (adapter->hw_write_wx(adapter, 598 if (NXWR32(adapter, NETXEN_NIU_XG1_STATION_ADDR_0_1, val))
646 NETXEN_NIU_XG1_STATION_ADDR_0_1, val))
647 return -EIO; 599 return -EIO;
648 600
649 memcpy(&temp, ((u8 *) addr) + 2, sizeof(__le32)); 601 memcpy(&temp, ((u8 *) addr) + 2, sizeof(__le32));
650 val = le32_to_cpu(*(__le32 *)temp); 602 val = le32_to_cpu(*(__le32 *)temp);
651 if (adapter->hw_write_wx(adapter, 603 if (NXWR32(adapter, NETXEN_NIU_XG1_STATION_ADDR_0_HI, val))
652 NETXEN_NIU_XG1_STATION_ADDR_0_HI, val))
653 return -EIO; 604 return -EIO;
654 break; 605 break;
655 606
@@ -670,8 +621,7 @@ int netxen_niu_xg_set_promiscuous_mode(struct netxen_adapter *adapter,
670 if (port > NETXEN_NIU_MAX_XG_PORTS) 621 if (port > NETXEN_NIU_MAX_XG_PORTS)
671 return -EINVAL; 622 return -EINVAL;
672 623
673 reg = adapter->hw_read_wx(adapter, 624 reg = NXRD32(adapter, NETXEN_NIU_XGE_CONFIG_1 + (0x10000 * port));
674 NETXEN_NIU_XGE_CONFIG_1 + (0x10000 * port));
675 if (mode == NETXEN_NIU_PROMISC_MODE) 625 if (mode == NETXEN_NIU_PROMISC_MODE)
676 reg = (reg | 0x2000UL); 626 reg = (reg | 0x2000UL);
677 else 627 else
@@ -682,8 +632,7 @@ int netxen_niu_xg_set_promiscuous_mode(struct netxen_adapter *adapter,
682 else 632 else
683 reg = (reg & ~0x1000UL); 633 reg = (reg & ~0x1000UL);
684 634
685 netxen_crb_writelit_adapter(adapter, 635 NXWR32(adapter, NETXEN_NIU_XGE_CONFIG_1 + (0x10000 * port), reg);
686 NETXEN_NIU_XGE_CONFIG_1 + (0x10000 * port), reg);
687 636
688 return 0; 637 return 0;
689} 638}
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-16 12:09:25 -0500