diff options
author | Amit Kumar Salecha <amit@netxen.com> | 2009-09-05 13:43:10 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2009-09-07 04:53:13 -0400 |
commit | 195c5f9829407857cba86f083caec6302b1fd8e1 (patch) | |
tree | d208ca059eaa3f6dd0dd4fb23226f84584a341e4 /drivers/net/netxen/netxen_nic_hw.c | |
parent | d0725e4d3ccf603c4fcf3589850cb464c927d42a (diff) |
netxen: pre calculate register addresses
For registers accessed in fast path (interrupt / softirq)
avoid expensive I/O address translation. These registers
are directly mapped in PCI bar 0 and do not require
any window checks.
Signed-off-by: Amit Kumar Salecha <amit@netxen.com>
Signed-off-by: Dhananjay Phadke <dhananjay@netxen.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/netxen/netxen_nic_hw.c')
-rw-r--r-- | drivers/net/netxen/netxen_nic_hw.c | 176 |
1 files changed, 120 insertions, 56 deletions
diff --git a/drivers/net/netxen/netxen_nic_hw.c b/drivers/net/netxen/netxen_nic_hw.c index d0ac8fabd423..cbfd6102e455 100644 --- a/drivers/net/netxen/netxen_nic_hw.c +++ b/drivers/net/netxen/netxen_nic_hw.c | |||
@@ -1050,7 +1050,7 @@ int netxen_p3_get_mac_addr(struct netxen_adapter *adapter, __le64 *mac) | |||
1050 | /* | 1050 | /* |
1051 | * Changes the CRB window to the specified window. | 1051 | * Changes the CRB window to the specified window. |
1052 | */ | 1052 | */ |
1053 | void | 1053 | static void |
1054 | netxen_nic_pci_change_crbwindow_128M(struct netxen_adapter *adapter, u32 wndw) | 1054 | netxen_nic_pci_change_crbwindow_128M(struct netxen_adapter *adapter, u32 wndw) |
1055 | { | 1055 | { |
1056 | void __iomem *offset; | 1056 | void __iomem *offset; |
@@ -1163,61 +1163,68 @@ netxen_nic_pci_set_crbwindow_2M(struct netxen_adapter *adapter, ulong *off) | |||
1163 | (ulong)adapter->ahw.pci_base0; | 1163 | (ulong)adapter->ahw.pci_base0; |
1164 | } | 1164 | } |
1165 | 1165 | ||
1166 | int | 1166 | static int |
1167 | netxen_nic_hw_write_wx_128M(struct netxen_adapter *adapter, ulong off, u32 data) | 1167 | netxen_nic_hw_write_wx_128M(struct netxen_adapter *adapter, ulong off, u32 data) |
1168 | { | 1168 | { |
1169 | unsigned long flags; | ||
1169 | void __iomem *addr; | 1170 | void __iomem *addr; |
1170 | 1171 | ||
1171 | if (ADDR_IN_WINDOW1(off)) { | 1172 | if (ADDR_IN_WINDOW1(off)) |
1172 | addr = NETXEN_CRB_NORMALIZE(adapter, off); | 1173 | addr = NETXEN_CRB_NORMALIZE(adapter, off); |
1174 | else | ||
1175 | addr = pci_base_offset(adapter, off); | ||
1176 | |||
1177 | BUG_ON(!addr); | ||
1178 | |||
1179 | if (ADDR_IN_WINDOW1(off)) { /* Window 1 */ | ||
1180 | read_lock(&adapter->adapter_lock); | ||
1181 | writel(data, addr); | ||
1182 | read_unlock(&adapter->adapter_lock); | ||
1173 | } else { /* Window 0 */ | 1183 | } else { /* Window 0 */ |
1184 | write_lock_irqsave(&adapter->adapter_lock, flags); | ||
1174 | addr = pci_base_offset(adapter, off); | 1185 | addr = pci_base_offset(adapter, off); |
1175 | netxen_nic_pci_change_crbwindow_128M(adapter, 0); | 1186 | netxen_nic_pci_change_crbwindow_128M(adapter, 0); |
1176 | } | 1187 | writel(data, addr); |
1177 | |||
1178 | if (!addr) { | ||
1179 | netxen_nic_pci_change_crbwindow_128M(adapter, 1); | 1188 | netxen_nic_pci_change_crbwindow_128M(adapter, 1); |
1180 | return 1; | 1189 | write_unlock_irqrestore(&adapter->adapter_lock, flags); |
1181 | } | 1190 | } |
1182 | 1191 | ||
1183 | writel(data, addr); | ||
1184 | |||
1185 | if (!ADDR_IN_WINDOW1(off)) | ||
1186 | netxen_nic_pci_change_crbwindow_128M(adapter, 1); | ||
1187 | |||
1188 | return 0; | 1192 | return 0; |
1189 | } | 1193 | } |
1190 | 1194 | ||
1191 | u32 | 1195 | static u32 |
1192 | netxen_nic_hw_read_wx_128M(struct netxen_adapter *adapter, ulong off) | 1196 | netxen_nic_hw_read_wx_128M(struct netxen_adapter *adapter, ulong off) |
1193 | { | 1197 | { |
1198 | unsigned long flags; | ||
1194 | void __iomem *addr; | 1199 | void __iomem *addr; |
1195 | u32 data; | 1200 | u32 data; |
1196 | 1201 | ||
1197 | if (ADDR_IN_WINDOW1(off)) { /* Window 1 */ | 1202 | if (ADDR_IN_WINDOW1(off)) |
1198 | addr = NETXEN_CRB_NORMALIZE(adapter, off); | 1203 | addr = NETXEN_CRB_NORMALIZE(adapter, off); |
1199 | } else { /* Window 0 */ | 1204 | else |
1200 | addr = pci_base_offset(adapter, off); | 1205 | addr = pci_base_offset(adapter, off); |
1201 | netxen_nic_pci_change_crbwindow_128M(adapter, 0); | ||
1202 | } | ||
1203 | |||
1204 | if (!addr) { | ||
1205 | netxen_nic_pci_change_crbwindow_128M(adapter, 1); | ||
1206 | return 1; | ||
1207 | } | ||
1208 | 1206 | ||
1209 | data = readl(addr); | 1207 | BUG_ON(!addr); |
1210 | 1208 | ||
1211 | if (!ADDR_IN_WINDOW1(off)) | 1209 | if (ADDR_IN_WINDOW1(off)) { /* Window 1 */ |
1210 | read_lock(&adapter->adapter_lock); | ||
1211 | data = readl(addr); | ||
1212 | read_unlock(&adapter->adapter_lock); | ||
1213 | } else { /* Window 0 */ | ||
1214 | write_lock_irqsave(&adapter->adapter_lock, flags); | ||
1215 | netxen_nic_pci_change_crbwindow_128M(adapter, 0); | ||
1216 | data = readl(addr); | ||
1212 | netxen_nic_pci_change_crbwindow_128M(adapter, 1); | 1217 | netxen_nic_pci_change_crbwindow_128M(adapter, 1); |
1218 | write_unlock_irqrestore(&adapter->adapter_lock, flags); | ||
1219 | } | ||
1213 | 1220 | ||
1214 | return data; | 1221 | return data; |
1215 | } | 1222 | } |
1216 | 1223 | ||
1217 | int | 1224 | static int |
1218 | netxen_nic_hw_write_wx_2M(struct netxen_adapter *adapter, ulong off, u32 data) | 1225 | netxen_nic_hw_write_wx_2M(struct netxen_adapter *adapter, ulong off, u32 data) |
1219 | { | 1226 | { |
1220 | unsigned long flags = 0; | 1227 | unsigned long flags; |
1221 | int rv; | 1228 | int rv; |
1222 | 1229 | ||
1223 | rv = netxen_nic_pci_get_crb_addr_2M(adapter, &off); | 1230 | rv = netxen_nic_pci_get_crb_addr_2M(adapter, &off); |
@@ -1243,10 +1250,10 @@ netxen_nic_hw_write_wx_2M(struct netxen_adapter *adapter, ulong off, u32 data) | |||
1243 | return 0; | 1250 | return 0; |
1244 | } | 1251 | } |
1245 | 1252 | ||
1246 | u32 | 1253 | static u32 |
1247 | netxen_nic_hw_read_wx_2M(struct netxen_adapter *adapter, ulong off) | 1254 | netxen_nic_hw_read_wx_2M(struct netxen_adapter *adapter, ulong off) |
1248 | { | 1255 | { |
1249 | unsigned long flags = 0; | 1256 | unsigned long flags; |
1250 | int rv; | 1257 | int rv; |
1251 | u32 data; | 1258 | u32 data; |
1252 | 1259 | ||
@@ -1293,7 +1300,7 @@ netxen_nic_pci_mem_bound_check(struct netxen_adapter *adapter, | |||
1293 | 1300 | ||
1294 | static int netxen_pci_set_window_warning_count; | 1301 | static int netxen_pci_set_window_warning_count; |
1295 | 1302 | ||
1296 | unsigned long | 1303 | static unsigned long |
1297 | netxen_nic_pci_set_window_128M(struct netxen_adapter *adapter, | 1304 | netxen_nic_pci_set_window_128M(struct netxen_adapter *adapter, |
1298 | unsigned long long addr) | 1305 | unsigned long long addr) |
1299 | { | 1306 | { |
@@ -1357,22 +1364,56 @@ netxen_nic_pci_set_window_128M(struct netxen_adapter *adapter, | |||
1357 | return addr; | 1364 | return addr; |
1358 | } | 1365 | } |
1359 | 1366 | ||
1360 | /* | 1367 | /* window 1 registers only */ |
1361 | * Note : only 32-bit writes! | 1368 | static void netxen_nic_io_write_128M(struct netxen_adapter *adapter, |
1362 | */ | 1369 | void __iomem *addr, u32 data) |
1363 | int netxen_nic_pci_write_immediate_128M(struct netxen_adapter *adapter, | ||
1364 | u64 off, u32 data) | ||
1365 | { | 1370 | { |
1366 | writel(data, (void __iomem *)(PCI_OFFSET_SECOND_RANGE(adapter, off))); | 1371 | read_lock(&adapter->adapter_lock); |
1367 | return 0; | 1372 | writel(data, addr); |
1373 | read_unlock(&adapter->adapter_lock); | ||
1374 | } | ||
1375 | |||
1376 | static u32 netxen_nic_io_read_128M(struct netxen_adapter *adapter, | ||
1377 | void __iomem *addr) | ||
1378 | { | ||
1379 | u32 val; | ||
1380 | |||
1381 | read_lock(&adapter->adapter_lock); | ||
1382 | val = readl(addr); | ||
1383 | read_unlock(&adapter->adapter_lock); | ||
1384 | |||
1385 | return val; | ||
1368 | } | 1386 | } |
1369 | 1387 | ||
1370 | u32 netxen_nic_pci_read_immediate_128M(struct netxen_adapter *adapter, u64 off) | 1388 | static void netxen_nic_io_write_2M(struct netxen_adapter *adapter, |
1389 | void __iomem *addr, u32 data) | ||
1371 | { | 1390 | { |
1372 | return readl((void __iomem *)(pci_base_offset(adapter, off))); | 1391 | writel(data, addr); |
1392 | } | ||
1393 | |||
1394 | static u32 netxen_nic_io_read_2M(struct netxen_adapter *adapter, | ||
1395 | void __iomem *addr) | ||
1396 | { | ||
1397 | return readl(addr); | ||
1398 | } | ||
1399 | |||
1400 | void __iomem * | ||
1401 | netxen_get_ioaddr(struct netxen_adapter *adapter, u32 offset) | ||
1402 | { | ||
1403 | ulong off = offset; | ||
1404 | |||
1405 | if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) { | ||
1406 | if (offset < NETXEN_CRB_PCIX_HOST2 && | ||
1407 | offset > NETXEN_CRB_PCIX_HOST) | ||
1408 | return PCI_OFFSET_SECOND_RANGE(adapter, offset); | ||
1409 | return NETXEN_CRB_NORMALIZE(adapter, offset); | ||
1410 | } | ||
1411 | |||
1412 | BUG_ON(netxen_nic_pci_get_crb_addr_2M(adapter, &off)); | ||
1413 | return (void __iomem *)off; | ||
1373 | } | 1414 | } |
1374 | 1415 | ||
1375 | unsigned long | 1416 | static unsigned long |
1376 | netxen_nic_pci_set_window_2M(struct netxen_adapter *adapter, | 1417 | netxen_nic_pci_set_window_2M(struct netxen_adapter *adapter, |
1377 | unsigned long long addr) | 1418 | unsigned long long addr) |
1378 | { | 1419 | { |
@@ -1616,7 +1657,7 @@ netxen_nic_pci_mem_write_direct(struct netxen_adapter *adapter, u64 off, | |||
1616 | 1657 | ||
1617 | #define MAX_CTL_CHECK 1000 | 1658 | #define MAX_CTL_CHECK 1000 |
1618 | 1659 | ||
1619 | int | 1660 | static int |
1620 | netxen_nic_pci_mem_write_128M(struct netxen_adapter *adapter, | 1661 | netxen_nic_pci_mem_write_128M(struct netxen_adapter *adapter, |
1621 | u64 off, void *data, int size) | 1662 | u64 off, void *data, int size) |
1622 | { | 1663 | { |
@@ -1709,7 +1750,7 @@ netxen_nic_pci_mem_write_128M(struct netxen_adapter *adapter, | |||
1709 | return ret; | 1750 | return ret; |
1710 | } | 1751 | } |
1711 | 1752 | ||
1712 | int | 1753 | static int |
1713 | netxen_nic_pci_mem_read_128M(struct netxen_adapter *adapter, | 1754 | netxen_nic_pci_mem_read_128M(struct netxen_adapter *adapter, |
1714 | u64 off, void *data, int size) | 1755 | u64 off, void *data, int size) |
1715 | { | 1756 | { |
@@ -1800,7 +1841,7 @@ netxen_nic_pci_mem_read_128M(struct netxen_adapter *adapter, | |||
1800 | return 0; | 1841 | return 0; |
1801 | } | 1842 | } |
1802 | 1843 | ||
1803 | int | 1844 | static int |
1804 | netxen_nic_pci_mem_write_2M(struct netxen_adapter *adapter, | 1845 | netxen_nic_pci_mem_write_2M(struct netxen_adapter *adapter, |
1805 | u64 off, void *data, int size) | 1846 | u64 off, void *data, int size) |
1806 | { | 1847 | { |
@@ -1828,8 +1869,8 @@ netxen_nic_pci_mem_write_2M(struct netxen_adapter *adapter, | |||
1828 | 1869 | ||
1829 | if ((size != 8) || (off0 != 0)) { | 1870 | if ((size != 8) || (off0 != 0)) { |
1830 | for (i = 0; i < loop; i++) { | 1871 | for (i = 0; i < loop; i++) { |
1831 | if (adapter->pci_mem_read(adapter, off8 + (i << 3), | 1872 | if (adapter->pci_mem_read(adapter, |
1832 | &word[i], 8)) | 1873 | off8 + (i << 3), &word[i], 8)) |
1833 | return -1; | 1874 | return -1; |
1834 | } | 1875 | } |
1835 | } | 1876 | } |
@@ -1900,7 +1941,7 @@ netxen_nic_pci_mem_write_2M(struct netxen_adapter *adapter, | |||
1900 | return ret; | 1941 | return ret; |
1901 | } | 1942 | } |
1902 | 1943 | ||
1903 | int | 1944 | static int |
1904 | netxen_nic_pci_mem_read_2M(struct netxen_adapter *adapter, | 1945 | netxen_nic_pci_mem_read_2M(struct netxen_adapter *adapter, |
1905 | u64 off, void *data, int size) | 1946 | u64 off, void *data, int size) |
1906 | { | 1947 | { |
@@ -1998,20 +2039,43 @@ netxen_nic_pci_mem_read_2M(struct netxen_adapter *adapter, | |||
1998 | return 0; | 2039 | return 0; |
1999 | } | 2040 | } |
2000 | 2041 | ||
2001 | /* | 2042 | void |
2002 | * Note : only 32-bit writes! | 2043 | netxen_setup_hwops(struct netxen_adapter *adapter) |
2003 | */ | ||
2004 | int netxen_nic_pci_write_immediate_2M(struct netxen_adapter *adapter, | ||
2005 | u64 off, u32 data) | ||
2006 | { | 2044 | { |
2007 | NXWR32(adapter, off, data); | 2045 | adapter->init_port = netxen_niu_xg_init_port; |
2046 | adapter->stop_port = netxen_niu_disable_xg_port; | ||
2008 | 2047 | ||
2009 | return 0; | 2048 | if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) { |
2010 | } | 2049 | adapter->crb_read = netxen_nic_hw_read_wx_128M, |
2050 | adapter->crb_write = netxen_nic_hw_write_wx_128M, | ||
2051 | adapter->pci_set_window = netxen_nic_pci_set_window_128M, | ||
2052 | adapter->pci_mem_read = netxen_nic_pci_mem_read_128M, | ||
2053 | adapter->pci_mem_write = netxen_nic_pci_mem_write_128M, | ||
2054 | adapter->io_read = netxen_nic_io_read_128M, | ||
2055 | adapter->io_write = netxen_nic_io_write_128M, | ||
2056 | |||
2057 | adapter->macaddr_set = netxen_p2_nic_set_mac_addr; | ||
2058 | adapter->set_multi = netxen_p2_nic_set_multi; | ||
2059 | adapter->set_mtu = netxen_nic_set_mtu_xgb; | ||
2060 | adapter->set_promisc = netxen_p2_nic_set_promisc; | ||
2011 | 2061 | ||
2012 | u32 netxen_nic_pci_read_immediate_2M(struct netxen_adapter *adapter, u64 off) | 2062 | } else { |
2013 | { | 2063 | adapter->crb_read = netxen_nic_hw_read_wx_2M, |
2014 | return NXRD32(adapter, off); | 2064 | adapter->crb_write = netxen_nic_hw_write_wx_2M, |
2065 | adapter->pci_set_window = netxen_nic_pci_set_window_2M, | ||
2066 | adapter->pci_mem_read = netxen_nic_pci_mem_read_2M, | ||
2067 | adapter->pci_mem_write = netxen_nic_pci_mem_write_2M, | ||
2068 | adapter->io_read = netxen_nic_io_read_2M, | ||
2069 | adapter->io_write = netxen_nic_io_write_2M, | ||
2070 | |||
2071 | adapter->set_mtu = nx_fw_cmd_set_mtu; | ||
2072 | adapter->set_promisc = netxen_p3_nic_set_promisc; | ||
2073 | adapter->macaddr_set = netxen_p3_nic_set_mac_addr; | ||
2074 | adapter->set_multi = netxen_p3_nic_set_multi; | ||
2075 | |||
2076 | adapter->phy_read = nx_fw_cmd_query_phy; | ||
2077 | adapter->phy_write = nx_fw_cmd_set_phy; | ||
2078 | } | ||
2015 | } | 2079 | } |
2016 | 2080 | ||
2017 | int netxen_nic_get_board_info(struct netxen_adapter *adapter) | 2081 | int netxen_nic_get_board_info(struct netxen_adapter *adapter) |