diff options
author | Andrea Bastoni <bastoni@cs.unc.edu> | 2010-05-30 19:16:45 -0400 |
---|---|---|
committer | Andrea Bastoni <bastoni@cs.unc.edu> | 2010-05-30 19:16:45 -0400 |
commit | ada47b5fe13d89735805b566185f4885f5a3f750 (patch) | |
tree | 644b88f8a71896307d71438e9b3af49126ffb22b /drivers/net/netxen/netxen_nic_hdr.h | |
parent | 43e98717ad40a4ae64545b5ba047c7b86aa44f4f (diff) | |
parent | 3280f21d43ee541f97f8cda5792150d2dbec20d5 (diff) |
Merge branch 'wip-2.6.34' into old-private-masterarchived-private-master
Diffstat (limited to 'drivers/net/netxen/netxen_nic_hdr.h')
-rw-r--r-- | drivers/net/netxen/netxen_nic_hdr.h | 81 |
1 files changed, 48 insertions, 33 deletions
diff --git a/drivers/net/netxen/netxen_nic_hdr.h b/drivers/net/netxen/netxen_nic_hdr.h index 17bb3818d84e..622e4c8be937 100644 --- a/drivers/net/netxen/netxen_nic_hdr.h +++ b/drivers/net/netxen/netxen_nic_hdr.h | |||
@@ -19,7 +19,7 @@ | |||
19 | * MA 02111-1307, USA. | 19 | * MA 02111-1307, USA. |
20 | * | 20 | * |
21 | * The full GNU General Public License is included in this distribution | 21 | * The full GNU General Public License is included in this distribution |
22 | * in the file called LICENSE. | 22 | * in the file called "COPYING". |
23 | * | 23 | * |
24 | */ | 24 | */ |
25 | 25 | ||
@@ -664,40 +664,51 @@ enum { | |||
664 | #define NETXEN_NIU_AP_STATION_ADDR_0(I) (NETXEN_CRB_NIU+0xa0040+(I)*0x10000) | 664 | #define NETXEN_NIU_AP_STATION_ADDR_0(I) (NETXEN_CRB_NIU+0xa0040+(I)*0x10000) |
665 | #define NETXEN_NIU_AP_STATION_ADDR_1(I) (NETXEN_CRB_NIU+0xa0044+(I)*0x10000) | 665 | #define NETXEN_NIU_AP_STATION_ADDR_1(I) (NETXEN_CRB_NIU+0xa0044+(I)*0x10000) |
666 | 666 | ||
667 | |||
668 | #define TEST_AGT_CTRL (0x00) | ||
669 | |||
670 | #define TA_CTL_START 1 | ||
671 | #define TA_CTL_ENABLE 2 | ||
672 | #define TA_CTL_WRITE 4 | ||
673 | #define TA_CTL_BUSY 8 | ||
674 | |||
667 | /* | 675 | /* |
668 | * Register offsets for MN | 676 | * Register offsets for MN |
669 | */ | 677 | */ |
670 | #define MIU_CONTROL (0x000) | 678 | #define MIU_TEST_AGT_BASE (0x90) |
671 | #define MIU_TEST_AGT_CTRL (0x090) | 679 | |
672 | #define MIU_TEST_AGT_ADDR_LO (0x094) | 680 | #define MIU_TEST_AGT_ADDR_LO (0x04) |
673 | #define MIU_TEST_AGT_ADDR_HI (0x098) | 681 | #define MIU_TEST_AGT_ADDR_HI (0x08) |
674 | #define MIU_TEST_AGT_WRDATA_LO (0x0a0) | 682 | #define MIU_TEST_AGT_WRDATA_LO (0x10) |
675 | #define MIU_TEST_AGT_WRDATA_HI (0x0a4) | 683 | #define MIU_TEST_AGT_WRDATA_HI (0x14) |
676 | #define MIU_TEST_AGT_WRDATA(i) (0x0a0+(4*(i))) | 684 | #define MIU_TEST_AGT_WRDATA_UPPER_LO (0x20) |
677 | #define MIU_TEST_AGT_RDDATA_LO (0x0a8) | 685 | #define MIU_TEST_AGT_WRDATA_UPPER_HI (0x24) |
678 | #define MIU_TEST_AGT_RDDATA_HI (0x0ac) | 686 | #define MIU_TEST_AGT_WRDATA(i) (0x10+(0x10*((i)>>1))+(4*((i)&1))) |
679 | #define MIU_TEST_AGT_RDDATA(i) (0x0a8+(4*(i))) | 687 | #define MIU_TEST_AGT_RDDATA_LO (0x18) |
680 | #define MIU_TEST_AGT_ADDR_MASK 0xfffffff8 | 688 | #define MIU_TEST_AGT_RDDATA_HI (0x1c) |
681 | #define MIU_TEST_AGT_UPPER_ADDR(off) (0) | 689 | #define MIU_TEST_AGT_RDDATA_UPPER_LO (0x28) |
682 | 690 | #define MIU_TEST_AGT_RDDATA_UPPER_HI (0x2c) | |
683 | /* MIU_TEST_AGT_CTRL flags. work for SIU as well */ | 691 | #define MIU_TEST_AGT_RDDATA(i) (0x18+(0x10*((i)>>1))+(4*((i)&1))) |
684 | #define MIU_TA_CTL_START 1 | 692 | |
685 | #define MIU_TA_CTL_ENABLE 2 | 693 | #define MIU_TEST_AGT_ADDR_MASK 0xfffffff8 |
686 | #define MIU_TA_CTL_WRITE 4 | 694 | #define MIU_TEST_AGT_UPPER_ADDR(off) (0) |
687 | #define MIU_TA_CTL_BUSY 8 | 695 | |
688 | 696 | /* | |
689 | #define SIU_TEST_AGT_CTRL (0x060) | 697 | * Register offsets for MS |
690 | #define SIU_TEST_AGT_ADDR_LO (0x064) | 698 | */ |
691 | #define SIU_TEST_AGT_ADDR_HI (0x078) | 699 | #define SIU_TEST_AGT_BASE (0x60) |
692 | #define SIU_TEST_AGT_WRDATA_LO (0x068) | 700 | |
693 | #define SIU_TEST_AGT_WRDATA_HI (0x06c) | 701 | #define SIU_TEST_AGT_ADDR_LO (0x04) |
694 | #define SIU_TEST_AGT_WRDATA(i) (0x068+(4*(i))) | 702 | #define SIU_TEST_AGT_ADDR_HI (0x18) |
695 | #define SIU_TEST_AGT_RDDATA_LO (0x070) | 703 | #define SIU_TEST_AGT_WRDATA_LO (0x08) |
696 | #define SIU_TEST_AGT_RDDATA_HI (0x074) | 704 | #define SIU_TEST_AGT_WRDATA_HI (0x0c) |
697 | #define SIU_TEST_AGT_RDDATA(i) (0x070+(4*(i))) | 705 | #define SIU_TEST_AGT_WRDATA(i) (0x08+(4*(i))) |
698 | 706 | #define SIU_TEST_AGT_RDDATA_LO (0x10) | |
699 | #define SIU_TEST_AGT_ADDR_MASK 0x3ffff8 | 707 | #define SIU_TEST_AGT_RDDATA_HI (0x14) |
700 | #define SIU_TEST_AGT_UPPER_ADDR(off) ((off)>>22) | 708 | #define SIU_TEST_AGT_RDDATA(i) (0x10+(4*(i))) |
709 | |||
710 | #define SIU_TEST_AGT_ADDR_MASK 0x3ffff8 | ||
711 | #define SIU_TEST_AGT_UPPER_ADDR(off) ((off)>>22) | ||
701 | 712 | ||
702 | /* XG Link status */ | 713 | /* XG Link status */ |
703 | #define XG_LINK_UP 0x10 | 714 | #define XG_LINK_UP 0x10 |
@@ -859,6 +870,9 @@ enum { | |||
859 | (PCIX_SN_WINDOW_F0 + (0x20 * (func))) :\ | 870 | (PCIX_SN_WINDOW_F0 + (0x20 * (func))) :\ |
860 | (PCIX_SN_WINDOW_F4 + (0x10 * ((func)-4)))) | 871 | (PCIX_SN_WINDOW_F4 + (0x10 * ((func)-4)))) |
861 | 872 | ||
873 | #define PCIX_OCM_WINDOW (0x10800) | ||
874 | #define PCIX_OCM_WINDOW_REG(func) (PCIX_OCM_WINDOW + 0x20 * (func)) | ||
875 | |||
862 | #define PCIX_TARGET_STATUS (0x10118) | 876 | #define PCIX_TARGET_STATUS (0x10118) |
863 | #define PCIX_TARGET_STATUS_F1 (0x10160) | 877 | #define PCIX_TARGET_STATUS_F1 (0x10160) |
864 | #define PCIX_TARGET_STATUS_F2 (0x10164) | 878 | #define PCIX_TARGET_STATUS_F2 (0x10164) |
@@ -955,7 +969,8 @@ enum { | |||
955 | #define NX_DEV_READY 3 | 969 | #define NX_DEV_READY 3 |
956 | #define NX_DEV_NEED_RESET 4 | 970 | #define NX_DEV_NEED_RESET 4 |
957 | #define NX_DEV_NEED_QUISCENT 5 | 971 | #define NX_DEV_NEED_QUISCENT 5 |
958 | #define NX_DEV_FAILED 6 | 972 | #define NX_DEV_NEED_AER 6 |
973 | #define NX_DEV_FAILED 7 | ||
959 | 974 | ||
960 | #define NX_RCODE_DRIVER_INFO 0x20000000 | 975 | #define NX_RCODE_DRIVER_INFO 0x20000000 |
961 | #define NX_RCODE_DRIVER_CAN_RELOAD 0x40000000 | 976 | #define NX_RCODE_DRIVER_CAN_RELOAD 0x40000000 |