diff options
author | Christopher Leech <christopher.leech@intel.com> | 2008-08-26 07:27:02 -0400 |
---|---|---|
committer | Jeff Garzik <jgarzik@redhat.com> | 2008-09-03 10:03:32 -0400 |
commit | 2c5645cf65dc6dce15dac47a7cdfabb85224fede (patch) | |
tree | cda97b5ea34d1a6b6928fbdee495292a6502bb63 /drivers/net/ixgbe | |
parent | 9da09bb1b806a85a0bc4fb5426fb3022f56aad19 (diff) |
ixgbe: Implement HAVE_SET_RX_MODE
Implement HAVE_SET_RX_MODE in the driver for MC and UC lists.
Signed-off-by: Christopher Leech <christopher.leech@intel.com>
Signed-off-by: Peter P Waskiewicz Jr <peter.p.waskiewicz.jr@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
Diffstat (limited to 'drivers/net/ixgbe')
-rw-r--r-- | drivers/net/ixgbe/ixgbe_82598.c | 6 | ||||
-rw-r--r-- | drivers/net/ixgbe/ixgbe_common.c | 123 | ||||
-rw-r--r-- | drivers/net/ixgbe/ixgbe_common.h | 4 | ||||
-rw-r--r-- | drivers/net/ixgbe/ixgbe_main.c | 72 | ||||
-rw-r--r-- | drivers/net/ixgbe/ixgbe_type.h | 14 |
5 files changed, 169 insertions, 50 deletions
diff --git a/drivers/net/ixgbe/ixgbe_82598.c b/drivers/net/ixgbe/ixgbe_82598.c index f96358b641af..ba09063260d9 100644 --- a/drivers/net/ixgbe/ixgbe_82598.c +++ b/drivers/net/ixgbe/ixgbe_82598.c | |||
@@ -36,6 +36,8 @@ | |||
36 | #define IXGBE_82598_MAX_TX_QUEUES 32 | 36 | #define IXGBE_82598_MAX_TX_QUEUES 32 |
37 | #define IXGBE_82598_MAX_RX_QUEUES 64 | 37 | #define IXGBE_82598_MAX_RX_QUEUES 64 |
38 | #define IXGBE_82598_RAR_ENTRIES 16 | 38 | #define IXGBE_82598_RAR_ENTRIES 16 |
39 | #define IXGBE_82598_MC_TBL_SIZE 128 | ||
40 | #define IXGBE_82598_VFT_TBL_SIZE 128 | ||
39 | 41 | ||
40 | static s32 ixgbe_get_invariants_82598(struct ixgbe_hw *hw); | 42 | static s32 ixgbe_get_invariants_82598(struct ixgbe_hw *hw); |
41 | static s32 ixgbe_get_link_settings_82598(struct ixgbe_hw *hw, u32 *speed, | 43 | static s32 ixgbe_get_link_settings_82598(struct ixgbe_hw *hw, u32 *speed, |
@@ -60,7 +62,9 @@ static s32 ixgbe_get_invariants_82598(struct ixgbe_hw *hw) | |||
60 | { | 62 | { |
61 | hw->mac.num_rx_queues = IXGBE_82598_MAX_RX_QUEUES; | 63 | hw->mac.num_rx_queues = IXGBE_82598_MAX_RX_QUEUES; |
62 | hw->mac.num_tx_queues = IXGBE_82598_MAX_TX_QUEUES; | 64 | hw->mac.num_tx_queues = IXGBE_82598_MAX_TX_QUEUES; |
63 | hw->mac.num_rx_addrs = IXGBE_82598_RAR_ENTRIES; | 65 | hw->mac.mcft_size = IXGBE_82598_MC_TBL_SIZE; |
66 | hw->mac.vft_size = IXGBE_82598_VFT_TBL_SIZE; | ||
67 | hw->mac.num_rar_entries = IXGBE_82598_RAR_ENTRIES; | ||
64 | 68 | ||
65 | /* PHY ops are filled in by default properly for Fiber only */ | 69 | /* PHY ops are filled in by default properly for Fiber only */ |
66 | if (hw->mac.ops.get_media_type(hw) == ixgbe_media_type_copper) { | 70 | if (hw->mac.ops.get_media_type(hw) == ixgbe_media_type_copper) { |
diff --git a/drivers/net/ixgbe/ixgbe_common.c b/drivers/net/ixgbe/ixgbe_common.c index 7fd6aeb1b021..a9f4d0e58e1c 100644 --- a/drivers/net/ixgbe/ixgbe_common.c +++ b/drivers/net/ixgbe/ixgbe_common.c | |||
@@ -661,7 +661,7 @@ s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vind, | |||
661 | static s32 ixgbe_init_rx_addrs(struct ixgbe_hw *hw) | 661 | static s32 ixgbe_init_rx_addrs(struct ixgbe_hw *hw) |
662 | { | 662 | { |
663 | u32 i; | 663 | u32 i; |
664 | u32 rar_entries = hw->mac.num_rx_addrs; | 664 | u32 rar_entries = hw->mac.num_rar_entries; |
665 | 665 | ||
666 | /* | 666 | /* |
667 | * If the current mac address is valid, assume it is a software override | 667 | * If the current mac address is valid, assume it is a software override |
@@ -705,13 +705,114 @@ static s32 ixgbe_init_rx_addrs(struct ixgbe_hw *hw) | |||
705 | IXGBE_WRITE_REG(hw, IXGBE_MCSTCTRL, hw->mac.mc_filter_type); | 705 | IXGBE_WRITE_REG(hw, IXGBE_MCSTCTRL, hw->mac.mc_filter_type); |
706 | 706 | ||
707 | hw_dbg(hw, " Clearing MTA\n"); | 707 | hw_dbg(hw, " Clearing MTA\n"); |
708 | for (i = 0; i < IXGBE_MC_TBL_SIZE; i++) | 708 | for (i = 0; i < hw->mac.mcft_size; i++) |
709 | IXGBE_WRITE_REG(hw, IXGBE_MTA(i), 0); | 709 | IXGBE_WRITE_REG(hw, IXGBE_MTA(i), 0); |
710 | 710 | ||
711 | return 0; | 711 | return 0; |
712 | } | 712 | } |
713 | 713 | ||
714 | /** | 714 | /** |
715 | * ixgbe_add_uc_addr - Adds a secondary unicast address. | ||
716 | * @hw: pointer to hardware structure | ||
717 | * @addr: new address | ||
718 | * | ||
719 | * Adds it to unused receive address register or goes into promiscuous mode. | ||
720 | **/ | ||
721 | void ixgbe_add_uc_addr(struct ixgbe_hw *hw, u8 *addr) | ||
722 | { | ||
723 | u32 rar_entries = hw->mac.num_rar_entries; | ||
724 | u32 rar; | ||
725 | |||
726 | hw_dbg(hw, " UC Addr = %.2X %.2X %.2X %.2X %.2X %.2X\n", | ||
727 | addr[0], addr[1], addr[2], addr[3], addr[4], addr[5]); | ||
728 | |||
729 | /* | ||
730 | * Place this address in the RAR if there is room, | ||
731 | * else put the controller into promiscuous mode | ||
732 | */ | ||
733 | if (hw->addr_ctrl.rar_used_count < rar_entries) { | ||
734 | rar = hw->addr_ctrl.rar_used_count - | ||
735 | hw->addr_ctrl.mc_addr_in_rar_count; | ||
736 | ixgbe_set_rar(hw, rar, addr, 0, IXGBE_RAH_AV); | ||
737 | hw_dbg(hw, "Added a secondary address to RAR[%d]\n", rar); | ||
738 | hw->addr_ctrl.rar_used_count++; | ||
739 | } else { | ||
740 | hw->addr_ctrl.overflow_promisc++; | ||
741 | } | ||
742 | |||
743 | hw_dbg(hw, "ixgbe_add_uc_addr Complete\n"); | ||
744 | } | ||
745 | |||
746 | /** | ||
747 | * ixgbe_update_uc_addr_list - Updates MAC list of secondary addresses | ||
748 | * @hw: pointer to hardware structure | ||
749 | * @addr_list: the list of new addresses | ||
750 | * @addr_count: number of addresses | ||
751 | * @next: iterator function to walk the address list | ||
752 | * | ||
753 | * The given list replaces any existing list. Clears the secondary addrs from | ||
754 | * receive address registers. Uses unused receive address registers for the | ||
755 | * first secondary addresses, and falls back to promiscuous mode as needed. | ||
756 | * | ||
757 | * Drivers using secondary unicast addresses must set user_set_promisc when | ||
758 | * manually putting the device into promiscuous mode. | ||
759 | **/ | ||
760 | s32 ixgbe_update_uc_addr_list(struct ixgbe_hw *hw, u8 *addr_list, | ||
761 | u32 addr_count, ixgbe_mc_addr_itr next) | ||
762 | { | ||
763 | u8 *addr; | ||
764 | u32 i; | ||
765 | u32 old_promisc_setting = hw->addr_ctrl.overflow_promisc; | ||
766 | u32 uc_addr_in_use; | ||
767 | u32 fctrl; | ||
768 | u32 vmdq; | ||
769 | |||
770 | /* | ||
771 | * Clear accounting of old secondary address list, | ||
772 | * don't count RAR[0] | ||
773 | */ | ||
774 | uc_addr_in_use = hw->addr_ctrl.rar_used_count - | ||
775 | hw->addr_ctrl.mc_addr_in_rar_count - 1; | ||
776 | hw->addr_ctrl.rar_used_count -= uc_addr_in_use; | ||
777 | hw->addr_ctrl.overflow_promisc = 0; | ||
778 | |||
779 | /* Zero out the other receive addresses */ | ||
780 | hw_dbg(hw, "Clearing RAR[1-%d]\n", uc_addr_in_use); | ||
781 | for (i = 1; i <= uc_addr_in_use; i++) { | ||
782 | IXGBE_WRITE_REG(hw, IXGBE_RAL(i), 0); | ||
783 | IXGBE_WRITE_REG(hw, IXGBE_RAH(i), 0); | ||
784 | } | ||
785 | |||
786 | /* Add the new addresses */ | ||
787 | for (i = 0; i < addr_count; i++) { | ||
788 | hw_dbg(hw, " Adding the secondary addresses:\n"); | ||
789 | addr = next(hw, &addr_list, &vmdq); | ||
790 | ixgbe_add_uc_addr(hw, addr); | ||
791 | } | ||
792 | |||
793 | if (hw->addr_ctrl.overflow_promisc) { | ||
794 | /* enable promisc if not already in overflow or set by user */ | ||
795 | if (!old_promisc_setting && !hw->addr_ctrl.user_set_promisc) { | ||
796 | hw_dbg(hw, " Entering address overflow promisc mode\n"); | ||
797 | fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL); | ||
798 | fctrl |= IXGBE_FCTRL_UPE; | ||
799 | IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl); | ||
800 | } | ||
801 | } else { | ||
802 | /* only disable if set by overflow, not by user */ | ||
803 | if (old_promisc_setting && !hw->addr_ctrl.user_set_promisc) { | ||
804 | hw_dbg(hw, " Leaving address overflow promisc mode\n"); | ||
805 | fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL); | ||
806 | fctrl &= ~IXGBE_FCTRL_UPE; | ||
807 | IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl); | ||
808 | } | ||
809 | } | ||
810 | |||
811 | hw_dbg(hw, "ixgbe_update_uc_addr_list Complete\n"); | ||
812 | return 0; | ||
813 | } | ||
814 | |||
815 | /** | ||
715 | * ixgbe_mta_vector - Determines bit-vector in multicast table to set | 816 | * ixgbe_mta_vector - Determines bit-vector in multicast table to set |
716 | * @hw: pointer to hardware structure | 817 | * @hw: pointer to hardware structure |
717 | * @mc_addr: the multicast address | 818 | * @mc_addr: the multicast address |
@@ -794,7 +895,7 @@ static void ixgbe_set_mta(struct ixgbe_hw *hw, u8 *mc_addr) | |||
794 | **/ | 895 | **/ |
795 | static void ixgbe_add_mc_addr(struct ixgbe_hw *hw, u8 *mc_addr) | 896 | static void ixgbe_add_mc_addr(struct ixgbe_hw *hw, u8 *mc_addr) |
796 | { | 897 | { |
797 | u32 rar_entries = hw->mac.num_rx_addrs; | 898 | u32 rar_entries = hw->mac.num_rar_entries; |
798 | 899 | ||
799 | hw_dbg(hw, " MC Addr =%.2X %.2X %.2X %.2X %.2X %.2X\n", | 900 | hw_dbg(hw, " MC Addr =%.2X %.2X %.2X %.2X %.2X %.2X\n", |
800 | mc_addr[0], mc_addr[1], mc_addr[2], | 901 | mc_addr[0], mc_addr[1], mc_addr[2], |
@@ -823,7 +924,7 @@ static void ixgbe_add_mc_addr(struct ixgbe_hw *hw, u8 *mc_addr) | |||
823 | * @hw: pointer to hardware structure | 924 | * @hw: pointer to hardware structure |
824 | * @mc_addr_list: the list of new multicast addresses | 925 | * @mc_addr_list: the list of new multicast addresses |
825 | * @mc_addr_count: number of addresses | 926 | * @mc_addr_count: number of addresses |
826 | * @pad: number of bytes between addresses in the list | 927 | * @next: iterator function to walk the multicast address list |
827 | * | 928 | * |
828 | * The given list replaces any existing list. Clears the MC addrs from receive | 929 | * The given list replaces any existing list. Clears the MC addrs from receive |
829 | * address registers and the multicast table. Uses unsed receive address | 930 | * address registers and the multicast table. Uses unsed receive address |
@@ -831,10 +932,11 @@ static void ixgbe_add_mc_addr(struct ixgbe_hw *hw, u8 *mc_addr) | |||
831 | * multicast table. | 932 | * multicast table. |
832 | **/ | 933 | **/ |
833 | s32 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list, | 934 | s32 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list, |
834 | u32 mc_addr_count, u32 pad) | 935 | u32 mc_addr_count, ixgbe_mc_addr_itr next) |
835 | { | 936 | { |
836 | u32 i; | 937 | u32 i; |
837 | u32 rar_entries = hw->mac.num_rx_addrs; | 938 | u32 rar_entries = hw->mac.num_rar_entries; |
939 | u32 vmdq; | ||
838 | 940 | ||
839 | /* | 941 | /* |
840 | * Set the new number of MC addresses that we are being requested to | 942 | * Set the new number of MC addresses that we are being requested to |
@@ -854,14 +956,13 @@ s32 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list, | |||
854 | 956 | ||
855 | /* Clear the MTA */ | 957 | /* Clear the MTA */ |
856 | hw_dbg(hw, " Clearing MTA\n"); | 958 | hw_dbg(hw, " Clearing MTA\n"); |
857 | for (i = 0; i < IXGBE_MC_TBL_SIZE; i++) | 959 | for (i = 0; i < hw->mac.mcft_size; i++) |
858 | IXGBE_WRITE_REG(hw, IXGBE_MTA(i), 0); | 960 | IXGBE_WRITE_REG(hw, IXGBE_MTA(i), 0); |
859 | 961 | ||
860 | /* Add the new addresses */ | 962 | /* Add the new addresses */ |
861 | for (i = 0; i < mc_addr_count; i++) { | 963 | for (i = 0; i < mc_addr_count; i++) { |
862 | hw_dbg(hw, " Adding the multicast addresses:\n"); | 964 | hw_dbg(hw, " Adding the multicast addresses:\n"); |
863 | ixgbe_add_mc_addr(hw, mc_addr_list + | 965 | ixgbe_add_mc_addr(hw, next(hw, &mc_addr_list, &vmdq)); |
864 | (i * (IXGBE_ETH_LENGTH_OF_ADDRESS + pad))); | ||
865 | } | 966 | } |
866 | 967 | ||
867 | /* Enable mta */ | 968 | /* Enable mta */ |
@@ -884,11 +985,11 @@ static s32 ixgbe_clear_vfta(struct ixgbe_hw *hw) | |||
884 | u32 offset; | 985 | u32 offset; |
885 | u32 vlanbyte; | 986 | u32 vlanbyte; |
886 | 987 | ||
887 | for (offset = 0; offset < IXGBE_VLAN_FILTER_TBL_SIZE; offset++) | 988 | for (offset = 0; offset < hw->mac.vft_size; offset++) |
888 | IXGBE_WRITE_REG(hw, IXGBE_VFTA(offset), 0); | 989 | IXGBE_WRITE_REG(hw, IXGBE_VFTA(offset), 0); |
889 | 990 | ||
890 | for (vlanbyte = 0; vlanbyte < 4; vlanbyte++) | 991 | for (vlanbyte = 0; vlanbyte < 4; vlanbyte++) |
891 | for (offset = 0; offset < IXGBE_VLAN_FILTER_TBL_SIZE; offset++) | 992 | for (offset = 0; offset < hw->mac.vft_size; offset++) |
892 | IXGBE_WRITE_REG(hw, IXGBE_VFTAVIND(vlanbyte, offset), | 993 | IXGBE_WRITE_REG(hw, IXGBE_VFTAVIND(vlanbyte, offset), |
893 | 0); | 994 | 0); |
894 | 995 | ||
diff --git a/drivers/net/ixgbe/ixgbe_common.h b/drivers/net/ixgbe/ixgbe_common.h index de6ddd5d04ad..c75ecba9ccda 100644 --- a/drivers/net/ixgbe/ixgbe_common.h +++ b/drivers/net/ixgbe/ixgbe_common.h | |||
@@ -47,7 +47,9 @@ s32 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val); | |||
47 | s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vind, | 47 | s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vind, |
48 | u32 enable_addr); | 48 | u32 enable_addr); |
49 | s32 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list, | 49 | s32 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list, |
50 | u32 mc_addr_count, u32 pad); | 50 | u32 mc_addr_count, ixgbe_mc_addr_itr next); |
51 | s32 ixgbe_update_uc_addr_list(struct ixgbe_hw *hw, u8 *uc_addr_list, | ||
52 | u32 mc_addr_count, ixgbe_mc_addr_itr next); | ||
51 | s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on); | 53 | s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on); |
52 | s32 ixgbe_validate_mac_addr(u8 *mac_addr); | 54 | s32 ixgbe_validate_mac_addr(u8 *mac_addr); |
53 | 55 | ||
diff --git a/drivers/net/ixgbe/ixgbe_main.c b/drivers/net/ixgbe/ixgbe_main.c index b14192f369db..87ef2db8c430 100644 --- a/drivers/net/ixgbe/ixgbe_main.c +++ b/drivers/net/ixgbe/ixgbe_main.c | |||
@@ -1619,23 +1619,37 @@ static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter) | |||
1619 | } | 1619 | } |
1620 | } | 1620 | } |
1621 | 1621 | ||
1622 | static u8 *ixgbe_addr_list_itr(struct ixgbe_hw *hw, u8 **mc_addr_ptr, u32 *vmdq) | ||
1623 | { | ||
1624 | struct dev_mc_list *mc_ptr; | ||
1625 | u8 *addr = *mc_addr_ptr; | ||
1626 | *vmdq = 0; | ||
1627 | |||
1628 | mc_ptr = container_of(addr, struct dev_mc_list, dmi_addr[0]); | ||
1629 | if (mc_ptr->next) | ||
1630 | *mc_addr_ptr = mc_ptr->next->dmi_addr; | ||
1631 | else | ||
1632 | *mc_addr_ptr = NULL; | ||
1633 | |||
1634 | return addr; | ||
1635 | } | ||
1636 | |||
1622 | /** | 1637 | /** |
1623 | * ixgbe_set_multi - Multicast and Promiscuous mode set | 1638 | * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set |
1624 | * @netdev: network interface device structure | 1639 | * @netdev: network interface device structure |
1625 | * | 1640 | * |
1626 | * The set_multi entry point is called whenever the multicast address | 1641 | * The set_rx_method entry point is called whenever the unicast/multicast |
1627 | * list or the network interface flags are updated. This routine is | 1642 | * address list or the network interface flags are updated. This routine is |
1628 | * responsible for configuring the hardware for proper multicast, | 1643 | * responsible for configuring the hardware for proper unicast, multicast and |
1629 | * promiscuous mode, and all-multi behavior. | 1644 | * promiscuous mode. |
1630 | **/ | 1645 | **/ |
1631 | static void ixgbe_set_multi(struct net_device *netdev) | 1646 | static void ixgbe_set_rx_mode(struct net_device *netdev) |
1632 | { | 1647 | { |
1633 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | 1648 | struct ixgbe_adapter *adapter = netdev_priv(netdev); |
1634 | struct ixgbe_hw *hw = &adapter->hw; | 1649 | struct ixgbe_hw *hw = &adapter->hw; |
1635 | struct dev_mc_list *mc_ptr; | ||
1636 | u8 *mta_list; | ||
1637 | u32 fctrl, vlnctrl; | 1650 | u32 fctrl, vlnctrl; |
1638 | int i; | 1651 | u8 *addr_list = NULL; |
1652 | int addr_count = 0; | ||
1639 | 1653 | ||
1640 | /* Check for Promiscuous and All Multicast modes */ | 1654 | /* Check for Promiscuous and All Multicast modes */ |
1641 | 1655 | ||
@@ -1643,6 +1657,7 @@ static void ixgbe_set_multi(struct net_device *netdev) | |||
1643 | vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL); | 1657 | vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL); |
1644 | 1658 | ||
1645 | if (netdev->flags & IFF_PROMISC) { | 1659 | if (netdev->flags & IFF_PROMISC) { |
1660 | hw->addr_ctrl.user_set_promisc = 1; | ||
1646 | fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE); | 1661 | fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE); |
1647 | vlnctrl &= ~IXGBE_VLNCTRL_VFE; | 1662 | vlnctrl &= ~IXGBE_VLNCTRL_VFE; |
1648 | } else { | 1663 | } else { |
@@ -1653,33 +1668,25 @@ static void ixgbe_set_multi(struct net_device *netdev) | |||
1653 | fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE); | 1668 | fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE); |
1654 | } | 1669 | } |
1655 | vlnctrl |= IXGBE_VLNCTRL_VFE; | 1670 | vlnctrl |= IXGBE_VLNCTRL_VFE; |
1671 | hw->addr_ctrl.user_set_promisc = 0; | ||
1656 | } | 1672 | } |
1657 | 1673 | ||
1658 | IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl); | 1674 | IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl); |
1659 | IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl); | 1675 | IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl); |
1660 | 1676 | ||
1661 | if (netdev->mc_count) { | 1677 | /* reprogram secondary unicast list */ |
1662 | mta_list = kcalloc(netdev->mc_count, ETH_ALEN, GFP_ATOMIC); | 1678 | addr_count = netdev->uc_count; |
1663 | if (!mta_list) | 1679 | if (addr_count) |
1664 | return; | 1680 | addr_list = netdev->uc_list->dmi_addr; |
1665 | 1681 | ixgbe_update_uc_addr_list(hw, addr_list, addr_count, | |
1666 | /* Shared function expects packed array of only addresses. */ | 1682 | ixgbe_addr_list_itr); |
1667 | mc_ptr = netdev->mc_list; | ||
1668 | |||
1669 | for (i = 0; i < netdev->mc_count; i++) { | ||
1670 | if (!mc_ptr) | ||
1671 | break; | ||
1672 | memcpy(mta_list + (i * ETH_ALEN), mc_ptr->dmi_addr, | ||
1673 | ETH_ALEN); | ||
1674 | mc_ptr = mc_ptr->next; | ||
1675 | } | ||
1676 | |||
1677 | ixgbe_update_mc_addr_list(hw, mta_list, i, 0); | ||
1678 | kfree(mta_list); | ||
1679 | } else { | ||
1680 | ixgbe_update_mc_addr_list(hw, NULL, 0, 0); | ||
1681 | } | ||
1682 | 1683 | ||
1684 | /* reprogram multicast list */ | ||
1685 | addr_count = netdev->mc_count; | ||
1686 | if (addr_count) | ||
1687 | addr_list = netdev->mc_list->dmi_addr; | ||
1688 | ixgbe_update_mc_addr_list(hw, addr_list, addr_count, | ||
1689 | ixgbe_addr_list_itr); | ||
1683 | } | 1690 | } |
1684 | 1691 | ||
1685 | static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter) | 1692 | static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter) |
@@ -1723,7 +1730,7 @@ static void ixgbe_configure(struct ixgbe_adapter *adapter) | |||
1723 | struct net_device *netdev = adapter->netdev; | 1730 | struct net_device *netdev = adapter->netdev; |
1724 | int i; | 1731 | int i; |
1725 | 1732 | ||
1726 | ixgbe_set_multi(netdev); | 1733 | ixgbe_set_rx_mode(netdev); |
1727 | 1734 | ||
1728 | ixgbe_restore_vlan(adapter); | 1735 | ixgbe_restore_vlan(adapter); |
1729 | 1736 | ||
@@ -3508,7 +3515,8 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev, | |||
3508 | netdev->stop = &ixgbe_close; | 3515 | netdev->stop = &ixgbe_close; |
3509 | netdev->hard_start_xmit = &ixgbe_xmit_frame; | 3516 | netdev->hard_start_xmit = &ixgbe_xmit_frame; |
3510 | netdev->get_stats = &ixgbe_get_stats; | 3517 | netdev->get_stats = &ixgbe_get_stats; |
3511 | netdev->set_multicast_list = &ixgbe_set_multi; | 3518 | netdev->set_rx_mode = &ixgbe_set_rx_mode; |
3519 | netdev->set_multicast_list = &ixgbe_set_rx_mode; | ||
3512 | netdev->set_mac_address = &ixgbe_set_mac; | 3520 | netdev->set_mac_address = &ixgbe_set_mac; |
3513 | netdev->change_mtu = &ixgbe_change_mtu; | 3521 | netdev->change_mtu = &ixgbe_change_mtu; |
3514 | ixgbe_set_ethtool_ops(netdev); | 3522 | ixgbe_set_ethtool_ops(netdev); |
diff --git a/drivers/net/ixgbe/ixgbe_type.h b/drivers/net/ixgbe/ixgbe_type.h index 781f137deccf..2f4d34e6729f 100644 --- a/drivers/net/ixgbe/ixgbe_type.h +++ b/drivers/net/ixgbe/ixgbe_type.h | |||
@@ -822,10 +822,6 @@ | |||
822 | #define IXGBE_RAH_VIND_SHIFT 18 | 822 | #define IXGBE_RAH_VIND_SHIFT 18 |
823 | #define IXGBE_RAH_AV 0x80000000 | 823 | #define IXGBE_RAH_AV 0x80000000 |
824 | 824 | ||
825 | /* Filters */ | ||
826 | #define IXGBE_MC_TBL_SIZE 128 /* Multicast Filter Table (4096 bits) */ | ||
827 | #define IXGBE_VLAN_FILTER_TBL_SIZE 128 /* VLAN Filter Table (4096 bits) */ | ||
828 | |||
829 | /* Header split receive */ | 825 | /* Header split receive */ |
830 | #define IXGBE_RFCTL_ISCSI_DIS 0x00000001 | 826 | #define IXGBE_RFCTL_ISCSI_DIS 0x00000001 |
831 | #define IXGBE_RFCTL_ISCSI_DWC_MASK 0x0000003E | 827 | #define IXGBE_RFCTL_ISCSI_DWC_MASK 0x0000003E |
@@ -1167,6 +1163,8 @@ struct ixgbe_addr_filter_info { | |||
1167 | u32 rar_used_count; | 1163 | u32 rar_used_count; |
1168 | u32 mc_addr_in_rar_count; | 1164 | u32 mc_addr_in_rar_count; |
1169 | u32 mta_in_use; | 1165 | u32 mta_in_use; |
1166 | u32 overflow_promisc; | ||
1167 | bool user_set_promisc; | ||
1170 | }; | 1168 | }; |
1171 | 1169 | ||
1172 | /* Flow control parameters */ | 1170 | /* Flow control parameters */ |
@@ -1242,6 +1240,10 @@ struct ixgbe_hw_stats { | |||
1242 | /* forward declaration */ | 1240 | /* forward declaration */ |
1243 | struct ixgbe_hw; | 1241 | struct ixgbe_hw; |
1244 | 1242 | ||
1243 | /* iterator type for walking multicast address lists */ | ||
1244 | typedef u8* (*ixgbe_mc_addr_itr) (struct ixgbe_hw *hw, u8 **mc_addr_ptr, | ||
1245 | u32 *vmdq); | ||
1246 | |||
1245 | struct ixgbe_mac_operations { | 1247 | struct ixgbe_mac_operations { |
1246 | s32 (*reset)(struct ixgbe_hw *); | 1248 | s32 (*reset)(struct ixgbe_hw *); |
1247 | enum ixgbe_media_type (*get_media_type)(struct ixgbe_hw *); | 1249 | enum ixgbe_media_type (*get_media_type)(struct ixgbe_hw *); |
@@ -1263,9 +1265,11 @@ struct ixgbe_mac_info { | |||
1263 | u8 addr[IXGBE_ETH_LENGTH_OF_ADDRESS]; | 1265 | u8 addr[IXGBE_ETH_LENGTH_OF_ADDRESS]; |
1264 | u8 perm_addr[IXGBE_ETH_LENGTH_OF_ADDRESS]; | 1266 | u8 perm_addr[IXGBE_ETH_LENGTH_OF_ADDRESS]; |
1265 | s32 mc_filter_type; | 1267 | s32 mc_filter_type; |
1268 | u32 mcft_size; | ||
1269 | u32 vft_size; | ||
1270 | u32 num_rar_entries; | ||
1266 | u32 num_rx_queues; | 1271 | u32 num_rx_queues; |
1267 | u32 num_tx_queues; | 1272 | u32 num_tx_queues; |
1268 | u32 num_rx_addrs; | ||
1269 | u32 link_attach_type; | 1273 | u32 link_attach_type; |
1270 | u32 link_mode_select; | 1274 | u32 link_mode_select; |
1271 | bool link_settings_loaded; | 1275 | bool link_settings_loaded; |